cpuinfo.h revision 204689
1/* $NetBSD: cpu.h,v 1.70 2003/01/17 23:36:08 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * Ralph Campbell and Rick Macklem. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * $FreeBSD: head/sys/mips/include/cpuinfo.h 204689 2010-03-04 05:23:08Z neel $ 39 * @(#)cpu.h 8.4 (Berkeley) 1/4/94 40 */ 41 42#ifndef _CPUINFO_H_ 43#define _CPUINFO_H_ 44 45/* 46 * Exported definitions unique to NetBSD/mips cpu support. 47 */ 48 49#ifdef _KERNEL 50#ifndef LOCORE 51 52struct mips_cpuinfo { 53 u_int8_t cpu_vendor; 54 u_int8_t cpu_rev; 55 u_int8_t cpu_impl; 56 u_int8_t tlb_type; 57 u_int16_t tlb_nentries; 58 u_int8_t icache_virtual; 59 boolean_t cache_coherent_dma; 60 struct { 61 u_int32_t ic_size; 62 u_int8_t ic_linesize; 63 u_int8_t ic_nways; 64 u_int16_t ic_nsets; 65 u_int32_t dc_size; 66 u_int8_t dc_linesize; 67 u_int8_t dc_nways; 68 u_int16_t dc_nsets; 69 } l1; 70}; 71 72extern struct mips_cpuinfo cpuinfo; 73 74/* TODO: Merge above structure with NetBSD's below. */ 75 76struct cpu_info { 77#ifdef notyet 78 struct schedstate_percpu ci_schedstate; /* scheduler state */ 79#endif 80 u_long ci_cpu_freq; /* CPU frequency */ 81 u_long ci_cycles_per_hz; /* CPU freq / hz */ 82 u_long ci_divisor_delay; /* for delay/DELAY */ 83 u_long ci_divisor_recip; /* scaled reciprocal of previous; 84 see below */ 85#if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 86 u_long ci_spin_locks; /* # of spin locks held */ 87 u_long ci_simple_locks; /* # of simple locks held */ 88#endif 89}; 90 91/* 92 * To implement a more accurate microtime using the CP0 COUNT register 93 * we need to divide that register by the number of cycles per MHz. 94 * But... 95 * 96 * DIV and DIVU are expensive on MIPS (eg 75 clocks on the R4000). MULT 97 * and MULTU are only 12 clocks on the same CPU. 98 * 99 * The strategy we use is to calculate the reciprical of cycles per MHz, 100 * scaled by 1<<32. Then we can simply issue a MULTU and pluck of the 101 * HI register and have the results of the division. 102 */ 103#define MIPS_SET_CI_RECIPRICAL(cpu) \ 104do { \ 105 KASSERT((cpu)->ci_divisor_delay != 0, ("divisor delay")); \ 106 (cpu)->ci_divisor_recip = 0x100000000ULL / (cpu)->ci_divisor_delay; \ 107} while (0) 108 109#define MIPS_COUNT_TO_MHZ(cpu, count, res) \ 110 __asm __volatile ("multu %1,%2 ; mfhi %0" \ 111 : "=r"((res)) : "r"((count)), "r"((cpu)->ci_divisor_recip)) 112 113 114extern struct cpu_info cpu_info_store; 115 116#if 0 117#define curcpu() (&cpu_info_store) 118#define cpu_number() (0) 119#endif 120 121#endif /* !LOCORE */ 122#endif /* _KERNEL */ 123#endif /* _CPUINFO_H_ */ 124