octeon_mp.c revision 222813
1/*- 2 * Copyright (c) 2004-2010 Juli Mallett <jmallett@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/mips/cavium/octeon_mp.c 222813 2011-06-07 08:46:13Z attilio $ 27 */ 28#include <sys/cdefs.h> 29__FBSDID("$FreeBSD: head/sys/mips/cavium/octeon_mp.c 222813 2011-06-07 08:46:13Z attilio $"); 30 31#include <sys/param.h> 32#include <sys/conf.h> 33#include <sys/kernel.h> 34#include <sys/smp.h> 35#include <sys/systm.h> 36 37#include <machine/hwfunc.h> 38#include <machine/md_var.h> 39#include <machine/smp.h> 40 41#include <mips/cavium/octeon_pcmap_regs.h> 42 43#include <contrib/octeon-sdk/cvmx.h> 44#include <contrib/octeon-sdk/cvmx-interrupt.h> 45 46/* XXX */ 47extern cvmx_bootinfo_t *octeon_bootinfo; 48 49unsigned octeon_ap_boot = ~0; 50 51void 52platform_ipi_send(int cpuid) 53{ 54 cvmx_write_csr(CVMX_CIU_MBOX_SETX(cpuid), 1); 55 mips_wbflush(); 56} 57 58void 59platform_ipi_clear(void) 60{ 61 uint64_t action; 62 63 action = cvmx_read_csr(CVMX_CIU_MBOX_CLRX(PCPU_GET(cpuid))); 64 KASSERT(action == 1, ("unexpected IPIs: %#jx", (uintmax_t)action)); 65 cvmx_write_csr(CVMX_CIU_MBOX_CLRX(PCPU_GET(cpuid)), action); 66} 67 68int 69platform_ipi_intrnum(void) 70{ 71 return (1); 72} 73 74void 75platform_init_ap(int cpuid) 76{ 77 unsigned ciu_int_mask, clock_int_mask, ipi_int_mask; 78 79 /* 80 * Set the exception base. 81 */ 82 mips_wr_ebase(0x80000000); 83 84 /* 85 * Clear any pending IPIs. 86 */ 87 cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cpuid), 0xffffffff); 88 89 /* 90 * Set up interrupts. 91 */ 92 octeon_ciu_reset(); 93 94 /* 95 * Unmask the clock, ipi and ciu interrupts. 96 */ 97 ciu_int_mask = hard_int_mask(0); 98 clock_int_mask = hard_int_mask(5); 99 ipi_int_mask = hard_int_mask(platform_ipi_intrnum()); 100 set_intr_mask(ciu_int_mask | clock_int_mask | ipi_int_mask); 101 102 mips_wbflush(); 103} 104 105void 106platform_cpu_mask(cpuset_t *mask) 107{ 108 109 CPU_ZERO(mask); 110 111 /* 112 * XXX: hack in order to simplify CPU set building, assuming that 113 * core_mask is 32-bits. 114 */ 115 memcpy(mask, &octeon_bootinfo->core_mask, 116 sizeof(octeon_bootinfo->core_mask)); 117} 118 119struct cpu_group * 120platform_smp_topo(void) 121{ 122 return (smp_topo_none()); 123} 124 125int 126platform_start_ap(int cpuid) 127{ 128 if (atomic_cmpset_32(&octeon_ap_boot, ~0, cpuid) == 0) 129 return (-1); 130 for (;;) { 131 DELAY(1000); 132 if (atomic_cmpset_32(&octeon_ap_boot, 0, ~0) != 0) 133 return (0); 134 printf("Waiting for cpu%d to start\n", cpuid); 135 } 136} 137