octeon_mp.c revision 206721 
1/*-
2 * Copyright (c) 2004-2010 Juli Mallett <jmallett@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/mips/cavium/octeon_mp.c 206721 2010-04-17 03:08:13Z jmallett $
27 */
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/mips/cavium/octeon_mp.c 206721 2010-04-17 03:08:13Z jmallett $");
30
31#include <sys/param.h>
32#include <sys/conf.h>
33#include <sys/kernel.h>
34#include <sys/systm.h>
35
36#include <machine/hwfunc.h>
37#include <machine/smp.h>
38
39#include <mips/cavium/octeon_pcmap_regs.h>
40
41unsigned octeon_ap_boot = ~0;
42
43void
44platform_ipi_send(int cpuid)
45{
46	oct_write64(OCTEON_CIU_MBOX_SETX(cpuid), 1);
47	mips_wbflush();
48}
49
50void
51platform_ipi_clear(void)
52{
53	uint64_t action;
54
55	action = oct_read64(OCTEON_CIU_MBOX_CLRX(PCPU_GET(cpuid)));
56	KASSERT(action == 1, ("unexpected IPIs: %#jx", (uintmax_t)action));
57	oct_write64(OCTEON_CIU_MBOX_CLRX(PCPU_GET(cpuid)), action);
58}
59
60int
61platform_ipi_intrnum(void)
62{
63	return (1);
64}
65
66void
67platform_init_ap(int cpuid)
68{
69	/*
70	 * Set the exception base.
71	 */
72	mips_wr_prid1(0x80000000 | cpuid);
73
74	/*
75	 * Set up interrupts, clear IPIs and unmask the IPI interrupt.
76	 */
77	octeon_ciu_reset();
78
79	oct_write64(OCTEON_CIU_MBOX_CLRX(cpuid), 0xffffffff);
80	ciu_enable_interrupts(cpuid, CIU_INT_1, CIU_EN_0, OCTEON_CIU_ENABLE_MBOX_INTR, CIU_MIPS_IP3);
81
82	mips_wbflush();
83}
84
85int
86platform_num_processors(void)
87{
88	return (fls(octeon_core_mask));
89}
90
91int
92platform_start_ap(int cpuid)
93{
94	if (atomic_cmpset_32(&octeon_ap_boot, ~0, cpuid) == 0)
95		return (-1);
96	for (;;) {
97		DELAY(1000);
98		if (atomic_cmpset_32(&octeon_ap_boot, 0, ~0) != 0)
99			return (0);
100		printf("Waiting for cpu%d to start\n", cpuid);
101	}
102}
103