octeon_machdep.c revision 243253
136285Sbrian/*- 236285Sbrian * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org> 336285Sbrian * All rights reserved. 436285Sbrian * 536285Sbrian * Redistribution and use in source and binary forms, with or without 636285Sbrian * modification, are permitted provided that the following conditions 736285Sbrian * are met: 836285Sbrian * 1. Redistributions of source code must retain the above copyright 936285Sbrian * notice, this list of conditions and the following disclaimer. 1036285Sbrian * 2. Redistributions in binary form must reproduce the above copyright 1136285Sbrian * notice, this list of conditions and the following disclaimer in the 1236285Sbrian * documentation and/or other materials provided with the distribution. 1336285Sbrian * 1436285Sbrian * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1536285Sbrian * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1636285Sbrian * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1736285Sbrian * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1836285Sbrian * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1936285Sbrian * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2036285Sbrian * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2136285Sbrian * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2236285Sbrian * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2336285Sbrian * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2436285Sbrian * SUCH DAMAGE. 2536285Sbrian * 2650479Speter * $FreeBSD: head/sys/mips/cavium/octeon_machdep.c 243253 2012-11-19 00:19:27Z jmallett $ 2736285Sbrian */ 2836285Sbrian#include <sys/cdefs.h> 2936285Sbrian__FBSDID("$FreeBSD: head/sys/mips/cavium/octeon_machdep.c 243253 2012-11-19 00:19:27Z jmallett $"); 3036285Sbrian 3136285Sbrian#include <sys/param.h> 3236285Sbrian#include <sys/conf.h> 3336285Sbrian#include <sys/kernel.h> 3436285Sbrian#include <sys/systm.h> 3536285Sbrian#include <sys/imgact.h> 3636285Sbrian#include <sys/bio.h> 3736285Sbrian#include <sys/buf.h> 3836285Sbrian#include <sys/bus.h> 3936285Sbrian#include <sys/cpu.h> 4036285Sbrian#include <sys/cons.h> 4136285Sbrian#include <sys/exec.h> 4236285Sbrian#include <sys/ucontext.h> 4336285Sbrian#include <sys/proc.h> 4446686Sbrian#include <sys/kdb.h> 4536285Sbrian#include <sys/ptrace.h> 4636285Sbrian#include <sys/reboot.h> 4736285Sbrian#include <sys/signalvar.h> 4836285Sbrian#include <sys/sysctl.h> 4936285Sbrian#include <sys/sysent.h> 5036285Sbrian#include <sys/sysproto.h> 5136285Sbrian#include <sys/time.h> 5236285Sbrian#include <sys/timetc.h> 5336285Sbrian#include <sys/user.h> 5436285Sbrian 5536285Sbrian#include <vm/vm.h> 5638557Sbrian#include <vm/vm_object.h> 5738557Sbrian#include <vm/vm_page.h> 5838557Sbrian#include <vm/vm_pager.h> 5963484Sbrian 6036285Sbrian#include <machine/atomic.h> 6136285Sbrian#include <machine/cache.h> 6236285Sbrian#include <machine/clock.h> 6336285Sbrian#include <machine/cpu.h> 6436285Sbrian#include <machine/cpuregs.h> 6536285Sbrian#include <machine/cpufunc.h> 6636285Sbrian#include <mips/cavium/octeon_pcmap_regs.h> 6743313Sbrian#include <machine/hwfunc.h> 6843313Sbrian#include <machine/intr_machdep.h> 6943313Sbrian#include <machine/locore.h> 7036285Sbrian#include <machine/md_var.h> 7136285Sbrian#include <machine/pcpu.h> 7236285Sbrian#include <machine/pte.h> 7338174Sbrian#include <machine/trap.h> 7436285Sbrian#include <machine/vmparam.h> 7536285Sbrian 7637386Sbrian#include <contrib/octeon-sdk/cvmx.h> 7736285Sbrian#include <contrib/octeon-sdk/cvmx-bootmem.h> 7836285Sbrian#include <contrib/octeon-sdk/cvmx-ebt3000.h> 7936285Sbrian#include <contrib/octeon-sdk/cvmx-helper-cfg.h> 8036285Sbrian#include <contrib/octeon-sdk/cvmx-interrupt.h> 8137010Sbrian#include <contrib/octeon-sdk/cvmx-version.h> 8274001Sbrian 8336285Sbrian#include <mips/cavium/octeon_irq.h> 8436285Sbrian 8536285Sbrian#if defined(__mips_n64) 8636285Sbrian#define MAX_APP_DESC_ADDR 0xffffffffafffffff 8736285Sbrian#else 8836285Sbrian#define MAX_APP_DESC_ADDR 0xafffffff 8936285Sbrian#endif 9036285Sbrian 9136285Sbrianstruct octeon_feature_description { 9236285Sbrian octeon_feature_t ofd_feature; 9336285Sbrian const char *ofd_string; 9436285Sbrian}; 9536285Sbrian 9636285Sbrianextern int *end; 9736285Sbrianextern char cpu_model[]; 9836285Sbrianextern char cpu_board[]; 9936285Sbrian 10036285Sbrianstatic const struct octeon_feature_description octeon_feature_descriptions[] = { 10136285Sbrian { OCTEON_FEATURE_SAAD, "SAAD" }, 10236285Sbrian { OCTEON_FEATURE_ZIP, "ZIP" }, 10336285Sbrian { OCTEON_FEATURE_CRYPTO, "CRYPTO" }, 10436285Sbrian { OCTEON_FEATURE_DORM_CRYPTO, "DORM_CRYPTO" }, 10536285Sbrian { OCTEON_FEATURE_PCIE, "PCIE" }, 10636285Sbrian { OCTEON_FEATURE_SRIO, "SRIO" }, 10736285Sbrian { OCTEON_FEATURE_KEY_MEMORY, "KEY_MEMORY" }, 10836285Sbrian { OCTEON_FEATURE_LED_CONTROLLER, "LED_CONTROLLER" }, 10936285Sbrian { OCTEON_FEATURE_TRA, "TRA" }, 11036285Sbrian { OCTEON_FEATURE_MGMT_PORT, "MGMT_PORT" }, 11136285Sbrian { OCTEON_FEATURE_RAID, "RAID" }, 11274001Sbrian { OCTEON_FEATURE_USB, "USB" }, 11336285Sbrian { OCTEON_FEATURE_NO_WPTR, "NO_WPTR" }, 11436285Sbrian { OCTEON_FEATURE_DFA, "DFA" }, 11536285Sbrian { OCTEON_FEATURE_MDIO_CLAUSE_45, "MDIO_CLAUSE_45" }, 11636285Sbrian { OCTEON_FEATURE_NPEI, "NPEI" }, 11736285Sbrian { OCTEON_FEATURE_ILK, "ILK" }, 11836285Sbrian { OCTEON_FEATURE_HFA, "HFA" }, 11936285Sbrian { OCTEON_FEATURE_DFM, "DFM" }, 12036285Sbrian { OCTEON_FEATURE_CIU2, "CIU2" }, 12136285Sbrian { OCTEON_FEATURE_DICI_MODE, "DICI_MODE" }, 12236285Sbrian { OCTEON_FEATURE_BIT_EXTRACTOR, "BIT_EXTRACTOR" }, 12358028Sbrian { OCTEON_FEATURE_NAND, "NAND" }, 12436285Sbrian { OCTEON_FEATURE_MMC, "MMC" }, 12536285Sbrian { OCTEON_FEATURE_PKND, "PKND" }, 12636285Sbrian { OCTEON_FEATURE_CN68XX_WQE, "CN68XX_WQE" }, 12736285Sbrian { 0, NULL } 12836285Sbrian}; 12936285Sbrian 13036285Sbrianstatic uint64_t octeon_get_ticks(void); 13136285Sbrianstatic unsigned octeon_get_timecount(struct timecounter *tc); 13236285Sbrian 13336285Sbrianstatic void octeon_boot_params_init(register_t ptr); 13436285Sbrian 13536285Sbrianstatic struct timecounter octeon_timecounter = { 13636285Sbrian octeon_get_timecount, /* get_timecount */ 13736285Sbrian 0, /* no poll_pps */ 13836285Sbrian 0xffffffffu, /* octeon_mask */ 13936285Sbrian 0, /* frequency */ 14036285Sbrian "Octeon", /* name */ 14136285Sbrian 900, /* quality (adjusted in code) */ 14236285Sbrian}; 14336285Sbrian 14436285Sbrianvoid 14536285Sbrianplatform_cpu_init() 14636285Sbrian{ 14736285Sbrian /* Nothing special yet */ 14836285Sbrian} 14936285Sbrian 15036285Sbrian/* 15136285Sbrian * Perform a board-level soft-reset. 15236285Sbrian */ 15336285Sbrianvoid 15458028Sbrianplatform_reset(void) 15536285Sbrian{ 15636285Sbrian cvmx_write_csr(CVMX_CIU_SOFT_RST, 1); 15736285Sbrian} 15836285Sbrian 15936285Sbrian/* 16036285Sbrian * octeon_debug_symbol 16136285Sbrian * 16236285Sbrian * Does nothing. 16336285Sbrian * Used to mark the point for simulator to begin tracing 16437011Sbrian */ 16537011Sbrianvoid 16637011Sbrianocteon_debug_symbol(void) 16737011Sbrian{ 16837011Sbrian} 16937011Sbrian 17036285Sbrian/* 17136285Sbrian * octeon_ciu_reset 17236285Sbrian * 17358028Sbrian * Shutdown all CIU to IP2, IP3 mappings 17436285Sbrian */ 17536285Sbrianvoid 17651005Sbrianocteon_ciu_reset(void) 17736285Sbrian{ 17836285Sbrian uint64_t cvmctl; 17936285Sbrian 18036285Sbrian /* Disable all CIU interrupts by default */ 18136285Sbrian cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), 0); 18236285Sbrian cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1), 0); 18336285Sbrian cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), 0); 18436285Sbrian cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2+1), 0); 18536285Sbrian 18636285Sbrian#ifdef SMP 18736285Sbrian /* Enable the MBOX interrupts. */ 18836285Sbrian cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1), 18936285Sbrian (1ull << (OCTEON_IRQ_MBOX0 - 8)) | 19051005Sbrian (1ull << (OCTEON_IRQ_MBOX1 - 8))); 19151005Sbrian#endif 19251005Sbrian 19354914Sbrian /* 19454914Sbrian * Move the Performance Counter interrupt to OCTEON_PMC_IRQ 19551005Sbrian */ 19651005Sbrian cvmctl = mips_rd_cvmctl(); 19736285Sbrian cvmctl &= ~(7 << 7); 19836314Sbrian cvmctl |= (OCTEON_PMC_IRQ + 2) << 7; 19937386Sbrian mips_wr_cvmctl(cvmctl); 20037386Sbrian} 20136285Sbrian 20236285Sbrianstatic void 20336285Sbrianocteon_memory_init(void) 20436285Sbrian{ 20536285Sbrian vm_paddr_t phys_end; 20636285Sbrian int64_t addr; 20736285Sbrian unsigned i, j; 20836285Sbrian 20936285Sbrian phys_end = round_page(MIPS_KSEG0_TO_PHYS((vm_offset_t)&end)); 21036285Sbrian 21136285Sbrian if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) { 21236285Sbrian /* Simulator we limit to 96 meg */ 21336285Sbrian phys_avail[0] = phys_end; 21436285Sbrian phys_avail[1] = 96 << 20; 21536285Sbrian 21636285Sbrian dump_avail[0] = phys_avail[0]; 21736285Sbrian dump_avail[1] = phys_avail[1]; 21836285Sbrian 21936285Sbrian realmem = physmem = btoc(phys_avail[1] - phys_avail[0]); 22036285Sbrian return; 22136285Sbrian } 22236285Sbrian 22336285Sbrian /* 22436285Sbrian * Allocate memory from bootmem 1MB at a time and merge 22536285Sbrian * adjacent entries. 22636285Sbrian */ 22736285Sbrian i = 0; 22836285Sbrian while (i < PHYS_AVAIL_ENTRIES) { 22936285Sbrian /* 23036285Sbrian * If there is less than 2MB of memory available in 128-byte 23136285Sbrian * blocks, do not steal any more memory. We need to leave some 23236285Sbrian * memory for the command queues to be allocated out of. 23336285Sbrian */ 23436285Sbrian if (cvmx_bootmem_available_mem(128) < 2 << 20) 23536285Sbrian break; 23637010Sbrian 23736285Sbrian addr = cvmx_bootmem_phy_alloc(1 << 20, phys_end, 23836285Sbrian ~(vm_paddr_t)0, PAGE_SIZE, 0); 23937010Sbrian if (addr == -1) 24036285Sbrian break; 24136285Sbrian 24237019Sbrian /* 24336285Sbrian * The SDK needs to be able to easily map any memory that might 24436285Sbrian * come to it e.g. in the form of an mbuf. Because on !n64 we 24536285Sbrian * can't direct-map some addresses and we don't want to manage 24636285Sbrian * temporary mappings within the SDK, don't feed memory that 24736285Sbrian * can't be direct-mapped to the kernel. 24836285Sbrian */ 24936285Sbrian#if !defined(__mips_n64) 25036285Sbrian if (!MIPS_DIRECT_MAPPABLE(addr + (1 << 20) - 1)) 25136285Sbrian continue; 25236285Sbrian#endif 25336285Sbrian 25436285Sbrian physmem += btoc(1 << 20); 25536285Sbrian 25636285Sbrian if (i > 0 && phys_avail[i - 1] == addr) { 25736285Sbrian phys_avail[i - 1] += 1 << 20; 25836285Sbrian continue; 25936285Sbrian } 26036285Sbrian 26136285Sbrian phys_avail[i + 0] = addr; 26236285Sbrian phys_avail[i + 1] = addr + (1 << 20); 26336285Sbrian 26436285Sbrian i += 2; 26537011Sbrian } 26637011Sbrian 26737011Sbrian for (j = 0; j < i; j++) 26837011Sbrian dump_avail[j] = phys_avail[j]; 26937011Sbrian 27037011Sbrian realmem = physmem; 27137011Sbrian} 27237011Sbrian 27337011Sbrianvoid 27437011Sbrianplatform_start(__register_t a0, __register_t a1, __register_t a2 __unused, 27537011Sbrian __register_t a3) 27637011Sbrian{ 27737011Sbrian const struct octeon_feature_description *ofd; 27837011Sbrian uint64_t platform_counter_freq; 27936285Sbrian 28036285Sbrian mips_postboot_fixup(); 28136285Sbrian 28237019Sbrian /* 28336285Sbrian * Initialize boot parameters so that we can determine things like 28436285Sbrian * which console we shoud use, etc. 28536285Sbrian */ 28636285Sbrian octeon_boot_params_init(a3); 28737010Sbrian 28836285Sbrian /* Initialize pcpu stuff */ 28936285Sbrian mips_pcpu0_init(); 29036285Sbrian mips_timer_early_init(cvmx_sysinfo_get()->cpu_clock_hz); 29136285Sbrian 29236285Sbrian /* Initialize console. */ 29337141Sbrian cninit(); 29458028Sbrian 29536285Sbrian /* 29636285Sbrian * Display information about the board/CPU. 29737019Sbrian */ 29837141Sbrian printf("CPU clock: %uMHz Core Mask: %#x\n", 29936285Sbrian cvmx_sysinfo_get()->cpu_clock_hz / 1000000, 30036285Sbrian cvmx_sysinfo_get()->core_mask); 30136285Sbrian printf("Board Type: %u Revision: %u/%u\n", 30236285Sbrian cvmx_sysinfo_get()->board_type, 30336285Sbrian cvmx_sysinfo_get()->board_rev_major, 30436285Sbrian cvmx_sysinfo_get()->board_rev_minor); 30536285Sbrian printf("MAC address base: %6D (%u configured)\n", 30636285Sbrian cvmx_sysinfo_get()->mac_addr_base, ":", 30736285Sbrian cvmx_sysinfo_get()->mac_addr_count); 30836285Sbrian 30936285Sbrian#if defined(OCTEON_BOARD_CAPK_0100ND) 31036285Sbrian strcpy(cpu_board, "CAPK-0100ND"); 31136285Sbrian if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_CN3010_EVB_HS5) { 31236285Sbrian panic("Compiled for %s, but board type is %s.", cpu_board, 31336285Sbrian cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type)); 31436431Sbrian } 31536431Sbrian#else 31636431Sbrian strcpy(cpu_board, 31736431Sbrian cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type)); 31836431Sbrian#endif 31936431Sbrian printf("Board: %s\n", cpu_board); 32036285Sbrian strcpy(cpu_model, octeon_model_get_string(cvmx_get_proc_id())); 32136285Sbrian printf("Model: %s\n", cpu_model); 32236285Sbrian printf("Serial number: %s\n", cvmx_sysinfo_get()->board_serial_number); 32336285Sbrian 32436285Sbrian octeon_ciu_reset(); 32536285Sbrian /* 32636431Sbrian * XXX 32736285Sbrian * We can certainly parse command line arguments or U-Boot environment 32836285Sbrian * to determine whether to bootverbose / single user / ... I think 32936285Sbrian * stass has patches to add support for loader things to U-Boot even. 33036285Sbrian */ 33136285Sbrian bootverbose = 1; 33236285Sbrian 33371657Sbrian /* 33436285Sbrian * For some reason on the cn38xx simulator ebase register is set to 33536285Sbrian * 0x80001000 at bootup time. Move it back to the default, but 33636285Sbrian * when we move to having support for multiple executives, we need 33736285Sbrian * to rethink this. 33836285Sbrian */ 33936285Sbrian mips_wr_ebase(0x80000000); 34037010Sbrian 34136285Sbrian octeon_memory_init(); 34236285Sbrian init_param1(); 34336285Sbrian init_param2(physmem); 34436285Sbrian mips_cpu_init(); 34536285Sbrian pmap_bootstrap(); 34636285Sbrian mips_proc0_init(); 34736285Sbrian mutex_init(); 34836285Sbrian kdb_init(); 34936285Sbrian#ifdef KDB 35036285Sbrian if (boothowto & RB_KDB) 35136431Sbrian kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); 35236431Sbrian#endif 35336431Sbrian cpu_clock = cvmx_sysinfo_get()->cpu_clock_hz; 35436431Sbrian platform_counter_freq = cpu_clock; 35536431Sbrian octeon_timecounter.tc_frequency = cpu_clock; 35636431Sbrian platform_timecounter = &octeon_timecounter; 35736431Sbrian mips_timer_init_params(platform_counter_freq, 0); 35836431Sbrian set_cputicker(octeon_get_ticks, cpu_clock, 0); 35936431Sbrian 36036431Sbrian#ifdef SMP 36136285Sbrian /* 36236431Sbrian * Clear any pending IPIs. 36336431Sbrian */ 36436431Sbrian cvmx_write_csr(CVMX_CIU_MBOX_CLRX(0), 0xffffffff); 36536285Sbrian#endif 36636285Sbrian 36736285Sbrian printf("Octeon SDK: %s\n", OCTEON_SDK_VERSION_STRING); 36836285Sbrian printf("Available Octeon features:"); 36936285Sbrian for (ofd = octeon_feature_descriptions; ofd->ofd_string != NULL; ofd++) 37036285Sbrian if (octeon_has_feature(ofd->ofd_feature)) 37136285Sbrian printf(" %s", ofd->ofd_string); 37237011Sbrian printf("\n"); 37336285Sbrian} 37437011Sbrian 37536285Sbrianstatic uint64_t 37636285Sbrianocteon_get_ticks(void) 37736285Sbrian{ 37836285Sbrian uint64_t cvmcount; 37936285Sbrian 38036285Sbrian CVMX_MF_CYCLE(cvmcount); 38136285Sbrian return (cvmcount); 38236285Sbrian} 38337011Sbrian 38437011Sbrianstatic unsigned 38537011Sbrianocteon_get_timecount(struct timecounter *tc) 38637011Sbrian{ 38737011Sbrian return ((unsigned)octeon_get_ticks()); 38837011Sbrian} 38937011Sbrian 39045264Sbrianstatic int 39145264Sbriansysctl_machdep_led_display(SYSCTL_HANDLER_ARGS) 39237011Sbrian{ 39337011Sbrian size_t buflen; 39437011Sbrian char buf[9]; 39537011Sbrian int error; 39637011Sbrian 39737011Sbrian if (req->newptr == NULL) 39837011Sbrian return (EINVAL); 39937011Sbrian 40036285Sbrian if (cvmx_sysinfo_get()->led_display_base_addr == 0) 40136285Sbrian return (ENODEV); 40236285Sbrian 40336285Sbrian /* 40436285Sbrian * Revision 1.x of the EBT3000 only supports 4 characters, but 40536285Sbrian * other devices support 8. 40636285Sbrian */ 40736285Sbrian if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 && 40836285Sbrian cvmx_sysinfo_get()->board_rev_major == 1) 40936285Sbrian buflen = 4; 41036285Sbrian else 41136285Sbrian buflen = 8; 41236285Sbrian 41336285Sbrian if (req->newlen > buflen) 41436285Sbrian return (E2BIG); 41536285Sbrian 41636285Sbrian error = SYSCTL_IN(req, buf, req->newlen); 41736285Sbrian if (error != 0) 41836285Sbrian return (error); 41936285Sbrian 42036285Sbrian buf[req->newlen] = '\0'; 42136285Sbrian ebt3000_str_write(buf); 42236285Sbrian 42336285Sbrian return (0); 42436285Sbrian} 42536285Sbrian 42636285SbrianSYSCTL_PROC(_machdep, OID_AUTO, led_display, CTLTYPE_STRING | CTLFLAG_WR, 42736285Sbrian NULL, 0, sysctl_machdep_led_display, "A", 42836285Sbrian "String to display on LED display"); 42936285Sbrian 43036285Sbrian/** 43136285Sbrian * version of printf that works better in exception context. 43236285Sbrian * 43336285Sbrian * @param format 43436285Sbrian * 43536285Sbrian * XXX If this function weren't in cvmx-interrupt.c, we'd use the SDK version. 43636285Sbrian */ 43736285Sbrianvoid cvmx_safe_printf(const char *format, ...) 43836285Sbrian{ 43936285Sbrian char buffer[256]; 44036285Sbrian char *ptr = buffer; 44136285Sbrian int count; 44236285Sbrian va_list args; 44336285Sbrian 44436285Sbrian va_start(args, format); 44536285Sbrian#ifndef __U_BOOT__ 44636285Sbrian count = vsnprintf(buffer, sizeof(buffer), format, args); 44736285Sbrian#else 44836285Sbrian count = vsprintf(buffer, format, args); 44936285Sbrian#endif 45036285Sbrian va_end(args); 45136285Sbrian 45236285Sbrian while (count-- > 0) 45336285Sbrian { 45436285Sbrian cvmx_uart_lsr_t lsrval; 45536285Sbrian 45636285Sbrian /* Spin until there is room */ 45736285Sbrian do 45836285Sbrian { 45936285Sbrian lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(0)); 46036285Sbrian#if !defined(CONFIG_OCTEON_SIM_SPEED) 46136285Sbrian if (lsrval.s.temt == 0) 46236285Sbrian cvmx_wait(10000); /* Just to reduce the load on the system */ 46336285Sbrian#endif 46436285Sbrian } 46536285Sbrian while (lsrval.s.temt == 0); 46636285Sbrian 46736285Sbrian if (*ptr == '\n') 46836285Sbrian cvmx_write_csr(CVMX_MIO_UARTX_THR(0), '\r'); 46936285Sbrian cvmx_write_csr(CVMX_MIO_UARTX_THR(0), *ptr++); 47036285Sbrian } 47136285Sbrian} 47236285Sbrian 47336285Sbrian/* impSTART: This stuff should move back into the Cavium SDK */ 47436285Sbrian/* 47536285Sbrian **************************************************************************************** 47636285Sbrian * 47736285Sbrian * APP/BOOT DESCRIPTOR STUFF 47836285Sbrian * 47936285Sbrian **************************************************************************************** 48036285Sbrian */ 48136285Sbrian 48236285Sbrian/* Define the struct that is initialized by the bootloader used by the 48336285Sbrian * startup code. 48436285Sbrian * 48536285Sbrian * Copyright (c) 2004, 2005, 2006 Cavium Networks. 48636285Sbrian * 48736285Sbrian * The authors hereby grant permission to use, copy, modify, distribute, 48836285Sbrian * and license this software and its documentation for any purpose, provided 48936285Sbrian * that existing copyright notices are retained in all copies and that this 49036285Sbrian * notice is included verbatim in any distributions. No written agreement, 49136285Sbrian * license, or royalty fee is required for any of the authorized uses. 49236285Sbrian * Modifications to this software may be copyrighted by their authors 49336285Sbrian * and need not follow the licensing terms described here, provided that 49436285Sbrian * the new terms are clearly indicated on the first page of each file where 49536285Sbrian * they apply. 49636285Sbrian */ 49736285Sbrian 49836285Sbrian#define OCTEON_CURRENT_DESC_VERSION 6 49936285Sbrian#define OCTEON_ARGV_MAX_ARGS (64) 50036285Sbrian#define OCTOEN_SERIAL_LEN 20 50136285Sbrian 50236285Sbriantypedef struct { 50336285Sbrian /* Start of block referenced by assembly code - do not change! */ 50436285Sbrian uint32_t desc_version; 50536285Sbrian uint32_t desc_size; 50636285Sbrian 50736285Sbrian uint64_t stack_top; 50836285Sbrian uint64_t heap_base; 50936285Sbrian uint64_t heap_end; 51036285Sbrian uint64_t entry_point; /* Only used by bootloader */ 51136285Sbrian uint64_t desc_vaddr; 51236285Sbrian /* End of This block referenced by assembly code - do not change! */ 51336285Sbrian 51436285Sbrian uint32_t exception_base_addr; 51536285Sbrian uint32_t stack_size; 51636285Sbrian uint32_t heap_size; 51736285Sbrian uint32_t argc; /* Argc count for application */ 51836285Sbrian uint32_t argv[OCTEON_ARGV_MAX_ARGS]; 51936285Sbrian uint32_t flags; 52036285Sbrian uint32_t core_mask; 52171657Sbrian uint32_t dram_size; /**< DRAM size in megabyes */ 52236285Sbrian uint32_t phy_mem_desc_addr; /**< physical address of free memory descriptor block*/ 52336285Sbrian uint32_t debugger_flags_base_addr; /**< used to pass flags from app to debugger */ 52436285Sbrian uint32_t eclock_hz; /**< CPU clock speed, in hz */ 52536285Sbrian uint32_t dclock_hz; /**< DRAM clock speed, in hz */ 52636285Sbrian uint32_t spi_clock_hz; /**< SPI4 clock in hz */ 52736285Sbrian uint16_t board_type; 52836285Sbrian uint8_t board_rev_major; 52936285Sbrian uint8_t board_rev_minor; 53036285Sbrian uint16_t chip_type; 53136285Sbrian uint8_t chip_rev_major; 53236285Sbrian uint8_t chip_rev_minor; 53336285Sbrian char board_serial_number[OCTOEN_SERIAL_LEN]; 53436285Sbrian uint8_t mac_addr_base[6]; 53536285Sbrian uint8_t mac_addr_count; 53636285Sbrian uint64_t cvmx_desc_vaddr; 53736285Sbrian} octeon_boot_descriptor_t; 53836285Sbrian 53936285Sbrianstatic cvmx_bootinfo_t * 54036285Sbrianocteon_process_app_desc_ver_6(octeon_boot_descriptor_t *app_desc_ptr) 54136285Sbrian{ 54236285Sbrian cvmx_bootinfo_t *octeon_bootinfo; 54336285Sbrian 54436285Sbrian /* XXX Why is 0x00000000ffffffffULL a bad value? */ 54536314Sbrian if (app_desc_ptr->cvmx_desc_vaddr == 0 || 54636285Sbrian app_desc_ptr->cvmx_desc_vaddr == 0xfffffffful) { 54736285Sbrian cvmx_safe_printf("Bad octeon_bootinfo %#jx\n", 54836285Sbrian (uintmax_t)app_desc_ptr->cvmx_desc_vaddr); 54936285Sbrian return (NULL); 55036285Sbrian } 55136285Sbrian 55236285Sbrian octeon_bootinfo = cvmx_phys_to_ptr(app_desc_ptr->cvmx_desc_vaddr); 55336285Sbrian if (octeon_bootinfo->major_version != 1) { 55436285Sbrian cvmx_safe_printf("Incompatible CVMX descriptor from bootloader: %d.%d %p\n", 55536285Sbrian (int) octeon_bootinfo->major_version, 55636285Sbrian (int) octeon_bootinfo->minor_version, octeon_bootinfo); 55736285Sbrian return (NULL); 55836285Sbrian } 55936285Sbrian 56036314Sbrian cvmx_sysinfo_minimal_initialize(octeon_bootinfo->phy_mem_desc_addr, 56136285Sbrian octeon_bootinfo->board_type, 56236285Sbrian octeon_bootinfo->board_rev_major, 563 octeon_bootinfo->board_rev_minor, 564 octeon_bootinfo->eclock_hz); 565 memcpy(cvmx_sysinfo_get()->mac_addr_base, 566 octeon_bootinfo->mac_addr_base, 6); 567 cvmx_sysinfo_get()->mac_addr_count = octeon_bootinfo->mac_addr_count; 568 cvmx_sysinfo_get()->compact_flash_common_base_addr = 569 octeon_bootinfo->compact_flash_common_base_addr; 570 cvmx_sysinfo_get()->compact_flash_attribute_base_addr = 571 octeon_bootinfo->compact_flash_attribute_base_addr; 572 cvmx_sysinfo_get()->core_mask = octeon_bootinfo->core_mask; 573 cvmx_sysinfo_get()->led_display_base_addr = 574 octeon_bootinfo->led_display_base_addr; 575 memcpy(cvmx_sysinfo_get()->board_serial_number, 576 octeon_bootinfo->board_serial_number, 577 sizeof cvmx_sysinfo_get()->board_serial_number); 578 return (octeon_bootinfo); 579} 580 581static void 582octeon_boot_params_init(register_t ptr) 583{ 584 octeon_boot_descriptor_t *app_desc_ptr; 585 cvmx_bootinfo_t *octeon_bootinfo; 586 587 if (ptr == 0 || ptr >= MAX_APP_DESC_ADDR) { 588 cvmx_safe_printf("app descriptor passed at invalid address %#jx\n", 589 (uintmax_t)ptr); 590 platform_reset(); 591 } 592 593 app_desc_ptr = (octeon_boot_descriptor_t *)(intptr_t)ptr; 594 if (app_desc_ptr->desc_version < 6) { 595 cvmx_safe_printf("Your boot code is too old to be supported.\n"); 596 platform_reset(); 597 } 598 octeon_bootinfo = octeon_process_app_desc_ver_6(app_desc_ptr); 599 if (octeon_bootinfo == NULL) { 600 cvmx_safe_printf("Could not parse boot descriptor.\n"); 601 platform_reset(); 602 } 603 604 if (cvmx_sysinfo_get()->led_display_base_addr != 0) { 605 /* 606 * Revision 1.x of the EBT3000 only supports 4 characters, but 607 * other devices support 8. 608 */ 609 if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 && 610 cvmx_sysinfo_get()->board_rev_major == 1) 611 ebt3000_str_write("FBSD"); 612 else 613 ebt3000_str_write("FreeBSD!"); 614 } 615 616 if (cvmx_sysinfo_get()->phy_mem_desc_addr == (uint64_t)0) { 617 cvmx_safe_printf("Your boot loader did not supply a memory descriptor.\n"); 618 platform_reset(); 619 } 620 cvmx_bootmem_init(cvmx_sysinfo_get()->phy_mem_desc_addr); 621 622 octeon_feature_init(); 623 624 __cvmx_helper_cfg_init(); 625} 626/* impEND: This stuff should move back into the Cavium SDK */ 627