ethernet.c revision 217210
1/*************************************************************************
2Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
3reserved.
4
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are
8met:
9
10    * Redistributions of source code must retain the above copyright
11      notice, this list of conditions and the following disclaimer.
12
13    * Redistributions in binary form must reproduce the above
14      copyright notice, this list of conditions and the following
15      disclaimer in the documentation and/or other materials provided
16      with the distribution.
17
18    * Neither the name of Cavium Networks nor the names of
19      its contributors may be used to endorse or promote products
20      derived from this software without specific prior written
21      permission.
22
23This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
24
25TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
26AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
27*************************************************************************/
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: head/sys/mips/cavium/octe/ethernet.c 217210 2011-01-09 23:05:46Z jmallett $");
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/bus.h>
35#include <sys/conf.h>
36#include <sys/endian.h>
37#include <sys/kernel.h>
38#include <sys/rman.h>
39#include <sys/mbuf.h>
40#include <sys/socket.h>
41#include <sys/module.h>
42#include <sys/smp.h>
43#include <sys/taskqueue.h>
44
45#include <net/ethernet.h>
46#include <net/if.h>
47#include <net/if_types.h>
48
49#include "wrapper-cvmx-includes.h"
50#include "ethernet-headers.h"
51
52#include "octebusvar.h"
53
54/*
55 * XXX/juli
56 * Convert 0444 to tunables, 0644 to sysctls.
57 */
58#if defined(CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS) && CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS
59int num_packet_buffers = CONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS;
60#else
61int num_packet_buffers = 1024;
62#endif
63TUNABLE_INT("hw.octe.num_packet_buffers", &num_packet_buffers);
64/*
65		 "\t\tNumber of packet buffers to allocate and store in the\n"
66		 "\t\tFPA. By default, 1024 packet buffers are used unless\n"
67		 "\t\tCONFIG_CAVIUM_OCTEON_NUM_PACKET_BUFFERS is defined." */
68
69int pow_receive_group = 15;
70TUNABLE_INT("hw.octe.pow_receive_group", &pow_receive_group);
71/*
72		 "\t\tPOW group to receive packets from. All ethernet hardware\n"
73		 "\t\twill be configured to send incomming packets to this POW\n"
74		 "\t\tgroup. Also any other software can submit packets to this\n"
75		 "\t\tgroup for the kernel to process." */
76
77extern int octeon_is_simulation(void);
78
79/**
80 * Exported from the kernel so we can determine board information. It is
81 * passed by the bootloader to the kernel.
82 */
83extern cvmx_bootinfo_t *octeon_bootinfo;
84
85/**
86 * Periodic timer to check auto negotiation
87 */
88static struct callout cvm_oct_poll_timer;
89
90/**
91 * Array of every ethernet device owned by this driver indexed by
92 * the ipd input port number.
93 */
94struct ifnet *cvm_oct_device[TOTAL_NUMBER_OF_PORTS];
95
96/**
97 * Task to handle link status changes.
98 */
99static struct taskqueue *cvm_oct_link_taskq;
100
101/**
102 * Function to update link status.
103 */
104static void cvm_oct_update_link(void *context, int pending)
105{
106	cvm_oct_private_t *priv = (cvm_oct_private_t *)context;
107	struct ifnet *ifp = priv->ifp;
108	cvmx_helper_link_info_t link_info;
109
110	link_info.u64 = priv->link_info;
111
112	if (link_info.s.link_up) {
113		if_link_state_change(ifp, LINK_STATE_UP);
114		DEBUGPRINT("%s: %u Mbps %s duplex, port %2d, queue %2d\n",
115			   if_name(ifp), link_info.s.speed,
116			   (link_info.s.full_duplex) ? "Full" : "Half",
117			   priv->port, priv->queue);
118	} else {
119		if_link_state_change(ifp, LINK_STATE_DOWN);
120		DEBUGPRINT("%s: Link down\n", if_name(ifp));
121	}
122	priv->need_link_update = 0;
123}
124
125/**
126 * Periodic timer tick for slow management operations
127 *
128 * @param arg    Device to check
129 */
130static void cvm_do_timer(void *arg)
131{
132	static int port;
133	static int updated;
134	if (port < CVMX_PIP_NUM_INPUT_PORTS) {
135		if (cvm_oct_device[port]) {
136			int queues_per_port;
137			int qos;
138			cvm_oct_private_t *priv = (cvm_oct_private_t *)cvm_oct_device[port]->if_softc;
139
140			cvm_oct_common_poll(priv->ifp);
141			if (priv->need_link_update) {
142				updated++;
143				taskqueue_enqueue(cvm_oct_link_taskq, &priv->link_task);
144			}
145
146			queues_per_port = cvmx_pko_get_num_queues(port);
147			/* Drain any pending packets in the free list */
148			for (qos = 0; qos < queues_per_port; qos++) {
149				if (_IF_QLEN(&priv->tx_free_queue[qos]) > 0) {
150					IF_LOCK(&priv->tx_free_queue[qos]);
151					while (_IF_QLEN(&priv->tx_free_queue[qos]) > cvmx_fau_fetch_and_add32(priv->fau+qos*4, 0)) {
152						struct mbuf *m;
153
154						_IF_DEQUEUE(&priv->tx_free_queue[qos], m);
155						m_freem(m);
156					}
157					IF_UNLOCK(&priv->tx_free_queue[qos]);
158
159					/*
160					 * XXX locking!
161					 */
162					priv->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
163				}
164			}
165		}
166		port++;
167		/* Poll the next port in a 50th of a second.
168		   This spreads the polling of ports out a little bit */
169		callout_reset(&cvm_oct_poll_timer, hz / 50, cvm_do_timer, NULL);
170	} else {
171		port = 0;
172		/* If any updates were made in this run, continue iterating at
173		 * 1/50th of a second, so that if a link has merely gone down
174		 * temporarily (e.g. because of interface reinitialization) it
175		 * will not be forced to stay down for an entire second.
176		 */
177		if (updated > 0) {
178			updated = 0;
179			callout_reset(&cvm_oct_poll_timer, hz / 50, cvm_do_timer, NULL);
180		} else {
181			/* All ports have been polled. Start the next iteration through
182			   the ports in one second */
183			callout_reset(&cvm_oct_poll_timer, hz, cvm_do_timer, NULL);
184		}
185	}
186}
187
188
189/**
190 * Configure common hardware for all interfaces
191 */
192static void cvm_oct_configure_common_hw(device_t bus)
193{
194	struct octebus_softc *sc;
195	int error;
196	int rid;
197
198        sc = device_get_softc(bus);
199
200	/* Setup the FPA */
201	cvmx_fpa_enable();
202	cvm_oct_mem_fill_fpa(CVMX_FPA_PACKET_POOL, CVMX_FPA_PACKET_POOL_SIZE, num_packet_buffers);
203	cvm_oct_mem_fill_fpa(CVMX_FPA_WQE_POOL, CVMX_FPA_WQE_POOL_SIZE, num_packet_buffers);
204	if (CVMX_FPA_OUTPUT_BUFFER_POOL != CVMX_FPA_PACKET_POOL)
205		cvm_oct_mem_fill_fpa(CVMX_FPA_OUTPUT_BUFFER_POOL, CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE, 128);
206
207	if (USE_RED)
208		cvmx_helper_setup_red(num_packet_buffers/4, num_packet_buffers/8);
209
210	/* Enable the MII interface */
211	if (!octeon_is_simulation())
212		cvmx_write_csr(CVMX_SMI_EN, 1);
213
214	/* Register an IRQ hander for to receive POW interrupts */
215        rid = 0;
216        sc->sc_rx_irq = bus_alloc_resource(bus, SYS_RES_IRQ, &rid,
217					   CVMX_IRQ_WORKQ0 + pow_receive_group,
218					   CVMX_IRQ_WORKQ0 + pow_receive_group,
219					   1, RF_ACTIVE);
220        if (sc->sc_rx_irq == NULL) {
221                device_printf(bus, "could not allocate workq irq");
222		return;
223        }
224
225        error = bus_setup_intr(bus, sc->sc_rx_irq, INTR_TYPE_NET | INTR_MPSAFE,
226			       cvm_oct_do_interrupt, NULL, cvm_oct_device,
227			       NULL);
228        if (error != 0) {
229                device_printf(bus, "could not setup workq irq");
230		return;
231        }
232
233
234#ifdef SMP
235	if (USE_MULTICORE_RECEIVE) {
236		critical_enter();
237		{
238			cvmx_ciu_intx0_t en;
239			int core;
240
241			CPU_FOREACH(core) {
242				if (core == PCPU_GET(cpuid))
243					continue;
244
245				en.u64 = cvmx_read_csr(CVMX_CIU_INTX_EN0(core*2));
246				en.s.workq |= (1<<pow_receive_group);
247				cvmx_write_csr(CVMX_CIU_INTX_EN0(core*2), en.u64);
248			}
249		}
250		critical_exit();
251	}
252#endif
253}
254
255
256/**
257 * Free a work queue entry received in a intercept callback.
258 *
259 * @param work_queue_entry
260 *               Work queue entry to free
261 * @return Zero on success, Negative on failure.
262 */
263int cvm_oct_free_work(void *work_queue_entry)
264{
265	cvmx_wqe_t *work = work_queue_entry;
266
267	int segments = work->word2.s.bufs;
268	cvmx_buf_ptr_t segment_ptr = work->packet_ptr;
269
270	while (segments--) {
271		cvmx_buf_ptr_t next_ptr = *(cvmx_buf_ptr_t *)cvmx_phys_to_ptr(segment_ptr.s.addr-8);
272		if (__predict_false(!segment_ptr.s.i))
273			cvmx_fpa_free(cvm_oct_get_buffer_ptr(segment_ptr), segment_ptr.s.pool, DONT_WRITEBACK(CVMX_FPA_PACKET_POOL_SIZE/128));
274		segment_ptr = next_ptr;
275	}
276	cvmx_fpa_free(work, CVMX_FPA_WQE_POOL, DONT_WRITEBACK(1));
277
278	return 0;
279}
280
281
282/**
283 * Module/ driver initialization. Creates the linux network
284 * devices.
285 *
286 * @return Zero on success
287 */
288int cvm_oct_init_module(device_t bus)
289{
290	device_t dev;
291	int ifnum;
292	int num_interfaces;
293	int interface;
294	int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE;
295	int qos;
296
297	printf("cavium-ethernet: %s\n", OCTEON_SDK_VERSION_STRING);
298
299	cvm_oct_rx_initialize();
300	cvm_oct_configure_common_hw(bus);
301
302	cvmx_helper_initialize_packet_io_global();
303
304	/* Change the input group for all ports before input is enabled */
305	num_interfaces = cvmx_helper_get_number_of_interfaces();
306	for (interface = 0; interface < num_interfaces; interface++) {
307		int num_ports = cvmx_helper_ports_on_interface(interface);
308		int port;
309
310		for (port = cvmx_helper_get_ipd_port(interface, 0); port < cvmx_helper_get_ipd_port(interface, num_ports); port++) {
311			cvmx_pip_prt_tagx_t pip_prt_tagx;
312			pip_prt_tagx.u64 = cvmx_read_csr(CVMX_PIP_PRT_TAGX(port));
313			pip_prt_tagx.s.grp = pow_receive_group;
314			cvmx_write_csr(CVMX_PIP_PRT_TAGX(port), pip_prt_tagx.u64);
315		}
316	}
317
318	cvmx_helper_ipd_and_packet_input_enable();
319
320	memset(cvm_oct_device, 0, sizeof(cvm_oct_device));
321
322	cvm_oct_link_taskq = taskqueue_create("octe link", M_NOWAIT,
323	    taskqueue_thread_enqueue, &cvm_oct_link_taskq);
324	taskqueue_start_threads(&cvm_oct_link_taskq, 1, PI_NET,
325	    "octe link taskq");
326
327	/* Initialize the FAU used for counting packet buffers that need to be freed */
328	cvmx_fau_atomic_write32(FAU_NUM_PACKET_BUFFERS_TO_FREE, 0);
329
330	ifnum = 0;
331	num_interfaces = cvmx_helper_get_number_of_interfaces();
332	for (interface = 0; interface < num_interfaces; interface++) {
333		cvmx_helper_interface_mode_t imode = cvmx_helper_interface_get_mode(interface);
334		int num_ports = cvmx_helper_ports_on_interface(interface);
335		int port;
336
337		for (port = cvmx_helper_get_ipd_port(interface, 0); port < cvmx_helper_get_ipd_port(interface, num_ports); port++) {
338			cvm_oct_private_t *priv;
339			struct ifnet *ifp;
340
341			dev = BUS_ADD_CHILD(bus, 0, "octe", ifnum++);
342			if (dev != NULL)
343				ifp = if_alloc(IFT_ETHER);
344			if (dev == NULL || ifp == NULL) {
345				printf("\t\tFailed to allocate ethernet device for port %d\n", port);
346				continue;
347			}
348
349			/* Initialize the device private structure. */
350			device_probe(dev);
351			priv = device_get_softc(dev);
352			priv->dev = dev;
353			priv->ifp = ifp;
354			priv->imode = imode;
355			priv->port = port;
356			priv->queue = cvmx_pko_get_base_queue(priv->port);
357			priv->fau = fau - cvmx_pko_get_num_queues(port) * 4;
358			for (qos = 0; qos < cvmx_pko_get_num_queues(port); qos++)
359				cvmx_fau_atomic_write32(priv->fau+qos*4, 0);
360			TASK_INIT(&priv->link_task, 0, cvm_oct_update_link, priv);
361
362			switch (priv->imode) {
363
364			/* These types don't support ports to IPD/PKO */
365			case CVMX_HELPER_INTERFACE_MODE_DISABLED:
366			case CVMX_HELPER_INTERFACE_MODE_PCIE:
367			case CVMX_HELPER_INTERFACE_MODE_PICMG:
368				break;
369
370			case CVMX_HELPER_INTERFACE_MODE_NPI:
371				priv->init = cvm_oct_common_init;
372				priv->uninit = cvm_oct_common_uninit;
373				device_set_desc(dev, "Cavium Octeon NPI Ethernet");
374				break;
375
376			case CVMX_HELPER_INTERFACE_MODE_XAUI:
377				priv->init = cvm_oct_xaui_init;
378				priv->uninit = cvm_oct_common_uninit;
379				device_set_desc(dev, "Cavium Octeon XAUI Ethernet");
380				break;
381
382			case CVMX_HELPER_INTERFACE_MODE_LOOP:
383				priv->init = cvm_oct_common_init;
384				priv->uninit = cvm_oct_common_uninit;
385				device_set_desc(dev, "Cavium Octeon LOOP Ethernet");
386				break;
387
388			case CVMX_HELPER_INTERFACE_MODE_SGMII:
389				priv->init = cvm_oct_sgmii_init;
390				priv->uninit = cvm_oct_common_uninit;
391				device_set_desc(dev, "Cavium Octeon SGMII Ethernet");
392				break;
393
394			case CVMX_HELPER_INTERFACE_MODE_SPI:
395				priv->init = cvm_oct_spi_init;
396				priv->uninit = cvm_oct_spi_uninit;
397				device_set_desc(dev, "Cavium Octeon SPI Ethernet");
398				break;
399
400			case CVMX_HELPER_INTERFACE_MODE_RGMII:
401				priv->init = cvm_oct_rgmii_init;
402				priv->uninit = cvm_oct_rgmii_uninit;
403				device_set_desc(dev, "Cavium Octeon RGMII Ethernet");
404				break;
405
406			case CVMX_HELPER_INTERFACE_MODE_GMII:
407				priv->init = cvm_oct_rgmii_init;
408				priv->uninit = cvm_oct_rgmii_uninit;
409				device_set_desc(dev, "Cavium Octeon GMII Ethernet");
410				break;
411			}
412
413			ifp->if_softc = priv;
414
415			if (!priv->init) {
416				panic("%s: unsupported device type, need to free ifp.", __func__);
417			} else
418			if (priv->init(ifp) < 0) {
419				printf("\t\tFailed to register ethernet device for interface %d, port %d\n",
420				interface, priv->port);
421				panic("%s: init failed, need to free ifp.", __func__);
422			} else {
423				cvm_oct_device[priv->port] = ifp;
424				fau -= cvmx_pko_get_num_queues(priv->port) * sizeof(uint32_t);
425			}
426		}
427	}
428
429	if (INTERRUPT_LIMIT) {
430		/* Set the POW timer rate to give an interrupt at most INTERRUPT_LIMIT times per second */
431		cvmx_write_csr(CVMX_POW_WQ_INT_PC, octeon_bootinfo->eclock_hz/(INTERRUPT_LIMIT*16*256)<<8);
432
433		/* Enable POW timer interrupt. It will count when there are packets available */
434		cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0x1ful<<24);
435	} else {
436		/* Enable POW interrupt when our port has at least one packet */
437		cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0x1001);
438	}
439
440	callout_init(&cvm_oct_poll_timer, CALLOUT_MPSAFE);
441	callout_reset(&cvm_oct_poll_timer, hz, cvm_do_timer, NULL);
442
443	return 0;
444}
445
446
447/**
448 * Module / driver shutdown
449 *
450 * @return Zero on success
451 */
452void cvm_oct_cleanup_module(void)
453{
454	int port;
455
456	/* Disable POW interrupt */
457	cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), 0);
458
459#if 0
460	/* Free the interrupt handler */
461	free_irq(8 + pow_receive_group, cvm_oct_device);
462#endif
463
464	callout_stop(&cvm_oct_poll_timer);
465	cvm_oct_rx_shutdown();
466
467	cvmx_helper_shutdown_packet_io_global();
468
469	/* Free the ethernet devices */
470	for (port = 0; port < TOTAL_NUMBER_OF_PORTS; port++) {
471		if (cvm_oct_device[port]) {
472			cvm_oct_tx_shutdown(cvm_oct_device[port]);
473#if 0
474			unregister_netdev(cvm_oct_device[port]);
475			kfree(cvm_oct_device[port]);
476#else
477			panic("%s: need to detach and free interface.", __func__);
478#endif
479			cvm_oct_device[port] = NULL;
480		}
481	}
482}
483