uart_cpu_ar71xx.c revision 187462
1148330Snetchild/*-
2148330Snetchild * Copyright (c) 2009 Oleksandr Tymoshenko
3148330Snetchild * All rights reserved.
4148330Snetchild *
5148330Snetchild * Redistribution and use in source and binary forms, with or without
6148330Snetchild * modification, are permitted provided that the following conditions
7148330Snetchild * are met:
8148330Snetchild * 1. Redistributions of source code must retain the above copyright
9148330Snetchild *    notice, this list of conditions and the following disclaimer.
10148330Snetchild * 2. Redistributions in binary form must reproduce the above copyright
11148330Snetchild *    notice, this list of conditions and the following disclaimer in the
12148330Snetchild *    documentation and/or other materials provided with the distribution.
13148330Snetchild *
14148543Snetchild * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15148543Snetchild * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16148330Snetchild * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17202215Sed * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18202216Sed * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19202216Sed * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20202216Sed * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21202215Sed * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22202215Sed * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23202215Sed * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24202215Sed * SUCH DAMAGE.
25202215Sed *
26202215Sed */
27202215Sed#include "opt_uart.h"
28202216Sed
29201546Sdavidxu#include <sys/cdefs.h>
30201546Sdavidxu__FBSDID("$FreeBSD$");
31201447Santoine
32201447Santoine#include <sys/param.h>
33201447Santoine#include <sys/systm.h>
34201213Strasz#include <sys/bus.h>
35201213Strasz
36201213Strasz#include <machine/bus.h>
37201213Strasz
38201213Strasz#include <dev/uart/uart.h>
39201213Strasz#include <dev/uart/uart_cpu.h>
40201213Strasz
41201213Strasz#include <mips/atheros/ar71xxreg.h>
42201213Strasz
43201213Straszbus_space_tag_t uart_bus_space_io;
44201213Straszbus_space_tag_t uart_bus_space_mem;
45201213Strasz
46201213Straszint
47201213Straszuart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
48201213Strasz{
49201213Strasz	return ((b1->bsh == b2->bsh && b1->bst == b2->bst) ? 1 : 0);
50201213Strasz}
51201213Strasz
52201213Straszint
53201213Straszuart_cpu_getdev(int devtype, struct uart_devinfo *di)
54201213Strasz{
55201213Strasz	di->ops = uart_getops(&uart_ns8250_class);
56201213Strasz	di->bas.chan = 0;
57200028Sume	di->bas.bst = 0;
58200028Sume	di->bas.regshft = 2;
59200028Sume	/* TODO: calculate proper AHB freq using PLL registers */
60200130Santoine	di->bas.rclk = 85000000;
61199463Sdelphij	di->baudrate = 115200;
62199463Sdelphij	di->databits = 8;
63200130Santoine	di->stopbits = 1;
64200130Santoine	di->parity = UART_PARITY_NONE;
65198538Skib
66198538Skib	/* Bad MIPS, no IO for MIPS */
67198443Santoine	uart_bus_space_io = 0;
68198443Santoine	uart_bus_space_mem = MIPS_PHYS_TO_KSEG1(ATH_UART_ADDR) + 3;
69198443Santoine	di->bas.bsh = MIPS_PHYS_TO_KSEG1(ATH_UART_ADDR) + 3;
70197081Sdelphij	return (0);
71197081Sdelphij}
72197081Sdelphij