ar933x_uart.h revision 248866
1/*- 2 * Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/mips/atheros/ar933x_uart.h 248866 2013-03-29 06:32:02Z adrian $ 27 */ 28 29/* 30 * Atheros AR933x SoC UART registers 31 */ 32#ifndef __AR933X_UART_H__ 33#define __AR933X_UART_H__ 34 35#define AR933X_UART_REGS_SIZE 20 36#define AR933X_UART_FIFO_SIZE 16 37 38#define AR933X_UART_DATA_REG 0x00 39#define AR933X_UART_CS_REG 0x04 40#define AR933X_UART_CLOCK_REG 0x08 41#define AR933X_UART_INT_REG 0x0c 42#define AR933X_UART_INT_EN_REG 0x10 43 44#define AR933X_UART_DATA_TX_RX_MASK 0xff 45#define AR933X_UART_DATA_RX_CSR (1 << 8) 46#define AR933X_UART_DATA_TX_CSR (1 << 9) 47 48#define AR933X_UART_CS_PARITY_S 0 49#define AR933X_UART_CS_PARITY_M 0x3 50#define AR933X_UART_CS_PARITY_NONE 0 51#define AR933X_UART_CS_PARITY_ODD 1 52#define AR933X_UART_CS_PARITY_EVEN 2 53#define AR933X_UART_CS_IF_MODE_S 2 54#define AR933X_UART_CS_IF_MODE_M 0x3 55#define AR933X_UART_CS_IF_MODE_NONE 0 56#define AR933X_UART_CS_IF_MODE_DTE 1 57#define AR933X_UART_CS_IF_MODE_DCE 2 58#define AR933X_UART_CS_FLOW_CTRL_S 4 59#define AR933X_UART_CS_FLOW_CTRL_M 0x3 60#define AR933X_UART_CS_DMA_EN (1 << 6) 61#define AR933X_UART_CS_TX_READY_ORIDE (1 << 7) 62#define AR933X_UART_CS_RX_READY_ORIDE (1 << 8) 63#define AR933X_UART_CS_TX_READY (1 << 9) 64#define AR933X_UART_CS_RX_BREAK (1 << 10) 65#define AR933X_UART_CS_TX_BREAK (1 << 11) 66#define AR933X_UART_CS_HOST_INT (1 << 12) 67#define AR933X_UART_CS_HOST_INT_EN (1 << 13) 68#define AR933X_UART_CS_TX_BUSY (1 << 14) 69#define AR933X_UART_CS_RX_BUSY (1 << 15) 70 71#define AR933X_UART_CLOCK_SCALE_M 0xff 72#define AR933X_UART_CLOCK_SCALE_S 16 73#define AR933X_UART_CLOCK_STEP_M 0xffff 74#define AR933X_UART_CLOCK_STEP_S 0 75 76#define AR933X_UART_MAX_SCALE 0xff 77#define AR933X_UART_MAX_STEP 0xffff 78 79#define AR933X_UART_INT_RX_VALID (1 << 0) 80#define AR933X_UART_INT_TX_READY (1 << 1) 81#define AR933X_UART_INT_RX_FRAMING_ERR (1 << 2) 82#define AR933X_UART_INT_RX_OFLOW_ERR (1 << 3) 83#define AR933X_UART_INT_TX_OFLOW_ERR (1 << 4) 84#define AR933X_UART_INT_RX_PARITY_ERR (1 << 5) 85#define AR933X_UART_INT_RX_BREAK_ON (1 << 6) 86#define AR933X_UART_INT_RX_BREAK_OFF (1 << 7) 87#define AR933X_UART_INT_RX_FULL (1 << 8) 88#define AR933X_UART_INT_TX_EMPTY (1 << 9) 89#define AR933X_UART_INT_ALLINTS 0x3ff 90 91#endif /* __AR933X_UART_H__ */ 92