ar71xx_pci_bus_space.c revision 201906
1/*-
2 * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice unmodified, this list of conditions, and the following
10 *    disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD$");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33#include <sys/endian.h>
34
35#include <machine/bus.h>
36#include <mips/atheros/ar71xx_pci_bus_space.h>
37
38static bs_r_1_s_proto(pcimem);
39static bs_r_2_s_proto(pcimem);
40static bs_r_4_s_proto(pcimem);
41static bs_w_1_s_proto(pcimem);
42static bs_w_2_s_proto(pcimem);
43static bs_w_4_s_proto(pcimem);
44
45/*
46 * Bus space that handles offsets in word for 1/2 bytes read/write access.
47 * Byte order of values is handled by device drivers itself.
48 */
49static struct bus_space bus_space_pcimem = {
50	/* cookie */
51	(void *) 0,
52
53	/* mapping/unmapping */
54	generic_bs_map,
55	generic_bs_unmap,
56	generic_bs_subregion,
57
58	/* allocation/deallocation */
59	NULL,
60	NULL,
61
62	/* barrier */
63	generic_bs_barrier,
64
65	/* read (single) */
66	generic_bs_r_1,
67	generic_bs_r_2,
68	generic_bs_r_4,
69	NULL,
70
71	/* read multiple */
72	generic_bs_rm_1,
73	generic_bs_rm_2,
74	generic_bs_rm_4,
75	NULL,
76
77	/* read region */
78	generic_bs_rr_1,
79	generic_bs_rr_2,
80	generic_bs_rr_4,
81	NULL,
82
83	/* write (single) */
84	generic_bs_w_1,
85	generic_bs_w_2,
86	generic_bs_w_4,
87	NULL,
88
89	/* write multiple */
90	generic_bs_wm_1,
91	generic_bs_wm_2,
92	generic_bs_wm_4,
93	NULL,
94
95	/* write region */
96	NULL,
97	generic_bs_wr_2,
98	generic_bs_wr_4,
99	NULL,
100
101	/* set multiple */
102	NULL,
103	NULL,
104	NULL,
105	NULL,
106
107	/* set region */
108	NULL,
109	generic_bs_sr_2,
110	generic_bs_sr_4,
111	NULL,
112
113	/* copy */
114	NULL,
115	generic_bs_c_2,
116	NULL,
117	NULL,
118
119	/* read (single) stream */
120	pcimem_bs_r_1_s,
121	pcimem_bs_r_2_s,
122	pcimem_bs_r_4_s,
123	NULL,
124
125	/* read multiple stream */
126	generic_bs_rm_1,
127	generic_bs_rm_2,
128	generic_bs_rm_4,
129	NULL,
130
131	/* read region stream */
132	generic_bs_rr_1,
133	generic_bs_rr_2,
134	generic_bs_rr_4,
135	NULL,
136
137	/* write (single) stream */
138	pcimem_bs_w_1_s,
139	pcimem_bs_w_2_s,
140	pcimem_bs_w_4_s,
141	NULL,
142
143	/* write multiple stream */
144	generic_bs_wm_1,
145	generic_bs_wm_2,
146	generic_bs_wm_4,
147	NULL,
148
149	/* write region stream */
150	NULL,
151	generic_bs_wr_2,
152	generic_bs_wr_4,
153	NULL,
154};
155
156bus_space_tag_t ar71xx_bus_space_pcimem = &bus_space_pcimem;
157
158static uint8_t
159pcimem_bs_r_1_s(void *t, bus_space_handle_t h, bus_size_t o)
160{
161
162	return readb(h + (o &~ 3) + (3 - (o & 3)));
163}
164
165static void
166pcimem_bs_w_1_s(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
167{
168
169	writeb(h + (o &~ 3) + (3 - (o & 3)), v);
170}
171
172static uint16_t
173pcimem_bs_r_2_s(void *t, bus_space_handle_t h, bus_size_t o)
174{
175
176	return readw(h + (o &~ 3) + (2 - (o & 3)));
177}
178
179static void
180pcimem_bs_w_2_s(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
181{
182
183	writew(h + (o &~ 3) + (2 - (o & 3)), v);
184}
185
186static uint32_t
187pcimem_bs_r_4_s(void *t, bus_space_handle_t h, bus_size_t o)
188{
189
190	return le32toh(readl(h + o));
191}
192
193static void
194pcimem_bs_w_4_s(void *t, bus_space_handle_t h, bus_size_t o, uint32_t v)
195{
196
197	writel(h + o, htole32(v));
198}
199