ar71xx_pci.c revision 194059
1187706Sgonzo/*- 2187706Sgonzo * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org> 3187706Sgonzo * All rights reserved. 4187706Sgonzo * 5187706Sgonzo * Redistribution and use in source and binary forms, with or without 6187706Sgonzo * modification, are permitted provided that the following conditions 7187706Sgonzo * are met: 8187706Sgonzo * 1. Redistributions of source code must retain the above copyright 9187706Sgonzo * notice unmodified, this list of conditions, and the following 10187706Sgonzo * disclaimer. 11187706Sgonzo * 2. Redistributions in binary form must reproduce the above copyright 12187706Sgonzo * notice, this list of conditions and the following disclaimer in the 13187706Sgonzo * documentation and/or other materials provided with the distribution. 14187706Sgonzo * 15187706Sgonzo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16187706Sgonzo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17187706Sgonzo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18187706Sgonzo * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19187706Sgonzo * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20187706Sgonzo * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21187706Sgonzo * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22187706Sgonzo * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23187706Sgonzo * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24187706Sgonzo * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25187706Sgonzo * SUCH DAMAGE. 26187706Sgonzo */ 27187706Sgonzo 28187706Sgonzo#include <sys/cdefs.h> 29187706Sgonzo__FBSDID("$FreeBSD$"); 30187706Sgonzo 31187706Sgonzo#include <sys/param.h> 32187706Sgonzo#include <sys/systm.h> 33187706Sgonzo 34187706Sgonzo#include <sys/bus.h> 35187706Sgonzo#include <sys/interrupt.h> 36187706Sgonzo#include <sys/malloc.h> 37187706Sgonzo#include <sys/kernel.h> 38187706Sgonzo#include <sys/module.h> 39187706Sgonzo#include <sys/rman.h> 40187706Sgonzo 41187706Sgonzo#include <vm/vm.h> 42187706Sgonzo#include <vm/pmap.h> 43187706Sgonzo#include <vm/vm_extern.h> 44187706Sgonzo 45187706Sgonzo#include <machine/bus.h> 46187706Sgonzo#include <machine/cpu.h> 47187706Sgonzo#include <machine/pmap.h> 48187706Sgonzo 49187706Sgonzo#include <dev/pci/pcivar.h> 50187706Sgonzo#include <dev/pci/pcireg.h> 51187706Sgonzo 52187706Sgonzo#include <dev/pci/pcib_private.h> 53187706Sgonzo#include "pcib_if.h" 54187706Sgonzo 55192161Sgonzo#include <mips/atheros/ar71xxreg.h> 56192161Sgonzo#include <mips/atheros/ar71xx_pci_bus_space.h> 57187706Sgonzo 58187706Sgonzo#undef AR71XX_PCI_DEBUG 59187706Sgonzo#ifdef AR71XX_PCI_DEBUG 60187706Sgonzo#define dprintf printf 61187706Sgonzo#else 62187706Sgonzo#define dprintf(x, arg...) 63187706Sgonzo#endif 64187706Sgonzo 65187706Sgonzostruct ar71xx_pci_softc { 66187706Sgonzo device_t sc_dev; 67187706Sgonzo 68187706Sgonzo int sc_busno; 69187706Sgonzo struct rman sc_mem_rman; 70187706Sgonzo struct rman sc_irq_rman; 71187706Sgonzo 72191872Sgonzo struct intr_event *sc_eventstab[AR71XX_PCI_NIRQS]; 73187706Sgonzo struct resource *sc_irq; 74187706Sgonzo void *sc_ih; 75187706Sgonzo}; 76187706Sgonzo 77191872Sgonzostatic int ar71xx_pci_setup_intr(device_t, device_t, struct resource *, int, 78191872Sgonzo driver_filter_t *, driver_intr_t *, void *, void **); 79191872Sgonzostatic int ar71xx_pci_teardown_intr(device_t, device_t, struct resource *, 80191872Sgonzo void *); 81191872Sgonzostatic int ar71xx_pci_intr(void *); 82191872Sgonzo 83192822Sgonzostatic void 84192822Sgonzoar71xx_pci_mask_irq(void *source) 85191872Sgonzo{ 86191872Sgonzo uint32_t reg; 87192822Sgonzo unsigned int irq = (unsigned int)source; 88191872Sgonzo 89191872Sgonzo reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK); 90191872Sgonzo ATH_WRITE_REG(AR71XX_PCI_INTR_MASK, reg & ~(1 << irq)); 91191872Sgonzo 92191872Sgonzo} 93191872Sgonzo 94192822Sgonzostatic void 95192822Sgonzoar71xx_pci_unmask_irq(void *source) 96191872Sgonzo{ 97191872Sgonzo uint32_t reg; 98192822Sgonzo unsigned int irq = (unsigned int)source; 99191872Sgonzo 100191872Sgonzo reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK); 101191872Sgonzo ATH_WRITE_REG(AR71XX_PCI_INTR_MASK, reg | (1 << irq)); 102191872Sgonzo} 103191872Sgonzo 104187706Sgonzo/* 105187706Sgonzo * get bitmask for bytes of interest: 106187706Sgonzo * 0 - we want this byte, 1 - ignore it. e.g: we read 1 byte 107187706Sgonzo * from register 7. Bitmask would be: 0111 108187706Sgonzo */ 109187706Sgonzostatic uint32_t 110187706Sgonzoar71xx_get_bytes_to_read(int reg, int bytes) 111187706Sgonzo{ 112187706Sgonzo uint32_t bytes_to_read = 0; 113187706Sgonzo if ((bytes % 4) == 0) 114187706Sgonzo bytes_to_read = 0; 115187706Sgonzo else if ((bytes % 4) == 1) 116187706Sgonzo bytes_to_read = (~(1 << (reg % 4))) & 0xf; 117187706Sgonzo else if ((bytes % 4) == 2) 118187706Sgonzo bytes_to_read = (~(3 << (reg % 4))) & 0xf; 119187706Sgonzo else 120187706Sgonzo panic("%s: wrong combination", __func__); 121187706Sgonzo 122187706Sgonzo return (bytes_to_read); 123187706Sgonzo} 124187706Sgonzo 125187706Sgonzostatic int 126187706Sgonzoar71xx_pci_check_bus_error(void) 127187706Sgonzo{ 128187706Sgonzo uint32_t error, addr, has_errors = 0; 129187706Sgonzo error = ATH_READ_REG(AR71XX_PCI_ERROR) & 0x3; 130187706Sgonzo dprintf("%s: PCI error = %02x\n", __func__, error); 131187706Sgonzo if (error) { 132187706Sgonzo addr = ATH_READ_REG(AR71XX_PCI_ERROR_ADDR); 133187706Sgonzo 134187706Sgonzo /* Do not report it yet */ 135187706Sgonzo#if 0 136187706Sgonzo printf("PCI bus error %d at addr 0x%08x\n", error, addr); 137187706Sgonzo#endif 138187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_ERROR, error); 139187706Sgonzo has_errors = 1; 140187706Sgonzo } 141187706Sgonzo 142187706Sgonzo error = ATH_READ_REG(AR71XX_PCI_AHB_ERROR) & 0x1; 143187706Sgonzo dprintf("%s: AHB error = %02x\n", __func__, error); 144187706Sgonzo if (error) { 145187706Sgonzo addr = ATH_READ_REG(AR71XX_PCI_AHB_ERROR_ADDR); 146187706Sgonzo /* Do not report it yet */ 147187706Sgonzo#if 0 148187706Sgonzo printf("AHB bus error %d at addr 0x%08x\n", error, addr); 149187706Sgonzo#endif 150187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_AHB_ERROR, error); 151187706Sgonzo has_errors = 1; 152187706Sgonzo } 153187706Sgonzo 154187706Sgonzo return (has_errors); 155187706Sgonzo} 156187706Sgonzo 157187706Sgonzostatic uint32_t 158187706Sgonzoar71xx_pci_make_addr(int bus, int slot, int func, int reg) 159187706Sgonzo{ 160187706Sgonzo if (bus == 0) { 161187706Sgonzo return ((1 << slot) | (func << 8) | (reg & ~3)); 162187706Sgonzo } else { 163187706Sgonzo return ((bus << 16) | (slot << 11) | (func << 8) 164187706Sgonzo | (reg & ~3) | 1); 165187706Sgonzo } 166187706Sgonzo} 167187706Sgonzo 168187706Sgonzostatic int 169187706Sgonzoar71xx_pci_conf_setup(int bus, int slot, int func, int reg, int bytes, 170187706Sgonzo uint32_t cmd) 171187706Sgonzo{ 172187706Sgonzo uint32_t addr = ar71xx_pci_make_addr(bus, slot, func, (reg & ~3)); 173187706Sgonzo cmd |= (ar71xx_get_bytes_to_read(reg, bytes) << 4); 174187706Sgonzo 175187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_CONF_ADDR, addr); 176187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_CONF_CMD, cmd); 177187706Sgonzo 178187706Sgonzo dprintf("%s: tag (%x, %x, %x) %d/%d addr=%08x, cmd=%08x\n", __func__, 179187706Sgonzo bus, slot, func, reg, bytes, addr, cmd); 180187706Sgonzo 181187706Sgonzo return ar71xx_pci_check_bus_error(); 182187706Sgonzo} 183187706Sgonzo 184187706Sgonzostatic uint32_t 185194059Sgonzoar71xx_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func, 186194059Sgonzo u_int reg, int bytes) 187187706Sgonzo{ 188187706Sgonzo uint32_t data; 189187706Sgonzo uint32_t cmd, shift, mask; 190187706Sgonzo 191187706Sgonzo /* register access is 32-bit aligned */ 192187706Sgonzo shift = (reg & 3) * 8; 193187706Sgonzo if (shift) 194187706Sgonzo mask = (1 << shift) - 1; 195187706Sgonzo else 196187706Sgonzo mask = 0xffffffff; 197187706Sgonzo 198187706Sgonzo dprintf("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__, bus, slot, 199187706Sgonzo func, reg, bytes); 200187706Sgonzo 201187706Sgonzo if ((bus == 0) && (slot == 0) && (func == 0)) { 202187706Sgonzo cmd = PCI_LCONF_CMD_READ | (reg & ~3); 203187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_LCONF_CMD, cmd); 204187706Sgonzo data = ATH_READ_REG(AR71XX_PCI_LCONF_READ_DATA); 205187706Sgonzo } else { 206187706Sgonzo if (ar71xx_pci_conf_setup(bus, slot, func, reg, bytes, 207187706Sgonzo PCI_CONF_CMD_READ) == 0) 208187706Sgonzo data = ATH_READ_REG(AR71XX_PCI_CONF_READ_DATA); 209187706Sgonzo else 210187706Sgonzo data = -1; 211187706Sgonzo } 212187706Sgonzo 213187706Sgonzo /* get request bytes from 32-bit word */ 214187706Sgonzo data = (data >> shift) & mask; 215187706Sgonzo 216187706Sgonzo dprintf("%s: read 0x%x\n", __func__, data); 217187706Sgonzo 218187706Sgonzo return (data); 219187706Sgonzo} 220187706Sgonzo 221187706Sgonzostatic void 222194059Sgonzoar71xx_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func, 223194059Sgonzo u_int reg, uint32_t data, int bytes) 224187706Sgonzo{ 225187706Sgonzo uint32_t cmd; 226187706Sgonzo 227187706Sgonzo dprintf("%s: tag (%x, %x, %x) reg %d(%d)\n", __func__, bus, slot, 228187706Sgonzo func, reg, bytes); 229187706Sgonzo 230187706Sgonzo data = data << (8*(reg % 4)); 231187706Sgonzo 232187706Sgonzo if ((bus == 0) && (slot == 0) && (func == 0)) { 233187706Sgonzo cmd = PCI_LCONF_CMD_WRITE | (reg & ~3); 234187706Sgonzo cmd |= ar71xx_get_bytes_to_read(reg, bytes) << 20; 235187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_LCONF_CMD, cmd); 236187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_LCONF_WRITE_DATA, data); 237187706Sgonzo } else { 238187706Sgonzo if (ar71xx_pci_conf_setup(bus, slot, func, reg, bytes, 239187706Sgonzo PCI_CONF_CMD_WRITE) == 0) 240187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_CONF_WRITE_DATA, data); 241187706Sgonzo } 242187706Sgonzo} 243187706Sgonzo 244187706Sgonzostatic int 245187706Sgonzoar71xx_pci_probe(device_t dev) 246187706Sgonzo{ 247187706Sgonzo 248187706Sgonzo return (0); 249187706Sgonzo} 250187706Sgonzo 251187706Sgonzostatic int 252187706Sgonzoar71xx_pci_attach(device_t dev) 253187706Sgonzo{ 254187706Sgonzo int busno = 0; 255187706Sgonzo int rid = 0; 256187706Sgonzo uint32_t reset; 257187706Sgonzo struct ar71xx_pci_softc *sc = device_get_softc(dev); 258187706Sgonzo 259187706Sgonzo sc->sc_mem_rman.rm_type = RMAN_ARRAY; 260187706Sgonzo sc->sc_mem_rman.rm_descr = "ar71xx PCI memory window"; 261187706Sgonzo if (rman_init(&sc->sc_mem_rman) != 0 || 262187706Sgonzo rman_manage_region(&sc->sc_mem_rman, AR71XX_PCI_MEM_BASE, 263187706Sgonzo AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1) != 0) { 264187706Sgonzo panic("ar71xx_pci_attach: failed to set up I/O rman"); 265187706Sgonzo } 266187706Sgonzo 267187706Sgonzo sc->sc_irq_rman.rm_type = RMAN_ARRAY; 268187706Sgonzo sc->sc_irq_rman.rm_descr = "ar71xx PCI IRQs"; 269187706Sgonzo if (rman_init(&sc->sc_irq_rman) != 0 || 270187706Sgonzo rman_manage_region(&sc->sc_irq_rman, AR71XX_PCI_IRQ_START, 271187706Sgonzo AR71XX_PCI_IRQ_END) != 0) 272187706Sgonzo panic("ar71xx_pci_attach: failed to set up IRQ rman"); 273187706Sgonzo 274187706Sgonzo 275187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_INTR_STATUS, 0); 276187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_INTR_MASK, 0); 277187706Sgonzo 278187706Sgonzo /* Hook up our interrupt handler. */ 279187706Sgonzo if ((sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 280187706Sgonzo RF_SHAREABLE | RF_ACTIVE)) == NULL) { 281187706Sgonzo device_printf(dev, "unable to allocate IRQ resource\n"); 282187706Sgonzo return ENXIO; 283187706Sgonzo } 284187706Sgonzo 285187706Sgonzo if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC, 286191872Sgonzo ar71xx_pci_intr, NULL, sc, &sc->sc_ih))) { 287187706Sgonzo device_printf(dev, 288187706Sgonzo "WARNING: unable to register interrupt handler\n"); 289187706Sgonzo return ENXIO; 290187706Sgonzo } 291187706Sgonzo 292187706Sgonzo /* reset PCI core and PCI bus */ 293187706Sgonzo reset = ATH_READ_REG(AR71XX_RST_RESET); 294187706Sgonzo reset |= (RST_RESET_PCI_CORE | RST_RESET_PCI_BUS); 295187706Sgonzo ATH_WRITE_REG(AR71XX_RST_RESET, reset); 296187706Sgonzo DELAY(1000); 297187706Sgonzo 298187706Sgonzo reset &= ~(RST_RESET_PCI_CORE | RST_RESET_PCI_BUS); 299187706Sgonzo ATH_WRITE_REG(AR71XX_RST_RESET, reset); 300187706Sgonzo DELAY(1000); 301187706Sgonzo 302187706Sgonzo /* Init PCI windows */ 303187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_WINDOW0, PCI_WINDOW0_ADDR); 304187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_WINDOW1, PCI_WINDOW1_ADDR); 305187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_WINDOW2, PCI_WINDOW2_ADDR); 306187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_WINDOW3, PCI_WINDOW3_ADDR); 307187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_WINDOW4, PCI_WINDOW4_ADDR); 308187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_WINDOW5, PCI_WINDOW5_ADDR); 309187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_WINDOW6, PCI_WINDOW6_ADDR); 310187706Sgonzo ATH_WRITE_REG(AR71XX_PCI_WINDOW7, PCI_WINDOW7_CONF_ADDR); 311187706Sgonzo DELAY(1000); 312187706Sgonzo 313187706Sgonzo ar71xx_pci_check_bus_error(); 314187706Sgonzo 315187706Sgonzo /* Fixup internal PCI bridge */ 316187706Sgonzo ar71xx_pci_write_config(dev, 0, 0, 0, PCIR_COMMAND, 317187706Sgonzo PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN 318187706Sgonzo | PCIM_CMD_SERRESPEN | PCIM_CMD_BACKTOBACK 319187706Sgonzo | PCIM_CMD_PERRESPEN | PCIM_CMD_MWRICEN, 2); 320187706Sgonzo 321187706Sgonzo device_add_child(dev, "pci", busno); 322187706Sgonzo return (bus_generic_attach(dev)); 323187706Sgonzo} 324187706Sgonzo 325187706Sgonzostatic int 326187706Sgonzoar71xx_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 327187706Sgonzo{ 328187706Sgonzo struct ar71xx_pci_softc *sc = device_get_softc(dev); 329187706Sgonzo 330187706Sgonzo switch (which) { 331187706Sgonzo case PCIB_IVAR_DOMAIN: 332187706Sgonzo *result = 0; 333187706Sgonzo return (0); 334187706Sgonzo case PCIB_IVAR_BUS: 335187706Sgonzo *result = sc->sc_busno; 336187706Sgonzo return (0); 337187706Sgonzo } 338187706Sgonzo 339187706Sgonzo return (ENOENT); 340187706Sgonzo} 341187706Sgonzo 342187706Sgonzostatic int 343187706Sgonzoar71xx_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t result) 344187706Sgonzo{ 345187706Sgonzo struct ar71xx_pci_softc * sc = device_get_softc(dev); 346187706Sgonzo 347187706Sgonzo switch (which) { 348187706Sgonzo case PCIB_IVAR_BUS: 349187706Sgonzo sc->sc_busno = result; 350187706Sgonzo return (0); 351187706Sgonzo } 352187706Sgonzo 353187706Sgonzo return (ENOENT); 354187706Sgonzo} 355187706Sgonzo 356187706Sgonzostatic struct resource * 357187706Sgonzoar71xx_pci_alloc_resource(device_t bus, device_t child, int type, int *rid, 358187706Sgonzo u_long start, u_long end, u_long count, u_int flags) 359187706Sgonzo{ 360187706Sgonzo 361187706Sgonzo struct ar71xx_pci_softc *sc = device_get_softc(bus); 362192161Sgonzo struct resource *rv; 363187706Sgonzo struct rman *rm; 364187706Sgonzo 365187706Sgonzo switch (type) { 366187706Sgonzo case SYS_RES_IRQ: 367187706Sgonzo rm = &sc->sc_irq_rman; 368187706Sgonzo break; 369187706Sgonzo case SYS_RES_MEMORY: 370187706Sgonzo rm = &sc->sc_mem_rman; 371187706Sgonzo break; 372187706Sgonzo default: 373187706Sgonzo return (NULL); 374187706Sgonzo } 375187706Sgonzo 376187706Sgonzo rv = rman_reserve_resource(rm, start, end, count, flags, child); 377187706Sgonzo 378187706Sgonzo if (rv == NULL) 379187706Sgonzo return (NULL); 380187706Sgonzo 381187706Sgonzo rman_set_rid(rv, *rid); 382187706Sgonzo 383187706Sgonzo if (flags & RF_ACTIVE) { 384187706Sgonzo if (bus_activate_resource(child, type, *rid, rv)) { 385187706Sgonzo rman_release_resource(rv); 386187706Sgonzo return (NULL); 387187706Sgonzo } 388187706Sgonzo } 389187706Sgonzo 390192161Sgonzo 391187706Sgonzo return (rv); 392187706Sgonzo} 393187706Sgonzo 394192161Sgonzo 395187706Sgonzostatic int 396192161Sgonzoar71xx_pci_activate_resource(device_t bus, device_t child, int type, int rid, 397192161Sgonzo struct resource *r) 398192161Sgonzo{ 399192161Sgonzo int res = (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), 400192161Sgonzo child, type, rid, r)); 401192161Sgonzo 402192161Sgonzo if (!res) { 403192161Sgonzo switch(type) { 404192161Sgonzo case SYS_RES_MEMORY: 405192161Sgonzo case SYS_RES_IOPORT: 406192161Sgonzo rman_set_bustag(r, ar71xx_bus_space_pcimem); 407192161Sgonzo break; 408192161Sgonzo } 409192161Sgonzo } 410192161Sgonzo 411192161Sgonzo return (res); 412192161Sgonzo} 413192161Sgonzo 414192161Sgonzo 415192161Sgonzo 416192161Sgonzostatic int 417191872Sgonzoar71xx_pci_setup_intr(device_t bus, device_t child, struct resource *ires, 418191872Sgonzo int flags, driver_filter_t *filt, driver_intr_t *handler, 419191872Sgonzo void *arg, void **cookiep) 420191872Sgonzo{ 421191872Sgonzo struct ar71xx_pci_softc *sc = device_get_softc(bus); 422191872Sgonzo struct intr_event *event; 423191872Sgonzo int irq, error; 424191872Sgonzo 425191872Sgonzo irq = rman_get_start(ires); 426191872Sgonzo 427191872Sgonzo if (irq > AR71XX_PCI_IRQ_END) 428191872Sgonzo panic("%s: bad irq %d", __func__, irq); 429191872Sgonzo 430191872Sgonzo event = sc->sc_eventstab[irq]; 431191872Sgonzo if (event == NULL) { 432191872Sgonzo error = intr_event_create(&event, (void *)irq, 0, irq, 433192822Sgonzo ar71xx_pci_mask_irq, ar71xx_pci_unmask_irq, NULL, NULL, 434191872Sgonzo "ar71xx_pci intr%d:", irq); 435191872Sgonzo 436191872Sgonzo sc->sc_eventstab[irq] = event; 437191872Sgonzo } 438191872Sgonzo 439191872Sgonzo intr_event_add_handler(event, device_get_nameunit(child), filt, 440191872Sgonzo handler, arg, intr_priority(flags), flags, cookiep); 441191872Sgonzo 442192822Sgonzo ar71xx_pci_unmask_irq((void*)irq); 443191872Sgonzo 444191872Sgonzo return (0); 445191872Sgonzo} 446191872Sgonzo 447191872Sgonzostatic int 448191872Sgonzoar71xx_pci_teardown_intr(device_t dev, device_t child, struct resource *ires, 449187706Sgonzo void *cookie) 450187706Sgonzo{ 451191872Sgonzo struct ar71xx_pci_softc *sc = device_get_softc(dev); 452191872Sgonzo int irq, result; 453187706Sgonzo 454191872Sgonzo irq = rman_get_start(ires); 455191872Sgonzo if (irq > AR71XX_PCI_IRQ_END) 456191872Sgonzo panic("%s: bad irq %d", __func__, irq); 457191872Sgonzo 458191872Sgonzo if (sc->sc_eventstab[irq] == NULL) 459191872Sgonzo panic("Trying to teardown unoccupied IRQ"); 460191872Sgonzo 461192822Sgonzo ar71xx_pci_mask_irq((void*)irq); 462191872Sgonzo 463191872Sgonzo result = intr_event_remove_handler(cookie); 464191872Sgonzo if (!result) 465191872Sgonzo sc->sc_eventstab[irq] = NULL; 466191872Sgonzo 467191872Sgonzo return (result); 468187706Sgonzo} 469187706Sgonzo 470187706Sgonzostatic int 471191872Sgonzoar71xx_pci_intr(void *arg) 472191872Sgonzo{ 473191872Sgonzo struct ar71xx_pci_softc *sc = arg; 474191872Sgonzo struct intr_event *event; 475191872Sgonzo uint32_t reg, irq; 476191872Sgonzo 477191872Sgonzo reg = ATH_READ_REG(AR71XX_PCI_INTR_STATUS); 478191872Sgonzo for (irq = AR71XX_PCI_IRQ_START; irq <= AR71XX_PCI_IRQ_END; irq++) { 479191872Sgonzo if (reg & (1 << irq)) { 480191872Sgonzo event = sc->sc_eventstab[irq]; 481191872Sgonzo if (!event || TAILQ_EMPTY(&event->ie_handlers)) { 482191872Sgonzo /* Ignore timer interrupts */ 483191872Sgonzo if (irq != 0) 484191872Sgonzo printf("Stray IRQ %d\n", irq); 485191872Sgonzo continue; 486191872Sgonzo } 487191872Sgonzo 488191872Sgonzo /* TODO: frame instead of NULL? */ 489191872Sgonzo intr_event_handle(event, NULL); 490191872Sgonzo } 491191872Sgonzo } 492191872Sgonzo 493191872Sgonzo return (FILTER_HANDLED); 494191872Sgonzo} 495191872Sgonzo 496191872Sgonzostatic int 497187706Sgonzoar71xx_pci_maxslots(device_t dev) 498187706Sgonzo{ 499187706Sgonzo 500187706Sgonzo return (PCI_SLOTMAX); 501187706Sgonzo} 502187706Sgonzo 503187706Sgonzostatic int 504187706Sgonzoar71xx_pci_route_interrupt(device_t pcib, device_t device, int pin) 505187706Sgonzo{ 506187706Sgonzo 507187706Sgonzo return (pin); 508187706Sgonzo} 509187706Sgonzo 510187706Sgonzostatic device_method_t ar71xx_pci_methods[] = { 511187706Sgonzo /* Device interface */ 512187706Sgonzo DEVMETHOD(device_probe, ar71xx_pci_probe), 513187706Sgonzo DEVMETHOD(device_attach, ar71xx_pci_attach), 514187706Sgonzo DEVMETHOD(device_shutdown, bus_generic_shutdown), 515187706Sgonzo DEVMETHOD(device_suspend, bus_generic_suspend), 516187706Sgonzo DEVMETHOD(device_resume, bus_generic_resume), 517187706Sgonzo 518187706Sgonzo /* Bus interface */ 519187706Sgonzo DEVMETHOD(bus_print_child, bus_generic_print_child), 520187706Sgonzo DEVMETHOD(bus_read_ivar, ar71xx_pci_read_ivar), 521187706Sgonzo DEVMETHOD(bus_write_ivar, ar71xx_pci_write_ivar), 522187706Sgonzo DEVMETHOD(bus_alloc_resource, ar71xx_pci_alloc_resource), 523187706Sgonzo DEVMETHOD(bus_release_resource, bus_generic_release_resource), 524192161Sgonzo DEVMETHOD(bus_activate_resource, ar71xx_pci_activate_resource), 525187706Sgonzo DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 526191872Sgonzo DEVMETHOD(bus_setup_intr, ar71xx_pci_setup_intr), 527187706Sgonzo DEVMETHOD(bus_teardown_intr, ar71xx_pci_teardown_intr), 528187706Sgonzo 529187706Sgonzo /* pcib interface */ 530187706Sgonzo DEVMETHOD(pcib_maxslots, ar71xx_pci_maxslots), 531187706Sgonzo DEVMETHOD(pcib_read_config, ar71xx_pci_read_config), 532187706Sgonzo DEVMETHOD(pcib_write_config, ar71xx_pci_write_config), 533187706Sgonzo DEVMETHOD(pcib_route_interrupt, ar71xx_pci_route_interrupt), 534187706Sgonzo 535187706Sgonzo {0, 0} 536187706Sgonzo}; 537187706Sgonzo 538187706Sgonzostatic driver_t ar71xx_pci_driver = { 539187706Sgonzo "pcib", 540187706Sgonzo ar71xx_pci_methods, 541187706Sgonzo sizeof(struct ar71xx_pci_softc), 542187706Sgonzo}; 543187706Sgonzo 544187706Sgonzostatic devclass_t ar71xx_pci_devclass; 545187706Sgonzo 546187706SgonzoDRIVER_MODULE(ar71xx_pci, nexus, ar71xx_pci_driver, ar71xx_pci_devclass, 0, 0); 547