ar71xx_cpudef.h revision 302408 
1/*-
2 * Copyright (c) 2010 Adrian Chadd
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27/* $FreeBSD: stable/11/sys/mips/atheros/ar71xx_cpudef.h 285121 2015-07-04 03:05:57Z adrian $ */
28
29#ifndef	__AR71XX_CPUDEF_H__
30#define	__AR71XX_CPUDEF_H__
31
32typedef enum {
33	AR71XX_CPU_DDR_FLUSH_GE0,
34	AR71XX_CPU_DDR_FLUSH_GE1,
35	AR71XX_CPU_DDR_FLUSH_USB,
36	AR71XX_CPU_DDR_FLUSH_PCIE,
37	AR71XX_CPU_DDR_FLUSH_WMAC,
38	AR71XX_CPU_DDR_FLUSH_PCIE_EP,
39	AR71XX_CPU_DDR_FLUSH_CHECKSUM,
40} ar71xx_flush_ddr_id_t;
41
42struct ar71xx_cpu_def {
43	void (* detect_mem_size) (void);
44	void (* detect_sys_frequency) (void);
45	void (* ar71xx_chip_device_stop) (uint32_t);
46	void (* ar71xx_chip_device_start) (uint32_t);
47	int (* ar71xx_chip_device_stopped) (uint32_t);
48	void (* ar71xx_chip_set_pll_ge) (int, int, uint32_t);
49	void (* ar71xx_chip_set_mii_speed) (uint32_t, uint32_t);
50	void (* ar71xx_chip_set_mii_if) (uint32_t, ar71xx_mii_mode);
51	uint32_t (* ar71xx_chip_get_eth_pll) (unsigned int, int);
52
53	/*
54	 * From Linux - Handling this IRQ is a bit special.
55	 * AR71xx - AR71XX_DDR_REG_FLUSH_PCI
56	 * AR724x - AR724X_DDR_REG_FLUSH_PCIE
57	 * AR91xx - AR91XX_DDR_REG_FLUSH_WMAC
58	 *
59	 * These are set when STATUSF_IP2 is set in regiser c0.
60	 * This flush is done before the IRQ is handled to make
61	 * sure the driver correctly sees any memory updates.
62	 */
63	void (* ar71xx_chip_ddr_flush) (ar71xx_flush_ddr_id_t id);
64	/*
65	 * The USB peripheral init code is subtly different for
66	 * each chip.
67	 */
68	void (* ar71xx_chip_init_usb_peripheral) (void);
69
70	void (* ar71xx_chip_reset_ethernet_switch) (void);
71
72	void (* ar71xx_chip_reset_wmac) (void);
73
74	void (* ar71xx_chip_init_gmac) (void);
75
76	void (* ar71xx_chip_reset_nfc) (int);
77
78	void (* ar71xx_chip_gpio_out_configure) (int, uint8_t);
79};
80
81extern struct ar71xx_cpu_def * ar71xx_cpu_ops;
82
83static inline void ar71xx_detect_sys_frequency(void)
84{
85	ar71xx_cpu_ops->detect_sys_frequency();
86}
87
88static inline void ar71xx_device_stop(uint32_t mask)
89{
90	ar71xx_cpu_ops->ar71xx_chip_device_stop(mask);
91}
92
93static inline void ar71xx_device_start(uint32_t mask)
94{
95	ar71xx_cpu_ops->ar71xx_chip_device_start(mask);
96}
97
98static inline int ar71xx_device_stopped(uint32_t mask)
99{
100	return ar71xx_cpu_ops->ar71xx_chip_device_stopped(mask);
101}
102
103static inline void ar71xx_device_set_pll_ge(int unit, int speed, uint32_t pll)
104{
105	ar71xx_cpu_ops->ar71xx_chip_set_pll_ge(unit, speed, pll);
106}
107
108static inline void ar71xx_device_set_mii_speed(int unit, int speed)
109{
110	ar71xx_cpu_ops->ar71xx_chip_set_mii_speed(unit, speed);
111}
112
113static inline void ar71xx_device_set_mii_if(int unit, ar71xx_mii_mode mii_cfg)
114{
115	ar71xx_cpu_ops->ar71xx_chip_set_mii_if(unit, mii_cfg);
116}
117
118static inline void ar71xx_device_flush_ddr(ar71xx_flush_ddr_id_t id)
119{
120	ar71xx_cpu_ops->ar71xx_chip_ddr_flush(id);
121}
122
123static inline uint32_t ar71xx_device_get_eth_pll(unsigned int unit, int speed)
124{
125	return (ar71xx_cpu_ops->ar71xx_chip_get_eth_pll(unit, speed));
126}
127
128static inline void ar71xx_init_usb_peripheral(void)
129{
130	ar71xx_cpu_ops->ar71xx_chip_init_usb_peripheral();
131}
132
133static inline void ar71xx_reset_ethernet_switch(void)
134{
135	if (ar71xx_cpu_ops->ar71xx_chip_reset_ethernet_switch)
136		ar71xx_cpu_ops->ar71xx_chip_reset_ethernet_switch();
137}
138
139static inline void ar71xx_reset_wmac(void)
140{
141	if (ar71xx_cpu_ops->ar71xx_chip_reset_wmac)
142		ar71xx_cpu_ops->ar71xx_chip_reset_wmac();
143}
144
145static inline void ar71xx_init_gmac(void)
146{
147	if (ar71xx_cpu_ops->ar71xx_chip_init_gmac)
148		ar71xx_cpu_ops->ar71xx_chip_init_gmac();
149}
150
151static inline void ar71xx_reset_nfc(int active)
152{
153
154	if (ar71xx_cpu_ops->ar71xx_chip_reset_nfc)
155		ar71xx_cpu_ops->ar71xx_chip_reset_nfc(active);
156}
157
158static inline void ar71xx_gpio_ouput_configure(int gpio, uint8_t func)
159{
160	if (ar71xx_cpu_ops->ar71xx_chip_gpio_out_configure)
161		ar71xx_cpu_ops->ar71xx_chip_gpio_out_configure(gpio, func);
162}
163
164/* XXX shouldn't be here! */
165extern uint32_t u_ar71xx_refclk;
166extern uint32_t u_ar71xx_cpu_freq;
167extern uint32_t u_ar71xx_ahb_freq;
168extern uint32_t u_ar71xx_ddr_freq;
169extern uint32_t u_ar71xx_uart_freq;
170extern uint32_t u_ar71xx_wdt_freq;
171extern uint32_t u_ar71xx_mdio_freq;
172
173static inline uint64_t ar71xx_refclk(void) { return u_ar71xx_refclk; }
174static inline uint64_t ar71xx_cpu_freq(void) { return u_ar71xx_cpu_freq; }
175static inline uint64_t ar71xx_ahb_freq(void) { return u_ar71xx_ahb_freq; }
176static inline uint64_t ar71xx_ddr_freq(void) { return u_ar71xx_ddr_freq; }
177static inline uint64_t ar71xx_uart_freq(void) { return u_ar71xx_uart_freq; }
178static inline uint64_t ar71xx_wdt_freq(void) { return u_ar71xx_wdt_freq; }
179static inline uint64_t ar71xx_mdio_freq(void) { return u_ar71xx_mdio_freq; }
180
181#endif
182