ar71xx_cpudef.h revision 276610 
1/*-
2 * Copyright (c) 2010 Adrian Chadd
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27/* $FreeBSD: head/sys/mips/atheros/ar71xx_cpudef.h 276610 2015-01-03 06:55:58Z adrian $ */
28
29#ifndef	__AR71XX_CPUDEF_H__
30#define	__AR71XX_CPUDEF_H__
31
32struct ar71xx_cpu_def {
33	void (* detect_mem_size) (void);
34	void (* detect_sys_frequency) (void);
35	void (* ar71xx_chip_device_stop) (uint32_t);
36	void (* ar71xx_chip_device_start) (uint32_t);
37	int (* ar71xx_chip_device_stopped) (uint32_t);
38	void (* ar71xx_chip_set_pll_ge) (int, int, uint32_t);
39	void (* ar71xx_chip_set_mii_speed) (uint32_t, uint32_t);
40	void (* ar71xx_chip_set_mii_if) (uint32_t, ar71xx_mii_mode);
41	void (* ar71xx_chip_ddr_flush_ge) (int);
42	uint32_t (* ar71xx_chip_get_eth_pll) (unsigned int, int);
43
44	/*
45	 * From Linux - Handling this IRQ is a bit special.
46	 * AR71xx - AR71XX_DDR_REG_FLUSH_PCI
47	 * AR724x - AR724X_DDR_REG_FLUSH_PCIE
48	 * AR91xx - AR91XX_DDR_REG_FLUSH_WMAC
49	 *
50	 * These are set when STATUSF_IP2 is set in regiser c0.
51	 * This flush is done before the IRQ is handled to make
52	 * sure the driver correctly sees any memory updates.
53	 */
54	void (* ar71xx_chip_ddr_flush_ip2) (void);
55	/*
56	 * The USB peripheral init code is subtly different for
57	 * each chip.
58	 */
59	void (* ar71xx_chip_init_usb_peripheral) (void);
60
61	void (* ar71xx_chip_reset_ethernet_switch) (void);
62
63	void (* ar71xx_chip_reset_wmac) (void);
64
65	void (* ar71xx_chip_init_gmac) (void);
66
67	void (* ar71xx_chip_reset_nfc) (int);
68
69	void (* ar71xx_chip_gpio_out_configure) (int, uint8_t);
70};
71
72extern struct ar71xx_cpu_def * ar71xx_cpu_ops;
73
74static inline void ar71xx_detect_sys_frequency(void)
75{
76	ar71xx_cpu_ops->detect_sys_frequency();
77}
78
79static inline void ar71xx_device_stop(uint32_t mask)
80{
81	ar71xx_cpu_ops->ar71xx_chip_device_stop(mask);
82}
83
84static inline void ar71xx_device_start(uint32_t mask)
85{
86	ar71xx_cpu_ops->ar71xx_chip_device_start(mask);
87}
88
89static inline int ar71xx_device_stopped(uint32_t mask)
90{
91	return ar71xx_cpu_ops->ar71xx_chip_device_stopped(mask);
92}
93
94static inline void ar71xx_device_set_pll_ge(int unit, int speed, uint32_t pll)
95{
96	ar71xx_cpu_ops->ar71xx_chip_set_pll_ge(unit, speed, pll);
97}
98
99static inline void ar71xx_device_set_mii_speed(int unit, int speed)
100{
101	ar71xx_cpu_ops->ar71xx_chip_set_mii_speed(unit, speed);
102}
103
104static inline void ar71xx_device_set_mii_if(int unit, ar71xx_mii_mode mii_cfg)
105{
106	ar71xx_cpu_ops->ar71xx_chip_set_mii_if(unit, mii_cfg);
107}
108
109static inline void ar71xx_device_flush_ddr_ge(int unit)
110{
111	ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ge(unit);
112}
113
114static inline uint32_t ar71xx_device_get_eth_pll(unsigned int unit, int speed)
115{
116	return (ar71xx_cpu_ops->ar71xx_chip_get_eth_pll(unit, speed));
117}
118
119static inline void ar71xx_init_usb_peripheral(void)
120{
121	ar71xx_cpu_ops->ar71xx_chip_init_usb_peripheral();
122}
123
124static inline void ar71xx_reset_ethernet_switch(void)
125{
126	if (ar71xx_cpu_ops->ar71xx_chip_reset_ethernet_switch)
127		ar71xx_cpu_ops->ar71xx_chip_reset_ethernet_switch();
128}
129
130static inline void ar71xx_reset_wmac(void)
131{
132	if (ar71xx_cpu_ops->ar71xx_chip_reset_wmac)
133		ar71xx_cpu_ops->ar71xx_chip_reset_wmac();
134}
135
136static inline void ar71xx_init_gmac(void)
137{
138	if (ar71xx_cpu_ops->ar71xx_chip_init_gmac)
139		ar71xx_cpu_ops->ar71xx_chip_init_gmac();
140}
141
142static inline void ar71xx_device_ddr_flush_ip2(void)
143{
144	ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ip2();
145}
146
147static inline void ar71xx_reset_nfc(int active)
148{
149
150	if (ar71xx_cpu_ops->ar71xx_chip_reset_nfc)
151		ar71xx_cpu_ops->ar71xx_chip_reset_nfc(active);
152}
153
154static inline void ar71xx_gpio_ouput_configure(int gpio, uint8_t func)
155{
156	if (ar71xx_cpu_ops->ar71xx_chip_gpio_out_configure)
157		ar71xx_cpu_ops->ar71xx_chip_gpio_out_configure(gpio, func);
158}
159
160/* XXX shouldn't be here! */
161extern uint32_t u_ar71xx_refclk;
162extern uint32_t u_ar71xx_cpu_freq;
163extern uint32_t u_ar71xx_ahb_freq;
164extern uint32_t u_ar71xx_ddr_freq;
165extern uint32_t u_ar71xx_uart_freq;
166extern uint32_t u_ar71xx_wdt_freq;
167extern uint32_t u_ar71xx_mdio_freq;
168
169static inline uint64_t ar71xx_refclk(void) { return u_ar71xx_refclk; }
170static inline uint64_t ar71xx_cpu_freq(void) { return u_ar71xx_cpu_freq; }
171static inline uint64_t ar71xx_ahb_freq(void) { return u_ar71xx_ahb_freq; }
172static inline uint64_t ar71xx_ddr_freq(void) { return u_ar71xx_ddr_freq; }
173static inline uint64_t ar71xx_uart_freq(void) { return u_ar71xx_uart_freq; }
174static inline uint64_t ar71xx_wdt_freq(void) { return u_ar71xx_wdt_freq; }
175static inline uint64_t ar71xx_mdio_freq(void) { return u_ar71xx_mdio_freq; }
176
177#endif
178