ar71xx_cpudef.h revision 253507
1285307Sed/*- 2285307Sed * Copyright (c) 2010 Adrian Chadd 3285307Sed * All rights reserved. 4285307Sed * 5285307Sed * Redistribution and use in source and binary forms, with or without 6285307Sed * modification, are permitted provided that the following conditions 7285307Sed * are met: 8285307Sed * 1. Redistributions of source code must retain the above copyright 9285307Sed * notice, this list of conditions and the following disclaimer. 10285307Sed * 2. Redistributions in binary form must reproduce the above copyright 11285307Sed * notice, this list of conditions and the following disclaimer in the 12285307Sed * documentation and/or other materials provided with the distribution. 13285307Sed * 14285307Sed * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15285307Sed * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16285307Sed * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17285307Sed * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18285307Sed * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19285307Sed * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20285307Sed * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21285307Sed * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22285307Sed * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23285307Sed * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24285307Sed * SUCH DAMAGE. 25285307Sed */ 26285307Sed 27285307Sed/* $FreeBSD: head/sys/mips/atheros/ar71xx_cpudef.h 253507 2013-07-21 03:51:24Z adrian $ */ 28285307Sed 29285596Sed#ifndef __AR71XX_CPUDEF_H__ 30285930Sed#define __AR71XX_CPUDEF_H__ 31285998Sed 32285596Sedstruct ar71xx_cpu_def { 33285834Sed void (* detect_mem_size) (void); 34285834Sed void (* detect_sys_frequency) (void); 35285834Sed void (* ar71xx_chip_device_stop) (uint32_t); 36285930Sed void (* ar71xx_chip_device_start) (uint32_t); 37285930Sed int (* ar71xx_chip_device_stopped) (uint32_t); 38285596Sed void (* ar71xx_chip_set_pll_ge) (int, int, uint32_t); 39285998Sed void (* ar71xx_chip_set_mii_speed) (uint32_t, uint32_t); 40285998Sed void (* ar71xx_chip_set_mii_if) (uint32_t, ar71xx_mii_mode); 41285596Sed void (* ar71xx_chip_ddr_flush_ge) (int); 42297247Sed uint32_t (* ar71xx_chip_get_eth_pll) (unsigned int, int); 43297247Sed 44285307Sed /* 45285930Sed * From Linux - Handling this IRQ is a bit special. 46285307Sed * AR71xx - AR71XX_DDR_REG_FLUSH_PCI 47285998Sed * AR724x - AR724X_DDR_REG_FLUSH_PCIE 48285998Sed * AR91xx - AR91XX_DDR_REG_FLUSH_WMAC 49285834Sed * 50285834Sed * These are set when STATUSF_IP2 is set in regiser c0. 51285834Sed * This flush is done before the IRQ is handled to make 52285834Sed * sure the driver correctly sees any memory updates. 53285834Sed */ 54285834Sed void (* ar71xx_chip_ddr_flush_ip2) (void); 55285834Sed /* 56285834Sed * The USB peripheral init code is subtly different for 57285834Sed * each chip. 58285834Sed */ 59285834Sed void (* ar71xx_chip_init_usb_peripheral) (void); 60285834Sed}; 61285834Sed 62285834Sedextern struct ar71xx_cpu_def * ar71xx_cpu_ops; 63285834Sed 64285834Sedstatic inline void ar71xx_detect_sys_frequency(void) 65285834Sed{ 66285834Sed ar71xx_cpu_ops->detect_sys_frequency(); 67285834Sed} 68285834Sed 69285834Sedstatic inline void ar71xx_device_stop(uint32_t mask) 70285834Sed{ 71285834Sed ar71xx_cpu_ops->ar71xx_chip_device_stop(mask); 72285834Sed} 73285834Sed 74285834Sedstatic inline void ar71xx_device_start(uint32_t mask) 75285834Sed{ 76285834Sed ar71xx_cpu_ops->ar71xx_chip_device_start(mask); 77285834Sed} 78285834Sed 79285834Sedstatic inline int ar71xx_device_stopped(uint32_t mask) 80285834Sed{ 81285834Sed return ar71xx_cpu_ops->ar71xx_chip_device_stopped(mask); 82285834Sed} 83285834Sed 84285834Sedstatic inline void ar71xx_device_set_pll_ge(int unit, int speed, uint32_t pll) 85285834Sed{ 86285834Sed ar71xx_cpu_ops->ar71xx_chip_set_pll_ge(unit, speed, pll); 87285834Sed} 88285834Sed 89285834Sedstatic inline void ar71xx_device_set_mii_speed(int unit, int speed) 90285834Sed{ 91285834Sed ar71xx_cpu_ops->ar71xx_chip_set_mii_speed(unit, speed); 92285834Sed} 93285834Sed 94285834Sedstatic inline void ar71xx_device_set_mii_if(int unit, ar71xx_mii_mode mii_cfg) 95285834Sed{ 96285834Sed ar71xx_cpu_ops->ar71xx_chip_set_mii_if(unit, mii_cfg); 97285834Sed} 98285834Sed 99285834Sedstatic inline void ar71xx_device_flush_ddr_ge(int unit) 100285834Sed{ 101285834Sed ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ge(unit); 102285307Sed} 103285307Sed 104285307Sedstatic inline uint32_t ar71xx_device_get_eth_pll(unsigned int unit, int speed) 105285307Sed{ 106285596Sed return (ar71xx_cpu_ops->ar71xx_chip_get_eth_pll(unit, speed)); 107285307Sed} 108285596Sed 109285596Sedstatic inline void ar71xx_init_usb_peripheral(void) 110285596Sed{ 111285596Sed ar71xx_cpu_ops->ar71xx_chip_init_usb_peripheral(); 112285596Sed} 113285596Sed 114285596Sedstatic inline void ar71xx_device_ddr_flush_ip2(void) 115285596Sed{ 116285596Sed ar71xx_cpu_ops->ar71xx_chip_ddr_flush_ip2(); 117285596Sed} 118285596Sed 119285596Sed/* XXX shouldn't be here! */ 120285596Sedextern uint32_t u_ar71xx_refclk; 121285596Sedextern uint32_t u_ar71xx_cpu_freq; 122285596Sedextern uint32_t u_ar71xx_ahb_freq; 123285596Sedextern uint32_t u_ar71xx_ddr_freq; 124285596Sedextern uint32_t u_ar71xx_uart_freq; 125285596Sedextern uint32_t u_ar71xx_wdt_freq; 126285596Sed 127285596Sedstatic inline uint64_t ar71xx_refclk(void) { return u_ar71xx_refclk; } 128285596Sedstatic inline uint64_t ar71xx_cpu_freq(void) { return u_ar71xx_cpu_freq; } 129285596Sedstatic inline uint64_t ar71xx_ahb_freq(void) { return u_ar71xx_ahb_freq; } 130285596Sedstatic inline uint64_t ar71xx_ddr_freq(void) { return u_ar71xx_ddr_freq; } 131285596Sedstatic inline uint64_t ar71xx_uart_freq(void) { return u_ar71xx_uart_freq; } 132285307Sedstatic inline uint64_t ar71xx_wdt_freq(void) { return u_ar71xx_wdt_freq; } 133285307Sed 134285307Sed#endif 135285307Sed