if_admswvar.h revision 199762
1/* $NetBSD: if_admswvar.h,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */
2
3/*-
4 * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or
8 * without modification, are permitted provided that the following
9 * conditions are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above
13 *    copyright notice, this list of conditions and the following
14 *    disclaimer in the documentation and/or other materials provided
15 *    with the distribution.
16 * 3. The names of the authors may not be used to endorse or promote
17 *    products derived from this software without specific prior
18 *    written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
23 * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
25 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
27 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
29 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 * OF SUCH DAMAGE.
32 */
33#ifndef	_IF_ADMSWVAR_H_
34#define	_IF_ADMSWVAR_H_
35
36#include <sys/cdefs.h>
37__FBSDID("$FreeBSD: head/sys/mips/adm5120/if_admswvar.h 199762 2009-11-24 18:34:47Z jhb $");
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/bus.h>
42#include <sys/kernel.h>
43#include <sys/mbuf.h>
44#include <sys/malloc.h>
45#include <sys/module.h>
46#include <sys/rman.h>
47#include <sys/socket.h>
48#include <sys/sockio.h>
49#include <sys/sysctl.h>
50#include <machine/bus.h>
51
52#include <net/ethernet.h>
53#include <net/if.h>
54#include <net/if_arp.h>
55#include <net/if_dl.h>
56#include <net/if_media.h>
57#include <net/if_mib.h>
58#include <net/if_types.h>
59
60#ifdef INET
61#include <netinet/in.h>
62#include <netinet/in_systm.h>
63#include <netinet/in_var.h>
64#include <netinet/ip.h>
65#endif
66
67#include <net/bpf.h>
68#include <net/bpfdesc.h>
69
70#include <dev/mii/mii.h>
71#include <dev/mii/miivar.h>
72
73#include <mips/adm5120/adm5120reg.h>
74#include <mips/adm5120/if_admswreg.h>
75
76#define	MAC_BUFLEN	0x07ff
77
78#define	ADMSW_NTXHDESC	4
79#define	ADMSW_NRXHDESC	32
80#define	ADMSW_NTXLDESC	32
81#define	ADMSW_NRXLDESC	32
82
83#define	ADMSW_NTXHDESC_MASK	(ADMSW_NTXHDESC - 1)
84#define	ADMSW_NRXHDESC_MASK	(ADMSW_NRXHDESC - 1)
85#define	ADMSW_NTXLDESC_MASK	(ADMSW_NTXLDESC - 1)
86#define	ADMSW_NRXLDESC_MASK	(ADMSW_NRXLDESC - 1)
87
88#define	ADMSW_NEXTTXH(x)	(((x) + 1) & ADMSW_NTXHDESC_MASK)
89#define	ADMSW_NEXTRXH(x)	(((x) + 1) & ADMSW_NRXHDESC_MASK)
90#define	ADMSW_NEXTTXL(x)	(((x) + 1) & ADMSW_NTXLDESC_MASK)
91#define	ADMSW_NEXTRXL(x)	(((x) + 1) & ADMSW_NRXLDESC_MASK)
92
93#define	ADMSW_IRQ	9
94
95struct admsw_control_data {
96	/* The transmit descriptors. */
97	struct admsw_desc acd_txhdescs[ADMSW_NTXHDESC];
98
99	/* The receive descriptors. */
100	struct admsw_desc acd_rxhdescs[ADMSW_NRXHDESC];
101
102	/* The transmit descriptors. */
103	struct admsw_desc acd_txldescs[ADMSW_NTXLDESC];
104
105	/* The receive descriptors. */
106	struct admsw_desc acd_rxldescs[ADMSW_NRXLDESC];
107};
108
109#define	ADMSW_CDOFF(x)		offsetof(struct admsw_control_data, x)
110#define	ADMSW_CDTXHOFF(x)	ADMSW_CDOFF(acd_txhdescs[(x)])
111#define	ADMSW_CDTXLOFF(x)	ADMSW_CDOFF(acd_txldescs[(x)])
112#define	ADMSW_CDRXHOFF(x)	ADMSW_CDOFF(acd_rxhdescs[(x)])
113#define	ADMSW_CDRXLOFF(x)	ADMSW_CDOFF(acd_rxldescs[(x)])
114
115struct admsw_descsoft {
116	struct mbuf *ds_mbuf;
117	bus_dmamap_t ds_dmamap;
118	/* Up to 2 segments */
119	uint32_t ds_addr[2];
120	uint32_t ds_len[2];
121	uint32_t ds_nsegs;
122};
123
124/*
125 * Software state per device.
126 */
127struct admsw_softc {
128	device_t	 sc_dev;	/* generic device information */
129	uint8_t		 sc_enaddr[ETHER_ADDR_LEN];
130	bus_dma_tag_t	 sc_control_dmat;
131					/* bus DMA tag for control structs*/
132	bus_dma_tag_t	 sc_bufs_dmat;	/* bus DMA tag for buffers */
133	struct ifmedia	 sc_ifmedia[SW_DEVS];
134	int		 ndevs;		/* number of IFF_RUNNING interfaces */
135	struct ifnet	*sc_ifnet[SW_DEVS];
136	struct callout	 sc_watchdog;
137	int		 sc_timer;
138					/* Ethernet common data */
139	void		*sc_ih;		/* interrupt cookie */
140	struct resource	*irq_res;
141	struct resource	*mem_res;
142	bus_dmamap_t	 sc_cddmamap;	/* control data DMA map */
143	uint32_t	 sc_cddma;
144	struct admsw_control_data *sc_control_data;
145
146	struct admsw_descsoft sc_txhsoft[ADMSW_NTXHDESC];
147	struct admsw_descsoft sc_rxhsoft[ADMSW_NRXHDESC];
148	struct admsw_descsoft sc_txlsoft[ADMSW_NTXLDESC];
149	struct admsw_descsoft sc_rxlsoft[ADMSW_NRXLDESC];
150#define	sc_txhdescs	sc_control_data->acd_txhdescs
151#define	sc_rxhdescs	sc_control_data->acd_rxhdescs
152#define	sc_txldescs	sc_control_data->acd_txldescs
153#define	sc_rxldescs	sc_control_data->acd_rxldescs
154
155	int sc_txfree;			/* number of free Tx descriptors */
156	int sc_txnext;			/* next Tx descriptor to use */
157	int sc_txdirty;			/* first dirty Tx descriptor */
158	int sc_rxptr;			/* next ready Rx descriptor */
159};
160
161#define	ADMSW_CDTXHADDR(sc, x)	((sc)->sc_cddma + ADMSW_CDTXHOFF((x)))
162#define	ADMSW_CDTXLADDR(sc, x)	((sc)->sc_cddma + ADMSW_CDTXLOFF((x)))
163#define	ADMSW_CDRXHADDR(sc, x)	((sc)->sc_cddma + ADMSW_CDRXHOFF((x)))
164#define	ADMSW_CDRXLADDR(sc, x)	((sc)->sc_cddma + ADMSW_CDRXLOFF((x)))
165
166#define	ADMSW_CDTXHSYNC(sc, x, ops)					\
167	bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops))
168
169#define	ADMSW_CDTXLSYNC(sc, x, ops)					\
170	bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops))
171
172#define	ADMSW_CDRXHSYNC(sc, x, ops)					\
173	bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops))
174
175#define	ADMSW_CDRXLSYNC(sc, x, ops)					\
176	bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops))
177
178#define	ADMSW_INIT_RXHDESC(sc, x)				\
179do {								\
180	struct admsw_descsoft *__ds = &(sc)->sc_rxhsoft[(x)];	\
181	struct admsw_desc *__desc = &(sc)->sc_rxhdescs[(x)];	\
182	struct mbuf *__m = __ds->ds_mbuf;			\
183								\
184	__m->m_data = __m->m_ext.ext_buf + 2;			\
185	__desc->data = __ds->ds_addr[0] + 2;	\
186	__desc->cntl = 0;					\
187	__desc->len = min(MCLBYTES - 2, MAC_BUFLEN - 2);	\
188	__desc->status = 0;					\
189	if ((x) == ADMSW_NRXHDESC - 1)				\
190		__desc->data |= ADM5120_DMA_RINGEND;		\
191	__desc->data |= ADM5120_DMA_OWN;			\
192	ADMSW_CDRXHSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
193} while (0)
194
195#define	ADMSW_INIT_RXLDESC(sc, x)				\
196do {								\
197	struct admsw_descsoft *__ds = &(sc)->sc_rxlsoft[(x)];	\
198	struct admsw_desc *__desc = &(sc)->sc_rxldescs[(x)];	\
199	struct mbuf *__m = __ds->ds_mbuf;			\
200								\
201	__m->m_data = __m->m_ext.ext_buf + 2;			\
202	__desc->data = __ds->ds_addr[0] + 2;	\
203	__desc->cntl = 0;					\
204	__desc->len = min(MCLBYTES - 2, MAC_BUFLEN - 2);	\
205	__desc->status = 0;					\
206	if ((x) == ADMSW_NRXLDESC - 1)				\
207		__desc->data |= ADM5120_DMA_RINGEND;		\
208	__desc->data |= ADM5120_DMA_OWN;			\
209	ADMSW_CDRXLSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
210} while (0)
211
212void admwdog_attach(struct admsw_softc *);
213
214#endif /* _IF_ADMSWVAR_H_ */
215