isareg.h revision 146135
1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 4. Neither the name of the University nor the names of its contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 *	from: @(#)isa.h	5.7 (Berkeley) 5/9/91
33 * $FreeBSD: head/sys/isa/isareg.h 146135 2005-05-12 12:36:31Z nyan $
34 */
35
36#ifdef PC98
37#error isareg.h is included from PC-9801 source
38#endif
39
40#ifndef _ISA_ISA_H_
41#define	_ISA_ISA_H_
42
43/* BEWARE:  Included in both assembler and C code */
44
45/*
46 * ISA Bus conventions
47 */
48
49/*
50 * Input / Output Port Assignments
51 */
52#ifndef IO_ISABEGIN
53#define	IO_ISABEGIN	0x000		/* 0x000 - Beginning of I/O Registers */
54
55		/* CPU Board */
56#define	IO_DMA1		0x000		/* 8237A DMA Controller #1 */
57#define	IO_ICU1		0x020		/* 8259A Interrupt Controller #1 */
58#define	IO_PMP1		0x026		/* 82347 Power Management Peripheral */
59#define	IO_TIMER1	0x040		/* 8253 Timer #1 */
60#define	IO_TIMER2	0x048		/* 8253 Timer #2 */
61#define	IO_KBD		0x060		/* 8042 Keyboard */
62#define	IO_PPI		0x061		/* Programmable Peripheral Interface */
63#define	IO_RTC		0x070		/* RTC */
64#define	IO_NMI		IO_RTC		/* NMI Control */
65#define	IO_DMAPG	0x080		/* DMA Page Registers */
66#define	IO_ICU2		0x0A0		/* 8259A Interrupt Controller #2 */
67#define	IO_DMA2		0x0C0		/* 8237A DMA Controller #2 */
68
69		/* Cards */
70					/* 0x100 - 0x16F Open */
71
72#define	IO_WD2		0x170		/* Secondary Fixed Disk Controller */
73
74#define	IO_PMP2		0x178		/* 82347 Power Management Peripheral */
75
76					/* 0x17A - 0x1EF Open */
77
78#define	IO_WD1		0x1F0		/* Primary Fixed Disk Controller */
79#define	IO_GAME		0x201		/* Game Controller */
80
81					/* 0x202 - 0x22A Open */
82
83#define	IO_ASC2		0x22B		/* AmiScan addr.grp. 2 */
84
85					/* 0x230 - 0x26A Open */
86
87#define	IO_ASC3		0x26B		/* AmiScan addr.grp. 3 */
88#define	IO_GSC1		0x270 /* -- 0x27B! GeniScan GS-4500 addr.grp. 1 */
89#define	IO_LPT2		0x278		/* Parallel Port #2 */
90
91					/* 0x280 - 0x2AA Open */
92
93#define	IO_ASC4		0x2AB		/* AmiScan addr.grp. 4 */
94
95					/* 0x2B0 - 0x2DF Open */
96
97#define	IO_GSC2		0x2E0		/* GeniScan GS-4500 addr.grp. 2 */
98#define	IO_COM4		0x2E8		/* COM4 i/o address */
99#define	IO_ASC5		0x2EB		/* AmiScan addr.grp. 5 */
100
101					/* 0x2F0 - 0x2F7 Open */
102
103#define	IO_COM2		0x2F8		/* COM2 i/o address */
104
105					/* 0x300 - 0x32A Open */
106
107#define	IO_ASC6		0x32B		/* AmiScan addr.grp. 6 */
108#define	IO_AHA0		0x330		/* adaptec 1542 default addr. */
109#define	IO_BT0		0x330		/* bustek 742a default addr. */
110#define	IO_UHA0		0x330		/* ultrastore 14f default addr. */
111#define	IO_AHA1		0x334		/* adaptec 1542 default addr. */
112#define	IO_BT1		0x334		/* bustek 742a default addr. */
113
114					/* 0x340 - 0x36A Open */
115
116#define	IO_ASC7		0x36B		/* AmiScan addr.grp. 7 */
117#define	IO_GSC3		0x370		/* GeniScan GS-4500 addr.grp. 3 */
118#define	IO_FD2		0x370		/* secondary base i/o address */
119#define	IO_LPT1		0x378		/* Parallel Port #1 */
120
121					/* 0x380 - 0x3AA Open */
122
123#define	IO_ASC8		0x3AB		/* AmiScan addr.grp. 8 */
124#define	IO_MDA		0x3B0		/* Monochome Adapter */
125#define	IO_LPT3		0x3BC		/* Monochome Adapter Printer Port */
126#define	IO_VGA		0x3C0		/* E/VGA Ports */
127#define	IO_CGA		0x3D0		/* CGA Ports */
128#define	IO_GSC4		0x3E0		/* GeniScan GS-4500 addr.grp. 4 */
129#define	IO_COM3		0x3E8		/* COM3 i/o address */
130#define	IO_ASC1		0x3EB		/* AmiScan addr.grp. 1 */
131#define	IO_FD1		0x3F0		/* primary base i/o address */
132#define	IO_COM1		0x3F8		/* COM1 i/o address */
133
134#define	IO_ISAEND	0x3FF		/* End (actually Max) of I/O Regs */
135#endif /* !IO_ISABEGIN */
136
137/*
138 * Input / Output Port Sizes - these are from several sources, and tend
139 * to be the larger of what was found.
140 */
141#ifndef	IO_ISASIZES
142#define	IO_ISASIZES
143
144#define	IO_ASCSIZE	5		/* AmiScan GI1904-based hand scanner */
145#define	IO_CGASIZE	12		/* CGA controllers */
146#define	IO_DMASIZE	16		/* 8237 DMA controllers */
147#define	IO_DPGSIZE	32		/* 74LS612 DMA page registers */
148#define	IO_EISASIZE	256		/* EISA controllers */
149#define	IO_FDCSIZE	8		/* Nec765 floppy controllers */
150#define	IO_GAMSIZE	16		/* AT compatible game controllers */
151#define	IO_GSCSIZE	8		/* GeniScan GS-4500G hand scanner */
152#define	IO_ICUSIZE	16		/* 8259A interrupt controllers */
153#define	IO_KBDSIZE	16		/* 8042 Keyboard controllers */
154
155/* The following line was changed to support more architectures (simpler
156   chipsets (like those for Alpha) only use 4, but more complex controllers
157   (usually modern i386's) can use an additional 4; the probe to see if
158   the additional 4 can be used by the specific chipset is now done in the ppc
159   code by ppc_probe()... */
160
161#define IO_LPTSIZE_EXTENDED	8	/* "Extended" LPT controllers */
162#define IO_LPTSIZE_NORMAL	4	/* "Normal" LPT controllers */
163
164#define	IO_MDASIZE	12		/* Monochrome display controllers */
165#define	IO_PMPSIZE	2		/* 82347 power management peripheral */
166#define	IO_PSMSIZE	5		/* 8042 Keyboard controllers */
167#define	IO_RTCSIZE	16		/* CMOS real time clock, NMI control */
168#define	IO_TMRSIZE	16		/* 8253 programmable timers */
169#define	IO_VGASIZE	16		/* VGA controllers */
170#define	IO_WDCSIZE	8		/* WD compatible disk controllers */
171
172#endif /* !IO_ISASIZES */
173
174/*
175 * Input / Output Memory Physical Addresses
176 */
177#ifndef	IOM_BEGIN
178#define	IOM_BEGIN	0x0A0000	/* Start of I/O Memory "hole" */
179#define	IOM_END		0x100000	/* End of I/O Memory "hole" */
180#define	IOM_SIZE	(IOM_END - IOM_BEGIN)
181#endif /* !IOM_BEGIN */
182
183/*
184 * RAM Physical Address Space (ignoring the above mentioned "hole")
185 */
186#ifndef	RAM_BEGIN
187#define	RAM_BEGIN	0x0000000	/* Start of RAM Memory */
188#define	RAM_END		0x1000000	/* End of RAM Memory */
189#define	RAM_SIZE	(RAM_END - RAM_BEGIN)
190#endif /* !RAM_BEGIN */
191
192#endif /* !_ISA_ISA_H_ */
193