npx.c revision 51498
1180740Sdes/*- 2180740Sdes * Copyright (c) 1990 William Jolitz. 3197679Sdes * Copyright (c) 1991 The Regents of the University of California. 4197679Sdes * All rights reserved. 5197679Sdes * 6180740Sdes * Redistribution and use in source and binary forms, with or without 7180740Sdes * modification, are permitted provided that the following conditions 8180740Sdes * are met: 9180740Sdes * 1. Redistributions of source code must retain the above copyright 10180740Sdes * notice, this list of conditions and the following disclaimer. 11180740Sdes * 2. Redistributions in binary form must reproduce the above copyright 12180740Sdes * notice, this list of conditions and the following disclaimer in the 13180746Sdes * documentation and/or other materials provided with the distribution. 14180746Sdes * 3. All advertising materials mentioning features or use of this software 15180746Sdes * must display the following acknowledgement: 16180740Sdes * This product includes software developed by the University of 17180740Sdes * California, Berkeley and its contributors. 18180740Sdes * 4. Neither the name of the University nor the names of its contributors 19180740Sdes * may be used to endorse or promote products derived from this software 20180740Sdes * without specific prior written permission. 21180740Sdes * 22180740Sdes * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23180740Sdes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24180740Sdes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25180740Sdes * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26180740Sdes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27180740Sdes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28180746Sdes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29180746Sdes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30180746Sdes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31180740Sdes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32180740Sdes * SUCH DAMAGE. 33180740Sdes * 34180740Sdes * from: @(#)npx.c 7.2 (Berkeley) 5/12/91 35180740Sdes * $FreeBSD: head/sys/i386/isa/npx.c 51498 1999-09-21 10:51:47Z phk $ 36180740Sdes */ 37180740Sdes 38180740Sdes#include "npx.h" 39180740Sdes#if NNPX > 0 40180740Sdes 41180740Sdes#include "opt_debug_npx.h" 42180740Sdes#include "opt_math_emulate.h" 43180740Sdes 44180750Sdes#include <sys/param.h> 45180750Sdes#include <sys/systm.h> 46180750Sdes#include <sys/bus.h> 47180740Sdes#include <sys/kernel.h> 48180740Sdes#include <sys/malloc.h> 49180740Sdes#include <sys/module.h> 50180740Sdes#include <sys/sysctl.h> 51180740Sdes#include <sys/proc.h> 52180740Sdes#include <machine/bus.h> 53180740Sdes#include <sys/rman.h> 54180740Sdes#ifdef NPX_DEBUG 55180740Sdes#include <sys/syslog.h> 56180740Sdes#endif 57180740Sdes#include <sys/signalvar.h> 58180740Sdes 59180740Sdes#ifndef SMP 60180740Sdes#include <machine/asmacros.h> 61180740Sdes#endif 62180740Sdes#include <machine/cputypes.h> 63180740Sdes#include <machine/frame.h> 64180740Sdes#include <machine/ipl.h> 65180740Sdes#include <machine/md_var.h> 66180740Sdes#include <machine/pcb.h> 67180740Sdes#include <machine/psl.h> 68180746Sdes#ifndef SMP 69180746Sdes#include <machine/clock.h> 70180746Sdes#endif 71180740Sdes#include <machine/resource.h> 72180740Sdes#include <machine/specialreg.h> 73180740Sdes#include <machine/segments.h> 74197679Sdes 75197679Sdes#ifndef SMP 76197679Sdes#include <i386/isa/icu.h> 77180740Sdes#include <i386/isa/intr_machdep.h> 78180740Sdes#include <i386/isa/isa.h> 79180740Sdes#endif 80180740Sdes 81180740Sdes/* 82180740Sdes * 387 and 287 Numeric Coprocessor Extension (NPX) Driver. 83180740Sdes */ 84180740Sdes 85180740Sdes/* Configuration flags. */ 86180740Sdes#define NPX_DISABLE_I586_OPTIMIZED_BCOPY (1 << 0) 87180740Sdes#define NPX_DISABLE_I586_OPTIMIZED_BZERO (1 << 1) 88180740Sdes#define NPX_DISABLE_I586_OPTIMIZED_COPYIO (1 << 2) 89180740Sdes#define NPX_PREFER_EMULATOR (1 << 3) 90180740Sdes 91180740Sdes#ifdef __GNUC__ 92180740Sdes 93180740Sdes#define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr))) 94180740Sdes#define fnclex() __asm("fnclex") 95180740Sdes#define fninit() __asm("fninit") 96180740Sdes#define fnop() __asm("fnop") 97180740Sdes#define fnsave(addr) __asm __volatile("fnsave %0" : "=m" (*(addr))) 98180740Sdes#define fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr))) 99180740Sdes#define fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr))) 100180740Sdes#define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fnop") 101180740Sdes#define frstor(addr) __asm("frstor %0" : : "m" (*(addr))) 102180740Sdes#define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \ 103180740Sdes : : "n" (CR0_TS) : "ax") 104180740Sdes#define stop_emulating() __asm("clts") 105180740Sdes 106180740Sdes#else /* not __GNUC__ */ 107180740Sdes 108180740Sdesvoid fldcw __P((caddr_t addr)); 109180740Sdesvoid fnclex __P((void)); 110180740Sdesvoid fninit __P((void)); 111180740Sdesvoid fnop __P((void)); 112180740Sdesvoid fnsave __P((caddr_t addr)); 113180740Sdesvoid fnstcw __P((caddr_t addr)); 114180740Sdesvoid fnstsw __P((caddr_t addr)); 115180740Sdesvoid fp_divide_by_0 __P((void)); 116180740Sdesvoid frstor __P((caddr_t addr)); 117180740Sdesvoid start_emulating __P((void)); 118180740Sdesvoid stop_emulating __P((void)); 119180740Sdes 120180740Sdes#endif /* __GNUC__ */ 121180740Sdes 122180740Sdestypedef u_char bool_t; 123180740Sdes 124180740Sdesstatic int npx_attach __P((device_t dev)); 125180740Sdes void npx_intr __P((void *)); 126180740Sdesstatic void npx_identify __P((driver_t *driver, device_t parent)); 127180740Sdesstatic int npx_probe __P((device_t dev)); 128180740Sdesstatic int npx_probe1 __P((device_t dev)); 129180740Sdes#ifdef I586_CPU 130180740Sdesstatic long timezero __P((const char *funcname, 131197679Sdes void (*func)(void *buf, size_t len))); 132180750Sdes#endif /* I586_CPU */ 133180750Sdes 134197679Sdesint hw_float; /* XXX currently just alias for npx_exists */ 135197679Sdes 136197679SdesSYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint, 137180740Sdes CTLFLAG_RD, &hw_float, 0, 138180740Sdes "Floatingpoint instructions executed in hardware"); 139180740Sdes 140180740Sdes#ifndef SMP 141180740Sdesstatic u_int npx0_imask = SWI_CLOCK_MASK; 142180740Sdesstatic struct gate_descriptor npx_idt_probeintr; 143180740Sdesstatic int npx_intrno; 144180740Sdesstatic volatile u_int npx_intrs_while_probing; 145180740Sdesstatic volatile u_int npx_traps_while_probing; 146180740Sdes#endif 147180740Sdes 148180740Sdesstatic bool_t npx_ex16; 149180740Sdesstatic bool_t npx_exists; 150180740Sdesstatic bool_t npx_irq13; 151180740Sdesstatic int npx_irq; /* irq number */ 152180740Sdes 153180740Sdes#ifndef SMP 154180740Sdes/* 155180740Sdes * Special interrupt handlers. Someday intr0-intr15 will be used to count 156180740Sdes * interrupts. We'll still need a special exception 16 handler. The busy 157180740Sdes * latch stuff in probeintr() can be moved to npxprobe(). 158180740Sdes */ 159180740Sdesinthand_t probeintr; 160180740Sdes__asm(" \n\ 161180740Sdes .text \n\ 162180740Sdes .p2align 2,0x90 \n\ 163180740Sdes .type " __XSTRING(CNAME(probeintr)) ",@function \n\ 164180740Sdes" __XSTRING(CNAME(probeintr)) ": \n\ 165180740Sdes ss \n\ 166180740Sdes incl " __XSTRING(CNAME(npx_intrs_while_probing)) " \n\ 167180740Sdes pushl %eax \n\ 168180740Sdes movb $0x20,%al # EOI (asm in strings loses cpp features) \n\ 169180740Sdes outb %al,$0xa0 # IO_ICU2 \n\ 170180740Sdes outb %al,$0x20 # IO_ICU1 \n\ 171180740Sdes movb $0,%al \n\ 172180740Sdes outb %al,$0xf0 # clear BUSY# latch \n\ 173180750Sdes popl %eax \n\ 174180750Sdes iret \n\ 175180750Sdes"); 176180750Sdes 177180750Sdesinthand_t probetrap; 178180750Sdes__asm(" \n\ 179180740Sdes .text \n\ 180180740Sdes .p2align 2,0x90 \n\ 181180740Sdes .type " __XSTRING(CNAME(probetrap)) ",@function \n\ 182180740Sdes" __XSTRING(CNAME(probetrap)) ": \n\ 183180740Sdes ss \n\ 184180740Sdes incl " __XSTRING(CNAME(npx_traps_while_probing)) " \n\ 185180744Sdes fnclex \n\ 186180744Sdes iret \n\ 187180744Sdes"); 188180740Sdes#endif /* SMP */ 189180740Sdes 190180740Sdes/* 191180746Sdes * Identify routine. Create a connection point on our parent for probing. 192180746Sdes */ 193180746Sdesstatic void 194180740Sdesnpx_identify(driver, parent) 195180740Sdes driver_t *driver; 196180740Sdes device_t parent; 197180740Sdes{ 198180740Sdes device_t child; 199180740Sdes 200180740Sdes child = BUS_ADD_CHILD(parent, 0, "npx", 0); 201180740Sdes if (child == NULL) 202180740Sdes panic("npx_identify"); 203180740Sdes} 204180740Sdes 205180740Sdes/* 206180740Sdes * Probe routine. Initialize cr0 to give correct behaviour for [f]wait 207180740Sdes * whether the device exists or not (XXX should be elsewhere). Set flags 208180740Sdes * to tell npxattach() what to do. Modify device struct if npx doesn't 209180740Sdes * need to use interrupts. Return 1 if device exists. 210180740Sdes */ 211180740Sdesstatic int 212180740Sdesnpx_probe(dev) 213180740Sdes device_t dev; 214180740Sdes{ 215180740Sdes#ifdef SMP 216180740Sdes 217180740Sdes if (resource_int_value("npx", 0, "irq", &npx_irq) != 0) 218180740Sdes npx_irq = 13; 219180740Sdes return npx_probe1(dev); 220180740Sdes 221180740Sdes#else /* SMP */ 222180740Sdes 223180740Sdes int result; 224180740Sdes u_long save_eflags; 225180740Sdes u_char save_icu1_mask; 226180740Sdes u_char save_icu2_mask; 227180740Sdes struct gate_descriptor save_idt_npxintr; 228180740Sdes struct gate_descriptor save_idt_npxtrap; 229180740Sdes /* 230180740Sdes * This routine is now just a wrapper for npxprobe1(), to install 231180740Sdes * special npx interrupt and trap handlers, to enable npx interrupts 232180740Sdes * and to disable other interrupts. Someday isa_configure() will 233180740Sdes * install suitable handlers and run with interrupts enabled so we 234180740Sdes * won't need to do so much here. 235180740Sdes */ 236180740Sdes if (resource_int_value("npx", 0, "irq", &npx_irq) != 0) 237180740Sdes npx_irq = 13; 238180740Sdes npx_intrno = NRSVIDT + npx_irq; 239180740Sdes save_eflags = read_eflags(); 240180740Sdes disable_intr(); 241180740Sdes save_icu1_mask = inb(IO_ICU1 + 1); 242180740Sdes save_icu2_mask = inb(IO_ICU2 + 1); 243180740Sdes save_idt_npxintr = idt[npx_intrno]; 244180740Sdes save_idt_npxtrap = idt[16]; 245180740Sdes outb(IO_ICU1 + 1, ~IRQ_SLAVE); 246180740Sdes outb(IO_ICU2 + 1, ~(1 << (npx_irq - 8))); 247180740Sdes setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 248180740Sdes setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 249180740Sdes npx_idt_probeintr = idt[npx_intrno]; 250180740Sdes enable_intr(); 251180740Sdes result = npx_probe1(dev); 252180740Sdes disable_intr(); 253180740Sdes outb(IO_ICU1 + 1, save_icu1_mask); 254180740Sdes outb(IO_ICU2 + 1, save_icu2_mask); 255180740Sdes idt[npx_intrno] = save_idt_npxintr; 256180740Sdes idt[16] = save_idt_npxtrap; 257180740Sdes write_eflags(save_eflags); 258180740Sdes return (result); 259180740Sdes 260180740Sdes#endif /* SMP */ 261180740Sdes} 262180740Sdes 263180740Sdesstatic int 264180740Sdesnpx_probe1(dev) 265180740Sdes device_t dev; 266180744Sdes{ 267180744Sdes#ifndef SMP 268180744Sdes u_short control; 269180744Sdes u_short status; 270180744Sdes#endif 271180744Sdes 272180744Sdes /* 273180744Sdes * Partially reset the coprocessor, if any. Some BIOS's don't reset 274180740Sdes * it after a warm boot. 275180740Sdes */ 276180740Sdes outb(0xf1, 0); /* full reset on some systems, NOP on others */ 277180740Sdes outb(0xf0, 0); /* clear BUSY# latch */ 278180740Sdes /* 279180740Sdes * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 280180740Sdes * instructions. We must set the CR0_MP bit and use the CR0_TS 281180740Sdes * bit to control the trap, because setting the CR0_EM bit does 282180740Sdes * not cause WAIT instructions to trap. It's important to trap 283180740Sdes * WAIT instructions - otherwise the "wait" variants of no-wait 284180740Sdes * control instructions would degenerate to the "no-wait" variants 285180740Sdes * after FP context switches but work correctly otherwise. It's 286180740Sdes * particularly important to trap WAITs when there is no NPX - 287180740Sdes * otherwise the "wait" variants would always degenerate. 288180740Sdes * 289180740Sdes * Try setting CR0_NE to get correct error reporting on 486DX's. 290180740Sdes * Setting it should fail or do nothing on lesser processors. 291180740Sdes */ 292180740Sdes load_cr0(rcr0() | CR0_MP | CR0_NE); 293180740Sdes /* 294180740Sdes * But don't trap while we're probing. 295180740Sdes */ 296180740Sdes stop_emulating(); 297180740Sdes /* 298180740Sdes * Finish resetting the coprocessor, if any. If there is an error 299180740Sdes * pending, then we may get a bogus IRQ13, but probeintr() will handle 300180740Sdes * it OK. Bogus halts have never been observed, but we enabled 301180740Sdes * IRQ13 and cleared the BUSY# latch early to handle them anyway. 302180740Sdes */ 303180740Sdes fninit(); 304180740Sdes 305180740Sdes#ifdef SMP 306180740Sdes /* 307180740Sdes * Exception 16 MUST work for SMP. 308180740Sdes */ 309180740Sdes npx_irq13 = 0; 310180740Sdes npx_ex16 = hw_float = npx_exists = 1; 311180740Sdes device_set_desc(dev, "math processor"); 312180740Sdes return (0); 313180740Sdes 314180740Sdes#else /* !SMP */ 315180740Sdes device_set_desc(dev, "math processor"); 316180740Sdes 317180740Sdes /* 318180740Sdes * Don't use fwait here because it might hang. 319180740Sdes * Don't use fnop here because it usually hangs if there is no FPU. 320180740Sdes */ 321180740Sdes DELAY(1000); /* wait for any IRQ13 */ 322180740Sdes#ifdef DIAGNOSTIC 323180740Sdes if (npx_intrs_while_probing != 0) 324180740Sdes printf("fninit caused %u bogus npx interrupt(s)\n", 325180740Sdes npx_intrs_while_probing); 326180740Sdes if (npx_traps_while_probing != 0) 327180740Sdes printf("fninit caused %u bogus npx trap(s)\n", 328180740Sdes npx_traps_while_probing); 329180740Sdes#endif 330180740Sdes /* 331180740Sdes * Check for a status of mostly zero. 332180740Sdes */ 333180740Sdes status = 0x5a5a; 334180740Sdes fnstsw(&status); 335180740Sdes if ((status & 0xb8ff) == 0) { 336180740Sdes /* 337180740Sdes * Good, now check for a proper control word. 338180740Sdes */ 339180740Sdes control = 0x5a5a; 340180740Sdes fnstcw(&control); 341180740Sdes if ((control & 0x1f3f) == 0x033f) { 342180740Sdes hw_float = npx_exists = 1; 343180740Sdes /* 344180740Sdes * We have an npx, now divide by 0 to see if exception 345180740Sdes * 16 works. 346180740Sdes */ 347180740Sdes control &= ~(1 << 2); /* enable divide by 0 trap */ 348180740Sdes fldcw(&control); 349180740Sdes npx_traps_while_probing = npx_intrs_while_probing = 0; 350180740Sdes fp_divide_by_0(); 351180740Sdes if (npx_traps_while_probing != 0) { 352180740Sdes /* 353180750Sdes * Good, exception 16 works. 354180750Sdes */ 355180750Sdes npx_ex16 = 1; 356180740Sdes return (0); 357180740Sdes } 358180740Sdes if (npx_intrs_while_probing != 0) { 359180750Sdes int rid; 360180750Sdes struct resource *r; 361180750Sdes void *intr; 362180750Sdes /* 363180750Sdes * Bad, we are stuck with IRQ13. 364180750Sdes */ 365180750Sdes npx_irq13 = 1; 366180750Sdes /* 367180750Sdes * npxattach would be too late to set npx0_imask 368180740Sdes */ 369180740Sdes npx0_imask |= (1 << npx_irq); 370180740Sdes 371180740Sdes /* 372180740Sdes * We allocate these resources permanently, 373180740Sdes * so there is no need to keep track of them. 374180740Sdes */ 375180740Sdes rid = 0; 376180740Sdes r = bus_alloc_resource(dev, SYS_RES_IOPORT, 377180740Sdes &rid, IO_NPX, IO_NPX, 378180740Sdes IO_NPXSIZE, RF_ACTIVE); 379180740Sdes if (r == 0) 380180740Sdes panic("npx: can't get ports"); 381180740Sdes rid = 0; 382180740Sdes r = bus_alloc_resource(dev, SYS_RES_IRQ, 383180740Sdes &rid, npx_irq, npx_irq, 384180740Sdes 1, RF_ACTIVE); 385180740Sdes if (r == 0) 386180740Sdes panic("npx: can't get IRQ"); 387180740Sdes BUS_SETUP_INTR(device_get_parent(dev), 388180740Sdes dev, r, INTR_TYPE_MISC, 389180746Sdes npx_intr, 0, &intr); 390180746Sdes if (intr == 0) 391180746Sdes panic("npx: can't create intr"); 392192595Sdes 393192595Sdes return (0); 394192595Sdes } 395180740Sdes /* 396180740Sdes * Worse, even IRQ13 is broken. Use emulator. 397180740Sdes */ 398180740Sdes } 399180740Sdes } 400180740Sdes /* 401180740Sdes * Probe failed, but we want to get to npxattach to initialize the 402180740Sdes * emulator and say that it has been installed. XXX handle devices 403180740Sdes * that aren't really devices better. 404180740Sdes */ 405180740Sdes return (0); 406180740Sdes#endif /* SMP */ 407180740Sdes} 408180740Sdes 409180740Sdes/* 410180740Sdes * Attach routine - announce which it is, and wire into system 411180740Sdes */ 412180740Sdesint 413180740Sdesnpx_attach(dev) 414180740Sdes device_t dev; 415180740Sdes{ 416180744Sdes int flags; 417180744Sdes 418180744Sdes if (resource_int_value("npx", 0, "flags", &flags) != 0) 419180740Sdes flags = 0; 420180740Sdes 421180740Sdes device_print_prettyname(dev); 422180740Sdes if (flags) 423180740Sdes printf("flags 0x%x ", flags); 424180740Sdes if (npx_irq13) { 425180740Sdes printf("using IRQ 13 interface\n"); 426180740Sdes } else { 427180740Sdes#if defined(MATH_EMULATE) || defined(GPL_MATH_EMULATE) 428180740Sdes if (npx_ex16) { 429180740Sdes if (!(flags & NPX_PREFER_EMULATOR)) 430180740Sdes printf("INT 16 interface\n"); 431180740Sdes else { 432180740Sdes printf("FPU exists, but flags request " 433180740Sdes "emulator\n"); 434180740Sdes hw_float = npx_exists = 0; 435180740Sdes } 436180740Sdes } else if (npx_exists) { 437180740Sdes printf("error reporting broken; using 387 emulator\n"); 438180740Sdes hw_float = npx_exists = 0; 439180740Sdes } else 440180740Sdes printf("387 emulator\n"); 441180740Sdes#else 442180740Sdes if (npx_ex16) { 443180740Sdes printf("INT 16 interface\n"); 444180740Sdes if (flags & NPX_PREFER_EMULATOR) { 445180740Sdes printf("emulator requested, but none compiled " 446180740Sdes "into kernel, using FPU\n"); 447180740Sdes } 448180740Sdes } else 449180740Sdes printf("no 387 emulator in kernel and no FPU!\n"); 450180740Sdes#endif 451180740Sdes } 452180740Sdes npxinit(__INITIAL_NPXCW__); 453180740Sdes 454180740Sdes#ifdef I586_CPU 455180740Sdes if (cpu_class == CPUCLASS_586 && npx_ex16 && npx_exists && 456180740Sdes timezero("i586_bzero()", i586_bzero) < 457180740Sdes timezero("bzero()", bzero) * 4 / 5) { 458180740Sdes if (!(flags & NPX_DISABLE_I586_OPTIMIZED_BCOPY)) { 459180740Sdes bcopy_vector = i586_bcopy; 460180740Sdes ovbcopy_vector = i586_bcopy; 461180740Sdes } 462180740Sdes if (!(flags & NPX_DISABLE_I586_OPTIMIZED_BZERO)) 463180740Sdes bzero = i586_bzero; 464180740Sdes if (!(flags & NPX_DISABLE_I586_OPTIMIZED_COPYIO)) { 465180740Sdes copyin_vector = i586_copyin; 466180740Sdes copyout_vector = i586_copyout; 467180740Sdes } 468180740Sdes } 469180740Sdes#endif 470180740Sdes 471180740Sdes return (0); /* XXX unused */ 472180740Sdes} 473180740Sdes 474180740Sdes/* 475180740Sdes * Initialize floating point unit. 476180740Sdes */ 477180740Sdesvoid 478180740Sdesnpxinit(control) 479180740Sdes u_short control; 480180740Sdes{ 481180740Sdes struct save87 dummy; 482180740Sdes 483180740Sdes if (!npx_exists) 484180740Sdes return; 485180740Sdes /* 486180740Sdes * fninit has the same h/w bugs as fnsave. Use the detoxified 487180740Sdes * fnsave to throw away any junk in the fpu. npxsave() initializes 488180740Sdes * the fpu and sets npxproc = NULL as important side effects. 489180740Sdes */ 490180740Sdes npxsave(&dummy); 491180740Sdes stop_emulating(); 492180740Sdes fldcw(&control); 493180740Sdes if (curpcb != NULL) 494180740Sdes fnsave(&curpcb->pcb_savefpu); 495180740Sdes start_emulating(); 496180740Sdes} 497180740Sdes 498180740Sdes/* 499180740Sdes * Free coprocessor (if we have it). 500180740Sdes */ 501180740Sdesvoid 502180740Sdesnpxexit(p) 503180740Sdes struct proc *p; 504180740Sdes{ 505180740Sdes 506180740Sdes if (p == npxproc) 507180740Sdes npxsave(&curpcb->pcb_savefpu); 508180740Sdes#ifdef NPX_DEBUG 509180740Sdes if (npx_exists) { 510180740Sdes u_int masked_exceptions; 511180740Sdes 512180740Sdes masked_exceptions = curpcb->pcb_savefpu.sv_env.en_cw 513180740Sdes & curpcb->pcb_savefpu.sv_env.en_sw & 0x7f; 514180740Sdes /* 515180740Sdes * Log exceptions that would have trapped with the old 516180740Sdes * control word (overflow, divide by 0, and invalid operand). 517180740Sdes */ 518180740Sdes if (masked_exceptions & 0x0d) 519180740Sdes log(LOG_ERR, 520180740Sdes "pid %d (%s) exited with masked floating point exceptions 0x%02x\n", 521180740Sdes p->p_pid, p->p_comm, masked_exceptions); 522180740Sdes } 523180740Sdes#endif 524180740Sdes} 525180740Sdes 526180740Sdes/* 527180740Sdes * The following mechanism is used to ensure that the FPE_... value 528180740Sdes * that is passed as a trapcode to the signal handler of the user 529180740Sdes * process does not have more than one bit set. 530197679Sdes * 531197679Sdes * Multiple bits may be set if the user process modifies the control 532197679Sdes * word while a status word bit is already set. While this is a sign 533180740Sdes * of bad coding, we have no choise than to narrow them down to one 534180740Sdes * bit, since we must not send a trapcode that is not exactly one of 535180740Sdes * the FPE_ macros. 536180740Sdes * 537180740Sdes * The mechanism has a static table with 127 entries. Each combination 538180740Sdes * of the 7 FPU status word exception bits directly translates to a 539180740Sdes * position in this table, where a single FPE_... value is stored. 540180740Sdes * This FPE_... value stored there is considered the "most important" 541180740Sdes * of the exception bits and will be sent as the signal code. The 542180740Sdes * precedence of the bits is based upon Intel Document "Numerical 543180740Sdes * Applications", Chapter "Special Computational Situations". 544180740Sdes * 545180740Sdes * The macro to choose one of these values does these steps: 1) Throw 546180740Sdes * away status word bits that cannot be masked. 2) Throw away the bits 547180740Sdes * currently masked in the control word, assuming the user isn't 548180746Sdes * interested in them anymore. 3) Reinsert status word bit 7 (stack 549180746Sdes * fault) if it is set, which cannot be masked but must be presered. 550180746Sdes * 4) Use the remaining bits to point into the trapcode table. 551180740Sdes * 552180740Sdes * The 6 maskable bits in order of their preference, as stated in the 553180740Sdes * above referenced Intel manual: 554180740Sdes * 1 Invalid operation (FP_X_INV) 555180740Sdes * 1a Stack underflow 556180740Sdes * 1b Stack overflow 557180740Sdes * 1c Operand of unsupported format 558180740Sdes * 1d SNaN operand. 559180740Sdes * 2 QNaN operand (not an exception, irrelavant here) 560180740Sdes * 3 Any other invalid-operation not mentioned above or zero divide 561180740Sdes * (FP_X_INV, FP_X_DZ) 562180740Sdes * 4 Denormal operand (FP_X_DNML) 563180740Sdes * 5 Numeric over/underflow (FP_X_OFL, FP_X_UFL) 564180740Sdes * 6 Inexact result (FP_X_IMP) 565180740Sdes */ 566180740Sdesstatic char fpetable[128] = { 567180740Sdes 0, 568180740Sdes FPE_FLTINV, /* 1 - INV */ 569180740Sdes FPE_FLTUND, /* 2 - DNML */ 570180740Sdes FPE_FLTINV, /* 3 - INV | DNML */ 571180740Sdes FPE_FLTDIV, /* 4 - DZ */ 572180740Sdes FPE_FLTINV, /* 5 - INV | DZ */ 573180740Sdes FPE_FLTDIV, /* 6 - DNML | DZ */ 574180740Sdes FPE_FLTINV, /* 7 - INV | DNML | DZ */ 575180740Sdes FPE_FLTOVF, /* 8 - OFL */ 576180740Sdes FPE_FLTINV, /* 9 - INV | OFL */ 577180740Sdes FPE_FLTUND, /* A - DNML | OFL */ 578180740Sdes FPE_FLTINV, /* B - INV | DNML | OFL */ 579180740Sdes FPE_FLTDIV, /* C - DZ | OFL */ 580180740Sdes FPE_FLTINV, /* D - INV | DZ | OFL */ 581180740Sdes FPE_FLTDIV, /* E - DNML | DZ | OFL */ 582180740Sdes FPE_FLTINV, /* F - INV | DNML | DZ | OFL */ 583180740Sdes FPE_FLTUND, /* 10 - UFL */ 584180740Sdes FPE_FLTINV, /* 11 - INV | UFL */ 585180740Sdes FPE_FLTUND, /* 12 - DNML | UFL */ 586180740Sdes FPE_FLTINV, /* 13 - INV | DNML | UFL */ 587180740Sdes FPE_FLTDIV, /* 14 - DZ | UFL */ 588180740Sdes FPE_FLTINV, /* 15 - INV | DZ | UFL */ 589180740Sdes FPE_FLTDIV, /* 16 - DNML | DZ | UFL */ 590180740Sdes FPE_FLTINV, /* 17 - INV | DNML | DZ | UFL */ 591180740Sdes FPE_FLTOVF, /* 18 - OFL | UFL */ 592180740Sdes FPE_FLTINV, /* 19 - INV | OFL | UFL */ 593180740Sdes FPE_FLTUND, /* 1A - DNML | OFL | UFL */ 594180740Sdes FPE_FLTINV, /* 1B - INV | DNML | OFL | UFL */ 595180740Sdes FPE_FLTDIV, /* 1C - DZ | OFL | UFL */ 596180740Sdes FPE_FLTINV, /* 1D - INV | DZ | OFL | UFL */ 597180740Sdes FPE_FLTDIV, /* 1E - DNML | DZ | OFL | UFL */ 598180740Sdes FPE_FLTINV, /* 1F - INV | DNML | DZ | OFL | UFL */ 599180740Sdes FPE_FLTRES, /* 20 - IMP */ 600180740Sdes FPE_FLTINV, /* 21 - INV | IMP */ 601180740Sdes FPE_FLTUND, /* 22 - DNML | IMP */ 602180740Sdes FPE_FLTINV, /* 23 - INV | DNML | IMP */ 603180740Sdes FPE_FLTDIV, /* 24 - DZ | IMP */ 604180740Sdes FPE_FLTINV, /* 25 - INV | DZ | IMP */ 605180740Sdes FPE_FLTDIV, /* 26 - DNML | DZ | IMP */ 606180740Sdes FPE_FLTINV, /* 27 - INV | DNML | DZ | IMP */ 607180740Sdes FPE_FLTOVF, /* 28 - OFL | IMP */ 608180740Sdes FPE_FLTINV, /* 29 - INV | OFL | IMP */ 609180740Sdes FPE_FLTUND, /* 2A - DNML | OFL | IMP */ 610180740Sdes FPE_FLTINV, /* 2B - INV | DNML | OFL | IMP */ 611180740Sdes FPE_FLTDIV, /* 2C - DZ | OFL | IMP */ 612180740Sdes FPE_FLTINV, /* 2D - INV | DZ | OFL | IMP */ 613180740Sdes FPE_FLTDIV, /* 2E - DNML | DZ | OFL | IMP */ 614180740Sdes FPE_FLTINV, /* 2F - INV | DNML | DZ | OFL | IMP */ 615180740Sdes FPE_FLTUND, /* 30 - UFL | IMP */ 616180740Sdes FPE_FLTINV, /* 31 - INV | UFL | IMP */ 617180740Sdes FPE_FLTUND, /* 32 - DNML | UFL | IMP */ 618180740Sdes FPE_FLTINV, /* 33 - INV | DNML | UFL | IMP */ 619180740Sdes FPE_FLTDIV, /* 34 - DZ | UFL | IMP */ 620180740Sdes FPE_FLTINV, /* 35 - INV | DZ | UFL | IMP */ 621180740Sdes FPE_FLTDIV, /* 36 - DNML | DZ | UFL | IMP */ 622180740Sdes FPE_FLTINV, /* 37 - INV | DNML | DZ | UFL | IMP */ 623180740Sdes FPE_FLTOVF, /* 38 - OFL | UFL | IMP */ 624180740Sdes FPE_FLTINV, /* 39 - INV | OFL | UFL | IMP */ 625180740Sdes FPE_FLTUND, /* 3A - DNML | OFL | UFL | IMP */ 626180740Sdes FPE_FLTINV, /* 3B - INV | DNML | OFL | UFL | IMP */ 627180740Sdes FPE_FLTDIV, /* 3C - DZ | OFL | UFL | IMP */ 628180740Sdes FPE_FLTINV, /* 3D - INV | DZ | OFL | UFL | IMP */ 629180740Sdes FPE_FLTDIV, /* 3E - DNML | DZ | OFL | UFL | IMP */ 630180740Sdes FPE_FLTINV, /* 3F - INV | DNML | DZ | OFL | UFL | IMP */ 631180740Sdes FPE_FLTSUB, /* 40 - STK */ 632180740Sdes FPE_FLTSUB, /* 41 - INV | STK */ 633180740Sdes FPE_FLTUND, /* 42 - DNML | STK */ 634180740Sdes FPE_FLTSUB, /* 43 - INV | DNML | STK */ 635180740Sdes FPE_FLTDIV, /* 44 - DZ | STK */ 636180740Sdes FPE_FLTSUB, /* 45 - INV | DZ | STK */ 637180740Sdes FPE_FLTDIV, /* 46 - DNML | DZ | STK */ 638180740Sdes FPE_FLTSUB, /* 47 - INV | DNML | DZ | STK */ 639180740Sdes FPE_FLTOVF, /* 48 - OFL | STK */ 640180740Sdes FPE_FLTSUB, /* 49 - INV | OFL | STK */ 641180740Sdes FPE_FLTUND, /* 4A - DNML | OFL | STK */ 642180740Sdes FPE_FLTSUB, /* 4B - INV | DNML | OFL | STK */ 643180740Sdes FPE_FLTDIV, /* 4C - DZ | OFL | STK */ 644180740Sdes FPE_FLTSUB, /* 4D - INV | DZ | OFL | STK */ 645180740Sdes FPE_FLTDIV, /* 4E - DNML | DZ | OFL | STK */ 646180740Sdes FPE_FLTSUB, /* 4F - INV | DNML | DZ | OFL | STK */ 647180740Sdes FPE_FLTUND, /* 50 - UFL | STK */ 648180740Sdes FPE_FLTSUB, /* 51 - INV | UFL | STK */ 649180740Sdes FPE_FLTUND, /* 52 - DNML | UFL | STK */ 650180740Sdes FPE_FLTSUB, /* 53 - INV | DNML | UFL | STK */ 651180740Sdes FPE_FLTDIV, /* 54 - DZ | UFL | STK */ 652180740Sdes FPE_FLTSUB, /* 55 - INV | DZ | UFL | STK */ 653180740Sdes FPE_FLTDIV, /* 56 - DNML | DZ | UFL | STK */ 654180740Sdes FPE_FLTSUB, /* 57 - INV | DNML | DZ | UFL | STK */ 655180740Sdes FPE_FLTOVF, /* 58 - OFL | UFL | STK */ 656180740Sdes FPE_FLTSUB, /* 59 - INV | OFL | UFL | STK */ 657180740Sdes FPE_FLTUND, /* 5A - DNML | OFL | UFL | STK */ 658180740Sdes FPE_FLTSUB, /* 5B - INV | DNML | OFL | UFL | STK */ 659180740Sdes FPE_FLTDIV, /* 5C - DZ | OFL | UFL | STK */ 660180740Sdes FPE_FLTSUB, /* 5D - INV | DZ | OFL | UFL | STK */ 661180740Sdes FPE_FLTDIV, /* 5E - DNML | DZ | OFL | UFL | STK */ 662180740Sdes FPE_FLTSUB, /* 5F - INV | DNML | DZ | OFL | UFL | STK */ 663180740Sdes FPE_FLTRES, /* 60 - IMP | STK */ 664180740Sdes FPE_FLTSUB, /* 61 - INV | IMP | STK */ 665180740Sdes FPE_FLTUND, /* 62 - DNML | IMP | STK */ 666180740Sdes FPE_FLTSUB, /* 63 - INV | DNML | IMP | STK */ 667180740Sdes FPE_FLTDIV, /* 64 - DZ | IMP | STK */ 668180740Sdes FPE_FLTSUB, /* 65 - INV | DZ | IMP | STK */ 669180740Sdes FPE_FLTDIV, /* 66 - DNML | DZ | IMP | STK */ 670180740Sdes FPE_FLTSUB, /* 67 - INV | DNML | DZ | IMP | STK */ 671180740Sdes FPE_FLTOVF, /* 68 - OFL | IMP | STK */ 672180740Sdes FPE_FLTSUB, /* 69 - INV | OFL | IMP | STK */ 673180740Sdes FPE_FLTUND, /* 6A - DNML | OFL | IMP | STK */ 674180740Sdes FPE_FLTSUB, /* 6B - INV | DNML | OFL | IMP | STK */ 675180740Sdes FPE_FLTDIV, /* 6C - DZ | OFL | IMP | STK */ 676180740Sdes FPE_FLTSUB, /* 6D - INV | DZ | OFL | IMP | STK */ 677180740Sdes FPE_FLTDIV, /* 6E - DNML | DZ | OFL | IMP | STK */ 678180740Sdes FPE_FLTSUB, /* 6F - INV | DNML | DZ | OFL | IMP | STK */ 679180740Sdes FPE_FLTUND, /* 70 - UFL | IMP | STK */ 680180740Sdes FPE_FLTSUB, /* 71 - INV | UFL | IMP | STK */ 681180740Sdes FPE_FLTUND, /* 72 - DNML | UFL | IMP | STK */ 682180740Sdes FPE_FLTSUB, /* 73 - INV | DNML | UFL | IMP | STK */ 683180740Sdes FPE_FLTDIV, /* 74 - DZ | UFL | IMP | STK */ 684180740Sdes FPE_FLTSUB, /* 75 - INV | DZ | UFL | IMP | STK */ 685180740Sdes FPE_FLTDIV, /* 76 - DNML | DZ | UFL | IMP | STK */ 686180740Sdes FPE_FLTSUB, /* 77 - INV | DNML | DZ | UFL | IMP | STK */ 687180744Sdes FPE_FLTOVF, /* 78 - OFL | UFL | IMP | STK */ 688180744Sdes FPE_FLTSUB, /* 79 - INV | OFL | UFL | IMP | STK */ 689180744Sdes FPE_FLTUND, /* 7A - DNML | OFL | UFL | IMP | STK */ 690180744Sdes FPE_FLTSUB, /* 7B - INV | DNML | OFL | UFL | IMP | STK */ 691180744Sdes FPE_FLTDIV, /* 7C - DZ | OFL | UFL | IMP | STK */ 692180744Sdes FPE_FLTSUB, /* 7D - INV | DZ | OFL | UFL | IMP | STK */ 693180740Sdes FPE_FLTDIV, /* 7E - DNML | DZ | OFL | UFL | IMP | STK */ 694180740Sdes FPE_FLTSUB, /* 7F - INV | DNML | DZ | OFL | UFL | IMP | STK */ 695180740Sdes}; 696180740Sdes 697180740Sdes/* 698180740Sdes * Preserve the FP status word, clear FP exceptions, then generate a SIGFPE. 699180740Sdes * 700180740Sdes * Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now 701180740Sdes * depend on longjmp() restoring a usable state. Restoring the state 702180740Sdes * or examining it might fail if we didn't clear exceptions. 703180740Sdes * 704180740Sdes * The error code chosen will be one of the FPE_... macros. It will be 705180740Sdes * sent as the second argument to old BSD-style signal handlers and as 706180740Sdes * "siginfo_t->si_code" (second argument) to SA_SIGINFO signal handlers. 707180740Sdes * 708180740Sdes * XXX the FP state is not preserved across signal handlers. So signal 709180740Sdes * handlers cannot afford to do FP unless they preserve the state or 710180740Sdes * longjmp() out. Both preserving the state and longjmp()ing may be 711180740Sdes * destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable 712180740Sdes * solution for signals other than SIGFPE. 713180740Sdes */ 714180740Sdesvoid 715180740Sdesnpx_intr(dummy) 716180740Sdes void *dummy; 717180740Sdes{ 718180740Sdes int code; 719180740Sdes u_short control; 720180740Sdes struct intrframe *frame; 721180740Sdes 722180740Sdes if (npxproc == NULL || !npx_exists) { 723180740Sdes printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 724180740Sdes npxproc, curproc, npx_exists); 725180740Sdes panic("npxintr from nowhere"); 726180740Sdes } 727180740Sdes if (npxproc != curproc) { 728180740Sdes printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 729180740Sdes npxproc, curproc, npx_exists); 730180740Sdes panic("npxintr from non-current process"); 731180740Sdes } 732180740Sdes 733180740Sdes outb(0xf0, 0); 734180740Sdes fnstsw(&curpcb->pcb_savefpu.sv_ex_sw); 735180740Sdes fnstcw(&control); 736180740Sdes fnclex(); 737180740Sdes 738180740Sdes /* 739180740Sdes * Pass exception to process. 740180740Sdes */ 741180740Sdes frame = (struct intrframe *)&dummy; /* XXX */ 742180740Sdes if ((ISPL(frame->if_cs) == SEL_UPL) || (frame->if_eflags & PSL_VM)) { 743180740Sdes /* 744180740Sdes * Interrupt is essentially a trap, so we can afford to call 745180740Sdes * the SIGFPE handler (if any) as soon as the interrupt 746180740Sdes * returns. 747180740Sdes * 748180740Sdes * XXX little or nothing is gained from this, and plenty is 749180740Sdes * lost - the interrupt frame has to contain the trap frame 750180740Sdes * (this is otherwise only necessary for the rescheduling trap 751180740Sdes * in doreti, and the frame for that could easily be set up 752180740Sdes * just before it is used). 753180740Sdes */ 754180740Sdes curproc->p_md.md_regs = INTR_TO_TRAPFRAME(frame); 755180740Sdes /* 756180740Sdes * Encode the appropriate code for detailed information on 757180740Sdes * this exception. 758180740Sdes */ 759180740Sdes code = 760180740Sdes fpetable[(curpcb->pcb_savefpu.sv_ex_sw & ~control & 0x3f) | 761180740Sdes (curpcb->pcb_savefpu.sv_ex_sw & 0x40)]; 762180740Sdes trapsignal(curproc, SIGFPE, code); 763180740Sdes } else { 764180740Sdes /* 765180740Sdes * Nested interrupt. These losers occur when: 766180740Sdes * o an IRQ13 is bogusly generated at a bogus time, e.g.: 767180740Sdes * o immediately after an fnsave or frstor of an 768180740Sdes * error state. 769180740Sdes * o a couple of 386 instructions after 770180740Sdes * "fstpl _memvar" causes a stack overflow. 771180740Sdes * These are especially nasty when combined with a 772180740Sdes * trace trap. 773180740Sdes * o an IRQ13 occurs at the same time as another higher- 774180740Sdes * priority interrupt. 775180740Sdes * 776180740Sdes * Treat them like a true async interrupt. 777180740Sdes */ 778180740Sdes psignal(curproc, SIGFPE); 779180740Sdes } 780180740Sdes} 781180740Sdes 782180740Sdes/* 783180740Sdes * Implement device not available (DNA) exception 784180740Sdes * 785180740Sdes * It would be better to switch FP context here (if curproc != npxproc) 786180740Sdes * and not necessarily for every context switch, but it is too hard to 787180740Sdes * access foreign pcb's. 788180740Sdes */ 789180740Sdesint 790180740Sdesnpxdna() 791180740Sdes{ 792180740Sdes if (!npx_exists) 793180740Sdes return (0); 794180740Sdes if (npxproc != NULL) { 795180740Sdes printf("npxdna: npxproc = %p, curproc = %p\n", 796180740Sdes npxproc, curproc); 797180740Sdes panic("npxdna"); 798180740Sdes } 799180740Sdes stop_emulating(); 800180740Sdes /* 801180740Sdes * Record new context early in case frstor causes an IRQ13. 802180740Sdes */ 803180740Sdes npxproc = curproc; 804180740Sdes curpcb->pcb_savefpu.sv_ex_sw = 0; 805180740Sdes /* 806180740Sdes * The following frstor may cause an IRQ13 when the state being 807180740Sdes * restored has a pending error. The error will appear to have been 808180740Sdes * triggered by the current (npx) user instruction even when that 809180740Sdes * instruction is a no-wait instruction that should not trigger an 810180744Sdes * error (e.g., fnclex). On at least one 486 system all of the 811180744Sdes * no-wait instructions are broken the same as frstor, so our 812180744Sdes * treatment does not amplify the breakage. On at least one 813180740Sdes * 386/Cyrix 387 system, fnclex works correctly while frstor and 814180740Sdes * fnsave are broken, so our treatment breaks fnclex if it is the 815180740Sdes * first FPU instruction after a context switch. 816180740Sdes */ 817180740Sdes frstor(&curpcb->pcb_savefpu); 818180740Sdes 819180740Sdes return (1); 820180740Sdes} 821180740Sdes 822180740Sdes/* 823180740Sdes * Wrapper for fnsave instruction to handle h/w bugs. If there is an error 824180740Sdes * pending, then fnsave generates a bogus IRQ13 on some systems. Force 825180740Sdes * any IRQ13 to be handled immediately, and then ignore it. This routine is 826180740Sdes * often called at splhigh so it must not use many system services. In 827180740Sdes * particular, it's much easier to install a special handler than to 828180740Sdes * guarantee that it's safe to use npxintr() and its supporting code. 829180740Sdes */ 830180740Sdesvoid 831180740Sdesnpxsave(addr) 832180740Sdes struct save87 *addr; 833180740Sdes{ 834180740Sdes#ifdef SMP 835180740Sdes 836180740Sdes stop_emulating(); 837180740Sdes fnsave(addr); 838180740Sdes /* fnop(); */ 839180740Sdes start_emulating(); 840180740Sdes npxproc = NULL; 841180740Sdes 842180740Sdes#else /* SMP */ 843180740Sdes 844180740Sdes u_char icu1_mask; 845180740Sdes u_char icu2_mask; 846180740Sdes u_char old_icu1_mask; 847180740Sdes u_char old_icu2_mask; 848180740Sdes struct gate_descriptor save_idt_npxintr; 849180750Sdes 850180750Sdes disable_intr(); 851180750Sdes old_icu1_mask = inb(IO_ICU1 + 1); 852180750Sdes old_icu2_mask = inb(IO_ICU2 + 1); 853180750Sdes save_idt_npxintr = idt[npx_intrno]; 854180750Sdes outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask)); 855180740Sdes outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8)); 856180740Sdes idt[npx_intrno] = npx_idt_probeintr; 857180740Sdes enable_intr(); 858180740Sdes stop_emulating(); 859180740Sdes fnsave(addr); 860180740Sdes fnop(); 861180740Sdes start_emulating(); 862180740Sdes npxproc = NULL; 863180740Sdes disable_intr(); 864180740Sdes icu1_mask = inb(IO_ICU1 + 1); /* masks may have changed */ 865180740Sdes icu2_mask = inb(IO_ICU2 + 1); 866180740Sdes outb(IO_ICU1 + 1, 867180740Sdes (icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask)); 868180740Sdes outb(IO_ICU2 + 1, 869180740Sdes (icu2_mask & ~(npx0_imask >> 8)) 870180740Sdes | (old_icu2_mask & (npx0_imask >> 8))); 871180740Sdes idt[npx_intrno] = save_idt_npxintr; 872180740Sdes enable_intr(); /* back to usual state */ 873180740Sdes 874180740Sdes#endif /* SMP */ 875180740Sdes} 876180740Sdes 877180740Sdes#ifdef I586_CPU 878180740Sdesstatic long 879180740Sdestimezero(funcname, func) 880180740Sdes const char *funcname; 881180740Sdes void (*func) __P((void *buf, size_t len)); 882180740Sdes 883180740Sdes{ 884180740Sdes void *buf; 885180740Sdes#define BUFSIZE 1000000 886180740Sdes long usec; 887180740Sdes struct timeval finish, start; 888180740Sdes 889180740Sdes buf = malloc(BUFSIZE, M_TEMP, M_NOWAIT); 890180740Sdes if (buf == NULL) 891180740Sdes return (BUFSIZE); 892180740Sdes microtime(&start); 893180740Sdes (*func)(buf, BUFSIZE); 894180740Sdes microtime(&finish); 895180740Sdes usec = 1000000 * (finish.tv_sec - start.tv_sec) + 896180740Sdes finish.tv_usec - start.tv_usec; 897180740Sdes if (usec <= 0) 898180740Sdes usec = 1; 899180740Sdes if (bootverbose) 900180740Sdes printf("%s bandwidth = %ld bytes/sec\n", 901180740Sdes funcname, (long)(BUFSIZE * (int64_t)1000000 / usec)); 902180740Sdes free(buf, M_TEMP); 903180740Sdes return (usec); 904180740Sdes} 905180740Sdes#endif /* I586_CPU */ 906180740Sdes 907180740Sdesstatic device_method_t npx_methods[] = { 908180740Sdes /* Device interface */ 909180740Sdes DEVMETHOD(device_identify, npx_identify), 910180740Sdes DEVMETHOD(device_probe, npx_probe), 911180740Sdes DEVMETHOD(device_attach, npx_attach), 912180740Sdes DEVMETHOD(device_detach, bus_generic_detach), 913180740Sdes DEVMETHOD(device_shutdown, bus_generic_shutdown), 914180740Sdes DEVMETHOD(device_suspend, bus_generic_suspend), 915192595Sdes DEVMETHOD(device_resume, bus_generic_resume), 916192595Sdes 917192595Sdes { 0, 0 } 918180740Sdes}; 919180740Sdes 920180740Sdesstatic driver_t npx_driver = { 921180740Sdes "npx", 922180740Sdes npx_methods, 923180740Sdes 1, /* no softc */ 924180740Sdes}; 925180740Sdes 926180740Sdesstatic devclass_t npx_devclass; 927180740Sdes 928180740Sdes/* 929180740Sdes * We prefer to attach to the root nexus so that the usual case (exception 16) 930180744Sdes * doesn't describe the processor as being `on isa'. 931180744Sdes */ 932180744SdesDRIVER_MODULE(npx, nexus, npx_driver, npx_devclass, 0, 0); 933180740Sdes 934180740Sdes#endif /* NNPX > 0 */ 935180740Sdes