npx.c revision 46555
1/*-
2 * Copyright (c) 1990 William Jolitz.
3 * Copyright (c) 1991 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 *    must display the following acknowledgement:
16 *	This product includes software developed by the University of
17 *	California, Berkeley and its contributors.
18 * 4. Neither the name of the University nor the names of its contributors
19 *    may be used to endorse or promote products derived from this software
20 *    without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 *	from: @(#)npx.c	7.2 (Berkeley) 5/12/91
35 *	$Id: npx.c,v 1.68 1999/05/06 09:44:55 bde Exp $
36 */
37
38#include "npx.h"
39#if NNPX > 0
40
41#include "opt_debug_npx.h"
42#include "opt_math_emulate.h"
43
44#include <sys/param.h>
45#include <sys/systm.h>
46#include <sys/bus.h>
47#include <sys/kernel.h>
48#include <sys/malloc.h>
49#include <sys/module.h>
50#include <sys/sysctl.h>
51#include <sys/proc.h>
52#include <machine/bus.h>
53#include <sys/rman.h>
54#ifdef NPX_DEBUG
55#include <sys/syslog.h>
56#endif
57#include <sys/signalvar.h>
58
59#ifndef SMP
60#include <machine/asmacros.h>
61#endif
62#include <machine/cputypes.h>
63#include <machine/frame.h>
64#include <machine/ipl.h>
65#include <machine/md_var.h>
66#include <machine/pcb.h>
67#include <machine/psl.h>
68#ifndef SMP
69#include <machine/clock.h>
70#endif
71#include <machine/resource.h>
72#include <machine/specialreg.h>
73#include <machine/segments.h>
74
75#ifndef SMP
76#include <i386/isa/icu.h>
77#include <i386/isa/intr_machdep.h>
78#include <i386/isa/isa.h>
79#endif
80
81/*
82 * 387 and 287 Numeric Coprocessor Extension (NPX) Driver.
83 */
84
85/* Configuration flags. */
86#define	NPX_DISABLE_I586_OPTIMIZED_BCOPY	(1 << 0)
87#define	NPX_DISABLE_I586_OPTIMIZED_BZERO	(1 << 1)
88#define	NPX_DISABLE_I586_OPTIMIZED_COPYIO	(1 << 2)
89
90#ifdef	__GNUC__
91
92#define	fldcw(addr)		__asm("fldcw %0" : : "m" (*(addr)))
93#define	fnclex()		__asm("fnclex")
94#define	fninit()		__asm("fninit")
95#define	fnop()			__asm("fnop")
96#define	fnsave(addr)		__asm __volatile("fnsave %0" : "=m" (*(addr)))
97#define	fnstcw(addr)		__asm __volatile("fnstcw %0" : "=m" (*(addr)))
98#define	fnstsw(addr)		__asm __volatile("fnstsw %0" : "=m" (*(addr)))
99#define	fp_divide_by_0()	__asm("fldz; fld1; fdiv %st,%st(1); fnop")
100#define	frstor(addr)		__asm("frstor %0" : : "m" (*(addr)))
101#define	start_emulating()	__asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \
102				      : : "n" (CR0_TS) : "ax")
103#define	stop_emulating()	__asm("clts")
104
105#else	/* not __GNUC__ */
106
107void	fldcw		__P((caddr_t addr));
108void	fnclex		__P((void));
109void	fninit		__P((void));
110void	fnop		__P((void));
111void	fnsave		__P((caddr_t addr));
112void	fnstcw		__P((caddr_t addr));
113void	fnstsw		__P((caddr_t addr));
114void	fp_divide_by_0	__P((void));
115void	frstor		__P((caddr_t addr));
116void	start_emulating	__P((void));
117void	stop_emulating	__P((void));
118
119#endif	/* __GNUC__ */
120
121typedef u_char bool_t;
122
123static	int	npx_attach	__P((device_t dev));
124	void	npx_intr	__P((void *));
125static	int	npx_probe	__P((device_t dev));
126static	int	npx_probe1	__P((device_t dev));
127#ifdef I586_CPU
128static	long	timezero	__P((const char *funcname,
129				     void (*func)(void *buf, size_t len)));
130#endif /* I586_CPU */
131
132int	hw_float;		/* XXX currently just alias for npx_exists */
133
134SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint,
135	CTLFLAG_RD, &hw_float, 0,
136	"Floatingpoint instructions executed in hardware");
137
138#ifndef SMP
139static	u_int			npx0_imask = SWI_CLOCK_MASK;
140static	struct gate_descriptor	npx_idt_probeintr;
141static	int			npx_intrno;
142static	volatile u_int		npx_intrs_while_probing;
143static	volatile u_int		npx_traps_while_probing;
144#endif
145
146static	bool_t			npx_ex16;
147static	bool_t			npx_exists;
148static	bool_t			npx_irq13;
149
150#ifndef SMP
151/*
152 * Special interrupt handlers.  Someday intr0-intr15 will be used to count
153 * interrupts.  We'll still need a special exception 16 handler.  The busy
154 * latch stuff in probeintr() can be moved to npxprobe().
155 */
156inthand_t probeintr;
157__asm("								\n\
158	.text							\n\
159	.p2align 2,0x90						\n\
160	.type	" __XSTRING(CNAME(probeintr)) ",@function	\n\
161" __XSTRING(CNAME(probeintr)) ":				\n\
162	ss							\n\
163	incl	" __XSTRING(CNAME(npx_intrs_while_probing)) "	\n\
164	pushl	%eax						\n\
165	movb	$0x20,%al	# EOI (asm in strings loses cpp features) \n\
166	outb	%al,$0xa0	# IO_ICU2			\n\
167	outb	%al,$0x20	# IO_ICU1			\n\
168	movb	$0,%al						\n\
169	outb	%al,$0xf0	# clear BUSY# latch		\n\
170	popl	%eax						\n\
171	iret							\n\
172");
173
174inthand_t probetrap;
175__asm("								\n\
176	.text							\n\
177	.p2align 2,0x90						\n\
178	.type	" __XSTRING(CNAME(probetrap)) ",@function	\n\
179" __XSTRING(CNAME(probetrap)) ":				\n\
180	ss							\n\
181	incl	" __XSTRING(CNAME(npx_traps_while_probing)) "	\n\
182	fnclex							\n\
183	iret							\n\
184");
185#endif /* SMP */
186
187/*
188 * Probe routine.  Initialize cr0 to give correct behaviour for [f]wait
189 * whether the device exists or not (XXX should be elsewhere).  Set flags
190 * to tell npxattach() what to do.  Modify device struct if npx doesn't
191 * need to use interrupts.  Return 1 if device exists.
192 */
193static int
194npx_probe(dev)
195	device_t dev;
196{
197#ifdef SMP
198
199	return npx_probe1(dev);
200
201#else /* SMP */
202
203	int	result;
204	u_long	save_eflags;
205	u_char	save_icu1_mask;
206	u_char	save_icu2_mask;
207	struct	gate_descriptor save_idt_npxintr;
208	struct	gate_descriptor save_idt_npxtrap;
209	/*
210	 * This routine is now just a wrapper for npxprobe1(), to install
211	 * special npx interrupt and trap handlers, to enable npx interrupts
212	 * and to disable other interrupts.  Someday isa_configure() will
213	 * install suitable handlers and run with interrupts enabled so we
214	 * won't need to do so much here.
215	 */
216	npx_intrno = NRSVIDT + 13;
217	save_eflags = read_eflags();
218	disable_intr();
219	save_icu1_mask = inb(IO_ICU1 + 1);
220	save_icu2_mask = inb(IO_ICU2 + 1);
221	save_idt_npxintr = idt[npx_intrno];
222	save_idt_npxtrap = idt[16];
223	outb(IO_ICU1 + 1, ~IRQ_SLAVE);
224	outb(IO_ICU2 + 1, ~(1 << (13 - 8)));
225	setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
226	setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
227	npx_idt_probeintr = idt[npx_intrno];
228	enable_intr();
229	result = npx_probe1(dev);
230	disable_intr();
231	outb(IO_ICU1 + 1, save_icu1_mask);
232	outb(IO_ICU2 + 1, save_icu2_mask);
233	idt[npx_intrno] = save_idt_npxintr;
234	idt[16] = save_idt_npxtrap;
235	write_eflags(save_eflags);
236	return (result);
237
238#endif /* SMP */
239}
240
241static int
242npx_probe1(dev)
243	device_t dev;
244{
245#ifndef SMP
246	u_short control;
247	u_short status;
248#endif
249
250	/*
251	 * Partially reset the coprocessor, if any.  Some BIOS's don't reset
252	 * it after a warm boot.
253	 */
254	outb(0xf1, 0);		/* full reset on some systems, NOP on others */
255	outb(0xf0, 0);		/* clear BUSY# latch */
256	/*
257	 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
258	 * instructions.  We must set the CR0_MP bit and use the CR0_TS
259	 * bit to control the trap, because setting the CR0_EM bit does
260	 * not cause WAIT instructions to trap.  It's important to trap
261	 * WAIT instructions - otherwise the "wait" variants of no-wait
262	 * control instructions would degenerate to the "no-wait" variants
263	 * after FP context switches but work correctly otherwise.  It's
264	 * particularly important to trap WAITs when there is no NPX -
265	 * otherwise the "wait" variants would always degenerate.
266	 *
267	 * Try setting CR0_NE to get correct error reporting on 486DX's.
268	 * Setting it should fail or do nothing on lesser processors.
269	 */
270	load_cr0(rcr0() | CR0_MP | CR0_NE);
271	/*
272	 * But don't trap while we're probing.
273	 */
274	stop_emulating();
275	/*
276	 * Finish resetting the coprocessor, if any.  If there is an error
277	 * pending, then we may get a bogus IRQ13, but probeintr() will handle
278	 * it OK.  Bogus halts have never been observed, but we enabled
279	 * IRQ13 and cleared the BUSY# latch early to handle them anyway.
280	 */
281	fninit();
282
283#ifdef SMP
284	/*
285	 * Exception 16 MUST work for SMP.
286	 */
287	npx_irq13 = 0;
288	npx_ex16 = hw_float = npx_exists = 1;
289	device_set_desc(dev, "math processor");
290	return (0);
291
292#else /* !SMP */
293	device_set_desc(dev, "math processor");
294
295	/*
296	 * Don't use fwait here because it might hang.
297	 * Don't use fnop here because it usually hangs if there is no FPU.
298	 */
299	DELAY(1000);		/* wait for any IRQ13 */
300#ifdef DIAGNOSTIC
301	if (npx_intrs_while_probing != 0)
302		printf("fninit caused %u bogus npx interrupt(s)\n",
303		       npx_intrs_while_probing);
304	if (npx_traps_while_probing != 0)
305		printf("fninit caused %u bogus npx trap(s)\n",
306		       npx_traps_while_probing);
307#endif
308	/*
309	 * Check for a status of mostly zero.
310	 */
311	status = 0x5a5a;
312	fnstsw(&status);
313	if ((status & 0xb8ff) == 0) {
314		/*
315		 * Good, now check for a proper control word.
316		 */
317		control = 0x5a5a;
318		fnstcw(&control);
319		if ((control & 0x1f3f) == 0x033f) {
320			hw_float = npx_exists = 1;
321			/*
322			 * We have an npx, now divide by 0 to see if exception
323			 * 16 works.
324			 */
325			control &= ~(1 << 2);	/* enable divide by 0 trap */
326			fldcw(&control);
327			npx_traps_while_probing = npx_intrs_while_probing = 0;
328			fp_divide_by_0();
329			if (npx_traps_while_probing != 0) {
330				/*
331				 * Good, exception 16 works.
332				 */
333				npx_ex16 = 1;
334				return (0);
335			}
336			if (npx_intrs_while_probing != 0) {
337				int	rid;
338				struct	resource *r;
339				void	*intr;
340				/*
341				 * Bad, we are stuck with IRQ13.
342				 */
343				npx_irq13 = 1;
344				/*
345				 * npxattach would be too late to set npx0_imask.
346				 */
347				npx0_imask |= (1 << 13);
348
349				/*
350				 * We allocate these resources permanently,
351				 * so there is no need to keep track of them.
352				 */
353				rid = 0;
354				r = bus_alloc_resource(dev, SYS_RES_IOPORT,
355						       &rid, IO_NPX, IO_NPX,
356						       IO_NPXSIZE, RF_ACTIVE);
357				if (r == 0)
358					panic("npx: can't get ports");
359				rid = 0;
360				r = bus_alloc_resource(dev, SYS_RES_IRQ,
361						       &rid, 13, 13,
362						       1, RF_ACTIVE);
363				if (r == 0)
364					panic("npx: can't get IRQ");
365				BUS_SETUP_INTR(device_get_parent(dev),
366					       dev, r, npx_intr, 0, &intr);
367				if (intr == 0)
368					panic("npx: can't create intr");
369
370				return (0);
371			}
372			/*
373			 * Worse, even IRQ13 is broken.  Use emulator.
374			 */
375		}
376	}
377	/*
378	 * Probe failed, but we want to get to npxattach to initialize the
379	 * emulator and say that it has been installed.  XXX handle devices
380	 * that aren't really devices better.
381	 */
382	return (0);
383#endif /* SMP */
384}
385
386/*
387 * Attach routine - announce which it is, and wire into system
388 */
389int
390npx_attach(dev)
391	device_t dev;
392{
393	int flags;
394
395	device_print_prettyname(dev);
396	if (npx_irq13) {
397		printf("using IRQ 13 interface\n");
398	} else {
399		if (npx_ex16)
400			printf("INT 16 interface\n");
401#if defined(MATH_EMULATE) || defined(GPL_MATH_EMULATE)
402		else if (npx_exists) {
403			printf("error reporting broken; using 387 emulator\n");
404			hw_float = npx_exists = 0;
405		} else
406			printf("387 emulator\n");
407#else
408		else
409			printf("no 387 emulator in kernel!\n");
410#endif
411	}
412	npxinit(__INITIAL_NPXCW__);
413
414#ifdef I586_CPU
415	if (resource_int_value("npx", 0, "flags", &flags) != 0)
416		flags = 0;
417
418	if (cpu_class == CPUCLASS_586 && npx_ex16 &&
419	    timezero("i586_bzero()", i586_bzero) <
420	    timezero("bzero()", bzero) * 4 / 5) {
421		if (!(flags & NPX_DISABLE_I586_OPTIMIZED_BCOPY)) {
422			bcopy_vector = i586_bcopy;
423			ovbcopy_vector = i586_bcopy;
424		}
425		if (!(flags & NPX_DISABLE_I586_OPTIMIZED_BZERO))
426			bzero = i586_bzero;
427		if (!(flags & NPX_DISABLE_I586_OPTIMIZED_COPYIO)) {
428			copyin_vector = i586_copyin;
429			copyout_vector = i586_copyout;
430		}
431	}
432#endif
433
434	return (0);		/* XXX unused */
435}
436
437/*
438 * Initialize floating point unit.
439 */
440void
441npxinit(control)
442	u_short control;
443{
444	struct save87 dummy;
445
446	if (!npx_exists)
447		return;
448	/*
449	 * fninit has the same h/w bugs as fnsave.  Use the detoxified
450	 * fnsave to throw away any junk in the fpu.  npxsave() initializes
451	 * the fpu and sets npxproc = NULL as important side effects.
452	 */
453	npxsave(&dummy);
454	stop_emulating();
455	fldcw(&control);
456	if (curpcb != NULL)
457		fnsave(&curpcb->pcb_savefpu);
458	start_emulating();
459}
460
461/*
462 * Free coprocessor (if we have it).
463 */
464void
465npxexit(p)
466	struct proc *p;
467{
468
469	if (p == npxproc)
470		npxsave(&curpcb->pcb_savefpu);
471#ifdef NPX_DEBUG
472	if (npx_exists) {
473		u_int	masked_exceptions;
474
475		masked_exceptions = curpcb->pcb_savefpu.sv_env.en_cw
476				    & curpcb->pcb_savefpu.sv_env.en_sw & 0x7f;
477		/*
478		 * Log exceptions that would have trapped with the old
479		 * control word (overflow, divide by 0, and invalid operand).
480		 */
481		if (masked_exceptions & 0x0d)
482			log(LOG_ERR,
483	"pid %d (%s) exited with masked floating point exceptions 0x%02x\n",
484			    p->p_pid, p->p_comm, masked_exceptions);
485	}
486#endif
487}
488
489/*
490 * Preserve the FP status word, clear FP exceptions, then generate a SIGFPE.
491 *
492 * Clearing exceptions is necessary mainly to avoid IRQ13 bugs.  We now
493 * depend on longjmp() restoring a usable state.  Restoring the state
494 * or examining it might fail if we didn't clear exceptions.
495 *
496 * XXX there is no standard way to tell SIGFPE handlers about the error
497 * state.  The old interface:
498 *
499 *	void handler(int sig, int code, struct sigcontext *scp);
500 *
501 * is broken because it is non-ANSI and because the FP state is not in
502 * struct sigcontext.
503 *
504 * XXX the FP state is not preserved across signal handlers.  So signal
505 * handlers cannot afford to do FP unless they preserve the state or
506 * longjmp() out.  Both preserving the state and longjmp()ing may be
507 * destroyed by IRQ13 bugs.  Clearing FP exceptions is not an acceptable
508 * solution for signals other than SIGFPE.
509 */
510void
511npx_intr(dummy)
512	void *dummy;
513{
514	int code;
515	struct intrframe *frame;
516
517	if (npxproc == NULL || !npx_exists) {
518		printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n",
519		       npxproc, curproc, npx_exists);
520		panic("npxintr from nowhere");
521	}
522	if (npxproc != curproc) {
523		printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n",
524		       npxproc, curproc, npx_exists);
525		panic("npxintr from non-current process");
526	}
527
528	outb(0xf0, 0);
529	fnstsw(&curpcb->pcb_savefpu.sv_ex_sw);
530	fnclex();
531
532	/*
533	 * Pass exception to process.
534	 */
535	frame = (struct intrframe *)&dummy;	/* XXX */
536	if ((ISPL(frame->if_cs) == SEL_UPL) || (frame->if_eflags & PSL_VM)) {
537		/*
538		 * Interrupt is essentially a trap, so we can afford to call
539		 * the SIGFPE handler (if any) as soon as the interrupt
540		 * returns.
541		 *
542		 * XXX little or nothing is gained from this, and plenty is
543		 * lost - the interrupt frame has to contain the trap frame
544		 * (this is otherwise only necessary for the rescheduling trap
545		 * in doreti, and the frame for that could easily be set up
546		 * just before it is used).
547		 */
548		curproc->p_md.md_regs = (struct trapframe *)&frame->if_es;
549#ifdef notyet
550		/*
551		 * Encode the appropriate code for detailed information on
552		 * this exception.
553		 */
554		code = XXX_ENCODE(curpcb->pcb_savefpu.sv_ex_sw);
555#else
556		code = 0;	/* XXX */
557#endif
558		trapsignal(curproc, SIGFPE, code);
559	} else {
560		/*
561		 * Nested interrupt.  These losers occur when:
562		 *	o an IRQ13 is bogusly generated at a bogus time, e.g.:
563		 *		o immediately after an fnsave or frstor of an
564		 *		  error state.
565		 *		o a couple of 386 instructions after
566		 *		  "fstpl _memvar" causes a stack overflow.
567		 *	  These are especially nasty when combined with a
568		 *	  trace trap.
569		 *	o an IRQ13 occurs at the same time as another higher-
570		 *	  priority interrupt.
571		 *
572		 * Treat them like a true async interrupt.
573		 */
574		psignal(curproc, SIGFPE);
575	}
576}
577
578/*
579 * Implement device not available (DNA) exception
580 *
581 * It would be better to switch FP context here (if curproc != npxproc)
582 * and not necessarily for every context switch, but it is too hard to
583 * access foreign pcb's.
584 */
585int
586npxdna()
587{
588	if (!npx_exists)
589		return (0);
590	if (npxproc != NULL) {
591		printf("npxdna: npxproc = %p, curproc = %p\n",
592		       npxproc, curproc);
593		panic("npxdna");
594	}
595	stop_emulating();
596	/*
597	 * Record new context early in case frstor causes an IRQ13.
598	 */
599	npxproc = curproc;
600	curpcb->pcb_savefpu.sv_ex_sw = 0;
601	/*
602	 * The following frstor may cause an IRQ13 when the state being
603	 * restored has a pending error.  The error will appear to have been
604	 * triggered by the current (npx) user instruction even when that
605	 * instruction is a no-wait instruction that should not trigger an
606	 * error (e.g., fnclex).  On at least one 486 system all of the
607	 * no-wait instructions are broken the same as frstor, so our
608	 * treatment does not amplify the breakage.  On at least one
609	 * 386/Cyrix 387 system, fnclex works correctly while frstor and
610	 * fnsave are broken, so our treatment breaks fnclex if it is the
611	 * first FPU instruction after a context switch.
612	 */
613	frstor(&curpcb->pcb_savefpu);
614
615	return (1);
616}
617
618/*
619 * Wrapper for fnsave instruction to handle h/w bugs.  If there is an error
620 * pending, then fnsave generates a bogus IRQ13 on some systems.  Force
621 * any IRQ13 to be handled immediately, and then ignore it.  This routine is
622 * often called at splhigh so it must not use many system services.  In
623 * particular, it's much easier to install a special handler than to
624 * guarantee that it's safe to use npxintr() and its supporting code.
625 */
626void
627npxsave(addr)
628	struct save87 *addr;
629{
630#ifdef SMP
631
632	stop_emulating();
633	fnsave(addr);
634	/* fnop(); */
635	start_emulating();
636	npxproc = NULL;
637
638#else /* SMP */
639
640	u_char	icu1_mask;
641	u_char	icu2_mask;
642	u_char	old_icu1_mask;
643	u_char	old_icu2_mask;
644	struct gate_descriptor	save_idt_npxintr;
645
646	disable_intr();
647	old_icu1_mask = inb(IO_ICU1 + 1);
648	old_icu2_mask = inb(IO_ICU2 + 1);
649	save_idt_npxintr = idt[npx_intrno];
650	outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask));
651	outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8));
652	idt[npx_intrno] = npx_idt_probeintr;
653	enable_intr();
654	stop_emulating();
655	fnsave(addr);
656	fnop();
657	start_emulating();
658	npxproc = NULL;
659	disable_intr();
660	icu1_mask = inb(IO_ICU1 + 1);	/* masks may have changed */
661	icu2_mask = inb(IO_ICU2 + 1);
662	outb(IO_ICU1 + 1,
663	     (icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask));
664	outb(IO_ICU2 + 1,
665	     (icu2_mask & ~(npx0_imask >> 8))
666	     | (old_icu2_mask & (npx0_imask >> 8)));
667	idt[npx_intrno] = save_idt_npxintr;
668	enable_intr();		/* back to usual state */
669
670#endif /* SMP */
671}
672
673#ifdef I586_CPU
674static long
675timezero(funcname, func)
676	const char *funcname;
677	void (*func) __P((void *buf, size_t len));
678
679{
680	void *buf;
681#define	BUFSIZE		1000000
682	long usec;
683	struct timeval finish, start;
684
685	buf = malloc(BUFSIZE, M_TEMP, M_NOWAIT);
686	if (buf == NULL)
687		return (BUFSIZE);
688	microtime(&start);
689	(*func)(buf, BUFSIZE);
690	microtime(&finish);
691	usec = 1000000 * (finish.tv_sec - start.tv_sec) +
692	    finish.tv_usec - start.tv_usec;
693	if (usec <= 0)
694		usec = 1;
695	if (bootverbose)
696		printf("%s bandwidth = %ld bytes/sec\n",
697		    funcname, (long)(BUFSIZE * (int64_t)1000000 / usec));
698	free(buf, M_TEMP);
699	return (usec);
700}
701#endif /* I586_CPU */
702
703static device_method_t npx_methods[] = {
704	/* Device interface */
705	DEVMETHOD(device_probe,		npx_probe),
706	DEVMETHOD(device_attach,	npx_attach),
707	DEVMETHOD(device_detach,	bus_generic_detach),
708	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
709	DEVMETHOD(device_suspend,	bus_generic_suspend),
710	DEVMETHOD(device_resume,	bus_generic_resume),
711
712	{ 0, 0 }
713};
714
715static driver_t npx_driver = {
716	"npx",
717	npx_methods,
718	DRIVER_TYPE_MISC,
719	1,			/* no softc */
720};
721
722static devclass_t npx_devclass;
723
724/*
725 * We prefer to attach to the root nexus so that the usual case (exception 16)
726 * doesn't describe the processor as being `on isa'.
727 */
728DRIVER_MODULE(npx, nexus, npx_driver, npx_devclass, 0, 0);
729
730#endif /* NNPX > 0 */
731