npx.c revision 4188
1/*- 2 * Copyright (c) 1990 William Jolitz. 3 * Copyright (c) 1991 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from: @(#)npx.c 7.2 (Berkeley) 5/12/91 35 * $Id: npx.c,v 1.15 1994/10/23 21:27:32 wollman Exp $ 36 */ 37 38#include "npx.h" 39#if NNPX > 0 40 41#include <sys/param.h> 42#include <sys/systm.h> 43#include <sys/conf.h> 44#include <sys/file.h> 45#include <sys/proc.h> 46#include <sys/devconf.h> 47#include <sys/ioctl.h> 48 49#include <machine/cpu.h> 50#include <machine/pcb.h> 51#include <machine/trap.h> 52#include <machine/specialreg.h> 53 54#include <i386/isa/icu.h> 55#include <i386/isa/isa_device.h> 56#include <i386/isa/isa.h> 57 58/* 59 * 387 and 287 Numeric Coprocessor Extension (NPX) Driver. 60 */ 61 62#ifdef __GNUC__ 63 64#define fldcw(addr) __asm("fldcw %0" : : "m" (*addr)) 65#define fnclex() __asm("fnclex") 66#define fninit() __asm("fninit") 67#define fnsave(addr) __asm("fnsave %0" : "=m" (*addr) : "0" (*addr)) 68#define fnstcw(addr) __asm("fnstcw %0" : "=m" (*addr) : "0" (*addr)) 69#define fnstsw(addr) __asm("fnstsw %0" : "=m" (*addr) : "0" (*addr)) 70#define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fwait") 71#define frstor(addr) __asm("frstor %0" : : "m" (*addr)) 72#define fwait() __asm("fwait") 73#define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \ 74 : : "n" (CR0_TS) : "ax") 75#define stop_emulating() __asm("clts") 76 77#else /* not __GNUC__ */ 78 79void fldcw __P((caddr_t addr)); 80void fnclex __P((void)); 81void fninit __P((void)); 82void fnsave __P((caddr_t addr)); 83void fnstcw __P((caddr_t addr)); 84void fnstsw __P((caddr_t addr)); 85void fp_divide_by_0 __P((void)); 86void frstor __P((caddr_t addr)); 87void fwait __P((void)); 88void start_emulating __P((void)); 89void stop_emulating __P((void)); 90 91#endif /* __GNUC__ */ 92 93typedef u_char bool_t; 94 95extern struct gate_descriptor idt[]; 96 97static int npxattach __P((struct isa_device *dvp)); 98static int npxprobe __P((struct isa_device *dvp)); 99static int npxprobe1 __P((struct isa_device *dvp)); 100 101struct isa_driver npxdriver = { 102 npxprobe, npxattach, "npx", 103}; 104 105u_int npx0_imask = SWI_CLOCK_MASK; 106struct proc *npxproc; 107 108static bool_t npx_ex16; 109static bool_t npx_exists; 110int hw_float; 111static struct gate_descriptor npx_idt_probeintr; 112static int npx_intrno; 113static volatile u_int npx_intrs_while_probing; 114static bool_t npx_irq13; 115static volatile u_int npx_traps_while_probing; 116 117/* 118 * Special interrupt handlers. Someday intr0-intr15 will be used to count 119 * interrupts. We'll still need a special exception 16 handler. The busy 120 * latch stuff in probintr() can be moved to npxprobe(). 121 */ 122void probeintr(void); 123asm 124(" 125 .text 126_probeintr: 127 ss 128 incl _npx_intrs_while_probing 129 pushl %eax 130 movb $0x20,%al # EOI (asm in strings loses cpp features) 131 outb %al,$0xa0 # IO_ICU2 132 outb %al,$0x20 #IO_ICU1 133 movb $0,%al 134 outb %al,$0xf0 # clear BUSY# latch 135 popl %eax 136 iret 137"); 138 139void probetrap(void); 140asm 141(" 142 .text 143_probetrap: 144 ss 145 incl _npx_traps_while_probing 146 fnclex 147 iret 148"); 149 150/* 151 * Probe routine. Initialize cr0 to give correct behaviour for [f]wait 152 * whether the device exists or not (XXX should be elsewhere). Set flags 153 * to tell npxattach() what to do. Modify device struct if npx doesn't 154 * need to use interrupts. Return 1 if device exists. 155 */ 156static int 157npxprobe(dvp) 158 struct isa_device *dvp; 159{ 160 int result; 161 u_long save_eflags; 162 u_char save_icu1_mask; 163 u_char save_icu2_mask; 164 struct gate_descriptor save_idt_npxintr; 165 struct gate_descriptor save_idt_npxtrap; 166 /* 167 * This routine is now just a wrapper for npxprobe1(), to install 168 * special npx interrupt and trap handlers, to enable npx interrupts 169 * and to disable other interrupts. Someday isa_configure() will 170 * install suitable handlers and run with interrupts enabled so we 171 * won't need to do so much here. 172 */ 173 npx_intrno = NRSVIDT + ffs(dvp->id_irq) - 1; 174 save_eflags = read_eflags(); 175 disable_intr(); 176 save_icu1_mask = inb(IO_ICU1 + 1); 177 save_icu2_mask = inb(IO_ICU2 + 1); 178 save_idt_npxintr = idt[npx_intrno]; 179 save_idt_npxtrap = idt[16]; 180 outb(IO_ICU1 + 1, ~(IRQ_SLAVE | dvp->id_irq)); 181 outb(IO_ICU2 + 1, ~(dvp->id_irq >> 8)); 182 setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL); 183 setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL); 184 npx_idt_probeintr = idt[npx_intrno]; 185 enable_intr(); 186 result = npxprobe1(dvp); 187 disable_intr(); 188 outb(IO_ICU1 + 1, save_icu1_mask); 189 outb(IO_ICU2 + 1, save_icu2_mask); 190 idt[npx_intrno] = save_idt_npxintr; 191 idt[16] = save_idt_npxtrap; 192 write_eflags(save_eflags); 193 return (result); 194} 195 196static int 197npxprobe1(dvp) 198 struct isa_device *dvp; 199{ 200 int control; 201 int status; 202#ifdef lint 203 npxintr(); 204#endif 205 /* 206 * Partially reset the coprocessor, if any. Some BIOS's don't reset 207 * it after a warm boot. 208 */ 209 outb(0xf1, 0); /* full reset on some systems, NOP on others */ 210 outb(0xf0, 0); /* clear BUSY# latch */ 211 /* 212 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 213 * instructions. We must set the CR0_MP bit and use the CR0_TS 214 * bit to control the trap, because setting the CR0_EM bit does 215 * not cause WAIT instructions to trap. It's important to trap 216 * WAIT instructions - otherwise the "wait" variants of no-wait 217 * control instructions would degenerate to the "no-wait" variants 218 * after FP context switches but work correctly otherwise. It's 219 * particularly important to trap WAITs when there is no NPX - 220 * otherwise the "wait" variants would always degenerate. 221 * 222 * Try setting CR0_NE to get correct error reporting on 486DX's. 223 * Setting it should fail or do nothing on lesser processors. 224 */ 225 load_cr0(rcr0() | CR0_MP | CR0_NE); 226 /* 227 * But don't trap while we're probing. 228 */ 229 stop_emulating(); 230 /* 231 * Finish resetting the coprocessor, if any. If there is an error 232 * pending, then we may get a bogus IRQ13, but probeintr() will handle 233 * it OK. Bogus halts have never been observed, but we enabled 234 * IRQ13 and cleared the BUSY# latch early to handle them anyway. 235 */ 236 fninit(); 237 DELAY(1000); /* wait for any IRQ13 (fwait might hang) */ 238#ifdef DIAGNOSTIC 239 if (npx_intrs_while_probing != 0) 240 printf("fninit caused %u bogus npx interrupt(s)\n", 241 npx_intrs_while_probing); 242 if (npx_traps_while_probing != 0) 243 printf("fninit caused %u bogus npx trap(s)\n", 244 npx_traps_while_probing); 245#endif 246 /* 247 * Check for a status of mostly zero. 248 */ 249 status = 0x5a5a; 250 fnstsw(&status); 251 if ((status & 0xb8ff) == 0) { 252 /* 253 * Good, now check for a proper control word. 254 */ 255 control = 0x5a5a; 256 fnstcw(&control); 257 if ((control & 0x1f3f) == 0x033f) { 258 hw_float = npx_exists = 1; 259 /* 260 * We have an npx, now divide by 0 to see if exception 261 * 16 works. 262 */ 263 control &= ~(1 << 2); /* enable divide by 0 trap */ 264 fldcw(&control); 265 npx_traps_while_probing = npx_intrs_while_probing = 0; 266 fp_divide_by_0(); 267 if (npx_traps_while_probing != 0) { 268 /* 269 * Good, exception 16 works. 270 */ 271 npx_ex16 = 1; 272 dvp->id_irq = 0; /* zap the interrupt */ 273 /* 274 * special return value to flag that we do not 275 * actually use any I/O registers 276 */ 277 return (-1); 278 } 279 if (npx_intrs_while_probing != 0) { 280 /* 281 * Bad, we are stuck with IRQ13. 282 */ 283 npx_irq13 = 1; 284 npx0_imask = dvp->id_irq; /* npxattach too late */ 285 return (IO_NPXSIZE); 286 } 287 /* 288 * Worse, even IRQ13 is broken. Use emulator. 289 */ 290 } 291 } 292 /* 293 * Probe failed, but we want to get to npxattach to initialize the 294 * emulator and say that it has been installed. XXX handle devices 295 * that aren't really devices better. 296 */ 297 dvp->id_irq = 0; 298 /* 299 * special return value to flag that we do not 300 * actually use any I/O registers 301 */ 302 return (-1); 303} 304 305static struct kern_devconf kdc_npx[NNPX] = { { 306 0, 0, 0, /* filled in by dev_attach */ 307 "npx", 0, { MDDT_ISA, 0 }, 308 isa_generic_externalize, 0, 0, ISA_EXTERNALLEN, 309 &kdc_isa0, /* parent */ 310 0, /* parentdata */ 311 DC_UNKNOWN, /* not supported */ 312 "Floating-point unit" 313} }; 314 315static inline void 316npx_registerdev(struct isa_device *id) 317{ 318 if(id->id_unit) 319 kdc_npx[id->id_unit] = kdc_npx[0]; 320 kdc_npx[id->id_unit].kdc_unit = id->id_unit; 321 kdc_npx[id->id_unit].kdc_isa = id; 322 dev_attach(&kdc_npx[id->id_unit]); 323} 324 325/* 326 * Attach routine - announce which it is, and wire into system 327 */ 328int 329npxattach(dvp) 330 struct isa_device *dvp; 331{ 332 if (!npx_ex16 && !npx_irq13) { 333 if (npx_exists) { 334 printf("npx%d: Error reporting broken, using 387 emulator\n",dvp->id_unit); 335 hw_float = npx_exists = 0; 336 } else { 337 printf("npx%d: 387 Emulator\n",dvp->id_unit); 338 } 339 } 340 npxinit(__INITIAL_NPXCW__); 341 npx_registerdev(dvp); 342 return (1); /* XXX unused */ 343} 344 345/* 346 * Initialize floating point unit. 347 */ 348void 349npxinit(control) 350 u_int control; 351{ 352 struct save87 dummy; 353 354 if (!npx_exists) 355 return; 356 /* 357 * fninit has the same h/w bugs as fnsave. Use the detoxified 358 * fnsave to throw away any junk in the fpu. fnsave initializes 359 * the fpu and sets npxproc = NULL as important side effects. 360 */ 361 npxsave(&dummy); 362 stop_emulating(); 363 fldcw(&control); 364 if (curpcb != NULL) 365 fnsave(&curpcb->pcb_savefpu); 366 start_emulating(); 367} 368 369/* 370 * Free coprocessor (if we have it). 371 */ 372void 373npxexit(p) 374 struct proc *p; 375{ 376 377 if (p == npxproc) { 378 start_emulating(); 379 npxproc = NULL; 380 } 381} 382 383/* 384 * Record the FPU state and reinitialize it all except for the control word. 385 * Then generate a SIGFPE. 386 * 387 * Reinitializing the state allows naive SIGFPE handlers to longjmp without 388 * doing any fixups. 389 * 390 * XXX there is currently no way to pass the full error state to signal 391 * handlers, and if this is a nested interrupt there is no way to pass even 392 * a status code! So there is no way to have a non-naive SIGFPE handler. At 393 * best a handler could do an fninit followed by an fldcw of a static value. 394 * fnclex would be of little use because it would leave junk on the FPU stack. 395 * Returning from the handler would be even less safe than usual because 396 * IRQ13 exception handling makes exceptions even less precise than usual. 397 */ 398void 399npxintr(frame) 400 struct intrframe frame; 401{ 402 int code; 403 404 if (npxproc == NULL || !npx_exists) { 405 /* XXX no %p in stand/printf.c. Cast to quiet gcc -Wall. */ 406 printf("npxintr: npxproc = %lx, curproc = %lx, npx_exists = %d\n", 407 (u_long) npxproc, (u_long) curproc, npx_exists); 408 panic("npxintr from nowhere"); 409 } 410 if (npxproc != curproc) { 411 printf("npxintr: npxproc = %lx, curproc = %lx, npx_exists = %d\n", 412 (u_long) npxproc, (u_long) curproc, npx_exists); 413 panic("npxintr from non-current process"); 414 } 415 /* 416 * Save state. This does an implied fninit. It had better not halt 417 * the cpu or we'll hang. 418 */ 419 outb(0xf0, 0); 420 fnsave(&curpcb->pcb_savefpu); 421 fwait(); 422 /* 423 * Restore control word (was clobbered by fnsave). 424 */ 425 fldcw(&curpcb->pcb_savefpu.sv_env.en_cw); 426 fwait(); 427 /* 428 * Remember the exception status word and tag word. The current 429 * (almost fninit'ed) fpu state is in the fpu and the exception 430 * state just saved will soon be junk. However, the implied fninit 431 * doesn't change the error pointers or register contents, and we 432 * preserved the control word and will copy the status and tag 433 * words, so the complete exception state can be recovered. 434 */ 435 curpcb->pcb_savefpu.sv_ex_sw = curpcb->pcb_savefpu.sv_env.en_sw; 436 curpcb->pcb_savefpu.sv_ex_tw = curpcb->pcb_savefpu.sv_env.en_tw; 437 438 /* 439 * Pass exception to process. 440 */ 441 if (ISPL(frame.if_cs) == SEL_UPL) { 442 /* 443 * Interrupt is essentially a trap, so we can afford to call 444 * the SIGFPE handler (if any) as soon as the interrupt 445 * returns. 446 * 447 * XXX little or nothing is gained from this, and plenty is 448 * lost - the interrupt frame has to contain the trap frame 449 * (this is otherwise only necessary for the rescheduling trap 450 * in doreti, and the frame for that could easily be set up 451 * just before it is used). 452 */ 453 curproc->p_md.md_regs = (int *)&frame.if_es; 454#ifdef notyet 455 /* 456 * Encode the appropriate code for detailed information on 457 * this exception. 458 */ 459 code = XXX_ENCODE(curpcb->pcb_savefpu.sv_ex_sw); 460#else 461 code = 0; /* XXX */ 462#endif 463 trapsignal(curproc, SIGFPE, code); 464 } else { 465 /* 466 * Nested interrupt. These losers occur when: 467 * o an IRQ13 is bogusly generated at a bogus time, e.g.: 468 * o immediately after an fnsave or frstor of an 469 * error state. 470 * o a couple of 386 instructions after 471 * "fstpl _memvar" causes a stack overflow. 472 * These are especially nasty when combined with a 473 * trace trap. 474 * o an IRQ13 occurs at the same time as another higher- 475 * priority interrupt. 476 * 477 * Treat them like a true async interrupt. 478 */ 479 psignal(npxproc, SIGFPE); 480 } 481} 482 483/* 484 * Implement device not available (DNA) exception 485 * 486 * It would be better to switch FP context here (only). This would require 487 * saving the state in the proc table instead of in the pcb. 488 */ 489int 490npxdna() 491{ 492 if (!npx_exists) 493 return (0); 494 if (npxproc != NULL) { 495 printf("npxdna: npxproc = %lx, curproc = %lx\n", 496 (u_long) npxproc, (u_long) curproc); 497 panic("npxdna"); 498 } 499 stop_emulating(); 500 /* 501 * Record new context early in case frstor causes an IRQ13. 502 */ 503 npxproc = curproc; 504 /* 505 * The following frstor may cause an IRQ13 when the state being 506 * restored has a pending error. The error will appear to have been 507 * triggered by the current (npx) user instruction even when that 508 * instruction is a no-wait instruction that should not trigger an 509 * error (e.g., fnclex). On at least one 486 system all of the 510 * no-wait instructions are broken the same as frstor, so our 511 * treatment does not amplify the breakage. On at least one 512 * 386/Cyrix 387 system, fnclex works correctly while frstor and 513 * fnsave are broken, so our treatment breaks fnclex if it is the 514 * first FPU instruction after a context switch. 515 */ 516 frstor(&curpcb->pcb_savefpu); 517 518 return (1); 519} 520 521/* 522 * Wrapper for fnsave instruction to handle h/w bugs. If there is an error 523 * pending, then fnsave generates a bogus IRQ13 on some systems. Force 524 * any IRQ13 to be handled immediately, and then ignore it. This routine is 525 * often called at splhigh so it must not use many system services. In 526 * particular, it's much easier to install a special handler than to 527 * guarantee that it's safe to use npxintr() and its supporting code. 528 */ 529void 530npxsave(addr) 531 struct save87 *addr; 532{ 533 u_char icu1_mask; 534 u_char icu2_mask; 535 u_char old_icu1_mask; 536 u_char old_icu2_mask; 537 struct gate_descriptor save_idt_npxintr; 538 539 disable_intr(); 540 old_icu1_mask = inb(IO_ICU1 + 1); 541 old_icu2_mask = inb(IO_ICU2 + 1); 542 save_idt_npxintr = idt[npx_intrno]; 543 outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask)); 544 outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8)); 545 idt[npx_intrno] = npx_idt_probeintr; 546 enable_intr(); 547 stop_emulating(); 548 fnsave(addr); 549 fwait(); 550 start_emulating(); 551 npxproc = NULL; 552 disable_intr(); 553 icu1_mask = inb(IO_ICU1 + 1); /* masks may have changed */ 554 icu2_mask = inb(IO_ICU2 + 1); 555 outb(IO_ICU1 + 1, 556 (icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask)); 557 outb(IO_ICU2 + 1, 558 (icu2_mask & ~(npx0_imask >> 8)) 559 | (old_icu2_mask & (npx0_imask >> 8))); 560 idt[npx_intrno] = save_idt_npxintr; 561 enable_intr(); /* back to usual state */ 562} 563 564#endif /* NNPX > 0 */ 565