npx.c revision 41797
1/*- 2 * Copyright (c) 1990 William Jolitz. 3 * Copyright (c) 1991 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from: @(#)npx.c 7.2 (Berkeley) 5/12/91 35 * $Id: npx.c,v 1.63 1998/12/07 21:58:22 archie Exp $ 36 */ 37 38#include "npx.h" 39#if NNPX > 0 40 41#include "opt_debug_npx.h" 42#include "opt_math_emulate.h" 43 44#include <sys/param.h> 45#include <sys/systm.h> 46#include <sys/kernel.h> 47#include <sys/malloc.h> 48#include <sys/sysctl.h> 49#include <sys/proc.h> 50#ifdef NPX_DEBUG 51#include <sys/syslog.h> 52#endif 53#include <sys/signalvar.h> 54 55#ifndef SMP 56#include <machine/asmacros.h> 57#endif 58#include <machine/cputypes.h> 59#include <machine/frame.h> 60#include <machine/ipl.h> 61#ifndef SMP 62#include <machine/md_var.h> 63#endif 64#include <machine/pcb.h> 65#include <machine/psl.h> 66#ifndef SMP 67#include <machine/clock.h> 68#endif 69#include <machine/specialreg.h> 70#include <machine/segments.h> 71 72#ifndef SMP 73#include <i386/isa/icu.h> 74#include <i386/isa/intr_machdep.h> 75#include <i386/isa/isa.h> 76#endif 77#include <i386/isa/isa_device.h> 78 79/* 80 * 387 and 287 Numeric Coprocessor Extension (NPX) Driver. 81 */ 82 83/* Configuration flags. */ 84#define NPX_DISABLE_I586_OPTIMIZED_BCOPY (1 << 0) 85#define NPX_DISABLE_I586_OPTIMIZED_BZERO (1 << 1) 86#define NPX_DISABLE_I586_OPTIMIZED_COPYIO (1 << 2) 87 88/* XXX - should be in header file. */ 89extern void (*bcopy_vector) __P((const void *from, void *to, size_t len)); 90extern void (*ovbcopy_vector) __P((const void *from, void *to, size_t len)); 91extern int (*copyin_vector) __P((const void *udaddr, void *kaddr, size_t len)); 92extern int (*copyout_vector) __P((const void *kaddr, void *udaddr, size_t len)); 93 94void i586_bcopy __P((const void *from, void *to, size_t len)); 95void i586_bzero __P((void *buf, size_t len)); 96int i586_copyin __P((const void *udaddr, void *kaddr, size_t len)); 97int i586_copyout __P((const void *kaddr, void *udaddr, size_t len)); 98ointhand2_t npxintr; 99 100#ifdef __GNUC__ 101 102#define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr))) 103#define fnclex() __asm("fnclex") 104#define fninit() __asm("fninit") 105#define fnop() __asm("fnop") 106#define fnsave(addr) __asm __volatile("fnsave %0" : "=m" (*(addr))) 107#define fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr))) 108#define fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr))) 109#define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fnop") 110#define frstor(addr) __asm("frstor %0" : : "m" (*(addr))) 111#define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \ 112 : : "n" (CR0_TS) : "ax") 113#define stop_emulating() __asm("clts") 114 115#else /* not __GNUC__ */ 116 117void fldcw __P((caddr_t addr)); 118void fnclex __P((void)); 119void fninit __P((void)); 120void fnop __P((void)); 121void fnsave __P((caddr_t addr)); 122void fnstcw __P((caddr_t addr)); 123void fnstsw __P((caddr_t addr)); 124void fp_divide_by_0 __P((void)); 125void frstor __P((caddr_t addr)); 126void start_emulating __P((void)); 127void stop_emulating __P((void)); 128 129#endif /* __GNUC__ */ 130 131typedef u_char bool_t; 132 133static int npxattach __P((struct isa_device *dvp)); 134static int npxprobe __P((struct isa_device *dvp)); 135static int npxprobe1 __P((struct isa_device *dvp)); 136static long timezero __P((const char *funcname, 137 void (*func)(void *buf, size_t len))); 138 139struct isa_driver npxdriver = { 140 npxprobe, npxattach, "npx", 141}; 142 143int hw_float; /* XXX currently just alias for npx_exists */ 144 145SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint, 146 CTLFLAG_RD, &hw_float, 0, 147 "Floatingpoint instructions executed in hardware"); 148 149#ifndef SMP 150static u_int npx0_imask = SWI_CLOCK_MASK; 151static struct gate_descriptor npx_idt_probeintr; 152static int npx_intrno; 153static volatile u_int npx_intrs_while_probing; 154static volatile u_int npx_traps_while_probing; 155#endif 156 157static bool_t npx_ex16; 158static bool_t npx_exists; 159static bool_t npx_irq13; 160 161#ifndef SMP 162/* 163 * Special interrupt handlers. Someday intr0-intr15 will be used to count 164 * interrupts. We'll still need a special exception 16 handler. The busy 165 * latch stuff in probeintr() can be moved to npxprobe(). 166 */ 167inthand_t probeintr; 168__asm(" \n\ 169 .text \n\ 170 .p2align 2,0x90 \n\ 171" __XSTRING(CNAME(probeintr)) ": \n\ 172 ss \n\ 173 incl " __XSTRING(CNAME(npx_intrs_while_probing)) " \n\ 174 pushl %eax \n\ 175 movb $0x20,%al # EOI (asm in strings loses cpp features) \n\ 176 outb %al,$0xa0 # IO_ICU2 \n\ 177 outb %al,$0x20 # IO_ICU1 \n\ 178 movb $0,%al \n\ 179 outb %al,$0xf0 # clear BUSY# latch \n\ 180 popl %eax \n\ 181 iret \n\ 182"); 183 184inthand_t probetrap; 185__asm(" \n\ 186 .text \n\ 187 .p2align 2,0x90 \n\ 188" __XSTRING(CNAME(probetrap)) ": \n\ 189 ss \n\ 190 incl " __XSTRING(CNAME(npx_traps_while_probing)) " \n\ 191 fnclex \n\ 192 iret \n\ 193"); 194#endif /* SMP */ 195 196/* 197 * Probe routine. Initialize cr0 to give correct behaviour for [f]wait 198 * whether the device exists or not (XXX should be elsewhere). Set flags 199 * to tell npxattach() what to do. Modify device struct if npx doesn't 200 * need to use interrupts. Return 1 if device exists. 201 */ 202static int 203npxprobe(dvp) 204 struct isa_device *dvp; 205{ 206#ifdef SMP 207 208 return npxprobe1(dvp); 209 210#else /* SMP */ 211 212 int result; 213 u_long save_eflags; 214 u_char save_icu1_mask; 215 u_char save_icu2_mask; 216 struct gate_descriptor save_idt_npxintr; 217 struct gate_descriptor save_idt_npxtrap; 218 /* 219 * This routine is now just a wrapper for npxprobe1(), to install 220 * special npx interrupt and trap handlers, to enable npx interrupts 221 * and to disable other interrupts. Someday isa_configure() will 222 * install suitable handlers and run with interrupts enabled so we 223 * won't need to do so much here. 224 */ 225 npx_intrno = NRSVIDT + ffs(dvp->id_irq) - 1; 226 save_eflags = read_eflags(); 227 disable_intr(); 228 save_icu1_mask = inb(IO_ICU1 + 1); 229 save_icu2_mask = inb(IO_ICU2 + 1); 230 save_idt_npxintr = idt[npx_intrno]; 231 save_idt_npxtrap = idt[16]; 232 outb(IO_ICU1 + 1, ~(IRQ_SLAVE | dvp->id_irq)); 233 outb(IO_ICU2 + 1, ~(dvp->id_irq >> 8)); 234 setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 235 setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 236 npx_idt_probeintr = idt[npx_intrno]; 237 enable_intr(); 238 result = npxprobe1(dvp); 239 disable_intr(); 240 outb(IO_ICU1 + 1, save_icu1_mask); 241 outb(IO_ICU2 + 1, save_icu2_mask); 242 idt[npx_intrno] = save_idt_npxintr; 243 idt[16] = save_idt_npxtrap; 244 write_eflags(save_eflags); 245 return (result); 246 247#endif /* SMP */ 248} 249 250static int 251npxprobe1(dvp) 252 struct isa_device *dvp; 253{ 254#ifndef SMP 255 u_short control; 256 u_short status; 257#endif 258 259 /* 260 * Partially reset the coprocessor, if any. Some BIOS's don't reset 261 * it after a warm boot. 262 */ 263 outb(0xf1, 0); /* full reset on some systems, NOP on others */ 264 outb(0xf0, 0); /* clear BUSY# latch */ 265 /* 266 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 267 * instructions. We must set the CR0_MP bit and use the CR0_TS 268 * bit to control the trap, because setting the CR0_EM bit does 269 * not cause WAIT instructions to trap. It's important to trap 270 * WAIT instructions - otherwise the "wait" variants of no-wait 271 * control instructions would degenerate to the "no-wait" variants 272 * after FP context switches but work correctly otherwise. It's 273 * particularly important to trap WAITs when there is no NPX - 274 * otherwise the "wait" variants would always degenerate. 275 * 276 * Try setting CR0_NE to get correct error reporting on 486DX's. 277 * Setting it should fail or do nothing on lesser processors. 278 */ 279 load_cr0(rcr0() | CR0_MP | CR0_NE); 280 /* 281 * But don't trap while we're probing. 282 */ 283 stop_emulating(); 284 /* 285 * Finish resetting the coprocessor, if any. If there is an error 286 * pending, then we may get a bogus IRQ13, but probeintr() will handle 287 * it OK. Bogus halts have never been observed, but we enabled 288 * IRQ13 and cleared the BUSY# latch early to handle them anyway. 289 */ 290 fninit(); 291 292#ifdef SMP 293 294 /* 295 * Exception 16 MUST work for SMP. 296 */ 297 npx_irq13 = 0; 298 npx_ex16 = hw_float = npx_exists = 1; 299 dvp->id_irq = 0; /* zap the interrupt */ 300 /* 301 * special return value to flag that we do not 302 * actually use any I/O registers 303 */ 304 return (-1); 305 306#else /* SMP */ 307 308 /* 309 * Don't use fwait here because it might hang. 310 * Don't use fnop here because it usually hangs if there is no FPU. 311 */ 312 DELAY(1000); /* wait for any IRQ13 */ 313#ifdef DIAGNOSTIC 314 if (npx_intrs_while_probing != 0) 315 printf("fninit caused %u bogus npx interrupt(s)\n", 316 npx_intrs_while_probing); 317 if (npx_traps_while_probing != 0) 318 printf("fninit caused %u bogus npx trap(s)\n", 319 npx_traps_while_probing); 320#endif 321 /* 322 * Check for a status of mostly zero. 323 */ 324 status = 0x5a5a; 325 fnstsw(&status); 326 if ((status & 0xb8ff) == 0) { 327 /* 328 * Good, now check for a proper control word. 329 */ 330 control = 0x5a5a; 331 fnstcw(&control); 332 if ((control & 0x1f3f) == 0x033f) { 333 hw_float = npx_exists = 1; 334 /* 335 * We have an npx, now divide by 0 to see if exception 336 * 16 works. 337 */ 338 control &= ~(1 << 2); /* enable divide by 0 trap */ 339 fldcw(&control); 340 npx_traps_while_probing = npx_intrs_while_probing = 0; 341 fp_divide_by_0(); 342 if (npx_traps_while_probing != 0) { 343 /* 344 * Good, exception 16 works. 345 */ 346 npx_ex16 = 1; 347 dvp->id_irq = 0; /* zap the interrupt */ 348 /* 349 * special return value to flag that we do not 350 * actually use any I/O registers 351 */ 352 return (-1); 353 } 354 if (npx_intrs_while_probing != 0) { 355 /* 356 * Bad, we are stuck with IRQ13. 357 */ 358 npx_irq13 = 1; 359 /* 360 * npxattach would be too late to set npx0_imask. 361 */ 362 npx0_imask |= dvp->id_irq; 363 return (IO_NPXSIZE); 364 } 365 /* 366 * Worse, even IRQ13 is broken. Use emulator. 367 */ 368 } 369 } 370 /* 371 * Probe failed, but we want to get to npxattach to initialize the 372 * emulator and say that it has been installed. XXX handle devices 373 * that aren't really devices better. 374 */ 375 dvp->id_irq = 0; 376 /* 377 * special return value to flag that we do not 378 * actually use any I/O registers 379 */ 380 return (-1); 381 382#endif /* SMP */ 383} 384 385/* 386 * Attach routine - announce which it is, and wire into system 387 */ 388int 389npxattach(dvp) 390 struct isa_device *dvp; 391{ 392 dvp->id_ointr = npxintr; 393 394 /* The caller has printed "irq 13" for the npx_irq13 case. */ 395 if (!npx_irq13) { 396 printf("npx%d: ", dvp->id_unit); 397 if (npx_ex16) 398 printf("INT 16 interface\n"); 399#if defined(MATH_EMULATE) || defined(GPL_MATH_EMULATE) 400 else if (npx_exists) { 401 printf("error reporting broken; using 387 emulator\n"); 402 hw_float = npx_exists = 0; 403 } else 404 printf("387 emulator\n"); 405#else 406 else 407 printf("no 387 emulator in kernel!\n"); 408#endif 409 } 410 npxinit(__INITIAL_NPXCW__); 411 412#ifdef I586_CPU 413 if (cpu_class == CPUCLASS_586 && npx_ex16 && 414 timezero("i586_bzero()", i586_bzero) < 415 timezero("bzero()", bzero) * 4 / 5) { 416 if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_BCOPY)) { 417 bcopy_vector = i586_bcopy; 418 ovbcopy_vector = i586_bcopy; 419 } 420 if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_BZERO)) 421 bzero = i586_bzero; 422 if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_COPYIO)) { 423 copyin_vector = i586_copyin; 424 copyout_vector = i586_copyout; 425 } 426 } 427#endif 428 429 return (1); /* XXX unused */ 430} 431 432/* 433 * Initialize floating point unit. 434 */ 435void 436npxinit(control) 437 u_short control; 438{ 439 struct save87 dummy; 440 441 if (!npx_exists) 442 return; 443 /* 444 * fninit has the same h/w bugs as fnsave. Use the detoxified 445 * fnsave to throw away any junk in the fpu. npxsave() initializes 446 * the fpu and sets npxproc = NULL as important side effects. 447 */ 448 npxsave(&dummy); 449 stop_emulating(); 450 fldcw(&control); 451 if (curpcb != NULL) 452 fnsave(&curpcb->pcb_savefpu); 453 start_emulating(); 454} 455 456/* 457 * Free coprocessor (if we have it). 458 */ 459void 460npxexit(p) 461 struct proc *p; 462{ 463 464 if (p == npxproc) 465 npxsave(&curpcb->pcb_savefpu); 466#ifdef NPX_DEBUG 467 if (npx_exists) { 468 u_int masked_exceptions; 469 470 masked_exceptions = curpcb->pcb_savefpu.sv_env.en_cw 471 & curpcb->pcb_savefpu.sv_env.en_sw & 0x7f; 472 /* 473 * Log exceptions that would have trapped with the old 474 * control word (overflow, divide by 0, and invalid operand). 475 */ 476 if (masked_exceptions & 0x0d) 477 log(LOG_ERR, 478 "pid %d (%s) exited with masked floating point exceptions 0x%02x\n", 479 p->p_pid, p->p_comm, masked_exceptions); 480 } 481#endif 482} 483 484/* 485 * Preserve the FP status word, clear FP exceptions, then generate a SIGFPE. 486 * 487 * Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now 488 * depend on longjmp() restoring a usable state. Restoring the state 489 * or examining it might fail if we didn't clear exceptions. 490 * 491 * XXX there is no standard way to tell SIGFPE handlers about the error 492 * state. The old interface: 493 * 494 * void handler(int sig, int code, struct sigcontext *scp); 495 * 496 * is broken because it is non-ANSI and because the FP state is not in 497 * struct sigcontext. 498 * 499 * XXX the FP state is not preserved across signal handlers. So signal 500 * handlers cannot afford to do FP unless they preserve the state or 501 * longjmp() out. Both preserving the state and longjmp()ing may be 502 * destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable 503 * solution for signals other than SIGFPE. 504 */ 505void 506npxintr(unit) 507 int unit; 508{ 509 int code; 510 struct intrframe *frame; 511 512 if (npxproc == NULL || !npx_exists) { 513 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 514 npxproc, curproc, npx_exists); 515 panic("npxintr from nowhere"); 516 } 517 if (npxproc != curproc) { 518 printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n", 519 npxproc, curproc, npx_exists); 520 panic("npxintr from non-current process"); 521 } 522 523 outb(0xf0, 0); 524 fnstsw(&curpcb->pcb_savefpu.sv_ex_sw); 525 fnclex(); 526 527 /* 528 * Pass exception to process. 529 */ 530 frame = (struct intrframe *)&unit; /* XXX */ 531 if ((ISPL(frame->if_cs) == SEL_UPL) || (frame->if_eflags & PSL_VM)) { 532 /* 533 * Interrupt is essentially a trap, so we can afford to call 534 * the SIGFPE handler (if any) as soon as the interrupt 535 * returns. 536 * 537 * XXX little or nothing is gained from this, and plenty is 538 * lost - the interrupt frame has to contain the trap frame 539 * (this is otherwise only necessary for the rescheduling trap 540 * in doreti, and the frame for that could easily be set up 541 * just before it is used). 542 */ 543 curproc->p_md.md_regs = (struct trapframe *)&frame->if_es; 544#ifdef notyet 545 /* 546 * Encode the appropriate code for detailed information on 547 * this exception. 548 */ 549 code = XXX_ENCODE(curpcb->pcb_savefpu.sv_ex_sw); 550#else 551 code = 0; /* XXX */ 552#endif 553 trapsignal(curproc, SIGFPE, code); 554 } else { 555 /* 556 * Nested interrupt. These losers occur when: 557 * o an IRQ13 is bogusly generated at a bogus time, e.g.: 558 * o immediately after an fnsave or frstor of an 559 * error state. 560 * o a couple of 386 instructions after 561 * "fstpl _memvar" causes a stack overflow. 562 * These are especially nasty when combined with a 563 * trace trap. 564 * o an IRQ13 occurs at the same time as another higher- 565 * priority interrupt. 566 * 567 * Treat them like a true async interrupt. 568 */ 569 psignal(curproc, SIGFPE); 570 } 571} 572 573/* 574 * Implement device not available (DNA) exception 575 * 576 * It would be better to switch FP context here (if curproc != npxproc) 577 * and not necessarily for every context switch, but it is too hard to 578 * access foreign pcb's. 579 */ 580int 581npxdna() 582{ 583 if (!npx_exists) 584 return (0); 585 if (npxproc != NULL) { 586 printf("npxdna: npxproc = %p, curproc = %p\n", 587 npxproc, curproc); 588 panic("npxdna"); 589 } 590 stop_emulating(); 591 /* 592 * Record new context early in case frstor causes an IRQ13. 593 */ 594 npxproc = curproc; 595 curpcb->pcb_savefpu.sv_ex_sw = 0; 596 /* 597 * The following frstor may cause an IRQ13 when the state being 598 * restored has a pending error. The error will appear to have been 599 * triggered by the current (npx) user instruction even when that 600 * instruction is a no-wait instruction that should not trigger an 601 * error (e.g., fnclex). On at least one 486 system all of the 602 * no-wait instructions are broken the same as frstor, so our 603 * treatment does not amplify the breakage. On at least one 604 * 386/Cyrix 387 system, fnclex works correctly while frstor and 605 * fnsave are broken, so our treatment breaks fnclex if it is the 606 * first FPU instruction after a context switch. 607 */ 608 frstor(&curpcb->pcb_savefpu); 609 610 return (1); 611} 612 613/* 614 * Wrapper for fnsave instruction to handle h/w bugs. If there is an error 615 * pending, then fnsave generates a bogus IRQ13 on some systems. Force 616 * any IRQ13 to be handled immediately, and then ignore it. This routine is 617 * often called at splhigh so it must not use many system services. In 618 * particular, it's much easier to install a special handler than to 619 * guarantee that it's safe to use npxintr() and its supporting code. 620 */ 621void 622npxsave(addr) 623 struct save87 *addr; 624{ 625#ifdef SMP 626 627 stop_emulating(); 628 fnsave(addr); 629 /* fnop(); */ 630 start_emulating(); 631 npxproc = NULL; 632 633#else /* SMP */ 634 635 u_char icu1_mask; 636 u_char icu2_mask; 637 u_char old_icu1_mask; 638 u_char old_icu2_mask; 639 struct gate_descriptor save_idt_npxintr; 640 641 disable_intr(); 642 old_icu1_mask = inb(IO_ICU1 + 1); 643 old_icu2_mask = inb(IO_ICU2 + 1); 644 save_idt_npxintr = idt[npx_intrno]; 645 outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask)); 646 outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8)); 647 idt[npx_intrno] = npx_idt_probeintr; 648 enable_intr(); 649 stop_emulating(); 650 fnsave(addr); 651 fnop(); 652 start_emulating(); 653 npxproc = NULL; 654 disable_intr(); 655 icu1_mask = inb(IO_ICU1 + 1); /* masks may have changed */ 656 icu2_mask = inb(IO_ICU2 + 1); 657 outb(IO_ICU1 + 1, 658 (icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask)); 659 outb(IO_ICU2 + 1, 660 (icu2_mask & ~(npx0_imask >> 8)) 661 | (old_icu2_mask & (npx0_imask >> 8))); 662 idt[npx_intrno] = save_idt_npxintr; 663 enable_intr(); /* back to usual state */ 664 665#endif /* SMP */ 666} 667 668#ifdef I586_CPU 669static long 670timezero(funcname, func) 671 const char *funcname; 672 void (*func) __P((void *buf, size_t len)); 673 674{ 675 void *buf; 676#define BUFSIZE 1000000 677 long usec; 678 struct timeval finish, start; 679 680 buf = malloc(BUFSIZE, M_TEMP, M_NOWAIT); 681 if (buf == NULL) 682 return (BUFSIZE); 683 microtime(&start); 684 (*func)(buf, BUFSIZE); 685 microtime(&finish); 686 usec = 1000000 * (finish.tv_sec - start.tv_sec) + 687 finish.tv_usec - start.tv_usec; 688 if (usec <= 0) 689 usec = 1; 690 if (bootverbose) 691 printf("%s bandwidth = %ld bytes/sec\n", 692 funcname, (long)(BUFSIZE * (int64_t)1000000 / usec)); 693 free(buf, M_TEMP); 694 return (usec); 695} 696#endif /* I586_CPU */ 697 698#endif /* NNPX > 0 */ 699