1262569Simp#ifndef __DT_FSL_IMX_AUDMUX_H 2262569Simp#define __DT_FSL_IMX_AUDMUX_H 3262569Simp 4262569Simp#define MX27_AUDMUX_HPCR1_SSI0 0 5262569Simp#define MX27_AUDMUX_HPCR2_SSI1 1 6262569Simp#define MX27_AUDMUX_HPCR3_SSI_PINS_4 2 7262569Simp#define MX27_AUDMUX_PPCR1_SSI_PINS_1 3 8262569Simp#define MX27_AUDMUX_PPCR2_SSI_PINS_2 4 9262569Simp#define MX27_AUDMUX_PPCR3_SSI_PINS_3 5 10262569Simp 11262569Simp#define MX31_AUDMUX_PORT1_SSI0 0 12262569Simp#define MX31_AUDMUX_PORT2_SSI1 1 13262569Simp#define MX31_AUDMUX_PORT3_SSI_PINS_3 2 14262569Simp#define MX31_AUDMUX_PORT4_SSI_PINS_4 3 15262569Simp#define MX31_AUDMUX_PORT5_SSI_PINS_5 4 16262569Simp#define MX31_AUDMUX_PORT6_SSI_PINS_6 5 17262569Simp#define MX31_AUDMUX_PORT7_SSI_PINS_7 6 18262569Simp 19262569Simp#define MX51_AUDMUX_PORT1_SSI0 0 20262569Simp#define MX51_AUDMUX_PORT2_SSI1 1 21262569Simp#define MX51_AUDMUX_PORT3 2 22262569Simp#define MX51_AUDMUX_PORT4 3 23262569Simp#define MX51_AUDMUX_PORT5 4 24262569Simp#define MX51_AUDMUX_PORT6 5 25262569Simp#define MX51_AUDMUX_PORT7 6 26262569Simp 27262569Simp/* Register definitions for the i.MX21/27 Digital Audio Multiplexer */ 28262569Simp#define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff) 29262569Simp#define IMX_AUDMUX_V1_PCR_INMEN (1 << 8) 30262569Simp#define IMX_AUDMUX_V1_PCR_TXRXEN (1 << 10) 31262569Simp#define IMX_AUDMUX_V1_PCR_SYN (1 << 12) 32262569Simp#define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13) 33262569Simp#define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20) 34262569Simp#define IMX_AUDMUX_V1_PCR_RCLKDIR (1 << 24) 35262569Simp#define IMX_AUDMUX_V1_PCR_RFSDIR (1 << 25) 36262569Simp#define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26) 37262569Simp#define IMX_AUDMUX_V1_PCR_TCLKDIR (1 << 30) 38262569Simp#define IMX_AUDMUX_V1_PCR_TFSDIR (1 << 31) 39262569Simp 40262569Simp/* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */ 41262569Simp#define IMX_AUDMUX_V2_PTCR_TFSDIR (1 << 31) 42262569Simp#define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27) 43262569Simp#define IMX_AUDMUX_V2_PTCR_TCLKDIR (1 << 26) 44262569Simp#define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22) 45262569Simp#define IMX_AUDMUX_V2_PTCR_RFSDIR (1 << 21) 46262569Simp#define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17) 47262569Simp#define IMX_AUDMUX_V2_PTCR_RCLKDIR (1 << 16) 48262569Simp#define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12) 49262569Simp#define IMX_AUDMUX_V2_PTCR_SYN (1 << 11) 50262569Simp 51262569Simp#define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13) 52262569Simp#define IMX_AUDMUX_V2_PDCR_TXRXEN (1 << 12) 53262569Simp#define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8) 54262569Simp#define IMX_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff) 55262569Simp 56262569Simp#endif /* __DT_FSL_IMX_AUDMUX_H */ 57