r8a7793-clock.h revision 295011
1218792Snp/*
2218792Snp * r8a7793 clock definition
3218792Snp *
4218792Snp * Copyright (C) 2014  Renesas Electronics Corporation
5218792Snp *
6218792Snp * This program is free software; you can redistribute it and/or modify
7218792Snp * it under the terms of the GNU General Public License as published by
8218792Snp * the Free Software Foundation; version 2 of the License.
9218792Snp *
10218792Snp * This program is distributed in the hope that it will be useful,
11218792Snp * but WITHOUT ANY WARRANTY; without even the implied warranty of
12218792Snp * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13218792Snp * GNU General Public License for more details.
14218792Snp */
15218792Snp
16218792Snp#ifndef __DT_BINDINGS_CLOCK_R8A7793_H__
17218792Snp#define __DT_BINDINGS_CLOCK_R8A7793_H__
18218792Snp
19218792Snp/* CPG */
20218792Snp#define R8A7793_CLK_MAIN		0
21218792Snp#define R8A7793_CLK_PLL0		1
22218792Snp#define R8A7793_CLK_PLL1		2
23218792Snp#define R8A7793_CLK_PLL3		3
24218792Snp#define R8A7793_CLK_LB			4
25218792Snp#define R8A7793_CLK_QSPI		5
26218792Snp#define R8A7793_CLK_SDH			6
27218792Snp#define R8A7793_CLK_SD0			7
28218792Snp#define R8A7793_CLK_Z			8
29218792Snp#define R8A7793_CLK_RCAN		9
30218792Snp#define R8A7793_CLK_ADSP		10
31218792Snp
32218792Snp/* MSTP0 */
33218792Snp#define R8A7793_CLK_MSIOF0		0
34240169Snp
35240169Snp/* MSTP1 */
36240169Snp#define R8A7793_CLK_VCP0		1
37231093Snp#define R8A7793_CLK_VPC0		3
38240169Snp#define R8A7793_CLK_SSP1		9
39231093Snp#define R8A7793_CLK_TMU1		11
40231093Snp#define R8A7793_CLK_3DG			12
41240169Snp#define R8A7793_CLK_2DDMAC		15
42240169Snp#define R8A7793_CLK_FDP1_1		18
43240169Snp#define R8A7793_CLK_FDP1_0		19
44222509Snp#define R8A7793_CLK_TMU3		21
45222509Snp#define R8A7793_CLK_TMU2		22
46222509Snp#define R8A7793_CLK_CMT0		24
47222509Snp#define R8A7793_CLK_TMU0		25
48222509Snp#define R8A7793_CLK_VSP1_DU1		27
49222509Snp#define R8A7793_CLK_VSP1_DU0		28
50222509Snp#define R8A7793_CLK_VSP1_S		31
51222509Snp
52231093Snp/* MSTP2 */
53231093Snp#define R8A7793_CLK_SCIFA2		2
54231093Snp#define R8A7793_CLK_SCIFA1		3
55231093Snp#define R8A7793_CLK_SCIFA0		4
56231093Snp#define R8A7793_CLK_MSIOF2		5
57247434Snp#define R8A7793_CLK_SCIFB0		6
58247434Snp#define R8A7793_CLK_SCIFB1		7
59247434Snp#define R8A7793_CLK_MSIOF1		8
60247434Snp#define R8A7793_CLK_SCIFB2		16
61247434Snp#define R8A7793_CLK_SYS_DMAC1		18
62252495Snp#define R8A7793_CLK_SYS_DMAC0		19
63252495Snp
64247434Snp/* MSTP3 */
65247434Snp#define R8A7793_CLK_TPU0		4
66218792Snp#define R8A7793_CLK_SDHI2		11
67218792Snp#define R8A7793_CLK_SDHI1		12
68218792Snp#define R8A7793_CLK_SDHI0		14
69218792Snp#define R8A7793_CLK_MMCIF0		15
70218792Snp#define R8A7793_CLK_IIC0		18
71218792Snp#define R8A7793_CLK_PCIEC		19
72218792Snp#define R8A7793_CLK_IIC1		23
73218792Snp#define R8A7793_CLK_SSUSB		28
74218792Snp#define R8A7793_CLK_CMT1		29
75218792Snp#define R8A7793_CLK_USBDMAC0		30
76218792Snp#define R8A7793_CLK_USBDMAC1		31
77218792Snp
78218792Snp/* MSTP4 */
79218792Snp#define R8A7793_CLK_IRQC		7
80218792Snp
81218792Snp/* MSTP5 */
82247434Snp#define R8A7793_CLK_AUDIO_DMAC1         1
83247434Snp#define R8A7793_CLK_AUDIO_DMAC0         2
84218792Snp#define R8A7793_CLK_ADSP_MOD		6
85247434Snp#define R8A7793_CLK_THERMAL		22
86247434Snp#define R8A7793_CLK_PWM			23
87247434Snp
88247434Snp/* MSTP7 */
89247434Snp#define R8A7793_CLK_EHCI		3
90247434Snp#define R8A7793_CLK_HSUSB		4
91247434Snp#define R8A7793_CLK_HSCIF2		13
92218792Snp#define R8A7793_CLK_SCIF5		14
93247434Snp#define R8A7793_CLK_SCIF4		15
94218792Snp#define R8A7793_CLK_HSCIF1		16
95247434Snp#define R8A7793_CLK_HSCIF0		17
96247434Snp#define R8A7793_CLK_SCIF3		18
97247434Snp#define R8A7793_CLK_SCIF2		19
98218792Snp#define R8A7793_CLK_SCIF1		20
99247434Snp#define R8A7793_CLK_SCIF0		21
100221474Snp#define R8A7793_CLK_DU1			23
101247434Snp#define R8A7793_CLK_DU0			24
102247434Snp#define R8A7793_CLK_LVDS0		26
103247434Snp
104265553Snp/* MSTP8 */
105265553Snp#define R8A7793_CLK_IPMMU_SGX		0
106265553Snp#define R8A7793_CLK_VIN2		9
107265553Snp#define R8A7793_CLK_VIN1		10
108265553Snp#define R8A7793_CLK_VIN0		11
109218792Snp#define R8A7793_CLK_ETHER		13
110218792Snp#define R8A7793_CLK_SATA1		14
111218792Snp#define R8A7793_CLK_SATA0		15
112247434Snp
113247434Snp/* MSTP9 */
114218792Snp#define R8A7793_CLK_GPIO7		4
115218792Snp#define R8A7793_CLK_GPIO6		5
116218792Snp#define R8A7793_CLK_GPIO5		7
117218792Snp#define R8A7793_CLK_GPIO4		8
118218792Snp#define R8A7793_CLK_GPIO3		9
119218792Snp#define R8A7793_CLK_GPIO2		10
120218792Snp#define R8A7793_CLK_GPIO1		11
121218792Snp#define R8A7793_CLK_GPIO0		12
122231093Snp#define R8A7793_CLK_RCAN1		15
123231093Snp#define R8A7793_CLK_RCAN0		16
124231093Snp#define R8A7793_CLK_QSPI_MOD		17
125247434Snp#define R8A7793_CLK_I2C5		25
126218792Snp#define R8A7793_CLK_IICDVFS		26
127218792Snp#define R8A7793_CLK_I2C4		27
128237920Snp#define R8A7793_CLK_I2C3		28
129231093Snp#define R8A7793_CLK_I2C2		29
130231093Snp#define R8A7793_CLK_I2C1		30
131231093Snp#define R8A7793_CLK_I2C0		31
132231093Snp
133231093Snp/* MSTP10 */
134231093Snp#define R8A7793_CLK_SSI_ALL		5
135231093Snp#define R8A7793_CLK_SSI9		6
136231093Snp#define R8A7793_CLK_SSI8		7
137231093Snp#define R8A7793_CLK_SSI7		8
138231093Snp#define R8A7793_CLK_SSI6		9
139237920Snp#define R8A7793_CLK_SSI5		10
140237920Snp#define R8A7793_CLK_SSI4		11
141231093Snp#define R8A7793_CLK_SSI3		12
142231093Snp#define R8A7793_CLK_SSI2		13
143231093Snp#define R8A7793_CLK_SSI1		14
144231093Snp#define R8A7793_CLK_SSI0		15
145231093Snp#define R8A7793_CLK_SCU_ALL		17
146231093Snp#define R8A7793_CLK_SCU_DVC1		18
147231093Snp#define R8A7793_CLK_SCU_DVC0		19
148252814Snp#define R8A7793_CLK_SCU_SRC9		22
149231093Snp#define R8A7793_CLK_SCU_SRC8		23
150231093Snp#define R8A7793_CLK_SCU_SRC7		24
151231093Snp#define R8A7793_CLK_SCU_SRC6		25
152231093Snp#define R8A7793_CLK_SCU_SRC5		26
153237920Snp#define R8A7793_CLK_SCU_SRC4		27
154237920Snp#define R8A7793_CLK_SCU_SRC3		28
155218792Snp#define R8A7793_CLK_SCU_SRC2		29
156231093Snp#define R8A7793_CLK_SCU_SRC1		30
157231093Snp#define R8A7793_CLK_SCU_SRC0		31
158
159/* MSTP11 */
160#define R8A7793_CLK_SCIFA3		6
161#define R8A7793_CLK_SCIFA4		7
162#define R8A7793_CLK_SCIFA5		8
163
164#endif /* __DT_BINDINGS_CLOCK_R8A7793_H__ */
165