if_wl.h revision 26003
126003Smsmith/*
226003Smsmith * Redistribution and use in source and binary forms, with or without
326003Smsmith * modification, are permitted provided that the following conditions
426003Smsmith * are met:
526003Smsmith * 1. Redistributions of source code must retain all copyright
626003Smsmith *    notices, this list of conditions and the following disclaimer.
726003Smsmith * 2. The names of the authors may not be used to endorse or promote products
826003Smsmith *    derived from this software withough specific prior written permission
926003Smsmith *
1026003Smsmith * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
1126003Smsmith * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1226003Smsmith * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1326003Smsmith * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
1426003Smsmith * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
1526003Smsmith * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
1626003Smsmith * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
1726003Smsmith * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1826003Smsmith * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
1926003Smsmith * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2026003Smsmith *
2126003Smsmith */
2226003Smsmith/* Definitions for WaveLAN driver */
2326003Smsmith
2426003Smsmith#ifndef	_IF_WL_H
2526003Smsmith#define _IF_WL_H
2626003Smsmith
2726003Smsmith#define	STATUS_TRIES	15000
2826003Smsmith
2926003Smsmith#define N_FD			100
3026003Smsmith#define N_RBD			100
3126003Smsmith#define N_TBD			72
3226003Smsmith#define RCVBUFSIZE		540
3326003Smsmith#define I82586NULL		0xffff
3426003Smsmith
3526003Smsmith#define DSF_RUNNING	1
3626003Smsmith
3726003Smsmith#define MOD_ENAL 1
3826003Smsmith#define MOD_PROM 2
3926003Smsmith
4026003Smsmithtypedef struct {
4126003Smsmith	rbd_t	r;
4226003Smsmith	char	rbd_pad[2];
4326003Smsmith	char	rbuffer[RCVBUFSIZE];
4426003Smsmith} ru_t;
4526003Smsmith
4626003Smsmith/* Board 64k RAM layout. Offsets from 0x0000 */
4726003Smsmith
4826003Smsmith#define OFFSET_RU		0x0000		/* 0x64 * fd_t = 0x898 */
4926003Smsmith#define OFFSET_RBD		0x0900		/* 0x64 * ru_t = 0xd7a0 */
5026003Smsmith#define OFFSET_CU		0xe0a0		/* 0x100 */
5126003Smsmith#define OFFSET_TBD		0xe1a0		/* 0x48 * tbd_t = 0x240 */
5226003Smsmith#define OFFSET_TBUF		0xe3e0		/* 0x1bfe */
5326003Smsmith#define OFFSET_SCB		0xffde		/* 0x1 * scb_t = 0x10 */
5426003Smsmith#define OFFSET_ISCP		0xffee		/* 0x1 * iscp_t = 0x8 */
5526003Smsmith#define OFFSET_SCP		0xfff6		/* 0x1 * scp_t = 0xa */
5626003Smsmith
5726003Smsmith/* WaveLAN host interface definitions */
5826003Smsmith
5926003Smsmith#define HACR(base)	(base)		/* Host Adapter Command Register */
6026003Smsmith#define HASR(base)	(base)		/* Host Adapter Status Register */
6126003Smsmith#define MMCR(base)	(base+0x2)	/* Modem Management Ctrl Register */
6226003Smsmith#define PIOR0(base)	(base+0x4)	/* Program I/O Address Register 0 */
6326003Smsmith#define PIOP0(base)	(base+0x6)	/* Program I/O Port 0 */
6426003Smsmith#define PIOR1(base)	(base+0x8)	/* Program I/O Address Register 1 */
6526003Smsmith#define PIOP1(base)	(base+0xa)	/* Program I/O Port 1 */
6626003Smsmith#define PIOR2(base)	(base+0xc)	/* Program I/O Address Register 2 */
6726003Smsmith#define PIOP2(base)	(base+0xe)	/* Program I/O Port 2 */
6826003Smsmith
6926003Smsmith/* Program I/O Mode Register values */
7026003Smsmith
7126003Smsmith#define STATIC_PIO		0	/* Mode 1: static mode */
7226003Smsmith#define AUTOINCR_PIO		1	/* Mode 2: auto increment mode */
7326003Smsmith#define AUTODECR_PIO		2	/* Mode 3: auto decrement mode */
7426003Smsmith#define PARAM_ACCESS_PIO	3	/* Mode 4: LAN parameter access mode */
7526003Smsmith#define PIO_MASK		3	/* register mask */
7626003Smsmith#define PIOM(cmd,piono)		((u_short)cmd << 10 << (piono * 2))
7726003Smsmith
7826003Smsmith/* Host Adapter status register definitions */
7926003Smsmith
8026003Smsmith#define HASR_INTR		0x0001	/* Interrupt request from 82586 */
8126003Smsmith#define HASR_MMC_INTR		0x0002	/* Interrupt request from MMC */
8226003Smsmith#define HASR_MMC_BUSY		0x0004	/* MMC busy indication */
8326003Smsmith#define HASR_PARA_BUSY		0x0008	/* LAN parameter storage area busy */
8426003Smsmith
8526003Smsmith/* Host Adapter command register definitions */
8626003Smsmith
8726003Smsmith#define HACR_RESET		0x0001	/* Reset board */
8826003Smsmith#define HACR_CA			0x0002	/* Set Channel Attention for 82586 */
8926003Smsmith#define HACR_16BITS		0x0004	/* 1==16 bits operation, 0==8 bits */
9026003Smsmith#define HACR_OUT1		0x0008	/* General purpose output pin */
9126003Smsmith#define HACR_OUT2		0x0010	/* General purpose output pin */
9226003Smsmith#define HACR_MASK_82586		0x0020	/* Mask 82586 interrupts, 1==unmask */
9326003Smsmith#define HACR_MASK_MMC		0x0040	/* Mask MMC interrupts, 1==unmask */
9426003Smsmith#define HACR_INTR_CLEN		0x0080	/* interrupt status clear enable */
9526003Smsmith
9626003Smsmith#define HACR_DEFAULT	(HACR_OUT1 | HACR_OUT2 | HACR_16BITS | PIOM(STATIC_PIO, 0) | PIOM(AUTOINCR_PIO, 1) | PIOM(PARAM_ACCESS_PIO, 2))
9726003Smsmith#define HACR_INTRON	(HACR_MASK_82586 | HACR_MASK_MMC | HACR_INTR_CLEN)
9826003Smsmith#define CMD(unit)	\
9926003Smsmith		{ \
10026003Smsmith		   outw(HACR(WLSOFTC(unit)->base),WLSOFTC(unit)->hacr); \
10126003Smsmith		   /* delay for 50 us, might only be needed sometimes */ \
10226003Smsmith		   DELAY(DELAYCONST); \
10326003Smsmith	        }
10426003Smsmith
10526003Smsmith/* macro for setting the channel attention bit.  No delays here since
10626003Smsmith * it is used in critical sections
10726003Smsmith */
10826003Smsmith#define SET_CHAN_ATTN(unit)   \
10926003Smsmith      { \
11026003Smsmith         outw(HACR(WLSOFTC(unit)->base),WLSOFTC(unit)->hacr | HACR_CA); \
11126003Smsmith      }
11226003Smsmith
11326003Smsmith
11426003Smsmith#define MMC_WRITE(cmd,val)	\
11526003Smsmith	while(inw(HASR(WLSOFTC(unit)->base)) & HASR_MMC_BUSY) ; \
11626003Smsmith	outw(MMCR(WLSOFTC(unit)->base), \
11726003Smsmith	     (u_short)(((u_short)(val) << 8) | ((cmd) << 1) | 1))
11826003Smsmith
11926003Smsmith#endif	_IF_WL_H
12026003Smsmith
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