if_vr.c revision 71962
1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * $FreeBSD: head/sys/dev/vr/if_vr.c 71962 2001-02-03 16:29:10Z phk $ 33 */ 34 35/* 36 * VIA Rhine fast ethernet PCI NIC driver 37 * 38 * Supports various network adapters based on the VIA Rhine 39 * and Rhine II PCI controllers, including the D-Link DFE530TX. 40 * Datasheets are available at http://www.via.com.tw. 41 * 42 * Written by Bill Paul <wpaul@ctr.columbia.edu> 43 * Electrical Engineering Department 44 * Columbia University, New York City 45 */ 46 47/* 48 * The VIA Rhine controllers are similar in some respects to the 49 * the DEC tulip chips, except less complicated. The controller 50 * uses an MII bus and an external physical layer interface. The 51 * receiver has a one entry perfect filter and a 64-bit hash table 52 * multicast filter. Transmit and receive descriptors are similar 53 * to the tulip. 54 * 55 * The Rhine has a serious flaw in its transmit DMA mechanism: 56 * transmit buffers must be longword aligned. Unfortunately, 57 * FreeBSD doesn't guarantee that mbufs will be filled in starting 58 * at longword boundaries, so we have to do a buffer copy before 59 * transmission. 60 */ 61 62#include <sys/param.h> 63#include <sys/systm.h> 64#include <sys/sockio.h> 65#include <sys/mbuf.h> 66#include <sys/malloc.h> 67#include <sys/kernel.h> 68#include <sys/socket.h> 69 70#include <net/if.h> 71#include <net/if_arp.h> 72#include <net/ethernet.h> 73#include <net/if_dl.h> 74#include <net/if_media.h> 75 76#include <net/bpf.h> 77 78#include <vm/vm.h> /* for vtophys */ 79#include <vm/pmap.h> /* for vtophys */ 80#include <machine/bus_pio.h> 81#include <machine/bus_memio.h> 82#include <machine/bus.h> 83#include <machine/resource.h> 84#include <sys/bus.h> 85#include <sys/rman.h> 86 87#include <dev/mii/mii.h> 88#include <dev/mii/miivar.h> 89 90#include <pci/pcireg.h> 91#include <pci/pcivar.h> 92 93#define VR_USEIOSPACE 94 95#include <pci/if_vrreg.h> 96 97MODULE_DEPEND(vr, miibus, 1, 1, 1); 98 99/* "controller miibus0" required. See GENERIC if you get errors here. */ 100#include "miibus_if.h" 101 102#ifndef lint 103static const char rcsid[] = 104 "$FreeBSD: head/sys/dev/vr/if_vr.c 71962 2001-02-03 16:29:10Z phk $"; 105#endif 106 107/* 108 * Various supported device vendors/types and their names. 109 */ 110static struct vr_type vr_devs[] = { 111 { VIA_VENDORID, VIA_DEVICEID_RHINE, 112 "VIA VT3043 Rhine I 10/100BaseTX" }, 113 { VIA_VENDORID, VIA_DEVICEID_RHINE_II, 114 "VIA VT86C100A Rhine II 10/100BaseTX" }, 115 { VIA_VENDORID, VIA_DEVICEID_RHINE_II_2, 116 "VIA VT6102 Rhine II 10/100BaseTX" }, 117 { DELTA_VENDORID, DELTA_DEVICEID_RHINE_II, 118 "Delta Electronics Rhine II 10/100BaseTX" }, 119 { ADDTRON_VENDORID, ADDTRON_DEVICEID_RHINE_II, 120 "Addtron Technology Rhine II 10/100BaseTX" }, 121 { 0, 0, NULL } 122}; 123 124static int vr_probe __P((device_t)); 125static int vr_attach __P((device_t)); 126static int vr_detach __P((device_t)); 127 128static int vr_newbuf __P((struct vr_softc *, 129 struct vr_chain_onefrag *, 130 struct mbuf *)); 131static int vr_encap __P((struct vr_softc *, struct vr_chain *, 132 struct mbuf * )); 133 134static void vr_rxeof __P((struct vr_softc *)); 135static void vr_rxeoc __P((struct vr_softc *)); 136static void vr_txeof __P((struct vr_softc *)); 137static void vr_txeoc __P((struct vr_softc *)); 138static void vr_tick __P((void *)); 139static void vr_intr __P((void *)); 140static void vr_start __P((struct ifnet *)); 141static int vr_ioctl __P((struct ifnet *, u_long, caddr_t)); 142static void vr_init __P((void *)); 143static void vr_stop __P((struct vr_softc *)); 144static void vr_watchdog __P((struct ifnet *)); 145static void vr_shutdown __P((device_t)); 146static int vr_ifmedia_upd __P((struct ifnet *)); 147static void vr_ifmedia_sts __P((struct ifnet *, struct ifmediareq *)); 148 149static void vr_mii_sync __P((struct vr_softc *)); 150static void vr_mii_send __P((struct vr_softc *, u_int32_t, int)); 151static int vr_mii_readreg __P((struct vr_softc *, struct vr_mii_frame *)); 152static int vr_mii_writereg __P((struct vr_softc *, struct vr_mii_frame *)); 153static int vr_miibus_readreg __P((device_t, int, int)); 154static int vr_miibus_writereg __P((device_t, int, int, int)); 155static void vr_miibus_statchg __P((device_t)); 156 157static void vr_setcfg __P((struct vr_softc *, int)); 158static u_int8_t vr_calchash __P((u_int8_t *)); 159static void vr_setmulti __P((struct vr_softc *)); 160static void vr_reset __P((struct vr_softc *)); 161static int vr_list_rx_init __P((struct vr_softc *)); 162static int vr_list_tx_init __P((struct vr_softc *)); 163 164#ifdef VR_USEIOSPACE 165#define VR_RES SYS_RES_IOPORT 166#define VR_RID VR_PCI_LOIO 167#else 168#define VR_RES SYS_RES_MEMORY 169#define VR_RID VR_PCI_LOMEM 170#endif 171 172static device_method_t vr_methods[] = { 173 /* Device interface */ 174 DEVMETHOD(device_probe, vr_probe), 175 DEVMETHOD(device_attach, vr_attach), 176 DEVMETHOD(device_detach, vr_detach), 177 DEVMETHOD(device_shutdown, vr_shutdown), 178 179 /* bus interface */ 180 DEVMETHOD(bus_print_child, bus_generic_print_child), 181 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 182 183 /* MII interface */ 184 DEVMETHOD(miibus_readreg, vr_miibus_readreg), 185 DEVMETHOD(miibus_writereg, vr_miibus_writereg), 186 DEVMETHOD(miibus_statchg, vr_miibus_statchg), 187 188 { 0, 0 } 189}; 190 191static driver_t vr_driver = { 192 "vr", 193 vr_methods, 194 sizeof(struct vr_softc) 195}; 196 197static devclass_t vr_devclass; 198 199DRIVER_MODULE(if_vr, pci, vr_driver, vr_devclass, 0, 0); 200DRIVER_MODULE(miibus, vr, miibus_driver, miibus_devclass, 0, 0); 201 202#define VR_SETBIT(sc, reg, x) \ 203 CSR_WRITE_1(sc, reg, \ 204 CSR_READ_1(sc, reg) | x) 205 206#define VR_CLRBIT(sc, reg, x) \ 207 CSR_WRITE_1(sc, reg, \ 208 CSR_READ_1(sc, reg) & ~x) 209 210#define VR_SETBIT16(sc, reg, x) \ 211 CSR_WRITE_2(sc, reg, \ 212 CSR_READ_2(sc, reg) | x) 213 214#define VR_CLRBIT16(sc, reg, x) \ 215 CSR_WRITE_2(sc, reg, \ 216 CSR_READ_2(sc, reg) & ~x) 217 218#define VR_SETBIT32(sc, reg, x) \ 219 CSR_WRITE_4(sc, reg, \ 220 CSR_READ_4(sc, reg) | x) 221 222#define VR_CLRBIT32(sc, reg, x) \ 223 CSR_WRITE_4(sc, reg, \ 224 CSR_READ_4(sc, reg) & ~x) 225 226#define SIO_SET(x) \ 227 CSR_WRITE_1(sc, VR_MIICMD, \ 228 CSR_READ_1(sc, VR_MIICMD) | x) 229 230#define SIO_CLR(x) \ 231 CSR_WRITE_1(sc, VR_MIICMD, \ 232 CSR_READ_1(sc, VR_MIICMD) & ~x) 233 234/* 235 * Sync the PHYs by setting data bit and strobing the clock 32 times. 236 */ 237static void vr_mii_sync(sc) 238 struct vr_softc *sc; 239{ 240 register int i; 241 242 SIO_SET(VR_MIICMD_DIR|VR_MIICMD_DATAIN); 243 244 for (i = 0; i < 32; i++) { 245 SIO_SET(VR_MIICMD_CLK); 246 DELAY(1); 247 SIO_CLR(VR_MIICMD_CLK); 248 DELAY(1); 249 } 250 251 return; 252} 253 254/* 255 * Clock a series of bits through the MII. 256 */ 257static void vr_mii_send(sc, bits, cnt) 258 struct vr_softc *sc; 259 u_int32_t bits; 260 int cnt; 261{ 262 int i; 263 264 SIO_CLR(VR_MIICMD_CLK); 265 266 for (i = (0x1 << (cnt - 1)); i; i >>= 1) { 267 if (bits & i) { 268 SIO_SET(VR_MIICMD_DATAIN); 269 } else { 270 SIO_CLR(VR_MIICMD_DATAIN); 271 } 272 DELAY(1); 273 SIO_CLR(VR_MIICMD_CLK); 274 DELAY(1); 275 SIO_SET(VR_MIICMD_CLK); 276 } 277} 278 279/* 280 * Read an PHY register through the MII. 281 */ 282static int vr_mii_readreg(sc, frame) 283 struct vr_softc *sc; 284 struct vr_mii_frame *frame; 285 286{ 287 int i, ack; 288 289 VR_LOCK(sc); 290 291 /* 292 * Set up frame for RX. 293 */ 294 frame->mii_stdelim = VR_MII_STARTDELIM; 295 frame->mii_opcode = VR_MII_READOP; 296 frame->mii_turnaround = 0; 297 frame->mii_data = 0; 298 299 CSR_WRITE_1(sc, VR_MIICMD, 0); 300 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM); 301 302 /* 303 * Turn on data xmit. 304 */ 305 SIO_SET(VR_MIICMD_DIR); 306 307 vr_mii_sync(sc); 308 309 /* 310 * Send command/address info. 311 */ 312 vr_mii_send(sc, frame->mii_stdelim, 2); 313 vr_mii_send(sc, frame->mii_opcode, 2); 314 vr_mii_send(sc, frame->mii_phyaddr, 5); 315 vr_mii_send(sc, frame->mii_regaddr, 5); 316 317 /* Idle bit */ 318 SIO_CLR((VR_MIICMD_CLK|VR_MIICMD_DATAIN)); 319 DELAY(1); 320 SIO_SET(VR_MIICMD_CLK); 321 DELAY(1); 322 323 /* Turn off xmit. */ 324 SIO_CLR(VR_MIICMD_DIR); 325 326 /* Check for ack */ 327 SIO_CLR(VR_MIICMD_CLK); 328 DELAY(1); 329 SIO_SET(VR_MIICMD_CLK); 330 DELAY(1); 331 ack = CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT; 332 333 /* 334 * Now try reading data bits. If the ack failed, we still 335 * need to clock through 16 cycles to keep the PHY(s) in sync. 336 */ 337 if (ack) { 338 for(i = 0; i < 16; i++) { 339 SIO_CLR(VR_MIICMD_CLK); 340 DELAY(1); 341 SIO_SET(VR_MIICMD_CLK); 342 DELAY(1); 343 } 344 goto fail; 345 } 346 347 for (i = 0x8000; i; i >>= 1) { 348 SIO_CLR(VR_MIICMD_CLK); 349 DELAY(1); 350 if (!ack) { 351 if (CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT) 352 frame->mii_data |= i; 353 DELAY(1); 354 } 355 SIO_SET(VR_MIICMD_CLK); 356 DELAY(1); 357 } 358 359fail: 360 361 SIO_CLR(VR_MIICMD_CLK); 362 DELAY(1); 363 SIO_SET(VR_MIICMD_CLK); 364 DELAY(1); 365 366 VR_UNLOCK(sc); 367 368 if (ack) 369 return(1); 370 return(0); 371} 372 373/* 374 * Write to a PHY register through the MII. 375 */ 376static int vr_mii_writereg(sc, frame) 377 struct vr_softc *sc; 378 struct vr_mii_frame *frame; 379 380{ 381 VR_LOCK(sc); 382 383 CSR_WRITE_1(sc, VR_MIICMD, 0); 384 VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM); 385 386 /* 387 * Set up frame for TX. 388 */ 389 390 frame->mii_stdelim = VR_MII_STARTDELIM; 391 frame->mii_opcode = VR_MII_WRITEOP; 392 frame->mii_turnaround = VR_MII_TURNAROUND; 393 394 /* 395 * Turn on data output. 396 */ 397 SIO_SET(VR_MIICMD_DIR); 398 399 vr_mii_sync(sc); 400 401 vr_mii_send(sc, frame->mii_stdelim, 2); 402 vr_mii_send(sc, frame->mii_opcode, 2); 403 vr_mii_send(sc, frame->mii_phyaddr, 5); 404 vr_mii_send(sc, frame->mii_regaddr, 5); 405 vr_mii_send(sc, frame->mii_turnaround, 2); 406 vr_mii_send(sc, frame->mii_data, 16); 407 408 /* Idle bit. */ 409 SIO_SET(VR_MIICMD_CLK); 410 DELAY(1); 411 SIO_CLR(VR_MIICMD_CLK); 412 DELAY(1); 413 414 /* 415 * Turn off xmit. 416 */ 417 SIO_CLR(VR_MIICMD_DIR); 418 419 VR_UNLOCK(sc); 420 421 return(0); 422} 423 424static int vr_miibus_readreg(dev, phy, reg) 425 device_t dev; 426 int phy, reg; 427{ 428 struct vr_softc *sc; 429 struct vr_mii_frame frame; 430 431 sc = device_get_softc(dev); 432 bzero((char *)&frame, sizeof(frame)); 433 434 frame.mii_phyaddr = phy; 435 frame.mii_regaddr = reg; 436 vr_mii_readreg(sc, &frame); 437 438 return(frame.mii_data); 439} 440 441static int vr_miibus_writereg(dev, phy, reg, data) 442 device_t dev; 443 u_int16_t phy, reg, data; 444{ 445 struct vr_softc *sc; 446 struct vr_mii_frame frame; 447 448 sc = device_get_softc(dev); 449 bzero((char *)&frame, sizeof(frame)); 450 451 frame.mii_phyaddr = phy; 452 frame.mii_regaddr = reg; 453 frame.mii_data = data; 454 455 vr_mii_writereg(sc, &frame); 456 457 return(0); 458} 459 460static void vr_miibus_statchg(dev) 461 device_t dev; 462{ 463 struct vr_softc *sc; 464 struct mii_data *mii; 465 466 sc = device_get_softc(dev); 467 VR_LOCK(sc); 468 mii = device_get_softc(sc->vr_miibus); 469 vr_setcfg(sc, mii->mii_media_active); 470 VR_UNLOCK(sc); 471 472 return; 473} 474 475/* 476 * Calculate CRC of a multicast group address, return the lower 6 bits. 477 */ 478static u_int8_t vr_calchash(addr) 479 u_int8_t *addr; 480{ 481 u_int32_t crc, carry; 482 int i, j; 483 u_int8_t c; 484 485 /* Compute CRC for the address value. */ 486 crc = 0xFFFFFFFF; /* initial value */ 487 488 for (i = 0; i < 6; i++) { 489 c = *(addr + i); 490 for (j = 0; j < 8; j++) { 491 carry = ((crc & 0x80000000) ? 1 : 0) ^ (c & 0x01); 492 crc <<= 1; 493 c >>= 1; 494 if (carry) 495 crc = (crc ^ 0x04c11db6) | carry; 496 } 497 } 498 499 /* return the filter bit position */ 500 return((crc >> 26) & 0x0000003F); 501} 502 503/* 504 * Program the 64-bit multicast hash filter. 505 */ 506static void vr_setmulti(sc) 507 struct vr_softc *sc; 508{ 509 struct ifnet *ifp; 510 int h = 0; 511 u_int32_t hashes[2] = { 0, 0 }; 512 struct ifmultiaddr *ifma; 513 u_int8_t rxfilt; 514 int mcnt = 0; 515 516 ifp = &sc->arpcom.ac_if; 517 518 rxfilt = CSR_READ_1(sc, VR_RXCFG); 519 520 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 521 rxfilt |= VR_RXCFG_RX_MULTI; 522 CSR_WRITE_1(sc, VR_RXCFG, rxfilt); 523 CSR_WRITE_4(sc, VR_MAR0, 0xFFFFFFFF); 524 CSR_WRITE_4(sc, VR_MAR1, 0xFFFFFFFF); 525 return; 526 } 527 528 /* first, zot all the existing hash bits */ 529 CSR_WRITE_4(sc, VR_MAR0, 0); 530 CSR_WRITE_4(sc, VR_MAR1, 0); 531 532 /* now program new ones */ 533 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 534 if (ifma->ifma_addr->sa_family != AF_LINK) 535 continue; 536 h = vr_calchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 537 if (h < 32) 538 hashes[0] |= (1 << h); 539 else 540 hashes[1] |= (1 << (h - 32)); 541 mcnt++; 542 } 543 544 if (mcnt) 545 rxfilt |= VR_RXCFG_RX_MULTI; 546 else 547 rxfilt &= ~VR_RXCFG_RX_MULTI; 548 549 CSR_WRITE_4(sc, VR_MAR0, hashes[0]); 550 CSR_WRITE_4(sc, VR_MAR1, hashes[1]); 551 CSR_WRITE_1(sc, VR_RXCFG, rxfilt); 552 553 return; 554} 555 556/* 557 * In order to fiddle with the 558 * 'full-duplex' and '100Mbps' bits in the netconfig register, we 559 * first have to put the transmit and/or receive logic in the idle state. 560 */ 561static void vr_setcfg(sc, media) 562 struct vr_softc *sc; 563 int media; 564{ 565 int restart = 0; 566 567 if (CSR_READ_2(sc, VR_COMMAND) & (VR_CMD_TX_ON|VR_CMD_RX_ON)) { 568 restart = 1; 569 VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_TX_ON|VR_CMD_RX_ON)); 570 } 571 572 if ((media & IFM_GMASK) == IFM_FDX) 573 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX); 574 else 575 VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX); 576 577 if (restart) 578 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON|VR_CMD_RX_ON); 579 580 return; 581} 582 583static void vr_reset(sc) 584 struct vr_softc *sc; 585{ 586 register int i; 587 588 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RESET); 589 590 for (i = 0; i < VR_TIMEOUT; i++) { 591 DELAY(10); 592 if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET)) 593 break; 594 } 595 if (i == VR_TIMEOUT) 596 printf("vr%d: reset never completed!\n", sc->vr_unit); 597 598 /* Wait a little while for the chip to get its brains in order. */ 599 DELAY(1000); 600 601 return; 602} 603 604/* 605 * Probe for a VIA Rhine chip. Check the PCI vendor and device 606 * IDs against our list and return a device name if we find a match. 607 */ 608static int vr_probe(dev) 609 device_t dev; 610{ 611 struct vr_type *t; 612 613 t = vr_devs; 614 615 while(t->vr_name != NULL) { 616 if ((pci_get_vendor(dev) == t->vr_vid) && 617 (pci_get_device(dev) == t->vr_did)) { 618 device_set_desc(dev, t->vr_name); 619 return(0); 620 } 621 t++; 622 } 623 624 return(ENXIO); 625} 626 627/* 628 * Attach the interface. Allocate softc structures, do ifmedia 629 * setup and ethernet/BPF attach. 630 */ 631static int vr_attach(dev) 632 device_t dev; 633{ 634 int i; 635 u_char eaddr[ETHER_ADDR_LEN]; 636 u_int32_t command; 637 struct vr_softc *sc; 638 struct ifnet *ifp; 639 int unit, error = 0, rid; 640 641 sc = device_get_softc(dev); 642 unit = device_get_unit(dev); 643 bzero(sc, sizeof(struct vr_softc *)); 644 645 mtx_init(&sc->vr_mtx, device_get_nameunit(dev), MTX_DEF | MTX_RECURSE); 646 VR_LOCK(sc); 647 648 /* 649 * Handle power management nonsense. 650 */ 651 652 command = pci_read_config(dev, VR_PCI_CAPID, 4) & 0x000000FF; 653 if (command == 0x01) { 654 655 command = pci_read_config(dev, VR_PCI_PWRMGMTCTRL, 4); 656 if (command & VR_PSTATE_MASK) { 657 u_int32_t iobase, membase, irq; 658 659 /* Save important PCI config data. */ 660 iobase = pci_read_config(dev, VR_PCI_LOIO, 4); 661 membase = pci_read_config(dev, VR_PCI_LOMEM, 4); 662 irq = pci_read_config(dev, VR_PCI_INTLINE, 4); 663 664 /* Reset the power state. */ 665 printf("vr%d: chip is in D%d power mode " 666 "-- setting to D0\n", unit, command & VR_PSTATE_MASK); 667 command &= 0xFFFFFFFC; 668 pci_write_config(dev, VR_PCI_PWRMGMTCTRL, command, 4); 669 670 /* Restore PCI config data. */ 671 pci_write_config(dev, VR_PCI_LOIO, iobase, 4); 672 pci_write_config(dev, VR_PCI_LOMEM, membase, 4); 673 pci_write_config(dev, VR_PCI_INTLINE, irq, 4); 674 } 675 } 676 677 /* 678 * Map control/status registers. 679 */ 680 command = pci_read_config(dev, PCIR_COMMAND, 4); 681 command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 682 pci_write_config(dev, PCIR_COMMAND, command, 4); 683 command = pci_read_config(dev, PCIR_COMMAND, 4); 684 685#ifdef VR_USEIOSPACE 686 if (!(command & PCIM_CMD_PORTEN)) { 687 printf("vr%d: failed to enable I/O ports!\n", unit); 688 free(sc, M_DEVBUF); 689 goto fail; 690 } 691#else 692 if (!(command & PCIM_CMD_MEMEN)) { 693 printf("vr%d: failed to enable memory mapping!\n", unit); 694 goto fail; 695 } 696#endif 697 698 rid = VR_RID; 699 sc->vr_res = bus_alloc_resource(dev, VR_RES, &rid, 700 0, ~0, 1, RF_ACTIVE); 701 702 if (sc->vr_res == NULL) { 703 printf("vr%d: couldn't map ports/memory\n", unit); 704 error = ENXIO; 705 goto fail; 706 } 707 708 sc->vr_btag = rman_get_bustag(sc->vr_res); 709 sc->vr_bhandle = rman_get_bushandle(sc->vr_res); 710 711 /* Allocate interrupt */ 712 rid = 0; 713 sc->vr_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 714 RF_SHAREABLE | RF_ACTIVE); 715 716 if (sc->vr_irq == NULL) { 717 printf("vr%d: couldn't map interrupt\n", unit); 718 bus_release_resource(dev, VR_RES, VR_RID, sc->vr_res); 719 error = ENXIO; 720 goto fail; 721 } 722 723 error = bus_setup_intr(dev, sc->vr_irq, INTR_TYPE_NET, 724 vr_intr, sc, &sc->vr_intrhand); 725 726 if (error) { 727 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vr_irq); 728 bus_release_resource(dev, VR_RES, VR_RID, sc->vr_res); 729 printf("vr%d: couldn't set up irq\n", unit); 730 goto fail; 731 } 732 733 /* Reset the adapter. */ 734 vr_reset(sc); 735 736 /* 737 * Get station address. The way the Rhine chips work, 738 * you're not allowed to directly access the EEPROM once 739 * they've been programmed a special way. Consequently, 740 * we need to read the node address from the PAR0 and PAR1 741 * registers. 742 */ 743 VR_SETBIT(sc, VR_EECSR, VR_EECSR_LOAD); 744 DELAY(200); 745 for (i = 0; i < ETHER_ADDR_LEN; i++) 746 eaddr[i] = CSR_READ_1(sc, VR_PAR0 + i); 747 748 /* 749 * A Rhine chip was detected. Inform the world. 750 */ 751 printf("vr%d: Ethernet address: %6D\n", unit, eaddr, ":"); 752 753 sc->vr_unit = unit; 754 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN); 755 756 sc->vr_ldata = contigmalloc(sizeof(struct vr_list_data), M_DEVBUF, 757 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 758 759 if (sc->vr_ldata == NULL) { 760 printf("vr%d: no memory for list buffers!\n", unit); 761 bus_teardown_intr(dev, sc->vr_irq, sc->vr_intrhand); 762 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vr_irq); 763 bus_release_resource(dev, VR_RES, VR_RID, sc->vr_res); 764 error = ENXIO; 765 goto fail; 766 } 767 768 bzero(sc->vr_ldata, sizeof(struct vr_list_data)); 769 770 ifp = &sc->arpcom.ac_if; 771 ifp->if_softc = sc; 772 ifp->if_unit = unit; 773 ifp->if_name = "vr"; 774 ifp->if_mtu = ETHERMTU; 775 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 776 ifp->if_ioctl = vr_ioctl; 777 ifp->if_output = ether_output; 778 ifp->if_start = vr_start; 779 ifp->if_watchdog = vr_watchdog; 780 ifp->if_init = vr_init; 781 ifp->if_baudrate = 10000000; 782 ifp->if_snd.ifq_maxlen = VR_TX_LIST_CNT - 1; 783 784 /* 785 * Do MII setup. 786 */ 787 if (mii_phy_probe(dev, &sc->vr_miibus, 788 vr_ifmedia_upd, vr_ifmedia_sts)) { 789 printf("vr%d: MII without any phy!\n", sc->vr_unit); 790 bus_teardown_intr(dev, sc->vr_irq, sc->vr_intrhand); 791 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vr_irq); 792 bus_release_resource(dev, VR_RES, VR_RID, sc->vr_res); 793 contigfree(sc->vr_ldata, 794 sizeof(struct vr_list_data), M_DEVBUF); 795 error = ENXIO; 796 goto fail; 797 } 798 799 callout_handle_init(&sc->vr_stat_ch); 800 801 /* 802 * Call MI attach routine. 803 */ 804 ether_ifattach(ifp, ETHER_BPF_SUPPORTED); 805 VR_UNLOCK(sc); 806 return(0); 807 808fail: 809 VR_UNLOCK(sc); 810 mtx_destroy(&sc->vr_mtx); 811 812 return(error); 813} 814 815static int vr_detach(dev) 816 device_t dev; 817{ 818 struct vr_softc *sc; 819 struct ifnet *ifp; 820 821 sc = device_get_softc(dev); 822 VR_LOCK(sc); 823 ifp = &sc->arpcom.ac_if; 824 825 vr_stop(sc); 826 ether_ifdetach(ifp, ETHER_BPF_SUPPORTED); 827 828 bus_generic_detach(dev); 829 device_delete_child(dev, sc->vr_miibus); 830 831 bus_teardown_intr(dev, sc->vr_irq, sc->vr_intrhand); 832 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->vr_irq); 833 bus_release_resource(dev, VR_RES, VR_RID, sc->vr_res); 834 835 contigfree(sc->vr_ldata, sizeof(struct vr_list_data), M_DEVBUF); 836 837 VR_UNLOCK(sc); 838 mtx_destroy(&sc->vr_mtx); 839 840 return(0); 841} 842 843/* 844 * Initialize the transmit descriptors. 845 */ 846static int vr_list_tx_init(sc) 847 struct vr_softc *sc; 848{ 849 struct vr_chain_data *cd; 850 struct vr_list_data *ld; 851 int i; 852 853 cd = &sc->vr_cdata; 854 ld = sc->vr_ldata; 855 for (i = 0; i < VR_TX_LIST_CNT; i++) { 856 cd->vr_tx_chain[i].vr_ptr = &ld->vr_tx_list[i]; 857 if (i == (VR_TX_LIST_CNT - 1)) 858 cd->vr_tx_chain[i].vr_nextdesc = 859 &cd->vr_tx_chain[0]; 860 else 861 cd->vr_tx_chain[i].vr_nextdesc = 862 &cd->vr_tx_chain[i + 1]; 863 } 864 865 cd->vr_tx_free = &cd->vr_tx_chain[0]; 866 cd->vr_tx_tail = cd->vr_tx_head = NULL; 867 868 return(0); 869} 870 871 872/* 873 * Initialize the RX descriptors and allocate mbufs for them. Note that 874 * we arrange the descriptors in a closed ring, so that the last descriptor 875 * points back to the first. 876 */ 877static int vr_list_rx_init(sc) 878 struct vr_softc *sc; 879{ 880 struct vr_chain_data *cd; 881 struct vr_list_data *ld; 882 int i; 883 884 cd = &sc->vr_cdata; 885 ld = sc->vr_ldata; 886 887 for (i = 0; i < VR_RX_LIST_CNT; i++) { 888 cd->vr_rx_chain[i].vr_ptr = 889 (struct vr_desc *)&ld->vr_rx_list[i]; 890 if (vr_newbuf(sc, &cd->vr_rx_chain[i], NULL) == ENOBUFS) 891 return(ENOBUFS); 892 if (i == (VR_RX_LIST_CNT - 1)) { 893 cd->vr_rx_chain[i].vr_nextdesc = 894 &cd->vr_rx_chain[0]; 895 ld->vr_rx_list[i].vr_next = 896 vtophys(&ld->vr_rx_list[0]); 897 } else { 898 cd->vr_rx_chain[i].vr_nextdesc = 899 &cd->vr_rx_chain[i + 1]; 900 ld->vr_rx_list[i].vr_next = 901 vtophys(&ld->vr_rx_list[i + 1]); 902 } 903 } 904 905 cd->vr_rx_head = &cd->vr_rx_chain[0]; 906 907 return(0); 908} 909 910/* 911 * Initialize an RX descriptor and attach an MBUF cluster. 912 * Note: the length fields are only 11 bits wide, which means the 913 * largest size we can specify is 2047. This is important because 914 * MCLBYTES is 2048, so we have to subtract one otherwise we'll 915 * overflow the field and make a mess. 916 */ 917static int vr_newbuf(sc, c, m) 918 struct vr_softc *sc; 919 struct vr_chain_onefrag *c; 920 struct mbuf *m; 921{ 922 struct mbuf *m_new = NULL; 923 924 if (m == NULL) { 925 MGETHDR(m_new, M_DONTWAIT, MT_DATA); 926 if (m_new == NULL) { 927 printf("vr%d: no memory for rx list " 928 "-- packet dropped!\n", sc->vr_unit); 929 return(ENOBUFS); 930 } 931 932 MCLGET(m_new, M_DONTWAIT); 933 if (!(m_new->m_flags & M_EXT)) { 934 printf("vr%d: no memory for rx list " 935 "-- packet dropped!\n", sc->vr_unit); 936 m_freem(m_new); 937 return(ENOBUFS); 938 } 939 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 940 } else { 941 m_new = m; 942 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 943 m_new->m_data = m_new->m_ext.ext_buf; 944 } 945 946 m_adj(m_new, sizeof(u_int64_t)); 947 948 c->vr_mbuf = m_new; 949 c->vr_ptr->vr_status = VR_RXSTAT; 950 c->vr_ptr->vr_data = vtophys(mtod(m_new, caddr_t)); 951 c->vr_ptr->vr_ctl = VR_RXCTL | VR_RXLEN; 952 953 return(0); 954} 955 956/* 957 * A frame has been uploaded: pass the resulting mbuf chain up to 958 * the higher level protocols. 959 */ 960static void vr_rxeof(sc) 961 struct vr_softc *sc; 962{ 963 struct ether_header *eh; 964 struct mbuf *m; 965 struct ifnet *ifp; 966 struct vr_chain_onefrag *cur_rx; 967 int total_len = 0; 968 u_int32_t rxstat; 969 970 ifp = &sc->arpcom.ac_if; 971 972 while(!((rxstat = sc->vr_cdata.vr_rx_head->vr_ptr->vr_status) & 973 VR_RXSTAT_OWN)) { 974 struct mbuf *m0 = NULL; 975 976 cur_rx = sc->vr_cdata.vr_rx_head; 977 sc->vr_cdata.vr_rx_head = cur_rx->vr_nextdesc; 978 m = cur_rx->vr_mbuf; 979 980 /* 981 * If an error occurs, update stats, clear the 982 * status word and leave the mbuf cluster in place: 983 * it should simply get re-used next time this descriptor 984 * comes up in the ring. 985 */ 986 if (rxstat & VR_RXSTAT_RXERR) { 987 ifp->if_ierrors++; 988 printf("vr%d: rx error: ", sc->vr_unit); 989 switch(rxstat & 0x000000FF) { 990 case VR_RXSTAT_CRCERR: 991 printf("crc error\n"); 992 break; 993 case VR_RXSTAT_FRAMEALIGNERR: 994 printf("frame alignment error\n"); 995 break; 996 case VR_RXSTAT_FIFOOFLOW: 997 printf("FIFO overflow\n"); 998 break; 999 case VR_RXSTAT_GIANT: 1000 printf("received giant packet\n"); 1001 break; 1002 case VR_RXSTAT_RUNT: 1003 printf("received runt packet\n"); 1004 break; 1005 case VR_RXSTAT_BUSERR: 1006 printf("system bus error\n"); 1007 break; 1008 case VR_RXSTAT_BUFFERR: 1009 printf("rx buffer error\n"); 1010 break; 1011 default: 1012 printf("unknown rx error\n"); 1013 break; 1014 } 1015 vr_newbuf(sc, cur_rx, m); 1016 continue; 1017 } 1018 1019 /* No errors; receive the packet. */ 1020 total_len = VR_RXBYTES(cur_rx->vr_ptr->vr_status); 1021 1022 /* 1023 * XXX The VIA Rhine chip includes the CRC with every 1024 * received frame, and there's no way to turn this 1025 * behavior off (at least, I can't find anything in 1026 * the manual that explains how to do it) so we have 1027 * to trim off the CRC manually. 1028 */ 1029 total_len -= ETHER_CRC_LEN; 1030 1031 m0 = m_devget(mtod(m, char *) - ETHER_ALIGN, 1032 total_len + ETHER_ALIGN, 0, ifp, NULL); 1033 vr_newbuf(sc, cur_rx, m); 1034 if (m0 == NULL) { 1035 ifp->if_ierrors++; 1036 continue; 1037 } 1038 m_adj(m0, ETHER_ALIGN); 1039 m = m0; 1040 1041 ifp->if_ipackets++; 1042 eh = mtod(m, struct ether_header *); 1043 1044 /* Remove header from mbuf and pass it on. */ 1045 m_adj(m, sizeof(struct ether_header)); 1046 ether_input(ifp, eh, m); 1047 } 1048 1049 return; 1050} 1051 1052void vr_rxeoc(sc) 1053 struct vr_softc *sc; 1054{ 1055 1056 vr_rxeof(sc); 1057 VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_RX_ON); 1058 CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_cdata.vr_rx_head->vr_ptr)); 1059 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_ON); 1060 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_GO); 1061 1062 return; 1063} 1064 1065/* 1066 * A frame was downloaded to the chip. It's safe for us to clean up 1067 * the list buffers. 1068 */ 1069 1070static void vr_txeof(sc) 1071 struct vr_softc *sc; 1072{ 1073 struct vr_chain *cur_tx; 1074 struct ifnet *ifp; 1075 1076 ifp = &sc->arpcom.ac_if; 1077 1078 /* Clear the timeout timer. */ 1079 ifp->if_timer = 0; 1080 1081 /* Sanity check. */ 1082 if (sc->vr_cdata.vr_tx_head == NULL) 1083 return; 1084 1085 /* 1086 * Go through our tx list and free mbufs for those 1087 * frames that have been transmitted. 1088 */ 1089 while(sc->vr_cdata.vr_tx_head->vr_mbuf != NULL) { 1090 u_int32_t txstat; 1091 1092 cur_tx = sc->vr_cdata.vr_tx_head; 1093 txstat = cur_tx->vr_ptr->vr_status; 1094 1095 if (txstat & VR_TXSTAT_OWN) 1096 break; 1097 1098 if (txstat & VR_TXSTAT_ERRSUM) { 1099 ifp->if_oerrors++; 1100 if (txstat & VR_TXSTAT_DEFER) 1101 ifp->if_collisions++; 1102 if (txstat & VR_TXSTAT_LATECOLL) 1103 ifp->if_collisions++; 1104 } 1105 1106 ifp->if_collisions +=(txstat & VR_TXSTAT_COLLCNT) >> 3; 1107 1108 ifp->if_opackets++; 1109 if (cur_tx->vr_mbuf != NULL) { 1110 m_freem(cur_tx->vr_mbuf); 1111 cur_tx->vr_mbuf = NULL; 1112 } 1113 1114 if (sc->vr_cdata.vr_tx_head == sc->vr_cdata.vr_tx_tail) { 1115 sc->vr_cdata.vr_tx_head = NULL; 1116 sc->vr_cdata.vr_tx_tail = NULL; 1117 break; 1118 } 1119 1120 sc->vr_cdata.vr_tx_head = cur_tx->vr_nextdesc; 1121 } 1122 1123 return; 1124} 1125 1126/* 1127 * TX 'end of channel' interrupt handler. 1128 */ 1129static void vr_txeoc(sc) 1130 struct vr_softc *sc; 1131{ 1132 struct ifnet *ifp; 1133 1134 ifp = &sc->arpcom.ac_if; 1135 1136 ifp->if_timer = 0; 1137 1138 if (sc->vr_cdata.vr_tx_head == NULL) { 1139 ifp->if_flags &= ~IFF_OACTIVE; 1140 sc->vr_cdata.vr_tx_tail = NULL; 1141 } 1142 1143 return; 1144} 1145 1146static void vr_tick(xsc) 1147 void *xsc; 1148{ 1149 struct vr_softc *sc; 1150 struct mii_data *mii; 1151 1152 sc = xsc; 1153 VR_LOCK(sc); 1154 mii = device_get_softc(sc->vr_miibus); 1155 mii_tick(mii); 1156 1157 sc->vr_stat_ch = timeout(vr_tick, sc, hz); 1158 1159 VR_UNLOCK(sc); 1160 1161 return; 1162} 1163 1164static void vr_intr(arg) 1165 void *arg; 1166{ 1167 struct vr_softc *sc; 1168 struct ifnet *ifp; 1169 u_int16_t status; 1170 1171 sc = arg; 1172 VR_LOCK(sc); 1173 ifp = &sc->arpcom.ac_if; 1174 1175 /* Supress unwanted interrupts. */ 1176 if (!(ifp->if_flags & IFF_UP)) { 1177 vr_stop(sc); 1178 VR_UNLOCK(sc); 1179 return; 1180 } 1181 1182 /* Disable interrupts. */ 1183 CSR_WRITE_2(sc, VR_IMR, 0x0000); 1184 1185 for (;;) { 1186 1187 status = CSR_READ_2(sc, VR_ISR); 1188 if (status) 1189 CSR_WRITE_2(sc, VR_ISR, status); 1190 1191 if ((status & VR_INTRS) == 0) 1192 break; 1193 1194 if (status & VR_ISR_RX_OK) 1195 vr_rxeof(sc); 1196 1197 if ((status & VR_ISR_RX_ERR) || (status & VR_ISR_RX_NOBUF) || 1198 (status & VR_ISR_RX_NOBUF) || (status & VR_ISR_RX_OFLOW) || 1199 (status & VR_ISR_RX_DROPPED)) { 1200 vr_rxeof(sc); 1201 vr_rxeoc(sc); 1202 } 1203 1204 if (status & VR_ISR_TX_OK) { 1205 vr_txeof(sc); 1206 vr_txeoc(sc); 1207 } 1208 1209 if ((status & VR_ISR_TX_UNDERRUN)||(status & VR_ISR_TX_ABRT)){ 1210 ifp->if_oerrors++; 1211 vr_txeof(sc); 1212 if (sc->vr_cdata.vr_tx_head != NULL) { 1213 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON); 1214 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_GO); 1215 } 1216 } 1217 1218 if (status & VR_ISR_BUSERR) { 1219 vr_reset(sc); 1220 vr_init(sc); 1221 } 1222 } 1223 1224 /* Re-enable interrupts. */ 1225 CSR_WRITE_2(sc, VR_IMR, VR_INTRS); 1226 1227 if (ifp->if_snd.ifq_head != NULL) { 1228 vr_start(ifp); 1229 } 1230 1231 VR_UNLOCK(sc); 1232 1233 return; 1234} 1235 1236/* 1237 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data 1238 * pointers to the fragment pointers. 1239 */ 1240static int vr_encap(sc, c, m_head) 1241 struct vr_softc *sc; 1242 struct vr_chain *c; 1243 struct mbuf *m_head; 1244{ 1245 int frag = 0; 1246 struct vr_desc *f = NULL; 1247 int total_len; 1248 struct mbuf *m; 1249 1250 m = m_head; 1251 total_len = 0; 1252 1253 /* 1254 * The VIA Rhine wants packet buffers to be longword 1255 * aligned, but very often our mbufs aren't. Rather than 1256 * waste time trying to decide when to copy and when not 1257 * to copy, just do it all the time. 1258 */ 1259 if (m != NULL) { 1260 struct mbuf *m_new = NULL; 1261 1262 MGETHDR(m_new, M_DONTWAIT, MT_DATA); 1263 if (m_new == NULL) { 1264 printf("vr%d: no memory for tx list\n", sc->vr_unit); 1265 return(1); 1266 } 1267 if (m_head->m_pkthdr.len > MHLEN) { 1268 MCLGET(m_new, M_DONTWAIT); 1269 if (!(m_new->m_flags & M_EXT)) { 1270 m_freem(m_new); 1271 printf("vr%d: no memory for tx list\n", 1272 sc->vr_unit); 1273 return(1); 1274 } 1275 } 1276 m_copydata(m_head, 0, m_head->m_pkthdr.len, 1277 mtod(m_new, caddr_t)); 1278 m_new->m_pkthdr.len = m_new->m_len = m_head->m_pkthdr.len; 1279 m_freem(m_head); 1280 m_head = m_new; 1281 /* 1282 * The Rhine chip doesn't auto-pad, so we have to make 1283 * sure to pad short frames out to the minimum frame length 1284 * ourselves. 1285 */ 1286 if (m_head->m_len < VR_MIN_FRAMELEN) { 1287 m_new->m_pkthdr.len += VR_MIN_FRAMELEN - m_new->m_len; 1288 m_new->m_len = m_new->m_pkthdr.len; 1289 } 1290 f = c->vr_ptr; 1291 f->vr_data = vtophys(mtod(m_new, caddr_t)); 1292 f->vr_ctl = total_len = m_new->m_len; 1293 f->vr_ctl |= VR_TXCTL_TLINK|VR_TXCTL_FIRSTFRAG; 1294 f->vr_status = 0; 1295 frag = 1; 1296 } 1297 1298 c->vr_mbuf = m_head; 1299 c->vr_ptr->vr_ctl |= VR_TXCTL_LASTFRAG|VR_TXCTL_FINT; 1300 c->vr_ptr->vr_next = vtophys(c->vr_nextdesc->vr_ptr); 1301 1302 return(0); 1303} 1304 1305/* 1306 * Main transmit routine. To avoid having to do mbuf copies, we put pointers 1307 * to the mbuf data regions directly in the transmit lists. We also save a 1308 * copy of the pointers since the transmit list fragment pointers are 1309 * physical addresses. 1310 */ 1311 1312static void vr_start(ifp) 1313 struct ifnet *ifp; 1314{ 1315 struct vr_softc *sc; 1316 struct mbuf *m_head = NULL; 1317 struct vr_chain *cur_tx = NULL, *start_tx; 1318 1319 sc = ifp->if_softc; 1320 1321 VR_LOCK(sc); 1322 if (ifp->if_flags & IFF_OACTIVE) { 1323 VR_UNLOCK(sc); 1324 return; 1325 } 1326 1327 /* 1328 * Check for an available queue slot. If there are none, 1329 * punt. 1330 */ 1331 if (sc->vr_cdata.vr_tx_free->vr_mbuf != NULL) { 1332 ifp->if_flags |= IFF_OACTIVE; 1333 return; 1334 } 1335 1336 start_tx = sc->vr_cdata.vr_tx_free; 1337 1338 while(sc->vr_cdata.vr_tx_free->vr_mbuf == NULL) { 1339 IF_DEQUEUE(&ifp->if_snd, m_head); 1340 if (m_head == NULL) 1341 break; 1342 1343 /* Pick a descriptor off the free list. */ 1344 cur_tx = sc->vr_cdata.vr_tx_free; 1345 sc->vr_cdata.vr_tx_free = cur_tx->vr_nextdesc; 1346 1347 /* Pack the data into the descriptor. */ 1348 if (vr_encap(sc, cur_tx, m_head)) { 1349 IF_PREPEND(&ifp->if_snd, m_head); 1350 ifp->if_flags |= IFF_OACTIVE; 1351 cur_tx = NULL; 1352 break; 1353 } 1354 1355 if (cur_tx != start_tx) 1356 VR_TXOWN(cur_tx) = VR_TXSTAT_OWN; 1357 1358 /* 1359 * If there's a BPF listener, bounce a copy of this frame 1360 * to him. 1361 */ 1362 if (ifp->if_bpf) 1363 bpf_mtap(ifp, cur_tx->vr_mbuf); 1364 1365 VR_TXOWN(cur_tx) = VR_TXSTAT_OWN; 1366 VR_SETBIT16(sc, VR_COMMAND, /*VR_CMD_TX_ON|*/VR_CMD_TX_GO); 1367 } 1368 1369 /* 1370 * If there are no frames queued, bail. 1371 */ 1372 if (cur_tx == NULL) { 1373 VR_UNLOCK(sc); 1374 return; 1375 } 1376 1377 sc->vr_cdata.vr_tx_tail = cur_tx; 1378 1379 if (sc->vr_cdata.vr_tx_head == NULL) 1380 sc->vr_cdata.vr_tx_head = start_tx; 1381 1382 /* 1383 * Set a timeout in case the chip goes out to lunch. 1384 */ 1385 ifp->if_timer = 5; 1386 VR_UNLOCK(sc); 1387 1388 return; 1389} 1390 1391static void vr_init(xsc) 1392 void *xsc; 1393{ 1394 struct vr_softc *sc = xsc; 1395 struct ifnet *ifp = &sc->arpcom.ac_if; 1396 struct mii_data *mii; 1397 1398 VR_LOCK(sc); 1399 1400 mii = device_get_softc(sc->vr_miibus); 1401 1402 /* 1403 * Cancel pending I/O and free all RX/TX buffers. 1404 */ 1405 vr_stop(sc); 1406 vr_reset(sc); 1407 1408 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_THRESH); 1409 VR_SETBIT(sc, VR_RXCFG, VR_RXTHRESH_STORENFWD); 1410 1411 VR_CLRBIT(sc, VR_TXCFG, VR_TXCFG_TX_THRESH); 1412 VR_SETBIT(sc, VR_TXCFG, VR_TXTHRESH_STORENFWD); 1413 1414 /* Init circular RX list. */ 1415 if (vr_list_rx_init(sc) == ENOBUFS) { 1416 printf("vr%d: initialization failed: no " 1417 "memory for rx buffers\n", sc->vr_unit); 1418 vr_stop(sc); 1419 VR_UNLOCK(sc); 1420 return; 1421 } 1422 1423 /* 1424 * Init tx descriptors. 1425 */ 1426 vr_list_tx_init(sc); 1427 1428 /* If we want promiscuous mode, set the allframes bit. */ 1429 if (ifp->if_flags & IFF_PROMISC) 1430 VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC); 1431 else 1432 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC); 1433 1434 /* Set capture broadcast bit to capture broadcast frames. */ 1435 if (ifp->if_flags & IFF_BROADCAST) 1436 VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD); 1437 else 1438 VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD); 1439 1440 /* 1441 * Program the multicast filter, if necessary. 1442 */ 1443 vr_setmulti(sc); 1444 1445 /* 1446 * Load the address of the RX list. 1447 */ 1448 CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_cdata.vr_rx_head->vr_ptr)); 1449 1450 /* Enable receiver and transmitter. */ 1451 CSR_WRITE_2(sc, VR_COMMAND, VR_CMD_TX_NOPOLL|VR_CMD_START| 1452 VR_CMD_TX_ON|VR_CMD_RX_ON| 1453 VR_CMD_RX_GO); 1454 1455 CSR_WRITE_4(sc, VR_TXADDR, vtophys(&sc->vr_ldata->vr_tx_list[0])); 1456 1457 /* 1458 * Enable interrupts. 1459 */ 1460 CSR_WRITE_2(sc, VR_ISR, 0xFFFF); 1461 CSR_WRITE_2(sc, VR_IMR, VR_INTRS); 1462 1463 mii_mediachg(mii); 1464 1465 ifp->if_flags |= IFF_RUNNING; 1466 ifp->if_flags &= ~IFF_OACTIVE; 1467 1468 sc->vr_stat_ch = timeout(vr_tick, sc, hz); 1469 1470 VR_UNLOCK(sc); 1471 1472 return; 1473} 1474 1475/* 1476 * Set media options. 1477 */ 1478static int vr_ifmedia_upd(ifp) 1479 struct ifnet *ifp; 1480{ 1481 struct vr_softc *sc; 1482 1483 sc = ifp->if_softc; 1484 1485 if (ifp->if_flags & IFF_UP) 1486 vr_init(sc); 1487 1488 return(0); 1489} 1490 1491/* 1492 * Report current media status. 1493 */ 1494static void vr_ifmedia_sts(ifp, ifmr) 1495 struct ifnet *ifp; 1496 struct ifmediareq *ifmr; 1497{ 1498 struct vr_softc *sc; 1499 struct mii_data *mii; 1500 1501 sc = ifp->if_softc; 1502 mii = device_get_softc(sc->vr_miibus); 1503 mii_pollstat(mii); 1504 ifmr->ifm_active = mii->mii_media_active; 1505 ifmr->ifm_status = mii->mii_media_status; 1506 1507 return; 1508} 1509 1510static int vr_ioctl(ifp, command, data) 1511 struct ifnet *ifp; 1512 u_long command; 1513 caddr_t data; 1514{ 1515 struct vr_softc *sc = ifp->if_softc; 1516 struct ifreq *ifr = (struct ifreq *) data; 1517 struct mii_data *mii; 1518 int error = 0; 1519 1520 VR_LOCK(sc); 1521 1522 switch(command) { 1523 case SIOCSIFADDR: 1524 case SIOCGIFADDR: 1525 case SIOCSIFMTU: 1526 error = ether_ioctl(ifp, command, data); 1527 break; 1528 case SIOCSIFFLAGS: 1529 if (ifp->if_flags & IFF_UP) { 1530 vr_init(sc); 1531 } else { 1532 if (ifp->if_flags & IFF_RUNNING) 1533 vr_stop(sc); 1534 } 1535 error = 0; 1536 break; 1537 case SIOCADDMULTI: 1538 case SIOCDELMULTI: 1539 vr_setmulti(sc); 1540 error = 0; 1541 break; 1542 case SIOCGIFMEDIA: 1543 case SIOCSIFMEDIA: 1544 mii = device_get_softc(sc->vr_miibus); 1545 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); 1546 break; 1547 default: 1548 error = EINVAL; 1549 break; 1550 } 1551 1552 VR_UNLOCK(sc); 1553 1554 return(error); 1555} 1556 1557static void vr_watchdog(ifp) 1558 struct ifnet *ifp; 1559{ 1560 struct vr_softc *sc; 1561 1562 sc = ifp->if_softc; 1563 1564 VR_LOCK(sc); 1565 ifp->if_oerrors++; 1566 printf("vr%d: watchdog timeout\n", sc->vr_unit); 1567 1568 vr_stop(sc); 1569 vr_reset(sc); 1570 vr_init(sc); 1571 1572 if (ifp->if_snd.ifq_head != NULL) 1573 vr_start(ifp); 1574 1575 VR_UNLOCK(sc); 1576 1577 return; 1578} 1579 1580/* 1581 * Stop the adapter and free any mbufs allocated to the 1582 * RX and TX lists. 1583 */ 1584static void vr_stop(sc) 1585 struct vr_softc *sc; 1586{ 1587 register int i; 1588 struct ifnet *ifp; 1589 1590 VR_LOCK(sc); 1591 1592 ifp = &sc->arpcom.ac_if; 1593 ifp->if_timer = 0; 1594 1595 untimeout(vr_tick, sc, sc->vr_stat_ch); 1596 1597 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_STOP); 1598 VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_RX_ON|VR_CMD_TX_ON)); 1599 CSR_WRITE_2(sc, VR_IMR, 0x0000); 1600 CSR_WRITE_4(sc, VR_TXADDR, 0x00000000); 1601 CSR_WRITE_4(sc, VR_RXADDR, 0x00000000); 1602 1603 /* 1604 * Free data in the RX lists. 1605 */ 1606 for (i = 0; i < VR_RX_LIST_CNT; i++) { 1607 if (sc->vr_cdata.vr_rx_chain[i].vr_mbuf != NULL) { 1608 m_freem(sc->vr_cdata.vr_rx_chain[i].vr_mbuf); 1609 sc->vr_cdata.vr_rx_chain[i].vr_mbuf = NULL; 1610 } 1611 } 1612 bzero((char *)&sc->vr_ldata->vr_rx_list, 1613 sizeof(sc->vr_ldata->vr_rx_list)); 1614 1615 /* 1616 * Free the TX list buffers. 1617 */ 1618 for (i = 0; i < VR_TX_LIST_CNT; i++) { 1619 if (sc->vr_cdata.vr_tx_chain[i].vr_mbuf != NULL) { 1620 m_freem(sc->vr_cdata.vr_tx_chain[i].vr_mbuf); 1621 sc->vr_cdata.vr_tx_chain[i].vr_mbuf = NULL; 1622 } 1623 } 1624 1625 bzero((char *)&sc->vr_ldata->vr_tx_list, 1626 sizeof(sc->vr_ldata->vr_tx_list)); 1627 1628 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1629 VR_UNLOCK(sc); 1630 1631 return; 1632} 1633 1634/* 1635 * Stop all chip I/O so that the kernel's probe routines don't 1636 * get confused by errant DMAs when rebooting. 1637 */ 1638static void vr_shutdown(dev) 1639 device_t dev; 1640{ 1641 struct vr_softc *sc; 1642 1643 sc = device_get_softc(dev); 1644 1645 vr_stop(sc); 1646 1647 return; 1648} 1649