if_runreg.h revision 257410
1203134Sthompsa/* $OpenBSD: rt2860reg.h,v 1.19 2009/05/18 19:25:07 damien Exp $ */ 2203134Sthompsa 3203134Sthompsa/*- 4203134Sthompsa * Copyright (c) 2007 5203134Sthompsa * Damien Bergamini <damien.bergamini@free.fr> 6203134Sthompsa * 7203134Sthompsa * Permission to use, copy, modify, and distribute this software for any 8203134Sthompsa * purpose with or without fee is hereby granted, provided that the above 9203134Sthompsa * copyright notice and this permission notice appear in all copies. 10203134Sthompsa * 11203134Sthompsa * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12203134Sthompsa * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13203134Sthompsa * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14203134Sthompsa * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15203134Sthompsa * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16203134Sthompsa * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17203134Sthompsa * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18203134Sthompsa * 19203134Sthompsa * $FreeBSD: head/sys/dev/usb/wlan/if_runreg.h 257410 2013-10-31 02:02:14Z kevlo $ 20203134Sthompsa */ 21203134Sthompsa 22203134Sthompsa#ifndef _IF_RUNREG_H_ 23203134Sthompsa#define _IF_RUNREG_H_ 24203134Sthompsa 25203134Sthompsa/* PCI registers */ 26203134Sthompsa#define RT2860_PCI_CFG 0x0000 27203134Sthompsa#define RT2860_PCI_EECTRL 0x0004 28203134Sthompsa#define RT2860_PCI_MCUCTRL 0x0008 29203134Sthompsa#define RT2860_PCI_SYSCTRL 0x000c 30203134Sthompsa#define RT2860_PCIE_JTAG 0x0010 31203134Sthompsa 32203134Sthompsa#define RT2860_CONFIG_NO 1 33203134Sthompsa#define RT2860_IFACE_INDEX 0 34203134Sthompsa 35203134Sthompsa#define RT3070_OPT_14 0x0114 36203134Sthompsa 37203134Sthompsa/* SCH/DMA registers */ 38203134Sthompsa#define RT2860_INT_STATUS 0x0200 39203134Sthompsa#define RT2860_INT_MASK 0x0204 40203134Sthompsa#define RT2860_WPDMA_GLO_CFG 0x0208 41203134Sthompsa#define RT2860_WPDMA_RST_IDX 0x020c 42203134Sthompsa#define RT2860_DELAY_INT_CFG 0x0210 43203134Sthompsa#define RT2860_WMM_AIFSN_CFG 0x0214 44203134Sthompsa#define RT2860_WMM_CWMIN_CFG 0x0218 45203134Sthompsa#define RT2860_WMM_CWMAX_CFG 0x021c 46203134Sthompsa#define RT2860_WMM_TXOP0_CFG 0x0220 47203134Sthompsa#define RT2860_WMM_TXOP1_CFG 0x0224 48203134Sthompsa#define RT2860_GPIO_CTRL 0x0228 49203134Sthompsa#define RT2860_MCU_CMD_REG 0x022c 50203134Sthompsa#define RT2860_TX_BASE_PTR(qid) (0x0230 + (qid) * 16) 51203134Sthompsa#define RT2860_TX_MAX_CNT(qid) (0x0234 + (qid) * 16) 52203134Sthompsa#define RT2860_TX_CTX_IDX(qid) (0x0238 + (qid) * 16) 53203134Sthompsa#define RT2860_TX_DTX_IDX(qid) (0x023c + (qid) * 16) 54203134Sthompsa#define RT2860_RX_BASE_PTR 0x0290 55203134Sthompsa#define RT2860_RX_MAX_CNT 0x0294 56203134Sthompsa#define RT2860_RX_CALC_IDX 0x0298 57203134Sthompsa#define RT2860_FS_DRX_IDX 0x029c 58203134Sthompsa#define RT2860_USB_DMA_CFG 0x02a0 /* RT2870 only */ 59203134Sthompsa#define RT2860_US_CYC_CNT 0x02a4 60203134Sthompsa 61203134Sthompsa/* PBF registers */ 62203134Sthompsa#define RT2860_SYS_CTRL 0x0400 63203134Sthompsa#define RT2860_HOST_CMD 0x0404 64203134Sthompsa#define RT2860_PBF_CFG 0x0408 65203134Sthompsa#define RT2860_MAX_PCNT 0x040c 66203134Sthompsa#define RT2860_BUF_CTRL 0x0410 67203134Sthompsa#define RT2860_MCU_INT_STA 0x0414 68203134Sthompsa#define RT2860_MCU_INT_ENA 0x0418 69203134Sthompsa#define RT2860_TXQ_IO(qid) (0x041c + (qid) * 4) 70203134Sthompsa#define RT2860_RX0Q_IO 0x0424 71203134Sthompsa#define RT2860_BCN_OFFSET0 0x042c 72203134Sthompsa#define RT2860_BCN_OFFSET1 0x0430 73203134Sthompsa#define RT2860_TXRXQ_STA 0x0434 74203134Sthompsa#define RT2860_TXRXQ_PCNT 0x0438 75203134Sthompsa#define RT2860_PBF_DBG 0x043c 76203134Sthompsa#define RT2860_CAP_CTRL 0x0440 77203134Sthompsa 78203134Sthompsa/* RT3070 registers */ 79203134Sthompsa#define RT3070_RF_CSR_CFG 0x0500 80203134Sthompsa#define RT3070_EFUSE_CTRL 0x0580 81203134Sthompsa#define RT3070_EFUSE_DATA0 0x0590 82203134Sthompsa#define RT3070_EFUSE_DATA1 0x0594 83203134Sthompsa#define RT3070_EFUSE_DATA2 0x0598 84203134Sthompsa#define RT3070_EFUSE_DATA3 0x059c 85203134Sthompsa#define RT3070_LDO_CFG0 0x05d4 86203134Sthompsa#define RT3070_GPIO_SWITCH 0x05dc 87203134Sthompsa 88203134Sthompsa/* MAC registers */ 89203134Sthompsa#define RT2860_ASIC_VER_ID 0x1000 90203134Sthompsa#define RT2860_MAC_SYS_CTRL 0x1004 91203134Sthompsa#define RT2860_MAC_ADDR_DW0 0x1008 92203134Sthompsa#define RT2860_MAC_ADDR_DW1 0x100c 93203134Sthompsa#define RT2860_MAC_BSSID_DW0 0x1010 94203134Sthompsa#define RT2860_MAC_BSSID_DW1 0x1014 95203134Sthompsa#define RT2860_MAX_LEN_CFG 0x1018 96203134Sthompsa#define RT2860_BBP_CSR_CFG 0x101c 97203134Sthompsa#define RT2860_RF_CSR_CFG0 0x1020 98203134Sthompsa#define RT2860_RF_CSR_CFG1 0x1024 99203134Sthompsa#define RT2860_RF_CSR_CFG2 0x1028 100203134Sthompsa#define RT2860_LED_CFG 0x102c 101203134Sthompsa 102203134Sthompsa/* undocumented registers */ 103203134Sthompsa#define RT2860_DEBUG 0x10f4 104203134Sthompsa 105203134Sthompsa/* MAC Timing control registers */ 106203134Sthompsa#define RT2860_XIFS_TIME_CFG 0x1100 107203134Sthompsa#define RT2860_BKOFF_SLOT_CFG 0x1104 108203134Sthompsa#define RT2860_NAV_TIME_CFG 0x1108 109203134Sthompsa#define RT2860_CH_TIME_CFG 0x110c 110203134Sthompsa#define RT2860_PBF_LIFE_TIMER 0x1110 111203134Sthompsa#define RT2860_BCN_TIME_CFG 0x1114 112203134Sthompsa#define RT2860_TBTT_SYNC_CFG 0x1118 113203134Sthompsa#define RT2860_TSF_TIMER_DW0 0x111c 114203134Sthompsa#define RT2860_TSF_TIMER_DW1 0x1120 115203134Sthompsa#define RT2860_TBTT_TIMER 0x1124 116203134Sthompsa#define RT2860_INT_TIMER_CFG 0x1128 117203134Sthompsa#define RT2860_INT_TIMER_EN 0x112c 118203134Sthompsa#define RT2860_CH_IDLE_TIME 0x1130 119203134Sthompsa 120203134Sthompsa/* MAC Power Save configuration registers */ 121203134Sthompsa#define RT2860_MAC_STATUS_REG 0x1200 122203134Sthompsa#define RT2860_PWR_PIN_CFG 0x1204 123203134Sthompsa#define RT2860_AUTO_WAKEUP_CFG 0x1208 124203134Sthompsa 125203134Sthompsa/* MAC TX configuration registers */ 126203134Sthompsa#define RT2860_EDCA_AC_CFG(aci) (0x1300 + (aci) * 4) 127203134Sthompsa#define RT2860_EDCA_TID_AC_MAP 0x1310 128203134Sthompsa#define RT2860_TX_PWR_CFG(ridx) (0x1314 + (ridx) * 4) 129203134Sthompsa#define RT2860_TX_PIN_CFG 0x1328 130203134Sthompsa#define RT2860_TX_BAND_CFG 0x132c 131203134Sthompsa#define RT2860_TX_SW_CFG0 0x1330 132203134Sthompsa#define RT2860_TX_SW_CFG1 0x1334 133203134Sthompsa#define RT2860_TX_SW_CFG2 0x1338 134203134Sthompsa#define RT2860_TXOP_THRES_CFG 0x133c 135203134Sthompsa#define RT2860_TXOP_CTRL_CFG 0x1340 136203134Sthompsa#define RT2860_TX_RTS_CFG 0x1344 137203134Sthompsa#define RT2860_TX_TIMEOUT_CFG 0x1348 138203134Sthompsa#define RT2860_TX_RTY_CFG 0x134c 139203134Sthompsa#define RT2860_TX_LINK_CFG 0x1350 140203134Sthompsa#define RT2860_HT_FBK_CFG0 0x1354 141203134Sthompsa#define RT2860_HT_FBK_CFG1 0x1358 142203134Sthompsa#define RT2860_LG_FBK_CFG0 0x135c 143203134Sthompsa#define RT2860_LG_FBK_CFG1 0x1360 144203134Sthompsa#define RT2860_CCK_PROT_CFG 0x1364 145203134Sthompsa#define RT2860_OFDM_PROT_CFG 0x1368 146203134Sthompsa#define RT2860_MM20_PROT_CFG 0x136c 147203134Sthompsa#define RT2860_MM40_PROT_CFG 0x1370 148203134Sthompsa#define RT2860_GF20_PROT_CFG 0x1374 149203134Sthompsa#define RT2860_GF40_PROT_CFG 0x1378 150203134Sthompsa#define RT2860_EXP_CTS_TIME 0x137c 151203134Sthompsa#define RT2860_EXP_ACK_TIME 0x1380 152203134Sthompsa 153203134Sthompsa/* MAC RX configuration registers */ 154203134Sthompsa#define RT2860_RX_FILTR_CFG 0x1400 155203134Sthompsa#define RT2860_AUTO_RSP_CFG 0x1404 156203134Sthompsa#define RT2860_LEGACY_BASIC_RATE 0x1408 157203134Sthompsa#define RT2860_HT_BASIC_RATE 0x140c 158203134Sthompsa#define RT2860_HT_CTRL_CFG 0x1410 159203134Sthompsa#define RT2860_SIFS_COST_CFG 0x1414 160203134Sthompsa#define RT2860_RX_PARSER_CFG 0x1418 161203134Sthompsa 162203134Sthompsa/* MAC Security configuration registers */ 163203134Sthompsa#define RT2860_TX_SEC_CNT0 0x1500 164203134Sthompsa#define RT2860_RX_SEC_CNT0 0x1504 165203134Sthompsa#define RT2860_CCMP_FC_MUTE 0x1508 166203134Sthompsa 167203134Sthompsa/* MAC HCCA/PSMP configuration registers */ 168203134Sthompsa#define RT2860_TXOP_HLDR_ADDR0 0x1600 169203134Sthompsa#define RT2860_TXOP_HLDR_ADDR1 0x1604 170203134Sthompsa#define RT2860_TXOP_HLDR_ET 0x1608 171203134Sthompsa#define RT2860_QOS_CFPOLL_RA_DW0 0x160c 172203134Sthompsa#define RT2860_QOS_CFPOLL_A1_DW1 0x1610 173203134Sthompsa#define RT2860_QOS_CFPOLL_QC 0x1614 174203134Sthompsa 175203134Sthompsa/* MAC Statistics Counters */ 176203134Sthompsa#define RT2860_RX_STA_CNT0 0x1700 177203134Sthompsa#define RT2860_RX_STA_CNT1 0x1704 178203134Sthompsa#define RT2860_RX_STA_CNT2 0x1708 179203134Sthompsa#define RT2860_TX_STA_CNT0 0x170c 180203134Sthompsa#define RT2860_TX_STA_CNT1 0x1710 181203134Sthompsa#define RT2860_TX_STA_CNT2 0x1714 182203134Sthompsa#define RT2860_TX_STAT_FIFO 0x1718 183203134Sthompsa 184203134Sthompsa/* RX WCID search table */ 185203134Sthompsa#define RT2860_WCID_ENTRY(wcid) (0x1800 + (wcid) * 8) 186203134Sthompsa 187203134Sthompsa#define RT2860_FW_BASE 0x2000 188203134Sthompsa#define RT2870_FW_BASE 0x3000 189203134Sthompsa 190203134Sthompsa/* Pair-wise key table */ 191203134Sthompsa#define RT2860_PKEY(wcid) (0x4000 + (wcid) * 32) 192203134Sthompsa 193203134Sthompsa/* IV/EIV table */ 194203134Sthompsa#define RT2860_IVEIV(wcid) (0x6000 + (wcid) * 8) 195203134Sthompsa 196203134Sthompsa/* WCID attribute table */ 197203134Sthompsa#define RT2860_WCID_ATTR(wcid) (0x6800 + (wcid) * 4) 198203134Sthompsa 199203134Sthompsa/* Shared Key Table */ 200203134Sthompsa#define RT2860_SKEY(vap, kidx) (0x6c00 + (vap) * 128 + (kidx) * 32) 201203134Sthompsa 202203134Sthompsa/* Shared Key Mode */ 203203134Sthompsa#define RT2860_SKEY_MODE_0_7 0x7000 204203134Sthompsa#define RT2860_SKEY_MODE_8_15 0x7004 205203134Sthompsa#define RT2860_SKEY_MODE_16_23 0x7008 206203134Sthompsa#define RT2860_SKEY_MODE_24_31 0x700c 207203134Sthompsa 208203134Sthompsa/* Shared Memory between MCU and host */ 209203134Sthompsa#define RT2860_H2M_MAILBOX 0x7010 210203134Sthompsa#define RT2860_H2M_MAILBOX_CID 0x7014 211203134Sthompsa#define RT2860_H2M_MAILBOX_STATUS 0x701c 212203134Sthompsa#define RT2860_H2M_BBPAGENT 0x7028 213203134Sthompsa#define RT2860_BCN_BASE(vap) (0x7800 + (vap) * 512) 214203134Sthompsa 215203134Sthompsa 216203134Sthompsa/* possible flags for register RT2860_PCI_EECTRL */ 217203134Sthompsa#define RT2860_C (1 << 0) 218203134Sthompsa#define RT2860_S (1 << 1) 219203134Sthompsa#define RT2860_D (1 << 2) 220203134Sthompsa#define RT2860_SHIFT_D 2 221203134Sthompsa#define RT2860_Q (1 << 3) 222203134Sthompsa#define RT2860_SHIFT_Q 3 223203134Sthompsa 224203134Sthompsa/* possible flags for registers INT_STATUS/INT_MASK */ 225203134Sthompsa#define RT2860_TX_COHERENT (1 << 17) 226203134Sthompsa#define RT2860_RX_COHERENT (1 << 16) 227203134Sthompsa#define RT2860_MAC_INT_4 (1 << 15) 228203134Sthompsa#define RT2860_MAC_INT_3 (1 << 14) 229203134Sthompsa#define RT2860_MAC_INT_2 (1 << 13) 230203134Sthompsa#define RT2860_MAC_INT_1 (1 << 12) 231203134Sthompsa#define RT2860_MAC_INT_0 (1 << 11) 232203134Sthompsa#define RT2860_TX_RX_COHERENT (1 << 10) 233203134Sthompsa#define RT2860_MCU_CMD_INT (1 << 9) 234203134Sthompsa#define RT2860_TX_DONE_INT5 (1 << 8) 235203134Sthompsa#define RT2860_TX_DONE_INT4 (1 << 7) 236203134Sthompsa#define RT2860_TX_DONE_INT3 (1 << 6) 237203134Sthompsa#define RT2860_TX_DONE_INT2 (1 << 5) 238203134Sthompsa#define RT2860_TX_DONE_INT1 (1 << 4) 239203134Sthompsa#define RT2860_TX_DONE_INT0 (1 << 3) 240203134Sthompsa#define RT2860_RX_DONE_INT (1 << 2) 241203134Sthompsa#define RT2860_TX_DLY_INT (1 << 1) 242203134Sthompsa#define RT2860_RX_DLY_INT (1 << 0) 243203134Sthompsa 244203134Sthompsa/* possible flags for register WPDMA_GLO_CFG */ 245203134Sthompsa#define RT2860_HDR_SEG_LEN_SHIFT 8 246203134Sthompsa#define RT2860_BIG_ENDIAN (1 << 7) 247203134Sthompsa#define RT2860_TX_WB_DDONE (1 << 6) 248203134Sthompsa#define RT2860_WPDMA_BT_SIZE_SHIFT 4 249203134Sthompsa#define RT2860_WPDMA_BT_SIZE16 0 250203134Sthompsa#define RT2860_WPDMA_BT_SIZE32 1 251203134Sthompsa#define RT2860_WPDMA_BT_SIZE64 2 252203134Sthompsa#define RT2860_WPDMA_BT_SIZE128 3 253203134Sthompsa#define RT2860_RX_DMA_BUSY (1 << 3) 254203134Sthompsa#define RT2860_RX_DMA_EN (1 << 2) 255203134Sthompsa#define RT2860_TX_DMA_BUSY (1 << 1) 256203134Sthompsa#define RT2860_TX_DMA_EN (1 << 0) 257203134Sthompsa 258203134Sthompsa/* possible flags for register DELAY_INT_CFG */ 259203134Sthompsa#define RT2860_TXDLY_INT_EN (1 << 31) 260203134Sthompsa#define RT2860_TXMAX_PINT_SHIFT 24 261203134Sthompsa#define RT2860_TXMAX_PTIME_SHIFT 16 262203134Sthompsa#define RT2860_RXDLY_INT_EN (1 << 15) 263203134Sthompsa#define RT2860_RXMAX_PINT_SHIFT 8 264203134Sthompsa#define RT2860_RXMAX_PTIME_SHIFT 0 265203134Sthompsa 266203134Sthompsa/* possible flags for register GPIO_CTRL */ 267203134Sthompsa#define RT2860_GPIO_D_SHIFT 8 268203134Sthompsa#define RT2860_GPIO_O_SHIFT 0 269203134Sthompsa 270203134Sthompsa/* possible flags for register USB_DMA_CFG */ 271203134Sthompsa#define RT2860_USB_TX_BUSY (1 << 31) 272203134Sthompsa#define RT2860_USB_RX_BUSY (1 << 30) 273203134Sthompsa#define RT2860_USB_EPOUT_VLD_SHIFT 24 274203134Sthompsa#define RT2860_USB_TX_EN (1 << 23) 275203134Sthompsa#define RT2860_USB_RX_EN (1 << 22) 276203134Sthompsa#define RT2860_USB_RX_AGG_EN (1 << 21) 277203134Sthompsa#define RT2860_USB_TXOP_HALT (1 << 20) 278203134Sthompsa#define RT2860_USB_TX_CLEAR (1 << 19) 279203134Sthompsa#define RT2860_USB_PHY_WD_EN (1 << 16) 280203134Sthompsa#define RT2860_USB_PHY_MAN_RST (1 << 15) 281203134Sthompsa#define RT2860_USB_RX_AGG_LMT(x) ((x) << 8) /* in unit of 1KB */ 282203134Sthompsa#define RT2860_USB_RX_AGG_TO(x) ((x) & 0xff) /* in unit of 33ns */ 283203134Sthompsa 284203134Sthompsa/* possible flags for register US_CYC_CNT */ 285203134Sthompsa#define RT2860_TEST_EN (1 << 24) 286203134Sthompsa#define RT2860_TEST_SEL_SHIFT 16 287203134Sthompsa#define RT2860_BT_MODE_EN (1 << 8) 288203134Sthompsa#define RT2860_US_CYC_CNT_SHIFT 0 289203134Sthompsa 290203134Sthompsa/* possible flags for register SYS_CTRL */ 291203134Sthompsa#define RT2860_HST_PM_SEL (1 << 16) 292203134Sthompsa#define RT2860_CAP_MODE (1 << 14) 293203134Sthompsa#define RT2860_PME_OEN (1 << 13) 294203134Sthompsa#define RT2860_CLKSELECT (1 << 12) 295203134Sthompsa#define RT2860_PBF_CLK_EN (1 << 11) 296203134Sthompsa#define RT2860_MAC_CLK_EN (1 << 10) 297203134Sthompsa#define RT2860_DMA_CLK_EN (1 << 9) 298203134Sthompsa#define RT2860_MCU_READY (1 << 7) 299203134Sthompsa#define RT2860_ASY_RESET (1 << 4) 300203134Sthompsa#define RT2860_PBF_RESET (1 << 3) 301203134Sthompsa#define RT2860_MAC_RESET (1 << 2) 302203134Sthompsa#define RT2860_DMA_RESET (1 << 1) 303203134Sthompsa#define RT2860_MCU_RESET (1 << 0) 304203134Sthompsa 305203134Sthompsa/* possible values for register HOST_CMD */ 306203134Sthompsa#define RT2860_MCU_CMD_SLEEP 0x30 307203134Sthompsa#define RT2860_MCU_CMD_WAKEUP 0x31 308203134Sthompsa#define RT2860_MCU_CMD_LEDS 0x50 309203134Sthompsa#define RT2860_MCU_CMD_LED_RSSI 0x51 310203134Sthompsa#define RT2860_MCU_CMD_LED1 0x52 311203134Sthompsa#define RT2860_MCU_CMD_LED2 0x53 312203134Sthompsa#define RT2860_MCU_CMD_LED3 0x54 313205042Sthompsa#define RT2860_MCU_CMD_RFRESET 0x72 314205042Sthompsa#define RT2860_MCU_CMD_ANTSEL 0x73 315203134Sthompsa#define RT2860_MCU_CMD_BBP 0x80 316203134Sthompsa#define RT2860_MCU_CMD_PSLEVEL 0x83 317203134Sthompsa 318203134Sthompsa/* possible flags for register PBF_CFG */ 319203134Sthompsa#define RT2860_TX1Q_NUM_SHIFT 21 320203134Sthompsa#define RT2860_TX2Q_NUM_SHIFT 16 321203134Sthompsa#define RT2860_NULL0_MODE (1 << 15) 322203134Sthompsa#define RT2860_NULL1_MODE (1 << 14) 323203134Sthompsa#define RT2860_RX_DROP_MODE (1 << 13) 324203134Sthompsa#define RT2860_TX0Q_MANUAL (1 << 12) 325203134Sthompsa#define RT2860_TX1Q_MANUAL (1 << 11) 326203134Sthompsa#define RT2860_TX2Q_MANUAL (1 << 10) 327203134Sthompsa#define RT2860_RX0Q_MANUAL (1 << 9) 328203134Sthompsa#define RT2860_HCCA_EN (1 << 8) 329203134Sthompsa#define RT2860_TX0Q_EN (1 << 4) 330203134Sthompsa#define RT2860_TX1Q_EN (1 << 3) 331203134Sthompsa#define RT2860_TX2Q_EN (1 << 2) 332203134Sthompsa#define RT2860_RX0Q_EN (1 << 1) 333203134Sthompsa 334203134Sthompsa/* possible flags for register BUF_CTRL */ 335203134Sthompsa#define RT2860_WRITE_TXQ(qid) (1 << (11 - (qid))) 336203134Sthompsa#define RT2860_NULL0_KICK (1 << 7) 337203134Sthompsa#define RT2860_NULL1_KICK (1 << 6) 338203134Sthompsa#define RT2860_BUF_RESET (1 << 5) 339203134Sthompsa#define RT2860_READ_TXQ(qid) (1 << (3 - (qid)) 340203134Sthompsa#define RT2860_READ_RX0Q (1 << 0) 341203134Sthompsa 342203134Sthompsa/* possible flags for registers MCU_INT_STA/MCU_INT_ENA */ 343203134Sthompsa#define RT2860_MCU_MAC_INT_8 (1 << 24) 344203134Sthompsa#define RT2860_MCU_MAC_INT_7 (1 << 23) 345203134Sthompsa#define RT2860_MCU_MAC_INT_6 (1 << 22) 346203134Sthompsa#define RT2860_MCU_MAC_INT_4 (1 << 20) 347203134Sthompsa#define RT2860_MCU_MAC_INT_3 (1 << 19) 348203134Sthompsa#define RT2860_MCU_MAC_INT_2 (1 << 18) 349203134Sthompsa#define RT2860_MCU_MAC_INT_1 (1 << 17) 350203134Sthompsa#define RT2860_MCU_MAC_INT_0 (1 << 16) 351203134Sthompsa#define RT2860_DTX0_INT (1 << 11) 352203134Sthompsa#define RT2860_DTX1_INT (1 << 10) 353203134Sthompsa#define RT2860_DTX2_INT (1 << 9) 354203134Sthompsa#define RT2860_DRX0_INT (1 << 8) 355203134Sthompsa#define RT2860_HCMD_INT (1 << 7) 356203134Sthompsa#define RT2860_N0TX_INT (1 << 6) 357203134Sthompsa#define RT2860_N1TX_INT (1 << 5) 358203134Sthompsa#define RT2860_BCNTX_INT (1 << 4) 359203134Sthompsa#define RT2860_MTX0_INT (1 << 3) 360203134Sthompsa#define RT2860_MTX1_INT (1 << 2) 361203134Sthompsa#define RT2860_MTX2_INT (1 << 1) 362203134Sthompsa#define RT2860_MRX0_INT (1 << 0) 363203134Sthompsa 364203134Sthompsa/* possible flags for register TXRXQ_PCNT */ 365203134Sthompsa#define RT2860_RX0Q_PCNT_MASK 0xff000000 366203134Sthompsa#define RT2860_TX2Q_PCNT_MASK 0x00ff0000 367203134Sthompsa#define RT2860_TX1Q_PCNT_MASK 0x0000ff00 368203134Sthompsa#define RT2860_TX0Q_PCNT_MASK 0x000000ff 369203134Sthompsa 370203134Sthompsa/* possible flags for register CAP_CTRL */ 371203134Sthompsa#define RT2860_CAP_ADC_FEQ (1 << 31) 372203134Sthompsa#define RT2860_CAP_START (1 << 30) 373203134Sthompsa#define RT2860_MAN_TRIG (1 << 29) 374203134Sthompsa#define RT2860_TRIG_OFFSET_SHIFT 16 375203134Sthompsa#define RT2860_START_ADDR_SHIFT 0 376203134Sthompsa 377203134Sthompsa/* possible flags for register RF_CSR_CFG */ 378203134Sthompsa#define RT3070_RF_KICK (1 << 17) 379203134Sthompsa#define RT3070_RF_WRITE (1 << 16) 380203134Sthompsa 381203134Sthompsa/* possible flags for register EFUSE_CTRL */ 382203134Sthompsa#define RT3070_SEL_EFUSE (1 << 31) 383203134Sthompsa#define RT3070_EFSROM_KICK (1 << 30) 384203134Sthompsa#define RT3070_EFSROM_AIN_MASK 0x03ff0000 385203134Sthompsa#define RT3070_EFSROM_AIN_SHIFT 16 386203134Sthompsa#define RT3070_EFSROM_MODE_MASK 0x000000c0 387203134Sthompsa#define RT3070_EFUSE_AOUT_MASK 0x0000003f 388203134Sthompsa 389203134Sthompsa/* possible flags for register MAC_SYS_CTRL */ 390203134Sthompsa#define RT2860_RX_TS_EN (1 << 7) 391203134Sthompsa#define RT2860_WLAN_HALT_EN (1 << 6) 392203134Sthompsa#define RT2860_PBF_LOOP_EN (1 << 5) 393203134Sthompsa#define RT2860_CONT_TX_TEST (1 << 4) 394203134Sthompsa#define RT2860_MAC_RX_EN (1 << 3) 395203134Sthompsa#define RT2860_MAC_TX_EN (1 << 2) 396203134Sthompsa#define RT2860_BBP_HRST (1 << 1) 397203134Sthompsa#define RT2860_MAC_SRST (1 << 0) 398203134Sthompsa 399203134Sthompsa/* possible flags for register MAC_BSSID_DW1 */ 400203134Sthompsa#define RT2860_MULTI_BCN_NUM_SHIFT 18 401203134Sthompsa#define RT2860_MULTI_BSSID_MODE_SHIFT 16 402203134Sthompsa 403203134Sthompsa/* possible flags for register MAX_LEN_CFG */ 404203134Sthompsa#define RT2860_MIN_MPDU_LEN_SHIFT 16 405203134Sthompsa#define RT2860_MAX_PSDU_LEN_SHIFT 12 406203134Sthompsa#define RT2860_MAX_PSDU_LEN8K 0 407203134Sthompsa#define RT2860_MAX_PSDU_LEN16K 1 408203134Sthompsa#define RT2860_MAX_PSDU_LEN32K 2 409203134Sthompsa#define RT2860_MAX_PSDU_LEN64K 3 410203134Sthompsa#define RT2860_MAX_MPDU_LEN_SHIFT 0 411203134Sthompsa 412203134Sthompsa/* possible flags for registers BBP_CSR_CFG/H2M_BBPAGENT */ 413203134Sthompsa#define RT2860_BBP_RW_PARALLEL (1 << 19) 414203134Sthompsa#define RT2860_BBP_PAR_DUR_112_5 (1 << 18) 415203134Sthompsa#define RT2860_BBP_CSR_KICK (1 << 17) 416203134Sthompsa#define RT2860_BBP_CSR_READ (1 << 16) 417203134Sthompsa#define RT2860_BBP_ADDR_SHIFT 8 418203134Sthompsa#define RT2860_BBP_DATA_SHIFT 0 419203134Sthompsa 420203134Sthompsa/* possible flags for register RF_CSR_CFG0 */ 421203134Sthompsa#define RT2860_RF_REG_CTRL (1 << 31) 422203134Sthompsa#define RT2860_RF_LE_SEL1 (1 << 30) 423203134Sthompsa#define RT2860_RF_LE_STBY (1 << 29) 424203134Sthompsa#define RT2860_RF_REG_WIDTH_SHIFT 24 425203134Sthompsa#define RT2860_RF_REG_0_SHIFT 0 426203134Sthompsa 427203134Sthompsa/* possible flags for register RF_CSR_CFG1 */ 428203134Sthompsa#define RT2860_RF_DUR_5 (1 << 24) 429203134Sthompsa#define RT2860_RF_REG_1_SHIFT 0 430203134Sthompsa 431203134Sthompsa/* possible flags for register LED_CFG */ 432203134Sthompsa#define RT2860_LED_POL (1 << 30) 433203134Sthompsa#define RT2860_Y_LED_MODE_SHIFT 28 434203134Sthompsa#define RT2860_G_LED_MODE_SHIFT 26 435203134Sthompsa#define RT2860_R_LED_MODE_SHIFT 24 436203134Sthompsa#define RT2860_LED_MODE_OFF 0 437203134Sthompsa#define RT2860_LED_MODE_BLINK_TX 1 438203134Sthompsa#define RT2860_LED_MODE_SLOW_BLINK 2 439203134Sthompsa#define RT2860_LED_MODE_ON 3 440203134Sthompsa#define RT2860_SLOW_BLK_TIME_SHIFT 16 441203134Sthompsa#define RT2860_LED_OFF_TIME_SHIFT 8 442203134Sthompsa#define RT2860_LED_ON_TIME_SHIFT 0 443203134Sthompsa 444203134Sthompsa/* possible flags for register XIFS_TIME_CFG */ 445203134Sthompsa#define RT2860_BB_RXEND_EN (1 << 29) 446203134Sthompsa#define RT2860_EIFS_TIME_SHIFT 20 447203134Sthompsa#define RT2860_OFDM_XIFS_TIME_SHIFT 16 448203134Sthompsa#define RT2860_OFDM_SIFS_TIME_SHIFT 8 449203134Sthompsa#define RT2860_CCK_SIFS_TIME_SHIFT 0 450203134Sthompsa 451203134Sthompsa/* possible flags for register BKOFF_SLOT_CFG */ 452203134Sthompsa#define RT2860_CC_DELAY_TIME_SHIFT 8 453203134Sthompsa#define RT2860_SLOT_TIME 0 454203134Sthompsa 455203134Sthompsa/* possible flags for register NAV_TIME_CFG */ 456203134Sthompsa#define RT2860_NAV_UPD (1 << 31) 457203134Sthompsa#define RT2860_NAV_UPD_VAL_SHIFT 16 458203134Sthompsa#define RT2860_NAV_CLR_EN (1 << 15) 459203134Sthompsa#define RT2860_NAV_TIMER_SHIFT 0 460203134Sthompsa 461203134Sthompsa/* possible flags for register CH_TIME_CFG */ 462203134Sthompsa#define RT2860_EIFS_AS_CH_BUSY (1 << 4) 463203134Sthompsa#define RT2860_NAV_AS_CH_BUSY (1 << 3) 464203134Sthompsa#define RT2860_RX_AS_CH_BUSY (1 << 2) 465203134Sthompsa#define RT2860_TX_AS_CH_BUSY (1 << 1) 466203134Sthompsa#define RT2860_CH_STA_TIMER_EN (1 << 0) 467203134Sthompsa 468203134Sthompsa/* possible values for register BCN_TIME_CFG */ 469203134Sthompsa#define RT2860_TSF_INS_COMP_SHIFT 24 470203134Sthompsa#define RT2860_BCN_TX_EN (1 << 20) 471203134Sthompsa#define RT2860_TBTT_TIMER_EN (1 << 19) 472203134Sthompsa#define RT2860_TSF_SYNC_MODE_SHIFT 17 473203134Sthompsa#define RT2860_TSF_SYNC_MODE_DIS 0 474203134Sthompsa#define RT2860_TSF_SYNC_MODE_STA 1 475203134Sthompsa#define RT2860_TSF_SYNC_MODE_IBSS 2 476203134Sthompsa#define RT2860_TSF_SYNC_MODE_HOSTAP 3 477203134Sthompsa#define RT2860_TSF_TIMER_EN (1 << 16) 478203134Sthompsa#define RT2860_BCN_INTVAL_SHIFT 0 479203134Sthompsa 480203134Sthompsa/* possible flags for register TBTT_SYNC_CFG */ 481203134Sthompsa#define RT2860_BCN_CWMIN_SHIFT 20 482203134Sthompsa#define RT2860_BCN_AIFSN_SHIFT 16 483203134Sthompsa#define RT2860_BCN_EXP_WIN_SHIFT 8 484203134Sthompsa#define RT2860_TBTT_ADJUST_SHIFT 0 485203134Sthompsa 486203134Sthompsa/* possible flags for register INT_TIMER_CFG */ 487203134Sthompsa#define RT2860_GP_TIMER_SHIFT 16 488203134Sthompsa#define RT2860_PRE_TBTT_TIMER_SHIFT 0 489203134Sthompsa 490203134Sthompsa/* possible flags for register INT_TIMER_EN */ 491203134Sthompsa#define RT2860_GP_TIMER_EN (1 << 1) 492203134Sthompsa#define RT2860_PRE_TBTT_INT_EN (1 << 0) 493203134Sthompsa 494203134Sthompsa/* possible flags for register MAC_STATUS_REG */ 495203134Sthompsa#define RT2860_RX_STATUS_BUSY (1 << 1) 496203134Sthompsa#define RT2860_TX_STATUS_BUSY (1 << 0) 497203134Sthompsa 498203134Sthompsa/* possible flags for register PWR_PIN_CFG */ 499203134Sthompsa#define RT2860_IO_ADDA_PD (1 << 3) 500203134Sthompsa#define RT2860_IO_PLL_PD (1 << 2) 501203134Sthompsa#define RT2860_IO_RA_PE (1 << 1) 502203134Sthompsa#define RT2860_IO_RF_PE (1 << 0) 503203134Sthompsa 504203134Sthompsa/* possible flags for register AUTO_WAKEUP_CFG */ 505203134Sthompsa#define RT2860_AUTO_WAKEUP_EN (1 << 15) 506203134Sthompsa#define RT2860_SLEEP_TBTT_NUM_SHIFT 8 507203134Sthompsa#define RT2860_WAKEUP_LEAD_TIME_SHIFT 0 508203134Sthompsa 509203134Sthompsa/* possible flags for register TX_PIN_CFG */ 510203134Sthompsa#define RT2860_TRSW_POL (1 << 19) 511203134Sthompsa#define RT2860_TRSW_EN (1 << 18) 512203134Sthompsa#define RT2860_RFTR_POL (1 << 17) 513203134Sthompsa#define RT2860_RFTR_EN (1 << 16) 514203134Sthompsa#define RT2860_LNA_PE_G1_POL (1 << 15) 515203134Sthompsa#define RT2860_LNA_PE_A1_POL (1 << 14) 516203134Sthompsa#define RT2860_LNA_PE_G0_POL (1 << 13) 517203134Sthompsa#define RT2860_LNA_PE_A0_POL (1 << 12) 518203134Sthompsa#define RT2860_LNA_PE_G1_EN (1 << 11) 519203134Sthompsa#define RT2860_LNA_PE_A1_EN (1 << 10) 520208019Sthompsa#define RT2860_LNA_PE1_EN (RT2860_LNA_PE_A1_EN | RT2860_LNA_PE_G1_EN) 521203134Sthompsa#define RT2860_LNA_PE_G0_EN (1 << 9) 522203134Sthompsa#define RT2860_LNA_PE_A0_EN (1 << 8) 523208019Sthompsa#define RT2860_LNA_PE0_EN (RT2860_LNA_PE_A0_EN | RT2860_LNA_PE_G0_EN) 524203134Sthompsa#define RT2860_PA_PE_G1_POL (1 << 7) 525203134Sthompsa#define RT2860_PA_PE_A1_POL (1 << 6) 526203134Sthompsa#define RT2860_PA_PE_G0_POL (1 << 5) 527203134Sthompsa#define RT2860_PA_PE_A0_POL (1 << 4) 528203134Sthompsa#define RT2860_PA_PE_G1_EN (1 << 3) 529203134Sthompsa#define RT2860_PA_PE_A1_EN (1 << 2) 530203134Sthompsa#define RT2860_PA_PE_G0_EN (1 << 1) 531203134Sthompsa#define RT2860_PA_PE_A0_EN (1 << 0) 532203134Sthompsa 533203134Sthompsa/* possible flags for register TX_BAND_CFG */ 534203134Sthompsa#define RT2860_5G_BAND_SEL_N (1 << 2) 535203134Sthompsa#define RT2860_5G_BAND_SEL_P (1 << 1) 536203134Sthompsa#define RT2860_TX_BAND_SEL (1 << 0) 537203134Sthompsa 538203134Sthompsa/* possible flags for register TX_SW_CFG0 */ 539203134Sthompsa#define RT2860_DLY_RFTR_EN_SHIFT 24 540203134Sthompsa#define RT2860_DLY_TRSW_EN_SHIFT 16 541203134Sthompsa#define RT2860_DLY_PAPE_EN_SHIFT 8 542203134Sthompsa#define RT2860_DLY_TXPE_EN_SHIFT 0 543203134Sthompsa 544203134Sthompsa/* possible flags for register TX_SW_CFG1 */ 545203134Sthompsa#define RT2860_DLY_RFTR_DIS_SHIFT 16 546203134Sthompsa#define RT2860_DLY_TRSW_DIS_SHIFT 8 547203134Sthompsa#define RT2860_DLY_PAPE_DIS SHIFT 0 548203134Sthompsa 549203134Sthompsa/* possible flags for register TX_SW_CFG2 */ 550203134Sthompsa#define RT2860_DLY_LNA_EN_SHIFT 24 551203134Sthompsa#define RT2860_DLY_LNA_DIS_SHIFT 16 552203134Sthompsa#define RT2860_DLY_DAC_EN_SHIFT 8 553203134Sthompsa#define RT2860_DLY_DAC_DIS_SHIFT 0 554203134Sthompsa 555203134Sthompsa/* possible flags for register TXOP_THRES_CFG */ 556203134Sthompsa#define RT2860_TXOP_REM_THRES_SHIFT 24 557203134Sthompsa#define RT2860_CF_END_THRES_SHIFT 16 558203134Sthompsa#define RT2860_RDG_IN_THRES 8 559203134Sthompsa#define RT2860_RDG_OUT_THRES 0 560203134Sthompsa 561203134Sthompsa/* possible flags for register TXOP_CTRL_CFG */ 562203134Sthompsa#define RT2860_EXT_CW_MIN_SHIFT 16 563203134Sthompsa#define RT2860_EXT_CCA_DLY_SHIFT 8 564203134Sthompsa#define RT2860_EXT_CCA_EN (1 << 7) 565203134Sthompsa#define RT2860_LSIG_TXOP_EN (1 << 6) 566203134Sthompsa#define RT2860_TXOP_TRUN_EN_MIMOPS (1 << 4) 567203134Sthompsa#define RT2860_TXOP_TRUN_EN_TXOP (1 << 3) 568203134Sthompsa#define RT2860_TXOP_TRUN_EN_RATE (1 << 2) 569203134Sthompsa#define RT2860_TXOP_TRUN_EN_AC (1 << 1) 570203134Sthompsa#define RT2860_TXOP_TRUN_EN_TIMEOUT (1 << 0) 571203134Sthompsa 572203134Sthompsa/* possible flags for register TX_RTS_CFG */ 573203134Sthompsa#define RT2860_RTS_FBK_EN (1 << 24) 574203134Sthompsa#define RT2860_RTS_THRES_SHIFT 8 575203134Sthompsa#define RT2860_RTS_RTY_LIMIT_SHIFT 0 576203134Sthompsa 577203134Sthompsa/* possible flags for register TX_TIMEOUT_CFG */ 578203134Sthompsa#define RT2860_TXOP_TIMEOUT_SHIFT 16 579203134Sthompsa#define RT2860_RX_ACK_TIMEOUT_SHIFT 8 580203134Sthompsa#define RT2860_MPDU_LIFE_TIME_SHIFT 4 581203134Sthompsa 582203134Sthompsa/* possible flags for register TX_RTY_CFG */ 583203134Sthompsa#define RT2860_TX_AUTOFB_EN (1 << 30) 584203134Sthompsa#define RT2860_AGG_RTY_MODE_TIMER (1 << 29) 585203134Sthompsa#define RT2860_NAG_RTY_MODE_TIMER (1 << 28) 586203134Sthompsa#define RT2860_LONG_RTY_THRES_SHIFT 16 587203134Sthompsa#define RT2860_LONG_RTY_LIMIT_SHIFT 8 588203134Sthompsa#define RT2860_SHORT_RTY_LIMIT_SHIFT 0 589203134Sthompsa 590203134Sthompsa/* possible flags for register TX_LINK_CFG */ 591203134Sthompsa#define RT2860_REMOTE_MFS_SHIFT 24 592203134Sthompsa#define RT2860_REMOTE_MFB_SHIFT 16 593203134Sthompsa#define RT2860_TX_CFACK_EN (1 << 12) 594203134Sthompsa#define RT2860_TX_RDG_EN (1 << 11) 595203134Sthompsa#define RT2860_TX_MRQ_EN (1 << 10) 596203134Sthompsa#define RT2860_REMOTE_UMFS_EN (1 << 9) 597203134Sthompsa#define RT2860_TX_MFB_EN (1 << 8) 598203134Sthompsa#define RT2860_REMOTE_MFB_LT_SHIFT 0 599203134Sthompsa 600203134Sthompsa/* possible flags for registers *_PROT_CFG */ 601203134Sthompsa#define RT2860_RTSTH_EN (1 << 26) 602203134Sthompsa#define RT2860_TXOP_ALLOW_GF40 (1 << 25) 603203134Sthompsa#define RT2860_TXOP_ALLOW_GF20 (1 << 24) 604203134Sthompsa#define RT2860_TXOP_ALLOW_MM40 (1 << 23) 605203134Sthompsa#define RT2860_TXOP_ALLOW_MM20 (1 << 22) 606203134Sthompsa#define RT2860_TXOP_ALLOW_OFDM (1 << 21) 607203134Sthompsa#define RT2860_TXOP_ALLOW_CCK (1 << 20) 608203134Sthompsa#define RT2860_TXOP_ALLOW_ALL (0x3f << 20) 609203134Sthompsa#define RT2860_PROT_NAV_SHORT (1 << 18) 610203134Sthompsa#define RT2860_PROT_NAV_LONG (2 << 18) 611203134Sthompsa#define RT2860_PROT_CTRL_RTS_CTS (1 << 16) 612203134Sthompsa#define RT2860_PROT_CTRL_CTS (2 << 16) 613203134Sthompsa 614203134Sthompsa/* possible flags for registers EXP_{CTS,ACK}_TIME */ 615203134Sthompsa#define RT2860_EXP_OFDM_TIME_SHIFT 16 616203134Sthompsa#define RT2860_EXP_CCK_TIME_SHIFT 0 617203134Sthompsa 618203134Sthompsa/* possible flags for register RX_FILTR_CFG */ 619203134Sthompsa#define RT2860_DROP_CTRL_RSV (1 << 16) 620203134Sthompsa#define RT2860_DROP_BAR (1 << 15) 621203134Sthompsa#define RT2860_DROP_BA (1 << 14) 622203134Sthompsa#define RT2860_DROP_PSPOLL (1 << 13) 623203134Sthompsa#define RT2860_DROP_RTS (1 << 12) 624203134Sthompsa#define RT2860_DROP_CTS (1 << 11) 625203134Sthompsa#define RT2860_DROP_ACK (1 << 10) 626203134Sthompsa#define RT2860_DROP_CFEND (1 << 9) 627203134Sthompsa#define RT2860_DROP_CFACK (1 << 8) 628203134Sthompsa#define RT2860_DROP_DUPL (1 << 7) 629203134Sthompsa#define RT2860_DROP_BC (1 << 6) 630203134Sthompsa#define RT2860_DROP_MC (1 << 5) 631203134Sthompsa#define RT2860_DROP_VER_ERR (1 << 4) 632203134Sthompsa#define RT2860_DROP_NOT_MYBSS (1 << 3) 633203134Sthompsa#define RT2860_DROP_UC_NOME (1 << 2) 634203134Sthompsa#define RT2860_DROP_PHY_ERR (1 << 1) 635203134Sthompsa#define RT2860_DROP_CRC_ERR (1 << 0) 636203134Sthompsa 637203134Sthompsa/* possible flags for register AUTO_RSP_CFG */ 638203134Sthompsa#define RT2860_CTRL_PWR_BIT (1 << 7) 639203134Sthompsa#define RT2860_BAC_ACK_POLICY (1 << 6) 640203134Sthompsa#define RT2860_CCK_SHORT_EN (1 << 4) 641203134Sthompsa#define RT2860_CTS_40M_REF_EN (1 << 3) 642203134Sthompsa#define RT2860_CTS_40M_MODE_EN (1 << 2) 643203134Sthompsa#define RT2860_BAC_ACKPOLICY_EN (1 << 1) 644203134Sthompsa#define RT2860_AUTO_RSP_EN (1 << 0) 645203134Sthompsa 646203134Sthompsa/* possible flags for register SIFS_COST_CFG */ 647203134Sthompsa#define RT2860_OFDM_SIFS_COST_SHIFT 8 648203134Sthompsa#define RT2860_CCK_SIFS_COST_SHIFT 0 649203134Sthompsa 650203134Sthompsa/* possible flags for register TXOP_HLDR_ET */ 651203134Sthompsa#define RT2860_TXOP_ETM1_EN (1 << 25) 652203134Sthompsa#define RT2860_TXOP_ETM0_EN (1 << 24) 653203134Sthompsa#define RT2860_TXOP_ETM_THRES_SHIFT 16 654203134Sthompsa#define RT2860_TXOP_ETO_EN (1 << 8) 655203134Sthompsa#define RT2860_TXOP_ETO_THRES_SHIFT 1 656203134Sthompsa#define RT2860_PER_RX_RST_EN (1 << 0) 657203134Sthompsa 658203134Sthompsa/* possible flags for register TX_STAT_FIFO */ 659203134Sthompsa#define RT2860_TXQ_MCS_SHIFT 16 660203134Sthompsa#define RT2860_TXQ_WCID_SHIFT 8 661203134Sthompsa#define RT2860_TXQ_ACKREQ (1 << 7) 662203134Sthompsa#define RT2860_TXQ_AGG (1 << 6) 663203134Sthompsa#define RT2860_TXQ_OK (1 << 5) 664203134Sthompsa#define RT2860_TXQ_PID_SHIFT 1 665203134Sthompsa#define RT2860_TXQ_VLD (1 << 0) 666203134Sthompsa 667203134Sthompsa/* possible flags for register WCID_ATTR */ 668203134Sthompsa#define RT2860_MODE_NOSEC 0 669203134Sthompsa#define RT2860_MODE_WEP40 1 670203134Sthompsa#define RT2860_MODE_WEP104 2 671203134Sthompsa#define RT2860_MODE_TKIP 3 672203134Sthompsa#define RT2860_MODE_AES_CCMP 4 673203134Sthompsa#define RT2860_MODE_CKIP40 5 674203134Sthompsa#define RT2860_MODE_CKIP104 6 675203134Sthompsa#define RT2860_MODE_CKIP128 7 676203134Sthompsa#define RT2860_RX_PKEY_EN (1 << 0) 677203134Sthompsa 678203134Sthompsa/* possible flags for register H2M_MAILBOX */ 679203134Sthompsa#define RT2860_H2M_BUSY (1 << 24) 680203134Sthompsa#define RT2860_TOKEN_NO_INTR 0xff 681203134Sthompsa 682203134Sthompsa 683203134Sthompsa/* possible flags for MCU command RT2860_MCU_CMD_LEDS */ 684203134Sthompsa#define RT2860_LED_RADIO (1 << 13) 685203134Sthompsa#define RT2860_LED_LINK_2GHZ (1 << 14) 686203134Sthompsa#define RT2860_LED_LINK_5GHZ (1 << 15) 687203134Sthompsa 688203134Sthompsa 689203134Sthompsa/* possible flags for RT3020 RF register 1 */ 690203134Sthompsa#define RT3070_RF_BLOCK (1 << 0) 691203134Sthompsa#define RT3070_RX0_PD (1 << 2) 692203134Sthompsa#define RT3070_TX0_PD (1 << 3) 693203134Sthompsa#define RT3070_RX1_PD (1 << 4) 694203134Sthompsa#define RT3070_TX1_PD (1 << 5) 695203134Sthompsa 696203134Sthompsa/* possible flags for RT3020 RF register 15 */ 697203134Sthompsa#define RT3070_TX_LO2 (1 << 3) 698203134Sthompsa 699203134Sthompsa/* possible flags for RT3020 RF register 17 */ 700203134Sthompsa#define RT3070_TX_LO1 (1 << 3) 701203134Sthompsa 702203134Sthompsa/* possible flags for RT3020 RF register 20 */ 703203134Sthompsa#define RT3070_RX_LO1 (1 << 3) 704203134Sthompsa 705203134Sthompsa/* possible flags for RT3020 RF register 21 */ 706203134Sthompsa#define RT3070_RX_LO2 (1 << 3) 707203134Sthompsa 708203134Sthompsa 709203134Sthompsa/* RT2860 TX descriptor */ 710203134Sthompsastruct rt2860_txd { 711203134Sthompsa uint32_t sdp0; /* Segment Data Pointer 0 */ 712203134Sthompsa uint16_t sdl1; /* Segment Data Length 1 */ 713203134Sthompsa#define RT2860_TX_BURST (1 << 15) 714203134Sthompsa#define RT2860_TX_LS1 (1 << 14) /* SDP1 is the last segment */ 715203134Sthompsa 716203134Sthompsa uint16_t sdl0; /* Segment Data Length 0 */ 717203134Sthompsa#define RT2860_TX_DDONE (1 << 15) 718203134Sthompsa#define RT2860_TX_LS0 (1 << 14) /* SDP0 is the last segment */ 719203134Sthompsa 720203134Sthompsa uint32_t sdp1; /* Segment Data Pointer 1 */ 721203134Sthompsa uint8_t reserved[3]; 722203134Sthompsa uint8_t flags; 723203134Sthompsa#define RT2860_TX_QSEL_SHIFT 1 724203134Sthompsa#define RT2860_TX_QSEL_MGMT (0 << 1) 725203134Sthompsa#define RT2860_TX_QSEL_HCCA (1 << 1) 726203134Sthompsa#define RT2860_TX_QSEL_EDCA (2 << 1) 727203134Sthompsa#define RT2860_TX_WIV (1 << 0) 728203134Sthompsa} __packed; 729203134Sthompsa 730203134Sthompsa/* RT2870 TX descriptor */ 731203134Sthompsastruct rt2870_txd { 732203134Sthompsa uint16_t len; 733203134Sthompsa uint8_t pad; 734203134Sthompsa uint8_t flags; 735203134Sthompsa} __packed; 736203134Sthompsa 737203134Sthompsa/* TX Wireless Information */ 738203134Sthompsastruct rt2860_txwi { 739203134Sthompsa uint8_t flags; 740203134Sthompsa#define RT2860_TX_MPDU_DSITY_SHIFT 5 741203134Sthompsa#define RT2860_TX_AMPDU (1 << 4) 742203134Sthompsa#define RT2860_TX_TS (1 << 3) 743203134Sthompsa#define RT2860_TX_CFACK (1 << 2) 744203134Sthompsa#define RT2860_TX_MMPS (1 << 1) 745203134Sthompsa#define RT2860_TX_FRAG (1 << 0) 746203134Sthompsa 747203134Sthompsa uint8_t txop; 748203134Sthompsa#define RT2860_TX_TXOP_HT 0 749203134Sthompsa#define RT2860_TX_TXOP_PIFS 1 750203134Sthompsa#define RT2860_TX_TXOP_SIFS 2 751203134Sthompsa#define RT2860_TX_TXOP_BACKOFF 3 752203134Sthompsa 753203134Sthompsa uint16_t phy; 754203134Sthompsa#define RT2860_PHY_MODE 0xc000 755203134Sthompsa#define RT2860_PHY_CCK (0 << 14) 756203134Sthompsa#define RT2860_PHY_OFDM (1 << 14) 757203134Sthompsa#define RT2860_PHY_HT (2 << 14) 758203134Sthompsa#define RT2860_PHY_HT_GF (3 << 14) 759203134Sthompsa#define RT2860_PHY_SGI (1 << 8) 760203134Sthompsa#define RT2860_PHY_BW40 (1 << 7) 761203134Sthompsa#define RT2860_PHY_MCS 0x7f 762203134Sthompsa#define RT2860_PHY_SHPRE (1 << 3) 763203134Sthompsa 764203134Sthompsa uint8_t xflags; 765203134Sthompsa#define RT2860_TX_BAWINSIZE_SHIFT 2 766203134Sthompsa#define RT2860_TX_NSEQ (1 << 1) 767203134Sthompsa#define RT2860_TX_ACK (1 << 0) 768203134Sthompsa 769203134Sthompsa uint8_t wcid; /* Wireless Client ID */ 770203134Sthompsa uint16_t len; 771203134Sthompsa#define RT2860_TX_PID_SHIFT 12 772203134Sthompsa 773203134Sthompsa uint32_t iv; 774203134Sthompsa uint32_t eiv; 775203134Sthompsa} __packed; 776203134Sthompsa 777203134Sthompsa/* RT2860 RX descriptor */ 778203134Sthompsastruct rt2860_rxd { 779203134Sthompsa uint32_t sdp0; 780203134Sthompsa uint16_t sdl1; /* unused */ 781203134Sthompsa uint16_t sdl0; 782203134Sthompsa#define RT2860_RX_DDONE (1 << 15) 783203134Sthompsa#define RT2860_RX_LS0 (1 << 14) 784203134Sthompsa 785203134Sthompsa uint32_t sdp1; /* unused */ 786203134Sthompsa uint32_t flags; 787203134Sthompsa#define RT2860_RX_DEC (1 << 16) 788203134Sthompsa#define RT2860_RX_AMPDU (1 << 15) 789203134Sthompsa#define RT2860_RX_L2PAD (1 << 14) 790203134Sthompsa#define RT2860_RX_RSSI (1 << 13) 791203134Sthompsa#define RT2860_RX_HTC (1 << 12) 792203134Sthompsa#define RT2860_RX_AMSDU (1 << 11) 793203134Sthompsa#define RT2860_RX_MICERR (1 << 10) 794203134Sthompsa#define RT2860_RX_ICVERR (1 << 9) 795203134Sthompsa#define RT2860_RX_CRCERR (1 << 8) 796203134Sthompsa#define RT2860_RX_MYBSS (1 << 7) 797203134Sthompsa#define RT2860_RX_BC (1 << 6) 798203134Sthompsa#define RT2860_RX_MC (1 << 5) 799203134Sthompsa#define RT2860_RX_UC2ME (1 << 4) 800203134Sthompsa#define RT2860_RX_FRAG (1 << 3) 801203134Sthompsa#define RT2860_RX_NULL (1 << 2) 802203134Sthompsa#define RT2860_RX_DATA (1 << 1) 803203134Sthompsa#define RT2860_RX_BA (1 << 0) 804203134Sthompsa} __packed; 805203134Sthompsa 806203134Sthompsa/* RT2870 RX descriptor */ 807203134Sthompsastruct rt2870_rxd { 808203134Sthompsa /* single 32-bit field */ 809203134Sthompsa uint32_t flags; 810203134Sthompsa} __packed; 811203134Sthompsa 812203134Sthompsa/* RX Wireless Information */ 813203134Sthompsastruct rt2860_rxwi { 814203134Sthompsa uint8_t wcid; 815203134Sthompsa uint8_t keyidx; 816203134Sthompsa#define RT2860_RX_UDF_SHIFT 5 817203134Sthompsa#define RT2860_RX_BSS_IDX_SHIFT 2 818203134Sthompsa 819203134Sthompsa uint16_t len; 820203134Sthompsa#define RT2860_RX_TID_SHIFT 12 821203134Sthompsa 822203134Sthompsa uint16_t seq; 823203134Sthompsa uint16_t phy; 824203134Sthompsa uint8_t rssi[3]; 825203134Sthompsa uint8_t reserved1; 826203134Sthompsa uint8_t snr[2]; 827203134Sthompsa uint16_t reserved2; 828203134Sthompsa} __packed; 829203134Sthompsa 830203134Sthompsa 831203134Sthompsa/* first DMA segment contains TXWI + 802.11 header + 32-bit padding */ 832203134Sthompsa#define RT2860_TXWI_DMASZ \ 833203134Sthompsa (sizeof (struct rt2860_txwi) + \ 834203134Sthompsa sizeof (struct ieee80211_htframe) + \ 835203134Sthompsa sizeof (uint16_t)) 836203134Sthompsa 837203134Sthompsa#define RT2860_RF1 0 838203134Sthompsa#define RT2860_RF2 2 839203134Sthompsa#define RT2860_RF3 1 840203134Sthompsa#define RT2860_RF4 3 841203134Sthompsa 842203134Sthompsa#define RT2860_RF_2820 1 /* 2T3R */ 843203134Sthompsa#define RT2860_RF_2850 2 /* dual-band 2T3R */ 844203134Sthompsa#define RT2860_RF_2720 3 /* 1T2R */ 845203134Sthompsa#define RT2860_RF_2750 4 /* dual-band 1T2R */ 846203134Sthompsa#define RT3070_RF_3020 5 /* 1T1R */ 847203134Sthompsa#define RT3070_RF_2020 6 /* b/g */ 848203134Sthompsa#define RT3070_RF_3021 7 /* 1T2R */ 849203134Sthompsa#define RT3070_RF_3022 8 /* 2T2R */ 850203134Sthompsa#define RT3070_RF_3052 9 /* dual-band 2T2R */ 851203134Sthompsa 852203134Sthompsa/* USB commands for RT2870 only */ 853203134Sthompsa#define RT2870_RESET 1 854203134Sthompsa#define RT2870_WRITE_2 2 855203134Sthompsa#define RT2870_WRITE_REGION_1 6 856203134Sthompsa#define RT2870_READ_REGION_1 7 857203134Sthompsa#define RT2870_EEPROM_READ 9 858203134Sthompsa 859203134Sthompsa#define RT2860_EEPROM_DELAY 1 /* minimum hold time (microsecond) */ 860203134Sthompsa 861203134Sthompsa#define RT2860_EEPROM_VERSION 0x01 862203134Sthompsa#define RT2860_EEPROM_MAC01 0x02 863203134Sthompsa#define RT2860_EEPROM_MAC23 0x03 864203134Sthompsa#define RT2860_EEPROM_MAC45 0x04 865203134Sthompsa#define RT2860_EEPROM_PCIE_PSLEVEL 0x11 866203134Sthompsa#define RT2860_EEPROM_REV 0x12 867203134Sthompsa#define RT2860_EEPROM_ANTENNA 0x1a 868203134Sthompsa#define RT2860_EEPROM_CONFIG 0x1b 869203134Sthompsa#define RT2860_EEPROM_COUNTRY 0x1c 870203134Sthompsa#define RT2860_EEPROM_FREQ_LEDS 0x1d 871203134Sthompsa#define RT2860_EEPROM_LED1 0x1e 872203134Sthompsa#define RT2860_EEPROM_LED2 0x1f 873203134Sthompsa#define RT2860_EEPROM_LED3 0x20 874203134Sthompsa#define RT2860_EEPROM_LNA 0x22 875203134Sthompsa#define RT2860_EEPROM_RSSI1_2GHZ 0x23 876203134Sthompsa#define RT2860_EEPROM_RSSI2_2GHZ 0x24 877203134Sthompsa#define RT2860_EEPROM_RSSI1_5GHZ 0x25 878203134Sthompsa#define RT2860_EEPROM_RSSI2_5GHZ 0x26 879203134Sthompsa#define RT2860_EEPROM_DELTAPWR 0x28 880203134Sthompsa#define RT2860_EEPROM_PWR2GHZ_BASE1 0x29 881203134Sthompsa#define RT2860_EEPROM_PWR2GHZ_BASE2 0x30 882203134Sthompsa#define RT2860_EEPROM_TSSI1_2GHZ 0x37 883203134Sthompsa#define RT2860_EEPROM_TSSI2_2GHZ 0x38 884203134Sthompsa#define RT2860_EEPROM_TSSI3_2GHZ 0x39 885203134Sthompsa#define RT2860_EEPROM_TSSI4_2GHZ 0x3a 886203134Sthompsa#define RT2860_EEPROM_TSSI5_2GHZ 0x3b 887203134Sthompsa#define RT2860_EEPROM_PWR5GHZ_BASE1 0x3c 888203134Sthompsa#define RT2860_EEPROM_PWR5GHZ_BASE2 0x53 889203134Sthompsa#define RT2860_EEPROM_TSSI1_5GHZ 0x6a 890203134Sthompsa#define RT2860_EEPROM_TSSI2_5GHZ 0x6b 891203134Sthompsa#define RT2860_EEPROM_TSSI3_5GHZ 0x6c 892203134Sthompsa#define RT2860_EEPROM_TSSI4_5GHZ 0x6d 893203134Sthompsa#define RT2860_EEPROM_TSSI5_5GHZ 0x6e 894203134Sthompsa#define RT2860_EEPROM_RPWR 0x6f 895203134Sthompsa#define RT2860_EEPROM_BBP_BASE 0x78 896205042Sthompsa#define RT3071_EEPROM_RF_BASE 0x82 897203134Sthompsa 898203134Sthompsa#define RT2860_RIDX_CCK1 0 899203134Sthompsa#define RT2860_RIDX_CCK11 3 900203134Sthompsa#define RT2860_RIDX_OFDM6 4 901208019Sthompsa#define RT2860_RIDX_MAX 12 902203134Sthompsastatic const struct rt2860_rate { 903203134Sthompsa uint8_t rate; 904203134Sthompsa uint8_t mcs; 905203134Sthompsa enum ieee80211_phytype phy; 906203134Sthompsa uint8_t ctl_ridx; 907203134Sthompsa uint16_t sp_ack_dur; 908203134Sthompsa uint16_t lp_ack_dur; 909203134Sthompsa} rt2860_rates[] = { 910205042Sthompsa { 2, 0, IEEE80211_T_DS, 0, 314, 314 }, 911205042Sthompsa { 4, 1, IEEE80211_T_DS, 1, 258, 162 }, 912205042Sthompsa { 11, 2, IEEE80211_T_DS, 2, 223, 127 }, 913205042Sthompsa { 22, 3, IEEE80211_T_DS, 3, 213, 117 }, 914205042Sthompsa { 12, 0, IEEE80211_T_OFDM, 4, 60, 60 }, 915205042Sthompsa { 18, 1, IEEE80211_T_OFDM, 4, 52, 52 }, 916205042Sthompsa { 24, 2, IEEE80211_T_OFDM, 6, 48, 48 }, 917205042Sthompsa { 36, 3, IEEE80211_T_OFDM, 6, 44, 44 }, 918205042Sthompsa { 48, 4, IEEE80211_T_OFDM, 8, 44, 44 }, 919205042Sthompsa { 72, 5, IEEE80211_T_OFDM, 8, 40, 40 }, 920205042Sthompsa { 96, 6, IEEE80211_T_OFDM, 8, 40, 40 }, 921205042Sthompsa { 108, 7, IEEE80211_T_OFDM, 8, 40, 40 } 922203134Sthompsa}; 923203134Sthompsa 924203134Sthompsa/* 925203134Sthompsa * Control and status registers access macros. 926203134Sthompsa */ 927203134Sthompsa#define RAL_READ(sc, reg) \ 928203134Sthompsa bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) 929203134Sthompsa 930203134Sthompsa#define RAL_WRITE(sc, reg, val) \ 931203134Sthompsa bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 932203134Sthompsa 933203134Sthompsa#define RAL_BARRIER_WRITE(sc) \ 934203134Sthompsa bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, 0x1800, \ 935203134Sthompsa BUS_SPACE_BARRIER_WRITE) 936203134Sthompsa 937203134Sthompsa#define RAL_BARRIER_READ_WRITE(sc) \ 938203134Sthompsa bus_space_barrier((sc)->sc_st, (sc)->sc_sh, 0, 0x1800, \ 939203134Sthompsa BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE) 940203134Sthompsa 941203134Sthompsa#define RAL_WRITE_REGION_1(sc, offset, datap, count) \ 942203134Sthompsa bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \ 943203134Sthompsa (datap), (count)) 944203134Sthompsa 945203134Sthompsa#define RAL_SET_REGION_4(sc, offset, val, count) \ 946203134Sthompsa bus_space_set_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \ 947203134Sthompsa (val), (count)) 948203134Sthompsa 949203134Sthompsa/* 950203134Sthompsa * EEPROM access macro. 951203134Sthompsa */ 952203134Sthompsa#define RT2860_EEPROM_CTL(sc, val) do { \ 953203134Sthompsa RAL_WRITE((sc), RT2860_PCI_EECTRL, (val)); \ 954203134Sthompsa RAL_BARRIER_READ_WRITE((sc)); \ 955203134Sthompsa DELAY(RT2860_EEPROM_DELAY); \ 956203134Sthompsa} while (/* CONSTCOND */0) 957203134Sthompsa 958203134Sthompsa/* 959203134Sthompsa * Default values for MAC registers; values taken from the reference driver. 960203134Sthompsa */ 961203134Sthompsa#define RT2860_DEF_MAC \ 962203134Sthompsa { RT2860_BCN_OFFSET0, 0xf8f0e8e0 }, \ 963203134Sthompsa { RT2860_LEGACY_BASIC_RATE, 0x0000013f }, \ 964203134Sthompsa { RT2860_HT_BASIC_RATE, 0x00008003 }, \ 965203134Sthompsa { RT2860_MAC_SYS_CTRL, 0x00000000 }, \ 966203134Sthompsa { RT2860_BKOFF_SLOT_CFG, 0x00000209 }, \ 967203134Sthompsa { RT2860_TX_SW_CFG0, 0x00000000 }, \ 968203134Sthompsa { RT2860_TX_SW_CFG1, 0x00080606 }, \ 969203134Sthompsa { RT2860_TX_LINK_CFG, 0x00001020 }, \ 970203134Sthompsa { RT2860_TX_TIMEOUT_CFG, 0x000a2090 }, \ 971203134Sthompsa { RT2860_LED_CFG, 0x7f031e46 }, \ 972203134Sthompsa { RT2860_WMM_AIFSN_CFG, 0x00002273 }, \ 973203134Sthompsa { RT2860_WMM_CWMIN_CFG, 0x00002344 }, \ 974203134Sthompsa { RT2860_WMM_CWMAX_CFG, 0x000034aa }, \ 975203134Sthompsa { RT2860_MAX_PCNT, 0x1f3fbf9f }, \ 976203134Sthompsa { RT2860_TX_RTY_CFG, 0x47d01f0f }, \ 977203134Sthompsa { RT2860_AUTO_RSP_CFG, 0x00000013 }, \ 978203134Sthompsa { RT2860_CCK_PROT_CFG, 0x05740003 }, \ 979203134Sthompsa { RT2860_OFDM_PROT_CFG, 0x05740003 }, \ 980203134Sthompsa { RT2860_GF20_PROT_CFG, 0x01744004 }, \ 981203134Sthompsa { RT2860_GF40_PROT_CFG, 0x03f44084 }, \ 982203134Sthompsa { RT2860_MM20_PROT_CFG, 0x01744004 }, \ 983203134Sthompsa { RT2860_MM40_PROT_CFG, 0x03f54084 }, \ 984203134Sthompsa { RT2860_TXOP_CTRL_CFG, 0x0000583f }, \ 985203134Sthompsa { RT2860_TXOP_HLDR_ET, 0x00000002 }, \ 986203134Sthompsa { RT2860_TX_RTS_CFG, 0x00092b20 }, \ 987203134Sthompsa { RT2860_EXP_ACK_TIME, 0x002400ca }, \ 988203134Sthompsa { RT2860_XIFS_TIME_CFG, 0x33a41010 }, \ 989203134Sthompsa { RT2860_PWR_PIN_CFG, 0x00000003 } 990203134Sthompsa 991203134Sthompsa/* XXX only a few registers differ from above, try to merge? */ 992203134Sthompsa#define RT2870_DEF_MAC \ 993203134Sthompsa { RT2860_BCN_OFFSET0, 0xf8f0e8e0 }, \ 994203134Sthompsa { RT2860_LEGACY_BASIC_RATE, 0x0000013f }, \ 995203134Sthompsa { RT2860_HT_BASIC_RATE, 0x00008003 }, \ 996203134Sthompsa { RT2860_MAC_SYS_CTRL, 0x00000000 }, \ 997203134Sthompsa { RT2860_BKOFF_SLOT_CFG, 0x00000209 }, \ 998203134Sthompsa { RT2860_TX_SW_CFG0, 0x00000000 }, \ 999203134Sthompsa { RT2860_TX_SW_CFG1, 0x00080606 }, \ 1000203134Sthompsa { RT2860_TX_LINK_CFG, 0x00001020 }, \ 1001203134Sthompsa { RT2860_TX_TIMEOUT_CFG, 0x000a2090 }, \ 1002203134Sthompsa { RT2860_LED_CFG, 0x7f031e46 }, \ 1003203134Sthompsa { RT2860_WMM_AIFSN_CFG, 0x00002273 }, \ 1004203134Sthompsa { RT2860_WMM_CWMIN_CFG, 0x00002344 }, \ 1005203134Sthompsa { RT2860_WMM_CWMAX_CFG, 0x000034aa }, \ 1006203134Sthompsa { RT2860_MAX_PCNT, 0x1f3fbf9f }, \ 1007203134Sthompsa { RT2860_TX_RTY_CFG, 0x47d01f0f }, \ 1008203134Sthompsa { RT2860_AUTO_RSP_CFG, 0x00000013 }, \ 1009203134Sthompsa { RT2860_CCK_PROT_CFG, 0x05740003 }, \ 1010203134Sthompsa { RT2860_OFDM_PROT_CFG, 0x05740003 }, \ 1011203134Sthompsa { RT2860_PBF_CFG, 0x00f40006 }, \ 1012203134Sthompsa { RT2860_WPDMA_GLO_CFG, 0x00000030 }, \ 1013203134Sthompsa { RT2860_GF20_PROT_CFG, 0x01744004 }, \ 1014203134Sthompsa { RT2860_GF40_PROT_CFG, 0x03f44084 }, \ 1015203134Sthompsa { RT2860_MM20_PROT_CFG, 0x01744004 }, \ 1016203134Sthompsa { RT2860_MM40_PROT_CFG, 0x03f44084 }, \ 1017203134Sthompsa { RT2860_TXOP_CTRL_CFG, 0x0000583f }, \ 1018203134Sthompsa { RT2860_TXOP_HLDR_ET, 0x00000002 }, \ 1019203134Sthompsa { RT2860_TX_RTS_CFG, 0x00092b20 }, \ 1020203134Sthompsa { RT2860_EXP_ACK_TIME, 0x002400ca }, \ 1021203134Sthompsa { RT2860_XIFS_TIME_CFG, 0x33a41010 }, \ 1022203134Sthompsa { RT2860_PWR_PIN_CFG, 0x00000003 } 1023203134Sthompsa 1024203134Sthompsa/* 1025203134Sthompsa * Default values for BBP registers; values taken from the reference driver. 1026203134Sthompsa */ 1027203134Sthompsa#define RT2860_DEF_BBP \ 1028203134Sthompsa { 65, 0x2c }, \ 1029203134Sthompsa { 66, 0x38 }, \ 1030257410Skevlo { 68, 0x0b }, \ 1031203134Sthompsa { 69, 0x12 }, \ 1032203134Sthompsa { 70, 0x0a }, \ 1033203134Sthompsa { 73, 0x10 }, \ 1034203134Sthompsa { 81, 0x37 }, \ 1035203134Sthompsa { 82, 0x62 }, \ 1036203134Sthompsa { 83, 0x6a }, \ 1037203134Sthompsa { 84, 0x99 }, \ 1038203134Sthompsa { 86, 0x00 }, \ 1039203134Sthompsa { 91, 0x04 }, \ 1040203134Sthompsa { 92, 0x00 }, \ 1041203134Sthompsa { 103, 0x00 }, \ 1042205042Sthompsa { 105, 0x05 }, \ 1043205042Sthompsa { 106, 0x35 } 1044203134Sthompsa 1045203134Sthompsa/* 1046203134Sthompsa * Default settings for RF registers; values derived from the reference driver. 1047203134Sthompsa */ 1048203134Sthompsa#define RT2860_RF2850 \ 1049203134Sthompsa { 1, 0x100bb3, 0x1301e1, 0x05a014, 0x001402 }, \ 1050203134Sthompsa { 2, 0x100bb3, 0x1301e1, 0x05a014, 0x001407 }, \ 1051203134Sthompsa { 3, 0x100bb3, 0x1301e2, 0x05a014, 0x001402 }, \ 1052203134Sthompsa { 4, 0x100bb3, 0x1301e2, 0x05a014, 0x001407 }, \ 1053203134Sthompsa { 5, 0x100bb3, 0x1301e3, 0x05a014, 0x001402 }, \ 1054203134Sthompsa { 6, 0x100bb3, 0x1301e3, 0x05a014, 0x001407 }, \ 1055203134Sthompsa { 7, 0x100bb3, 0x1301e4, 0x05a014, 0x001402 }, \ 1056203134Sthompsa { 8, 0x100bb3, 0x1301e4, 0x05a014, 0x001407 }, \ 1057203134Sthompsa { 9, 0x100bb3, 0x1301e5, 0x05a014, 0x001402 }, \ 1058203134Sthompsa { 10, 0x100bb3, 0x1301e5, 0x05a014, 0x001407 }, \ 1059203134Sthompsa { 11, 0x100bb3, 0x1301e6, 0x05a014, 0x001402 }, \ 1060203134Sthompsa { 12, 0x100bb3, 0x1301e6, 0x05a014, 0x001407 }, \ 1061203134Sthompsa { 13, 0x100bb3, 0x1301e7, 0x05a014, 0x001402 }, \ 1062203134Sthompsa { 14, 0x100bb3, 0x1301e8, 0x05a014, 0x001404 }, \ 1063203134Sthompsa { 36, 0x100bb3, 0x130266, 0x056014, 0x001408 }, \ 1064203134Sthompsa { 38, 0x100bb3, 0x130267, 0x056014, 0x001404 }, \ 1065203134Sthompsa { 40, 0x100bb2, 0x1301a0, 0x056014, 0x001400 }, \ 1066203134Sthompsa { 44, 0x100bb2, 0x1301a0, 0x056014, 0x001408 }, \ 1067203134Sthompsa { 46, 0x100bb2, 0x1301a1, 0x056014, 0x001402 }, \ 1068203134Sthompsa { 48, 0x100bb2, 0x1301a1, 0x056014, 0x001406 }, \ 1069203134Sthompsa { 52, 0x100bb2, 0x1301a2, 0x056014, 0x001404 }, \ 1070203134Sthompsa { 54, 0x100bb2, 0x1301a2, 0x056014, 0x001408 }, \ 1071203134Sthompsa { 56, 0x100bb2, 0x1301a3, 0x056014, 0x001402 }, \ 1072203134Sthompsa { 60, 0x100bb2, 0x1301a4, 0x056014, 0x001400 }, \ 1073203134Sthompsa { 62, 0x100bb2, 0x1301a4, 0x056014, 0x001404 }, \ 1074203134Sthompsa { 64, 0x100bb2, 0x1301a4, 0x056014, 0x001408 }, \ 1075203134Sthompsa { 100, 0x100bb2, 0x1301ac, 0x05e014, 0x001400 }, \ 1076203134Sthompsa { 102, 0x100bb2, 0x1701ac, 0x15e014, 0x001404 }, \ 1077203134Sthompsa { 104, 0x100bb2, 0x1701ac, 0x15e014, 0x001408 }, \ 1078203134Sthompsa { 108, 0x100bb3, 0x17028c, 0x15e014, 0x001404 }, \ 1079203134Sthompsa { 110, 0x100bb3, 0x13028d, 0x05e014, 0x001400 }, \ 1080203134Sthompsa { 112, 0x100bb3, 0x13028d, 0x05e014, 0x001406 }, \ 1081203134Sthompsa { 116, 0x100bb3, 0x13028e, 0x05e014, 0x001408 }, \ 1082203134Sthompsa { 118, 0x100bb3, 0x13028f, 0x05e014, 0x001404 }, \ 1083203134Sthompsa { 120, 0x100bb1, 0x1300e0, 0x05e014, 0x001400 }, \ 1084203134Sthompsa { 124, 0x100bb1, 0x1300e0, 0x05e014, 0x001404 }, \ 1085203134Sthompsa { 126, 0x100bb1, 0x1300e0, 0x05e014, 0x001406 }, \ 1086203134Sthompsa { 128, 0x100bb1, 0x1300e0, 0x05e014, 0x001408 }, \ 1087203134Sthompsa { 132, 0x100bb1, 0x1300e1, 0x05e014, 0x001402 }, \ 1088203134Sthompsa { 134, 0x100bb1, 0x1300e1, 0x05e014, 0x001404 }, \ 1089203134Sthompsa { 136, 0x100bb1, 0x1300e1, 0x05e014, 0x001406 }, \ 1090203134Sthompsa { 140, 0x100bb1, 0x1300e2, 0x05e014, 0x001400 }, \ 1091203134Sthompsa { 149, 0x100bb1, 0x1300e2, 0x05e014, 0x001409 }, \ 1092203134Sthompsa { 151, 0x100bb1, 0x1300e3, 0x05e014, 0x001401 }, \ 1093203134Sthompsa { 153, 0x100bb1, 0x1300e3, 0x05e014, 0x001403 }, \ 1094203134Sthompsa { 157, 0x100bb1, 0x1300e3, 0x05e014, 0x001407 }, \ 1095203134Sthompsa { 159, 0x100bb1, 0x1300e3, 0x05e014, 0x001409 }, \ 1096203134Sthompsa { 161, 0x100bb1, 0x1300e4, 0x05e014, 0x001401 }, \ 1097205042Sthompsa { 165, 0x100bb1, 0x1300e4, 0x05e014, 0x001405 }, \ 1098205042Sthompsa { 167, 0x100bb1, 0x1300f4, 0x05e014, 0x001407 }, \ 1099205042Sthompsa { 169, 0x100bb1, 0x1300f4, 0x05e014, 0x001409 }, \ 1100205042Sthompsa { 171, 0x100bb1, 0x1300f5, 0x05e014, 0x001401 }, \ 1101205042Sthompsa { 173, 0x100bb1, 0x1300f5, 0x05e014, 0x001403 } 1102203134Sthompsa 1103205042Sthompsa#define RT3070_RF3052 \ 1104205042Sthompsa { 0xf1, 2, 2 }, \ 1105205042Sthompsa { 0xf1, 2, 7 }, \ 1106205042Sthompsa { 0xf2, 2, 2 }, \ 1107205042Sthompsa { 0xf2, 2, 7 }, \ 1108205042Sthompsa { 0xf3, 2, 2 }, \ 1109205042Sthompsa { 0xf3, 2, 7 }, \ 1110205042Sthompsa { 0xf4, 2, 2 }, \ 1111205042Sthompsa { 0xf4, 2, 7 }, \ 1112205042Sthompsa { 0xf5, 2, 2 }, \ 1113205042Sthompsa { 0xf5, 2, 7 }, \ 1114205042Sthompsa { 0xf6, 2, 2 }, \ 1115205042Sthompsa { 0xf6, 2, 7 }, \ 1116205042Sthompsa { 0xf7, 2, 2 }, \ 1117205042Sthompsa { 0xf8, 2, 4 }, \ 1118205042Sthompsa { 0x56, 0, 4 }, \ 1119205042Sthompsa { 0x56, 0, 6 }, \ 1120205042Sthompsa { 0x56, 0, 8 }, \ 1121205042Sthompsa { 0x57, 0, 0 }, \ 1122205042Sthompsa { 0x57, 0, 2 }, \ 1123205042Sthompsa { 0x57, 0, 4 }, \ 1124205042Sthompsa { 0x57, 0, 8 }, \ 1125205042Sthompsa { 0x57, 0, 10 }, \ 1126205042Sthompsa { 0x58, 0, 0 }, \ 1127205042Sthompsa { 0x58, 0, 4 }, \ 1128205042Sthompsa { 0x58, 0, 6 }, \ 1129205042Sthompsa { 0x58, 0, 8 }, \ 1130205042Sthompsa { 0x5b, 0, 8 }, \ 1131205042Sthompsa { 0x5b, 0, 10 }, \ 1132205042Sthompsa { 0x5c, 0, 0 }, \ 1133205042Sthompsa { 0x5c, 0, 4 }, \ 1134205042Sthompsa { 0x5c, 0, 6 }, \ 1135205042Sthompsa { 0x5c, 0, 8 }, \ 1136205042Sthompsa { 0x5d, 0, 0 }, \ 1137205042Sthompsa { 0x5d, 0, 2 }, \ 1138205042Sthompsa { 0x5d, 0, 4 }, \ 1139205042Sthompsa { 0x5d, 0, 8 }, \ 1140205042Sthompsa { 0x5d, 0, 10 }, \ 1141205042Sthompsa { 0x5e, 0, 0 }, \ 1142205042Sthompsa { 0x5e, 0, 4 }, \ 1143205042Sthompsa { 0x5e, 0, 6 }, \ 1144205042Sthompsa { 0x5e, 0, 8 }, \ 1145205042Sthompsa { 0x5f, 0, 0 }, \ 1146205042Sthompsa { 0x5f, 0, 9 }, \ 1147205042Sthompsa { 0x5f, 0, 11 }, \ 1148205042Sthompsa { 0x60, 0, 1 }, \ 1149205042Sthompsa { 0x60, 0, 5 }, \ 1150205042Sthompsa { 0x60, 0, 7 }, \ 1151205042Sthompsa { 0x60, 0, 9 }, \ 1152205042Sthompsa { 0x61, 0, 1 }, \ 1153205042Sthompsa { 0x61, 0, 3 }, \ 1154205042Sthompsa { 0x61, 0, 5 }, \ 1155205042Sthompsa { 0x61, 0, 7 }, \ 1156205042Sthompsa { 0x61, 0, 9 } 1157205042Sthompsa 1158203134Sthompsa#define RT3070_DEF_RF \ 1159203134Sthompsa { 4, 0x40 }, \ 1160203134Sthompsa { 5, 0x03 }, \ 1161203134Sthompsa { 6, 0x02 }, \ 1162256718Skevlo { 7, 0x60 }, \ 1163203134Sthompsa { 9, 0x0f }, \ 1164203134Sthompsa { 10, 0x41 }, \ 1165203134Sthompsa { 11, 0x21 }, \ 1166203134Sthompsa { 12, 0x7b }, \ 1167203134Sthompsa { 14, 0x90 }, \ 1168203134Sthompsa { 15, 0x58 }, \ 1169203134Sthompsa { 16, 0xb3 }, \ 1170203134Sthompsa { 17, 0x92 }, \ 1171203134Sthompsa { 18, 0x2c }, \ 1172203134Sthompsa { 19, 0x02 }, \ 1173203134Sthompsa { 20, 0xba }, \ 1174203134Sthompsa { 21, 0xdb }, \ 1175203134Sthompsa { 24, 0x16 }, \ 1176256718Skevlo { 25, 0x03 }, \ 1177203134Sthompsa { 29, 0x1f } 1178203134Sthompsa 1179205042Sthompsa#define RT3572_DEF_RF \ 1180205042Sthompsa { 0, 0x70 }, \ 1181205042Sthompsa { 1, 0x81 }, \ 1182205042Sthompsa { 2, 0xf1 }, \ 1183205042Sthompsa { 3, 0x02 }, \ 1184205042Sthompsa { 4, 0x4c }, \ 1185205042Sthompsa { 5, 0x05 }, \ 1186205042Sthompsa { 6, 0x4a }, \ 1187205042Sthompsa { 7, 0xd8 }, \ 1188205042Sthompsa { 9, 0xc3 }, \ 1189205042Sthompsa { 10, 0xf1 }, \ 1190205042Sthompsa { 11, 0xb9 }, \ 1191205042Sthompsa { 12, 0x70 }, \ 1192205042Sthompsa { 13, 0x65 }, \ 1193205042Sthompsa { 14, 0xa0 }, \ 1194205042Sthompsa { 15, 0x53 }, \ 1195205042Sthompsa { 16, 0x4c }, \ 1196205042Sthompsa { 17, 0x23 }, \ 1197205042Sthompsa { 18, 0xac }, \ 1198205042Sthompsa { 19, 0x93 }, \ 1199205042Sthompsa { 20, 0xb3 }, \ 1200205042Sthompsa { 21, 0xd0 }, \ 1201205042Sthompsa { 22, 0x00 }, \ 1202205042Sthompsa { 23, 0x3c }, \ 1203205042Sthompsa { 24, 0x16 }, \ 1204205042Sthompsa { 25, 0x15 }, \ 1205205042Sthompsa { 26, 0x85 }, \ 1206205042Sthompsa { 27, 0x00 }, \ 1207205042Sthompsa { 28, 0x00 }, \ 1208205042Sthompsa { 29, 0x9b }, \ 1209205042Sthompsa { 30, 0x09 }, \ 1210205042Sthompsa { 31, 0x10 } 1211205042Sthompsa 1212218676Shselasky 1213218676Shselaskyunion run_stats { 1214218676Shselasky uint32_t raw; 1215218676Shselasky struct { 1216218676Shselasky uint16_t fail; 1217218676Shselasky uint16_t pad; 1218218676Shselasky } error; 1219218676Shselasky struct { 1220218676Shselasky uint16_t success; 1221218676Shselasky uint16_t retry; 1222218676Shselasky } tx; 1223218676Shselasky} __aligned(4); 1224218676Shselasky 1225203134Sthompsa#endif /* _IF_RUNREG_H_ */ 1226