if_rue.c revision 187970
1/*- 2 * Copyright (c) 2001-2003, Shunsuke Akiyama <akiyama@FreeBSD.org>. 3 * Copyright (c) 1997, 1998, 1999, 2000 Bill Paul <wpaul@ee.columbia.edu>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27/*- 28 * Copyright (c) 1997, 1998, 1999, 2000 29 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 3. All advertising materials mentioning features or use of this software 40 * must display the following acknowledgement: 41 * This product includes software developed by Bill Paul. 42 * 4. Neither the name of the author nor the names of any co-contributors 43 * may be used to endorse or promote products derived from this software 44 * without specific prior written permission. 45 * 46 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 49 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 50 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 56 * THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59#include <sys/cdefs.h> 60__FBSDID("$FreeBSD: head/sys/dev/usb2/ethernet/if_rue2.c 187970 2009-02-01 00:51:25Z thompsa $"); 61 62/* 63 * RealTek RTL8150 USB to fast ethernet controller driver. 64 * Datasheet is available from 65 * ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/. 66 */ 67 68/* 69 * NOTE: all function names beginning like "rue_cfg_" can only 70 * be called from within the config thread function ! 71 */ 72 73#include <dev/usb2/include/usb2_devid.h> 74#include <dev/usb2/include/usb2_standard.h> 75#include <dev/usb2/include/usb2_mfunc.h> 76#include <dev/usb2/include/usb2_error.h> 77 78#define usb2_config_td_cc usb2_ether_cc 79#define usb2_config_td_softc rue_softc 80 81#define USB_DEBUG_VAR rue_debug 82 83#include <dev/usb2/core/usb2_core.h> 84#include <dev/usb2/core/usb2_lookup.h> 85#include <dev/usb2/core/usb2_process.h> 86#include <dev/usb2/core/usb2_config_td.h> 87#include <dev/usb2/core/usb2_debug.h> 88#include <dev/usb2/core/usb2_request.h> 89#include <dev/usb2/core/usb2_busdma.h> 90#include <dev/usb2/core/usb2_util.h> 91 92#include <dev/usb2/ethernet/usb2_ethernet.h> 93#include <dev/usb2/ethernet/if_ruereg.h> 94 95#if USB_DEBUG 96static int rue_debug = 0; 97 98SYSCTL_NODE(_hw_usb2, OID_AUTO, rue, CTLFLAG_RW, 0, "USB rue"); 99SYSCTL_INT(_hw_usb2_rue, OID_AUTO, debug, CTLFLAG_RW, 100 &rue_debug, 0, "Debug level"); 101#endif 102 103/* 104 * Various supported device vendors/products. 105 */ 106 107static const struct usb2_device_id rue_devs[] = { 108 {USB_VPI(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX, 0)}, 109 {USB_VPI(USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_USBKR100, 0)}, 110}; 111 112/* prototypes */ 113 114static device_probe_t rue_probe; 115static device_attach_t rue_attach; 116static device_detach_t rue_detach; 117static device_shutdown_t rue_shutdown; 118 119static usb2_callback_t rue_intr_clear_stall_callback; 120static usb2_callback_t rue_intr_callback; 121static usb2_callback_t rue_bulk_read_clear_stall_callback; 122static usb2_callback_t rue_bulk_read_callback; 123static usb2_callback_t rue_bulk_write_clear_stall_callback; 124static usb2_callback_t rue_bulk_write_callback; 125 126static usb2_config_td_command_t rue_config_copy; 127static usb2_config_td_command_t rue_cfg_promisc_upd; 128static usb2_config_td_command_t rue_cfg_first_time_setup; 129static usb2_config_td_command_t rue_cfg_tick; 130static usb2_config_td_command_t rue_cfg_pre_init; 131static usb2_config_td_command_t rue_cfg_init; 132static usb2_config_td_command_t rue_cfg_ifmedia_upd; 133static usb2_config_td_command_t rue_cfg_pre_stop; 134static usb2_config_td_command_t rue_cfg_stop; 135 136static void rue_cfg_do_request(struct rue_softc *sc, struct usb2_device_request *req, void *data); 137static void rue_cfg_read_mem(struct rue_softc *sc, uint16_t addr, void *buf, uint16_t len); 138static void rue_cfg_write_mem(struct rue_softc *sc, uint16_t addr, void *buf, uint16_t len); 139static uint8_t rue_cfg_csr_read_1(struct rue_softc *sc, uint16_t reg); 140static uint16_t rue_cfg_csr_read_2(struct rue_softc *sc, uint16_t reg); 141static void rue_cfg_csr_write_1(struct rue_softc *sc, uint16_t reg, uint8_t val); 142static void rue_cfg_csr_write_2(struct rue_softc *sc, uint16_t reg, uint16_t val); 143static void rue_cfg_csr_write_4(struct rue_softc *sc, int reg, uint32_t val); 144 145static miibus_readreg_t rue_cfg_miibus_readreg; 146static miibus_writereg_t rue_cfg_miibus_writereg; 147static miibus_statchg_t rue_cfg_miibus_statchg; 148 149static void rue_cfg_reset(struct rue_softc *sc); 150static void rue_start_cb(struct ifnet *ifp); 151static void rue_start_transfers(struct rue_softc *sc); 152static void rue_init_cb(void *arg); 153static int rue_ifmedia_upd_cb(struct ifnet *ifp); 154static void rue_ifmedia_sts_cb(struct ifnet *ifp, struct ifmediareq *ifmr); 155static int rue_ioctl_cb(struct ifnet *ifp, u_long command, caddr_t data); 156static void rue_watchdog(void *arg); 157 158static const struct usb2_config rue_config[RUE_N_TRANSFER] = { 159 160 [RUE_BULK_DT_WR] = { 161 .type = UE_BULK, 162 .endpoint = UE_ADDR_ANY, 163 .direction = UE_DIR_OUT, 164 .mh.bufsize = MCLBYTES, 165 .mh.flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 166 .mh.callback = &rue_bulk_write_callback, 167 .mh.timeout = 10000, /* 10 seconds */ 168 }, 169 170 [RUE_BULK_DT_RD] = { 171 .type = UE_BULK, 172 .endpoint = UE_ADDR_ANY, 173 .direction = UE_DIR_IN, 174 .mh.bufsize = (MCLBYTES + 4), 175 .mh.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 176 .mh.callback = &rue_bulk_read_callback, 177 .mh.timeout = 0, /* no timeout */ 178 }, 179 180 [RUE_BULK_CS_WR] = { 181 .type = UE_CONTROL, 182 .endpoint = 0x00, /* Control pipe */ 183 .direction = UE_DIR_ANY, 184 .mh.bufsize = sizeof(struct usb2_device_request), 185 .mh.flags = {}, 186 .mh.callback = &rue_bulk_write_clear_stall_callback, 187 .mh.timeout = 1000, /* 1 second */ 188 .mh.interval = 50, /* 50ms */ 189 }, 190 191 [RUE_BULK_CS_RD] = { 192 .type = UE_CONTROL, 193 .endpoint = 0x00, /* Control pipe */ 194 .direction = UE_DIR_ANY, 195 .mh.bufsize = sizeof(struct usb2_device_request), 196 .mh.flags = {}, 197 .mh.callback = &rue_bulk_read_clear_stall_callback, 198 .mh.timeout = 1000, /* 1 second */ 199 .mh.interval = 50, /* 50ms */ 200 }, 201 202 [RUE_INTR_DT_RD] = { 203 .type = UE_INTERRUPT, 204 .endpoint = UE_ADDR_ANY, 205 .direction = UE_DIR_IN, 206 .mh.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 207 .mh.bufsize = 0, /* use wMaxPacketSize */ 208 .mh.callback = &rue_intr_callback, 209 }, 210 211 [RUE_INTR_CS_RD] = { 212 .type = UE_CONTROL, 213 .endpoint = 0x00, /* Control pipe */ 214 .direction = UE_DIR_ANY, 215 .mh.bufsize = sizeof(struct usb2_device_request), 216 .mh.flags = {}, 217 .mh.callback = &rue_intr_clear_stall_callback, 218 .mh.timeout = 1000, /* 1 second */ 219 .mh.interval = 50, /* 50ms */ 220 }, 221}; 222 223static device_method_t rue_methods[] = { 224 /* Device interface */ 225 DEVMETHOD(device_probe, rue_probe), 226 DEVMETHOD(device_attach, rue_attach), 227 DEVMETHOD(device_detach, rue_detach), 228 DEVMETHOD(device_shutdown, rue_shutdown), 229 230 /* Bus interface */ 231 DEVMETHOD(bus_print_child, bus_generic_print_child), 232 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 233 234 /* MII interface */ 235 DEVMETHOD(miibus_readreg, rue_cfg_miibus_readreg), 236 DEVMETHOD(miibus_writereg, rue_cfg_miibus_writereg), 237 DEVMETHOD(miibus_statchg, rue_cfg_miibus_statchg), 238 239 {0, 0} 240}; 241 242static driver_t rue_driver = { 243 .name = "rue", 244 .methods = rue_methods, 245 .size = sizeof(struct rue_softc), 246}; 247 248static devclass_t rue_devclass; 249 250DRIVER_MODULE(rue, ushub, rue_driver, rue_devclass, NULL, 0); 251DRIVER_MODULE(miibus, rue, miibus_driver, miibus_devclass, 0, 0); 252MODULE_DEPEND(rue, usb2_ethernet, 1, 1, 1); 253MODULE_DEPEND(rue, usb2_core, 1, 1, 1); 254MODULE_DEPEND(rue, ether, 1, 1, 1); 255MODULE_DEPEND(rue, miibus, 1, 1, 1); 256 257static void 258rue_cfg_do_request(struct rue_softc *sc, struct usb2_device_request *req, 259 void *data) 260{ 261 uint16_t length; 262 usb2_error_t err; 263 264 if (usb2_config_td_is_gone(&sc->sc_config_td)) { 265 goto error; 266 } 267 err = usb2_do_request_flags 268 (sc->sc_udev, &sc->sc_mtx, req, data, 0, NULL, 1000); 269 270 if (err) { 271 272 DPRINTF("device request failed, err=%s " 273 "(ignored)\n", usb2_errstr(err)); 274 275error: 276 length = UGETW(req->wLength); 277 278 if ((req->bmRequestType & UT_READ) && length) { 279 bzero(data, length); 280 } 281 } 282} 283 284#define RUE_CFG_SETBIT(sc, reg, x) \ 285 rue_cfg_csr_write_1(sc, reg, rue_cfg_csr_read_1(sc, reg) | (x)) 286 287#define RUE_CFG_CLRBIT(sc, reg, x) \ 288 rue_cfg_csr_write_1(sc, reg, rue_cfg_csr_read_1(sc, reg) & ~(x)) 289 290static void 291rue_cfg_read_mem(struct rue_softc *sc, uint16_t addr, void *buf, 292 uint16_t len) 293{ 294 struct usb2_device_request req; 295 296 req.bmRequestType = UT_READ_VENDOR_DEVICE; 297 req.bRequest = UR_SET_ADDRESS; 298 USETW(req.wValue, addr); 299 USETW(req.wIndex, 0); 300 USETW(req.wLength, len); 301 302 rue_cfg_do_request(sc, &req, buf); 303} 304 305static void 306rue_cfg_write_mem(struct rue_softc *sc, uint16_t addr, void *buf, 307 uint16_t len) 308{ 309 struct usb2_device_request req; 310 311 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 312 req.bRequest = UR_SET_ADDRESS; 313 USETW(req.wValue, addr); 314 USETW(req.wIndex, 0); 315 USETW(req.wLength, len); 316 317 rue_cfg_do_request(sc, &req, buf); 318} 319 320static uint8_t 321rue_cfg_csr_read_1(struct rue_softc *sc, uint16_t reg) 322{ 323 uint8_t val; 324 325 rue_cfg_read_mem(sc, reg, &val, 1); 326 return (val); 327} 328 329static uint16_t 330rue_cfg_csr_read_2(struct rue_softc *sc, uint16_t reg) 331{ 332 uint8_t val[2]; 333 334 rue_cfg_read_mem(sc, reg, &val, 2); 335 return (UGETW(val)); 336} 337 338static void 339rue_cfg_csr_write_1(struct rue_softc *sc, uint16_t reg, uint8_t val) 340{ 341 rue_cfg_write_mem(sc, reg, &val, 1); 342} 343 344static void 345rue_cfg_csr_write_2(struct rue_softc *sc, uint16_t reg, uint16_t val) 346{ 347 uint8_t temp[2]; 348 349 USETW(temp, val); 350 rue_cfg_write_mem(sc, reg, &temp, 2); 351} 352 353static void 354rue_cfg_csr_write_4(struct rue_softc *sc, int reg, uint32_t val) 355{ 356 uint8_t temp[4]; 357 358 USETDW(temp, val); 359 rue_cfg_write_mem(sc, reg, &temp, 4); 360} 361 362static int 363rue_cfg_miibus_readreg(device_t dev, int phy, int reg) 364{ 365 struct rue_softc *sc = device_get_softc(dev); 366 uint16_t rval; 367 uint16_t ruereg; 368 uint8_t do_unlock; 369 370 if (phy != 0) { /* RTL8150 supports PHY == 0, only */ 371 return (0); 372 } 373 /* avoid recursive locking */ 374 if (mtx_owned(&sc->sc_mtx)) { 375 do_unlock = 0; 376 } else { 377 mtx_lock(&sc->sc_mtx); 378 do_unlock = 1; 379 } 380 381 switch (reg) { 382 case MII_BMCR: 383 ruereg = RUE_BMCR; 384 break; 385 case MII_BMSR: 386 ruereg = RUE_BMSR; 387 break; 388 case MII_ANAR: 389 ruereg = RUE_ANAR; 390 break; 391 case MII_ANER: 392 ruereg = RUE_AER; 393 break; 394 case MII_ANLPAR: 395 ruereg = RUE_ANLP; 396 break; 397 case MII_PHYIDR1: 398 case MII_PHYIDR2: 399 rval = 0; 400 goto done; 401 default: 402 if ((RUE_REG_MIN <= reg) && (reg <= RUE_REG_MAX)) { 403 rval = rue_cfg_csr_read_1(sc, reg); 404 goto done; 405 } 406 printf("rue%d: bad phy register\n", sc->sc_unit); 407 rval = 0; 408 goto done; 409 } 410 411 rval = rue_cfg_csr_read_2(sc, ruereg); 412done: 413 if (do_unlock) { 414 mtx_unlock(&sc->sc_mtx); 415 } 416 return (rval); 417} 418 419static int 420rue_cfg_miibus_writereg(device_t dev, int phy, int reg, int data) 421{ 422 struct rue_softc *sc = device_get_softc(dev); 423 uint16_t ruereg; 424 uint8_t do_unlock; 425 426 if (phy != 0) { /* RTL8150 supports PHY == 0, only */ 427 return (0); 428 } 429 /* avoid recursive locking */ 430 if (mtx_owned(&sc->sc_mtx)) { 431 do_unlock = 0; 432 } else { 433 mtx_lock(&sc->sc_mtx); 434 do_unlock = 1; 435 } 436 437 switch (reg) { 438 case MII_BMCR: 439 ruereg = RUE_BMCR; 440 break; 441 case MII_BMSR: 442 ruereg = RUE_BMSR; 443 break; 444 case MII_ANAR: 445 ruereg = RUE_ANAR; 446 break; 447 case MII_ANER: 448 ruereg = RUE_AER; 449 break; 450 case MII_ANLPAR: 451 ruereg = RUE_ANLP; 452 break; 453 case MII_PHYIDR1: 454 case MII_PHYIDR2: 455 goto done; 456 default: 457 if ((RUE_REG_MIN <= reg) && (reg <= RUE_REG_MAX)) { 458 rue_cfg_csr_write_1(sc, reg, data); 459 goto done; 460 } 461 printf("%s: bad phy register\n", 462 sc->sc_name); 463 goto done; 464 } 465 rue_cfg_csr_write_2(sc, ruereg, data); 466done: 467 if (do_unlock) { 468 mtx_unlock(&sc->sc_mtx); 469 } 470 return (0); 471} 472 473static void 474rue_cfg_miibus_statchg(device_t dev) 475{ 476 /* 477 * When the code below is enabled the card starts doing weird 478 * things after link going from UP to DOWN and back UP. 479 * 480 * Looks like some of register writes below messes up PHY 481 * interface. 482 * 483 * No visible regressions were found after commenting this code 484 * out, so that disable it for good. 485 */ 486#if 0 487 struct rue_softc *sc = device_get_softc(dev); 488 struct mii_data *mii = GET_MII(sc); 489 uint16_t bmcr; 490 uint8_t do_unlock; 491 492 /* avoid recursive locking */ 493 if (mtx_owned(&sc->sc_mtx)) { 494 do_unlock = 0; 495 } else { 496 mtx_lock(&sc->sc_mtx); 497 do_unlock = 1; 498 } 499 500 RUE_CFG_CLRBIT(sc, RUE_CR, (RUE_CR_RE | RUE_CR_TE)); 501 502 bmcr = rue_cfg_csr_read_2(sc, RUE_BMCR); 503 504 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) 505 bmcr |= RUE_BMCR_SPD_SET; 506 else 507 bmcr &= ~RUE_BMCR_SPD_SET; 508 509 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) 510 bmcr |= RUE_BMCR_DUPLEX; 511 else 512 bmcr &= ~RUE_BMCR_DUPLEX; 513 514 rue_cfg_csr_write_2(sc, RUE_BMCR, bmcr); 515 516 RUE_CFG_SETBIT(sc, RUE_CR, (RUE_CR_RE | RUE_CR_TE)); 517 518 if (do_unlock) { 519 mtx_unlock(&sc->sc_mtx); 520 } 521#endif 522} 523 524static void 525rue_mchash(struct usb2_config_td_cc *cc, const uint8_t *ptr) 526{ 527 uint8_t h; 528 529 h = ether_crc32_be(ptr, ETHER_ADDR_LEN) >> 26; 530 cc->if_hash[h / 8] |= 1 << (h & 7); 531 cc->if_nhash = 1; 532} 533 534static void 535rue_config_copy(struct rue_softc *sc, 536 struct usb2_config_td_cc *cc, uint16_t refcount) 537{ 538 bzero(cc, sizeof(*cc)); 539 usb2_ether_cc(sc->sc_ifp, &rue_mchash, cc); 540} 541 542/* 543 * Program the 64-bit multicast hash filter. 544 */ 545static void 546rue_cfg_promisc_upd(struct rue_softc *sc, 547 struct usb2_config_td_cc *cc, uint16_t refcount) 548{ 549 uint16_t rxcfg; 550 551 rxcfg = rue_cfg_csr_read_2(sc, RUE_RCR); 552 553 if ((cc->if_flags & IFF_ALLMULTI) || 554 (cc->if_flags & IFF_PROMISC)) { 555 rxcfg |= (RUE_RCR_AAM | RUE_RCR_AAP); 556 rxcfg &= ~RUE_RCR_AM; 557 rue_cfg_csr_write_2(sc, RUE_RCR, rxcfg); 558 rue_cfg_csr_write_4(sc, RUE_MAR0, 0xFFFFFFFF); 559 rue_cfg_csr_write_4(sc, RUE_MAR4, 0xFFFFFFFF); 560 return; 561 } 562 /* first, zero all the existing hash bits */ 563 rue_cfg_csr_write_4(sc, RUE_MAR0, 0); 564 rue_cfg_csr_write_4(sc, RUE_MAR4, 0); 565 566 if (cc->if_nhash) 567 rxcfg |= RUE_RCR_AM; 568 else 569 rxcfg &= ~RUE_RCR_AM; 570 571 rxcfg &= ~(RUE_RCR_AAM | RUE_RCR_AAP); 572 573 rue_cfg_csr_write_2(sc, RUE_RCR, rxcfg); 574 rue_cfg_write_mem(sc, RUE_MAR0, cc->if_hash, 4); 575 rue_cfg_write_mem(sc, RUE_MAR4, cc->if_hash + 4, 4); 576} 577 578static void 579rue_cfg_reset(struct rue_softc *sc) 580{ 581 usb2_error_t err; 582 uint16_t to; 583 584 rue_cfg_csr_write_1(sc, RUE_CR, RUE_CR_SOFT_RST); 585 586 for (to = 0;; to++) { 587 588 if (to < RUE_TIMEOUT) { 589 590 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 100); 591 592 if (err) { 593 break; 594 } 595 if (!(rue_cfg_csr_read_1(sc, RUE_CR) & RUE_CR_SOFT_RST)) { 596 break; 597 } 598 } else { 599 printf("%s: reset timeout!\n", 600 sc->sc_name); 601 break; 602 } 603 } 604 605 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 100); 606} 607 608/* 609 * Probe for a RTL8150 chip. 610 */ 611static int 612rue_probe(device_t dev) 613{ 614 struct usb2_attach_arg *uaa = device_get_ivars(dev); 615 616 if (uaa->usb2_mode != USB_MODE_HOST) { 617 return (ENXIO); 618 } 619 if (uaa->info.bConfigIndex != RUE_CONFIG_IDX) { 620 return (ENXIO); 621 } 622 if (uaa->info.bIfaceIndex != RUE_IFACE_IDX) { 623 return (ENXIO); 624 } 625 return (usb2_lookup_id_by_uaa(rue_devs, sizeof(rue_devs), uaa)); 626} 627 628/* 629 * Attach the interface. Allocate softc structures, do ifmedia 630 * setup and ethernet/BPF attach. 631 */ 632static int 633rue_attach(device_t dev) 634{ 635 struct usb2_attach_arg *uaa = device_get_ivars(dev); 636 struct rue_softc *sc = device_get_softc(dev); 637 int32_t error; 638 uint8_t iface_index; 639 640 sc->sc_udev = uaa->device; 641 sc->sc_dev = dev; 642 sc->sc_unit = device_get_unit(dev); 643 644 device_set_usb2_desc(dev); 645 646 snprintf(sc->sc_name, sizeof(sc->sc_name), "%s", 647 device_get_nameunit(dev)); 648 649 mtx_init(&sc->sc_mtx, "rue lock", NULL, MTX_DEF | MTX_RECURSE); 650 651 usb2_callout_init_mtx(&sc->sc_watchdog, &sc->sc_mtx, 0); 652 653 iface_index = RUE_IFACE_IDX; 654 error = usb2_transfer_setup(uaa->device, &iface_index, 655 sc->sc_xfer, rue_config, RUE_N_TRANSFER, 656 sc, &sc->sc_mtx); 657 if (error) { 658 device_printf(dev, "allocating USB " 659 "transfers failed!\n"); 660 goto detach; 661 } 662 error = usb2_config_td_setup(&sc->sc_config_td, sc, &sc->sc_mtx, 663 NULL, sizeof(struct usb2_config_td_cc), 16); 664 if (error) { 665 device_printf(dev, "could not setup config " 666 "thread!\n"); 667 goto detach; 668 } 669 mtx_lock(&sc->sc_mtx); 670 671 sc->sc_flags |= RUE_FLAG_WAIT_LINK; 672 673 /* start setup */ 674 675 usb2_config_td_queue_command 676 (&sc->sc_config_td, NULL, &rue_cfg_first_time_setup, 0, 0); 677 678 rue_watchdog(sc); 679 mtx_unlock(&sc->sc_mtx); 680 return (0); /* success */ 681 682detach: 683 rue_detach(dev); 684 return (ENXIO); /* failure */ 685} 686 687static void 688rue_cfg_first_time_setup(struct rue_softc *sc, 689 struct usb2_config_td_cc *cc, uint16_t refcount) 690{ 691 struct ifnet *ifp; 692 int error; 693 uint8_t eaddr[min(ETHER_ADDR_LEN, 6)]; 694 695 /* reset the adapter */ 696 rue_cfg_reset(sc); 697 698 /* get station address from the EEPROM */ 699 rue_cfg_read_mem(sc, RUE_EEPROM_IDR0, 700 eaddr, ETHER_ADDR_LEN); 701 702 mtx_unlock(&sc->sc_mtx); 703 704 ifp = if_alloc(IFT_ETHER); 705 706 mtx_lock(&sc->sc_mtx); 707 708 if (ifp == NULL) { 709 printf("%s: could not if_alloc()\n", 710 sc->sc_name); 711 goto done; 712 } 713 714 ifp->if_softc = sc; 715 if_initname(ifp, "rue", sc->sc_unit); 716 ifp->if_mtu = ETHERMTU; 717 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 718 ifp->if_ioctl = rue_ioctl_cb; 719 ifp->if_start = rue_start_cb; 720 ifp->if_watchdog = NULL; 721 ifp->if_init = rue_init_cb; 722 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 723 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 724 IFQ_SET_READY(&ifp->if_snd); 725 726 /* 727 * XXX need Giant when accessing the device structures ! 728 */ 729 730 mtx_unlock(&sc->sc_mtx); 731 732 mtx_lock(&Giant); 733 734 /* MII setup */ 735 error = mii_phy_probe(sc->sc_dev, &sc->sc_miibus, 736 &rue_ifmedia_upd_cb, 737 &rue_ifmedia_sts_cb); 738 mtx_unlock(&Giant); 739 740 mtx_lock(&sc->sc_mtx); 741 742 if (error) { 743 printf("%s: MII without any PHY!\n", 744 sc->sc_name); 745 if_free(ifp); 746 goto done; 747 } 748 sc->sc_ifp = ifp; 749 750 mtx_unlock(&sc->sc_mtx); 751 752 /* 753 * Call MI attach routine. 754 */ 755 756 ether_ifattach(ifp, eaddr); 757 758 mtx_lock(&sc->sc_mtx); 759 760done: 761 return; 762} 763 764static int 765rue_detach(device_t dev) 766{ 767 struct rue_softc *sc = device_get_softc(dev); 768 struct ifnet *ifp; 769 770 usb2_config_td_drain(&sc->sc_config_td); 771 772 mtx_lock(&sc->sc_mtx); 773 774 usb2_callout_stop(&sc->sc_watchdog); 775 776 rue_cfg_pre_stop(sc, NULL, 0); 777 778 ifp = sc->sc_ifp; 779 780 mtx_unlock(&sc->sc_mtx); 781 782 /* stop all USB transfers first */ 783 usb2_transfer_unsetup(sc->sc_xfer, RUE_N_TRANSFER); 784 785 /* get rid of any late children */ 786 bus_generic_detach(dev); 787 788 if (ifp) { 789 ether_ifdetach(ifp); 790 if_free(ifp); 791 } 792 usb2_config_td_unsetup(&sc->sc_config_td); 793 794 usb2_callout_drain(&sc->sc_watchdog); 795 796 mtx_destroy(&sc->sc_mtx); 797 798 return (0); 799} 800 801static void 802rue_intr_clear_stall_callback(struct usb2_xfer *xfer) 803{ 804 struct rue_softc *sc = xfer->priv_sc; 805 struct usb2_xfer *xfer_other = sc->sc_xfer[RUE_INTR_DT_RD]; 806 807 if (usb2_clear_stall_callback(xfer, xfer_other)) { 808 DPRINTF("stall cleared\n"); 809 sc->sc_flags &= ~RUE_FLAG_INTR_STALL; 810 usb2_transfer_start(xfer_other); 811 } 812} 813 814static void 815rue_intr_callback(struct usb2_xfer *xfer) 816{ 817 struct rue_softc *sc = xfer->priv_sc; 818 struct ifnet *ifp = sc->sc_ifp; 819 struct rue_intrpkt pkt; 820 821 switch (USB_GET_STATE(xfer)) { 822 case USB_ST_TRANSFERRED: 823 824 if (ifp && (ifp->if_drv_flags & IFF_DRV_RUNNING) && 825 (xfer->actlen >= sizeof(pkt))) { 826 827 usb2_copy_out(xfer->frbuffers, 0, &pkt, sizeof(pkt)); 828 829 ifp->if_ierrors += pkt.rue_rxlost_cnt; 830 ifp->if_ierrors += pkt.rue_crcerr_cnt; 831 ifp->if_collisions += pkt.rue_col_cnt; 832 } 833 case USB_ST_SETUP: 834 if (sc->sc_flags & RUE_FLAG_INTR_STALL) { 835 usb2_transfer_start(sc->sc_xfer[RUE_INTR_CS_RD]); 836 } else { 837 xfer->frlengths[0] = xfer->max_data_length; 838 usb2_start_hardware(xfer); 839 } 840 return; 841 842 default: /* Error */ 843 if (xfer->error != USB_ERR_CANCELLED) { 844 /* start clear stall */ 845 sc->sc_flags |= RUE_FLAG_INTR_STALL; 846 usb2_transfer_start(sc->sc_xfer[RUE_INTR_CS_RD]); 847 } 848 return; 849 } 850} 851 852static void 853rue_bulk_read_clear_stall_callback(struct usb2_xfer *xfer) 854{ 855 struct rue_softc *sc = xfer->priv_sc; 856 struct usb2_xfer *xfer_other = sc->sc_xfer[RUE_BULK_DT_RD]; 857 858 if (usb2_clear_stall_callback(xfer, xfer_other)) { 859 DPRINTF("stall cleared\n"); 860 sc->sc_flags &= ~RUE_FLAG_READ_STALL; 861 usb2_transfer_start(xfer_other); 862 } 863} 864 865static void 866rue_bulk_read_callback(struct usb2_xfer *xfer) 867{ 868 struct rue_softc *sc = xfer->priv_sc; 869 struct ifnet *ifp = sc->sc_ifp; 870 uint16_t status; 871 struct mbuf *m = NULL; 872 873 switch (USB_GET_STATE(xfer)) { 874 case USB_ST_TRANSFERRED: 875 876 if (xfer->actlen < 4) { 877 ifp->if_ierrors++; 878 goto tr_setup; 879 } 880 usb2_copy_out(xfer->frbuffers, xfer->actlen - 4, 881 &status, sizeof(status)); 882 883 status = le16toh(status); 884 885 /* check recieve packet was valid or not */ 886 887 if ((status & RUE_RXSTAT_VALID) == 0) { 888 ifp->if_ierrors++; 889 goto tr_setup; 890 } 891 xfer->actlen -= 4; 892 893 if (xfer->actlen < sizeof(struct ether_header)) { 894 ifp->if_ierrors++; 895 goto tr_setup; 896 } 897 m = usb2_ether_get_mbuf(); 898 899 if (m == NULL) { 900 ifp->if_ierrors++; 901 goto tr_setup; 902 } 903 xfer->actlen = min(xfer->actlen, m->m_len); 904 905 usb2_copy_out(xfer->frbuffers, 0, m->m_data, xfer->actlen); 906 907 ifp->if_ipackets++; 908 m->m_pkthdr.rcvif = ifp; 909 m->m_pkthdr.len = m->m_len = xfer->actlen; 910 911 case USB_ST_SETUP: 912tr_setup: 913 914 if (sc->sc_flags & RUE_FLAG_READ_STALL) { 915 usb2_transfer_start(sc->sc_xfer[RUE_BULK_CS_RD]); 916 } else { 917 xfer->frlengths[0] = xfer->max_data_length; 918 usb2_start_hardware(xfer); 919 } 920 921 /* 922 * At the end of a USB callback it is always safe to unlock 923 * the private mutex of a device! That is why we do the 924 * "if_input" here, and not some lines up! 925 */ 926 if (m) { 927 mtx_unlock(&sc->sc_mtx); 928 (ifp->if_input) (ifp, m); 929 mtx_lock(&sc->sc_mtx); 930 } 931 return; 932 933 default: /* Error */ 934 if (xfer->error != USB_ERR_CANCELLED) { 935 /* try to clear stall first */ 936 sc->sc_flags |= RUE_FLAG_READ_STALL; 937 usb2_transfer_start(sc->sc_xfer[RUE_BULK_CS_RD]); 938 } 939 DPRINTF("bulk read error, %s\n", 940 usb2_errstr(xfer->error)); 941 return; 942 943 } 944} 945 946static void 947rue_bulk_write_clear_stall_callback(struct usb2_xfer *xfer) 948{ 949 struct rue_softc *sc = xfer->priv_sc; 950 struct usb2_xfer *xfer_other = sc->sc_xfer[RUE_BULK_DT_WR]; 951 952 if (usb2_clear_stall_callback(xfer, xfer_other)) { 953 DPRINTF("stall cleared\n"); 954 sc->sc_flags &= ~RUE_FLAG_WRITE_STALL; 955 usb2_transfer_start(xfer_other); 956 } 957} 958 959static void 960rue_bulk_write_callback(struct usb2_xfer *xfer) 961{ 962 struct rue_softc *sc = xfer->priv_sc; 963 struct ifnet *ifp = sc->sc_ifp; 964 struct mbuf *m; 965 uint32_t temp_len; 966 967 switch (USB_GET_STATE(xfer)) { 968 case USB_ST_TRANSFERRED: 969 DPRINTFN(11, "transfer complete\n"); 970 971 ifp->if_opackets++; 972 973 case USB_ST_SETUP: 974 975 if (sc->sc_flags & RUE_FLAG_WRITE_STALL) { 976 usb2_transfer_start(sc->sc_xfer[RUE_BULK_CS_WR]); 977 goto done; 978 } 979 if (sc->sc_flags & RUE_FLAG_WAIT_LINK) { 980 /* 981 * don't send anything if there is no link ! 982 */ 983 goto done; 984 } 985 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 986 987 if (m == NULL) { 988 goto done; 989 } 990 if (m->m_pkthdr.len > MCLBYTES) { 991 m->m_pkthdr.len = MCLBYTES; 992 } 993 temp_len = m->m_pkthdr.len; 994 995 usb2_m_copy_in(xfer->frbuffers, 0, 996 m, 0, m->m_pkthdr.len); 997 998 /* 999 * This is an undocumented behavior. 1000 * RTL8150 chip doesn't send frame length smaller than 1001 * RUE_MIN_FRAMELEN (60) byte packet. 1002 */ 1003 if (temp_len < RUE_MIN_FRAMELEN) { 1004 usb2_bzero(xfer->frbuffers, temp_len, 1005 RUE_MIN_FRAMELEN - temp_len); 1006 temp_len = RUE_MIN_FRAMELEN; 1007 } 1008 xfer->frlengths[0] = temp_len; 1009 1010 /* 1011 * if there's a BPF listener, bounce a copy 1012 * of this frame to him: 1013 */ 1014 BPF_MTAP(ifp, m); 1015 1016 m_freem(m); 1017 1018 usb2_start_hardware(xfer); 1019 1020done: 1021 return; 1022 1023 default: /* Error */ 1024 DPRINTFN(11, "transfer error, %s\n", 1025 usb2_errstr(xfer->error)); 1026 1027 if (xfer->error != USB_ERR_CANCELLED) { 1028 /* try to clear stall first */ 1029 sc->sc_flags |= RUE_FLAG_WRITE_STALL; 1030 usb2_transfer_start(sc->sc_xfer[RUE_BULK_CS_WR]); 1031 } 1032 ifp->if_oerrors++; 1033 return; 1034 1035 } 1036} 1037 1038static void 1039rue_cfg_tick(struct rue_softc *sc, 1040 struct usb2_config_td_cc *cc, uint16_t refcount) 1041{ 1042 struct ifnet *ifp = sc->sc_ifp; 1043 struct mii_data *mii = GET_MII(sc); 1044 1045 if ((ifp == NULL) || 1046 (mii == NULL)) { 1047 /* not ready */ 1048 return; 1049 } 1050 mii_tick(mii); 1051 1052 mii_pollstat(mii); 1053 1054 if ((sc->sc_flags & RUE_FLAG_WAIT_LINK) && 1055 (mii->mii_media_status & IFM_ACTIVE) && 1056 (IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE)) { 1057 sc->sc_flags &= ~RUE_FLAG_WAIT_LINK; 1058 } 1059 sc->sc_media_active = mii->mii_media_active; 1060 sc->sc_media_status = mii->mii_media_status; 1061 1062 /* start stopped transfers, if any */ 1063 1064 rue_start_transfers(sc); 1065} 1066 1067static void 1068rue_start_cb(struct ifnet *ifp) 1069{ 1070 struct rue_softc *sc = ifp->if_softc; 1071 1072 mtx_lock(&sc->sc_mtx); 1073 1074 rue_start_transfers(sc); 1075 1076 mtx_unlock(&sc->sc_mtx); 1077} 1078 1079static void 1080rue_start_transfers(struct rue_softc *sc) 1081{ 1082 if ((sc->sc_flags & RUE_FLAG_LL_READY) && 1083 (sc->sc_flags & RUE_FLAG_HL_READY)) { 1084 1085 /* 1086 * start the USB transfers, if not already started: 1087 */ 1088 usb2_transfer_start(sc->sc_xfer[RUE_INTR_DT_RD]); 1089 usb2_transfer_start(sc->sc_xfer[RUE_BULK_DT_RD]); 1090 usb2_transfer_start(sc->sc_xfer[RUE_BULK_DT_WR]); 1091 } 1092} 1093 1094static void 1095rue_init_cb(void *arg) 1096{ 1097 struct rue_softc *sc = arg; 1098 1099 mtx_lock(&sc->sc_mtx); 1100 usb2_config_td_queue_command 1101 (&sc->sc_config_td, &rue_cfg_pre_init, 1102 &rue_cfg_init, 0, 0); 1103 mtx_unlock(&sc->sc_mtx); 1104} 1105 1106static void 1107rue_cfg_pre_init(struct rue_softc *sc, 1108 struct usb2_config_td_cc *cc, uint16_t refcount) 1109{ 1110 struct ifnet *ifp = sc->sc_ifp; 1111 1112 /* immediate configuration */ 1113 1114 rue_cfg_pre_stop(sc, cc, 0); 1115 1116 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1117 1118 sc->sc_flags |= RUE_FLAG_HL_READY; 1119} 1120 1121static void 1122rue_cfg_init(struct rue_softc *sc, 1123 struct usb2_config_td_cc *cc, uint16_t refcount) 1124{ 1125 struct mii_data *mii = GET_MII(sc); 1126 uint16_t rxcfg; 1127 1128 /* 1129 * Cancel pending I/O 1130 */ 1131 1132 rue_cfg_stop(sc, cc, 0); 1133 1134 /* set MAC address */ 1135 1136 rue_cfg_write_mem(sc, RUE_IDR0, cc->if_lladdr, ETHER_ADDR_LEN); 1137 1138 /* 1139 * Set the initial TX and RX configuration. 1140 */ 1141 rue_cfg_csr_write_1(sc, RUE_TCR, RUE_TCR_CONFIG); 1142 1143 rxcfg = RUE_RCR_CONFIG; 1144 1145 /* Set capture broadcast bit to capture broadcast frames. */ 1146 if (cc->if_flags & IFF_BROADCAST) 1147 rxcfg |= RUE_RCR_AB; 1148 else 1149 rxcfg &= ~RUE_RCR_AB; 1150 1151 rue_cfg_csr_write_2(sc, RUE_RCR, rxcfg); 1152 1153 /* Load the multicast filter */ 1154 rue_cfg_promisc_upd(sc, cc, 0); 1155 1156 /* Enable RX and TX */ 1157 rue_cfg_csr_write_1(sc, RUE_CR, (RUE_CR_TE | RUE_CR_RE | RUE_CR_EP3CLREN)); 1158 1159 mii_mediachg(mii); 1160 1161 sc->sc_flags |= (RUE_FLAG_READ_STALL | 1162 RUE_FLAG_WRITE_STALL | 1163 RUE_FLAG_LL_READY); 1164 1165 rue_start_transfers(sc); 1166} 1167 1168/* 1169 * Set media options. 1170 */ 1171static int 1172rue_ifmedia_upd_cb(struct ifnet *ifp) 1173{ 1174 struct rue_softc *sc = ifp->if_softc; 1175 1176 mtx_lock(&sc->sc_mtx); 1177 usb2_config_td_queue_command 1178 (&sc->sc_config_td, NULL, 1179 &rue_cfg_ifmedia_upd, 0, 0); 1180 mtx_unlock(&sc->sc_mtx); 1181 1182 return (0); 1183} 1184 1185static void 1186rue_cfg_ifmedia_upd(struct rue_softc *sc, 1187 struct usb2_config_td_cc *cc, uint16_t refcount) 1188{ 1189 struct ifnet *ifp = sc->sc_ifp; 1190 struct mii_data *mii = GET_MII(sc); 1191 1192 if ((ifp == NULL) || 1193 (mii == NULL)) { 1194 /* not ready */ 1195 return; 1196 } 1197 sc->sc_flags |= RUE_FLAG_WAIT_LINK; 1198 1199 if (mii->mii_instance) { 1200 struct mii_softc *miisc; 1201 1202 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) { 1203 mii_phy_reset(miisc); 1204 } 1205 } 1206 mii_mediachg(mii); 1207} 1208 1209/* 1210 * Report current media status. 1211 */ 1212static void 1213rue_ifmedia_sts_cb(struct ifnet *ifp, struct ifmediareq *ifmr) 1214{ 1215 struct rue_softc *sc = ifp->if_softc; 1216 1217 mtx_lock(&sc->sc_mtx); 1218 1219 ifmr->ifm_active = sc->sc_media_active; 1220 ifmr->ifm_status = sc->sc_media_status; 1221 1222 mtx_unlock(&sc->sc_mtx); 1223} 1224 1225static int 1226rue_ioctl_cb(struct ifnet *ifp, u_long command, caddr_t data) 1227{ 1228 struct rue_softc *sc = ifp->if_softc; 1229 struct mii_data *mii; 1230 int error = 0; 1231 1232 switch (command) { 1233 case SIOCSIFFLAGS: 1234 1235 mtx_lock(&sc->sc_mtx); 1236 if (ifp->if_flags & IFF_UP) { 1237 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1238 usb2_config_td_queue_command 1239 (&sc->sc_config_td, &rue_config_copy, 1240 &rue_cfg_promisc_upd, 0, 0); 1241 } else { 1242 usb2_config_td_queue_command 1243 (&sc->sc_config_td, &rue_cfg_pre_init, 1244 &rue_cfg_init, 0, 0); 1245 } 1246 } else { 1247 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1248 usb2_config_td_queue_command 1249 (&sc->sc_config_td, &rue_cfg_pre_stop, 1250 &rue_cfg_stop, 0, 0); 1251 } 1252 } 1253 mtx_unlock(&sc->sc_mtx); 1254 break; 1255 1256 case SIOCADDMULTI: 1257 case SIOCDELMULTI: 1258 mtx_lock(&sc->sc_mtx); 1259 usb2_config_td_queue_command 1260 (&sc->sc_config_td, &rue_config_copy, 1261 &rue_cfg_promisc_upd, 0, 0); 1262 mtx_unlock(&sc->sc_mtx); 1263 break; 1264 1265 case SIOCGIFMEDIA: 1266 case SIOCSIFMEDIA: 1267 mii = GET_MII(sc); 1268 if (mii == NULL) { 1269 error = EINVAL; 1270 } else { 1271 error = ifmedia_ioctl 1272 (ifp, (void *)data, &mii->mii_media, command); 1273 } 1274 break; 1275 1276 default: 1277 error = ether_ioctl(ifp, command, data); 1278 break; 1279 } 1280 return (error); 1281} 1282 1283static void 1284rue_watchdog(void *arg) 1285{ 1286 struct rue_softc *sc = arg; 1287 1288 mtx_assert(&sc->sc_mtx, MA_OWNED); 1289 1290 usb2_config_td_queue_command 1291 (&sc->sc_config_td, NULL, &rue_cfg_tick, 0, 0); 1292 1293 usb2_callout_reset(&sc->sc_watchdog, 1294 hz, &rue_watchdog, sc); 1295} 1296 1297/* 1298 * NOTE: can be called when "ifp" is NULL 1299 */ 1300static void 1301rue_cfg_pre_stop(struct rue_softc *sc, 1302 struct usb2_config_td_cc *cc, uint16_t refcount) 1303{ 1304 struct ifnet *ifp = sc->sc_ifp; 1305 1306 if (cc) { 1307 /* copy the needed configuration */ 1308 rue_config_copy(sc, cc, refcount); 1309 } 1310 /* immediate configuration */ 1311 1312 if (ifp) { 1313 /* clear flags */ 1314 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1315 } 1316 sc->sc_flags &= ~(RUE_FLAG_HL_READY | 1317 RUE_FLAG_LL_READY); 1318 1319 sc->sc_flags |= RUE_FLAG_WAIT_LINK; 1320 1321 /* 1322 * stop all the transfers, if not already stopped: 1323 */ 1324 usb2_transfer_stop(sc->sc_xfer[RUE_BULK_DT_WR]); 1325 usb2_transfer_stop(sc->sc_xfer[RUE_BULK_DT_RD]); 1326 usb2_transfer_stop(sc->sc_xfer[RUE_BULK_CS_WR]); 1327 usb2_transfer_stop(sc->sc_xfer[RUE_BULK_CS_RD]); 1328 usb2_transfer_stop(sc->sc_xfer[RUE_INTR_DT_RD]); 1329 usb2_transfer_stop(sc->sc_xfer[RUE_INTR_CS_RD]); 1330} 1331 1332static void 1333rue_cfg_stop(struct rue_softc *sc, 1334 struct usb2_config_td_cc *cc, uint16_t refcount) 1335{ 1336 rue_cfg_csr_write_1(sc, RUE_CR, 0x00); 1337 1338 rue_cfg_reset(sc); 1339} 1340 1341/* 1342 * Stop all chip I/O so that the kernel's probe routines don't 1343 * get confused by errant DMAs when rebooting. 1344 */ 1345static int 1346rue_shutdown(device_t dev) 1347{ 1348 struct rue_softc *sc = device_get_softc(dev); 1349 1350 mtx_lock(&sc->sc_mtx); 1351 1352 usb2_config_td_queue_command 1353 (&sc->sc_config_td, &rue_cfg_pre_stop, 1354 &rue_cfg_stop, 0, 0); 1355 1356 mtx_unlock(&sc->sc_mtx); 1357 1358 return (0); 1359} 1360