if_rue.c revision 187259
1/*- 2 * Copyright (c) 2001-2003, Shunsuke Akiyama <akiyama@FreeBSD.org>. 3 * Copyright (c) 1997, 1998, 1999, 2000 Bill Paul <wpaul@ee.columbia.edu>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27/*- 28 * Copyright (c) 1997, 1998, 1999, 2000 29 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 3. All advertising materials mentioning features or use of this software 40 * must display the following acknowledgement: 41 * This product includes software developed by Bill Paul. 42 * 4. Neither the name of the author nor the names of any co-contributors 43 * may be used to endorse or promote products derived from this software 44 * without specific prior written permission. 45 * 46 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 49 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 50 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 56 * THE POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59#include <sys/cdefs.h> 60__FBSDID("$FreeBSD: head/sys/dev/usb2/ethernet/if_rue2.c 187259 2009-01-15 02:35:40Z thompsa $"); 61 62/* 63 * RealTek RTL8150 USB to fast ethernet controller driver. 64 * Datasheet is available from 65 * ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/. 66 */ 67 68/* 69 * NOTE: all function names beginning like "rue_cfg_" can only 70 * be called from within the config thread function ! 71 */ 72 73#include <dev/usb2/include/usb2_devid.h> 74#include <dev/usb2/include/usb2_standard.h> 75#include <dev/usb2/include/usb2_mfunc.h> 76#include <dev/usb2/include/usb2_error.h> 77 78#define usb2_config_td_cc usb2_ether_cc 79#define usb2_config_td_softc rue_softc 80 81#define USB_DEBUG_VAR rue_debug 82 83#include <dev/usb2/core/usb2_core.h> 84#include <dev/usb2/core/usb2_lookup.h> 85#include <dev/usb2/core/usb2_process.h> 86#include <dev/usb2/core/usb2_config_td.h> 87#include <dev/usb2/core/usb2_debug.h> 88#include <dev/usb2/core/usb2_request.h> 89#include <dev/usb2/core/usb2_busdma.h> 90#include <dev/usb2/core/usb2_util.h> 91 92#include <dev/usb2/ethernet/usb2_ethernet.h> 93#include <dev/usb2/ethernet/if_ruereg.h> 94 95#if USB_DEBUG 96static int rue_debug = 0; 97 98SYSCTL_NODE(_hw_usb2, OID_AUTO, rue, CTLFLAG_RW, 0, "USB rue"); 99SYSCTL_INT(_hw_usb2_rue, OID_AUTO, debug, CTLFLAG_RW, 100 &rue_debug, 0, "Debug level"); 101#endif 102 103/* 104 * Various supported device vendors/products. 105 */ 106 107static const struct usb2_device_id rue_devs[] = { 108 {USB_VPI(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX, 0)}, 109 {USB_VPI(USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_USBKR100, 0)}, 110}; 111 112/* prototypes */ 113 114static device_probe_t rue_probe; 115static device_attach_t rue_attach; 116static device_detach_t rue_detach; 117static device_shutdown_t rue_shutdown; 118 119static usb2_callback_t rue_intr_clear_stall_callback; 120static usb2_callback_t rue_intr_callback; 121static usb2_callback_t rue_bulk_read_clear_stall_callback; 122static usb2_callback_t rue_bulk_read_callback; 123static usb2_callback_t rue_bulk_write_clear_stall_callback; 124static usb2_callback_t rue_bulk_write_callback; 125 126static usb2_config_td_command_t rue_config_copy; 127static usb2_config_td_command_t rue_cfg_promisc_upd; 128static usb2_config_td_command_t rue_cfg_first_time_setup; 129static usb2_config_td_command_t rue_cfg_tick; 130static usb2_config_td_command_t rue_cfg_pre_init; 131static usb2_config_td_command_t rue_cfg_init; 132static usb2_config_td_command_t rue_cfg_ifmedia_upd; 133static usb2_config_td_command_t rue_cfg_pre_stop; 134static usb2_config_td_command_t rue_cfg_stop; 135 136static void rue_cfg_do_request(struct rue_softc *sc, struct usb2_device_request *req, void *data); 137static void rue_cfg_read_mem(struct rue_softc *sc, uint16_t addr, void *buf, uint16_t len); 138static void rue_cfg_write_mem(struct rue_softc *sc, uint16_t addr, void *buf, uint16_t len); 139static uint8_t rue_cfg_csr_read_1(struct rue_softc *sc, uint16_t reg); 140static uint16_t rue_cfg_csr_read_2(struct rue_softc *sc, uint16_t reg); 141static void rue_cfg_csr_write_1(struct rue_softc *sc, uint16_t reg, uint8_t val); 142static void rue_cfg_csr_write_2(struct rue_softc *sc, uint16_t reg, uint16_t val); 143static void rue_cfg_csr_write_4(struct rue_softc *sc, int reg, uint32_t val); 144 145static miibus_readreg_t rue_cfg_miibus_readreg; 146static miibus_writereg_t rue_cfg_miibus_writereg; 147static miibus_statchg_t rue_cfg_miibus_statchg; 148 149static void rue_cfg_reset(struct rue_softc *sc); 150static void rue_start_cb(struct ifnet *ifp); 151static void rue_start_transfers(struct rue_softc *sc); 152static void rue_init_cb(void *arg); 153static int rue_ifmedia_upd_cb(struct ifnet *ifp); 154static void rue_ifmedia_sts_cb(struct ifnet *ifp, struct ifmediareq *ifmr); 155static int rue_ioctl_cb(struct ifnet *ifp, u_long command, caddr_t data); 156static void rue_watchdog(void *arg); 157 158static const struct usb2_config rue_config[RUE_N_TRANSFER] = { 159 160 [RUE_BULK_DT_WR] = { 161 .type = UE_BULK, 162 .endpoint = UE_ADDR_ANY, 163 .direction = UE_DIR_OUT, 164 .mh.bufsize = MCLBYTES, 165 .mh.flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 166 .mh.callback = &rue_bulk_write_callback, 167 .mh.timeout = 10000, /* 10 seconds */ 168 }, 169 170 [RUE_BULK_DT_RD] = { 171 .type = UE_BULK, 172 .endpoint = UE_ADDR_ANY, 173 .direction = UE_DIR_IN, 174 .mh.bufsize = (MCLBYTES + 4), 175 .mh.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 176 .mh.callback = &rue_bulk_read_callback, 177 .mh.timeout = 0, /* no timeout */ 178 }, 179 180 [RUE_BULK_CS_WR] = { 181 .type = UE_CONTROL, 182 .endpoint = 0x00, /* Control pipe */ 183 .direction = UE_DIR_ANY, 184 .mh.bufsize = sizeof(struct usb2_device_request), 185 .mh.flags = {}, 186 .mh.callback = &rue_bulk_write_clear_stall_callback, 187 .mh.timeout = 1000, /* 1 second */ 188 .mh.interval = 50, /* 50ms */ 189 }, 190 191 [RUE_BULK_CS_RD] = { 192 .type = UE_CONTROL, 193 .endpoint = 0x00, /* Control pipe */ 194 .direction = UE_DIR_ANY, 195 .mh.bufsize = sizeof(struct usb2_device_request), 196 .mh.flags = {}, 197 .mh.callback = &rue_bulk_read_clear_stall_callback, 198 .mh.timeout = 1000, /* 1 second */ 199 .mh.interval = 50, /* 50ms */ 200 }, 201 202 [RUE_INTR_DT_RD] = { 203 .type = UE_INTERRUPT, 204 .endpoint = UE_ADDR_ANY, 205 .direction = UE_DIR_IN, 206 .mh.flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 207 .mh.bufsize = 0, /* use wMaxPacketSize */ 208 .mh.callback = &rue_intr_callback, 209 }, 210 211 [RUE_INTR_CS_RD] = { 212 .type = UE_CONTROL, 213 .endpoint = 0x00, /* Control pipe */ 214 .direction = UE_DIR_ANY, 215 .mh.bufsize = sizeof(struct usb2_device_request), 216 .mh.flags = {}, 217 .mh.callback = &rue_intr_clear_stall_callback, 218 .mh.timeout = 1000, /* 1 second */ 219 .mh.interval = 50, /* 50ms */ 220 }, 221}; 222 223static device_method_t rue_methods[] = { 224 /* Device interface */ 225 DEVMETHOD(device_probe, rue_probe), 226 DEVMETHOD(device_attach, rue_attach), 227 DEVMETHOD(device_detach, rue_detach), 228 DEVMETHOD(device_shutdown, rue_shutdown), 229 230 /* Bus interface */ 231 DEVMETHOD(bus_print_child, bus_generic_print_child), 232 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 233 234 /* MII interface */ 235 DEVMETHOD(miibus_readreg, rue_cfg_miibus_readreg), 236 DEVMETHOD(miibus_writereg, rue_cfg_miibus_writereg), 237 DEVMETHOD(miibus_statchg, rue_cfg_miibus_statchg), 238 239 {0, 0} 240}; 241 242static driver_t rue_driver = { 243 .name = "rue", 244 .methods = rue_methods, 245 .size = sizeof(struct rue_softc), 246}; 247 248static devclass_t rue_devclass; 249 250DRIVER_MODULE(rue, ushub, rue_driver, rue_devclass, NULL, 0); 251DRIVER_MODULE(miibus, rue, miibus_driver, miibus_devclass, 0, 0); 252MODULE_DEPEND(rue, usb2_ethernet, 1, 1, 1); 253MODULE_DEPEND(rue, usb2_core, 1, 1, 1); 254MODULE_DEPEND(rue, ether, 1, 1, 1); 255MODULE_DEPEND(rue, miibus, 1, 1, 1); 256 257static void 258rue_cfg_do_request(struct rue_softc *sc, struct usb2_device_request *req, 259 void *data) 260{ 261 uint16_t length; 262 usb2_error_t err; 263 264 if (usb2_config_td_is_gone(&sc->sc_config_td)) { 265 goto error; 266 } 267 err = usb2_do_request_flags 268 (sc->sc_udev, &sc->sc_mtx, req, data, 0, NULL, 1000); 269 270 if (err) { 271 272 DPRINTF("device request failed, err=%s " 273 "(ignored)\n", usb2_errstr(err)); 274 275error: 276 length = UGETW(req->wLength); 277 278 if ((req->bmRequestType & UT_READ) && length) { 279 bzero(data, length); 280 } 281 } 282} 283 284#define RUE_CFG_SETBIT(sc, reg, x) \ 285 rue_cfg_csr_write_1(sc, reg, rue_cfg_csr_read_1(sc, reg) | (x)) 286 287#define RUE_CFG_CLRBIT(sc, reg, x) \ 288 rue_cfg_csr_write_1(sc, reg, rue_cfg_csr_read_1(sc, reg) & ~(x)) 289 290static void 291rue_cfg_read_mem(struct rue_softc *sc, uint16_t addr, void *buf, 292 uint16_t len) 293{ 294 struct usb2_device_request req; 295 296 req.bmRequestType = UT_READ_VENDOR_DEVICE; 297 req.bRequest = UR_SET_ADDRESS; 298 USETW(req.wValue, addr); 299 USETW(req.wIndex, 0); 300 USETW(req.wLength, len); 301 302 rue_cfg_do_request(sc, &req, buf); 303} 304 305static void 306rue_cfg_write_mem(struct rue_softc *sc, uint16_t addr, void *buf, 307 uint16_t len) 308{ 309 struct usb2_device_request req; 310 311 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 312 req.bRequest = UR_SET_ADDRESS; 313 USETW(req.wValue, addr); 314 USETW(req.wIndex, 0); 315 USETW(req.wLength, len); 316 317 rue_cfg_do_request(sc, &req, buf); 318} 319 320static uint8_t 321rue_cfg_csr_read_1(struct rue_softc *sc, uint16_t reg) 322{ 323 uint8_t val; 324 325 rue_cfg_read_mem(sc, reg, &val, 1); 326 return (val); 327} 328 329static uint16_t 330rue_cfg_csr_read_2(struct rue_softc *sc, uint16_t reg) 331{ 332 uint8_t val[2]; 333 334 rue_cfg_read_mem(sc, reg, &val, 2); 335 return (UGETW(val)); 336} 337 338static void 339rue_cfg_csr_write_1(struct rue_softc *sc, uint16_t reg, uint8_t val) 340{ 341 rue_cfg_write_mem(sc, reg, &val, 1); 342} 343 344static void 345rue_cfg_csr_write_2(struct rue_softc *sc, uint16_t reg, uint16_t val) 346{ 347 uint8_t temp[2]; 348 349 USETW(temp, val); 350 rue_cfg_write_mem(sc, reg, &temp, 2); 351} 352 353static void 354rue_cfg_csr_write_4(struct rue_softc *sc, int reg, uint32_t val) 355{ 356 uint8_t temp[4]; 357 358 USETDW(temp, val); 359 rue_cfg_write_mem(sc, reg, &temp, 4); 360} 361 362static int 363rue_cfg_miibus_readreg(device_t dev, int phy, int reg) 364{ 365 struct rue_softc *sc = device_get_softc(dev); 366 uint16_t rval; 367 uint16_t ruereg; 368 uint8_t do_unlock; 369 370 if (phy != 0) { /* RTL8150 supports PHY == 0, only */ 371 return (0); 372 } 373 /* avoid recursive locking */ 374 if (mtx_owned(&sc->sc_mtx)) { 375 do_unlock = 0; 376 } else { 377 mtx_lock(&sc->sc_mtx); 378 do_unlock = 1; 379 } 380 381 switch (reg) { 382 case MII_BMCR: 383 ruereg = RUE_BMCR; 384 break; 385 case MII_BMSR: 386 ruereg = RUE_BMSR; 387 break; 388 case MII_ANAR: 389 ruereg = RUE_ANAR; 390 break; 391 case MII_ANER: 392 ruereg = RUE_AER; 393 break; 394 case MII_ANLPAR: 395 ruereg = RUE_ANLP; 396 break; 397 case MII_PHYIDR1: 398 case MII_PHYIDR2: 399 rval = 0; 400 goto done; 401 default: 402 if ((RUE_REG_MIN <= reg) && (reg <= RUE_REG_MAX)) { 403 rval = rue_cfg_csr_read_1(sc, reg); 404 goto done; 405 } 406 printf("rue%d: bad phy register\n", sc->sc_unit); 407 rval = 0; 408 goto done; 409 } 410 411 rval = rue_cfg_csr_read_2(sc, ruereg); 412done: 413 if (do_unlock) { 414 mtx_unlock(&sc->sc_mtx); 415 } 416 return (rval); 417} 418 419static int 420rue_cfg_miibus_writereg(device_t dev, int phy, int reg, int data) 421{ 422 struct rue_softc *sc = device_get_softc(dev); 423 uint16_t ruereg; 424 uint8_t do_unlock; 425 426 if (phy != 0) { /* RTL8150 supports PHY == 0, only */ 427 return (0); 428 } 429 /* avoid recursive locking */ 430 if (mtx_owned(&sc->sc_mtx)) { 431 do_unlock = 0; 432 } else { 433 mtx_lock(&sc->sc_mtx); 434 do_unlock = 1; 435 } 436 437 switch (reg) { 438 case MII_BMCR: 439 ruereg = RUE_BMCR; 440 break; 441 case MII_BMSR: 442 ruereg = RUE_BMSR; 443 break; 444 case MII_ANAR: 445 ruereg = RUE_ANAR; 446 break; 447 case MII_ANER: 448 ruereg = RUE_AER; 449 break; 450 case MII_ANLPAR: 451 ruereg = RUE_ANLP; 452 break; 453 case MII_PHYIDR1: 454 case MII_PHYIDR2: 455 goto done; 456 default: 457 if ((RUE_REG_MIN <= reg) && (reg <= RUE_REG_MAX)) { 458 rue_cfg_csr_write_1(sc, reg, data); 459 goto done; 460 } 461 printf("%s: bad phy register\n", 462 sc->sc_name); 463 goto done; 464 } 465 rue_cfg_csr_write_2(sc, ruereg, data); 466done: 467 if (do_unlock) { 468 mtx_unlock(&sc->sc_mtx); 469 } 470 return (0); 471} 472 473static void 474rue_cfg_miibus_statchg(device_t dev) 475{ 476 /* 477 * When the code below is enabled the card starts doing weird 478 * things after link going from UP to DOWN and back UP. 479 * 480 * Looks like some of register writes below messes up PHY 481 * interface. 482 * 483 * No visible regressions were found after commenting this code 484 * out, so that disable it for good. 485 */ 486#if 0 487 struct rue_softc *sc = device_get_softc(dev); 488 struct mii_data *mii = GET_MII(sc); 489 uint16_t bmcr; 490 uint8_t do_unlock; 491 492 /* avoid recursive locking */ 493 if (mtx_owned(&sc->sc_mtx)) { 494 do_unlock = 0; 495 } else { 496 mtx_lock(&sc->sc_mtx); 497 do_unlock = 1; 498 } 499 500 RUE_CFG_CLRBIT(sc, RUE_CR, (RUE_CR_RE | RUE_CR_TE)); 501 502 bmcr = rue_cfg_csr_read_2(sc, RUE_BMCR); 503 504 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) 505 bmcr |= RUE_BMCR_SPD_SET; 506 else 507 bmcr &= ~RUE_BMCR_SPD_SET; 508 509 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) 510 bmcr |= RUE_BMCR_DUPLEX; 511 else 512 bmcr &= ~RUE_BMCR_DUPLEX; 513 514 rue_cfg_csr_write_2(sc, RUE_BMCR, bmcr); 515 516 RUE_CFG_SETBIT(sc, RUE_CR, (RUE_CR_RE | RUE_CR_TE)); 517 518 if (do_unlock) { 519 mtx_unlock(&sc->sc_mtx); 520 } 521#endif 522} 523 524static void 525rue_mchash(struct usb2_config_td_cc *cc, const uint8_t *ptr) 526{ 527 uint8_t h; 528 529 h = ether_crc32_be(ptr, ETHER_ADDR_LEN) >> 26; 530 cc->if_hash[h / 8] |= 1 << (h & 7); 531 cc->if_nhash = 1; 532} 533 534static void 535rue_config_copy(struct rue_softc *sc, 536 struct usb2_config_td_cc *cc, uint16_t refcount) 537{ 538 bzero(cc, sizeof(*cc)); 539 usb2_ether_cc(sc->sc_ifp, &rue_mchash, cc); 540} 541 542/* 543 * Program the 64-bit multicast hash filter. 544 */ 545static void 546rue_cfg_promisc_upd(struct rue_softc *sc, 547 struct usb2_config_td_cc *cc, uint16_t refcount) 548{ 549 uint16_t rxcfg; 550 551 rxcfg = rue_cfg_csr_read_2(sc, RUE_RCR); 552 553 if ((cc->if_flags & IFF_ALLMULTI) || 554 (cc->if_flags & IFF_PROMISC)) { 555 rxcfg |= (RUE_RCR_AAM | RUE_RCR_AAP); 556 rxcfg &= ~RUE_RCR_AM; 557 rue_cfg_csr_write_2(sc, RUE_RCR, rxcfg); 558 rue_cfg_csr_write_4(sc, RUE_MAR0, 0xFFFFFFFF); 559 rue_cfg_csr_write_4(sc, RUE_MAR4, 0xFFFFFFFF); 560 return; 561 } 562 /* first, zero all the existing hash bits */ 563 rue_cfg_csr_write_4(sc, RUE_MAR0, 0); 564 rue_cfg_csr_write_4(sc, RUE_MAR4, 0); 565 566 if (cc->if_nhash) 567 rxcfg |= RUE_RCR_AM; 568 else 569 rxcfg &= ~RUE_RCR_AM; 570 571 rxcfg &= ~(RUE_RCR_AAM | RUE_RCR_AAP); 572 573 rue_cfg_csr_write_2(sc, RUE_RCR, rxcfg); 574 rue_cfg_write_mem(sc, RUE_MAR0, cc->if_hash, 4); 575 rue_cfg_write_mem(sc, RUE_MAR4, cc->if_hash + 4, 4); 576} 577 578static void 579rue_cfg_reset(struct rue_softc *sc) 580{ 581 usb2_error_t err; 582 uint16_t to; 583 584 rue_cfg_csr_write_1(sc, RUE_CR, RUE_CR_SOFT_RST); 585 586 for (to = 0;; to++) { 587 588 if (to < RUE_TIMEOUT) { 589 590 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 100); 591 592 if (err) { 593 break; 594 } 595 if (!(rue_cfg_csr_read_1(sc, RUE_CR) & RUE_CR_SOFT_RST)) { 596 break; 597 } 598 } else { 599 printf("%s: reset timeout!\n", 600 sc->sc_name); 601 break; 602 } 603 } 604 605 err = usb2_config_td_sleep(&sc->sc_config_td, hz / 100); 606} 607 608/* 609 * Probe for a RTL8150 chip. 610 */ 611static int 612rue_probe(device_t dev) 613{ 614 struct usb2_attach_arg *uaa = device_get_ivars(dev); 615 616 if (uaa->usb2_mode != USB_MODE_HOST) { 617 return (ENXIO); 618 } 619 if (uaa->info.bConfigIndex != RUE_CONFIG_IDX) { 620 return (ENXIO); 621 } 622 if (uaa->info.bIfaceIndex != RUE_IFACE_IDX) { 623 return (ENXIO); 624 } 625 return (usb2_lookup_id_by_uaa(rue_devs, sizeof(rue_devs), uaa)); 626} 627 628/* 629 * Attach the interface. Allocate softc structures, do ifmedia 630 * setup and ethernet/BPF attach. 631 */ 632static int 633rue_attach(device_t dev) 634{ 635 struct usb2_attach_arg *uaa = device_get_ivars(dev); 636 struct rue_softc *sc = device_get_softc(dev); 637 int32_t error; 638 uint8_t iface_index; 639 640 if (sc == NULL) { 641 return (ENOMEM); 642 } 643 sc->sc_udev = uaa->device; 644 sc->sc_dev = dev; 645 sc->sc_unit = device_get_unit(dev); 646 647 device_set_usb2_desc(dev); 648 649 snprintf(sc->sc_name, sizeof(sc->sc_name), "%s", 650 device_get_nameunit(dev)); 651 652 mtx_init(&sc->sc_mtx, "rue lock", NULL, MTX_DEF | MTX_RECURSE); 653 654 usb2_callout_init_mtx(&sc->sc_watchdog, &sc->sc_mtx, 0); 655 656 iface_index = RUE_IFACE_IDX; 657 error = usb2_transfer_setup(uaa->device, &iface_index, 658 sc->sc_xfer, rue_config, RUE_N_TRANSFER, 659 sc, &sc->sc_mtx); 660 if (error) { 661 device_printf(dev, "allocating USB " 662 "transfers failed!\n"); 663 goto detach; 664 } 665 error = usb2_config_td_setup(&sc->sc_config_td, sc, &sc->sc_mtx, 666 NULL, sizeof(struct usb2_config_td_cc), 16); 667 if (error) { 668 device_printf(dev, "could not setup config " 669 "thread!\n"); 670 goto detach; 671 } 672 mtx_lock(&sc->sc_mtx); 673 674 sc->sc_flags |= RUE_FLAG_WAIT_LINK; 675 676 /* start setup */ 677 678 usb2_config_td_queue_command 679 (&sc->sc_config_td, NULL, &rue_cfg_first_time_setup, 0, 0); 680 681 rue_watchdog(sc); 682 mtx_unlock(&sc->sc_mtx); 683 return (0); /* success */ 684 685detach: 686 rue_detach(dev); 687 return (ENXIO); /* failure */ 688} 689 690static void 691rue_cfg_first_time_setup(struct rue_softc *sc, 692 struct usb2_config_td_cc *cc, uint16_t refcount) 693{ 694 struct ifnet *ifp; 695 int error; 696 uint8_t eaddr[min(ETHER_ADDR_LEN, 6)]; 697 698 /* reset the adapter */ 699 rue_cfg_reset(sc); 700 701 /* get station address from the EEPROM */ 702 rue_cfg_read_mem(sc, RUE_EEPROM_IDR0, 703 eaddr, ETHER_ADDR_LEN); 704 705 mtx_unlock(&sc->sc_mtx); 706 707 ifp = if_alloc(IFT_ETHER); 708 709 mtx_lock(&sc->sc_mtx); 710 711 if (ifp == NULL) { 712 printf("%s: could not if_alloc()\n", 713 sc->sc_name); 714 goto done; 715 } 716 sc->sc_evilhack = ifp; 717 718 ifp->if_softc = sc; 719 if_initname(ifp, "rue", sc->sc_unit); 720 ifp->if_mtu = ETHERMTU; 721 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 722 ifp->if_ioctl = rue_ioctl_cb; 723 ifp->if_start = rue_start_cb; 724 ifp->if_watchdog = NULL; 725 ifp->if_init = rue_init_cb; 726 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 727 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 728 IFQ_SET_READY(&ifp->if_snd); 729 730 /* 731 * XXX need Giant when accessing the device structures ! 732 */ 733 734 mtx_unlock(&sc->sc_mtx); 735 736 mtx_lock(&Giant); 737 738 /* MII setup */ 739 error = mii_phy_probe(sc->sc_dev, &sc->sc_miibus, 740 &rue_ifmedia_upd_cb, 741 &rue_ifmedia_sts_cb); 742 mtx_unlock(&Giant); 743 744 mtx_lock(&sc->sc_mtx); 745 746 if (error) { 747 printf("%s: MII without any PHY!\n", 748 sc->sc_name); 749 if_free(ifp); 750 goto done; 751 } 752 sc->sc_ifp = ifp; 753 754 mtx_unlock(&sc->sc_mtx); 755 756 /* 757 * Call MI attach routine. 758 */ 759 760 ether_ifattach(ifp, eaddr); 761 762 mtx_lock(&sc->sc_mtx); 763 764done: 765 return; 766} 767 768static int 769rue_detach(device_t dev) 770{ 771 struct rue_softc *sc = device_get_softc(dev); 772 struct ifnet *ifp; 773 774 usb2_config_td_drain(&sc->sc_config_td); 775 776 mtx_lock(&sc->sc_mtx); 777 778 usb2_callout_stop(&sc->sc_watchdog); 779 780 rue_cfg_pre_stop(sc, NULL, 0); 781 782 ifp = sc->sc_ifp; 783 784 mtx_unlock(&sc->sc_mtx); 785 786 /* stop all USB transfers first */ 787 usb2_transfer_unsetup(sc->sc_xfer, RUE_N_TRANSFER); 788 789 /* get rid of any late children */ 790 bus_generic_detach(dev); 791 792 if (ifp) { 793 ether_ifdetach(ifp); 794 if_free(ifp); 795 } 796 usb2_config_td_unsetup(&sc->sc_config_td); 797 798 usb2_callout_drain(&sc->sc_watchdog); 799 800 mtx_destroy(&sc->sc_mtx); 801 802 return (0); 803} 804 805static void 806rue_intr_clear_stall_callback(struct usb2_xfer *xfer) 807{ 808 struct rue_softc *sc = xfer->priv_sc; 809 struct usb2_xfer *xfer_other = sc->sc_xfer[RUE_INTR_DT_RD]; 810 811 if (usb2_clear_stall_callback(xfer, xfer_other)) { 812 DPRINTF("stall cleared\n"); 813 sc->sc_flags &= ~RUE_FLAG_INTR_STALL; 814 usb2_transfer_start(xfer_other); 815 } 816} 817 818static void 819rue_intr_callback(struct usb2_xfer *xfer) 820{ 821 struct rue_softc *sc = xfer->priv_sc; 822 struct ifnet *ifp = sc->sc_ifp; 823 struct rue_intrpkt pkt; 824 825 switch (USB_GET_STATE(xfer)) { 826 case USB_ST_TRANSFERRED: 827 828 if (ifp && (ifp->if_drv_flags & IFF_DRV_RUNNING) && 829 (xfer->actlen >= sizeof(pkt))) { 830 831 usb2_copy_out(xfer->frbuffers, 0, &pkt, sizeof(pkt)); 832 833 ifp->if_ierrors += pkt.rue_rxlost_cnt; 834 ifp->if_ierrors += pkt.rue_crcerr_cnt; 835 ifp->if_collisions += pkt.rue_col_cnt; 836 } 837 case USB_ST_SETUP: 838 if (sc->sc_flags & RUE_FLAG_INTR_STALL) { 839 usb2_transfer_start(sc->sc_xfer[RUE_INTR_CS_RD]); 840 } else { 841 xfer->frlengths[0] = xfer->max_data_length; 842 usb2_start_hardware(xfer); 843 } 844 return; 845 846 default: /* Error */ 847 if (xfer->error != USB_ERR_CANCELLED) { 848 /* start clear stall */ 849 sc->sc_flags |= RUE_FLAG_INTR_STALL; 850 usb2_transfer_start(sc->sc_xfer[RUE_INTR_CS_RD]); 851 } 852 return; 853 } 854} 855 856static void 857rue_bulk_read_clear_stall_callback(struct usb2_xfer *xfer) 858{ 859 struct rue_softc *sc = xfer->priv_sc; 860 struct usb2_xfer *xfer_other = sc->sc_xfer[RUE_BULK_DT_RD]; 861 862 if (usb2_clear_stall_callback(xfer, xfer_other)) { 863 DPRINTF("stall cleared\n"); 864 sc->sc_flags &= ~RUE_FLAG_READ_STALL; 865 usb2_transfer_start(xfer_other); 866 } 867} 868 869static void 870rue_bulk_read_callback(struct usb2_xfer *xfer) 871{ 872 struct rue_softc *sc = xfer->priv_sc; 873 struct ifnet *ifp = sc->sc_ifp; 874 uint16_t status; 875 struct mbuf *m = NULL; 876 877 switch (USB_GET_STATE(xfer)) { 878 case USB_ST_TRANSFERRED: 879 880 if (xfer->actlen < 4) { 881 ifp->if_ierrors++; 882 goto tr_setup; 883 } 884 usb2_copy_out(xfer->frbuffers, xfer->actlen - 4, 885 &status, sizeof(status)); 886 887 status = le16toh(status); 888 889 /* check recieve packet was valid or not */ 890 891 if ((status & RUE_RXSTAT_VALID) == 0) { 892 ifp->if_ierrors++; 893 goto tr_setup; 894 } 895 xfer->actlen -= 4; 896 897 if (xfer->actlen < sizeof(struct ether_header)) { 898 ifp->if_ierrors++; 899 goto tr_setup; 900 } 901 m = usb2_ether_get_mbuf(); 902 903 if (m == NULL) { 904 ifp->if_ierrors++; 905 goto tr_setup; 906 } 907 xfer->actlen = min(xfer->actlen, m->m_len); 908 909 usb2_copy_out(xfer->frbuffers, 0, m->m_data, xfer->actlen); 910 911 ifp->if_ipackets++; 912 m->m_pkthdr.rcvif = ifp; 913 m->m_pkthdr.len = m->m_len = xfer->actlen; 914 915 case USB_ST_SETUP: 916tr_setup: 917 918 if (sc->sc_flags & RUE_FLAG_READ_STALL) { 919 usb2_transfer_start(sc->sc_xfer[RUE_BULK_CS_RD]); 920 } else { 921 xfer->frlengths[0] = xfer->max_data_length; 922 usb2_start_hardware(xfer); 923 } 924 925 /* 926 * At the end of a USB callback it is always safe to unlock 927 * the private mutex of a device! That is why we do the 928 * "if_input" here, and not some lines up! 929 */ 930 if (m) { 931 mtx_unlock(&sc->sc_mtx); 932 (ifp->if_input) (ifp, m); 933 mtx_lock(&sc->sc_mtx); 934 } 935 return; 936 937 default: /* Error */ 938 if (xfer->error != USB_ERR_CANCELLED) { 939 /* try to clear stall first */ 940 sc->sc_flags |= RUE_FLAG_READ_STALL; 941 usb2_transfer_start(sc->sc_xfer[RUE_BULK_CS_RD]); 942 } 943 DPRINTF("bulk read error, %s\n", 944 usb2_errstr(xfer->error)); 945 return; 946 947 } 948} 949 950static void 951rue_bulk_write_clear_stall_callback(struct usb2_xfer *xfer) 952{ 953 struct rue_softc *sc = xfer->priv_sc; 954 struct usb2_xfer *xfer_other = sc->sc_xfer[RUE_BULK_DT_WR]; 955 956 if (usb2_clear_stall_callback(xfer, xfer_other)) { 957 DPRINTF("stall cleared\n"); 958 sc->sc_flags &= ~RUE_FLAG_WRITE_STALL; 959 usb2_transfer_start(xfer_other); 960 } 961} 962 963static void 964rue_bulk_write_callback(struct usb2_xfer *xfer) 965{ 966 struct rue_softc *sc = xfer->priv_sc; 967 struct ifnet *ifp = sc->sc_ifp; 968 struct mbuf *m; 969 uint32_t temp_len; 970 971 switch (USB_GET_STATE(xfer)) { 972 case USB_ST_TRANSFERRED: 973 DPRINTFN(11, "transfer complete\n"); 974 975 ifp->if_opackets++; 976 977 case USB_ST_SETUP: 978 979 if (sc->sc_flags & RUE_FLAG_WRITE_STALL) { 980 usb2_transfer_start(sc->sc_xfer[RUE_BULK_CS_WR]); 981 goto done; 982 } 983 if (sc->sc_flags & RUE_FLAG_WAIT_LINK) { 984 /* 985 * don't send anything if there is no link ! 986 */ 987 goto done; 988 } 989 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 990 991 if (m == NULL) { 992 goto done; 993 } 994 if (m->m_pkthdr.len > MCLBYTES) { 995 m->m_pkthdr.len = MCLBYTES; 996 } 997 temp_len = m->m_pkthdr.len; 998 999 usb2_m_copy_in(xfer->frbuffers, 0, 1000 m, 0, m->m_pkthdr.len); 1001 1002 /* 1003 * This is an undocumented behavior. 1004 * RTL8150 chip doesn't send frame length smaller than 1005 * RUE_MIN_FRAMELEN (60) byte packet. 1006 */ 1007 if (temp_len < RUE_MIN_FRAMELEN) { 1008 usb2_bzero(xfer->frbuffers, temp_len, 1009 RUE_MIN_FRAMELEN - temp_len); 1010 temp_len = RUE_MIN_FRAMELEN; 1011 } 1012 xfer->frlengths[0] = temp_len; 1013 1014 /* 1015 * if there's a BPF listener, bounce a copy 1016 * of this frame to him: 1017 */ 1018 BPF_MTAP(ifp, m); 1019 1020 m_freem(m); 1021 1022 usb2_start_hardware(xfer); 1023 1024done: 1025 return; 1026 1027 default: /* Error */ 1028 DPRINTFN(11, "transfer error, %s\n", 1029 usb2_errstr(xfer->error)); 1030 1031 if (xfer->error != USB_ERR_CANCELLED) { 1032 /* try to clear stall first */ 1033 sc->sc_flags |= RUE_FLAG_WRITE_STALL; 1034 usb2_transfer_start(sc->sc_xfer[RUE_BULK_CS_WR]); 1035 } 1036 ifp->if_oerrors++; 1037 return; 1038 1039 } 1040} 1041 1042static void 1043rue_cfg_tick(struct rue_softc *sc, 1044 struct usb2_config_td_cc *cc, uint16_t refcount) 1045{ 1046 struct ifnet *ifp = sc->sc_ifp; 1047 struct mii_data *mii = GET_MII(sc); 1048 1049 if ((ifp == NULL) || 1050 (mii == NULL)) { 1051 /* not ready */ 1052 return; 1053 } 1054 mii_tick(mii); 1055 1056 mii_pollstat(mii); 1057 1058 if ((sc->sc_flags & RUE_FLAG_WAIT_LINK) && 1059 (mii->mii_media_status & IFM_ACTIVE) && 1060 (IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE)) { 1061 sc->sc_flags &= ~RUE_FLAG_WAIT_LINK; 1062 } 1063 sc->sc_media_active = mii->mii_media_active; 1064 sc->sc_media_status = mii->mii_media_status; 1065 1066 /* start stopped transfers, if any */ 1067 1068 rue_start_transfers(sc); 1069} 1070 1071static void 1072rue_start_cb(struct ifnet *ifp) 1073{ 1074 struct rue_softc *sc = ifp->if_softc; 1075 1076 mtx_lock(&sc->sc_mtx); 1077 1078 rue_start_transfers(sc); 1079 1080 mtx_unlock(&sc->sc_mtx); 1081} 1082 1083static void 1084rue_start_transfers(struct rue_softc *sc) 1085{ 1086 if ((sc->sc_flags & RUE_FLAG_LL_READY) && 1087 (sc->sc_flags & RUE_FLAG_HL_READY)) { 1088 1089 /* 1090 * start the USB transfers, if not already started: 1091 */ 1092 usb2_transfer_start(sc->sc_xfer[RUE_INTR_DT_RD]); 1093 usb2_transfer_start(sc->sc_xfer[RUE_BULK_DT_RD]); 1094 usb2_transfer_start(sc->sc_xfer[RUE_BULK_DT_WR]); 1095 } 1096} 1097 1098static void 1099rue_init_cb(void *arg) 1100{ 1101 struct rue_softc *sc = arg; 1102 1103 mtx_lock(&sc->sc_mtx); 1104 usb2_config_td_queue_command 1105 (&sc->sc_config_td, &rue_cfg_pre_init, 1106 &rue_cfg_init, 0, 0); 1107 mtx_unlock(&sc->sc_mtx); 1108} 1109 1110static void 1111rue_cfg_pre_init(struct rue_softc *sc, 1112 struct usb2_config_td_cc *cc, uint16_t refcount) 1113{ 1114 struct ifnet *ifp = sc->sc_ifp; 1115 1116 /* immediate configuration */ 1117 1118 rue_cfg_pre_stop(sc, cc, 0); 1119 1120 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1121 1122 sc->sc_flags |= RUE_FLAG_HL_READY; 1123} 1124 1125static void 1126rue_cfg_init(struct rue_softc *sc, 1127 struct usb2_config_td_cc *cc, uint16_t refcount) 1128{ 1129 struct mii_data *mii = GET_MII(sc); 1130 uint16_t rxcfg; 1131 1132 /* 1133 * Cancel pending I/O 1134 */ 1135 1136 rue_cfg_stop(sc, cc, 0); 1137 1138 /* set MAC address */ 1139 1140 rue_cfg_write_mem(sc, RUE_IDR0, cc->if_lladdr, ETHER_ADDR_LEN); 1141 1142 /* 1143 * Set the initial TX and RX configuration. 1144 */ 1145 rue_cfg_csr_write_1(sc, RUE_TCR, RUE_TCR_CONFIG); 1146 1147 rxcfg = RUE_RCR_CONFIG; 1148 1149 /* Set capture broadcast bit to capture broadcast frames. */ 1150 if (cc->if_flags & IFF_BROADCAST) 1151 rxcfg |= RUE_RCR_AB; 1152 else 1153 rxcfg &= ~RUE_RCR_AB; 1154 1155 rue_cfg_csr_write_2(sc, RUE_RCR, rxcfg); 1156 1157 /* Load the multicast filter */ 1158 rue_cfg_promisc_upd(sc, cc, 0); 1159 1160 /* Enable RX and TX */ 1161 rue_cfg_csr_write_1(sc, RUE_CR, (RUE_CR_TE | RUE_CR_RE | RUE_CR_EP3CLREN)); 1162 1163 mii_mediachg(mii); 1164 1165 sc->sc_flags |= (RUE_FLAG_READ_STALL | 1166 RUE_FLAG_WRITE_STALL | 1167 RUE_FLAG_LL_READY); 1168 1169 rue_start_transfers(sc); 1170} 1171 1172/* 1173 * Set media options. 1174 */ 1175static int 1176rue_ifmedia_upd_cb(struct ifnet *ifp) 1177{ 1178 struct rue_softc *sc = ifp->if_softc; 1179 1180 mtx_lock(&sc->sc_mtx); 1181 usb2_config_td_queue_command 1182 (&sc->sc_config_td, NULL, 1183 &rue_cfg_ifmedia_upd, 0, 0); 1184 mtx_unlock(&sc->sc_mtx); 1185 1186 return (0); 1187} 1188 1189static void 1190rue_cfg_ifmedia_upd(struct rue_softc *sc, 1191 struct usb2_config_td_cc *cc, uint16_t refcount) 1192{ 1193 struct ifnet *ifp = sc->sc_ifp; 1194 struct mii_data *mii = GET_MII(sc); 1195 1196 if ((ifp == NULL) || 1197 (mii == NULL)) { 1198 /* not ready */ 1199 return; 1200 } 1201 sc->sc_flags |= RUE_FLAG_WAIT_LINK; 1202 1203 if (mii->mii_instance) { 1204 struct mii_softc *miisc; 1205 1206 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) { 1207 mii_phy_reset(miisc); 1208 } 1209 } 1210 mii_mediachg(mii); 1211} 1212 1213/* 1214 * Report current media status. 1215 */ 1216static void 1217rue_ifmedia_sts_cb(struct ifnet *ifp, struct ifmediareq *ifmr) 1218{ 1219 struct rue_softc *sc = ifp->if_softc; 1220 1221 mtx_lock(&sc->sc_mtx); 1222 1223 ifmr->ifm_active = sc->sc_media_active; 1224 ifmr->ifm_status = sc->sc_media_status; 1225 1226 mtx_unlock(&sc->sc_mtx); 1227} 1228 1229static int 1230rue_ioctl_cb(struct ifnet *ifp, u_long command, caddr_t data) 1231{ 1232 struct rue_softc *sc = ifp->if_softc; 1233 struct mii_data *mii; 1234 int error = 0; 1235 1236 switch (command) { 1237 case SIOCSIFFLAGS: 1238 1239 mtx_lock(&sc->sc_mtx); 1240 if (ifp->if_flags & IFF_UP) { 1241 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1242 usb2_config_td_queue_command 1243 (&sc->sc_config_td, &rue_config_copy, 1244 &rue_cfg_promisc_upd, 0, 0); 1245 } else { 1246 usb2_config_td_queue_command 1247 (&sc->sc_config_td, &rue_cfg_pre_init, 1248 &rue_cfg_init, 0, 0); 1249 } 1250 } else { 1251 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1252 usb2_config_td_queue_command 1253 (&sc->sc_config_td, &rue_cfg_pre_stop, 1254 &rue_cfg_stop, 0, 0); 1255 } 1256 } 1257 mtx_unlock(&sc->sc_mtx); 1258 break; 1259 1260 case SIOCADDMULTI: 1261 case SIOCDELMULTI: 1262 mtx_lock(&sc->sc_mtx); 1263 usb2_config_td_queue_command 1264 (&sc->sc_config_td, &rue_config_copy, 1265 &rue_cfg_promisc_upd, 0, 0); 1266 mtx_unlock(&sc->sc_mtx); 1267 break; 1268 1269 case SIOCGIFMEDIA: 1270 case SIOCSIFMEDIA: 1271 mii = GET_MII(sc); 1272 if (mii == NULL) { 1273 error = EINVAL; 1274 } else { 1275 error = ifmedia_ioctl 1276 (ifp, (void *)data, &mii->mii_media, command); 1277 } 1278 break; 1279 1280 default: 1281 error = ether_ioctl(ifp, command, data); 1282 break; 1283 } 1284 return (error); 1285} 1286 1287static void 1288rue_watchdog(void *arg) 1289{ 1290 struct rue_softc *sc = arg; 1291 1292 mtx_assert(&sc->sc_mtx, MA_OWNED); 1293 1294 usb2_config_td_queue_command 1295 (&sc->sc_config_td, NULL, &rue_cfg_tick, 0, 0); 1296 1297 usb2_callout_reset(&sc->sc_watchdog, 1298 hz, &rue_watchdog, sc); 1299} 1300 1301/* 1302 * NOTE: can be called when "ifp" is NULL 1303 */ 1304static void 1305rue_cfg_pre_stop(struct rue_softc *sc, 1306 struct usb2_config_td_cc *cc, uint16_t refcount) 1307{ 1308 struct ifnet *ifp = sc->sc_ifp; 1309 1310 if (cc) { 1311 /* copy the needed configuration */ 1312 rue_config_copy(sc, cc, refcount); 1313 } 1314 /* immediate configuration */ 1315 1316 if (ifp) { 1317 /* clear flags */ 1318 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1319 } 1320 sc->sc_flags &= ~(RUE_FLAG_HL_READY | 1321 RUE_FLAG_LL_READY); 1322 1323 sc->sc_flags |= RUE_FLAG_WAIT_LINK; 1324 1325 /* 1326 * stop all the transfers, if not already stopped: 1327 */ 1328 usb2_transfer_stop(sc->sc_xfer[RUE_BULK_DT_WR]); 1329 usb2_transfer_stop(sc->sc_xfer[RUE_BULK_DT_RD]); 1330 usb2_transfer_stop(sc->sc_xfer[RUE_BULK_CS_WR]); 1331 usb2_transfer_stop(sc->sc_xfer[RUE_BULK_CS_RD]); 1332 usb2_transfer_stop(sc->sc_xfer[RUE_INTR_DT_RD]); 1333 usb2_transfer_stop(sc->sc_xfer[RUE_INTR_CS_RD]); 1334} 1335 1336static void 1337rue_cfg_stop(struct rue_softc *sc, 1338 struct usb2_config_td_cc *cc, uint16_t refcount) 1339{ 1340 rue_cfg_csr_write_1(sc, RUE_CR, 0x00); 1341 1342 rue_cfg_reset(sc); 1343} 1344 1345/* 1346 * Stop all chip I/O so that the kernel's probe routines don't 1347 * get confused by errant DMAs when rebooting. 1348 */ 1349static int 1350rue_shutdown(device_t dev) 1351{ 1352 struct rue_softc *sc = device_get_softc(dev); 1353 1354 mtx_lock(&sc->sc_mtx); 1355 1356 usb2_config_td_queue_command 1357 (&sc->sc_config_td, &rue_cfg_pre_stop, 1358 &rue_cfg_stop, 0, 0); 1359 1360 mtx_unlock(&sc->sc_mtx); 1361 1362 return (0); 1363} 1364