1218729Shselasky/* $FreeBSD$ */ 2218729Shselasky/*- 3218729Shselasky * Copyright (c) 2010, 2011 Rick van der Zwet <info@rickvanderzwet.nl> 4218729Shselasky * 5218729Shselasky * Permission to use, copy, modify, and distribute this software for any 6218729Shselasky * purpose with or without fee is hereby granted, provided that the above 7218729Shselasky * copyright notice and this permission notice appear in all copies. 8218729Shselasky * 9218729Shselasky * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10218729Shselasky * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11218729Shselasky * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12218729Shselasky * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13218729Shselasky * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14218729Shselasky * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15218729Shselasky * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16218729Shselasky */ 17218729Shselasky 18218729Shselasky/*- 19218729Shselasky * Copyright (c) 2008 Johann Christian Rode <jcrode@gmx.net> 20218729Shselasky * 21218729Shselasky * Permission to use, copy, modify, and distribute this software for any 22218729Shselasky * purpose with or without fee is hereby granted, provided that the above 23218729Shselasky * copyright notice and this permission notice appear in all copies. 24218729Shselasky * 25218729Shselasky * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 26218729Shselasky * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 27218729Shselasky * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 28218729Shselasky * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 29218729Shselasky * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 30218729Shselasky * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 31218729Shselasky * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 32218729Shselasky */ 33218729Shselasky 34218729Shselasky/*- 35218729Shselasky * Copyright (c) 1997, 1998, 1999, 2000-2003 36218729Shselasky * Bill Paul <wpaul@windriver.com>. All rights reserved. 37218729Shselasky * 38218729Shselasky * Redistribution and use in source and binary forms, with or without 39218729Shselasky * modification, are permitted provided that the following conditions 40218729Shselasky * are met: 41218729Shselasky * 1. Redistributions of source code must retain the above copyright 42218729Shselasky * notice, this list of conditions and the following disclaimer. 43218729Shselasky * 2. Redistributions in binary form must reproduce the above copyright 44218729Shselasky * notice, this list of conditions and the following disclaimer in the 45218729Shselasky * documentation and/or other materials provided with the distribution. 46218729Shselasky * 3. All advertising materials mentioning features or use of this software 47218729Shselasky * must display the following acknowledgement: 48218729Shselasky * This product includes software developed by Ravikanth. 49218729Shselasky * 4. Neither the name of the author nor the names of any co-contributors 50218729Shselasky * may be used to endorse or promote products derived from this software 51218729Shselasky * without specific prior written permission. 52218729Shselasky * 53218729Shselasky * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 54218729Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55218729Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56218729Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul, THE VOICES IN HIS HEAD OR 57218729Shselasky * THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 58218729Shselasky * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 59218729Shselasky * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 60218729Shselasky * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 61218729Shselasky * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 62218729Shselasky * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 63218729Shselasky * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 64218729Shselasky * 65218729Shselasky */ 66218729Shselasky 67218729Shselasky/* 68218729Shselasky * Register definitions for the Moschip MCS7x30 ethernet controller. 69218729Shselasky */ 70218729Shselasky#define MOS_MCAST_TABLE 0x00 71218729Shselasky#define MOS_IPG0 0x08 72218729Shselasky#define MOS_IPG1 0x09 73218729Shselasky#define MOS_PHY_DATA0 0x0a 74218729Shselasky#define MOS_PHY_DATA1 0x0b 75218729Shselasky#define MOS_PHY_CTL 0x0c 76218729Shselasky#define MOS_PHY_STS 0x0d 77218729Shselasky#define MOS_PHY_DATA MOS_PHY_DATA0 78218729Shselasky#define MOS_CTL 0x0e 79218729Shselasky#define MOS_MAC0 0x0f 80218729Shselasky#define MOS_MAC1 0x10 81218729Shselasky#define MOS_MAC2 0x11 82218729Shselasky#define MOS_MAC3 0x12 83218729Shselasky#define MOS_MAC4 0x13 84218729Shselasky#define MOS_MAC5 0x14 85218729Shselasky#define MOS_MAC MOS_MAC0 86218729Shselasky/* apparently only available on hardware rev. C */ 87218729Shselasky#define MOS_FRAME_DROP_CNT 0x15 88218729Shselasky#define MOS_PAUSE_TRHD 0x16 89218729Shselasky 90218729Shselasky#define MOS_PHYCTL_PHYADDR 0x1f 91218729Shselasky#define MOS_PHYCTL_WRITE 0x20 92218729Shselasky#define MOS_PHYCTL_READ 0x40 93218729Shselasky 94218729Shselasky#define MOS_PHYSTS_PHYREG 0x1f 95218729Shselasky#define MOS_PHYSTS_READY 0x40 96218729Shselasky#define MOS_PHYSTS_PENDING 0x80 97218729Shselasky 98218729Shselasky#define MOS_CTL_RX_PROMISC 0x01 99218729Shselasky#define MOS_CTL_ALLMULTI 0x02 100218729Shselasky#define MOS_CTL_SLEEP 0x04 101218729Shselasky#define MOS_CTL_TX_ENB 0x08 102218729Shselasky/* 103218729Shselasky * The documentation calls this bit 'reserved', but in the FreeBSD driver 104218729Shselasky * provided by the vendor, this enables the receiver. 105218729Shselasky */ 106218729Shselasky#define MOS_CTL_RX_ENB 0x10 107218729Shselasky#define MOS_CTL_FDX_ENB 0x20 108218729Shselasky/* 0 = 10 Mbps, 1 = 100 Mbps */ 109218729Shselasky#define MOS_CTL_SPEEDSEL 0x40 110218729Shselasky/* 0 = PHY controls speed/duplex mode, 1 = bridge controls speed/duplex mode */ 111218729Shselasky#define MOS_CTL_BS_ENB 0x80 112218729Shselasky 113218729Shselasky#define MOS_RXSTS_SHORT_FRAME 0x01 114218729Shselasky#define MOS_RXSTS_LENGTH_ERROR 0x02 115218729Shselasky#define MOS_RXSTS_ALIGN_ERROR 0x04 116218729Shselasky#define MOS_RXSTS_CRC_ERROR 0x08 117218729Shselasky#define MOS_RXSTS_LARGE_FRAME 0x10 118218729Shselasky#define MOS_RXSTS_VALID 0x20 119218729Shselasky/* 120218729Shselasky * The EtherType field of an Ethernet frame can contain values other than 121218729Shselasky * the frame length, hence length errors are ignored. 122218729Shselasky */ 123218729Shselasky#define MOS_RXSTS_MASK 0x3d 124218729Shselasky 125218729Shselasky#define MOS_PAUSE_TRHD_DEFAULT 0 126218729Shselasky#define MOS_PAUSE_REWRITES 3 127218729Shselasky 128218729Shselasky#define MOS_TIMEOUT 1000 129218729Shselasky 130218729Shselasky#define MOS_RX_LIST_CNT 1 131218729Shselasky#define MOS_TX_LIST_CNT 1 132218729Shselasky 133218729Shselasky/* Maximum size of a fast ethernet frame plus one byte for the status */ 134218729Shselasky#define MOS_BUFSZ (ETHER_MAX_LEN+1) 135218729Shselasky 136218729Shselasky/* 137218729Shselasky * USB endpoints. 138218729Shselasky */ 139218729Shselasky#define MOS_ENDPT_RX 0 140218729Shselasky#define MOS_ENDPT_TX 1 141218729Shselasky#define MOS_ENDPT_INTR 2 142218729Shselasky#define MOS_ENDPT_MAX 3 143218729Shselasky 144218729Shselasky/* 145218729Shselasky * USB vendor requests. 146218729Shselasky */ 147218729Shselasky#define MOS_UR_READREG 0x0e 148218729Shselasky#define MOS_UR_WRITEREG 0x0d 149218729Shselasky 150218729Shselasky#define MOS_CONFIG_IDX 0 151218729Shselasky#define MOS_IFACE_IDX 0 152218729Shselasky 153218729Shselasky#define MCS7730 0x0001 154218729Shselasky#define MCS7830 0x0002 155232257Skevlo#define MCS7832 0x0004 156218729Shselasky 157218729Shselasky#define MOS_INC(x, y) (x) = (x + 1) % y 158218729Shselasky 159218729Shselaskystruct mos_softc { 160218729Shselasky struct usb_ether sc_ue; 161218729Shselasky struct ifnet ifp; 162218729Shselasky 163218729Shselasky struct mtx sc_mtx; 164218729Shselasky struct usb_xfer *sc_xfer[MOS_ENDPT_MAX]; 165218729Shselasky 166218729Shselasky uint16_t mos_flags; 167218729Shselasky 168218729Shselasky int mos_link; 169218729Shselasky unsigned char mos_ipgs[2]; 170218729Shselasky unsigned char mos_phyaddrs[2]; 171218729Shselasky}; 172218729Shselasky 173218729Shselasky#define GET_MII(sc) uether_getmii(&(sc)->sc_ue) 174218729Shselasky#define MOS_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 175218729Shselasky#define MOS_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 176218729Shselasky#define MOS_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) 177