ohci.h revision 192984
1184610Salfred/* $FreeBSD: head/sys/dev/usb/controller/ohci.h 192984 2009-05-28 17:36:36Z thompsa $ */ 2184610Salfred/*- 3184610Salfred * Copyright (c) 1998 The NetBSD Foundation, Inc. 4184610Salfred * All rights reserved. 5184610Salfred * 6184610Salfred * This code is derived from software contributed to The NetBSD Foundation 7184610Salfred * by Lennart Augustsson (lennart@augustsson.net) at 8184610Salfred * Carlstedt Research & Technology. 9184610Salfred * 10184610Salfred * Redistribution and use in source and binary forms, with or without 11184610Salfred * modification, are permitted provided that the following conditions 12184610Salfred * are met: 13184610Salfred * 1. Redistributions of source code must retain the above copyright 14184610Salfred * notice, this list of conditions and the following disclaimer. 15184610Salfred * 2. Redistributions in binary form must reproduce the above copyright 16184610Salfred * notice, this list of conditions and the following disclaimer in the 17184610Salfred * documentation and/or other materials provided with the distribution. 18184610Salfred * 3. All advertising materials mentioning features or use of this software 19184610Salfred * must display the following acknowledgement: 20184610Salfred * This product includes software developed by the NetBSD 21184610Salfred * Foundation, Inc. and its contributors. 22184610Salfred * 4. Neither the name of The NetBSD Foundation nor the names of its 23184610Salfred * contributors may be used to endorse or promote products derived 24184610Salfred * from this software without specific prior written permission. 25184610Salfred * 26184610Salfred * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27184610Salfred * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28184610Salfred * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29184610Salfred * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30184610Salfred * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31184610Salfred * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32184610Salfred * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33184610Salfred * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34184610Salfred * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35184610Salfred * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36184610Salfred * POSSIBILITY OF SUCH DAMAGE. 37184610Salfred */ 38184610Salfred 39184610Salfred#ifndef _OHCI_H_ 40184610Salfred#define _OHCI_H_ 41184610Salfred 42190174Sthompsa#define OHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128) 43187170Sthompsa 44190754Sthompsa/* PCI config registers */ 45184610Salfred#define PCI_CBMEM 0x10 /* configuration base memory */ 46184610Salfred#define PCI_INTERFACE_OHCI 0x10 47184610Salfred 48184610Salfred/* OHCI registers */ 49184610Salfred#define OHCI_REVISION 0x00 /* OHCI revision */ 50184610Salfred#define OHCI_REV_LO(rev) ((rev) & 0xf) 51184610Salfred#define OHCI_REV_HI(rev) (((rev)>>4) & 0xf) 52184610Salfred#define OHCI_REV_LEGACY(rev) ((rev) & 0x100) 53184610Salfred#define OHCI_CONTROL 0x04 54184610Salfred#define OHCI_CBSR_MASK 0x00000003 /* Control/Bulk Service Ratio */ 55184610Salfred#define OHCI_RATIO_1_1 0x00000000 56184610Salfred#define OHCI_RATIO_1_2 0x00000001 57184610Salfred#define OHCI_RATIO_1_3 0x00000002 58184610Salfred#define OHCI_RATIO_1_4 0x00000003 59184610Salfred#define OHCI_PLE 0x00000004 /* Periodic List Enable */ 60184610Salfred#define OHCI_IE 0x00000008 /* Isochronous Enable */ 61184610Salfred#define OHCI_CLE 0x00000010 /* Control List Enable */ 62184610Salfred#define OHCI_BLE 0x00000020 /* Bulk List Enable */ 63184610Salfred#define OHCI_HCFS_MASK 0x000000c0 /* HostControllerFunctionalStat 64184610Salfred * e */ 65184610Salfred#define OHCI_HCFS_RESET 0x00000000 66184610Salfred#define OHCI_HCFS_RESUME 0x00000040 67184610Salfred#define OHCI_HCFS_OPERATIONAL 0x00000080 68184610Salfred#define OHCI_HCFS_SUSPEND 0x000000c0 69184610Salfred#define OHCI_IR 0x00000100 /* Interrupt Routing */ 70184610Salfred#define OHCI_RWC 0x00000200 /* Remote Wakeup Connected */ 71184610Salfred#define OHCI_RWE 0x00000400 /* Remote Wakeup Enabled */ 72184610Salfred#define OHCI_COMMAND_STATUS 0x08 73184610Salfred#define OHCI_HCR 0x00000001 /* Host Controller Reset */ 74184610Salfred#define OHCI_CLF 0x00000002 /* Control List Filled */ 75184610Salfred#define OHCI_BLF 0x00000004 /* Bulk List Filled */ 76184610Salfred#define OHCI_OCR 0x00000008 /* Ownership Change Request */ 77184610Salfred#define OHCI_SOC_MASK 0x00030000 /* Scheduling Overrun Count */ 78184610Salfred#define OHCI_INTERRUPT_STATUS 0x0c 79184610Salfred#define OHCI_SO 0x00000001 /* Scheduling Overrun */ 80184610Salfred#define OHCI_WDH 0x00000002 /* Writeback Done Head */ 81184610Salfred#define OHCI_SF 0x00000004 /* Start of Frame */ 82184610Salfred#define OHCI_RD 0x00000008 /* Resume Detected */ 83184610Salfred#define OHCI_UE 0x00000010 /* Unrecoverable Error */ 84184610Salfred#define OHCI_FNO 0x00000020 /* Frame Number Overflow */ 85184610Salfred#define OHCI_RHSC 0x00000040 /* Root Hub Status Change */ 86184610Salfred#define OHCI_OC 0x40000000 /* Ownership Change */ 87184610Salfred#define OHCI_MIE 0x80000000 /* Master Interrupt Enable */ 88184610Salfred#define OHCI_INTERRUPT_ENABLE 0x10 89184610Salfred#define OHCI_INTERRUPT_DISABLE 0x14 90184610Salfred#define OHCI_HCCA 0x18 91184610Salfred#define OHCI_PERIOD_CURRENT_ED 0x1c 92184610Salfred#define OHCI_CONTROL_HEAD_ED 0x20 93184610Salfred#define OHCI_CONTROL_CURRENT_ED 0x24 94184610Salfred#define OHCI_BULK_HEAD_ED 0x28 95184610Salfred#define OHCI_BULK_CURRENT_ED 0x2c 96184610Salfred#define OHCI_DONE_HEAD 0x30 97184610Salfred#define OHCI_FM_INTERVAL 0x34 98184610Salfred#define OHCI_GET_IVAL(s) ((s) & 0x3fff) 99184610Salfred#define OHCI_GET_FSMPS(s) (((s) >> 16) & 0x7fff) 100184610Salfred#define OHCI_FIT 0x80000000 101184610Salfred#define OHCI_FM_REMAINING 0x38 102184610Salfred#define OHCI_FM_NUMBER 0x3c 103184610Salfred#define OHCI_PERIODIC_START 0x40 104184610Salfred#define OHCI_LS_THRESHOLD 0x44 105184610Salfred#define OHCI_RH_DESCRIPTOR_A 0x48 106184610Salfred#define OHCI_GET_NDP(s) ((s) & 0xff) 107184610Salfred#define OHCI_PSM 0x0100 /* Power Switching Mode */ 108184610Salfred#define OHCI_NPS 0x0200 /* No Power Switching */ 109184610Salfred#define OHCI_DT 0x0400 /* Device Type */ 110184610Salfred#define OHCI_OCPM 0x0800 /* Overcurrent Protection Mode */ 111184610Salfred#define OHCI_NOCP 0x1000 /* No Overcurrent Protection */ 112184610Salfred#define OHCI_GET_POTPGT(s) ((s) >> 24) 113184610Salfred#define OHCI_RH_DESCRIPTOR_B 0x4c 114184610Salfred#define OHCI_RH_STATUS 0x50 115184610Salfred#define OHCI_LPS 0x00000001 /* Local Power Status */ 116184610Salfred#define OHCI_OCI 0x00000002 /* OverCurrent Indicator */ 117184610Salfred#define OHCI_DRWE 0x00008000 /* Device Remote Wakeup Enable */ 118184610Salfred#define OHCI_LPSC 0x00010000 /* Local Power Status Change */ 119184610Salfred#define OHCI_CCIC 0x00020000 /* OverCurrent Indicator 120184610Salfred * Change */ 121184610Salfred#define OHCI_CRWE 0x80000000 /* Clear Remote Wakeup Enable */ 122184610Salfred#define OHCI_RH_PORT_STATUS(n) (0x50 + ((n)*4)) /* 1 based indexing */ 123184610Salfred 124184610Salfred#define OHCI_LES (OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE) 125184610Salfred#define OHCI_ALL_INTRS (OHCI_SO | OHCI_WDH | OHCI_SF | \ 126184610Salfred OHCI_RD | OHCI_UE | OHCI_FNO | \ 127184610Salfred OHCI_RHSC | OHCI_OC) 128184610Salfred#define OHCI_NORMAL_INTRS (OHCI_WDH | OHCI_RD | OHCI_UE | OHCI_RHSC) 129184610Salfred 130184610Salfred#define OHCI_FSMPS(i) (((i-210)*6/7) << 16) 131184610Salfred#define OHCI_PERIODIC(i) ((i)*9/10) 132184610Salfred 133184610Salfred#define OHCI_NO_INTRS 32 134184610Salfred#define OHCI_HCCA_SIZE 256 135184610Salfred 136184610Salfred/* Structures alignment (bytes) */ 137184610Salfred#define OHCI_HCCA_ALIGN 256 138184610Salfred#define OHCI_ED_ALIGN 16 139184610Salfred#define OHCI_TD_ALIGN 16 140184610Salfred#define OHCI_ITD_ALIGN 32 141184610Salfred 142184610Salfred#define OHCI_PAGE_SIZE 0x1000 143184610Salfred#define OHCI_PAGE(x) ((x) &~ 0xfff) 144184610Salfred#define OHCI_PAGE_OFFSET(x) ((x) & 0xfff) 145184610Salfred#define OHCI_PAGE_MASK(x) ((x) & 0xfff) 146184610Salfred 147184610Salfred#if ((USB_PAGE_SIZE < OHCI_ED_ALIGN) || (OHCI_ED_ALIGN == 0) || \ 148184610Salfred (USB_PAGE_SIZE < OHCI_TD_ALIGN) || (OHCI_TD_ALIGN == 0) || \ 149184610Salfred (USB_PAGE_SIZE < OHCI_ITD_ALIGN) || (OHCI_ITD_ALIGN == 0) || \ 150184610Salfred (USB_PAGE_SIZE < OHCI_PAGE_SIZE) || (OHCI_PAGE_SIZE == 0)) 151184610Salfred#error "Invalid USB page size!" 152184610Salfred#endif 153184610Salfred 154184610Salfred#define OHCI_VIRTUAL_FRAMELIST_COUNT 128/* dummy */ 155184610Salfred 156184610Salfred#if (OHCI_VIRTUAL_FRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER) 157184610Salfred#error "maximum number of full-speed isochronous frames is higher than supported!" 158184610Salfred#endif 159184610Salfred 160184610Salfredstruct ohci_hcca { 161184610Salfred volatile uint32_t hcca_interrupt_table[OHCI_NO_INTRS]; 162184610Salfred volatile uint32_t hcca_frame_number; 163184610Salfred volatile uint32_t hcca_done_head; 164184610Salfred#define OHCI_DONE_INTRS 1 165184610Salfred} __aligned(OHCI_HCCA_ALIGN); 166184610Salfred 167184610Salfredtypedef struct ohci_hcca ohci_hcca_t; 168184610Salfred 169184610Salfredstruct ohci_ed { 170184610Salfred volatile uint32_t ed_flags; 171184610Salfred#define OHCI_ED_GET_FA(s) ((s) & 0x7f) 172184610Salfred#define OHCI_ED_ADDRMASK 0x0000007f 173184610Salfred#define OHCI_ED_SET_FA(s) (s) 174184610Salfred#define OHCI_ED_GET_EN(s) (((s) >> 7) & 0xf) 175184610Salfred#define OHCI_ED_SET_EN(s) ((s) << 7) 176184610Salfred#define OHCI_ED_DIR_MASK 0x00001800 177184610Salfred#define OHCI_ED_DIR_TD 0x00000000 178184610Salfred#define OHCI_ED_DIR_OUT 0x00000800 179184610Salfred#define OHCI_ED_DIR_IN 0x00001000 180184610Salfred#define OHCI_ED_SPEED 0x00002000 181184610Salfred#define OHCI_ED_SKIP 0x00004000 182184610Salfred#define OHCI_ED_FORMAT_GEN 0x00000000 183184610Salfred#define OHCI_ED_FORMAT_ISO 0x00008000 184184610Salfred#define OHCI_ED_GET_MAXP(s) (((s) >> 16) & 0x07ff) 185184610Salfred#define OHCI_ED_SET_MAXP(s) ((s) << 16) 186184610Salfred#define OHCI_ED_MAXPMASK (0x7ff << 16) 187184610Salfred volatile uint32_t ed_tailp; 188184610Salfred volatile uint32_t ed_headp; 189184610Salfred#define OHCI_HALTED 0x00000001 190184610Salfred#define OHCI_TOGGLECARRY 0x00000002 191184610Salfred#define OHCI_HEADMASK 0xfffffffc 192184610Salfred volatile uint32_t ed_next; 193184610Salfred/* 194184610Salfred * Extra information needed: 195184610Salfred */ 196184610Salfred struct ohci_ed *next; 197184610Salfred struct ohci_ed *prev; 198184610Salfred struct ohci_ed *obj_next; 199192984Sthompsa struct usb_page_cache *page_cache; 200184610Salfred uint32_t ed_self; 201184610Salfred} __aligned(OHCI_ED_ALIGN); 202184610Salfred 203184610Salfredtypedef struct ohci_ed ohci_ed_t; 204184610Salfred 205184610Salfredstruct ohci_td { 206184610Salfred volatile uint32_t td_flags; 207184610Salfred#define OHCI_TD_R 0x00040000 /* Buffer Rounding */ 208184610Salfred#define OHCI_TD_DP_MASK 0x00180000 /* Direction / PID */ 209184610Salfred#define OHCI_TD_SETUP 0x00000000 210184610Salfred#define OHCI_TD_OUT 0x00080000 211184610Salfred#define OHCI_TD_IN 0x00100000 212184610Salfred#define OHCI_TD_GET_DI(x) (((x) >> 21) & 7) /* Delay Interrupt */ 213184610Salfred#define OHCI_TD_SET_DI(x) ((x) << 21) 214184610Salfred#define OHCI_TD_NOINTR 0x00e00000 215184610Salfred#define OHCI_TD_INTR_MASK 0x00e00000 216184610Salfred#define OHCI_TD_TOGGLE_CARRY 0x00000000 217184610Salfred#define OHCI_TD_TOGGLE_0 0x02000000 218184610Salfred#define OHCI_TD_TOGGLE_1 0x03000000 219184610Salfred#define OHCI_TD_TOGGLE_MASK 0x03000000 220184610Salfred#define OHCI_TD_GET_EC(x) (((x) >> 26) & 3) /* Error Count */ 221184610Salfred#define OHCI_TD_GET_CC(x) ((x) >> 28) /* Condition Code */ 222184610Salfred#define OHCI_TD_SET_CC(x) ((x) << 28) 223184610Salfred#define OHCI_TD_NOCC 0xf0000000 224184610Salfred volatile uint32_t td_cbp; /* Current Buffer Pointer */ 225184610Salfred volatile uint32_t td_next; /* Next TD */ 226184610Salfred#define OHCI_TD_NEXT_END 0 227184610Salfred volatile uint32_t td_be; /* Buffer End */ 228184610Salfred/* 229184610Salfred * Extra information needed: 230184610Salfred */ 231184610Salfred struct ohci_td *obj_next; 232184610Salfred struct ohci_td *alt_next; 233192984Sthompsa struct usb_page_cache *page_cache; 234184610Salfred uint32_t td_self; 235184610Salfred uint16_t len; 236184610Salfred} __aligned(OHCI_TD_ALIGN); 237184610Salfred 238184610Salfredtypedef struct ohci_td ohci_td_t; 239184610Salfred 240184610Salfredstruct ohci_itd { 241184610Salfred volatile uint32_t itd_flags; 242184610Salfred#define OHCI_ITD_GET_SF(x) ((x) & 0x0000ffff) 243184610Salfred#define OHCI_ITD_SET_SF(x) ((x) & 0xffff) 244184610Salfred#define OHCI_ITD_GET_DI(x) (((x) >> 21) & 7) /* Delay Interrupt */ 245184610Salfred#define OHCI_ITD_SET_DI(x) ((x) << 21) 246184610Salfred#define OHCI_ITD_NOINTR 0x00e00000 247184610Salfred#define OHCI_ITD_GET_FC(x) ((((x) >> 24) & 7)+1) /* Frame Count */ 248184610Salfred#define OHCI_ITD_SET_FC(x) (((x)-1) << 24) 249184610Salfred#define OHCI_ITD_GET_CC(x) ((x) >> 28) /* Condition Code */ 250184610Salfred#define OHCI_ITD_NOCC 0xf0000000 251184610Salfred#define OHCI_ITD_NOFFSET 8 252184610Salfred volatile uint32_t itd_bp0; /* Buffer Page 0 */ 253184610Salfred volatile uint32_t itd_next; /* Next ITD */ 254184610Salfred volatile uint32_t itd_be; /* Buffer End */ 255184610Salfred volatile uint16_t itd_offset[OHCI_ITD_NOFFSET]; /* Buffer offsets and 256184610Salfred * Status */ 257184610Salfred#define OHCI_ITD_PAGE_SELECT 0x00001000 258184610Salfred#define OHCI_ITD_MK_OFFS(len) (0xe000 | ((len) & 0x1fff)) 259184610Salfred#define OHCI_ITD_PSW_LENGTH(x) ((x) & 0xfff) /* Transfer length */ 260184610Salfred#define OHCI_ITD_PSW_GET_CC(x) ((x) >> 12) /* Condition Code */ 261184610Salfred/* 262184610Salfred * Extra information needed: 263184610Salfred */ 264184610Salfred struct ohci_itd *obj_next; 265192984Sthompsa struct usb_page_cache *page_cache; 266184610Salfred uint32_t itd_self; 267184610Salfred uint8_t frames; 268184610Salfred} __aligned(OHCI_ITD_ALIGN); 269184610Salfred 270184610Salfredtypedef struct ohci_itd ohci_itd_t; 271184610Salfred 272184610Salfred#define OHCI_CC_NO_ERROR 0 273184610Salfred#define OHCI_CC_CRC 1 274184610Salfred#define OHCI_CC_BIT_STUFFING 2 275184610Salfred#define OHCI_CC_DATA_TOGGLE_MISMATCH 3 276184610Salfred#define OHCI_CC_STALL 4 277184610Salfred#define OHCI_CC_DEVICE_NOT_RESPONDING 5 278184610Salfred#define OHCI_CC_PID_CHECK_FAILURE 6 279184610Salfred#define OHCI_CC_UNEXPECTED_PID 7 280184610Salfred#define OHCI_CC_DATA_OVERRUN 8 281184610Salfred#define OHCI_CC_DATA_UNDERRUN 9 282184610Salfred#define OHCI_CC_BUFFER_OVERRUN 12 283184610Salfred#define OHCI_CC_BUFFER_UNDERRUN 13 284184610Salfred#define OHCI_CC_NOT_ACCESSED 15 285184610Salfred 286184610Salfred/* Some delay needed when changing certain registers. */ 287184610Salfred#define OHCI_ENABLE_POWER_DELAY 5 288184610Salfred#define OHCI_READ_DESC_DELAY 5 289184610Salfred 290184610Salfred#define OHCI_NO_EDS (2*OHCI_NO_INTRS) 291184610Salfred 292184610Salfredstruct ohci_hw_softc { 293192984Sthompsa struct usb_page_cache hcca_pc; 294192984Sthompsa struct usb_page_cache ctrl_start_pc; 295192984Sthompsa struct usb_page_cache bulk_start_pc; 296192984Sthompsa struct usb_page_cache isoc_start_pc; 297192984Sthompsa struct usb_page_cache intr_start_pc[OHCI_NO_EDS]; 298184610Salfred 299192984Sthompsa struct usb_page hcca_pg; 300192984Sthompsa struct usb_page ctrl_start_pg; 301192984Sthompsa struct usb_page bulk_start_pg; 302192984Sthompsa struct usb_page isoc_start_pg; 303192984Sthompsa struct usb_page intr_start_pg[OHCI_NO_EDS]; 304184610Salfred}; 305184610Salfred 306184610Salfredstruct ohci_config_desc { 307192984Sthompsa struct usb_config_descriptor confd; 308192984Sthompsa struct usb_interface_descriptor ifcd; 309192984Sthompsa struct usb_endpoint_descriptor endpd; 310184610Salfred} __packed; 311184610Salfred 312184610Salfredunion ohci_hub_desc { 313192984Sthompsa struct usb_status stat; 314192984Sthompsa struct usb_port_status ps; 315192984Sthompsa struct usb_hub_descriptor hubd; 316184610Salfred uint8_t temp[128]; 317184610Salfred}; 318184610Salfred 319184610Salfredtypedef struct ohci_softc { 320184610Salfred struct ohci_hw_softc sc_hw; 321192984Sthompsa struct usb_bus sc_bus; /* base device */ 322192984Sthompsa struct usb_callout sc_tmo_rhsc; 323184610Salfred union ohci_hub_desc sc_hub_desc; 324184610Salfred 325192984Sthompsa struct usb_device *sc_devices[OHCI_MAX_DEVICES]; 326184610Salfred struct resource *sc_io_res; 327184610Salfred struct resource *sc_irq_res; 328184610Salfred struct ohci_hcca *sc_hcca_p; 329184610Salfred struct ohci_ed *sc_ctrl_p_last; 330184610Salfred struct ohci_ed *sc_bulk_p_last; 331184610Salfred struct ohci_ed *sc_isoc_p_last; 332184610Salfred struct ohci_ed *sc_intr_p_last[OHCI_NO_EDS]; 333184610Salfred void *sc_intr_hdl; 334184610Salfred device_t sc_dev; 335184610Salfred bus_size_t sc_io_size; 336184610Salfred bus_space_tag_t sc_io_tag; 337184610Salfred bus_space_handle_t sc_io_hdl; 338184610Salfred 339184610Salfred uint32_t sc_eintrs; /* enabled interrupts */ 340184610Salfred uint32_t sc_control; /* Preserved during suspend/standby */ 341184610Salfred uint32_t sc_intre; 342184610Salfred 343184610Salfred uint16_t sc_intr_stat[OHCI_NO_EDS]; 344184610Salfred uint16_t sc_id_vendor; 345184610Salfred 346184610Salfred uint8_t sc_noport; 347184610Salfred uint8_t sc_addr; /* device address */ 348184610Salfred uint8_t sc_conf; /* device configuration */ 349184610Salfred uint8_t sc_hub_idata[32]; 350184610Salfred 351184610Salfred char sc_vendor[16]; 352184610Salfred 353184610Salfred} ohci_softc_t; 354184610Salfred 355184610Salfredusb2_bus_mem_cb_t ohci_iterate_hw_softc; 356184610Salfred 357184610Salfredusb2_error_t ohci_init(ohci_softc_t *sc); 358184610Salfredvoid ohci_detach(struct ohci_softc *sc); 359184610Salfredvoid ohci_suspend(ohci_softc_t *sc); 360184610Salfredvoid ohci_resume(ohci_softc_t *sc); 361184610Salfredvoid ohci_interrupt(ohci_softc_t *sc); 362184610Salfred 363184610Salfred#endif /* _OHCI_H_ */ 364