if_urtwn.c revision 301762
1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5264912Skevlo * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6292176Savos * Copyright (c) 2015 Andriy Voskoboinyk <avos@FreeBSD.org> 7251538Srpaulo * 8251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 9251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 10251538Srpaulo * copyright notice and this permission notice appear in all copies. 11251538Srpaulo * 12251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19251538Srpaulo */ 20251538Srpaulo 21251538Srpaulo#include <sys/cdefs.h> 22251538Srpaulo__FBSDID("$FreeBSD: head/sys/dev/urtwn/if_urtwn.c 301762 2016-06-09 21:19:46Z avos $"); 23251538Srpaulo 24251538Srpaulo/* 25264912Skevlo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU. 26251538Srpaulo */ 27251538Srpaulo 28288353Sadrian#include "opt_wlan.h" 29295871Savos#include "opt_urtwn.h" 30288353Sadrian 31251538Srpaulo#include <sys/param.h> 32251538Srpaulo#include <sys/sockio.h> 33251538Srpaulo#include <sys/sysctl.h> 34251538Srpaulo#include <sys/lock.h> 35251538Srpaulo#include <sys/mutex.h> 36291902Skevlo#include <sys/condvar.h> 37251538Srpaulo#include <sys/mbuf.h> 38251538Srpaulo#include <sys/kernel.h> 39251538Srpaulo#include <sys/socket.h> 40251538Srpaulo#include <sys/systm.h> 41251538Srpaulo#include <sys/malloc.h> 42251538Srpaulo#include <sys/module.h> 43251538Srpaulo#include <sys/bus.h> 44251538Srpaulo#include <sys/endian.h> 45251538Srpaulo#include <sys/linker.h> 46251538Srpaulo#include <sys/firmware.h> 47251538Srpaulo#include <sys/kdb.h> 48251538Srpaulo 49251538Srpaulo#include <machine/bus.h> 50251538Srpaulo#include <machine/resource.h> 51251538Srpaulo#include <sys/rman.h> 52251538Srpaulo 53251538Srpaulo#include <net/bpf.h> 54251538Srpaulo#include <net/if.h> 55257176Sglebius#include <net/if_var.h> 56251538Srpaulo#include <net/if_arp.h> 57251538Srpaulo#include <net/ethernet.h> 58251538Srpaulo#include <net/if_dl.h> 59251538Srpaulo#include <net/if_media.h> 60251538Srpaulo#include <net/if_types.h> 61251538Srpaulo 62251538Srpaulo#include <netinet/in.h> 63251538Srpaulo#include <netinet/in_systm.h> 64251538Srpaulo#include <netinet/in_var.h> 65251538Srpaulo#include <netinet/if_ether.h> 66251538Srpaulo#include <netinet/ip.h> 67251538Srpaulo 68251538Srpaulo#include <net80211/ieee80211_var.h> 69251538Srpaulo#include <net80211/ieee80211_regdomain.h> 70251538Srpaulo#include <net80211/ieee80211_radiotap.h> 71251538Srpaulo#include <net80211/ieee80211_ratectl.h> 72297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 73297596Sadrian#include <net80211/ieee80211_superg.h> 74297596Sadrian#endif 75251538Srpaulo 76251538Srpaulo#include <dev/usb/usb.h> 77251538Srpaulo#include <dev/usb/usbdi.h> 78291902Skevlo#include <dev/usb/usb_device.h> 79251538Srpaulo#include "usbdevs.h" 80251538Srpaulo 81251538Srpaulo#include <dev/usb/usb_debug.h> 82251538Srpaulo 83297058Sadrian#include <dev/urtwn/if_urtwnreg.h> 84297058Sadrian#include <dev/urtwn/if_urtwnvar.h> 85251538Srpaulo 86251538Srpaulo#ifdef USB_DEBUG 87294471Savosenum { 88294471Savos URTWN_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 89294471Savos URTWN_DEBUG_RECV = 0x00000002, /* basic recv operation */ 90294471Savos URTWN_DEBUG_STATE = 0x00000004, /* 802.11 state transitions */ 91294471Savos URTWN_DEBUG_RA = 0x00000008, /* f/w rate adaptation setup */ 92294471Savos URTWN_DEBUG_USB = 0x00000010, /* usb requests */ 93294471Savos URTWN_DEBUG_FIRMWARE = 0x00000020, /* firmware(9) loading debug */ 94294471Savos URTWN_DEBUG_BEACON = 0x00000040, /* beacon handling */ 95294471Savos URTWN_DEBUG_INTR = 0x00000080, /* ISR */ 96294471Savos URTWN_DEBUG_TEMP = 0x00000100, /* temperature calibration */ 97294471Savos URTWN_DEBUG_ROM = 0x00000200, /* various ROM info */ 98294471Savos URTWN_DEBUG_KEY = 0x00000400, /* crypto keys management */ 99294471Savos URTWN_DEBUG_TXPWR = 0x00000800, /* dump Tx power values */ 100297175Sadrian URTWN_DEBUG_RSSI = 0x00001000, /* dump RSSI lookups */ 101294471Savos URTWN_DEBUG_ANY = 0xffffffff 102294471Savos}; 103251538Srpaulo 104294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { \ 105294471Savos if ((_sc)->sc_debug & (_m)) \ 106294471Savos device_printf((_sc)->sc_dev, __VA_ARGS__); \ 107294471Savos} while(0) 108294471Savos 109294471Savos#else 110294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { (void) sc; } while (0) 111251538Srpaulo#endif 112251538Srpaulo 113288088Sadrian#define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 114251538Srpaulo 115297175Sadrianstatic int urtwn_enable_11n = 1; 116297175SadrianTUNABLE_INT("hw.usb.urtwn.enable_11n", &urtwn_enable_11n); 117297175Sadrian 118251538Srpaulo/* various supported device vendors/products */ 119251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 120251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 121264912Skevlo#define URTWN_RTL8188E_DEV(v,p) \ 122264912Skevlo { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTWN_RTL8188E) } 123264912Skevlo#define URTWN_RTL8188E 1 124251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 125251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 126251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 127251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 128266721Skevlo URTWN_DEV(ASUS, USBN10NANO), 129251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 130251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 131251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 132251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 133251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 134251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 135251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 136251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 137251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 138251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 139251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 140251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 141251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 142251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 143251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 144251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 145252196Skevlo URTWN_DEV(DLINK, DWA131B), 146251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 147251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 148251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 149251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 150251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 151251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 152251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 153251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 154251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 155251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 156251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 157251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 158251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 159251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 160251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 161251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 162251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 163251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 164251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 165251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 166251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 167251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 168251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 169282119Skevlo URTWN_DEV(REALTEK, RTL8188CU_3), 170251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 171251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 172251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 173251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 174272410Shselasky URTWN_DEV(REALTEK, RTL8188RU_3), 175251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 176251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 177251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 178251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 179251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 180251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 181251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 182251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 183251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 184264912Skevlo /* URTWN_RTL8188E */ 185295907Skevlo URTWN_RTL8188E_DEV(ABOCOM, RTL8188EU), 186273589Skevlo URTWN_RTL8188E_DEV(DLINK, DWA123D1), 187270191Skevlo URTWN_RTL8188E_DEV(DLINK, DWA125D1), 188273589Skevlo URTWN_RTL8188E_DEV(ELECOM, WDC150SU2M), 189264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188ETV), 190264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188EU), 191264912Skevlo#undef URTWN_RTL8188E_DEV 192251538Srpaulo#undef URTWN_DEV 193251538Srpaulo}; 194251538Srpaulo 195251538Srpaulostatic device_probe_t urtwn_match; 196251538Srpaulostatic device_attach_t urtwn_attach; 197251538Srpaulostatic device_detach_t urtwn_detach; 198251538Srpaulo 199251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 200251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 201251538Srpaulo 202294471Savosstatic void urtwn_sysctlattach(struct urtwn_softc *); 203294471Savosstatic void urtwn_drain_mbufq(struct urtwn_softc *); 204287197Sglebiusstatic usb_error_t urtwn_do_request(struct urtwn_softc *, 205287197Sglebius struct usb_device_request *, void *); 206251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 207251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 208251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 209251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 210251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 211292207Savosstatic struct mbuf * urtwn_rx_copy_to_mbuf(struct urtwn_softc *, 212292207Savos struct r92c_rx_stat *, int); 213292207Savosstatic struct mbuf * urtwn_report_intr(struct usb_xfer *, 214292207Savos struct urtwn_data *); 215292207Savosstatic struct mbuf * urtwn_rxeof(struct urtwn_softc *, uint8_t *, int); 216292167Savosstatic void urtwn_r88e_ratectl_tx_complete(struct urtwn_softc *, 217292167Savos void *); 218292207Savosstatic struct ieee80211_node *urtwn_rx_frame(struct urtwn_softc *, 219292207Savos struct mbuf *, int8_t *); 220289891Savosstatic void urtwn_txeof(struct urtwn_softc *, struct urtwn_data *, 221289891Savos int); 222281069Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 223251538Srpaulo struct urtwn_data[], int, int); 224251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 225251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 226251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 227251538Srpaulo struct urtwn_data data[], int); 228289066Skevlostatic void urtwn_free_rx_list(struct urtwn_softc *); 229289066Skevlostatic void urtwn_free_tx_list(struct urtwn_softc *); 230251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 231251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 232291698Savosstatic usb_error_t urtwn_write_region_1(struct urtwn_softc *, uint16_t, 233251538Srpaulo uint8_t *, int); 234291698Savosstatic usb_error_t urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 235291698Savosstatic usb_error_t urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 236291698Savosstatic usb_error_t urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 237291698Savosstatic usb_error_t urtwn_read_region_1(struct urtwn_softc *, uint16_t, 238251538Srpaulo uint8_t *, int); 239251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 240251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 241251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 242281069Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 243251538Srpaulo const void *, int); 244292174Savosstatic void urtwn_cmdq_cb(void *, int); 245292174Savosstatic int urtwn_cmd_sleepable(struct urtwn_softc *, const void *, 246292174Savos size_t, CMD_FUNC_PROTO); 247264912Skevlostatic void urtwn_r92c_rf_write(struct urtwn_softc *, int, 248264912Skevlo uint8_t, uint32_t); 249281069Srpaulostatic void urtwn_r88e_rf_write(struct urtwn_softc *, int, 250264912Skevlo uint8_t, uint32_t); 251251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 252281069Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 253251538Srpaulo uint32_t); 254291264Savosstatic int urtwn_efuse_read_next(struct urtwn_softc *, uint8_t *); 255291264Savosstatic int urtwn_efuse_read_data(struct urtwn_softc *, uint8_t *, 256291264Savos uint8_t, uint8_t); 257294471Savos#ifdef USB_DEBUG 258291264Savosstatic void urtwn_dump_rom_contents(struct urtwn_softc *, 259291264Savos uint8_t *, uint16_t); 260291264Savos#endif 261291264Savosstatic int urtwn_efuse_read(struct urtwn_softc *, uint8_t *, 262291264Savos uint16_t); 263291698Savosstatic int urtwn_efuse_switch_power(struct urtwn_softc *); 264251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 265291264Savosstatic int urtwn_read_rom(struct urtwn_softc *); 266291264Savosstatic int urtwn_r88e_read_rom(struct urtwn_softc *); 267251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 268290631Savosstatic void urtwn_init_beacon(struct urtwn_softc *, 269290631Savos struct urtwn_vap *); 270290631Savosstatic int urtwn_setup_beacon(struct urtwn_softc *, 271290631Savos struct ieee80211_node *); 272290631Savosstatic void urtwn_update_beacon(struct ieee80211vap *, int); 273290631Savosstatic int urtwn_tx_beacon(struct urtwn_softc *sc, 274290631Savos struct urtwn_vap *); 275292175Savosstatic int urtwn_key_alloc(struct ieee80211vap *, 276292175Savos struct ieee80211_key *, ieee80211_keyix *, 277292175Savos ieee80211_keyix *); 278292175Savosstatic void urtwn_key_set_cb(struct urtwn_softc *, 279292175Savos union sec_param *); 280292175Savosstatic void urtwn_key_del_cb(struct urtwn_softc *, 281292175Savos union sec_param *); 282292175Savosstatic int urtwn_key_set(struct ieee80211vap *, 283292175Savos const struct ieee80211_key *); 284292175Savosstatic int urtwn_key_delete(struct ieee80211vap *, 285292175Savos const struct ieee80211_key *); 286290651Savosstatic void urtwn_tsf_task_adhoc(void *, int); 287290631Savosstatic void urtwn_tsf_sync_enable(struct urtwn_softc *, 288290631Savos struct ieee80211vap *); 289292203Savosstatic void urtwn_get_tsf(struct urtwn_softc *, uint64_t *); 290251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 291289811Savosstatic void urtwn_set_mode(struct urtwn_softc *, uint8_t); 292290651Savosstatic void urtwn_ibss_recv_mgmt(struct ieee80211_node *, 293290651Savos struct mbuf *, int, 294290651Savos const struct ieee80211_rx_stats *, int, int); 295281069Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 296251538Srpaulo enum ieee80211_state, int); 297294473Savosstatic void urtwn_calib_to(void *); 298294473Savosstatic void urtwn_calib_cb(struct urtwn_softc *, 299294473Savos union sec_param *); 300251538Srpaulostatic void urtwn_watchdog(void *); 301251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 302251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 303264912Skevlostatic int8_t urtwn_r88e_get_rssi(struct urtwn_softc *, int, void *); 304290630Savosstatic int urtwn_tx_data(struct urtwn_softc *, 305251538Srpaulo struct ieee80211_node *, struct mbuf *, 306251538Srpaulo struct urtwn_data *); 307292221Savosstatic int urtwn_tx_raw(struct urtwn_softc *, 308292221Savos struct ieee80211_node *, struct mbuf *, 309292221Savos struct urtwn_data *, 310292221Savos const struct ieee80211_bpf_params *); 311290630Savosstatic void urtwn_tx_start(struct urtwn_softc *, struct mbuf *, 312290630Savos uint8_t, struct urtwn_data *); 313287197Sglebiusstatic int urtwn_transmit(struct ieee80211com *, struct mbuf *); 314287197Sglebiusstatic void urtwn_start(struct urtwn_softc *); 315287197Sglebiusstatic void urtwn_parent(struct ieee80211com *); 316264912Skevlostatic int urtwn_r92c_power_on(struct urtwn_softc *); 317264912Skevlostatic int urtwn_r88e_power_on(struct urtwn_softc *); 318295874Savosstatic void urtwn_r92c_power_off(struct urtwn_softc *); 319295874Savosstatic void urtwn_r88e_power_off(struct urtwn_softc *); 320251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 321295871Savos#ifndef URTWN_WITHOUT_UCODE 322251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 323264912Skevlostatic void urtwn_r88e_fw_reset(struct urtwn_softc *); 324281069Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 325251538Srpaulo const uint8_t *, int); 326251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 327295871Savos#endif 328291902Skevlostatic int urtwn_dma_init(struct urtwn_softc *); 329291698Savosstatic int urtwn_mac_init(struct urtwn_softc *); 330251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 331251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 332251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 333292175Savosstatic int urtwn_cam_write(struct urtwn_softc *, uint32_t, 334292175Savos uint32_t); 335251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 336251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 337251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 338281069Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 339251538Srpaulo uint16_t[]); 340251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 341281069Srpaulo struct ieee80211_channel *, 342251538Srpaulo struct ieee80211_channel *, uint16_t[]); 343264912Skevlostatic void urtwn_r88e_get_txpower(struct urtwn_softc *, int, 344281069Srpaulo struct ieee80211_channel *, 345264912Skevlo struct ieee80211_channel *, uint16_t[]); 346251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 347281069Srpaulo struct ieee80211_channel *, 348251538Srpaulo struct ieee80211_channel *); 349290048Savosstatic void urtwn_set_rx_bssid_all(struct urtwn_softc *, int); 350290048Savosstatic void urtwn_set_gain(struct urtwn_softc *, uint8_t); 351251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 352251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 353300754Savosstatic void urtwn_getradiocaps(struct ieee80211com *, int, int *, 354300754Savos struct ieee80211_channel[]); 355251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 356292014Savosstatic int urtwn_wme_update(struct ieee80211com *); 357294465Savosstatic void urtwn_update_slot(struct ieee80211com *); 358294465Savosstatic void urtwn_update_slot_cb(struct urtwn_softc *, 359294465Savos union sec_param *); 360294465Savosstatic void urtwn_update_aifs(struct urtwn_softc *, uint8_t); 361299965Savosstatic uint8_t urtwn_get_multi_pos(const uint8_t[]); 362299965Savosstatic void urtwn_set_multi(struct urtwn_softc *); 363290564Savosstatic void urtwn_set_promisc(struct urtwn_softc *); 364290564Savosstatic void urtwn_update_promisc(struct ieee80211com *); 365289066Skevlostatic void urtwn_update_mcast(struct ieee80211com *); 366297910Sadrianstatic struct ieee80211_node *urtwn_node_alloc(struct ieee80211vap *, 367292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]); 368297910Sadrianstatic void urtwn_newassoc(struct ieee80211_node *, int); 369297910Sadrianstatic void urtwn_node_free(struct ieee80211_node *); 370251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 371281069Srpaulo struct ieee80211_channel *, 372251538Srpaulo struct ieee80211_channel *); 373251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 374251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 375294473Savosstatic void urtwn_temp_calib(struct urtwn_softc *); 376301762Savosstatic void urtwn_setup_static_keys(struct urtwn_softc *, 377301762Savos struct urtwn_vap *); 378291698Savosstatic int urtwn_init(struct urtwn_softc *); 379287197Sglebiusstatic void urtwn_stop(struct urtwn_softc *); 380251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 381251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 382251538Srpaulo const struct ieee80211_bpf_params *); 383266472Shselaskystatic void urtwn_ms_delay(struct urtwn_softc *); 384251538Srpaulo 385251538Srpaulo/* Aliases. */ 386251538Srpaulo#define urtwn_bb_write urtwn_write_4 387251538Srpaulo#define urtwn_bb_read urtwn_read_4 388251538Srpaulo 389251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 390251538Srpaulo [URTWN_BULK_RX] = { 391251538Srpaulo .type = UE_BULK, 392251538Srpaulo .endpoint = UE_ADDR_ANY, 393251538Srpaulo .direction = UE_DIR_IN, 394251538Srpaulo .bufsize = URTWN_RXBUFSZ, 395251538Srpaulo .flags = { 396251538Srpaulo .pipe_bof = 1, 397251538Srpaulo .short_xfer_ok = 1 398251538Srpaulo }, 399251538Srpaulo .callback = urtwn_bulk_rx_callback, 400251538Srpaulo }, 401251538Srpaulo [URTWN_BULK_TX_BE] = { 402251538Srpaulo .type = UE_BULK, 403251538Srpaulo .endpoint = 0x03, 404251538Srpaulo .direction = UE_DIR_OUT, 405251538Srpaulo .bufsize = URTWN_TXBUFSZ, 406251538Srpaulo .flags = { 407251538Srpaulo .ext_buffer = 1, 408251538Srpaulo .pipe_bof = 1, 409251538Srpaulo .force_short_xfer = 1 410251538Srpaulo }, 411251538Srpaulo .callback = urtwn_bulk_tx_callback, 412251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 413251538Srpaulo }, 414251538Srpaulo [URTWN_BULK_TX_BK] = { 415251538Srpaulo .type = UE_BULK, 416251538Srpaulo .endpoint = 0x03, 417251538Srpaulo .direction = UE_DIR_OUT, 418251538Srpaulo .bufsize = URTWN_TXBUFSZ, 419251538Srpaulo .flags = { 420251538Srpaulo .ext_buffer = 1, 421251538Srpaulo .pipe_bof = 1, 422251538Srpaulo .force_short_xfer = 1, 423251538Srpaulo }, 424251538Srpaulo .callback = urtwn_bulk_tx_callback, 425251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 426251538Srpaulo }, 427251538Srpaulo [URTWN_BULK_TX_VI] = { 428251538Srpaulo .type = UE_BULK, 429251538Srpaulo .endpoint = 0x02, 430251538Srpaulo .direction = UE_DIR_OUT, 431251538Srpaulo .bufsize = URTWN_TXBUFSZ, 432251538Srpaulo .flags = { 433251538Srpaulo .ext_buffer = 1, 434251538Srpaulo .pipe_bof = 1, 435251538Srpaulo .force_short_xfer = 1 436251538Srpaulo }, 437251538Srpaulo .callback = urtwn_bulk_tx_callback, 438251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 439251538Srpaulo }, 440251538Srpaulo [URTWN_BULK_TX_VO] = { 441251538Srpaulo .type = UE_BULK, 442251538Srpaulo .endpoint = 0x02, 443251538Srpaulo .direction = UE_DIR_OUT, 444251538Srpaulo .bufsize = URTWN_TXBUFSZ, 445251538Srpaulo .flags = { 446251538Srpaulo .ext_buffer = 1, 447251538Srpaulo .pipe_bof = 1, 448251538Srpaulo .force_short_xfer = 1 449251538Srpaulo }, 450251538Srpaulo .callback = urtwn_bulk_tx_callback, 451251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 452251538Srpaulo }, 453251538Srpaulo}; 454251538Srpaulo 455292014Savosstatic const struct wme_to_queue { 456292014Savos uint16_t reg; 457292014Savos uint8_t qid; 458292014Savos} wme2queue[WME_NUM_AC] = { 459292014Savos { R92C_EDCA_BE_PARAM, URTWN_BULK_TX_BE}, 460292014Savos { R92C_EDCA_BK_PARAM, URTWN_BULK_TX_BK}, 461292014Savos { R92C_EDCA_VI_PARAM, URTWN_BULK_TX_VI}, 462292014Savos { R92C_EDCA_VO_PARAM, URTWN_BULK_TX_VO} 463292014Savos}; 464292014Savos 465300754Savosstatic const uint8_t urtwn_chan_2ghz[] = 466300754Savos { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 }; 467300754Savos 468251538Srpaulostatic int 469251538Srpaulourtwn_match(device_t self) 470251538Srpaulo{ 471251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 472251538Srpaulo 473251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 474251538Srpaulo return (ENXIO); 475251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 476251538Srpaulo return (ENXIO); 477251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 478251538Srpaulo return (ENXIO); 479251538Srpaulo 480251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 481251538Srpaulo} 482251538Srpaulo 483297175Sadrianstatic void 484297175Sadrianurtwn_update_chw(struct ieee80211com *ic) 485297175Sadrian{ 486297175Sadrian} 487297175Sadrian 488251538Srpaulostatic int 489297175Sadrianurtwn_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 490297175Sadrian{ 491297175Sadrian 492297175Sadrian /* We're driving this ourselves (eventually); don't involve net80211 */ 493297175Sadrian return (0); 494297175Sadrian} 495297175Sadrian 496297175Sadrianstatic int 497251538Srpaulourtwn_attach(device_t self) 498251538Srpaulo{ 499251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 500251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 501287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 502251538Srpaulo int error; 503251538Srpaulo 504251538Srpaulo device_set_usb_desc(self); 505251538Srpaulo sc->sc_udev = uaa->device; 506251538Srpaulo sc->sc_dev = self; 507264912Skevlo if (USB_GET_DRIVER_INFO(uaa) == URTWN_RTL8188E) 508264912Skevlo sc->chip |= URTWN_CHIP_88E; 509251538Srpaulo 510294471Savos#ifdef USB_DEBUG 511294471Savos int debug; 512294471Savos if (resource_int_value(device_get_name(sc->sc_dev), 513294471Savos device_get_unit(sc->sc_dev), "debug", &debug) == 0) 514294471Savos sc->sc_debug = debug; 515294471Savos#endif 516294471Savos 517251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 518251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 519292174Savos URTWN_CMDQ_LOCK_INIT(sc); 520292167Savos URTWN_NT_LOCK_INIT(sc); 521294473Savos callout_init(&sc->sc_calib_to, 0); 522251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 523287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 524251538Srpaulo 525291902Skevlo sc->sc_iface_index = URTWN_IFACE_INDEX; 526291902Skevlo error = usbd_transfer_setup(uaa->device, &sc->sc_iface_index, 527291902Skevlo sc->sc_xfer, urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 528251538Srpaulo if (error) { 529251538Srpaulo device_printf(self, "could not allocate USB transfers, " 530251538Srpaulo "err=%s\n", usbd_errstr(error)); 531251538Srpaulo goto detach; 532251538Srpaulo } 533251538Srpaulo 534251538Srpaulo URTWN_LOCK(sc); 535251538Srpaulo 536251538Srpaulo error = urtwn_read_chipid(sc); 537251538Srpaulo if (error) { 538251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 539251538Srpaulo URTWN_UNLOCK(sc); 540251538Srpaulo goto detach; 541251538Srpaulo } 542251538Srpaulo 543251538Srpaulo /* Determine number of Tx/Rx chains. */ 544251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 545251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 546251538Srpaulo sc->nrxchains = 2; 547251538Srpaulo } else { 548251538Srpaulo sc->ntxchains = 1; 549251538Srpaulo sc->nrxchains = 1; 550251538Srpaulo } 551251538Srpaulo 552264912Skevlo if (sc->chip & URTWN_CHIP_88E) 553291264Savos error = urtwn_r88e_read_rom(sc); 554264912Skevlo else 555291264Savos error = urtwn_read_rom(sc); 556291264Savos if (error != 0) { 557291264Savos device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", 558291264Savos __func__, error); 559291264Savos URTWN_UNLOCK(sc); 560291264Savos goto detach; 561291264Savos } 562264912Skevlo 563251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 564251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 565264912Skevlo (sc->chip & URTWN_CHIP_88E) ? "8188EU" : 566251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 567251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 568251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 569251538Srpaulo 570251538Srpaulo URTWN_UNLOCK(sc); 571251538Srpaulo 572283537Sglebius ic->ic_softc = sc; 573283527Sglebius ic->ic_name = device_get_nameunit(self); 574251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 575251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 576251538Srpaulo 577251538Srpaulo /* set device capabilities */ 578251538Srpaulo ic->ic_caps = 579251538Srpaulo IEEE80211_C_STA /* station mode */ 580251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 581290651Savos | IEEE80211_C_IBSS /* adhoc mode */ 582290631Savos | IEEE80211_C_HOSTAP /* hostap mode */ 583251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 584251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 585297175Sadrian#if 0 586251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 587297175Sadrian#endif 588251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 589292014Savos | IEEE80211_C_WME /* 802.11e */ 590297596Sadrian | IEEE80211_C_SWAMSDUTX /* Do software A-MSDU TX */ 591297596Sadrian | IEEE80211_C_FF /* Atheros fast-frames */ 592251538Srpaulo ; 593251538Srpaulo 594292175Savos ic->ic_cryptocaps = 595292175Savos IEEE80211_CRYPTO_WEP | 596292175Savos IEEE80211_CRYPTO_TKIP | 597292175Savos IEEE80211_CRYPTO_AES_CCM; 598292175Savos 599297175Sadrian /* Assume they're all 11n capable for now */ 600297175Sadrian if (urtwn_enable_11n) { 601297175Sadrian device_printf(self, "enabling 11n\n"); 602297175Sadrian ic->ic_htcaps = IEEE80211_HTC_HT | 603297601Sadrian#if 0 604297175Sadrian IEEE80211_HTC_AMPDU | 605297601Sadrian#endif 606297175Sadrian IEEE80211_HTC_AMSDU | 607297175Sadrian IEEE80211_HTCAP_MAXAMSDU_3839 | 608297175Sadrian IEEE80211_HTCAP_SMPS_OFF; 609297175Sadrian /* no HT40 just yet */ 610297175Sadrian // ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 611297175Sadrian 612297175Sadrian /* XXX TODO: verify chains versus streams for urtwn */ 613297175Sadrian ic->ic_txstream = sc->ntxchains; 614297175Sadrian ic->ic_rxstream = sc->nrxchains; 615297175Sadrian } 616297175Sadrian 617300754Savos /* XXX TODO: setup regdomain if R92C_CHANNEL_PLAN_BY_HW bit is set. */ 618251538Srpaulo 619300754Savos urtwn_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 620300754Savos ic->ic_channels); 621300754Savos 622287197Sglebius ieee80211_ifattach(ic); 623251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 624251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 625251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 626300754Savos ic->ic_getradiocaps = urtwn_getradiocaps; 627251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 628287197Sglebius ic->ic_transmit = urtwn_transmit; 629287197Sglebius ic->ic_parent = urtwn_parent; 630251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 631251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 632292014Savos ic->ic_wme.wme_update = urtwn_wme_update; 633294465Savos ic->ic_updateslot = urtwn_update_slot; 634290564Savos ic->ic_update_promisc = urtwn_update_promisc; 635251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 636292167Savos if (sc->chip & URTWN_CHIP_88E) { 637297910Sadrian ic->ic_node_alloc = urtwn_node_alloc; 638297910Sadrian ic->ic_newassoc = urtwn_newassoc; 639292167Savos sc->sc_node_free = ic->ic_node_free; 640297910Sadrian ic->ic_node_free = urtwn_node_free; 641292167Savos } 642297175Sadrian ic->ic_update_chw = urtwn_update_chw; 643297175Sadrian ic->ic_ampdu_enable = urtwn_ampdu_enable; 644251538Srpaulo 645281069Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 646251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 647251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 648251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 649251538Srpaulo 650292174Savos TASK_INIT(&sc->cmdq_task, 0, urtwn_cmdq_cb, sc); 651292174Savos 652294471Savos urtwn_sysctlattach(sc); 653294471Savos 654251538Srpaulo if (bootverbose) 655251538Srpaulo ieee80211_announce(ic); 656251538Srpaulo 657251538Srpaulo return (0); 658251538Srpaulo 659251538Srpaulodetach: 660251538Srpaulo urtwn_detach(self); 661251538Srpaulo return (ENXIO); /* failure */ 662251538Srpaulo} 663251538Srpaulo 664294471Savosstatic void 665294471Savosurtwn_sysctlattach(struct urtwn_softc *sc) 666294471Savos{ 667294471Savos#ifdef USB_DEBUG 668294471Savos struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 669294471Savos struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 670294471Savos 671294471Savos SYSCTL_ADD_U32(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 672294471Savos "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug, 673294471Savos "control debugging printfs"); 674294471Savos#endif 675294471Savos} 676294471Savos 677251538Srpaulostatic int 678251538Srpaulourtwn_detach(device_t self) 679251538Srpaulo{ 680251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 681287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 682263153Skevlo unsigned int x; 683281069Srpaulo 684263153Skevlo /* Prevent further ioctls. */ 685263153Skevlo URTWN_LOCK(sc); 686263153Skevlo sc->sc_flags |= URTWN_DETACHED; 687263153Skevlo URTWN_UNLOCK(sc); 688251538Srpaulo 689291698Savos urtwn_stop(sc); 690291698Savos 691251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 692294473Savos callout_drain(&sc->sc_calib_to); 693251538Srpaulo 694288353Sadrian /* stop all USB transfers */ 695288353Sadrian usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 696288353Sadrian 697263153Skevlo /* Prevent further allocations from RX/TX data lists. */ 698263153Skevlo URTWN_LOCK(sc); 699263153Skevlo STAILQ_INIT(&sc->sc_tx_active); 700263153Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 701263153Skevlo STAILQ_INIT(&sc->sc_tx_pending); 702263153Skevlo 703263153Skevlo STAILQ_INIT(&sc->sc_rx_active); 704263153Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 705263153Skevlo URTWN_UNLOCK(sc); 706263153Skevlo 707263153Skevlo /* drain USB transfers */ 708263153Skevlo for (x = 0; x != URTWN_N_TRANSFER; x++) 709263153Skevlo usbd_transfer_drain(sc->sc_xfer[x]); 710263153Skevlo 711263153Skevlo /* Free data buffers. */ 712263153Skevlo URTWN_LOCK(sc); 713263153Skevlo urtwn_free_tx_list(sc); 714263153Skevlo urtwn_free_rx_list(sc); 715263153Skevlo URTWN_UNLOCK(sc); 716263153Skevlo 717292174Savos if (ic->ic_softc == sc) { 718292174Savos ieee80211_draintask(ic, &sc->cmdq_task); 719292174Savos ieee80211_ifdetach(ic); 720292174Savos } 721292174Savos 722292167Savos URTWN_NT_LOCK_DESTROY(sc); 723292174Savos URTWN_CMDQ_LOCK_DESTROY(sc); 724251538Srpaulo mtx_destroy(&sc->sc_mtx); 725251538Srpaulo 726251538Srpaulo return (0); 727251538Srpaulo} 728251538Srpaulo 729251538Srpaulostatic void 730289066Skevlourtwn_drain_mbufq(struct urtwn_softc *sc) 731251538Srpaulo{ 732289066Skevlo struct mbuf *m; 733289066Skevlo struct ieee80211_node *ni; 734289066Skevlo URTWN_ASSERT_LOCKED(sc); 735289066Skevlo while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 736289066Skevlo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 737289066Skevlo m->m_pkthdr.rcvif = NULL; 738289066Skevlo ieee80211_free_node(ni); 739289066Skevlo m_freem(m); 740251538Srpaulo } 741251538Srpaulo} 742251538Srpaulo 743251538Srpaulostatic usb_error_t 744251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 745251538Srpaulo void *data) 746251538Srpaulo{ 747251538Srpaulo usb_error_t err; 748251538Srpaulo int ntries = 10; 749251538Srpaulo 750251538Srpaulo URTWN_ASSERT_LOCKED(sc); 751251538Srpaulo 752251538Srpaulo while (ntries--) { 753251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 754251538Srpaulo req, data, 0, NULL, 250 /* ms */); 755251538Srpaulo if (err == 0) 756251538Srpaulo break; 757251538Srpaulo 758294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_USB, 759294471Savos "%s: control request failed, %s (retries left: %d)\n", 760294471Savos __func__, usbd_errstr(err), ntries); 761251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 762251538Srpaulo } 763251538Srpaulo return (err); 764251538Srpaulo} 765251538Srpaulo 766251538Srpaulostatic struct ieee80211vap * 767251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 768251538Srpaulo enum ieee80211_opmode opmode, int flags, 769251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 770251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 771251538Srpaulo{ 772290631Savos struct urtwn_softc *sc = ic->ic_softc; 773251538Srpaulo struct urtwn_vap *uvp; 774251538Srpaulo struct ieee80211vap *vap; 775251538Srpaulo 776251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 777251538Srpaulo return (NULL); 778251538Srpaulo 779287197Sglebius uvp = malloc(sizeof(struct urtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); 780251538Srpaulo vap = &uvp->vap; 781251538Srpaulo /* enable s/w bmiss handling for sta mode */ 782251538Srpaulo 783281069Srpaulo if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 784287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 785257743Shselasky /* out of memory */ 786257743Shselasky free(uvp, M_80211_VAP); 787257743Shselasky return (NULL); 788257743Shselasky } 789257743Shselasky 790290651Savos if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) 791290631Savos urtwn_init_beacon(sc, uvp); 792290631Savos 793251538Srpaulo /* override state transition machine */ 794251538Srpaulo uvp->newstate = vap->iv_newstate; 795251538Srpaulo vap->iv_newstate = urtwn_newstate; 796290631Savos vap->iv_update_beacon = urtwn_update_beacon; 797292175Savos vap->iv_key_alloc = urtwn_key_alloc; 798292175Savos vap->iv_key_set = urtwn_key_set; 799292175Savos vap->iv_key_delete = urtwn_key_delete; 800298138Sadrian 801298138Sadrian /* 802.11n parameters */ 802298138Sadrian vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; 803298175Sadrian vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K; 804298138Sadrian 805290651Savos if (opmode == IEEE80211_M_IBSS) { 806290651Savos uvp->recv_mgmt = vap->iv_recv_mgmt; 807290651Savos vap->iv_recv_mgmt = urtwn_ibss_recv_mgmt; 808290651Savos TASK_INIT(&uvp->tsf_task_adhoc, 0, urtwn_tsf_task_adhoc, vap); 809290651Savos } 810251538Srpaulo 811292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 812292167Savos ieee80211_ratectl_init(vap); 813251538Srpaulo /* complete setup */ 814251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 815287197Sglebius ieee80211_media_status, mac); 816251538Srpaulo ic->ic_opmode = opmode; 817251538Srpaulo return (vap); 818251538Srpaulo} 819251538Srpaulo 820251538Srpaulostatic void 821251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 822251538Srpaulo{ 823290651Savos struct ieee80211com *ic = vap->iv_ic; 824292167Savos struct urtwn_softc *sc = ic->ic_softc; 825251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 826251538Srpaulo 827290651Savos if (uvp->bcn_mbuf != NULL) 828290651Savos m_freem(uvp->bcn_mbuf); 829290651Savos if (vap->iv_opmode == IEEE80211_M_IBSS) 830290651Savos ieee80211_draintask(ic, &uvp->tsf_task_adhoc); 831292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 832292167Savos ieee80211_ratectl_deinit(vap); 833251538Srpaulo ieee80211_vap_detach(vap); 834251538Srpaulo free(uvp, M_80211_VAP); 835251538Srpaulo} 836251538Srpaulo 837251538Srpaulostatic struct mbuf * 838292207Savosurtwn_rx_copy_to_mbuf(struct urtwn_softc *sc, struct r92c_rx_stat *stat, 839292207Savos int totlen) 840251538Srpaulo{ 841287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 842251538Srpaulo struct mbuf *m; 843292207Savos uint32_t rxdw0; 844292207Savos int pktlen; 845251538Srpaulo 846251538Srpaulo /* 847251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 848251538Srpaulo * RUNNING. 849251538Srpaulo */ 850287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) 851251538Srpaulo return (NULL); 852251538Srpaulo 853251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 854251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 855251538Srpaulo /* 856251538Srpaulo * This should not happen since we setup our Rx filter 857251538Srpaulo * to not receive these frames. 858251538Srpaulo */ 859294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 860294471Savos "%s: RX flags error (%s)\n", __func__, 861292207Savos rxdw0 & R92C_RXDW0_CRCERR ? "CRC" : "ICV"); 862292207Savos goto fail; 863251538Srpaulo } 864292207Savos 865292207Savos pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 866292207Savos if (pktlen < sizeof(struct ieee80211_frame_ack)) { 867294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 868294471Savos "%s: frame is too short: %d\n", __func__, pktlen); 869292207Savos goto fail; 870271303Skevlo } 871251538Srpaulo 872292207Savos if (__predict_false(totlen > MCLBYTES)) { 873292207Savos /* convert to m_getjcl if this happens */ 874292207Savos device_printf(sc->sc_dev, "%s: frame too long: %d (%d)\n", 875292207Savos __func__, pktlen, totlen); 876292207Savos goto fail; 877251538Srpaulo } 878251538Srpaulo 879260463Skevlo m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 880292207Savos if (__predict_false(m == NULL)) { 881292207Savos device_printf(sc->sc_dev, "%s: could not allocate RX mbuf\n", 882292207Savos __func__); 883292207Savos goto fail; 884251538Srpaulo } 885251538Srpaulo 886251538Srpaulo /* Finalize mbuf. */ 887292207Savos memcpy(mtod(m, uint8_t *), (uint8_t *)stat, totlen); 888292207Savos m->m_pkthdr.len = m->m_len = totlen; 889292207Savos 890251538Srpaulo return (m); 891292207Savosfail: 892292207Savos counter_u64_add(ic->ic_ierrors, 1); 893292207Savos return (NULL); 894251538Srpaulo} 895251538Srpaulo 896251538Srpaulostatic struct mbuf * 897292207Savosurtwn_report_intr(struct usb_xfer *xfer, struct urtwn_data *data) 898251538Srpaulo{ 899251538Srpaulo struct urtwn_softc *sc = data->sc; 900287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 901251538Srpaulo struct r92c_rx_stat *stat; 902251538Srpaulo uint8_t *buf; 903292167Savos int len; 904251538Srpaulo 905251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 906251538Srpaulo 907251538Srpaulo if (len < sizeof(*stat)) { 908287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 909251538Srpaulo return (NULL); 910251538Srpaulo } 911251538Srpaulo 912251538Srpaulo buf = data->buf; 913292167Savos stat = (struct r92c_rx_stat *)buf; 914292167Savos 915297596Sadrian /* 916297596Sadrian * For 88E chips we can tie the FF flushing here; 917297596Sadrian * this is where we do know exactly how deep the 918297596Sadrian * transmit queue is. 919297596Sadrian * 920297596Sadrian * But it won't work for R92 chips, so we can't 921297596Sadrian * take the easy way out. 922297596Sadrian */ 923297596Sadrian 924292167Savos if (sc->chip & URTWN_CHIP_88E) { 925292167Savos int report_sel = MS(le32toh(stat->rxdw3), R88E_RXDW3_RPT); 926292167Savos 927292167Savos switch (report_sel) { 928292167Savos case R88E_RXDW3_RPT_RX: 929292207Savos return (urtwn_rxeof(sc, buf, len)); 930292167Savos case R88E_RXDW3_RPT_TX1: 931292167Savos urtwn_r88e_ratectl_tx_complete(sc, &stat[1]); 932292167Savos break; 933292167Savos default: 934294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, 935294471Savos "%s: case %d was not handled\n", __func__, 936294471Savos report_sel); 937292167Savos break; 938292167Savos } 939292167Savos } else 940292207Savos return (urtwn_rxeof(sc, buf, len)); 941292167Savos 942292167Savos return (NULL); 943292167Savos} 944292167Savos 945292167Savosstatic struct mbuf * 946292207Savosurtwn_rxeof(struct urtwn_softc *sc, uint8_t *buf, int len) 947292167Savos{ 948292167Savos struct r92c_rx_stat *stat; 949292167Savos struct mbuf *m, *m0 = NULL, *prevm = NULL; 950292167Savos uint32_t rxdw0; 951292167Savos int totlen, pktlen, infosz, npkts; 952292167Savos 953251538Srpaulo /* Get the number of encapsulated frames. */ 954251538Srpaulo stat = (struct r92c_rx_stat *)buf; 955251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 956294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 957294471Savos "%s: Rx %d frames in one chunk\n", __func__, npkts); 958251538Srpaulo 959251538Srpaulo /* Process all of them. */ 960251538Srpaulo while (npkts-- > 0) { 961251538Srpaulo if (len < sizeof(*stat)) 962251538Srpaulo break; 963251538Srpaulo stat = (struct r92c_rx_stat *)buf; 964251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 965251538Srpaulo 966251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 967251538Srpaulo if (pktlen == 0) 968251538Srpaulo break; 969251538Srpaulo 970251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 971251538Srpaulo 972251538Srpaulo /* Make sure everything fits in xfer. */ 973251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 974251538Srpaulo if (totlen > len) 975251538Srpaulo break; 976251538Srpaulo 977292207Savos m = urtwn_rx_copy_to_mbuf(sc, stat, totlen); 978251538Srpaulo if (m0 == NULL) 979251538Srpaulo m0 = m; 980251538Srpaulo if (prevm == NULL) 981251538Srpaulo prevm = m; 982251538Srpaulo else { 983251538Srpaulo prevm->m_next = m; 984251538Srpaulo prevm = m; 985251538Srpaulo } 986251538Srpaulo 987251538Srpaulo /* Next chunk is 128-byte aligned. */ 988251538Srpaulo totlen = (totlen + 127) & ~127; 989251538Srpaulo buf += totlen; 990251538Srpaulo len -= totlen; 991251538Srpaulo } 992251538Srpaulo 993251538Srpaulo return (m0); 994251538Srpaulo} 995251538Srpaulo 996251538Srpaulostatic void 997292167Savosurtwn_r88e_ratectl_tx_complete(struct urtwn_softc *sc, void *arg) 998292167Savos{ 999292167Savos struct r88e_tx_rpt_ccx *rpt = arg; 1000292167Savos struct ieee80211vap *vap; 1001292167Savos struct ieee80211_node *ni; 1002292167Savos uint8_t macid; 1003292167Savos int ntries; 1004292167Savos 1005292167Savos macid = MS(rpt->rptb1, R88E_RPTB1_MACID); 1006292167Savos ntries = MS(rpt->rptb2, R88E_RPTB2_RETRY_CNT); 1007292167Savos 1008292167Savos URTWN_NT_LOCK(sc); 1009292167Savos ni = sc->node_list[macid]; 1010292167Savos if (ni != NULL) { 1011292167Savos vap = ni->ni_vap; 1012294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: frame for macid %d was" 1013294471Savos "%s sent (%d retries)\n", __func__, macid, 1014294471Savos (rpt->rptb1 & R88E_RPTB1_PKT_OK) ? "" : " not", 1015294471Savos ntries); 1016292167Savos 1017292167Savos if (rpt->rptb1 & R88E_RPTB1_PKT_OK) { 1018292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1019292167Savos IEEE80211_RATECTL_TX_SUCCESS, &ntries, NULL); 1020292167Savos } else { 1021292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1022292167Savos IEEE80211_RATECTL_TX_FAILURE, &ntries, NULL); 1023292167Savos } 1024294471Savos } else { 1025294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: macid %d, ni is NULL\n", 1026294471Savos __func__, macid); 1027294471Savos } 1028292167Savos URTWN_NT_UNLOCK(sc); 1029292167Savos} 1030292167Savos 1031292207Savosstatic struct ieee80211_node * 1032292207Savosurtwn_rx_frame(struct urtwn_softc *sc, struct mbuf *m, int8_t *rssi_p) 1033292207Savos{ 1034292207Savos struct ieee80211com *ic = &sc->sc_ic; 1035292207Savos struct ieee80211_frame_min *wh; 1036292207Savos struct r92c_rx_stat *stat; 1037292207Savos uint32_t rxdw0, rxdw3; 1038292207Savos uint8_t rate, cipher; 1039297910Sadrian int8_t rssi = -127; 1040292207Savos int infosz; 1041292207Savos 1042292207Savos stat = mtod(m, struct r92c_rx_stat *); 1043292207Savos rxdw0 = le32toh(stat->rxdw0); 1044292207Savos rxdw3 = le32toh(stat->rxdw3); 1045292207Savos 1046292207Savos rate = MS(rxdw3, R92C_RXDW3_RATE); 1047292207Savos cipher = MS(rxdw0, R92C_RXDW0_CIPHER); 1048292207Savos infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 1049292207Savos 1050292207Savos /* Get RSSI from PHY status descriptor if present. */ 1051292207Savos if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 1052292207Savos if (sc->chip & URTWN_CHIP_88E) 1053292207Savos rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]); 1054292207Savos else 1055292207Savos rssi = urtwn_get_rssi(sc, rate, &stat[1]); 1056297910Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: rssi=%d\n", __func__, rssi); 1057292207Savos /* Update our average RSSI. */ 1058292207Savos urtwn_update_avgrssi(sc, rate, rssi); 1059292207Savos } 1060292207Savos 1061292207Savos if (ieee80211_radiotap_active(ic)) { 1062292207Savos struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 1063292207Savos 1064292207Savos tap->wr_flags = 0; 1065292207Savos 1066292207Savos urtwn_get_tsf(sc, &tap->wr_tsft); 1067292207Savos if (__predict_false(le32toh((uint32_t)tap->wr_tsft) < 1068292207Savos le32toh(stat->rxdw5))) { 1069292207Savos tap->wr_tsft = le32toh(tap->wr_tsft >> 32) - 1; 1070292207Savos tap->wr_tsft = (uint64_t)htole32(tap->wr_tsft) << 32; 1071292207Savos } else 1072292207Savos tap->wr_tsft &= 0xffffffff00000000; 1073292207Savos tap->wr_tsft += stat->rxdw5; 1074292207Savos 1075297175Sadrian /* XXX 20/40? */ 1076297175Sadrian /* XXX shortgi? */ 1077297175Sadrian 1078292207Savos /* Map HW rate index to 802.11 rate. */ 1079292207Savos if (!(rxdw3 & R92C_RXDW3_HT)) { 1080292207Savos tap->wr_rate = ridx2rate[rate]; 1081292207Savos } else if (rate >= 12) { /* MCS0~15. */ 1082292207Savos /* Bit 7 set means HT MCS instead of rate. */ 1083292207Savos tap->wr_rate = 0x80 | (rate - 12); 1084292207Savos } 1085297910Sadrian 1086297910Sadrian /* XXX TODO: this isn't right; should use the last good RSSI */ 1087292207Savos tap->wr_dbm_antsignal = rssi; 1088292207Savos tap->wr_dbm_antnoise = URTWN_NOISE_FLOOR; 1089292207Savos } 1090292207Savos 1091292207Savos *rssi_p = rssi; 1092292207Savos 1093292207Savos /* Drop descriptor. */ 1094292207Savos m_adj(m, sizeof(*stat) + infosz); 1095292207Savos wh = mtod(m, struct ieee80211_frame_min *); 1096292207Savos 1097292207Savos if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) && 1098292207Savos cipher != R92C_CAM_ALGO_NONE) { 1099292207Savos m->m_flags |= M_WEP; 1100292207Savos } 1101292207Savos 1102292207Savos if (m->m_len >= sizeof(*wh)) 1103292207Savos return (ieee80211_find_rxnode(ic, wh)); 1104292207Savos 1105292207Savos return (NULL); 1106292207Savos} 1107292207Savos 1108292167Savosstatic void 1109251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1110251538Srpaulo{ 1111251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1112287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1113251538Srpaulo struct ieee80211_node *ni; 1114251538Srpaulo struct mbuf *m = NULL, *next; 1115251538Srpaulo struct urtwn_data *data; 1116292207Savos int8_t nf, rssi; 1117251538Srpaulo 1118251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1119251538Srpaulo 1120251538Srpaulo switch (USB_GET_STATE(xfer)) { 1121251538Srpaulo case USB_ST_TRANSFERRED: 1122251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1123251538Srpaulo if (data == NULL) 1124251538Srpaulo goto tr_setup; 1125251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1126292207Savos m = urtwn_report_intr(xfer, data); 1127251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1128251538Srpaulo /* FALLTHROUGH */ 1129251538Srpaulo case USB_ST_SETUP: 1130251538Srpaulotr_setup: 1131251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 1132251538Srpaulo if (data == NULL) { 1133251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 1134297596Sadrian goto finish; 1135251538Srpaulo } 1136251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1137251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1138251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 1139251538Srpaulo usbd_xfer_max_len(xfer)); 1140251538Srpaulo usbd_transfer_submit(xfer); 1141251538Srpaulo 1142251538Srpaulo /* 1143251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 1144251538Srpaulo * ieee80211_input() because here is at the end of a USB 1145251538Srpaulo * callback and safe to unlock. 1146251538Srpaulo */ 1147251538Srpaulo while (m != NULL) { 1148251538Srpaulo next = m->m_next; 1149251538Srpaulo m->m_next = NULL; 1150292207Savos 1151292207Savos ni = urtwn_rx_frame(sc, m, &rssi); 1152297910Sadrian 1153297910Sadrian /* Store a global last-good RSSI */ 1154297910Sadrian if (rssi != -127) 1155297910Sadrian sc->last_rssi = rssi; 1156297910Sadrian 1157292207Savos URTWN_UNLOCK(sc); 1158292207Savos 1159251538Srpaulo nf = URTWN_NOISE_FLOOR; 1160251538Srpaulo if (ni != NULL) { 1161297910Sadrian if (rssi != -127) 1162297910Sadrian URTWN_NODE(ni)->last_rssi = rssi; 1163297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 1164297175Sadrian m->m_flags |= M_AMPDU; 1165297910Sadrian (void)ieee80211_input(ni, m, 1166297910Sadrian URTWN_NODE(ni)->last_rssi - nf, nf); 1167251538Srpaulo ieee80211_free_node(ni); 1168289799Savos } else { 1169297910Sadrian /* Use last good global RSSI */ 1170297910Sadrian (void)ieee80211_input_all(ic, m, 1171297910Sadrian sc->last_rssi - nf, nf); 1172289799Savos } 1173292207Savos URTWN_LOCK(sc); 1174251538Srpaulo m = next; 1175251538Srpaulo } 1176251538Srpaulo break; 1177251538Srpaulo default: 1178251538Srpaulo /* needs it to the inactive queue due to a error. */ 1179251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1180251538Srpaulo if (data != NULL) { 1181251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1182251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1183251538Srpaulo } 1184251538Srpaulo if (error != USB_ERR_CANCELLED) { 1185251538Srpaulo usbd_xfer_set_stall(xfer); 1186287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1187251538Srpaulo goto tr_setup; 1188251538Srpaulo } 1189251538Srpaulo break; 1190251538Srpaulo } 1191297596Sadrianfinish: 1192297596Sadrian /* Finished receive; age anything left on the FF queue by a little bump */ 1193297596Sadrian /* 1194297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1195297596Sadrian * flush the FF staging queue if we're approaching idle. 1196297596Sadrian */ 1197297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1198297596Sadrian URTWN_UNLOCK(sc); 1199297596Sadrian ieee80211_ff_age_all(ic, 1); 1200297596Sadrian URTWN_LOCK(sc); 1201297596Sadrian#endif 1202297596Sadrian 1203297596Sadrian /* Kick-start more transmit in case we stalled */ 1204297596Sadrian urtwn_start(sc); 1205251538Srpaulo} 1206251538Srpaulo 1207251538Srpaulostatic void 1208289891Savosurtwn_txeof(struct urtwn_softc *sc, struct urtwn_data *data, int status) 1209251538Srpaulo{ 1210251538Srpaulo 1211251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1212289891Savos 1213290631Savos if (data->ni != NULL) /* not a beacon frame */ 1214290631Savos ieee80211_tx_complete(data->ni, data->m, status); 1215289891Savos 1216297596Sadrian if (sc->sc_tx_n_active > 0) 1217297596Sadrian sc->sc_tx_n_active--; 1218297596Sadrian 1219287197Sglebius data->ni = NULL; 1220287197Sglebius data->m = NULL; 1221289891Savos 1222251538Srpaulo sc->sc_txtimer = 0; 1223289891Savos 1224289891Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1225251538Srpaulo} 1226251538Srpaulo 1227289066Skevlostatic int 1228289066Skevlourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 1229289066Skevlo int ndata, int maxsz) 1230289066Skevlo{ 1231289066Skevlo int i, error; 1232289066Skevlo 1233289066Skevlo for (i = 0; i < ndata; i++) { 1234289066Skevlo struct urtwn_data *dp = &data[i]; 1235289066Skevlo dp->sc = sc; 1236289066Skevlo dp->m = NULL; 1237289066Skevlo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1238289066Skevlo if (dp->buf == NULL) { 1239289066Skevlo device_printf(sc->sc_dev, 1240289066Skevlo "could not allocate buffer\n"); 1241289066Skevlo error = ENOMEM; 1242289066Skevlo goto fail; 1243289066Skevlo } 1244289066Skevlo dp->ni = NULL; 1245289066Skevlo } 1246289066Skevlo 1247289066Skevlo return (0); 1248289066Skevlofail: 1249289066Skevlo urtwn_free_list(sc, data, ndata); 1250289066Skevlo return (error); 1251289066Skevlo} 1252289066Skevlo 1253289066Skevlostatic int 1254289066Skevlourtwn_alloc_rx_list(struct urtwn_softc *sc) 1255289066Skevlo{ 1256289066Skevlo int error, i; 1257289066Skevlo 1258289066Skevlo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 1259289066Skevlo URTWN_RXBUFSZ); 1260289066Skevlo if (error != 0) 1261289066Skevlo return (error); 1262289066Skevlo 1263289066Skevlo STAILQ_INIT(&sc->sc_rx_active); 1264289066Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 1265289066Skevlo 1266289066Skevlo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 1267289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1268289066Skevlo 1269289066Skevlo return (0); 1270289066Skevlo} 1271289066Skevlo 1272289066Skevlostatic int 1273289066Skevlourtwn_alloc_tx_list(struct urtwn_softc *sc) 1274289066Skevlo{ 1275289066Skevlo int error, i; 1276289066Skevlo 1277289066Skevlo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 1278289066Skevlo URTWN_TXBUFSZ); 1279289066Skevlo if (error != 0) 1280289066Skevlo return (error); 1281289066Skevlo 1282289066Skevlo STAILQ_INIT(&sc->sc_tx_active); 1283289066Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 1284289066Skevlo STAILQ_INIT(&sc->sc_tx_pending); 1285289066Skevlo 1286289066Skevlo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 1287289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 1288289066Skevlo 1289289066Skevlo return (0); 1290289066Skevlo} 1291289066Skevlo 1292251538Srpaulostatic void 1293289066Skevlourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 1294289066Skevlo{ 1295289066Skevlo int i; 1296289066Skevlo 1297289066Skevlo for (i = 0; i < ndata; i++) { 1298289066Skevlo struct urtwn_data *dp = &data[i]; 1299289066Skevlo 1300289066Skevlo if (dp->buf != NULL) { 1301289066Skevlo free(dp->buf, M_USBDEV); 1302289066Skevlo dp->buf = NULL; 1303289066Skevlo } 1304289066Skevlo if (dp->ni != NULL) { 1305289066Skevlo ieee80211_free_node(dp->ni); 1306289066Skevlo dp->ni = NULL; 1307289066Skevlo } 1308289066Skevlo } 1309289066Skevlo} 1310289066Skevlo 1311289066Skevlostatic void 1312289066Skevlourtwn_free_rx_list(struct urtwn_softc *sc) 1313289066Skevlo{ 1314289066Skevlo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 1315289066Skevlo} 1316289066Skevlo 1317289066Skevlostatic void 1318289066Skevlourtwn_free_tx_list(struct urtwn_softc *sc) 1319289066Skevlo{ 1320289066Skevlo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 1321289066Skevlo} 1322289066Skevlo 1323289066Skevlostatic void 1324251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 1325251538Srpaulo{ 1326251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1327297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1328297596Sadrian struct ieee80211com *ic = &sc->sc_ic; 1329297596Sadrian#endif 1330251538Srpaulo struct urtwn_data *data; 1331251538Srpaulo 1332251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1333251538Srpaulo 1334251538Srpaulo switch (USB_GET_STATE(xfer)){ 1335251538Srpaulo case USB_ST_TRANSFERRED: 1336251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1337251538Srpaulo if (data == NULL) 1338251538Srpaulo goto tr_setup; 1339251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1340289891Savos urtwn_txeof(sc, data, 0); 1341251538Srpaulo /* FALLTHROUGH */ 1342251538Srpaulo case USB_ST_SETUP: 1343251538Srpaulotr_setup: 1344251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 1345251538Srpaulo if (data == NULL) { 1346294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1347294471Savos "%s: empty pending queue\n", __func__); 1348297596Sadrian sc->sc_tx_n_active = 0; 1349288353Sadrian goto finish; 1350251538Srpaulo } 1351251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1352251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1353251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1354251538Srpaulo usbd_transfer_submit(xfer); 1355297596Sadrian sc->sc_tx_n_active++; 1356251538Srpaulo break; 1357251538Srpaulo default: 1358251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1359251538Srpaulo if (data == NULL) 1360251538Srpaulo goto tr_setup; 1361289891Savos STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1362289891Savos urtwn_txeof(sc, data, 1); 1363251538Srpaulo if (error != USB_ERR_CANCELLED) { 1364251538Srpaulo usbd_xfer_set_stall(xfer); 1365251538Srpaulo goto tr_setup; 1366251538Srpaulo } 1367251538Srpaulo break; 1368251538Srpaulo } 1369288353Sadrianfinish: 1370297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1371297596Sadrian /* 1372297596Sadrian * If the TX active queue drops below a certain 1373297596Sadrian * threshold, ensure we age fast-frames out so they're 1374297596Sadrian * transmitted. 1375297596Sadrian */ 1376297596Sadrian if (sc->sc_tx_n_active <= 1) { 1377297596Sadrian /* XXX ew - net80211 should defer this for us! */ 1378297596Sadrian 1379297596Sadrian /* 1380297596Sadrian * Note: this sc_tx_n_active currently tracks 1381297596Sadrian * the number of pending transmit submissions 1382297596Sadrian * and not the actual depth of the TX frames 1383297596Sadrian * pending to the hardware. That means that 1384297596Sadrian * we're going to end up with some sub-optimal 1385297596Sadrian * aggregation behaviour. 1386297596Sadrian */ 1387297596Sadrian /* 1388297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1389297596Sadrian * flush the FF staging queue if we're approaching idle. 1390297596Sadrian */ 1391297596Sadrian URTWN_UNLOCK(sc); 1392297596Sadrian ieee80211_ff_flush(ic, WME_AC_VO); 1393297596Sadrian ieee80211_ff_flush(ic, WME_AC_VI); 1394297596Sadrian ieee80211_ff_flush(ic, WME_AC_BE); 1395297596Sadrian ieee80211_ff_flush(ic, WME_AC_BK); 1396297596Sadrian URTWN_LOCK(sc); 1397297596Sadrian } 1398297596Sadrian#endif 1399288353Sadrian /* Kick-start more transmit */ 1400288353Sadrian urtwn_start(sc); 1401251538Srpaulo} 1402251538Srpaulo 1403251538Srpaulostatic struct urtwn_data * 1404251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 1405251538Srpaulo{ 1406251538Srpaulo struct urtwn_data *bf; 1407251538Srpaulo 1408251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 1409251538Srpaulo if (bf != NULL) 1410251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 1411294471Savos else { 1412294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1413294471Savos "%s: out of xmit buffers\n", __func__); 1414294471Savos } 1415251538Srpaulo return (bf); 1416251538Srpaulo} 1417251538Srpaulo 1418251538Srpaulostatic struct urtwn_data * 1419251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 1420251538Srpaulo{ 1421251538Srpaulo struct urtwn_data *bf; 1422251538Srpaulo 1423251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1424251538Srpaulo 1425251538Srpaulo bf = _urtwn_getbuf(sc); 1426294471Savos if (bf == NULL) { 1427294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: stop queue\n", 1428294471Savos __func__); 1429294471Savos } 1430251538Srpaulo return (bf); 1431251538Srpaulo} 1432251538Srpaulo 1433291698Savosstatic usb_error_t 1434251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1435251538Srpaulo int len) 1436251538Srpaulo{ 1437251538Srpaulo usb_device_request_t req; 1438251538Srpaulo 1439251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1440251538Srpaulo req.bRequest = R92C_REQ_REGS; 1441251538Srpaulo USETW(req.wValue, addr); 1442251538Srpaulo USETW(req.wIndex, 0); 1443251538Srpaulo USETW(req.wLength, len); 1444251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1445251538Srpaulo} 1446251538Srpaulo 1447291698Savosstatic usb_error_t 1448251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 1449251538Srpaulo{ 1450291698Savos return (urtwn_write_region_1(sc, addr, &val, sizeof(val))); 1451251538Srpaulo} 1452251538Srpaulo 1453291698Savosstatic usb_error_t 1454251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 1455251538Srpaulo{ 1456251538Srpaulo val = htole16(val); 1457291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1458251538Srpaulo} 1459251538Srpaulo 1460291698Savosstatic usb_error_t 1461251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 1462251538Srpaulo{ 1463251538Srpaulo val = htole32(val); 1464291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1465251538Srpaulo} 1466251538Srpaulo 1467291698Savosstatic usb_error_t 1468251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1469251538Srpaulo int len) 1470251538Srpaulo{ 1471251538Srpaulo usb_device_request_t req; 1472251538Srpaulo 1473251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 1474251538Srpaulo req.bRequest = R92C_REQ_REGS; 1475251538Srpaulo USETW(req.wValue, addr); 1476251538Srpaulo USETW(req.wIndex, 0); 1477251538Srpaulo USETW(req.wLength, len); 1478251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1479251538Srpaulo} 1480251538Srpaulo 1481251538Srpaulostatic uint8_t 1482251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 1483251538Srpaulo{ 1484251538Srpaulo uint8_t val; 1485251538Srpaulo 1486251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 1487251538Srpaulo return (0xff); 1488251538Srpaulo return (val); 1489251538Srpaulo} 1490251538Srpaulo 1491251538Srpaulostatic uint16_t 1492251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 1493251538Srpaulo{ 1494251538Srpaulo uint16_t val; 1495251538Srpaulo 1496251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 1497251538Srpaulo return (0xffff); 1498251538Srpaulo return (le16toh(val)); 1499251538Srpaulo} 1500251538Srpaulo 1501251538Srpaulostatic uint32_t 1502251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 1503251538Srpaulo{ 1504251538Srpaulo uint32_t val; 1505251538Srpaulo 1506251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 1507251538Srpaulo return (0xffffffff); 1508251538Srpaulo return (le32toh(val)); 1509251538Srpaulo} 1510251538Srpaulo 1511251538Srpaulostatic int 1512251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1513251538Srpaulo{ 1514251538Srpaulo struct r92c_fw_cmd cmd; 1515291698Savos usb_error_t error; 1516251538Srpaulo int ntries; 1517251538Srpaulo 1518295871Savos if (!(sc->sc_flags & URTWN_FW_LOADED)) { 1519295871Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, "%s: firmware " 1520295871Savos "was not loaded; command (id %d) will be discarded\n", 1521295871Savos __func__, id); 1522295871Savos return (0); 1523295871Savos } 1524295871Savos 1525251538Srpaulo /* Wait for current FW box to be empty. */ 1526251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1527251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1528251538Srpaulo break; 1529266472Shselasky urtwn_ms_delay(sc); 1530251538Srpaulo } 1531251538Srpaulo if (ntries == 100) { 1532251538Srpaulo device_printf(sc->sc_dev, 1533251538Srpaulo "could not send firmware command\n"); 1534251538Srpaulo return (ETIMEDOUT); 1535251538Srpaulo } 1536251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1537251538Srpaulo cmd.id = id; 1538251538Srpaulo if (len > 3) 1539251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1540251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1541251538Srpaulo memcpy(cmd.msg, buf, len); 1542251538Srpaulo 1543251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1544291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1545251538Srpaulo (uint8_t *)&cmd + 4, 2); 1546291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1547291698Savos return (EIO); 1548291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1549251538Srpaulo (uint8_t *)&cmd + 0, 4); 1550291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1551291698Savos return (EIO); 1552251538Srpaulo 1553251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1554251538Srpaulo return (0); 1555251538Srpaulo} 1556251538Srpaulo 1557292174Savosstatic void 1558292174Savosurtwn_cmdq_cb(void *arg, int pending) 1559292174Savos{ 1560292174Savos struct urtwn_softc *sc = arg; 1561292174Savos struct urtwn_cmdq *item; 1562292174Savos 1563292174Savos /* 1564292174Savos * Device must be powered on (via urtwn_power_on()) 1565292174Savos * before any command may be sent. 1566292174Savos */ 1567292174Savos URTWN_LOCK(sc); 1568292174Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 1569292174Savos URTWN_UNLOCK(sc); 1570292174Savos return; 1571292174Savos } 1572292174Savos 1573292174Savos URTWN_CMDQ_LOCK(sc); 1574292174Savos while (sc->cmdq[sc->cmdq_first].func != NULL) { 1575292174Savos item = &sc->cmdq[sc->cmdq_first]; 1576292174Savos sc->cmdq_first = (sc->cmdq_first + 1) % URTWN_CMDQ_SIZE; 1577292174Savos URTWN_CMDQ_UNLOCK(sc); 1578292174Savos 1579292174Savos item->func(sc, &item->data); 1580292174Savos 1581292174Savos URTWN_CMDQ_LOCK(sc); 1582292174Savos memset(item, 0, sizeof (*item)); 1583292174Savos } 1584292174Savos URTWN_CMDQ_UNLOCK(sc); 1585292174Savos URTWN_UNLOCK(sc); 1586292174Savos} 1587292174Savos 1588292174Savosstatic int 1589292174Savosurtwn_cmd_sleepable(struct urtwn_softc *sc, const void *ptr, size_t len, 1590292174Savos CMD_FUNC_PROTO) 1591292174Savos{ 1592292174Savos struct ieee80211com *ic = &sc->sc_ic; 1593292174Savos 1594292174Savos KASSERT(len <= sizeof(union sec_param), ("buffer overflow")); 1595292174Savos 1596292174Savos URTWN_CMDQ_LOCK(sc); 1597292174Savos if (sc->cmdq[sc->cmdq_last].func != NULL) { 1598292174Savos device_printf(sc->sc_dev, "%s: cmdq overflow\n", __func__); 1599292174Savos URTWN_CMDQ_UNLOCK(sc); 1600292174Savos 1601292174Savos return (EAGAIN); 1602292174Savos } 1603292174Savos 1604292174Savos if (ptr != NULL) 1605292174Savos memcpy(&sc->cmdq[sc->cmdq_last].data, ptr, len); 1606292174Savos sc->cmdq[sc->cmdq_last].func = func; 1607292174Savos sc->cmdq_last = (sc->cmdq_last + 1) % URTWN_CMDQ_SIZE; 1608292174Savos URTWN_CMDQ_UNLOCK(sc); 1609292174Savos 1610292174Savos ieee80211_runtask(ic, &sc->cmdq_task); 1611292174Savos 1612292174Savos return (0); 1613292174Savos} 1614292174Savos 1615264912Skevlostatic __inline void 1616251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1617251538Srpaulo{ 1618264912Skevlo 1619264912Skevlo sc->sc_rf_write(sc, chain, addr, val); 1620264912Skevlo} 1621264912Skevlo 1622264912Skevlostatic void 1623264912Skevlourtwn_r92c_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1624264912Skevlo uint32_t val) 1625264912Skevlo{ 1626251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1627251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1628251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1629251538Srpaulo} 1630251538Srpaulo 1631264912Skevlostatic void 1632264912Skevlourtwn_r88e_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1633264912Skevlouint32_t val) 1634264912Skevlo{ 1635264912Skevlo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1636264912Skevlo SM(R88E_LSSI_PARAM_ADDR, addr) | 1637264912Skevlo SM(R92C_LSSI_PARAM_DATA, val)); 1638264912Skevlo} 1639264912Skevlo 1640251538Srpaulostatic uint32_t 1641251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1642251538Srpaulo{ 1643251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1644251538Srpaulo 1645251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1646251538Srpaulo if (chain != 0) 1647251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1648251538Srpaulo 1649251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1650251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1651266472Shselasky urtwn_ms_delay(sc); 1652251538Srpaulo 1653251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1654251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1655251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1656266472Shselasky urtwn_ms_delay(sc); 1657251538Srpaulo 1658251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1659251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1660266472Shselasky urtwn_ms_delay(sc); 1661251538Srpaulo 1662251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1663251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1664251538Srpaulo else 1665251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1666251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1667251538Srpaulo} 1668251538Srpaulo 1669251538Srpaulostatic int 1670251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1671251538Srpaulo{ 1672291698Savos usb_error_t error; 1673251538Srpaulo int ntries; 1674251538Srpaulo 1675291698Savos error = urtwn_write_4(sc, R92C_LLT_INIT, 1676251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1677251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1678251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1679291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1680291698Savos return (EIO); 1681251538Srpaulo /* Wait for write operation to complete. */ 1682251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1683251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1684251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1685251538Srpaulo return (0); 1686266472Shselasky urtwn_ms_delay(sc); 1687251538Srpaulo } 1688251538Srpaulo return (ETIMEDOUT); 1689251538Srpaulo} 1690251538Srpaulo 1691291264Savosstatic int 1692291264Savosurtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val) 1693251538Srpaulo{ 1694251538Srpaulo uint32_t reg; 1695291698Savos usb_error_t error; 1696251538Srpaulo int ntries; 1697251538Srpaulo 1698291264Savos if (sc->last_rom_addr >= URTWN_EFUSE_MAX_LEN) 1699291264Savos return (EFAULT); 1700291264Savos 1701251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1702291264Savos reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 1703251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1704291264Savos 1705291698Savos error = urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1706291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1707291698Savos return (EIO); 1708251538Srpaulo /* Wait for read operation to complete. */ 1709251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1710251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1711251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1712291264Savos break; 1713266472Shselasky urtwn_ms_delay(sc); 1714251538Srpaulo } 1715291264Savos if (ntries == 100) { 1716291264Savos device_printf(sc->sc_dev, 1717291264Savos "could not read efuse byte at address 0x%x\n", 1718291264Savos sc->last_rom_addr); 1719291264Savos return (ETIMEDOUT); 1720291264Savos } 1721291264Savos 1722291264Savos *val = MS(reg, R92C_EFUSE_CTRL_DATA); 1723291264Savos sc->last_rom_addr++; 1724291264Savos 1725291264Savos return (0); 1726251538Srpaulo} 1727251538Srpaulo 1728291264Savosstatic int 1729291264Savosurtwn_efuse_read_data(struct urtwn_softc *sc, uint8_t *rom, uint8_t off, 1730291264Savos uint8_t msk) 1731291264Savos{ 1732291264Savos uint8_t reg; 1733291264Savos int i, error; 1734291264Savos 1735291264Savos for (i = 0; i < 4; i++) { 1736291264Savos if (msk & (1 << i)) 1737291264Savos continue; 1738291264Savos error = urtwn_efuse_read_next(sc, ®); 1739291264Savos if (error != 0) 1740291264Savos return (error); 1741294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1742294471Savos off * 8 + i * 2, reg); 1743291264Savos rom[off * 8 + i * 2 + 0] = reg; 1744291264Savos 1745291264Savos error = urtwn_efuse_read_next(sc, ®); 1746291264Savos if (error != 0) 1747291264Savos return (error); 1748294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1749294471Savos off * 8 + i * 2 + 1, reg); 1750291264Savos rom[off * 8 + i * 2 + 1] = reg; 1751291264Savos } 1752291264Savos 1753291264Savos return (0); 1754291264Savos} 1755291264Savos 1756294471Savos#ifdef USB_DEBUG 1757251538Srpaulostatic void 1758291264Savosurtwn_dump_rom_contents(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1759251538Srpaulo{ 1760251538Srpaulo int i; 1761251538Srpaulo 1762291264Savos /* Dump ROM contents. */ 1763291264Savos device_printf(sc->sc_dev, "%s:", __func__); 1764291264Savos for (i = 0; i < size; i++) { 1765291264Savos if (i % 32 == 0) 1766291264Savos printf("\n%03X: ", i); 1767291264Savos else if (i % 4 == 0) 1768291264Savos printf(" "); 1769291264Savos 1770291264Savos printf("%02X", rom[i]); 1771291264Savos } 1772291264Savos printf("\n"); 1773291264Savos} 1774291264Savos#endif 1775291264Savos 1776291264Savosstatic int 1777291264Savosurtwn_efuse_read(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1778291264Savos{ 1779291264Savos#define URTWN_CHK(res) do { \ 1780291264Savos if ((error = res) != 0) \ 1781291264Savos goto end; \ 1782291264Savos} while(0) 1783291264Savos uint8_t msk, off, reg; 1784291264Savos int error; 1785291264Savos 1786291698Savos URTWN_CHK(urtwn_efuse_switch_power(sc)); 1787264912Skevlo 1788291264Savos /* Read full ROM image. */ 1789291264Savos sc->last_rom_addr = 0; 1790291264Savos memset(rom, 0xff, size); 1791291264Savos 1792291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1793291264Savos while (reg != 0xff) { 1794291264Savos /* check for extended header */ 1795291264Savos if ((sc->chip & URTWN_CHIP_88E) && (reg & 0x1f) == 0x0f) { 1796291264Savos off = reg >> 5; 1797291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1798291264Savos 1799291264Savos if ((reg & 0x0f) != 0x0f) 1800291264Savos off = ((reg & 0xf0) >> 1) | off; 1801291264Savos else 1802291264Savos continue; 1803291264Savos } else 1804291264Savos off = reg >> 4; 1805251538Srpaulo msk = reg & 0xf; 1806291264Savos 1807291264Savos URTWN_CHK(urtwn_efuse_read_data(sc, rom, off, msk)); 1808291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1809251538Srpaulo } 1810291264Savos 1811291264Savosend: 1812291264Savos 1813294471Savos#ifdef USB_DEBUG 1814294471Savos if (sc->sc_debug & URTWN_DEBUG_ROM) 1815291264Savos urtwn_dump_rom_contents(sc, rom, size); 1816251538Srpaulo#endif 1817291264Savos 1818282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); 1819291264Savos 1820291264Savos if (error != 0) { 1821291264Savos device_printf(sc->sc_dev, "%s: error while reading ROM\n", 1822291264Savos __func__); 1823291264Savos } 1824291264Savos 1825291264Savos return (error); 1826291264Savos#undef URTWN_CHK 1827282623Skevlo} 1828281592Skevlo 1829291698Savosstatic int 1830264912Skevlourtwn_efuse_switch_power(struct urtwn_softc *sc) 1831264912Skevlo{ 1832291698Savos usb_error_t error; 1833264912Skevlo uint32_t reg; 1834251538Srpaulo 1835291698Savos error = urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); 1836291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1837291698Savos return (EIO); 1838281918Skevlo 1839264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1840264912Skevlo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1841291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1842264912Skevlo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1843291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1844291698Savos return (EIO); 1845264912Skevlo } 1846264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1847264912Skevlo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1848291698Savos error = urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1849264912Skevlo reg | R92C_SYS_FUNC_EN_ELDR); 1850291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1851291698Savos return (EIO); 1852264912Skevlo } 1853264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1854264912Skevlo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1855264912Skevlo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1856291698Savos error = urtwn_write_2(sc, R92C_SYS_CLKR, 1857264912Skevlo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1858291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1859291698Savos return (EIO); 1860264912Skevlo } 1861291698Savos 1862291698Savos return (0); 1863264912Skevlo} 1864264912Skevlo 1865251538Srpaulostatic int 1866251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1867251538Srpaulo{ 1868251538Srpaulo uint32_t reg; 1869251538Srpaulo 1870264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1871264912Skevlo return (0); 1872264912Skevlo 1873251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1874251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1875251538Srpaulo return (EIO); 1876251538Srpaulo 1877251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1878251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1879251538Srpaulo /* Check if it is a castrated 8192C. */ 1880251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1881251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1882251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1883251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1884251538Srpaulo } 1885251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1886251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1887251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1888251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1889251538Srpaulo } 1890251538Srpaulo return (0); 1891251538Srpaulo} 1892251538Srpaulo 1893291264Savosstatic int 1894251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1895251538Srpaulo{ 1896291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 1897291264Savos int error; 1898251538Srpaulo 1899251538Srpaulo /* Read full ROM image. */ 1900291264Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(*rom)); 1901291264Savos if (error != 0) 1902291264Savos return (error); 1903251538Srpaulo 1904251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1905291264Savos sc->last_rom_addr = 0x1fa; 1906291264Savos error = urtwn_efuse_read_next(sc, &sc->pa_setting); 1907291264Savos if (error != 0) 1908291264Savos return (error); 1909294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: PA setting=0x%x\n", __func__, 1910294471Savos sc->pa_setting); 1911251538Srpaulo 1912251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1913251538Srpaulo 1914251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1915294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type=%d\n", 1916294471Savos __func__, sc->regulatory); 1917287197Sglebius IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1918251538Srpaulo 1919264912Skevlo sc->sc_rf_write = urtwn_r92c_rf_write; 1920264912Skevlo sc->sc_power_on = urtwn_r92c_power_on; 1921295874Savos sc->sc_power_off = urtwn_r92c_power_off; 1922291264Savos 1923291264Savos return (0); 1924251538Srpaulo} 1925251538Srpaulo 1926291264Savosstatic int 1927264912Skevlourtwn_r88e_read_rom(struct urtwn_softc *sc) 1928264912Skevlo{ 1929294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 1930294198Savos int error; 1931264912Skevlo 1932294198Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(sc->rom.r88e_rom)); 1933291264Savos if (error != 0) 1934291264Savos return (error); 1935264912Skevlo 1936294198Savos sc->bw20_tx_pwr_diff = (rom->tx_pwr_diff >> 4); 1937264912Skevlo if (sc->bw20_tx_pwr_diff & 0x08) 1938264912Skevlo sc->bw20_tx_pwr_diff |= 0xf0; 1939294198Savos sc->ofdm_tx_pwr_diff = (rom->tx_pwr_diff & 0xf); 1940264912Skevlo if (sc->ofdm_tx_pwr_diff & 0x08) 1941264912Skevlo sc->ofdm_tx_pwr_diff |= 0xf0; 1942294198Savos sc->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY); 1943294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type %d\n", 1944294471Savos __func__,sc->regulatory); 1945294198Savos IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1946264912Skevlo 1947264912Skevlo sc->sc_rf_write = urtwn_r88e_rf_write; 1948264912Skevlo sc->sc_power_on = urtwn_r88e_power_on; 1949295874Savos sc->sc_power_off = urtwn_r88e_power_off; 1950291264Savos 1951291264Savos return (0); 1952264912Skevlo} 1953264912Skevlo 1954298436Savosstatic __inline uint8_t 1955298436Savosrate2ridx(uint8_t rate) 1956298436Savos{ 1957298436Savos if (rate & IEEE80211_RATE_MCS) { 1958298436Savos /* 11n rates start at idx 12 */ 1959298436Savos return ((rate & 0xf) + 12); 1960298436Savos } 1961298436Savos switch (rate) { 1962298436Savos /* 11g */ 1963298436Savos case 12: return 4; 1964298436Savos case 18: return 5; 1965298436Savos case 24: return 6; 1966298436Savos case 36: return 7; 1967298436Savos case 48: return 8; 1968298436Savos case 72: return 9; 1969298436Savos case 96: return 10; 1970298436Savos case 108: return 11; 1971298436Savos /* 11b */ 1972298436Savos case 2: return 0; 1973298436Savos case 4: return 1; 1974298436Savos case 11: return 2; 1975298436Savos case 22: return 3; 1976298436Savos default: return URTWN_RIDX_UNKNOWN; 1977298436Savos } 1978298436Savos} 1979298436Savos 1980251538Srpaulo/* 1981251538Srpaulo * Initialize rate adaptation in firmware. 1982251538Srpaulo */ 1983251538Srpaulostatic int 1984251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 1985251538Srpaulo{ 1986287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1987251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1988251538Srpaulo struct ieee80211_node *ni; 1989297175Sadrian struct ieee80211_rateset *rs, *rs_ht; 1990251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 1991251538Srpaulo uint32_t rates, basicrates; 1992298436Savos uint8_t mode, ridx; 1993298436Savos int maxrate, maxbasicrate, error, i; 1994251538Srpaulo 1995251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1996251538Srpaulo rs = &ni->ni_rates; 1997297175Sadrian rs_ht = (struct ieee80211_rateset *) &ni->ni_htrates; 1998251538Srpaulo 1999251538Srpaulo /* Get normal and basic rates mask. */ 2000251538Srpaulo rates = basicrates = 0; 2001251538Srpaulo maxrate = maxbasicrate = 0; 2002297175Sadrian 2003297175Sadrian /* This is for 11bg */ 2004251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 2005251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 2006298436Savos ridx = rate2ridx(IEEE80211_RV(rs->rs_rates[i])); 2007298436Savos if (ridx == URTWN_RIDX_UNKNOWN) /* Unknown rate, skip. */ 2008251538Srpaulo continue; 2009298436Savos rates |= 1 << ridx; 2010298436Savos if (ridx > maxrate) 2011298436Savos maxrate = ridx; 2012251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 2013298436Savos basicrates |= 1 << ridx; 2014298436Savos if (ridx > maxbasicrate) 2015298436Savos maxbasicrate = ridx; 2016251538Srpaulo } 2017251538Srpaulo } 2018297175Sadrian 2019297175Sadrian /* If we're doing 11n, enable 11n rates */ 2020297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) { 2021297175Sadrian for (i = 0; i < rs_ht->rs_nrates; i++) { 2022297175Sadrian if ((rs_ht->rs_rates[i] & 0x7f) > 0xf) 2023297175Sadrian continue; 2024297175Sadrian /* 11n rates start at index 12 */ 2025298436Savos ridx = ((rs_ht->rs_rates[i]) & 0xf) + 12; 2026298436Savos rates |= (1 << ridx); 2027297175Sadrian 2028297175Sadrian /* Guard against the rate table being oddly ordered */ 2029298436Savos if (ridx > maxrate) 2030298436Savos maxrate = ridx; 2031297175Sadrian } 2032297175Sadrian } 2033297175Sadrian 2034297175Sadrian#if 0 2035297175Sadrian if (ic->ic_curmode == IEEE80211_MODE_11NG) 2036297175Sadrian raid = R92C_RAID_11GN; 2037297175Sadrian#endif 2038297175Sadrian /* NB: group addressed frames are done at 11bg rates for now */ 2039251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2040251538Srpaulo mode = R92C_RAID_11B; 2041251538Srpaulo else 2042251538Srpaulo mode = R92C_RAID_11BG; 2043297175Sadrian /* XXX misleading 'mode' value here for unicast frames */ 2044294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, 2045294471Savos "%s: mode 0x%x, rates 0x%08x, basicrates 0x%08x\n", __func__, 2046251538Srpaulo mode, rates, basicrates); 2047251538Srpaulo 2048251538Srpaulo /* Set rates mask for group addressed frames. */ 2049251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 2050251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 2051251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2052251538Srpaulo if (error != 0) { 2053252401Srpaulo ieee80211_free_node(ni); 2054251538Srpaulo device_printf(sc->sc_dev, 2055251538Srpaulo "could not add broadcast station\n"); 2056251538Srpaulo return (error); 2057251538Srpaulo } 2058297175Sadrian 2059251538Srpaulo /* Set initial MRR rate. */ 2060294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxbasicrate %d\n", __func__, 2061294471Savos maxbasicrate); 2062251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 2063251538Srpaulo maxbasicrate); 2064251538Srpaulo 2065251538Srpaulo /* Set rates mask for unicast frames. */ 2066297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2067297175Sadrian mode = R92C_RAID_11GN; 2068297175Sadrian else if (ic->ic_curmode == IEEE80211_MODE_11B) 2069297175Sadrian mode = R92C_RAID_11B; 2070297175Sadrian else 2071297175Sadrian mode = R92C_RAID_11BG; 2072251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 2073251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 2074251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2075251538Srpaulo if (error != 0) { 2076252401Srpaulo ieee80211_free_node(ni); 2077251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 2078251538Srpaulo return (error); 2079251538Srpaulo } 2080251538Srpaulo /* Set initial MRR rate. */ 2081294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxrate %d\n", __func__, 2082294471Savos maxrate); 2083251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 2084251538Srpaulo maxrate); 2085251538Srpaulo 2086251538Srpaulo /* Indicate highest supported rate. */ 2087297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2088297175Sadrian ni->ni_txrate = rs_ht->rs_rates[rs_ht->rs_nrates - 1] 2089297175Sadrian | IEEE80211_RATE_MCS; 2090297175Sadrian else 2091297175Sadrian ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 2092252401Srpaulo ieee80211_free_node(ni); 2093252401Srpaulo 2094251538Srpaulo return (0); 2095251538Srpaulo} 2096251538Srpaulo 2097290439Savosstatic void 2098290631Savosurtwn_init_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2099251538Srpaulo{ 2100290631Savos struct r92c_tx_desc *txd = &uvp->bcn_desc; 2101290631Savos 2102290631Savos txd->txdw0 = htole32( 2103290631Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | R92C_TXDW0_BMCAST | 2104290631Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2105290631Savos txd->txdw1 = htole32( 2106290631Savos SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) | 2107290631Savos SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 2108290631Savos 2109291858Savos if (sc->chip & URTWN_CHIP_88E) { 2110290631Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 2111291858Savos txd->txdseq |= htole16(R88E_TXDSEQ_HWSEQ_EN); 2112291858Savos } else { 2113290631Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 2114291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2115291858Savos } 2116290631Savos 2117290631Savos txd->txdw4 = htole32(R92C_TXDW4_DRVRATE); 2118290631Savos txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE, URTWN_RIDX_CCK1)); 2119251538Srpaulo} 2120251538Srpaulo 2121290631Savosstatic int 2122290631Savosurtwn_setup_beacon(struct urtwn_softc *sc, struct ieee80211_node *ni) 2123290631Savos{ 2124290631Savos struct ieee80211vap *vap = ni->ni_vap; 2125290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2126290631Savos struct mbuf *m; 2127290631Savos int error; 2128290631Savos 2129290631Savos URTWN_ASSERT_LOCKED(sc); 2130290631Savos 2131290631Savos if (ni->ni_chan == IEEE80211_CHAN_ANYC) 2132290631Savos return (EINVAL); 2133290631Savos 2134290631Savos m = ieee80211_beacon_alloc(ni); 2135290631Savos if (m == NULL) { 2136290631Savos device_printf(sc->sc_dev, 2137290631Savos "%s: could not allocate beacon frame\n", __func__); 2138290631Savos return (ENOMEM); 2139290631Savos } 2140290631Savos 2141290631Savos if (uvp->bcn_mbuf != NULL) 2142290631Savos m_freem(uvp->bcn_mbuf); 2143290631Savos 2144290631Savos uvp->bcn_mbuf = m; 2145290631Savos 2146290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2147290631Savos return (error); 2148290631Savos 2149290631Savos /* XXX bcnq stuck workaround */ 2150290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2151290631Savos return (error); 2152290631Savos 2153294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_BEACON, "%s: beacon was %srecognized\n", 2154294471Savos __func__, urtwn_read_1(sc, R92C_TDECTRL + 2) & 2155294471Savos (R92C_TDECTRL_BCN_VALID >> 16) ? "" : "not "); 2156294471Savos 2157290631Savos return (0); 2158290631Savos} 2159290631Savos 2160251538Srpaulostatic void 2161290631Savosurtwn_update_beacon(struct ieee80211vap *vap, int item) 2162290631Savos{ 2163290631Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2164290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2165290631Savos struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 2166290631Savos struct ieee80211_node *ni = vap->iv_bss; 2167290631Savos int mcast = 0; 2168290631Savos 2169290631Savos URTWN_LOCK(sc); 2170290631Savos if (uvp->bcn_mbuf == NULL) { 2171290631Savos uvp->bcn_mbuf = ieee80211_beacon_alloc(ni); 2172290631Savos if (uvp->bcn_mbuf == NULL) { 2173290631Savos device_printf(sc->sc_dev, 2174290631Savos "%s: could not allocate beacon frame\n", __func__); 2175290631Savos URTWN_UNLOCK(sc); 2176290631Savos return; 2177290631Savos } 2178290631Savos } 2179290631Savos URTWN_UNLOCK(sc); 2180290631Savos 2181290631Savos if (item == IEEE80211_BEACON_TIM) 2182290631Savos mcast = 1; /* XXX */ 2183290631Savos 2184290631Savos setbit(bo->bo_flags, item); 2185290631Savos ieee80211_beacon_update(ni, uvp->bcn_mbuf, mcast); 2186290631Savos 2187290631Savos URTWN_LOCK(sc); 2188290631Savos urtwn_tx_beacon(sc, uvp); 2189290631Savos URTWN_UNLOCK(sc); 2190290631Savos} 2191290631Savos 2192290631Savos/* 2193290631Savos * Push a beacon frame into the chip. Beacon will 2194290631Savos * be repeated by the chip every R92C_BCN_INTERVAL. 2195290631Savos */ 2196290631Savosstatic int 2197290631Savosurtwn_tx_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2198290631Savos{ 2199290631Savos struct r92c_tx_desc *desc = &uvp->bcn_desc; 2200290631Savos struct urtwn_data *bf; 2201290631Savos 2202290631Savos URTWN_ASSERT_LOCKED(sc); 2203290631Savos 2204290631Savos bf = urtwn_getbuf(sc); 2205290631Savos if (bf == NULL) 2206290631Savos return (ENOMEM); 2207290631Savos 2208290631Savos memcpy(bf->buf, desc, sizeof(*desc)); 2209290631Savos urtwn_tx_start(sc, uvp->bcn_mbuf, IEEE80211_FC0_TYPE_MGT, bf); 2210290631Savos 2211290631Savos sc->sc_txtimer = 5; 2212290631Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2213290631Savos 2214290631Savos return (0); 2215290631Savos} 2216290631Savos 2217292175Savosstatic int 2218292175Savosurtwn_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k, 2219292175Savos ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix) 2220292175Savos{ 2221292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2222292175Savos uint8_t i; 2223292175Savos 2224292175Savos if (!(&vap->iv_nw_keys[0] <= k && 2225292175Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) { 2226292175Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 2227292175Savos URTWN_LOCK(sc); 2228292175Savos /* 2229292175Savos * First 4 slots for group keys, 2230292175Savos * what is left - for pairwise. 2231292175Savos * XXX incompatible with IBSS RSN. 2232292175Savos */ 2233292175Savos for (i = IEEE80211_WEP_NKID; 2234292175Savos i < R92C_CAM_ENTRY_COUNT; i++) { 2235292175Savos if ((sc->keys_bmap & (1 << i)) == 0) { 2236292175Savos sc->keys_bmap |= 1 << i; 2237292175Savos *keyix = i; 2238292175Savos break; 2239292175Savos } 2240292175Savos } 2241292175Savos URTWN_UNLOCK(sc); 2242292175Savos if (i == R92C_CAM_ENTRY_COUNT) { 2243292175Savos device_printf(sc->sc_dev, 2244292175Savos "%s: no free space in the key table\n", 2245292175Savos __func__); 2246292175Savos return 0; 2247292175Savos } 2248292175Savos } else 2249292175Savos *keyix = 0; 2250292175Savos } else { 2251292175Savos *keyix = k - vap->iv_nw_keys; 2252292175Savos } 2253292175Savos *rxkeyix = *keyix; 2254292175Savos return 1; 2255292175Savos} 2256292175Savos 2257290631Savosstatic void 2258292175Savosurtwn_key_set_cb(struct urtwn_softc *sc, union sec_param *data) 2259292175Savos{ 2260292175Savos struct ieee80211_key *k = &data->key; 2261292175Savos uint8_t algo, keyid; 2262292175Savos int i, error; 2263292175Savos 2264292175Savos if (k->wk_keyix < IEEE80211_WEP_NKID) 2265292175Savos keyid = k->wk_keyix; 2266292175Savos else 2267292175Savos keyid = 0; 2268292175Savos 2269292175Savos /* Map net80211 cipher to HW crypto algorithm. */ 2270292175Savos switch (k->wk_cipher->ic_cipher) { 2271292175Savos case IEEE80211_CIPHER_WEP: 2272292175Savos if (k->wk_keylen < 8) 2273292175Savos algo = R92C_CAM_ALGO_WEP40; 2274292175Savos else 2275292175Savos algo = R92C_CAM_ALGO_WEP104; 2276292175Savos break; 2277292175Savos case IEEE80211_CIPHER_TKIP: 2278292175Savos algo = R92C_CAM_ALGO_TKIP; 2279292175Savos break; 2280292175Savos case IEEE80211_CIPHER_AES_CCM: 2281292175Savos algo = R92C_CAM_ALGO_AES; 2282292175Savos break; 2283292175Savos default: 2284292175Savos device_printf(sc->sc_dev, "%s: undefined cipher %d\n", 2285292175Savos __func__, k->wk_cipher->ic_cipher); 2286292175Savos return; 2287292175Savos } 2288292175Savos 2289294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2290294471Savos "%s: keyix %d, keyid %d, algo %d/%d, flags %04X, len %d, " 2291294471Savos "macaddr %s\n", __func__, k->wk_keyix, keyid, 2292294471Savos k->wk_cipher->ic_cipher, algo, k->wk_flags, k->wk_keylen, 2293294471Savos ether_sprintf(k->wk_macaddr)); 2294292175Savos 2295292175Savos /* Write key. */ 2296292175Savos for (i = 0; i < 4; i++) { 2297292175Savos error = urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 2298298359Savos le32dec(&k->wk_key[i * 4])); 2299292175Savos if (error != 0) 2300292175Savos goto fail; 2301292175Savos } 2302292175Savos 2303292175Savos /* Write CTL0 last since that will validate the CAM entry. */ 2304292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 2305298359Savos le32dec(&k->wk_macaddr[2])); 2306292175Savos if (error != 0) 2307292175Savos goto fail; 2308292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 2309292175Savos SM(R92C_CAM_ALGO, algo) | 2310292175Savos SM(R92C_CAM_KEYID, keyid) | 2311298359Savos SM(R92C_CAM_MACLO, le16dec(&k->wk_macaddr[0])) | 2312292175Savos R92C_CAM_VALID); 2313292175Savos if (error != 0) 2314292175Savos goto fail; 2315292175Savos 2316292175Savos return; 2317292175Savos 2318292175Savosfail: 2319292175Savos device_printf(sc->sc_dev, "%s fails, error %d\n", __func__, error); 2320292175Savos} 2321292175Savos 2322292175Savosstatic void 2323292175Savosurtwn_key_del_cb(struct urtwn_softc *sc, union sec_param *data) 2324292175Savos{ 2325292175Savos struct ieee80211_key *k = &data->key; 2326292175Savos int i; 2327292175Savos 2328294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2329294471Savos "%s: keyix %d, flags %04X, macaddr %s\n", __func__, 2330292175Savos k->wk_keyix, k->wk_flags, ether_sprintf(k->wk_macaddr)); 2331292175Savos 2332292175Savos urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 0); 2333292175Savos urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 0); 2334292175Savos 2335292175Savos /* Clear key. */ 2336292175Savos for (i = 0; i < 4; i++) 2337292175Savos urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 0); 2338292175Savos sc->keys_bmap &= ~(1 << k->wk_keyix); 2339292175Savos} 2340292175Savos 2341292175Savosstatic int 2342292175Savosurtwn_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k) 2343292175Savos{ 2344292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2345301762Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2346292175Savos 2347292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2348292175Savos /* Not for us. */ 2349292175Savos return (1); 2350292175Savos } 2351292175Savos 2352301762Savos if (&vap->iv_nw_keys[0] <= k && 2353301762Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID]) { 2354301762Savos URTWN_LOCK(sc); 2355301762Savos uvp->keys[k->wk_keyix] = k; 2356301762Savos if ((sc->sc_flags & URTWN_RUNNING) == 0) { 2357301762Savos /* 2358301762Savos * The device was not started; 2359301762Savos * the key will be installed later. 2360301762Savos */ 2361301762Savos URTWN_UNLOCK(sc); 2362301762Savos return (1); 2363301762Savos } 2364301762Savos URTWN_UNLOCK(sc); 2365301762Savos } 2366301762Savos 2367292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_set_cb)); 2368292175Savos} 2369292175Savos 2370292175Savosstatic int 2371292175Savosurtwn_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k) 2372292175Savos{ 2373292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2374301762Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2375292175Savos 2376292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2377292175Savos /* Not for us. */ 2378292175Savos return (1); 2379292175Savos } 2380292175Savos 2381301762Savos if (&vap->iv_nw_keys[0] <= k && 2382301762Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID]) { 2383301762Savos URTWN_LOCK(sc); 2384301762Savos uvp->keys[k->wk_keyix] = NULL; 2385301762Savos if ((sc->sc_flags & URTWN_RUNNING) == 0) { 2386301762Savos /* All keys are removed on device reset. */ 2387301762Savos URTWN_UNLOCK(sc); 2388301762Savos return (1); 2389301762Savos } 2390301762Savos URTWN_UNLOCK(sc); 2391301762Savos } 2392301762Savos 2393292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_del_cb)); 2394292175Savos} 2395292175Savos 2396292175Savosstatic void 2397290651Savosurtwn_tsf_task_adhoc(void *arg, int pending) 2398290651Savos{ 2399290651Savos struct ieee80211vap *vap = arg; 2400290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2401290651Savos struct ieee80211_node *ni; 2402290651Savos uint32_t reg; 2403290651Savos 2404290651Savos URTWN_LOCK(sc); 2405290651Savos ni = ieee80211_ref_node(vap->iv_bss); 2406290651Savos reg = urtwn_read_1(sc, R92C_BCN_CTRL); 2407290651Savos 2408290651Savos /* Accept beacons with the same BSSID. */ 2409290651Savos urtwn_set_rx_bssid_all(sc, 0); 2410290651Savos 2411290651Savos /* Enable synchronization. */ 2412290651Savos reg &= ~R92C_BCN_CTRL_DIS_TSF_UDT0; 2413290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2414290651Savos 2415290651Savos /* Synchronize. */ 2416290651Savos usb_pause_mtx(&sc->sc_mtx, hz * ni->ni_intval * 5 / 1000); 2417290651Savos 2418290651Savos /* Disable synchronization. */ 2419290651Savos reg |= R92C_BCN_CTRL_DIS_TSF_UDT0; 2420290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2421290651Savos 2422290651Savos /* Remove beacon filter. */ 2423290651Savos urtwn_set_rx_bssid_all(sc, 1); 2424290651Savos 2425290651Savos /* Enable beaconing. */ 2426290651Savos urtwn_write_1(sc, R92C_MBID_NUM, 2427290651Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2428290651Savos reg |= R92C_BCN_CTRL_EN_BCN; 2429290651Savos 2430290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2431290651Savos ieee80211_free_node(ni); 2432290651Savos URTWN_UNLOCK(sc); 2433290651Savos} 2434290651Savos 2435290651Savosstatic void 2436290631Savosurtwn_tsf_sync_enable(struct urtwn_softc *sc, struct ieee80211vap *vap) 2437290631Savos{ 2438290651Savos struct ieee80211com *ic = &sc->sc_ic; 2439290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2440290651Savos 2441290631Savos /* Reset TSF. */ 2442290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2443290631Savos 2444290631Savos switch (vap->iv_opmode) { 2445290631Savos case IEEE80211_M_STA: 2446290631Savos /* Enable TSF synchronization. */ 2447290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2448290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) & 2449290631Savos ~R92C_BCN_CTRL_DIS_TSF_UDT0); 2450290631Savos break; 2451290651Savos case IEEE80211_M_IBSS: 2452290651Savos ieee80211_runtask(ic, &uvp->tsf_task_adhoc); 2453290651Savos break; 2454290631Savos case IEEE80211_M_HOSTAP: 2455290631Savos /* Enable beaconing. */ 2456290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2457290631Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2458290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2459290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 2460290631Savos break; 2461290631Savos default: 2462290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2463290631Savos vap->iv_opmode); 2464290631Savos return; 2465290631Savos } 2466290631Savos} 2467290631Savos 2468290631Savosstatic void 2469292203Savosurtwn_get_tsf(struct urtwn_softc *sc, uint64_t *buf) 2470292203Savos{ 2471292203Savos urtwn_read_region_1(sc, R92C_TSFTR, (uint8_t *)buf, sizeof(*buf)); 2472292203Savos} 2473292203Savos 2474292203Savosstatic void 2475251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 2476251538Srpaulo{ 2477251538Srpaulo uint8_t reg; 2478281069Srpaulo 2479251538Srpaulo if (led == URTWN_LED_LINK) { 2480264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 2481264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 2482264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, reg | 0x60); 2483264912Skevlo if (!on) { 2484264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0x90; 2485264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, 2486264912Skevlo reg | R92C_LEDCFG0_DIS); 2487264912Skevlo urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 2488264912Skevlo urtwn_read_1(sc, R92C_MAC_PINMUX_CFG) & 2489264912Skevlo 0xfe); 2490264912Skevlo } 2491264912Skevlo } else { 2492264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 2493264912Skevlo if (!on) 2494264912Skevlo reg |= R92C_LEDCFG0_DIS; 2495264912Skevlo urtwn_write_1(sc, R92C_LEDCFG0, reg); 2496264912Skevlo } 2497264912Skevlo sc->ledlink = on; /* Save LED state. */ 2498251538Srpaulo } 2499251538Srpaulo} 2500251538Srpaulo 2501289811Savosstatic void 2502289811Savosurtwn_set_mode(struct urtwn_softc *sc, uint8_t mode) 2503289811Savos{ 2504289811Savos uint8_t reg; 2505289811Savos 2506289811Savos reg = urtwn_read_1(sc, R92C_MSR); 2507289811Savos reg = (reg & ~R92C_MSR_MASK) | mode; 2508289811Savos urtwn_write_1(sc, R92C_MSR, reg); 2509289811Savos} 2510289811Savos 2511290651Savosstatic void 2512290651Savosurtwn_ibss_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 2513290651Savos const struct ieee80211_rx_stats *rxs, 2514290651Savos int rssi, int nf) 2515290651Savos{ 2516290651Savos struct ieee80211vap *vap = ni->ni_vap; 2517290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2518290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2519290651Savos uint64_t ni_tstamp, curr_tstamp; 2520290651Savos 2521290651Savos uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 2522290651Savos 2523290651Savos if (vap->iv_state == IEEE80211_S_RUN && 2524290651Savos (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 2525290651Savos subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 2526290651Savos ni_tstamp = le64toh(ni->ni_tstamp.tsf); 2527290651Savos URTWN_LOCK(sc); 2528290651Savos urtwn_get_tsf(sc, &curr_tstamp); 2529290651Savos URTWN_UNLOCK(sc); 2530290651Savos curr_tstamp = le64toh(curr_tstamp); 2531290651Savos 2532290651Savos if (ni_tstamp >= curr_tstamp) 2533290651Savos (void) ieee80211_ibss_merge(ni); 2534290651Savos } 2535290651Savos} 2536290651Savos 2537251538Srpaulostatic int 2538251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 2539251538Srpaulo{ 2540251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 2541251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 2542286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2543251538Srpaulo struct ieee80211_node *ni; 2544251538Srpaulo enum ieee80211_state ostate; 2545290631Savos uint32_t reg; 2546290631Savos uint8_t mode; 2547290631Savos int error = 0; 2548251538Srpaulo 2549251538Srpaulo ostate = vap->iv_state; 2550294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_STATE, "%s -> %s\n", 2551294471Savos ieee80211_state_name[ostate], ieee80211_state_name[nstate]); 2552251538Srpaulo 2553251538Srpaulo IEEE80211_UNLOCK(ic); 2554251538Srpaulo URTWN_LOCK(sc); 2555251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 2556251538Srpaulo 2557251538Srpaulo if (ostate == IEEE80211_S_RUN) { 2558294473Savos /* Stop calibration. */ 2559294473Savos callout_stop(&sc->sc_calib_to); 2560294473Savos 2561251538Srpaulo /* Turn link LED off. */ 2562251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2563251538Srpaulo 2564251538Srpaulo /* Set media status to 'No Link'. */ 2565289811Savos urtwn_set_mode(sc, R92C_MSR_NOLINK); 2566251538Srpaulo 2567251538Srpaulo /* Stop Rx of data frames. */ 2568251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 2569251538Srpaulo 2570251538Srpaulo /* Disable TSF synchronization. */ 2571251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 2572290631Savos (urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN) | 2573251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 2574251538Srpaulo 2575290631Savos /* Disable beaconing. */ 2576290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2577290631Savos urtwn_read_1(sc, R92C_MBID_NUM) & ~R92C_MBID_TXBCN_RPT0); 2578290631Savos 2579290631Savos /* Reset TSF. */ 2580290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2581290631Savos 2582251538Srpaulo /* Reset EDCA parameters. */ 2583251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 2584251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 2585251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 2586251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 2587251538Srpaulo } 2588251538Srpaulo 2589251538Srpaulo switch (nstate) { 2590251538Srpaulo case IEEE80211_S_INIT: 2591251538Srpaulo /* Turn link LED off. */ 2592251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2593251538Srpaulo break; 2594251538Srpaulo case IEEE80211_S_SCAN: 2595251538Srpaulo /* Pause AC Tx queues. */ 2596251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 2597293180Savos urtwn_read_1(sc, R92C_TXPAUSE) | R92C_TX_QUEUE_AC); 2598251538Srpaulo break; 2599251538Srpaulo case IEEE80211_S_AUTH: 2600251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 2601251538Srpaulo break; 2602251538Srpaulo case IEEE80211_S_RUN: 2603251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 2604251538Srpaulo /* Turn link LED on. */ 2605251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2606251538Srpaulo break; 2607251538Srpaulo } 2608251538Srpaulo 2609251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 2610290631Savos 2611290631Savos if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || 2612290631Savos ni->ni_chan == IEEE80211_CHAN_ANYC) { 2613290631Savos device_printf(sc->sc_dev, 2614290631Savos "%s: could not move to RUN state\n", __func__); 2615290631Savos error = EINVAL; 2616290631Savos goto end_run; 2617290631Savos } 2618290631Savos 2619290631Savos switch (vap->iv_opmode) { 2620290631Savos case IEEE80211_M_STA: 2621290631Savos mode = R92C_MSR_INFRA; 2622290631Savos break; 2623290651Savos case IEEE80211_M_IBSS: 2624290651Savos mode = R92C_MSR_ADHOC; 2625290651Savos break; 2626290631Savos case IEEE80211_M_HOSTAP: 2627290631Savos mode = R92C_MSR_AP; 2628290631Savos break; 2629290631Savos default: 2630290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2631290631Savos vap->iv_opmode); 2632290631Savos error = EINVAL; 2633290631Savos goto end_run; 2634290631Savos } 2635290631Savos 2636251538Srpaulo /* Set media status to 'Associated'. */ 2637290631Savos urtwn_set_mode(sc, mode); 2638251538Srpaulo 2639251538Srpaulo /* Set BSSID. */ 2640298359Savos urtwn_write_4(sc, R92C_BSSID + 0, le32dec(&ni->ni_bssid[0])); 2641298359Savos urtwn_write_4(sc, R92C_BSSID + 4, le16dec(&ni->ni_bssid[4])); 2642251538Srpaulo 2643251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2644251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 2645251538Srpaulo else /* 802.11b/g */ 2646251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 2647251538Srpaulo 2648251538Srpaulo /* Enable Rx of data frames. */ 2649251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 2650251538Srpaulo 2651251538Srpaulo /* Flush all AC queues. */ 2652251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 2653251538Srpaulo 2654251538Srpaulo /* Set beacon interval. */ 2655251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 2656251538Srpaulo 2657251538Srpaulo /* Allow Rx from our BSSID only. */ 2658290564Savos if (ic->ic_promisc == 0) { 2659290631Savos reg = urtwn_read_4(sc, R92C_RCR); 2660290631Savos 2661301128Savos if (vap->iv_opmode != IEEE80211_M_HOSTAP) { 2662290631Savos reg |= R92C_RCR_CBSSID_DATA; 2663301128Savos if (vap->iv_opmode != IEEE80211_M_IBSS) 2664301128Savos reg |= R92C_RCR_CBSSID_BCN; 2665301128Savos } 2666290631Savos 2667290631Savos urtwn_write_4(sc, R92C_RCR, reg); 2668290564Savos } 2669251538Srpaulo 2670290651Savos if (vap->iv_opmode == IEEE80211_M_HOSTAP || 2671290651Savos vap->iv_opmode == IEEE80211_M_IBSS) { 2672290631Savos error = urtwn_setup_beacon(sc, ni); 2673290631Savos if (error != 0) { 2674290631Savos device_printf(sc->sc_dev, 2675290631Savos "unable to push beacon into the chip, " 2676290631Savos "error %d\n", error); 2677290631Savos goto end_run; 2678290631Savos } 2679290631Savos } 2680290631Savos 2681251538Srpaulo /* Enable TSF synchronization. */ 2682290631Savos urtwn_tsf_sync_enable(sc, vap); 2683251538Srpaulo 2684251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 2685251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 2686251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 2687251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 2688251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 2689251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 2690251538Srpaulo 2691251538Srpaulo /* Intialize rate adaptation. */ 2692292167Savos if (!(sc->chip & URTWN_CHIP_88E)) 2693264912Skevlo urtwn_ra_init(sc); 2694251538Srpaulo /* Turn link LED on. */ 2695251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2696251538Srpaulo 2697251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 2698251538Srpaulo /* Reset temperature calibration state machine. */ 2699294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 2700251538Srpaulo sc->thcal_lctemp = 0; 2701294473Savos /* Start periodic calibration. */ 2702294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2703290631Savos 2704290631Savosend_run: 2705251538Srpaulo ieee80211_free_node(ni); 2706251538Srpaulo break; 2707251538Srpaulo default: 2708251538Srpaulo break; 2709251538Srpaulo } 2710290631Savos 2711251538Srpaulo URTWN_UNLOCK(sc); 2712251538Srpaulo IEEE80211_LOCK(ic); 2713290631Savos return (error != 0 ? error : uvp->newstate(vap, nstate, arg)); 2714251538Srpaulo} 2715251538Srpaulo 2716251538Srpaulostatic void 2717294473Savosurtwn_calib_to(void *arg) 2718294473Savos{ 2719294473Savos struct urtwn_softc *sc = arg; 2720294473Savos 2721294473Savos /* Do it in a process context. */ 2722294473Savos urtwn_cmd_sleepable(sc, NULL, 0, urtwn_calib_cb); 2723294473Savos} 2724294473Savos 2725294473Savosstatic void 2726294473Savosurtwn_calib_cb(struct urtwn_softc *sc, union sec_param *data) 2727294473Savos{ 2728294473Savos /* Do temperature compensation. */ 2729294473Savos urtwn_temp_calib(sc); 2730294473Savos 2731294473Savos if ((urtwn_read_1(sc, R92C_MSR) & R92C_MSR_MASK) != R92C_MSR_NOLINK) 2732294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2733294473Savos} 2734294473Savos 2735294473Savosstatic void 2736251538Srpaulourtwn_watchdog(void *arg) 2737251538Srpaulo{ 2738251538Srpaulo struct urtwn_softc *sc = arg; 2739251538Srpaulo 2740251538Srpaulo if (sc->sc_txtimer > 0) { 2741251538Srpaulo if (--sc->sc_txtimer == 0) { 2742251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 2743287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2744251538Srpaulo return; 2745251538Srpaulo } 2746251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2747251538Srpaulo } 2748251538Srpaulo} 2749251538Srpaulo 2750251538Srpaulostatic void 2751251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 2752251538Srpaulo{ 2753251538Srpaulo int pwdb; 2754251538Srpaulo 2755251538Srpaulo /* Convert antenna signal to percentage. */ 2756251538Srpaulo if (rssi <= -100 || rssi >= 20) 2757251538Srpaulo pwdb = 0; 2758251538Srpaulo else if (rssi >= 0) 2759251538Srpaulo pwdb = 100; 2760251538Srpaulo else 2761251538Srpaulo pwdb = 100 + rssi; 2762264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2763289758Savos if (rate <= URTWN_RIDX_CCK11) { 2764264912Skevlo /* CCK gain is smaller than OFDM/MCS gain. */ 2765264912Skevlo pwdb += 6; 2766264912Skevlo if (pwdb > 100) 2767264912Skevlo pwdb = 100; 2768264912Skevlo if (pwdb <= 14) 2769264912Skevlo pwdb -= 4; 2770264912Skevlo else if (pwdb <= 26) 2771264912Skevlo pwdb -= 8; 2772264912Skevlo else if (pwdb <= 34) 2773264912Skevlo pwdb -= 6; 2774264912Skevlo else if (pwdb <= 42) 2775264912Skevlo pwdb -= 2; 2776264912Skevlo } 2777251538Srpaulo } 2778251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 2779251538Srpaulo sc->avg_pwdb = pwdb; 2780251538Srpaulo else if (sc->avg_pwdb < pwdb) 2781251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 2782251538Srpaulo else 2783251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 2784297175Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: PWDB %d, EMA %d\n", __func__, 2785294471Savos pwdb, sc->avg_pwdb); 2786251538Srpaulo} 2787251538Srpaulo 2788251538Srpaulostatic int8_t 2789251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2790251538Srpaulo{ 2791251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 2792251538Srpaulo struct r92c_rx_phystat *phy; 2793251538Srpaulo struct r92c_rx_cck *cck; 2794251538Srpaulo uint8_t rpt; 2795251538Srpaulo int8_t rssi; 2796251538Srpaulo 2797289758Savos if (rate <= URTWN_RIDX_CCK11) { 2798251538Srpaulo cck = (struct r92c_rx_cck *)physt; 2799251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 2800251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 2801251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 2802251538Srpaulo } else { 2803251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 2804251538Srpaulo rssi = cck->agc_rpt & 0x3e; 2805251538Srpaulo } 2806251538Srpaulo rssi = cckoff[rpt] - rssi; 2807251538Srpaulo } else { /* OFDM/HT. */ 2808251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 2809251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2810251538Srpaulo } 2811251538Srpaulo return (rssi); 2812251538Srpaulo} 2813251538Srpaulo 2814264912Skevlostatic int8_t 2815264912Skevlourtwn_r88e_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2816264912Skevlo{ 2817264912Skevlo struct r92c_rx_phystat *phy; 2818264912Skevlo struct r88e_rx_cck *cck; 2819264912Skevlo uint8_t cck_agc_rpt, lna_idx, vga_idx; 2820264912Skevlo int8_t rssi; 2821264912Skevlo 2822264972Skevlo rssi = 0; 2823289758Savos if (rate <= URTWN_RIDX_CCK11) { 2824264912Skevlo cck = (struct r88e_rx_cck *)physt; 2825264912Skevlo cck_agc_rpt = cck->agc_rpt; 2826264912Skevlo lna_idx = (cck_agc_rpt & 0xe0) >> 5; 2827281069Srpaulo vga_idx = cck_agc_rpt & 0x1f; 2828264912Skevlo switch (lna_idx) { 2829264912Skevlo case 7: 2830264912Skevlo if (vga_idx <= 27) 2831264912Skevlo rssi = -100 + 2* (27 - vga_idx); 2832264912Skevlo else 2833264912Skevlo rssi = -100; 2834264912Skevlo break; 2835264912Skevlo case 6: 2836264912Skevlo rssi = -48 + 2 * (2 - vga_idx); 2837264912Skevlo break; 2838264912Skevlo case 5: 2839264912Skevlo rssi = -42 + 2 * (7 - vga_idx); 2840264912Skevlo break; 2841264912Skevlo case 4: 2842264912Skevlo rssi = -36 + 2 * (7 - vga_idx); 2843264912Skevlo break; 2844264912Skevlo case 3: 2845264912Skevlo rssi = -24 + 2 * (7 - vga_idx); 2846264912Skevlo break; 2847264912Skevlo case 2: 2848264912Skevlo rssi = -12 + 2 * (5 - vga_idx); 2849264912Skevlo break; 2850264912Skevlo case 1: 2851264912Skevlo rssi = 8 - (2 * vga_idx); 2852264912Skevlo break; 2853264912Skevlo case 0: 2854264912Skevlo rssi = 14 - (2 * vga_idx); 2855264912Skevlo break; 2856264912Skevlo } 2857264912Skevlo rssi += 6; 2858264912Skevlo } else { /* OFDM/HT. */ 2859264912Skevlo phy = (struct r92c_rx_phystat *)physt; 2860264912Skevlo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2861264912Skevlo } 2862264912Skevlo return (rssi); 2863264912Skevlo} 2864264912Skevlo 2865251538Srpaulostatic int 2866290630Savosurtwn_tx_data(struct urtwn_softc *sc, struct ieee80211_node *ni, 2867290630Savos struct mbuf *m, struct urtwn_data *data) 2868251538Srpaulo{ 2869292167Savos const struct ieee80211_txparam *tp; 2870287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2871251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 2872292167Savos struct ieee80211_key *k = NULL; 2873292167Savos struct ieee80211_channel *chan; 2874292167Savos struct ieee80211_frame *wh; 2875251538Srpaulo struct r92c_tx_desc *txd; 2876300434Savos uint8_t macid, raid, rate, ridx, type, tid, qos, qsel; 2877292014Savos int hasqos, ismcast; 2878251538Srpaulo 2879251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2880251538Srpaulo 2881290630Savos wh = mtod(m, struct ieee80211_frame *); 2882264912Skevlo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2883292014Savos hasqos = IEEE80211_QOS_HAS_SEQ(wh); 2884290630Savos ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2885264912Skevlo 2886292014Savos /* Select TX ring for this frame. */ 2887292014Savos if (hasqos) { 2888300433Savos qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0]; 2889300433Savos tid = qos & IEEE80211_QOS_TID; 2890300433Savos } else { 2891300433Savos qos = 0; 2892292014Savos tid = 0; 2893300433Savos } 2894292014Savos 2895292167Savos chan = (ni->ni_chan != IEEE80211_CHAN_ANYC) ? 2896292167Savos ni->ni_chan : ic->ic_curchan; 2897292167Savos tp = &vap->iv_txparms[ieee80211_chan2mode(chan)]; 2898292167Savos 2899292167Savos /* Choose a TX rate index. */ 2900292167Savos if (type == IEEE80211_FC0_TYPE_MGT) 2901292167Savos rate = tp->mgmtrate; 2902292167Savos else if (ismcast) 2903292167Savos rate = tp->mcastrate; 2904292167Savos else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 2905292167Savos rate = tp->ucastrate; 2906292167Savos else if (m->m_flags & M_EAPOL) 2907292167Savos rate = tp->mgmtrate; 2908292167Savos else { 2909292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) { 2910292167Savos /* XXX pass pktlen */ 2911292167Savos (void) ieee80211_ratectl_rate(ni, NULL, 0); 2912292167Savos rate = ni->ni_txrate; 2913292167Savos } else { 2914297175Sadrian /* XXX TODO: drop the default rate for 11b/11g? */ 2915297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2916297175Sadrian rate = IEEE80211_RATE_MCS | 0x4; /* MCS4 */ 2917297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2918292167Savos rate = 108; 2919292167Savos else 2920292167Savos rate = 22; 2921292167Savos } 2922292167Savos } 2923292167Savos 2924297175Sadrian /* 2925297175Sadrian * XXX TODO: this should be per-node, for 11b versus 11bg 2926297175Sadrian * nodes in hostap mode 2927297175Sadrian */ 2928292167Savos ridx = rate2ridx(rate); 2929297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2930297175Sadrian raid = R92C_RAID_11GN; 2931297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2932292167Savos raid = R92C_RAID_11BG; 2933292167Savos else 2934292167Savos raid = R92C_RAID_11B; 2935292167Savos 2936260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2937290630Savos k = ieee80211_crypto_encap(ni, m); 2938251538Srpaulo if (k == NULL) { 2939251538Srpaulo device_printf(sc->sc_dev, 2940251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 2941251538Srpaulo return (ENOBUFS); 2942251538Srpaulo } 2943251538Srpaulo 2944251538Srpaulo /* in case packet header moved, reset pointer */ 2945290630Savos wh = mtod(m, struct ieee80211_frame *); 2946251538Srpaulo } 2947281069Srpaulo 2948251538Srpaulo /* Fill Tx descriptor. */ 2949251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 2950251538Srpaulo memset(txd, 0, sizeof(*txd)); 2951251538Srpaulo 2952251538Srpaulo txd->txdw0 |= htole32( 2953251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 2954251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2955290630Savos if (ismcast) 2956251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 2957290630Savos 2958290630Savos if (!ismcast) { 2959300433Savos /* Unicast frame, check if an ACK is expected. */ 2960300433Savos if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) != 2961300433Savos IEEE80211_QOS_ACKPOLICY_NOACK) { 2962300433Savos txd->txdw5 |= htole32(R92C_TXDW5_RTY_LMT_ENA); 2963300433Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT, 2964300433Savos tp->maxretry)); 2965300433Savos } 2966300433Savos 2967292167Savos if (sc->chip & URTWN_CHIP_88E) { 2968292167Savos struct urtwn_node *un = URTWN_NODE(ni); 2969292167Savos macid = un->id; 2970292167Savos } else 2971292167Savos macid = URTWN_MACID_BSS; 2972290630Savos 2973290630Savos if (type == IEEE80211_FC0_TYPE_DATA) { 2974292014Savos qsel = tid % URTWN_MAX_TID; 2975290630Savos 2976292167Savos if (sc->chip & URTWN_CHIP_88E) { 2977292167Savos txd->txdw2 |= htole32( 2978292167Savos R88E_TXDW2_AGGBK | 2979292167Savos R88E_TXDW2_CCX_RPT); 2980292167Savos } else 2981290630Savos txd->txdw1 |= htole32(R92C_TXDW1_AGGBK); 2982290630Savos 2983297175Sadrian /* protmode, non-HT */ 2984297175Sadrian /* XXX TODO: noack frames? */ 2985297175Sadrian if ((rate & 0x80) == 0 && 2986297175Sadrian (ic->ic_flags & IEEE80211_F_USEPROT)) { 2987290630Savos switch (ic->ic_protmode) { 2988290630Savos case IEEE80211_PROT_CTSONLY: 2989290630Savos txd->txdw4 |= htole32( 2990301132Savos R92C_TXDW4_CTS2SELF); 2991290630Savos break; 2992290630Savos case IEEE80211_PROT_RTSCTS: 2993290630Savos txd->txdw4 |= htole32( 2994290630Savos R92C_TXDW4_RTSEN | 2995290630Savos R92C_TXDW4_HWRTSEN); 2996290630Savos break; 2997290630Savos default: 2998290630Savos break; 2999290630Savos } 3000290630Savos } 3001297175Sadrian 3002297175Sadrian /* protmode, HT */ 3003297175Sadrian /* XXX TODO: noack frames? */ 3004297175Sadrian if ((rate & 0x80) && 3005297175Sadrian (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) { 3006297175Sadrian txd->txdw4 |= htole32( 3007297175Sadrian R92C_TXDW4_RTSEN | 3008297175Sadrian R92C_TXDW4_HWRTSEN); 3009297175Sadrian } 3010297175Sadrian 3011297175Sadrian /* XXX TODO: rtsrate is configurable? 24mbit may 3012297175Sadrian * be a bit high for RTS rate? */ 3013290630Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 3014290630Savos URTWN_RIDX_OFDM24)); 3015297175Sadrian 3016290630Savos txd->txdw5 |= htole32(0x0001ff00); 3017290630Savos } else /* IEEE80211_FC0_TYPE_MGT */ 3018290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 3019251538Srpaulo } else { 3020290630Savos macid = URTWN_MACID_BC; 3021290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 3022290630Savos } 3023251538Srpaulo 3024290630Savos txd->txdw1 |= htole32( 3025290630Savos SM(R92C_TXDW1_QSEL, qsel) | 3026290630Savos SM(R92C_TXDW1_RAID, raid)); 3027290630Savos 3028297175Sadrian /* XXX TODO: 40MHZ flag? */ 3029297175Sadrian /* XXX TODO: AMPDU flag? (AGG_ENABLE or AGG_BREAK?) Density shift? */ 3030297175Sadrian /* XXX Short preamble? */ 3031297175Sadrian /* XXX Short-GI? */ 3032297175Sadrian 3033290630Savos if (sc->chip & URTWN_CHIP_88E) 3034290630Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, macid)); 3035290630Savos else 3036290630Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, macid)); 3037290630Savos 3038290630Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 3039297175Sadrian 3040291858Savos /* Force this rate if needed. */ 3041292167Savos if (URTWN_CHIP_HAS_RATECTL(sc) || ismcast || 3042297175Sadrian (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) || 3043292167Savos (m->m_flags & M_EAPOL) || type != IEEE80211_FC0_TYPE_DATA) 3044251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3045251538Srpaulo 3046292014Savos if (!hasqos) { 3047251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 3048291858Savos if (sc->chip & URTWN_CHIP_88E) 3049291858Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3050291858Savos else 3051291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3052290630Savos } else { 3053290630Savos /* Set sequence number. */ 3054290630Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3055290630Savos } 3056251538Srpaulo 3057292175Savos if (k != NULL && !(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3058292175Savos uint8_t cipher; 3059292175Savos 3060292175Savos switch (k->wk_cipher->ic_cipher) { 3061292175Savos case IEEE80211_CIPHER_WEP: 3062292175Savos case IEEE80211_CIPHER_TKIP: 3063292175Savos cipher = R92C_TXDW1_CIPHER_RC4; 3064292175Savos break; 3065292175Savos case IEEE80211_CIPHER_AES_CCM: 3066292175Savos cipher = R92C_TXDW1_CIPHER_AES; 3067292175Savos break; 3068292175Savos default: 3069292175Savos device_printf(sc->sc_dev, "%s: unknown cipher %d\n", 3070292175Savos __func__, k->wk_cipher->ic_cipher); 3071292175Savos return (EINVAL); 3072292175Savos } 3073292175Savos 3074292175Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3075292175Savos } 3076292175Savos 3077251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 3078251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3079251538Srpaulo 3080251538Srpaulo tap->wt_flags = 0; 3081290630Savos if (k != NULL) 3082290630Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3083290630Savos ieee80211_radiotap_tx(vap, m); 3084251538Srpaulo } 3085251538Srpaulo 3086290630Savos data->ni = ni; 3087251538Srpaulo 3088290630Savos urtwn_tx_start(sc, m, type, data); 3089290630Savos 3090290630Savos return (0); 3091290630Savos} 3092290630Savos 3093292221Savosstatic int 3094292221Savosurtwn_tx_raw(struct urtwn_softc *sc, struct ieee80211_node *ni, 3095292221Savos struct mbuf *m, struct urtwn_data *data, 3096292221Savos const struct ieee80211_bpf_params *params) 3097292221Savos{ 3098292221Savos struct ieee80211vap *vap = ni->ni_vap; 3099292221Savos struct ieee80211_key *k = NULL; 3100292221Savos struct ieee80211_frame *wh; 3101292221Savos struct r92c_tx_desc *txd; 3102292221Savos uint8_t cipher, ridx, type; 3103292221Savos 3104292221Savos /* Encrypt the frame if need be. */ 3105292221Savos cipher = R92C_TXDW1_CIPHER_NONE; 3106292221Savos if (params->ibp_flags & IEEE80211_BPF_CRYPTO) { 3107292221Savos /* Retrieve key for TX. */ 3108292221Savos k = ieee80211_crypto_encap(ni, m); 3109292221Savos if (k == NULL) 3110292221Savos return (ENOBUFS); 3111292221Savos 3112292221Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3113292221Savos switch (k->wk_cipher->ic_cipher) { 3114292221Savos case IEEE80211_CIPHER_WEP: 3115292221Savos case IEEE80211_CIPHER_TKIP: 3116292221Savos cipher = R92C_TXDW1_CIPHER_RC4; 3117292221Savos break; 3118292221Savos case IEEE80211_CIPHER_AES_CCM: 3119292221Savos cipher = R92C_TXDW1_CIPHER_AES; 3120292221Savos break; 3121292221Savos default: 3122292221Savos device_printf(sc->sc_dev, 3123292221Savos "%s: unknown cipher %d\n", 3124292221Savos __func__, k->wk_cipher->ic_cipher); 3125292221Savos return (EINVAL); 3126292221Savos } 3127292221Savos } 3128292221Savos } 3129292221Savos 3130297175Sadrian /* XXX TODO: 11n checks, matching urtwn_tx_data() */ 3131297175Sadrian 3132292221Savos wh = mtod(m, struct ieee80211_frame *); 3133292221Savos type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 3134292221Savos 3135292221Savos /* Fill Tx descriptor. */ 3136292221Savos txd = (struct r92c_tx_desc *)data->buf; 3137292221Savos memset(txd, 0, sizeof(*txd)); 3138292221Savos 3139292221Savos txd->txdw0 |= htole32( 3140292221Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 3141292221Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 3142292221Savos if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 3143292221Savos txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 3144292221Savos 3145300433Savos if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) { 3146300433Savos txd->txdw5 |= htole32(R92C_TXDW5_RTY_LMT_ENA); 3147300433Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT, 3148300433Savos params->ibp_try0)); 3149300433Savos } 3150292221Savos if (params->ibp_flags & IEEE80211_BPF_RTS) 3151301132Savos txd->txdw4 |= htole32(R92C_TXDW4_RTSEN | R92C_TXDW4_HWRTSEN); 3152292221Savos if (params->ibp_flags & IEEE80211_BPF_CTS) 3153292221Savos txd->txdw4 |= htole32(R92C_TXDW4_CTS2SELF); 3154292221Savos if (txd->txdw4 & htole32(R92C_TXDW4_RTSEN | R92C_TXDW4_CTS2SELF)) { 3155292221Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 3156292221Savos URTWN_RIDX_OFDM24)); 3157292221Savos } 3158292221Savos 3159292221Savos if (sc->chip & URTWN_CHIP_88E) 3160292221Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 3161292221Savos else 3162292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 3163292221Savos 3164297175Sadrian /* XXX TODO: rate index/config (RAID) for 11n? */ 3165292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_MGNT)); 3166292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3167292221Savos 3168292221Savos /* Choose a TX rate index. */ 3169292221Savos ridx = rate2ridx(params->ibp_rate0); 3170292221Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 3171292221Savos txd->txdw5 |= htole32(0x0001ff00); 3172292221Savos txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3173292221Savos 3174292221Savos if (!IEEE80211_QOS_HAS_SEQ(wh)) { 3175292221Savos /* Use HW sequence numbering for non-QoS frames. */ 3176292221Savos if (sc->chip & URTWN_CHIP_88E) 3177292221Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3178292221Savos else 3179292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3180292221Savos } else { 3181292221Savos /* Set sequence number. */ 3182292221Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3183292221Savos } 3184292221Savos 3185292221Savos if (ieee80211_radiotap_active_vap(vap)) { 3186292221Savos struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3187292221Savos 3188292221Savos tap->wt_flags = 0; 3189292221Savos if (k != NULL) 3190292221Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3191292221Savos ieee80211_radiotap_tx(vap, m); 3192292221Savos } 3193292221Savos 3194292221Savos data->ni = ni; 3195292221Savos 3196292221Savos urtwn_tx_start(sc, m, type, data); 3197292221Savos 3198292221Savos return (0); 3199292221Savos} 3200292221Savos 3201290630Savosstatic void 3202290630Savosurtwn_tx_start(struct urtwn_softc *sc, struct mbuf *m, uint8_t type, 3203290630Savos struct urtwn_data *data) 3204290630Savos{ 3205290630Savos struct usb_xfer *xfer; 3206290630Savos struct r92c_tx_desc *txd; 3207290630Savos uint16_t ac, sum; 3208290630Savos int i, xferlen; 3209290630Savos 3210290630Savos URTWN_ASSERT_LOCKED(sc); 3211290630Savos 3212290630Savos ac = M_WME_GETAC(m); 3213290630Savos 3214290630Savos switch (type) { 3215290630Savos case IEEE80211_FC0_TYPE_CTL: 3216290630Savos case IEEE80211_FC0_TYPE_MGT: 3217290630Savos xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 3218290630Savos break; 3219290630Savos default: 3220292014Savos xfer = sc->sc_xfer[wme2queue[ac].qid]; 3221290630Savos break; 3222290630Savos } 3223290630Savos 3224290630Savos txd = (struct r92c_tx_desc *)data->buf; 3225290630Savos txd->txdw0 |= htole32(SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len)); 3226290630Savos 3227290630Savos /* Compute Tx descriptor checksum. */ 3228290630Savos sum = 0; 3229290630Savos for (i = 0; i < sizeof(*txd) / 2; i++) 3230290630Savos sum ^= ((uint16_t *)txd)[i]; 3231290630Savos txd->txdsum = sum; /* NB: already little endian. */ 3232290630Savos 3233290630Savos xferlen = sizeof(*txd) + m->m_pkthdr.len; 3234290630Savos m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&txd[1]); 3235290630Savos 3236251538Srpaulo data->buflen = xferlen; 3237290630Savos data->m = m; 3238251538Srpaulo 3239251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 3240251538Srpaulo usbd_transfer_start(xfer); 3241251538Srpaulo} 3242251538Srpaulo 3243287197Sglebiusstatic int 3244287197Sglebiusurtwn_transmit(struct ieee80211com *ic, struct mbuf *m) 3245251538Srpaulo{ 3246287197Sglebius struct urtwn_softc *sc = ic->ic_softc; 3247287197Sglebius int error; 3248261863Srpaulo 3249261863Srpaulo URTWN_LOCK(sc); 3250287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 3251287197Sglebius URTWN_UNLOCK(sc); 3252287197Sglebius return (ENXIO); 3253287197Sglebius } 3254287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 3255287197Sglebius if (error) { 3256287197Sglebius URTWN_UNLOCK(sc); 3257287197Sglebius return (error); 3258287197Sglebius } 3259287197Sglebius urtwn_start(sc); 3260261863Srpaulo URTWN_UNLOCK(sc); 3261287197Sglebius 3262287197Sglebius return (0); 3263261863Srpaulo} 3264261863Srpaulo 3265261863Srpaulostatic void 3266287197Sglebiusurtwn_start(struct urtwn_softc *sc) 3267261863Srpaulo{ 3268251538Srpaulo struct ieee80211_node *ni; 3269251538Srpaulo struct mbuf *m; 3270251538Srpaulo struct urtwn_data *bf; 3271251538Srpaulo 3272261863Srpaulo URTWN_ASSERT_LOCKED(sc); 3273287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 3274251538Srpaulo bf = urtwn_getbuf(sc); 3275251538Srpaulo if (bf == NULL) { 3276287197Sglebius mbufq_prepend(&sc->sc_snd, m); 3277251538Srpaulo break; 3278251538Srpaulo } 3279251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 3280251538Srpaulo m->m_pkthdr.rcvif = NULL; 3281297596Sadrian 3282297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 3283297596Sadrian __func__, 3284297596Sadrian m); 3285297596Sadrian 3286290630Savos if (urtwn_tx_data(sc, ni, m, bf) != 0) { 3287287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 3288287197Sglebius IFCOUNTER_OERRORS, 1); 3289251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 3290288353Sadrian m_freem(m); 3291251538Srpaulo ieee80211_free_node(ni); 3292251538Srpaulo break; 3293251538Srpaulo } 3294251538Srpaulo sc->sc_txtimer = 5; 3295251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 3296251538Srpaulo } 3297251538Srpaulo} 3298251538Srpaulo 3299287197Sglebiusstatic void 3300287197Sglebiusurtwn_parent(struct ieee80211com *ic) 3301251538Srpaulo{ 3302286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 3303251538Srpaulo 3304263153Skevlo URTWN_LOCK(sc); 3305287197Sglebius if (sc->sc_flags & URTWN_DETACHED) { 3306287197Sglebius URTWN_UNLOCK(sc); 3307287197Sglebius return; 3308287197Sglebius } 3309291698Savos URTWN_UNLOCK(sc); 3310291698Savos 3311287197Sglebius if (ic->ic_nrunning > 0) { 3312291698Savos if (urtwn_init(sc) != 0) { 3313291698Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3314291698Savos if (vap != NULL) 3315291698Savos ieee80211_stop(vap); 3316291698Savos } else 3317291698Savos ieee80211_start_all(ic); 3318291698Savos } else 3319287197Sglebius urtwn_stop(sc); 3320251538Srpaulo} 3321251538Srpaulo 3322264912Skevlostatic __inline int 3323251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 3324251538Srpaulo{ 3325264912Skevlo 3326264912Skevlo return sc->sc_power_on(sc); 3327264912Skevlo} 3328264912Skevlo 3329264912Skevlostatic int 3330264912Skevlourtwn_r92c_power_on(struct urtwn_softc *sc) 3331264912Skevlo{ 3332251538Srpaulo uint32_t reg; 3333291698Savos usb_error_t error; 3334251538Srpaulo int ntries; 3335251538Srpaulo 3336251538Srpaulo /* Wait for autoload done bit. */ 3337251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3338251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 3339251538Srpaulo break; 3340266472Shselasky urtwn_ms_delay(sc); 3341251538Srpaulo } 3342251538Srpaulo if (ntries == 1000) { 3343251538Srpaulo device_printf(sc->sc_dev, 3344251538Srpaulo "timeout waiting for chip autoload\n"); 3345251538Srpaulo return (ETIMEDOUT); 3346251538Srpaulo } 3347251538Srpaulo 3348251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 3349291698Savos error = urtwn_write_1(sc, R92C_RSV_CTRL, 0); 3350291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3351291698Savos return (EIO); 3352251538Srpaulo /* Move SPS into PWM mode. */ 3353291698Savos error = urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 3354291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3355291698Savos return (EIO); 3356266472Shselasky urtwn_ms_delay(sc); 3357251538Srpaulo 3358251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 3359251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 3360291698Savos error = urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3361251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 3362291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3363291698Savos return (EIO); 3364266472Shselasky urtwn_ms_delay(sc); 3365291698Savos error = urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3366251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 3367251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 3368291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3369291698Savos return (EIO); 3370251538Srpaulo } 3371251538Srpaulo 3372251538Srpaulo /* Auto enable WLAN. */ 3373291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3374251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3375291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3376291698Savos return (EIO); 3377251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3378262822Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3379262822Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3380251538Srpaulo break; 3381266472Shselasky urtwn_ms_delay(sc); 3382251538Srpaulo } 3383251538Srpaulo if (ntries == 1000) { 3384251538Srpaulo device_printf(sc->sc_dev, 3385251538Srpaulo "timeout waiting for MAC auto ON\n"); 3386251538Srpaulo return (ETIMEDOUT); 3387251538Srpaulo } 3388251538Srpaulo 3389251538Srpaulo /* Enable radio, GPIO and LED functions. */ 3390291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3391251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 3392251538Srpaulo R92C_APS_FSMCO_PDN_EN | 3393251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 3394291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3395291698Savos return (EIO); 3396251538Srpaulo /* Release RF digital isolation. */ 3397291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 3398251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 3399291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3400291698Savos return (EIO); 3401251538Srpaulo 3402251538Srpaulo /* Initialize MAC. */ 3403291698Savos error = urtwn_write_1(sc, R92C_APSD_CTRL, 3404251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 3405291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3406291698Savos return (EIO); 3407251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 3408251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 3409251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 3410251538Srpaulo break; 3411266472Shselasky urtwn_ms_delay(sc); 3412251538Srpaulo } 3413251538Srpaulo if (ntries == 200) { 3414251538Srpaulo device_printf(sc->sc_dev, 3415251538Srpaulo "timeout waiting for MAC initialization\n"); 3416251538Srpaulo return (ETIMEDOUT); 3417251538Srpaulo } 3418251538Srpaulo 3419251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3420251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 3421251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3422251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3423251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 3424251538Srpaulo R92C_CR_ENSEC; 3425291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3426291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3427291698Savos return (EIO); 3428251538Srpaulo 3429291698Savos error = urtwn_write_1(sc, 0xfe10, 0x19); 3430291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3431291698Savos return (EIO); 3432251538Srpaulo return (0); 3433251538Srpaulo} 3434251538Srpaulo 3435251538Srpaulostatic int 3436264912Skevlourtwn_r88e_power_on(struct urtwn_softc *sc) 3437264912Skevlo{ 3438264912Skevlo uint32_t reg; 3439291698Savos usb_error_t error; 3440264912Skevlo int ntries; 3441264912Skevlo 3442264912Skevlo /* Wait for power ready bit. */ 3443264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3444281918Skevlo if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST) 3445264912Skevlo break; 3446266472Shselasky urtwn_ms_delay(sc); 3447264912Skevlo } 3448264912Skevlo if (ntries == 5000) { 3449264912Skevlo device_printf(sc->sc_dev, 3450264912Skevlo "timeout waiting for chip power up\n"); 3451264912Skevlo return (ETIMEDOUT); 3452264912Skevlo } 3453264912Skevlo 3454264912Skevlo /* Reset BB. */ 3455291698Savos error = urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3456264912Skevlo urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB | 3457264912Skevlo R92C_SYS_FUNC_EN_BB_GLB_RST)); 3458291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3459291698Savos return (EIO); 3460264912Skevlo 3461291698Savos error = urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3462281918Skevlo urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3463291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3464291698Savos return (EIO); 3465264912Skevlo 3466264912Skevlo /* Disable HWPDN. */ 3467291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3468281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN); 3469291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3470291698Savos return (EIO); 3471264912Skevlo 3472264912Skevlo /* Disable WL suspend. */ 3473291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3474281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & 3475281918Skevlo ~(R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE)); 3476291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3477291698Savos return (EIO); 3478264912Skevlo 3479291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3480281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3481291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3482291698Savos return (EIO); 3483264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3484281918Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3485281918Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3486264912Skevlo break; 3487266472Shselasky urtwn_ms_delay(sc); 3488264912Skevlo } 3489264912Skevlo if (ntries == 5000) 3490264912Skevlo return (ETIMEDOUT); 3491264912Skevlo 3492264912Skevlo /* Enable LDO normal mode. */ 3493291698Savos error = urtwn_write_1(sc, R92C_LPLDO_CTRL, 3494295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) & ~R92C_LPLDO_CTRL_SLEEP); 3495291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3496291698Savos return (EIO); 3497264912Skevlo 3498264912Skevlo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3499291698Savos error = urtwn_write_2(sc, R92C_CR, 0); 3500291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3501291698Savos return (EIO); 3502264912Skevlo reg = urtwn_read_2(sc, R92C_CR); 3503264912Skevlo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3504264912Skevlo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3505264912Skevlo R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC | R92C_CR_CALTMR_EN; 3506291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3507291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3508291698Savos return (EIO); 3509264912Skevlo 3510264912Skevlo return (0); 3511264912Skevlo} 3512264912Skevlo 3513295874Savosstatic __inline void 3514295874Savosurtwn_power_off(struct urtwn_softc *sc) 3515295874Savos{ 3516295874Savos 3517295874Savos return sc->sc_power_off(sc); 3518295874Savos} 3519295874Savos 3520295874Savosstatic void 3521295874Savosurtwn_r92c_power_off(struct urtwn_softc *sc) 3522295874Savos{ 3523295874Savos uint32_t reg; 3524295874Savos 3525295874Savos /* Block all Tx queues. */ 3526295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3527295874Savos 3528295874Savos /* Disable RF */ 3529295874Savos urtwn_rf_write(sc, 0, 0, 0); 3530295874Savos 3531295874Savos urtwn_write_1(sc, R92C_APSD_CTRL, R92C_APSD_CTRL_OFF); 3532295874Savos 3533295874Savos /* Reset BB state machine */ 3534295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3535295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA | 3536295874Savos R92C_SYS_FUNC_EN_BB_GLB_RST); 3537295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3538295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA); 3539295874Savos 3540295874Savos /* 3541295874Savos * Reset digital sequence 3542295874Savos */ 3543295874Savos#ifndef URTWN_WITHOUT_UCODE 3544295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) { 3545295874Savos /* Reset MCU ready status */ 3546295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3547295874Savos 3548295874Savos /* If firmware in ram code, do reset */ 3549295874Savos urtwn_fw_reset(sc); 3550295874Savos } 3551295874Savos#endif 3552295874Savos 3553295874Savos /* Reset MAC and Enable 8051 */ 3554295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN + 1, 3555295874Savos (R92C_SYS_FUNC_EN_CPUEN | 3556295874Savos R92C_SYS_FUNC_EN_ELDR | 3557295874Savos R92C_SYS_FUNC_EN_HWPDN) >> 8); 3558295874Savos 3559295874Savos /* Reset MCU ready status */ 3560295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3561295874Savos 3562295874Savos /* Disable MAC clock */ 3563295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3564295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3565295874Savos R92C_SYS_CLKR_ANA8M | 3566295874Savos R92C_SYS_CLKR_LOADER_EN | 3567295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3568295874Savos R92C_SYS_CLKR_SYS_EN | 3569295874Savos R92C_SYS_CLKR_RING_EN | 3570295874Savos 0x4000); 3571295874Savos 3572295874Savos /* Disable AFE PLL */ 3573295874Savos urtwn_write_1(sc, R92C_AFE_PLL_CTRL, 0x80); 3574295874Savos 3575295874Savos /* Gated AFE DIG_CLOCK */ 3576295874Savos urtwn_write_2(sc, R92C_AFE_XTAL_CTRL, 0x880F); 3577295874Savos 3578295874Savos /* Isolated digital to PON */ 3579295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3580295874Savos R92C_SYS_ISO_CTRL_MD2PP | 3581295874Savos R92C_SYS_ISO_CTRL_PA2PCIE | 3582295874Savos R92C_SYS_ISO_CTRL_PD2CORE | 3583295874Savos R92C_SYS_ISO_CTRL_IP2MAC | 3584295874Savos R92C_SYS_ISO_CTRL_DIOP | 3585295874Savos R92C_SYS_ISO_CTRL_DIOE); 3586295874Savos 3587295874Savos /* 3588295874Savos * Pull GPIO PIN to balance level and LED control 3589295874Savos */ 3590295874Savos /* 1. Disable GPIO[7:0] */ 3591295874Savos urtwn_write_2(sc, R92C_GPIO_IOSEL, 0x0000); 3592295874Savos 3593295874Savos reg = urtwn_read_4(sc, R92C_GPIO_PIN_CTRL) & ~0x0000ff00; 3594295874Savos reg |= ((reg << 8) & 0x0000ff00) | 0x00ff0000; 3595295874Savos urtwn_write_4(sc, R92C_GPIO_PIN_CTRL, reg); 3596295874Savos 3597295874Savos /* Disable GPIO[10:8] */ 3598295874Savos urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 0x00); 3599295874Savos 3600295874Savos reg = urtwn_read_2(sc, R92C_GPIO_IO_SEL) & ~0x00f0; 3601295874Savos reg |= (((reg & 0x000f) << 4) | 0x0780); 3602295874Savos urtwn_write_2(sc, R92C_GPIO_IO_SEL, reg); 3603295874Savos 3604295874Savos /* Disable LED0 & 1 */ 3605295874Savos urtwn_write_2(sc, R92C_LEDCFG0, 0x8080); 3606295874Savos 3607295874Savos /* 3608295874Savos * Reset digital sequence 3609295874Savos */ 3610295874Savos /* Disable ELDR clock */ 3611295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3612295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3613295874Savos R92C_SYS_CLKR_ANA8M | 3614295874Savos R92C_SYS_CLKR_LOADER_EN | 3615295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3616295874Savos R92C_SYS_CLKR_SYS_EN | 3617295874Savos R92C_SYS_CLKR_RING_EN | 3618295874Savos 0x4000); 3619295874Savos 3620295874Savos /* Isolated ELDR to PON */ 3621295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL + 1, 3622295874Savos (R92C_SYS_ISO_CTRL_DIOR | 3623295874Savos R92C_SYS_ISO_CTRL_PWC_EV12V) >> 8); 3624295874Savos 3625295874Savos /* 3626295874Savos * Disable analog sequence 3627295874Savos */ 3628295874Savos /* Disable A15 power */ 3629295874Savos urtwn_write_1(sc, R92C_LDOA15_CTRL, R92C_LDOA15_CTRL_OBUF); 3630295874Savos /* Disable digital core power */ 3631295874Savos urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3632295874Savos urtwn_read_1(sc, R92C_LDOV12D_CTRL) & 3633295874Savos ~R92C_LDOV12D_CTRL_LDV12_EN); 3634295874Savos 3635295874Savos /* Enter PFM mode */ 3636295874Savos urtwn_write_1(sc, R92C_SPS0_CTRL, 0x23); 3637295874Savos 3638295874Savos /* Set USB suspend */ 3639295874Savos urtwn_write_2(sc, R92C_APS_FSMCO, 3640295874Savos R92C_APS_FSMCO_APDM_HOST | 3641295874Savos R92C_APS_FSMCO_AFSM_HSUS | 3642295874Savos R92C_APS_FSMCO_PFM_ALDN); 3643295874Savos 3644295874Savos /* Lock ISO/CLK/Power control register. */ 3645295874Savos urtwn_write_1(sc, R92C_RSV_CTRL, 0x0E); 3646295874Savos} 3647295874Savos 3648295874Savosstatic void 3649295874Savosurtwn_r88e_power_off(struct urtwn_softc *sc) 3650295874Savos{ 3651295874Savos uint8_t reg; 3652295874Savos int ntries; 3653295874Savos 3654295874Savos /* Disable any kind of TX reports. */ 3655295874Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 3656295874Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) & 3657295874Savos ~(R88E_TX_RPT1_ENA | R88E_TX_RPT2_ENA)); 3658295874Savos 3659295874Savos /* Stop Rx. */ 3660295874Savos urtwn_write_1(sc, R92C_CR, 0); 3661295874Savos 3662295874Savos /* Move card to Low Power State. */ 3663295874Savos /* Block all Tx queues. */ 3664295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3665295874Savos 3666295874Savos for (ntries = 0; ntries < 20; ntries++) { 3667295874Savos /* Should be zero if no packet is transmitting. */ 3668295874Savos if (urtwn_read_4(sc, R88E_SCH_TXCMD) == 0) 3669295874Savos break; 3670295874Savos 3671295874Savos urtwn_ms_delay(sc); 3672295874Savos } 3673295874Savos if (ntries == 20) { 3674295874Savos device_printf(sc->sc_dev, "%s: failed to block Tx queues\n", 3675295874Savos __func__); 3676295874Savos return; 3677295874Savos } 3678295874Savos 3679295874Savos /* CCK and OFDM are disabled, and clock are gated. */ 3680295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3681295874Savos urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~R92C_SYS_FUNC_EN_BBRSTB); 3682295874Savos 3683295874Savos urtwn_ms_delay(sc); 3684295874Savos 3685295874Savos /* Reset MAC TRX */ 3686295874Savos urtwn_write_1(sc, R92C_CR, 3687295874Savos R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3688295874Savos R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | 3689295874Savos R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN); 3690295874Savos 3691295874Savos /* check if removed later */ 3692295874Savos urtwn_write_1(sc, R92C_CR + 1, 3693295874Savos urtwn_read_1(sc, R92C_CR + 1) & ~(R92C_CR_ENSEC >> 8)); 3694295874Savos 3695295874Savos /* Respond TxOK to scheduler */ 3696295874Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, 3697295874Savos urtwn_read_1(sc, R92C_DUAL_TSF_RST) | 0x20); 3698295874Savos 3699295874Savos /* If firmware in ram code, do reset. */ 3700295874Savos#ifndef URTWN_WITHOUT_UCODE 3701295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) 3702295874Savos urtwn_r88e_fw_reset(sc); 3703295874Savos#endif 3704295874Savos 3705295874Savos /* Reset MCU ready status. */ 3706295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0x00); 3707295874Savos 3708295874Savos /* Disable 32k. */ 3709295874Savos urtwn_write_1(sc, R88E_32K_CTRL, 3710295874Savos urtwn_read_1(sc, R88E_32K_CTRL) & ~0x01); 3711295874Savos 3712295874Savos /* Move card to Disabled state. */ 3713295874Savos /* Turn off RF. */ 3714295874Savos urtwn_write_1(sc, R92C_RF_CTRL, 0); 3715295874Savos 3716295874Savos /* LDO Sleep mode. */ 3717295874Savos urtwn_write_1(sc, R92C_LPLDO_CTRL, 3718295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) | R92C_LPLDO_CTRL_SLEEP); 3719295874Savos 3720295874Savos /* Turn off MAC by HW state machine */ 3721295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3722295874Savos urtwn_read_1(sc, R92C_APS_FSMCO + 1) | 3723295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)); 3724295874Savos 3725295874Savos for (ntries = 0; ntries < 20; ntries++) { 3726295874Savos /* Wait until it will be disabled. */ 3727295874Savos if ((urtwn_read_1(sc, R92C_APS_FSMCO + 1) & 3728295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)) == 0) 3729295874Savos break; 3730295874Savos 3731295874Savos urtwn_ms_delay(sc); 3732295874Savos } 3733295874Savos if (ntries == 20) { 3734295874Savos device_printf(sc->sc_dev, "%s: could not turn off MAC\n", 3735295874Savos __func__); 3736295874Savos return; 3737295874Savos } 3738295874Savos 3739295874Savos /* schmit trigger */ 3740295874Savos urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3741295874Savos urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3742295874Savos 3743295874Savos /* Enable WL suspend. */ 3744295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3745295874Savos (urtwn_read_1(sc, R92C_APS_FSMCO + 1) & ~0x10) | 0x08); 3746295874Savos 3747295874Savos /* Enable bandgap mbias in suspend. */ 3748295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 3, 0); 3749295874Savos 3750295874Savos /* Clear SIC_EN register. */ 3751295874Savos urtwn_write_1(sc, R92C_GPIO_MUXCFG + 1, 3752295874Savos urtwn_read_1(sc, R92C_GPIO_MUXCFG + 1) & ~0x10); 3753295874Savos 3754295874Savos /* Set USB suspend enable local register */ 3755295874Savos urtwn_write_1(sc, R92C_USB_SUSPEND, 3756295874Savos urtwn_read_1(sc, R92C_USB_SUSPEND) | 0x10); 3757295874Savos 3758295874Savos /* Reset MCU IO Wrapper. */ 3759295874Savos reg = urtwn_read_1(sc, R92C_RSV_CTRL + 1); 3760295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08); 3761295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08); 3762295874Savos 3763295874Savos /* marked as 'For Power Consumption' code. */ 3764295874Savos urtwn_write_1(sc, R92C_GPIO_OUT, urtwn_read_1(sc, R92C_GPIO_IN)); 3765295874Savos urtwn_write_1(sc, R92C_GPIO_IOSEL, 0xff); 3766295874Savos 3767295874Savos urtwn_write_1(sc, R92C_GPIO_IO_SEL, 3768295874Savos urtwn_read_1(sc, R92C_GPIO_IO_SEL) << 4); 3769295874Savos urtwn_write_1(sc, R92C_GPIO_MOD, 3770295874Savos urtwn_read_1(sc, R92C_GPIO_MOD) | 0x0f); 3771295874Savos 3772295874Savos /* Set LNA, TRSW, EX_PA Pin to output mode. */ 3773295874Savos urtwn_write_4(sc, R88E_BB_PAD_CTRL, 0x00080808); 3774295874Savos} 3775295874Savos 3776264912Skevlostatic int 3777251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 3778251538Srpaulo{ 3779264912Skevlo int i, error, page_count, pktbuf_count; 3780251538Srpaulo 3781264912Skevlo page_count = (sc->chip & URTWN_CHIP_88E) ? 3782264912Skevlo R88E_TX_PAGE_COUNT : R92C_TX_PAGE_COUNT; 3783264912Skevlo pktbuf_count = (sc->chip & URTWN_CHIP_88E) ? 3784264912Skevlo R88E_TXPKTBUF_COUNT : R92C_TXPKTBUF_COUNT; 3785264912Skevlo 3786264912Skevlo /* Reserve pages [0; page_count]. */ 3787264912Skevlo for (i = 0; i < page_count; i++) { 3788251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3789251538Srpaulo return (error); 3790251538Srpaulo } 3791251538Srpaulo /* NB: 0xff indicates end-of-list. */ 3792251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 3793251538Srpaulo return (error); 3794251538Srpaulo /* 3795264912Skevlo * Use pages [page_count + 1; pktbuf_count - 1] 3796251538Srpaulo * as ring buffer. 3797251538Srpaulo */ 3798264912Skevlo for (++i; i < pktbuf_count - 1; i++) { 3799251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3800251538Srpaulo return (error); 3801251538Srpaulo } 3802251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 3803264912Skevlo error = urtwn_llt_write(sc, i, page_count + 1); 3804251538Srpaulo return (error); 3805251538Srpaulo} 3806251538Srpaulo 3807295871Savos#ifndef URTWN_WITHOUT_UCODE 3808251538Srpaulostatic void 3809251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 3810251538Srpaulo{ 3811251538Srpaulo uint16_t reg; 3812251538Srpaulo int ntries; 3813251538Srpaulo 3814251538Srpaulo /* Tell 8051 to reset itself. */ 3815251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 3816251538Srpaulo 3817251538Srpaulo /* Wait until 8051 resets by itself. */ 3818251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 3819251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3820251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 3821251538Srpaulo return; 3822266472Shselasky urtwn_ms_delay(sc); 3823251538Srpaulo } 3824251538Srpaulo /* Force 8051 reset. */ 3825251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3826251538Srpaulo} 3827251538Srpaulo 3828264912Skevlostatic void 3829264912Skevlourtwn_r88e_fw_reset(struct urtwn_softc *sc) 3830264912Skevlo{ 3831264912Skevlo uint16_t reg; 3832264912Skevlo 3833264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3834264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3835264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN); 3836264912Skevlo} 3837264912Skevlo 3838251538Srpaulostatic int 3839251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 3840251538Srpaulo{ 3841251538Srpaulo uint32_t reg; 3842291698Savos usb_error_t error = USB_ERR_NORMAL_COMPLETION; 3843291698Savos int off, mlen; 3844251538Srpaulo 3845251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3846251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 3847251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3848251538Srpaulo 3849251538Srpaulo off = R92C_FW_START_ADDR; 3850251538Srpaulo while (len > 0) { 3851251538Srpaulo if (len > 196) 3852251538Srpaulo mlen = 196; 3853251538Srpaulo else if (len > 4) 3854251538Srpaulo mlen = 4; 3855251538Srpaulo else 3856251538Srpaulo mlen = 1; 3857251538Srpaulo /* XXX fix this deconst */ 3858281069Srpaulo error = urtwn_write_region_1(sc, off, 3859251538Srpaulo __DECONST(uint8_t *, buf), mlen); 3860291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3861251538Srpaulo break; 3862251538Srpaulo off += mlen; 3863251538Srpaulo buf += mlen; 3864251538Srpaulo len -= mlen; 3865251538Srpaulo } 3866251538Srpaulo return (error); 3867251538Srpaulo} 3868251538Srpaulo 3869251538Srpaulostatic int 3870251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 3871251538Srpaulo{ 3872251538Srpaulo const struct firmware *fw; 3873251538Srpaulo const struct r92c_fw_hdr *hdr; 3874251538Srpaulo const char *imagename; 3875251538Srpaulo const u_char *ptr; 3876251538Srpaulo size_t len; 3877251538Srpaulo uint32_t reg; 3878251538Srpaulo int mlen, ntries, page, error; 3879251538Srpaulo 3880264864Skevlo URTWN_UNLOCK(sc); 3881251538Srpaulo /* Read firmware image from the filesystem. */ 3882264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3883264912Skevlo imagename = "urtwn-rtl8188eufw"; 3884264912Skevlo else if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3885264912Skevlo URTWN_CHIP_UMC_A_CUT) 3886251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 3887251538Srpaulo else 3888251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 3889251538Srpaulo 3890251538Srpaulo fw = firmware_get(imagename); 3891264864Skevlo URTWN_LOCK(sc); 3892251538Srpaulo if (fw == NULL) { 3893251538Srpaulo device_printf(sc->sc_dev, 3894251538Srpaulo "failed loadfirmware of file %s\n", imagename); 3895251538Srpaulo return (ENOENT); 3896251538Srpaulo } 3897251538Srpaulo 3898251538Srpaulo len = fw->datasize; 3899251538Srpaulo 3900251538Srpaulo if (len < sizeof(*hdr)) { 3901251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 3902251538Srpaulo error = EINVAL; 3903251538Srpaulo goto fail; 3904251538Srpaulo } 3905251538Srpaulo ptr = fw->data; 3906251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 3907251538Srpaulo /* Check if there is a valid FW header and skip it. */ 3908251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 3909264912Skevlo (le16toh(hdr->signature) >> 4) == 0x88e || 3910251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 3911294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, 3912294471Savos "FW V%d.%d %02d-%02d %02d:%02d\n", 3913251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 3914251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 3915251538Srpaulo ptr += sizeof(*hdr); 3916251538Srpaulo len -= sizeof(*hdr); 3917251538Srpaulo } 3918251538Srpaulo 3919264912Skevlo if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) { 3920264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3921264912Skevlo urtwn_r88e_fw_reset(sc); 3922264912Skevlo else 3923264912Skevlo urtwn_fw_reset(sc); 3924251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 3925251538Srpaulo } 3926264912Skevlo 3927268487Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3928268487Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3929268487Skevlo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3930268487Skevlo R92C_SYS_FUNC_EN_CPUEN); 3931268487Skevlo } 3932251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3933251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 3934251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 3935251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 3936251538Srpaulo 3937263154Skevlo /* Reset the FWDL checksum. */ 3938263154Skevlo urtwn_write_1(sc, R92C_MCUFWDL, 3939263154Skevlo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 3940263154Skevlo 3941251538Srpaulo for (page = 0; len > 0; page++) { 3942251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 3943251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 3944251538Srpaulo if (error != 0) { 3945251538Srpaulo device_printf(sc->sc_dev, 3946251538Srpaulo "could not load firmware page\n"); 3947251538Srpaulo goto fail; 3948251538Srpaulo } 3949251538Srpaulo ptr += mlen; 3950251538Srpaulo len -= mlen; 3951251538Srpaulo } 3952251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3953251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 3954251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 3955251538Srpaulo 3956251538Srpaulo /* Wait for checksum report. */ 3957251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3958251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 3959251538Srpaulo break; 3960266472Shselasky urtwn_ms_delay(sc); 3961251538Srpaulo } 3962251538Srpaulo if (ntries == 1000) { 3963251538Srpaulo device_printf(sc->sc_dev, 3964251538Srpaulo "timeout waiting for checksum report\n"); 3965251538Srpaulo error = ETIMEDOUT; 3966251538Srpaulo goto fail; 3967251538Srpaulo } 3968251538Srpaulo 3969251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3970251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 3971251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3972264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3973264912Skevlo urtwn_r88e_fw_reset(sc); 3974251538Srpaulo /* Wait for firmware readiness. */ 3975251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3976251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 3977251538Srpaulo break; 3978266472Shselasky urtwn_ms_delay(sc); 3979251538Srpaulo } 3980251538Srpaulo if (ntries == 1000) { 3981251538Srpaulo device_printf(sc->sc_dev, 3982251538Srpaulo "timeout waiting for firmware readiness\n"); 3983251538Srpaulo error = ETIMEDOUT; 3984251538Srpaulo goto fail; 3985251538Srpaulo } 3986251538Srpaulofail: 3987251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 3988251538Srpaulo return (error); 3989251538Srpaulo} 3990295871Savos#endif 3991251538Srpaulo 3992291902Skevlostatic int 3993251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 3994251538Srpaulo{ 3995291902Skevlo struct usb_endpoint *ep, *ep_end; 3996291698Savos usb_error_t usb_err; 3997291902Skevlo uint32_t reg; 3998291902Skevlo int hashq, hasnq, haslq, nqueues, ntx; 3999291902Skevlo int error, pagecount, npubqpages, nqpages, nrempages, tx_boundary; 4000281069Srpaulo 4001291695Savos /* Initialize LLT table. */ 4002291695Savos error = urtwn_llt_init(sc); 4003291695Savos if (error != 0) 4004291695Savos return (error); 4005291695Savos 4006291902Skevlo /* Determine the number of bulk-out pipes. */ 4007291902Skevlo ntx = 0; 4008291902Skevlo ep = sc->sc_udev->endpoints; 4009291902Skevlo ep_end = sc->sc_udev->endpoints + sc->sc_udev->endpoints_max; 4010291902Skevlo for (; ep != ep_end; ep++) { 4011291902Skevlo if ((ep->edesc == NULL) || 4012291902Skevlo (ep->iface_index != sc->sc_iface_index)) 4013291902Skevlo continue; 4014291902Skevlo if (UE_GET_DIR(ep->edesc->bEndpointAddress) == UE_DIR_OUT) 4015291902Skevlo ntx++; 4016291902Skevlo } 4017291902Skevlo if (ntx == 0) { 4018291902Skevlo device_printf(sc->sc_dev, 4019291902Skevlo "%d: invalid number of Tx bulk pipes\n", ntx); 4020291698Savos return (EIO); 4021291902Skevlo } 4022291695Savos 4023251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 4024291902Skevlo hashq = hasnq = haslq = nqueues = 0; 4025291902Skevlo switch (ntx) { 4026291902Skevlo case 1: hashq = 1; break; 4027291902Skevlo case 2: hashq = hasnq = 1; break; 4028291902Skevlo case 3: case 4: hashq = hasnq = haslq = 1; break; 4029291902Skevlo } 4030251538Srpaulo nqueues = hashq + hasnq + haslq; 4031251538Srpaulo if (nqueues == 0) 4032251538Srpaulo return (EIO); 4033251538Srpaulo 4034291902Skevlo npubqpages = nqpages = nrempages = pagecount = 0; 4035291902Skevlo if (sc->chip & URTWN_CHIP_88E) 4036291902Skevlo tx_boundary = R88E_TX_PAGE_BOUNDARY; 4037291902Skevlo else { 4038291902Skevlo pagecount = R92C_TX_PAGE_COUNT; 4039291902Skevlo npubqpages = R92C_PUBQ_NPAGES; 4040291902Skevlo tx_boundary = R92C_TX_PAGE_BOUNDARY; 4041291902Skevlo } 4042291902Skevlo 4043251538Srpaulo /* Set number of pages for normal priority queue. */ 4044291902Skevlo if (sc->chip & URTWN_CHIP_88E) { 4045291902Skevlo usb_err = urtwn_write_2(sc, R92C_RQPN_NPQ, 0xd); 4046291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4047291902Skevlo return (EIO); 4048291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 0x808e000d); 4049291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4050291902Skevlo return (EIO); 4051291902Skevlo } else { 4052291902Skevlo /* Get the number of pages for each queue. */ 4053291902Skevlo nqpages = (pagecount - npubqpages) / nqueues; 4054291902Skevlo /* 4055291902Skevlo * The remaining pages are assigned to the high priority 4056291902Skevlo * queue. 4057291902Skevlo */ 4058291902Skevlo nrempages = (pagecount - npubqpages) % nqueues; 4059291902Skevlo usb_err = urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 4060291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4061291902Skevlo return (EIO); 4062291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 4063291902Skevlo /* Set number of pages for public queue. */ 4064291902Skevlo SM(R92C_RQPN_PUBQ, npubqpages) | 4065291902Skevlo /* Set number of pages for high priority queue. */ 4066291902Skevlo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 4067291902Skevlo /* Set number of pages for low priority queue. */ 4068291902Skevlo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 4069291902Skevlo /* Load values. */ 4070291902Skevlo R92C_RQPN_LD); 4071291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4072291902Skevlo return (EIO); 4073291902Skevlo } 4074251538Srpaulo 4075291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary); 4076291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4077291698Savos return (EIO); 4078291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary); 4079291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4080291698Savos return (EIO); 4081291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary); 4082291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4083291698Savos return (EIO); 4084291902Skevlo usb_err = urtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary); 4085291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4086291698Savos return (EIO); 4087291902Skevlo usb_err = urtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary); 4088291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4089291698Savos return (EIO); 4090251538Srpaulo 4091251538Srpaulo /* Set queue to USB pipe mapping. */ 4092251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 4093251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 4094251538Srpaulo if (nqueues == 1) { 4095251538Srpaulo if (hashq) 4096251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 4097251538Srpaulo else if (hasnq) 4098251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 4099251538Srpaulo else 4100251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 4101251538Srpaulo } else if (nqueues == 2) { 4102292056Skevlo /* 4103292056Skevlo * All 2-endpoints configs have high and normal 4104292056Skevlo * priority queues. 4105292056Skevlo */ 4106292056Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 4107251538Srpaulo } else 4108251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 4109291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 4110291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4111291698Savos return (EIO); 4112251538Srpaulo 4113251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 4114291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 4115291902Skevlo (sc->chip & URTWN_CHIP_88E) ? 0x23ff : 0x27ff); 4116291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4117291698Savos return (EIO); 4118251538Srpaulo 4119291902Skevlo /* Set Tx/Rx transfer page size. */ 4120291902Skevlo usb_err = urtwn_write_1(sc, R92C_PBP, 4121291902Skevlo SM(R92C_PBP_PSRX, R92C_PBP_128) | 4122291902Skevlo SM(R92C_PBP_PSTX, R92C_PBP_128)); 4123291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4124264912Skevlo return (EIO); 4125264912Skevlo 4126264912Skevlo return (0); 4127264912Skevlo} 4128264912Skevlo 4129291698Savosstatic int 4130251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 4131251538Srpaulo{ 4132291698Savos usb_error_t error; 4133251538Srpaulo int i; 4134251538Srpaulo 4135251538Srpaulo /* Write MAC initialization values. */ 4136264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4137264912Skevlo for (i = 0; i < nitems(rtl8188eu_mac); i++) { 4138291698Savos error = urtwn_write_1(sc, rtl8188eu_mac[i].reg, 4139264912Skevlo rtl8188eu_mac[i].val); 4140291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4141291698Savos return (EIO); 4142264912Skevlo } 4143264912Skevlo urtwn_write_1(sc, R92C_MAX_AGGR_NUM, 0x07); 4144264912Skevlo } else { 4145264912Skevlo for (i = 0; i < nitems(rtl8192cu_mac); i++) 4146291698Savos error = urtwn_write_1(sc, rtl8192cu_mac[i].reg, 4147264912Skevlo rtl8192cu_mac[i].val); 4148291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4149291698Savos return (EIO); 4150264912Skevlo } 4151291698Savos 4152291698Savos return (0); 4153251538Srpaulo} 4154251538Srpaulo 4155251538Srpaulostatic void 4156251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 4157251538Srpaulo{ 4158251538Srpaulo const struct urtwn_bb_prog *prog; 4159251538Srpaulo uint32_t reg; 4160264912Skevlo uint8_t crystalcap; 4161251538Srpaulo int i; 4162251538Srpaulo 4163251538Srpaulo /* Enable BB and RF. */ 4164251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 4165251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 4166251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 4167251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 4168251538Srpaulo 4169264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 4170264912Skevlo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 4171251538Srpaulo 4172251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 4173251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 4174251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 4175251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 4176251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 4177251538Srpaulo 4178264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4179264912Skevlo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 4180264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 4181264912Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 4182264912Skevlo } 4183251538Srpaulo 4184251538Srpaulo /* Select BB programming based on board type. */ 4185264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4186264912Skevlo prog = &rtl8188eu_bb_prog; 4187264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4188251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4189251538Srpaulo prog = &rtl8188ce_bb_prog; 4190251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4191251538Srpaulo prog = &rtl8188ru_bb_prog; 4192251538Srpaulo else 4193251538Srpaulo prog = &rtl8188cu_bb_prog; 4194251538Srpaulo } else { 4195251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4196251538Srpaulo prog = &rtl8192ce_bb_prog; 4197251538Srpaulo else 4198251538Srpaulo prog = &rtl8192cu_bb_prog; 4199251538Srpaulo } 4200251538Srpaulo /* Write BB initialization values. */ 4201251538Srpaulo for (i = 0; i < prog->count; i++) { 4202251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 4203266472Shselasky urtwn_ms_delay(sc); 4204251538Srpaulo } 4205251538Srpaulo 4206251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 4207251538Srpaulo /* 8192C 1T only configuration. */ 4208251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 4209251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 4210251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 4211251538Srpaulo 4212251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 4213251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 4214251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 4215251538Srpaulo 4216251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 4217251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 4218251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 4219251538Srpaulo 4220251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 4221251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 4222251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 4223251538Srpaulo 4224251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 4225251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 4226251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 4227251538Srpaulo 4228251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 4229251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4230251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 4231251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 4232251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4233251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 4234251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 4235251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4236251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 4237251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 4238251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4239251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 4240251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 4241251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4242251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 4243251538Srpaulo } 4244251538Srpaulo 4245251538Srpaulo /* Write AGC values. */ 4246251538Srpaulo for (i = 0; i < prog->agccount; i++) { 4247251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 4248251538Srpaulo prog->agcvals[i]); 4249266472Shselasky urtwn_ms_delay(sc); 4250251538Srpaulo } 4251251538Srpaulo 4252264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4253264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422); 4254266472Shselasky urtwn_ms_delay(sc); 4255264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420); 4256266472Shselasky urtwn_ms_delay(sc); 4257264912Skevlo 4258294198Savos crystalcap = sc->rom.r88e_rom.crystalcap; 4259264912Skevlo if (crystalcap == 0xff) 4260264912Skevlo crystalcap = 0x20; 4261264912Skevlo crystalcap &= 0x3f; 4262264912Skevlo reg = urtwn_bb_read(sc, R92C_AFE_XTAL_CTRL); 4263264912Skevlo urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL, 4264264912Skevlo RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 4265264912Skevlo crystalcap | crystalcap << 6)); 4266264912Skevlo } else { 4267264912Skevlo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 4268264912Skevlo R92C_HSSI_PARAM2_CCK_HIPWR) 4269264912Skevlo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 4270264912Skevlo } 4271251538Srpaulo} 4272251538Srpaulo 4273289066Skevlostatic void 4274251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 4275251538Srpaulo{ 4276251538Srpaulo const struct urtwn_rf_prog *prog; 4277251538Srpaulo uint32_t reg, type; 4278251538Srpaulo int i, j, idx, off; 4279251538Srpaulo 4280251538Srpaulo /* Select RF programming based on board type. */ 4281264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4282264912Skevlo prog = rtl8188eu_rf_prog; 4283264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4284251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4285251538Srpaulo prog = rtl8188ce_rf_prog; 4286251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4287251538Srpaulo prog = rtl8188ru_rf_prog; 4288251538Srpaulo else 4289251538Srpaulo prog = rtl8188cu_rf_prog; 4290251538Srpaulo } else 4291251538Srpaulo prog = rtl8192ce_rf_prog; 4292251538Srpaulo 4293251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4294251538Srpaulo /* Save RF_ENV control type. */ 4295251538Srpaulo idx = i / 2; 4296251538Srpaulo off = (i % 2) * 16; 4297251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4298251538Srpaulo type = (reg >> off) & 0x10; 4299251538Srpaulo 4300251538Srpaulo /* Set RF_ENV enable. */ 4301251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4302251538Srpaulo reg |= 0x100000; 4303251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4304266472Shselasky urtwn_ms_delay(sc); 4305251538Srpaulo /* Set RF_ENV output high. */ 4306251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4307251538Srpaulo reg |= 0x10; 4308251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4309266472Shselasky urtwn_ms_delay(sc); 4310251538Srpaulo /* Set address and data lengths of RF registers. */ 4311251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4312251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 4313251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4314266472Shselasky urtwn_ms_delay(sc); 4315251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4316251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 4317251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4318266472Shselasky urtwn_ms_delay(sc); 4319251538Srpaulo 4320251538Srpaulo /* Write RF initialization values for this chain. */ 4321251538Srpaulo for (j = 0; j < prog[i].count; j++) { 4322251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 4323251538Srpaulo prog[i].regs[j] <= 0xfe) { 4324251538Srpaulo /* 4325251538Srpaulo * These are fake RF registers offsets that 4326251538Srpaulo * indicate a delay is required. 4327251538Srpaulo */ 4328266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 20); /* 50ms */ 4329251538Srpaulo continue; 4330251538Srpaulo } 4331251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 4332251538Srpaulo prog[i].vals[j]); 4333266472Shselasky urtwn_ms_delay(sc); 4334251538Srpaulo } 4335251538Srpaulo 4336251538Srpaulo /* Restore RF_ENV control type. */ 4337251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4338251538Srpaulo reg &= ~(0x10 << off) | (type << off); 4339251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 4340251538Srpaulo 4341251538Srpaulo /* Cache RF register CHNLBW. */ 4342251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 4343251538Srpaulo } 4344251538Srpaulo 4345251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 4346251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 4347251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 4348251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 4349251538Srpaulo } 4350251538Srpaulo} 4351251538Srpaulo 4352251538Srpaulostatic void 4353251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 4354251538Srpaulo{ 4355251538Srpaulo /* Invalidate all CAM entries. */ 4356251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 4357251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 4358251538Srpaulo} 4359251538Srpaulo 4360292175Savosstatic int 4361292175Savosurtwn_cam_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 4362292175Savos{ 4363292175Savos usb_error_t error; 4364292175Savos 4365292175Savos error = urtwn_write_4(sc, R92C_CAMWRITE, data); 4366292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4367292175Savos return (EIO); 4368292175Savos error = urtwn_write_4(sc, R92C_CAMCMD, 4369292175Savos R92C_CAMCMD_POLLING | R92C_CAMCMD_WRITE | 4370292175Savos SM(R92C_CAMCMD_ADDR, addr)); 4371292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4372292175Savos return (EIO); 4373292175Savos 4374292175Savos return (0); 4375292175Savos} 4376292175Savos 4377251538Srpaulostatic void 4378251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 4379251538Srpaulo{ 4380251538Srpaulo uint8_t reg; 4381251538Srpaulo int i; 4382251538Srpaulo 4383251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4384251538Srpaulo if (sc->pa_setting & (1 << i)) 4385251538Srpaulo continue; 4386251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 4387251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 4388251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 4389251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 4390251538Srpaulo } 4391251538Srpaulo if (!(sc->pa_setting & 0x10)) { 4392251538Srpaulo reg = urtwn_read_1(sc, 0x16); 4393251538Srpaulo reg = (reg & ~0xf0) | 0x90; 4394251538Srpaulo urtwn_write_1(sc, 0x16, reg); 4395251538Srpaulo } 4396251538Srpaulo} 4397251538Srpaulo 4398251538Srpaulostatic void 4399251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 4400251538Srpaulo{ 4401290564Savos struct ieee80211com *ic = &sc->sc_ic; 4402290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4403290564Savos uint32_t rcr; 4404290564Savos uint16_t filter; 4405290564Savos 4406290564Savos URTWN_ASSERT_LOCKED(sc); 4407290564Savos 4408299965Savos /* Setup multicast filter. */ 4409299965Savos urtwn_set_multi(sc); 4410290564Savos 4411290564Savos /* Filter for management frames. */ 4412290564Savos filter = 0x7f3f; 4413290631Savos switch (vap->iv_opmode) { 4414290631Savos case IEEE80211_M_STA: 4415290564Savos filter &= ~( 4416290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | 4417290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | 4418290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); 4419290631Savos break; 4420290631Savos case IEEE80211_M_HOSTAP: 4421290631Savos filter &= ~( 4422290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | 4423296174Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP)); 4424290631Savos break; 4425290631Savos case IEEE80211_M_MONITOR: 4426290651Savos case IEEE80211_M_IBSS: 4427290631Savos break; 4428290631Savos default: 4429290631Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4430290631Savos __func__, vap->iv_opmode); 4431290631Savos break; 4432290564Savos } 4433290564Savos urtwn_write_2(sc, R92C_RXFLTMAP0, filter); 4434290564Savos 4435251538Srpaulo /* Reject all control frames. */ 4436251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 4437290564Savos 4438290564Savos /* Reject all data frames. */ 4439290564Savos urtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); 4440290564Savos 4441290564Savos rcr = R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | 4442290564Savos R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | 4443290564Savos R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; 4444290564Savos 4445290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) { 4446290564Savos /* Accept all frames. */ 4447290564Savos rcr |= R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | 4448290564Savos R92C_RCR_AAP; 4449290564Savos } 4450290564Savos 4451290564Savos /* Set Rx filter. */ 4452290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4453290564Savos 4454290564Savos if (ic->ic_promisc != 0) { 4455290564Savos /* Update Rx filter. */ 4456290564Savos urtwn_set_promisc(sc); 4457290564Savos } 4458251538Srpaulo} 4459251538Srpaulo 4460251538Srpaulostatic void 4461251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 4462251538Srpaulo{ 4463251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 4464251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 4465251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 4466251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 4467251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 4468251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 4469251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 4470251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 4471251538Srpaulo} 4472251538Srpaulo 4473289066Skevlostatic void 4474251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 4475251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4476251538Srpaulo{ 4477251538Srpaulo uint32_t reg; 4478251538Srpaulo 4479251538Srpaulo /* Write per-CCK rate Tx power. */ 4480251538Srpaulo if (chain == 0) { 4481251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 4482251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 4483251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 4484251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4485251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 4486251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 4487251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 4488251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4489251538Srpaulo } else { 4490251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 4491251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 4492251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 4493251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 4494251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 4495251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4496251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 4497251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4498251538Srpaulo } 4499251538Srpaulo /* Write per-OFDM rate Tx power. */ 4500251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 4501251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 4502251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 4503251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 4504251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 4505251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 4506251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 4507251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 4508251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 4509251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 4510251538Srpaulo /* Write per-MCS Tx power. */ 4511251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 4512251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 4513251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 4514251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 4515251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 4516251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 4517251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 4518251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 4519251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 4520251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 4521251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 4522251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 4523261506Skevlo SM(R92C_TXAGC_MCS09, power[21]) | 4524251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 4525251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 4526251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 4527251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 4528251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 4529251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 4530251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 4531251538Srpaulo} 4532251538Srpaulo 4533289066Skevlostatic void 4534251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 4535251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4536251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4537251538Srpaulo{ 4538287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4539291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 4540251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 4541251538Srpaulo const struct urtwn_txpwr *base; 4542251538Srpaulo int ridx, chan, group; 4543251538Srpaulo 4544251538Srpaulo /* Determine channel group. */ 4545251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4546251538Srpaulo if (chan <= 3) 4547251538Srpaulo group = 0; 4548251538Srpaulo else if (chan <= 9) 4549251538Srpaulo group = 1; 4550251538Srpaulo else 4551251538Srpaulo group = 2; 4552251538Srpaulo 4553251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 4554251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 4555251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4556251538Srpaulo base = &rtl8188ru_txagc[chain]; 4557251538Srpaulo else 4558251538Srpaulo base = &rtl8192cu_txagc[chain]; 4559251538Srpaulo } else 4560251538Srpaulo base = &rtl8192cu_txagc[chain]; 4561251538Srpaulo 4562251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4563251538Srpaulo if (sc->regulatory == 0) { 4564289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4565251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4566251538Srpaulo } 4567289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4568251538Srpaulo if (sc->regulatory == 3) { 4569251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4570251538Srpaulo /* Apply vendor limits. */ 4571251538Srpaulo if (extc != NULL) 4572251538Srpaulo max = rom->ht40_max_pwr[group]; 4573251538Srpaulo else 4574251538Srpaulo max = rom->ht20_max_pwr[group]; 4575251538Srpaulo max = (max >> (chain * 4)) & 0xf; 4576251538Srpaulo if (power[ridx] > max) 4577251538Srpaulo power[ridx] = max; 4578251538Srpaulo } else if (sc->regulatory == 1) { 4579251538Srpaulo if (extc == NULL) 4580251538Srpaulo power[ridx] = base->pwr[group][ridx]; 4581251538Srpaulo } else if (sc->regulatory != 2) 4582251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4583251538Srpaulo } 4584251538Srpaulo 4585251538Srpaulo /* Compute per-CCK rate Tx power. */ 4586251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 4587289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4588251538Srpaulo power[ridx] += cckpow; 4589251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4590251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4591251538Srpaulo } 4592251538Srpaulo 4593251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 4594251538Srpaulo if (sc->ntxchains > 1) { 4595251538Srpaulo /* Apply reduction for 2 spatial streams. */ 4596251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 4597251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4598251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 4599251538Srpaulo } 4600251538Srpaulo 4601251538Srpaulo /* Compute per-OFDM rate Tx power. */ 4602251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 4603251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4604251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 4605289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4606251538Srpaulo power[ridx] += ofdmpow; 4607251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4608251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4609251538Srpaulo } 4610251538Srpaulo 4611251538Srpaulo /* Compute per-MCS Tx power. */ 4612251538Srpaulo if (extc == NULL) { 4613251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 4614251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4615251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 4616251538Srpaulo } 4617251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 4618251538Srpaulo power[ridx] += htpow; 4619251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4620251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4621251538Srpaulo } 4622294471Savos#ifdef USB_DEBUG 4623294471Savos if (sc->sc_debug & URTWN_DEBUG_TXPWR) { 4624251538Srpaulo /* Dump per-rate Tx power values. */ 4625251538Srpaulo printf("Tx power for chain %d:\n", chain); 4626289758Savos for (ridx = URTWN_RIDX_CCK1; ridx < URTWN_RIDX_COUNT; ridx++) 4627251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 4628251538Srpaulo } 4629251538Srpaulo#endif 4630251538Srpaulo} 4631251538Srpaulo 4632289066Skevlostatic void 4633264912Skevlourtwn_r88e_get_txpower(struct urtwn_softc *sc, int chain, 4634264912Skevlo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4635264912Skevlo uint16_t power[URTWN_RIDX_COUNT]) 4636264912Skevlo{ 4637287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4638294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 4639264912Skevlo uint16_t cckpow, ofdmpow, bw20pow, htpow; 4640264912Skevlo const struct urtwn_r88e_txpwr *base; 4641264912Skevlo int ridx, chan, group; 4642264912Skevlo 4643264912Skevlo /* Determine channel group. */ 4644264912Skevlo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4645264912Skevlo if (chan <= 2) 4646264912Skevlo group = 0; 4647264912Skevlo else if (chan <= 5) 4648264912Skevlo group = 1; 4649264912Skevlo else if (chan <= 8) 4650264912Skevlo group = 2; 4651264912Skevlo else if (chan <= 11) 4652264912Skevlo group = 3; 4653264912Skevlo else if (chan <= 13) 4654264912Skevlo group = 4; 4655264912Skevlo else 4656264912Skevlo group = 5; 4657264912Skevlo 4658264912Skevlo /* Get original Tx power based on board type and RF chain. */ 4659264912Skevlo base = &rtl8188eu_txagc[chain]; 4660264912Skevlo 4661264912Skevlo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4662264912Skevlo if (sc->regulatory == 0) { 4663289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4664264912Skevlo power[ridx] = base->pwr[0][ridx]; 4665264912Skevlo } 4666289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4667264912Skevlo if (sc->regulatory == 3) 4668264912Skevlo power[ridx] = base->pwr[0][ridx]; 4669264912Skevlo else if (sc->regulatory == 1) { 4670264912Skevlo if (extc == NULL) 4671264912Skevlo power[ridx] = base->pwr[group][ridx]; 4672264912Skevlo } else if (sc->regulatory != 2) 4673264912Skevlo power[ridx] = base->pwr[0][ridx]; 4674264912Skevlo } 4675264912Skevlo 4676264912Skevlo /* Compute per-CCK rate Tx power. */ 4677294198Savos cckpow = rom->cck_tx_pwr[group]; 4678289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4679264912Skevlo power[ridx] += cckpow; 4680264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4681264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4682264912Skevlo } 4683264912Skevlo 4684294198Savos htpow = rom->ht40_tx_pwr[group]; 4685264912Skevlo 4686264912Skevlo /* Compute per-OFDM rate Tx power. */ 4687264912Skevlo ofdmpow = htpow + sc->ofdm_tx_pwr_diff; 4688289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4689264912Skevlo power[ridx] += ofdmpow; 4690264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4691264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4692264912Skevlo } 4693264912Skevlo 4694264912Skevlo bw20pow = htpow + sc->bw20_tx_pwr_diff; 4695264912Skevlo for (ridx = 12; ridx <= 27; ridx++) { 4696264912Skevlo power[ridx] += bw20pow; 4697264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4698264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4699264912Skevlo } 4700264912Skevlo} 4701264912Skevlo 4702289066Skevlostatic void 4703251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 4704251538Srpaulo struct ieee80211_channel *extc) 4705251538Srpaulo{ 4706251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 4707251538Srpaulo int i; 4708251538Srpaulo 4709251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 4710251538Srpaulo /* Compute per-rate Tx power values. */ 4711264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4712264912Skevlo urtwn_r88e_get_txpower(sc, i, c, extc, power); 4713264912Skevlo else 4714264912Skevlo urtwn_get_txpower(sc, i, c, extc, power); 4715251538Srpaulo /* Write per-rate Tx power values to hardware. */ 4716251538Srpaulo urtwn_write_txpower(sc, i, power); 4717251538Srpaulo } 4718251538Srpaulo} 4719251538Srpaulo 4720251538Srpaulostatic void 4721290048Savosurtwn_set_rx_bssid_all(struct urtwn_softc *sc, int enable) 4722290048Savos{ 4723290048Savos uint32_t reg; 4724290048Savos 4725290048Savos reg = urtwn_read_4(sc, R92C_RCR); 4726290048Savos if (enable) 4727290048Savos reg &= ~R92C_RCR_CBSSID_BCN; 4728290048Savos else 4729290048Savos reg |= R92C_RCR_CBSSID_BCN; 4730290048Savos urtwn_write_4(sc, R92C_RCR, reg); 4731290048Savos} 4732290048Savos 4733290048Savosstatic void 4734290048Savosurtwn_set_gain(struct urtwn_softc *sc, uint8_t gain) 4735290048Savos{ 4736290048Savos uint32_t reg; 4737290048Savos 4738290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 4739290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4740290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 4741290048Savos 4742290048Savos if (!(sc->chip & URTWN_CHIP_88E)) { 4743290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 4744290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4745290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 4746290048Savos } 4747290048Savos} 4748290048Savos 4749290048Savosstatic void 4750251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 4751251538Srpaulo{ 4752290048Savos struct urtwn_softc *sc = ic->ic_softc; 4753290048Savos 4754290048Savos URTWN_LOCK(sc); 4755290048Savos /* Receive beacons / probe responses from any BSSID. */ 4756301128Savos if (ic->ic_opmode != IEEE80211_M_IBSS && 4757301128Savos ic->ic_opmode != IEEE80211_M_HOSTAP) 4758290651Savos urtwn_set_rx_bssid_all(sc, 1); 4759290651Savos 4760290048Savos /* Set gain for scanning. */ 4761290048Savos urtwn_set_gain(sc, 0x20); 4762290048Savos URTWN_UNLOCK(sc); 4763251538Srpaulo} 4764251538Srpaulo 4765251538Srpaulostatic void 4766251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 4767251538Srpaulo{ 4768290048Savos struct urtwn_softc *sc = ic->ic_softc; 4769290048Savos 4770290048Savos URTWN_LOCK(sc); 4771290048Savos /* Restore limitations. */ 4772301128Savos if (ic->ic_promisc == 0 && 4773301128Savos ic->ic_opmode != IEEE80211_M_IBSS && 4774301128Savos ic->ic_opmode != IEEE80211_M_HOSTAP) 4775290564Savos urtwn_set_rx_bssid_all(sc, 0); 4776290651Savos 4777290048Savos /* Set gain under link. */ 4778290048Savos urtwn_set_gain(sc, 0x32); 4779290048Savos URTWN_UNLOCK(sc); 4780251538Srpaulo} 4781251538Srpaulo 4782251538Srpaulostatic void 4783300754Savosurtwn_getradiocaps(struct ieee80211com *ic, 4784300754Savos int maxchans, int *nchans, struct ieee80211_channel chans[]) 4785300754Savos{ 4786300754Savos uint8_t bands[IEEE80211_MODE_BYTES]; 4787300754Savos 4788300754Savos memset(bands, 0, sizeof(bands)); 4789300754Savos setbit(bands, IEEE80211_MODE_11B); 4790300754Savos setbit(bands, IEEE80211_MODE_11G); 4791300754Savos if (urtwn_enable_11n) 4792300754Savos setbit(bands, IEEE80211_MODE_11NG); 4793300754Savos ieee80211_add_channel_list_2ghz(chans, maxchans, nchans, 4794300754Savos urtwn_chan_2ghz, nitems(urtwn_chan_2ghz), bands, 0); 4795300754Savos} 4796300754Savos 4797300754Savosstatic void 4798251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 4799251538Srpaulo{ 4800286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4801292173Savos struct ieee80211_channel *c = ic->ic_curchan; 4802281070Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4803251538Srpaulo 4804251538Srpaulo URTWN_LOCK(sc); 4805281070Srpaulo if (vap->iv_state == IEEE80211_S_SCAN) { 4806281070Srpaulo /* Make link LED blink during scan. */ 4807281070Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 4808281070Srpaulo } 4809292173Savos urtwn_set_chan(sc, c, NULL); 4810292173Savos sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq); 4811292173Savos sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags); 4812292173Savos sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq); 4813292173Savos sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags); 4814251538Srpaulo URTWN_UNLOCK(sc); 4815251538Srpaulo} 4816251538Srpaulo 4817292014Savosstatic int 4818292014Savosurtwn_wme_update(struct ieee80211com *ic) 4819292014Savos{ 4820292014Savos const struct wmeParams *wmep = 4821292014Savos ic->ic_wme.wme_chanParams.cap_wmeParams; 4822292014Savos struct urtwn_softc *sc = ic->ic_softc; 4823292014Savos uint8_t aifs, acm, slottime; 4824292014Savos int ac; 4825292014Savos 4826292014Savos acm = 0; 4827292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4828292014Savos 4829292014Savos URTWN_LOCK(sc); 4830292014Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4831292014Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4832292014Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4833292014Savos urtwn_write_4(sc, wme2queue[ac].reg, 4834292014Savos SM(R92C_EDCA_PARAM_TXOP, wmep[ac].wmep_txopLimit) | 4835292014Savos SM(R92C_EDCA_PARAM_ECWMIN, wmep[ac].wmep_logcwmin) | 4836292014Savos SM(R92C_EDCA_PARAM_ECWMAX, wmep[ac].wmep_logcwmax) | 4837292014Savos SM(R92C_EDCA_PARAM_AIFS, aifs)); 4838292014Savos if (ac != WME_AC_BE) 4839292014Savos acm |= wmep[ac].wmep_acm << ac; 4840292014Savos } 4841292014Savos 4842292014Savos if (acm != 0) 4843292014Savos acm |= R92C_ACMHWCTRL_EN; 4844292014Savos urtwn_write_1(sc, R92C_ACMHWCTRL, 4845292014Savos (urtwn_read_1(sc, R92C_ACMHWCTRL) & ~R92C_ACMHWCTRL_ACM_MASK) | 4846292014Savos acm); 4847292014Savos 4848292014Savos URTWN_UNLOCK(sc); 4849292014Savos 4850292014Savos return 0; 4851292014Savos} 4852292014Savos 4853251538Srpaulostatic void 4854294465Savosurtwn_update_slot(struct ieee80211com *ic) 4855294465Savos{ 4856294465Savos urtwn_cmd_sleepable(ic->ic_softc, NULL, 0, urtwn_update_slot_cb); 4857294465Savos} 4858294465Savos 4859294465Savosstatic void 4860294465Savosurtwn_update_slot_cb(struct urtwn_softc *sc, union sec_param *data) 4861294465Savos{ 4862294465Savos struct ieee80211com *ic = &sc->sc_ic; 4863294465Savos uint8_t slottime; 4864294465Savos 4865294465Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4866294465Savos 4867294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ANY, "%s: setting slot time to %uus\n", 4868294471Savos __func__, slottime); 4869294465Savos 4870294465Savos urtwn_write_1(sc, R92C_SLOT, slottime); 4871294465Savos urtwn_update_aifs(sc, slottime); 4872294465Savos} 4873294465Savos 4874294465Savosstatic void 4875294465Savosurtwn_update_aifs(struct urtwn_softc *sc, uint8_t slottime) 4876294465Savos{ 4877294465Savos const struct wmeParams *wmep = 4878294465Savos sc->sc_ic.ic_wme.wme_chanParams.cap_wmeParams; 4879294465Savos uint8_t aifs, ac; 4880294465Savos 4881294465Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4882294465Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4883294465Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4884294465Savos urtwn_write_1(sc, wme2queue[ac].reg, aifs); 4885294465Savos } 4886294465Savos} 4887294465Savos 4888299965Savosstatic uint8_t 4889299965Savosurtwn_get_multi_pos(const uint8_t maddr[]) 4890299965Savos{ 4891299965Savos uint64_t mask = 0x00004d101df481b4; 4892299965Savos uint8_t pos = 0x27; /* initial value */ 4893299965Savos int i, j; 4894299965Savos 4895299965Savos for (i = 0; i < IEEE80211_ADDR_LEN; i++) 4896299965Savos for (j = (i == 0) ? 1 : 0; j < 8; j++) 4897299965Savos if ((maddr[i] >> j) & 1) 4898299965Savos pos ^= (mask >> (i * 8 + j - 1)); 4899299965Savos 4900299965Savos pos &= 0x3f; 4901299965Savos 4902299965Savos return (pos); 4903299965Savos} 4904299965Savos 4905294465Savosstatic void 4906299965Savosurtwn_set_multi(struct urtwn_softc *sc) 4907299965Savos{ 4908299965Savos struct ieee80211com *ic = &sc->sc_ic; 4909299965Savos uint32_t mfilt[2]; 4910299965Savos 4911299965Savos URTWN_ASSERT_LOCKED(sc); 4912299965Savos 4913299965Savos /* general structure was copied from ath(4). */ 4914299965Savos if (ic->ic_allmulti == 0) { 4915299965Savos struct ieee80211vap *vap; 4916299965Savos struct ifnet *ifp; 4917299965Savos struct ifmultiaddr *ifma; 4918299965Savos 4919299965Savos /* 4920299965Savos * Merge multicast addresses to form the hardware filter. 4921299965Savos */ 4922299965Savos mfilt[0] = mfilt[1] = 0; 4923299965Savos TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { 4924299965Savos ifp = vap->iv_ifp; 4925299965Savos if_maddr_rlock(ifp); 4926299965Savos TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 4927299965Savos caddr_t dl; 4928299965Savos uint8_t pos; 4929299965Savos 4930299965Savos dl = LLADDR((struct sockaddr_dl *) 4931299965Savos ifma->ifma_addr); 4932299965Savos pos = urtwn_get_multi_pos(dl); 4933299965Savos 4934299965Savos mfilt[pos / 32] |= (1 << (pos % 32)); 4935299965Savos } 4936299965Savos if_maddr_runlock(ifp); 4937299965Savos } 4938299965Savos } else 4939299965Savos mfilt[0] = mfilt[1] = ~0; 4940299965Savos 4941299965Savos 4942299965Savos urtwn_write_4(sc, R92C_MAR + 0, mfilt[0]); 4943299965Savos urtwn_write_4(sc, R92C_MAR + 4, mfilt[1]); 4944299965Savos 4945299965Savos URTWN_DPRINTF(sc, URTWN_DEBUG_STATE, "%s: MC filter %08x:%08x\n", 4946299965Savos __func__, mfilt[0], mfilt[1]); 4947299965Savos} 4948299965Savos 4949299965Savosstatic void 4950290564Savosurtwn_set_promisc(struct urtwn_softc *sc) 4951290564Savos{ 4952290564Savos struct ieee80211com *ic = &sc->sc_ic; 4953290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4954290564Savos uint32_t rcr, mask1, mask2; 4955290564Savos 4956290564Savos URTWN_ASSERT_LOCKED(sc); 4957290564Savos 4958290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) 4959290564Savos return; 4960290564Savos 4961290564Savos mask1 = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; 4962290564Savos mask2 = R92C_RCR_APM; 4963290564Savos 4964290564Savos if (vap->iv_state == IEEE80211_S_RUN) { 4965290564Savos switch (vap->iv_opmode) { 4966290564Savos case IEEE80211_M_STA: 4967301128Savos mask2 |= R92C_RCR_CBSSID_BCN; 4968290631Savos /* FALLTHROUGH */ 4969290651Savos case IEEE80211_M_IBSS: 4970290651Savos mask2 |= R92C_RCR_CBSSID_DATA; 4971290651Savos break; 4972301128Savos case IEEE80211_M_HOSTAP: 4973301128Savos break; 4974290564Savos default: 4975290564Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4976290564Savos __func__, vap->iv_opmode); 4977290564Savos return; 4978290564Savos } 4979290564Savos } 4980290564Savos 4981290564Savos rcr = urtwn_read_4(sc, R92C_RCR); 4982290564Savos if (ic->ic_promisc == 0) 4983290564Savos rcr = (rcr & ~mask1) | mask2; 4984290564Savos else 4985290564Savos rcr = (rcr & ~mask2) | mask1; 4986290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4987290564Savos} 4988290564Savos 4989290564Savosstatic void 4990290564Savosurtwn_update_promisc(struct ieee80211com *ic) 4991290564Savos{ 4992290564Savos struct urtwn_softc *sc = ic->ic_softc; 4993290564Savos 4994290564Savos URTWN_LOCK(sc); 4995290564Savos if (sc->sc_flags & URTWN_RUNNING) 4996290564Savos urtwn_set_promisc(sc); 4997290564Savos URTWN_UNLOCK(sc); 4998290564Savos} 4999290564Savos 5000290564Savosstatic void 5001283540Sglebiusurtwn_update_mcast(struct ieee80211com *ic) 5002251538Srpaulo{ 5003299965Savos struct urtwn_softc *sc = ic->ic_softc; 5004299965Savos 5005299965Savos URTWN_LOCK(sc); 5006299965Savos if (sc->sc_flags & URTWN_RUNNING) 5007299965Savos urtwn_set_multi(sc); 5008299965Savos URTWN_UNLOCK(sc); 5009251538Srpaulo} 5010251538Srpaulo 5011292167Savosstatic struct ieee80211_node * 5012297910Sadrianurtwn_node_alloc(struct ieee80211vap *vap, 5013292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]) 5014292167Savos{ 5015292167Savos struct urtwn_node *un; 5016292167Savos 5017292167Savos un = malloc(sizeof (struct urtwn_node), M_80211_NODE, 5018292167Savos M_NOWAIT | M_ZERO); 5019292167Savos 5020292167Savos if (un == NULL) 5021292167Savos return NULL; 5022292167Savos 5023292167Savos un->id = URTWN_MACID_UNDEFINED; 5024292167Savos 5025292167Savos return &un->ni; 5026292167Savos} 5027292167Savos 5028251538Srpaulostatic void 5029297910Sadrianurtwn_newassoc(struct ieee80211_node *ni, int isnew) 5030292167Savos{ 5031292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 5032292167Savos struct urtwn_node *un = URTWN_NODE(ni); 5033292167Savos uint8_t id; 5034292167Savos 5035297910Sadrian /* Only do this bit for R88E chips */ 5036297910Sadrian if (! (sc->chip & URTWN_CHIP_88E)) 5037297910Sadrian return; 5038297910Sadrian 5039292167Savos if (!isnew) 5040292167Savos return; 5041292167Savos 5042292167Savos URTWN_NT_LOCK(sc); 5043292167Savos for (id = 0; id <= URTWN_MACID_MAX(sc); id++) { 5044292167Savos if (id != URTWN_MACID_BC && sc->node_list[id] == NULL) { 5045292167Savos un->id = id; 5046292167Savos sc->node_list[id] = ni; 5047292167Savos break; 5048292167Savos } 5049292167Savos } 5050292167Savos URTWN_NT_UNLOCK(sc); 5051292167Savos 5052292167Savos if (id > URTWN_MACID_MAX(sc)) { 5053292167Savos device_printf(sc->sc_dev, "%s: node table is full\n", 5054292167Savos __func__); 5055292167Savos } 5056292167Savos} 5057292167Savos 5058292167Savosstatic void 5059297910Sadrianurtwn_node_free(struct ieee80211_node *ni) 5060292167Savos{ 5061292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 5062292167Savos struct urtwn_node *un = URTWN_NODE(ni); 5063292167Savos 5064292167Savos URTWN_NT_LOCK(sc); 5065292167Savos if (un->id != URTWN_MACID_UNDEFINED) 5066292167Savos sc->node_list[un->id] = NULL; 5067292167Savos URTWN_NT_UNLOCK(sc); 5068292167Savos 5069292167Savos sc->sc_node_free(ni); 5070292167Savos} 5071292167Savos 5072292167Savosstatic void 5073251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 5074251538Srpaulo struct ieee80211_channel *extc) 5075251538Srpaulo{ 5076287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 5077251538Srpaulo uint32_t reg; 5078251538Srpaulo u_int chan; 5079251538Srpaulo int i; 5080251538Srpaulo 5081251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 5082251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 5083251538Srpaulo device_printf(sc->sc_dev, 5084251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 5085251538Srpaulo return; 5086251538Srpaulo } 5087251538Srpaulo 5088251538Srpaulo /* Set Tx power for this new channel. */ 5089251538Srpaulo urtwn_set_txpower(sc, c, extc); 5090251538Srpaulo 5091251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 5092251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 5093251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 5094251538Srpaulo } 5095251538Srpaulo#ifndef IEEE80211_NO_HT 5096251538Srpaulo if (extc != NULL) { 5097251538Srpaulo /* Is secondary channel below or above primary? */ 5098251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 5099251538Srpaulo 5100251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 5101251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 5102251538Srpaulo 5103251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 5104251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 5105251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 5106251538Srpaulo 5107251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 5108251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 5109251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 5110251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 5111251538Srpaulo 5112251538Srpaulo /* Set CCK side band. */ 5113251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 5114251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 5115251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 5116251538Srpaulo 5117251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 5118251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 5119251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 5120251538Srpaulo 5121251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 5122251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 5123251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 5124251538Srpaulo 5125251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 5126251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 5127251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 5128251538Srpaulo 5129251538Srpaulo /* Select 40MHz bandwidth. */ 5130251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5131251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 5132251538Srpaulo } else 5133251538Srpaulo#endif 5134251538Srpaulo { 5135251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 5136251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 5137251538Srpaulo 5138251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 5139251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 5140251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 5141251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 5142251538Srpaulo 5143264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5144264912Skevlo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 5145264912Skevlo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 5146264912Skevlo R92C_FPGA0_ANAPARAM2_CBW20); 5147264912Skevlo } 5148281069Srpaulo 5149251538Srpaulo /* Select 20MHz bandwidth. */ 5150251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5151281069Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan | 5152264912Skevlo ((sc->chip & URTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 : 5153264912Skevlo R92C_RF_CHNLBW_BW20)); 5154251538Srpaulo } 5155251538Srpaulo} 5156251538Srpaulo 5157251538Srpaulostatic void 5158251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 5159251538Srpaulo{ 5160251538Srpaulo /* TODO */ 5161251538Srpaulo} 5162251538Srpaulo 5163251538Srpaulostatic void 5164251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 5165251538Srpaulo{ 5166251538Srpaulo uint32_t rf_ac[2]; 5167251538Srpaulo uint8_t txmode; 5168251538Srpaulo int i; 5169251538Srpaulo 5170251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 5171251538Srpaulo if ((txmode & 0x70) != 0) { 5172251538Srpaulo /* Disable all continuous Tx. */ 5173251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 5174251538Srpaulo 5175251538Srpaulo /* Set RF mode to standby mode. */ 5176251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 5177251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 5178251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 5179251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 5180251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 5181251538Srpaulo } 5182251538Srpaulo } else { 5183251538Srpaulo /* Block all Tx queues. */ 5184293180Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 5185251538Srpaulo } 5186251538Srpaulo /* Start calibration. */ 5187251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5188251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 5189251538Srpaulo 5190251538Srpaulo /* Give calibration the time to complete. */ 5191266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 10); /* 100ms */ 5192251538Srpaulo 5193251538Srpaulo /* Restore configuration. */ 5194251538Srpaulo if ((txmode & 0x70) != 0) { 5195251538Srpaulo /* Restore Tx mode. */ 5196251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 5197251538Srpaulo /* Restore RF mode. */ 5198251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 5199251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 5200251538Srpaulo } else { 5201251538Srpaulo /* Unblock all Tx queues. */ 5202251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 5203251538Srpaulo } 5204251538Srpaulo} 5205251538Srpaulo 5206294473Savosstatic void 5207294473Savosurtwn_temp_calib(struct urtwn_softc *sc) 5208294473Savos{ 5209294473Savos uint8_t temp; 5210294473Savos 5211294473Savos URTWN_ASSERT_LOCKED(sc); 5212294473Savos 5213294473Savos if (!(sc->sc_flags & URTWN_TEMP_MEASURED)) { 5214294473Savos /* Start measuring temperature. */ 5215294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5216294473Savos "%s: start measuring temperature\n", __func__); 5217294473Savos if (sc->chip & URTWN_CHIP_88E) { 5218294473Savos urtwn_rf_write(sc, 0, R88E_RF_T_METER, 5219294473Savos R88E_RF_T_METER_START); 5220294473Savos } else { 5221294473Savos urtwn_rf_write(sc, 0, R92C_RF_T_METER, 5222294473Savos R92C_RF_T_METER_START); 5223294473Savos } 5224294473Savos sc->sc_flags |= URTWN_TEMP_MEASURED; 5225294473Savos return; 5226294473Savos } 5227294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 5228294473Savos 5229294473Savos /* Read measured temperature. */ 5230294473Savos if (sc->chip & URTWN_CHIP_88E) { 5231294473Savos temp = MS(urtwn_rf_read(sc, 0, R88E_RF_T_METER), 5232294473Savos R88E_RF_T_METER_VAL); 5233294473Savos } else { 5234294473Savos temp = MS(urtwn_rf_read(sc, 0, R92C_RF_T_METER), 5235294473Savos R92C_RF_T_METER_VAL); 5236294473Savos } 5237294473Savos if (temp == 0) { /* Read failed, skip. */ 5238294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5239294473Savos "%s: temperature read failed, skipping\n", __func__); 5240294473Savos return; 5241294473Savos } 5242294473Savos 5243294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5244294473Savos "%s: temperature: previous %u, current %u\n", 5245294473Savos __func__, sc->thcal_lctemp, temp); 5246294473Savos 5247294473Savos /* 5248294473Savos * Redo LC calibration if temperature changed significantly since 5249294473Savos * last calibration. 5250294473Savos */ 5251294473Savos if (sc->thcal_lctemp == 0) { 5252294473Savos /* First LC calibration is performed in urtwn_init(). */ 5253294473Savos sc->thcal_lctemp = temp; 5254294473Savos } else if (abs(temp - sc->thcal_lctemp) > 1) { 5255294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5256294473Savos "%s: LC calib triggered by temp: %u -> %u\n", 5257294473Savos __func__, sc->thcal_lctemp, temp); 5258294473Savos urtwn_lc_calib(sc); 5259294473Savos /* Record temperature of last LC calibration. */ 5260294473Savos sc->thcal_lctemp = temp; 5261294473Savos } 5262294473Savos} 5263294473Savos 5264301762Savosstatic void 5265301762Savosurtwn_setup_static_keys(struct urtwn_softc *sc, struct urtwn_vap *uvp) 5266301762Savos{ 5267301762Savos int i; 5268301762Savos 5269301762Savos for (i = 0; i < IEEE80211_WEP_NKID; i++) { 5270301762Savos const struct ieee80211_key *k = uvp->keys[i]; 5271301762Savos if (k != NULL) { 5272301762Savos urtwn_cmd_sleepable(sc, k, sizeof(*k), 5273301762Savos urtwn_key_set_cb); 5274301762Savos } 5275301762Savos } 5276301762Savos} 5277301762Savos 5278291698Savosstatic int 5279287197Sglebiusurtwn_init(struct urtwn_softc *sc) 5280251538Srpaulo{ 5281287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 5282287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 5283287197Sglebius uint8_t macaddr[IEEE80211_ADDR_LEN]; 5284251538Srpaulo uint32_t reg; 5285291698Savos usb_error_t usb_err = USB_ERR_NORMAL_COMPLETION; 5286251538Srpaulo int error; 5287251538Srpaulo 5288291698Savos URTWN_LOCK(sc); 5289291698Savos if (sc->sc_flags & URTWN_RUNNING) { 5290291698Savos URTWN_UNLOCK(sc); 5291291698Savos return (0); 5292291698Savos } 5293264864Skevlo 5294251538Srpaulo /* Init firmware commands ring. */ 5295251538Srpaulo sc->fwcur = 0; 5296251538Srpaulo 5297251538Srpaulo /* Allocate Tx/Rx buffers. */ 5298251538Srpaulo error = urtwn_alloc_rx_list(sc); 5299251538Srpaulo if (error != 0) 5300251538Srpaulo goto fail; 5301281069Srpaulo 5302251538Srpaulo error = urtwn_alloc_tx_list(sc); 5303251538Srpaulo if (error != 0) 5304251538Srpaulo goto fail; 5305251538Srpaulo 5306251538Srpaulo /* Power on adapter. */ 5307251538Srpaulo error = urtwn_power_on(sc); 5308251538Srpaulo if (error != 0) 5309251538Srpaulo goto fail; 5310251538Srpaulo 5311251538Srpaulo /* Initialize DMA. */ 5312251538Srpaulo error = urtwn_dma_init(sc); 5313251538Srpaulo if (error != 0) 5314251538Srpaulo goto fail; 5315251538Srpaulo 5316251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 5317251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 5318251538Srpaulo 5319251538Srpaulo /* Init interrupts. */ 5320264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5321291698Savos usb_err = urtwn_write_4(sc, R88E_HISR, 0xffffffff); 5322291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5323291698Savos goto fail; 5324291698Savos usb_err = urtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | 5325264912Skevlo R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); 5326291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5327291698Savos goto fail; 5328291698Savos usb_err = urtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | 5329264912Skevlo R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); 5330291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5331291698Savos goto fail; 5332291698Savos usb_err = urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5333264912Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5334264912Skevlo R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); 5335291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5336291698Savos goto fail; 5337264912Skevlo } else { 5338291698Savos usb_err = urtwn_write_4(sc, R92C_HISR, 0xffffffff); 5339291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5340291698Savos goto fail; 5341291698Savos usb_err = urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 5342291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5343291698Savos goto fail; 5344264912Skevlo } 5345251538Srpaulo 5346251538Srpaulo /* Set MAC address. */ 5347287197Sglebius IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 5348291698Savos usb_err = urtwn_write_region_1(sc, R92C_MACID, macaddr, IEEE80211_ADDR_LEN); 5349291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5350291698Savos goto fail; 5351251538Srpaulo 5352251538Srpaulo /* Set initial network type. */ 5353289811Savos urtwn_set_mode(sc, R92C_MSR_INFRA); 5354251538Srpaulo 5355290564Savos /* Initialize Rx filter. */ 5356251538Srpaulo urtwn_rxfilter_init(sc); 5357251538Srpaulo 5358282623Skevlo /* Set response rate. */ 5359251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 5360251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 5361251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 5362251538Srpaulo 5363251538Srpaulo /* Set short/long retry limits. */ 5364251538Srpaulo urtwn_write_2(sc, R92C_RL, 5365251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 5366251538Srpaulo 5367251538Srpaulo /* Initialize EDCA parameters. */ 5368251538Srpaulo urtwn_edca_init(sc); 5369251538Srpaulo 5370251538Srpaulo /* Setup rate fallback. */ 5371264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5372264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 5373264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 5374264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 5375264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 5376264912Skevlo } 5377251538Srpaulo 5378251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 5379251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 5380251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 5381251538Srpaulo /* Set ACK timeout. */ 5382251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 5383251538Srpaulo 5384251538Srpaulo /* Setup USB aggregation. */ 5385251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 5386251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 5387251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 5388251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 5389251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 5390251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 5391251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 5392264912Skevlo if (sc->chip & URTWN_CHIP_88E) 5393264912Skevlo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); 5394282266Skevlo else { 5395264912Skevlo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 5396282266Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5397282266Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5398282266Skevlo R92C_USB_SPECIAL_OPTION_AGG_EN); 5399282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 5400282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 5401282266Skevlo } 5402251538Srpaulo 5403251538Srpaulo /* Initialize beacon parameters. */ 5404264912Skevlo urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010); 5405251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 5406251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 5407251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 5408251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 5409251538Srpaulo 5410264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5411264912Skevlo /* Setup AMPDU aggregation. */ 5412264912Skevlo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 5413264912Skevlo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 5414264912Skevlo urtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); 5415251538Srpaulo 5416264912Skevlo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 5417264912Skevlo } 5418251538Srpaulo 5419295871Savos#ifndef URTWN_WITHOUT_UCODE 5420251538Srpaulo /* Load 8051 microcode. */ 5421251538Srpaulo error = urtwn_load_firmware(sc); 5422295871Savos if (error == 0) 5423295871Savos sc->sc_flags |= URTWN_FW_LOADED; 5424295871Savos#endif 5425251538Srpaulo 5426251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 5427291698Savos error = urtwn_mac_init(sc); 5428291698Savos if (error != 0) { 5429291698Savos device_printf(sc->sc_dev, 5430291698Savos "%s: error while initializing MAC block\n", __func__); 5431291698Savos goto fail; 5432291698Savos } 5433251538Srpaulo urtwn_bb_init(sc); 5434251538Srpaulo urtwn_rf_init(sc); 5435251538Srpaulo 5436290564Savos /* Reinitialize Rx filter (D3845 is not committed yet). */ 5437290564Savos urtwn_rxfilter_init(sc); 5438290564Savos 5439264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5440264912Skevlo urtwn_write_2(sc, R92C_CR, 5441264912Skevlo urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN | 5442264912Skevlo R92C_CR_MACRXEN); 5443264912Skevlo } 5444264912Skevlo 5445251538Srpaulo /* Turn CCK and OFDM blocks on. */ 5446251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5447251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 5448291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5449291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5450291698Savos goto fail; 5451251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5452251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 5453291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5454291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5455291698Savos goto fail; 5456251538Srpaulo 5457251538Srpaulo /* Clear per-station keys table. */ 5458251538Srpaulo urtwn_cam_init(sc); 5459251538Srpaulo 5460292175Savos /* Enable decryption / encryption. */ 5461292175Savos urtwn_write_2(sc, R92C_SECCFG, 5462292175Savos R92C_SECCFG_TXUCKEY_DEF | R92C_SECCFG_RXUCKEY_DEF | 5463292175Savos R92C_SECCFG_TXENC_ENA | R92C_SECCFG_RXDEC_ENA | 5464292175Savos R92C_SECCFG_TXBCKEY_DEF | R92C_SECCFG_RXBCKEY_DEF); 5465292175Savos 5466251538Srpaulo /* Enable hardware sequence numbering. */ 5467293180Savos urtwn_write_1(sc, R92C_HWSEQ_CTRL, R92C_TX_QUEUE_ALL); 5468251538Srpaulo 5469292167Savos /* Enable per-packet TX report. */ 5470292167Savos if (sc->chip & URTWN_CHIP_88E) { 5471292167Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 5472292167Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) | R88E_TX_RPT1_ENA); 5473292167Savos } 5474292167Savos 5475251538Srpaulo /* Perform LO and IQ calibrations. */ 5476251538Srpaulo urtwn_iq_calib(sc); 5477251538Srpaulo /* Perform LC calibration. */ 5478251538Srpaulo urtwn_lc_calib(sc); 5479251538Srpaulo 5480251538Srpaulo /* Fix USB interference issue. */ 5481264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5482264912Skevlo urtwn_write_1(sc, 0xfe40, 0xe0); 5483264912Skevlo urtwn_write_1(sc, 0xfe41, 0x8d); 5484264912Skevlo urtwn_write_1(sc, 0xfe42, 0x80); 5485251538Srpaulo 5486264912Skevlo urtwn_pa_bias_init(sc); 5487264912Skevlo } 5488251538Srpaulo 5489251538Srpaulo /* Initialize GPIO setting. */ 5490251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 5491251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 5492251538Srpaulo 5493251538Srpaulo /* Fix for lower temperature. */ 5494264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 5495264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 5496251538Srpaulo 5497251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 5498251538Srpaulo 5499287197Sglebius sc->sc_flags |= URTWN_RUNNING; 5500251538Srpaulo 5501301762Savos /* 5502301762Savos * Install static keys (if any). 5503301762Savos * Must be called after urtwn_cam_init(). 5504301762Savos */ 5505301762Savos if (vap != NULL) 5506301762Savos urtwn_setup_static_keys(sc, URTWN_VAP(vap)); 5507301762Savos 5508251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5509251538Srpaulofail: 5510291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5511291698Savos error = EIO; 5512291698Savos 5513291698Savos URTWN_UNLOCK(sc); 5514291698Savos 5515291698Savos return (error); 5516251538Srpaulo} 5517251538Srpaulo 5518251538Srpaulostatic void 5519287197Sglebiusurtwn_stop(struct urtwn_softc *sc) 5520251538Srpaulo{ 5521251538Srpaulo 5522291698Savos URTWN_LOCK(sc); 5523291698Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 5524291698Savos URTWN_UNLOCK(sc); 5525291698Savos return; 5526291698Savos } 5527291698Savos 5528295871Savos sc->sc_flags &= ~(URTWN_RUNNING | URTWN_FW_LOADED | 5529295871Savos URTWN_TEMP_MEASURED); 5530294473Savos sc->thcal_lctemp = 0; 5531251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 5532295874Savos 5533251538Srpaulo urtwn_abort_xfers(sc); 5534288353Sadrian urtwn_drain_mbufq(sc); 5535295874Savos urtwn_power_off(sc); 5536291698Savos URTWN_UNLOCK(sc); 5537251538Srpaulo} 5538251538Srpaulo 5539251538Srpaulostatic void 5540251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 5541251538Srpaulo{ 5542251538Srpaulo int i; 5543251538Srpaulo 5544251538Srpaulo URTWN_ASSERT_LOCKED(sc); 5545251538Srpaulo 5546251538Srpaulo /* abort any pending transfers */ 5547251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 5548251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 5549251538Srpaulo} 5550251538Srpaulo 5551251538Srpaulostatic int 5552251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 5553251538Srpaulo const struct ieee80211_bpf_params *params) 5554251538Srpaulo{ 5555251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 5556286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 5557251538Srpaulo struct urtwn_data *bf; 5558290630Savos int error; 5559251538Srpaulo 5560297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 5561297596Sadrian __func__, 5562297596Sadrian m); 5563297596Sadrian 5564251538Srpaulo /* prevent management frames from being sent if we're not ready */ 5565290630Savos URTWN_LOCK(sc); 5566287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) { 5567290630Savos error = ENETDOWN; 5568290630Savos goto end; 5569251538Srpaulo } 5570290630Savos 5571251538Srpaulo bf = urtwn_getbuf(sc); 5572251538Srpaulo if (bf == NULL) { 5573290630Savos error = ENOBUFS; 5574290630Savos goto end; 5575251538Srpaulo } 5576251538Srpaulo 5577292221Savos if (params == NULL) { 5578292221Savos /* 5579292221Savos * Legacy path; interpret frame contents to decide 5580292221Savos * precisely how to send the frame. 5581292221Savos */ 5582292221Savos error = urtwn_tx_data(sc, ni, m, bf); 5583292221Savos } else { 5584292221Savos /* 5585292221Savos * Caller supplied explicit parameters to use in 5586292221Savos * sending the frame. 5587292221Savos */ 5588292221Savos error = urtwn_tx_raw(sc, ni, m, bf, params); 5589292221Savos } 5590292221Savos if (error != 0) { 5591251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 5592290630Savos goto end; 5593251538Srpaulo } 5594290630Savos 5595288353Sadrian sc->sc_txtimer = 5; 5596290630Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5597290630Savos 5598290630Savosend: 5599290630Savos if (error != 0) 5600290630Savos m_freem(m); 5601290630Savos 5602251538Srpaulo URTWN_UNLOCK(sc); 5603251538Srpaulo 5604290630Savos return (error); 5605251538Srpaulo} 5606251538Srpaulo 5607266472Shselaskystatic void 5608266472Shselaskyurtwn_ms_delay(struct urtwn_softc *sc) 5609266472Shselasky{ 5610266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 1000); 5611266472Shselasky} 5612266472Shselasky 5613251538Srpaulostatic device_method_t urtwn_methods[] = { 5614251538Srpaulo /* Device interface */ 5615251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 5616251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 5617251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 5618251538Srpaulo 5619264912Skevlo DEVMETHOD_END 5620251538Srpaulo}; 5621251538Srpaulo 5622251538Srpaulostatic driver_t urtwn_driver = { 5623251538Srpaulo "urtwn", 5624251538Srpaulo urtwn_methods, 5625251538Srpaulo sizeof(struct urtwn_softc) 5626251538Srpaulo}; 5627251538Srpaulo 5628251538Srpaulostatic devclass_t urtwn_devclass; 5629251538Srpaulo 5630251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 5631251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 5632251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 5633295871Savos#ifndef URTWN_WITHOUT_UCODE 5634251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 5635295871Savos#endif 5636251538SrpauloMODULE_VERSION(urtwn, 1); 5637292080SimpUSB_PNP_HOST_INFO(urtwn_devs); 5638