if_urtwn.c revision 300754
1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5264912Skevlo * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6292176Savos * Copyright (c) 2015 Andriy Voskoboinyk <avos@FreeBSD.org> 7251538Srpaulo * 8251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 9251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 10251538Srpaulo * copyright notice and this permission notice appear in all copies. 11251538Srpaulo * 12251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19251538Srpaulo */ 20251538Srpaulo 21251538Srpaulo#include <sys/cdefs.h> 22251538Srpaulo__FBSDID("$FreeBSD: head/sys/dev/urtwn/if_urtwn.c 300754 2016-05-26 16:39:11Z avos $"); 23251538Srpaulo 24251538Srpaulo/* 25264912Skevlo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU. 26251538Srpaulo */ 27251538Srpaulo 28288353Sadrian#include "opt_wlan.h" 29295871Savos#include "opt_urtwn.h" 30288353Sadrian 31251538Srpaulo#include <sys/param.h> 32251538Srpaulo#include <sys/sockio.h> 33251538Srpaulo#include <sys/sysctl.h> 34251538Srpaulo#include <sys/lock.h> 35251538Srpaulo#include <sys/mutex.h> 36291902Skevlo#include <sys/condvar.h> 37251538Srpaulo#include <sys/mbuf.h> 38251538Srpaulo#include <sys/kernel.h> 39251538Srpaulo#include <sys/socket.h> 40251538Srpaulo#include <sys/systm.h> 41251538Srpaulo#include <sys/malloc.h> 42251538Srpaulo#include <sys/module.h> 43251538Srpaulo#include <sys/bus.h> 44251538Srpaulo#include <sys/endian.h> 45251538Srpaulo#include <sys/linker.h> 46251538Srpaulo#include <sys/firmware.h> 47251538Srpaulo#include <sys/kdb.h> 48251538Srpaulo 49251538Srpaulo#include <machine/bus.h> 50251538Srpaulo#include <machine/resource.h> 51251538Srpaulo#include <sys/rman.h> 52251538Srpaulo 53251538Srpaulo#include <net/bpf.h> 54251538Srpaulo#include <net/if.h> 55257176Sglebius#include <net/if_var.h> 56251538Srpaulo#include <net/if_arp.h> 57251538Srpaulo#include <net/ethernet.h> 58251538Srpaulo#include <net/if_dl.h> 59251538Srpaulo#include <net/if_media.h> 60251538Srpaulo#include <net/if_types.h> 61251538Srpaulo 62251538Srpaulo#include <netinet/in.h> 63251538Srpaulo#include <netinet/in_systm.h> 64251538Srpaulo#include <netinet/in_var.h> 65251538Srpaulo#include <netinet/if_ether.h> 66251538Srpaulo#include <netinet/ip.h> 67251538Srpaulo 68251538Srpaulo#include <net80211/ieee80211_var.h> 69251538Srpaulo#include <net80211/ieee80211_regdomain.h> 70251538Srpaulo#include <net80211/ieee80211_radiotap.h> 71251538Srpaulo#include <net80211/ieee80211_ratectl.h> 72297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 73297596Sadrian#include <net80211/ieee80211_superg.h> 74297596Sadrian#endif 75251538Srpaulo 76251538Srpaulo#include <dev/usb/usb.h> 77251538Srpaulo#include <dev/usb/usbdi.h> 78291902Skevlo#include <dev/usb/usb_device.h> 79251538Srpaulo#include "usbdevs.h" 80251538Srpaulo 81251538Srpaulo#include <dev/usb/usb_debug.h> 82251538Srpaulo 83297058Sadrian#include <dev/urtwn/if_urtwnreg.h> 84297058Sadrian#include <dev/urtwn/if_urtwnvar.h> 85251538Srpaulo 86251538Srpaulo#ifdef USB_DEBUG 87294471Savosenum { 88294471Savos URTWN_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 89294471Savos URTWN_DEBUG_RECV = 0x00000002, /* basic recv operation */ 90294471Savos URTWN_DEBUG_STATE = 0x00000004, /* 802.11 state transitions */ 91294471Savos URTWN_DEBUG_RA = 0x00000008, /* f/w rate adaptation setup */ 92294471Savos URTWN_DEBUG_USB = 0x00000010, /* usb requests */ 93294471Savos URTWN_DEBUG_FIRMWARE = 0x00000020, /* firmware(9) loading debug */ 94294471Savos URTWN_DEBUG_BEACON = 0x00000040, /* beacon handling */ 95294471Savos URTWN_DEBUG_INTR = 0x00000080, /* ISR */ 96294471Savos URTWN_DEBUG_TEMP = 0x00000100, /* temperature calibration */ 97294471Savos URTWN_DEBUG_ROM = 0x00000200, /* various ROM info */ 98294471Savos URTWN_DEBUG_KEY = 0x00000400, /* crypto keys management */ 99294471Savos URTWN_DEBUG_TXPWR = 0x00000800, /* dump Tx power values */ 100297175Sadrian URTWN_DEBUG_RSSI = 0x00001000, /* dump RSSI lookups */ 101294471Savos URTWN_DEBUG_ANY = 0xffffffff 102294471Savos}; 103251538Srpaulo 104294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { \ 105294471Savos if ((_sc)->sc_debug & (_m)) \ 106294471Savos device_printf((_sc)->sc_dev, __VA_ARGS__); \ 107294471Savos} while(0) 108294471Savos 109294471Savos#else 110294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { (void) sc; } while (0) 111251538Srpaulo#endif 112251538Srpaulo 113288088Sadrian#define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 114251538Srpaulo 115297175Sadrianstatic int urtwn_enable_11n = 1; 116297175SadrianTUNABLE_INT("hw.usb.urtwn.enable_11n", &urtwn_enable_11n); 117297175Sadrian 118251538Srpaulo/* various supported device vendors/products */ 119251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 120251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 121264912Skevlo#define URTWN_RTL8188E_DEV(v,p) \ 122264912Skevlo { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTWN_RTL8188E) } 123264912Skevlo#define URTWN_RTL8188E 1 124251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 125251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 126251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 127251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 128266721Skevlo URTWN_DEV(ASUS, USBN10NANO), 129251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 130251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 131251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 132251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 133251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 134251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 135251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 136251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 137251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 138251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 139251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 140251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 141251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 142251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 143251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 144251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 145252196Skevlo URTWN_DEV(DLINK, DWA131B), 146251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 147251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 148251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 149251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 150251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 151251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 152251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 153251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 154251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 155251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 156251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 157251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 158251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 159251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 160251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 161251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 162251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 163251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 164251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 165251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 166251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 167251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 168251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 169282119Skevlo URTWN_DEV(REALTEK, RTL8188CU_3), 170251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 171251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 172251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 173251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 174272410Shselasky URTWN_DEV(REALTEK, RTL8188RU_3), 175251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 176251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 177251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 178251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 179251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 180251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 181251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 182251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 183251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 184264912Skevlo /* URTWN_RTL8188E */ 185295907Skevlo URTWN_RTL8188E_DEV(ABOCOM, RTL8188EU), 186273589Skevlo URTWN_RTL8188E_DEV(DLINK, DWA123D1), 187270191Skevlo URTWN_RTL8188E_DEV(DLINK, DWA125D1), 188273589Skevlo URTWN_RTL8188E_DEV(ELECOM, WDC150SU2M), 189264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188ETV), 190264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188EU), 191264912Skevlo#undef URTWN_RTL8188E_DEV 192251538Srpaulo#undef URTWN_DEV 193251538Srpaulo}; 194251538Srpaulo 195251538Srpaulostatic device_probe_t urtwn_match; 196251538Srpaulostatic device_attach_t urtwn_attach; 197251538Srpaulostatic device_detach_t urtwn_detach; 198251538Srpaulo 199251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 200251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 201251538Srpaulo 202294471Savosstatic void urtwn_sysctlattach(struct urtwn_softc *); 203294471Savosstatic void urtwn_drain_mbufq(struct urtwn_softc *); 204287197Sglebiusstatic usb_error_t urtwn_do_request(struct urtwn_softc *, 205287197Sglebius struct usb_device_request *, void *); 206251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 207251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 208251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 209251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 210251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 211292207Savosstatic struct mbuf * urtwn_rx_copy_to_mbuf(struct urtwn_softc *, 212292207Savos struct r92c_rx_stat *, int); 213292207Savosstatic struct mbuf * urtwn_report_intr(struct usb_xfer *, 214292207Savos struct urtwn_data *); 215292207Savosstatic struct mbuf * urtwn_rxeof(struct urtwn_softc *, uint8_t *, int); 216292167Savosstatic void urtwn_r88e_ratectl_tx_complete(struct urtwn_softc *, 217292167Savos void *); 218292207Savosstatic struct ieee80211_node *urtwn_rx_frame(struct urtwn_softc *, 219292207Savos struct mbuf *, int8_t *); 220289891Savosstatic void urtwn_txeof(struct urtwn_softc *, struct urtwn_data *, 221289891Savos int); 222281069Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 223251538Srpaulo struct urtwn_data[], int, int); 224251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 225251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 226251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 227251538Srpaulo struct urtwn_data data[], int); 228289066Skevlostatic void urtwn_free_rx_list(struct urtwn_softc *); 229289066Skevlostatic void urtwn_free_tx_list(struct urtwn_softc *); 230251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 231251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 232291698Savosstatic usb_error_t urtwn_write_region_1(struct urtwn_softc *, uint16_t, 233251538Srpaulo uint8_t *, int); 234291698Savosstatic usb_error_t urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 235291698Savosstatic usb_error_t urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 236291698Savosstatic usb_error_t urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 237291698Savosstatic usb_error_t urtwn_read_region_1(struct urtwn_softc *, uint16_t, 238251538Srpaulo uint8_t *, int); 239251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 240251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 241251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 242281069Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 243251538Srpaulo const void *, int); 244292174Savosstatic void urtwn_cmdq_cb(void *, int); 245292174Savosstatic int urtwn_cmd_sleepable(struct urtwn_softc *, const void *, 246292174Savos size_t, CMD_FUNC_PROTO); 247264912Skevlostatic void urtwn_r92c_rf_write(struct urtwn_softc *, int, 248264912Skevlo uint8_t, uint32_t); 249281069Srpaulostatic void urtwn_r88e_rf_write(struct urtwn_softc *, int, 250264912Skevlo uint8_t, uint32_t); 251251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 252281069Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 253251538Srpaulo uint32_t); 254291264Savosstatic int urtwn_efuse_read_next(struct urtwn_softc *, uint8_t *); 255291264Savosstatic int urtwn_efuse_read_data(struct urtwn_softc *, uint8_t *, 256291264Savos uint8_t, uint8_t); 257294471Savos#ifdef USB_DEBUG 258291264Savosstatic void urtwn_dump_rom_contents(struct urtwn_softc *, 259291264Savos uint8_t *, uint16_t); 260291264Savos#endif 261291264Savosstatic int urtwn_efuse_read(struct urtwn_softc *, uint8_t *, 262291264Savos uint16_t); 263291698Savosstatic int urtwn_efuse_switch_power(struct urtwn_softc *); 264251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 265291264Savosstatic int urtwn_read_rom(struct urtwn_softc *); 266291264Savosstatic int urtwn_r88e_read_rom(struct urtwn_softc *); 267251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 268290631Savosstatic void urtwn_init_beacon(struct urtwn_softc *, 269290631Savos struct urtwn_vap *); 270290631Savosstatic int urtwn_setup_beacon(struct urtwn_softc *, 271290631Savos struct ieee80211_node *); 272290631Savosstatic void urtwn_update_beacon(struct ieee80211vap *, int); 273290631Savosstatic int urtwn_tx_beacon(struct urtwn_softc *sc, 274290631Savos struct urtwn_vap *); 275292175Savosstatic int urtwn_key_alloc(struct ieee80211vap *, 276292175Savos struct ieee80211_key *, ieee80211_keyix *, 277292175Savos ieee80211_keyix *); 278292175Savosstatic void urtwn_key_set_cb(struct urtwn_softc *, 279292175Savos union sec_param *); 280292175Savosstatic void urtwn_key_del_cb(struct urtwn_softc *, 281292175Savos union sec_param *); 282292175Savosstatic int urtwn_key_set(struct ieee80211vap *, 283292175Savos const struct ieee80211_key *); 284292175Savosstatic int urtwn_key_delete(struct ieee80211vap *, 285292175Savos const struct ieee80211_key *); 286290651Savosstatic void urtwn_tsf_task_adhoc(void *, int); 287290631Savosstatic void urtwn_tsf_sync_enable(struct urtwn_softc *, 288290631Savos struct ieee80211vap *); 289292203Savosstatic void urtwn_get_tsf(struct urtwn_softc *, uint64_t *); 290251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 291289811Savosstatic void urtwn_set_mode(struct urtwn_softc *, uint8_t); 292290651Savosstatic void urtwn_ibss_recv_mgmt(struct ieee80211_node *, 293290651Savos struct mbuf *, int, 294290651Savos const struct ieee80211_rx_stats *, int, int); 295281069Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 296251538Srpaulo enum ieee80211_state, int); 297294473Savosstatic void urtwn_calib_to(void *); 298294473Savosstatic void urtwn_calib_cb(struct urtwn_softc *, 299294473Savos union sec_param *); 300251538Srpaulostatic void urtwn_watchdog(void *); 301251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 302251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 303264912Skevlostatic int8_t urtwn_r88e_get_rssi(struct urtwn_softc *, int, void *); 304290630Savosstatic int urtwn_tx_data(struct urtwn_softc *, 305251538Srpaulo struct ieee80211_node *, struct mbuf *, 306251538Srpaulo struct urtwn_data *); 307292221Savosstatic int urtwn_tx_raw(struct urtwn_softc *, 308292221Savos struct ieee80211_node *, struct mbuf *, 309292221Savos struct urtwn_data *, 310292221Savos const struct ieee80211_bpf_params *); 311290630Savosstatic void urtwn_tx_start(struct urtwn_softc *, struct mbuf *, 312290630Savos uint8_t, struct urtwn_data *); 313287197Sglebiusstatic int urtwn_transmit(struct ieee80211com *, struct mbuf *); 314287197Sglebiusstatic void urtwn_start(struct urtwn_softc *); 315287197Sglebiusstatic void urtwn_parent(struct ieee80211com *); 316264912Skevlostatic int urtwn_r92c_power_on(struct urtwn_softc *); 317264912Skevlostatic int urtwn_r88e_power_on(struct urtwn_softc *); 318295874Savosstatic void urtwn_r92c_power_off(struct urtwn_softc *); 319295874Savosstatic void urtwn_r88e_power_off(struct urtwn_softc *); 320251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 321295871Savos#ifndef URTWN_WITHOUT_UCODE 322251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 323264912Skevlostatic void urtwn_r88e_fw_reset(struct urtwn_softc *); 324281069Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 325251538Srpaulo const uint8_t *, int); 326251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 327295871Savos#endif 328291902Skevlostatic int urtwn_dma_init(struct urtwn_softc *); 329291698Savosstatic int urtwn_mac_init(struct urtwn_softc *); 330251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 331251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 332251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 333292175Savosstatic int urtwn_cam_write(struct urtwn_softc *, uint32_t, 334292175Savos uint32_t); 335251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 336251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 337251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 338281069Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 339251538Srpaulo uint16_t[]); 340251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 341281069Srpaulo struct ieee80211_channel *, 342251538Srpaulo struct ieee80211_channel *, uint16_t[]); 343264912Skevlostatic void urtwn_r88e_get_txpower(struct urtwn_softc *, int, 344281069Srpaulo struct ieee80211_channel *, 345264912Skevlo struct ieee80211_channel *, uint16_t[]); 346251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 347281069Srpaulo struct ieee80211_channel *, 348251538Srpaulo struct ieee80211_channel *); 349290048Savosstatic void urtwn_set_rx_bssid_all(struct urtwn_softc *, int); 350290048Savosstatic void urtwn_set_gain(struct urtwn_softc *, uint8_t); 351251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 352251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 353300754Savosstatic void urtwn_getradiocaps(struct ieee80211com *, int, int *, 354300754Savos struct ieee80211_channel[]); 355251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 356292014Savosstatic int urtwn_wme_update(struct ieee80211com *); 357294465Savosstatic void urtwn_update_slot(struct ieee80211com *); 358294465Savosstatic void urtwn_update_slot_cb(struct urtwn_softc *, 359294465Savos union sec_param *); 360294465Savosstatic void urtwn_update_aifs(struct urtwn_softc *, uint8_t); 361299965Savosstatic uint8_t urtwn_get_multi_pos(const uint8_t[]); 362299965Savosstatic void urtwn_set_multi(struct urtwn_softc *); 363290564Savosstatic void urtwn_set_promisc(struct urtwn_softc *); 364290564Savosstatic void urtwn_update_promisc(struct ieee80211com *); 365289066Skevlostatic void urtwn_update_mcast(struct ieee80211com *); 366297910Sadrianstatic struct ieee80211_node *urtwn_node_alloc(struct ieee80211vap *, 367292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]); 368297910Sadrianstatic void urtwn_newassoc(struct ieee80211_node *, int); 369297910Sadrianstatic void urtwn_node_free(struct ieee80211_node *); 370251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 371281069Srpaulo struct ieee80211_channel *, 372251538Srpaulo struct ieee80211_channel *); 373251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 374251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 375294473Savosstatic void urtwn_temp_calib(struct urtwn_softc *); 376291698Savosstatic int urtwn_init(struct urtwn_softc *); 377287197Sglebiusstatic void urtwn_stop(struct urtwn_softc *); 378251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 379251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 380251538Srpaulo const struct ieee80211_bpf_params *); 381266472Shselaskystatic void urtwn_ms_delay(struct urtwn_softc *); 382251538Srpaulo 383251538Srpaulo/* Aliases. */ 384251538Srpaulo#define urtwn_bb_write urtwn_write_4 385251538Srpaulo#define urtwn_bb_read urtwn_read_4 386251538Srpaulo 387251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 388251538Srpaulo [URTWN_BULK_RX] = { 389251538Srpaulo .type = UE_BULK, 390251538Srpaulo .endpoint = UE_ADDR_ANY, 391251538Srpaulo .direction = UE_DIR_IN, 392251538Srpaulo .bufsize = URTWN_RXBUFSZ, 393251538Srpaulo .flags = { 394251538Srpaulo .pipe_bof = 1, 395251538Srpaulo .short_xfer_ok = 1 396251538Srpaulo }, 397251538Srpaulo .callback = urtwn_bulk_rx_callback, 398251538Srpaulo }, 399251538Srpaulo [URTWN_BULK_TX_BE] = { 400251538Srpaulo .type = UE_BULK, 401251538Srpaulo .endpoint = 0x03, 402251538Srpaulo .direction = UE_DIR_OUT, 403251538Srpaulo .bufsize = URTWN_TXBUFSZ, 404251538Srpaulo .flags = { 405251538Srpaulo .ext_buffer = 1, 406251538Srpaulo .pipe_bof = 1, 407251538Srpaulo .force_short_xfer = 1 408251538Srpaulo }, 409251538Srpaulo .callback = urtwn_bulk_tx_callback, 410251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 411251538Srpaulo }, 412251538Srpaulo [URTWN_BULK_TX_BK] = { 413251538Srpaulo .type = UE_BULK, 414251538Srpaulo .endpoint = 0x03, 415251538Srpaulo .direction = UE_DIR_OUT, 416251538Srpaulo .bufsize = URTWN_TXBUFSZ, 417251538Srpaulo .flags = { 418251538Srpaulo .ext_buffer = 1, 419251538Srpaulo .pipe_bof = 1, 420251538Srpaulo .force_short_xfer = 1, 421251538Srpaulo }, 422251538Srpaulo .callback = urtwn_bulk_tx_callback, 423251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 424251538Srpaulo }, 425251538Srpaulo [URTWN_BULK_TX_VI] = { 426251538Srpaulo .type = UE_BULK, 427251538Srpaulo .endpoint = 0x02, 428251538Srpaulo .direction = UE_DIR_OUT, 429251538Srpaulo .bufsize = URTWN_TXBUFSZ, 430251538Srpaulo .flags = { 431251538Srpaulo .ext_buffer = 1, 432251538Srpaulo .pipe_bof = 1, 433251538Srpaulo .force_short_xfer = 1 434251538Srpaulo }, 435251538Srpaulo .callback = urtwn_bulk_tx_callback, 436251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 437251538Srpaulo }, 438251538Srpaulo [URTWN_BULK_TX_VO] = { 439251538Srpaulo .type = UE_BULK, 440251538Srpaulo .endpoint = 0x02, 441251538Srpaulo .direction = UE_DIR_OUT, 442251538Srpaulo .bufsize = URTWN_TXBUFSZ, 443251538Srpaulo .flags = { 444251538Srpaulo .ext_buffer = 1, 445251538Srpaulo .pipe_bof = 1, 446251538Srpaulo .force_short_xfer = 1 447251538Srpaulo }, 448251538Srpaulo .callback = urtwn_bulk_tx_callback, 449251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 450251538Srpaulo }, 451251538Srpaulo}; 452251538Srpaulo 453292014Savosstatic const struct wme_to_queue { 454292014Savos uint16_t reg; 455292014Savos uint8_t qid; 456292014Savos} wme2queue[WME_NUM_AC] = { 457292014Savos { R92C_EDCA_BE_PARAM, URTWN_BULK_TX_BE}, 458292014Savos { R92C_EDCA_BK_PARAM, URTWN_BULK_TX_BK}, 459292014Savos { R92C_EDCA_VI_PARAM, URTWN_BULK_TX_VI}, 460292014Savos { R92C_EDCA_VO_PARAM, URTWN_BULK_TX_VO} 461292014Savos}; 462292014Savos 463300754Savosstatic const uint8_t urtwn_chan_2ghz[] = 464300754Savos { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 }; 465300754Savos 466251538Srpaulostatic int 467251538Srpaulourtwn_match(device_t self) 468251538Srpaulo{ 469251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 470251538Srpaulo 471251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 472251538Srpaulo return (ENXIO); 473251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 474251538Srpaulo return (ENXIO); 475251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 476251538Srpaulo return (ENXIO); 477251538Srpaulo 478251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 479251538Srpaulo} 480251538Srpaulo 481297175Sadrianstatic void 482297175Sadrianurtwn_update_chw(struct ieee80211com *ic) 483297175Sadrian{ 484297175Sadrian} 485297175Sadrian 486251538Srpaulostatic int 487297175Sadrianurtwn_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 488297175Sadrian{ 489297175Sadrian 490297175Sadrian /* We're driving this ourselves (eventually); don't involve net80211 */ 491297175Sadrian return (0); 492297175Sadrian} 493297175Sadrian 494297175Sadrianstatic int 495251538Srpaulourtwn_attach(device_t self) 496251538Srpaulo{ 497251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 498251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 499287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 500251538Srpaulo int error; 501251538Srpaulo 502251538Srpaulo device_set_usb_desc(self); 503251538Srpaulo sc->sc_udev = uaa->device; 504251538Srpaulo sc->sc_dev = self; 505264912Skevlo if (USB_GET_DRIVER_INFO(uaa) == URTWN_RTL8188E) 506264912Skevlo sc->chip |= URTWN_CHIP_88E; 507251538Srpaulo 508294471Savos#ifdef USB_DEBUG 509294471Savos int debug; 510294471Savos if (resource_int_value(device_get_name(sc->sc_dev), 511294471Savos device_get_unit(sc->sc_dev), "debug", &debug) == 0) 512294471Savos sc->sc_debug = debug; 513294471Savos#endif 514294471Savos 515251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 516251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 517292174Savos URTWN_CMDQ_LOCK_INIT(sc); 518292167Savos URTWN_NT_LOCK_INIT(sc); 519294473Savos callout_init(&sc->sc_calib_to, 0); 520251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 521287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 522251538Srpaulo 523291902Skevlo sc->sc_iface_index = URTWN_IFACE_INDEX; 524291902Skevlo error = usbd_transfer_setup(uaa->device, &sc->sc_iface_index, 525291902Skevlo sc->sc_xfer, urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 526251538Srpaulo if (error) { 527251538Srpaulo device_printf(self, "could not allocate USB transfers, " 528251538Srpaulo "err=%s\n", usbd_errstr(error)); 529251538Srpaulo goto detach; 530251538Srpaulo } 531251538Srpaulo 532251538Srpaulo URTWN_LOCK(sc); 533251538Srpaulo 534251538Srpaulo error = urtwn_read_chipid(sc); 535251538Srpaulo if (error) { 536251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 537251538Srpaulo URTWN_UNLOCK(sc); 538251538Srpaulo goto detach; 539251538Srpaulo } 540251538Srpaulo 541251538Srpaulo /* Determine number of Tx/Rx chains. */ 542251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 543251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 544251538Srpaulo sc->nrxchains = 2; 545251538Srpaulo } else { 546251538Srpaulo sc->ntxchains = 1; 547251538Srpaulo sc->nrxchains = 1; 548251538Srpaulo } 549251538Srpaulo 550264912Skevlo if (sc->chip & URTWN_CHIP_88E) 551291264Savos error = urtwn_r88e_read_rom(sc); 552264912Skevlo else 553291264Savos error = urtwn_read_rom(sc); 554291264Savos if (error != 0) { 555291264Savos device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", 556291264Savos __func__, error); 557291264Savos URTWN_UNLOCK(sc); 558291264Savos goto detach; 559291264Savos } 560264912Skevlo 561251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 562251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 563264912Skevlo (sc->chip & URTWN_CHIP_88E) ? "8188EU" : 564251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 565251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 566251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 567251538Srpaulo 568251538Srpaulo URTWN_UNLOCK(sc); 569251538Srpaulo 570283537Sglebius ic->ic_softc = sc; 571283527Sglebius ic->ic_name = device_get_nameunit(self); 572251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 573251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 574251538Srpaulo 575251538Srpaulo /* set device capabilities */ 576251538Srpaulo ic->ic_caps = 577251538Srpaulo IEEE80211_C_STA /* station mode */ 578251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 579290651Savos | IEEE80211_C_IBSS /* adhoc mode */ 580290631Savos | IEEE80211_C_HOSTAP /* hostap mode */ 581251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 582251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 583297175Sadrian#if 0 584251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 585297175Sadrian#endif 586251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 587292014Savos | IEEE80211_C_WME /* 802.11e */ 588297596Sadrian | IEEE80211_C_SWAMSDUTX /* Do software A-MSDU TX */ 589297596Sadrian | IEEE80211_C_FF /* Atheros fast-frames */ 590251538Srpaulo ; 591251538Srpaulo 592292175Savos ic->ic_cryptocaps = 593292175Savos IEEE80211_CRYPTO_WEP | 594292175Savos IEEE80211_CRYPTO_TKIP | 595292175Savos IEEE80211_CRYPTO_AES_CCM; 596292175Savos 597297175Sadrian /* Assume they're all 11n capable for now */ 598297175Sadrian if (urtwn_enable_11n) { 599297175Sadrian device_printf(self, "enabling 11n\n"); 600297175Sadrian ic->ic_htcaps = IEEE80211_HTC_HT | 601297601Sadrian#if 0 602297175Sadrian IEEE80211_HTC_AMPDU | 603297601Sadrian#endif 604297175Sadrian IEEE80211_HTC_AMSDU | 605297175Sadrian IEEE80211_HTCAP_MAXAMSDU_3839 | 606297175Sadrian IEEE80211_HTCAP_SMPS_OFF; 607297175Sadrian /* no HT40 just yet */ 608297175Sadrian // ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 609297175Sadrian 610297175Sadrian /* XXX TODO: verify chains versus streams for urtwn */ 611297175Sadrian ic->ic_txstream = sc->ntxchains; 612297175Sadrian ic->ic_rxstream = sc->nrxchains; 613297175Sadrian } 614297175Sadrian 615300754Savos /* XXX TODO: setup regdomain if R92C_CHANNEL_PLAN_BY_HW bit is set. */ 616251538Srpaulo 617300754Savos urtwn_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 618300754Savos ic->ic_channels); 619300754Savos 620287197Sglebius ieee80211_ifattach(ic); 621251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 622251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 623251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 624300754Savos ic->ic_getradiocaps = urtwn_getradiocaps; 625251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 626287197Sglebius ic->ic_transmit = urtwn_transmit; 627287197Sglebius ic->ic_parent = urtwn_parent; 628251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 629251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 630292014Savos ic->ic_wme.wme_update = urtwn_wme_update; 631294465Savos ic->ic_updateslot = urtwn_update_slot; 632290564Savos ic->ic_update_promisc = urtwn_update_promisc; 633251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 634292167Savos if (sc->chip & URTWN_CHIP_88E) { 635297910Sadrian ic->ic_node_alloc = urtwn_node_alloc; 636297910Sadrian ic->ic_newassoc = urtwn_newassoc; 637292167Savos sc->sc_node_free = ic->ic_node_free; 638297910Sadrian ic->ic_node_free = urtwn_node_free; 639292167Savos } 640297175Sadrian ic->ic_update_chw = urtwn_update_chw; 641297175Sadrian ic->ic_ampdu_enable = urtwn_ampdu_enable; 642251538Srpaulo 643281069Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 644251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 645251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 646251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 647251538Srpaulo 648292174Savos TASK_INIT(&sc->cmdq_task, 0, urtwn_cmdq_cb, sc); 649292174Savos 650294471Savos urtwn_sysctlattach(sc); 651294471Savos 652251538Srpaulo if (bootverbose) 653251538Srpaulo ieee80211_announce(ic); 654251538Srpaulo 655251538Srpaulo return (0); 656251538Srpaulo 657251538Srpaulodetach: 658251538Srpaulo urtwn_detach(self); 659251538Srpaulo return (ENXIO); /* failure */ 660251538Srpaulo} 661251538Srpaulo 662294471Savosstatic void 663294471Savosurtwn_sysctlattach(struct urtwn_softc *sc) 664294471Savos{ 665294471Savos#ifdef USB_DEBUG 666294471Savos struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 667294471Savos struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 668294471Savos 669294471Savos SYSCTL_ADD_U32(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 670294471Savos "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug, 671294471Savos "control debugging printfs"); 672294471Savos#endif 673294471Savos} 674294471Savos 675251538Srpaulostatic int 676251538Srpaulourtwn_detach(device_t self) 677251538Srpaulo{ 678251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 679287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 680263153Skevlo unsigned int x; 681281069Srpaulo 682263153Skevlo /* Prevent further ioctls. */ 683263153Skevlo URTWN_LOCK(sc); 684263153Skevlo sc->sc_flags |= URTWN_DETACHED; 685263153Skevlo URTWN_UNLOCK(sc); 686251538Srpaulo 687291698Savos urtwn_stop(sc); 688291698Savos 689251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 690294473Savos callout_drain(&sc->sc_calib_to); 691251538Srpaulo 692288353Sadrian /* stop all USB transfers */ 693288353Sadrian usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 694288353Sadrian 695263153Skevlo /* Prevent further allocations from RX/TX data lists. */ 696263153Skevlo URTWN_LOCK(sc); 697263153Skevlo STAILQ_INIT(&sc->sc_tx_active); 698263153Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 699263153Skevlo STAILQ_INIT(&sc->sc_tx_pending); 700263153Skevlo 701263153Skevlo STAILQ_INIT(&sc->sc_rx_active); 702263153Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 703263153Skevlo URTWN_UNLOCK(sc); 704263153Skevlo 705263153Skevlo /* drain USB transfers */ 706263153Skevlo for (x = 0; x != URTWN_N_TRANSFER; x++) 707263153Skevlo usbd_transfer_drain(sc->sc_xfer[x]); 708263153Skevlo 709263153Skevlo /* Free data buffers. */ 710263153Skevlo URTWN_LOCK(sc); 711263153Skevlo urtwn_free_tx_list(sc); 712263153Skevlo urtwn_free_rx_list(sc); 713263153Skevlo URTWN_UNLOCK(sc); 714263153Skevlo 715292174Savos if (ic->ic_softc == sc) { 716292174Savos ieee80211_draintask(ic, &sc->cmdq_task); 717292174Savos ieee80211_ifdetach(ic); 718292174Savos } 719292174Savos 720292167Savos URTWN_NT_LOCK_DESTROY(sc); 721292174Savos URTWN_CMDQ_LOCK_DESTROY(sc); 722251538Srpaulo mtx_destroy(&sc->sc_mtx); 723251538Srpaulo 724251538Srpaulo return (0); 725251538Srpaulo} 726251538Srpaulo 727251538Srpaulostatic void 728289066Skevlourtwn_drain_mbufq(struct urtwn_softc *sc) 729251538Srpaulo{ 730289066Skevlo struct mbuf *m; 731289066Skevlo struct ieee80211_node *ni; 732289066Skevlo URTWN_ASSERT_LOCKED(sc); 733289066Skevlo while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 734289066Skevlo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 735289066Skevlo m->m_pkthdr.rcvif = NULL; 736289066Skevlo ieee80211_free_node(ni); 737289066Skevlo m_freem(m); 738251538Srpaulo } 739251538Srpaulo} 740251538Srpaulo 741251538Srpaulostatic usb_error_t 742251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 743251538Srpaulo void *data) 744251538Srpaulo{ 745251538Srpaulo usb_error_t err; 746251538Srpaulo int ntries = 10; 747251538Srpaulo 748251538Srpaulo URTWN_ASSERT_LOCKED(sc); 749251538Srpaulo 750251538Srpaulo while (ntries--) { 751251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 752251538Srpaulo req, data, 0, NULL, 250 /* ms */); 753251538Srpaulo if (err == 0) 754251538Srpaulo break; 755251538Srpaulo 756294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_USB, 757294471Savos "%s: control request failed, %s (retries left: %d)\n", 758294471Savos __func__, usbd_errstr(err), ntries); 759251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 760251538Srpaulo } 761251538Srpaulo return (err); 762251538Srpaulo} 763251538Srpaulo 764251538Srpaulostatic struct ieee80211vap * 765251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 766251538Srpaulo enum ieee80211_opmode opmode, int flags, 767251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 768251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 769251538Srpaulo{ 770290631Savos struct urtwn_softc *sc = ic->ic_softc; 771251538Srpaulo struct urtwn_vap *uvp; 772251538Srpaulo struct ieee80211vap *vap; 773251538Srpaulo 774251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 775251538Srpaulo return (NULL); 776251538Srpaulo 777287197Sglebius uvp = malloc(sizeof(struct urtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); 778251538Srpaulo vap = &uvp->vap; 779251538Srpaulo /* enable s/w bmiss handling for sta mode */ 780251538Srpaulo 781281069Srpaulo if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 782287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 783257743Shselasky /* out of memory */ 784257743Shselasky free(uvp, M_80211_VAP); 785257743Shselasky return (NULL); 786257743Shselasky } 787257743Shselasky 788290651Savos if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) 789290631Savos urtwn_init_beacon(sc, uvp); 790290631Savos 791251538Srpaulo /* override state transition machine */ 792251538Srpaulo uvp->newstate = vap->iv_newstate; 793251538Srpaulo vap->iv_newstate = urtwn_newstate; 794290631Savos vap->iv_update_beacon = urtwn_update_beacon; 795292175Savos vap->iv_key_alloc = urtwn_key_alloc; 796292175Savos vap->iv_key_set = urtwn_key_set; 797292175Savos vap->iv_key_delete = urtwn_key_delete; 798298138Sadrian 799298138Sadrian /* 802.11n parameters */ 800298138Sadrian vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; 801298175Sadrian vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K; 802298138Sadrian 803290651Savos if (opmode == IEEE80211_M_IBSS) { 804290651Savos uvp->recv_mgmt = vap->iv_recv_mgmt; 805290651Savos vap->iv_recv_mgmt = urtwn_ibss_recv_mgmt; 806290651Savos TASK_INIT(&uvp->tsf_task_adhoc, 0, urtwn_tsf_task_adhoc, vap); 807290651Savos } 808251538Srpaulo 809292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 810292167Savos ieee80211_ratectl_init(vap); 811251538Srpaulo /* complete setup */ 812251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 813287197Sglebius ieee80211_media_status, mac); 814251538Srpaulo ic->ic_opmode = opmode; 815251538Srpaulo return (vap); 816251538Srpaulo} 817251538Srpaulo 818251538Srpaulostatic void 819251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 820251538Srpaulo{ 821290651Savos struct ieee80211com *ic = vap->iv_ic; 822292167Savos struct urtwn_softc *sc = ic->ic_softc; 823251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 824251538Srpaulo 825290651Savos if (uvp->bcn_mbuf != NULL) 826290651Savos m_freem(uvp->bcn_mbuf); 827290651Savos if (vap->iv_opmode == IEEE80211_M_IBSS) 828290651Savos ieee80211_draintask(ic, &uvp->tsf_task_adhoc); 829292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 830292167Savos ieee80211_ratectl_deinit(vap); 831251538Srpaulo ieee80211_vap_detach(vap); 832251538Srpaulo free(uvp, M_80211_VAP); 833251538Srpaulo} 834251538Srpaulo 835251538Srpaulostatic struct mbuf * 836292207Savosurtwn_rx_copy_to_mbuf(struct urtwn_softc *sc, struct r92c_rx_stat *stat, 837292207Savos int totlen) 838251538Srpaulo{ 839287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 840251538Srpaulo struct mbuf *m; 841292207Savos uint32_t rxdw0; 842292207Savos int pktlen; 843251538Srpaulo 844251538Srpaulo /* 845251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 846251538Srpaulo * RUNNING. 847251538Srpaulo */ 848287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) 849251538Srpaulo return (NULL); 850251538Srpaulo 851251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 852251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 853251538Srpaulo /* 854251538Srpaulo * This should not happen since we setup our Rx filter 855251538Srpaulo * to not receive these frames. 856251538Srpaulo */ 857294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 858294471Savos "%s: RX flags error (%s)\n", __func__, 859292207Savos rxdw0 & R92C_RXDW0_CRCERR ? "CRC" : "ICV"); 860292207Savos goto fail; 861251538Srpaulo } 862292207Savos 863292207Savos pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 864292207Savos if (pktlen < sizeof(struct ieee80211_frame_ack)) { 865294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 866294471Savos "%s: frame is too short: %d\n", __func__, pktlen); 867292207Savos goto fail; 868271303Skevlo } 869251538Srpaulo 870292207Savos if (__predict_false(totlen > MCLBYTES)) { 871292207Savos /* convert to m_getjcl if this happens */ 872292207Savos device_printf(sc->sc_dev, "%s: frame too long: %d (%d)\n", 873292207Savos __func__, pktlen, totlen); 874292207Savos goto fail; 875251538Srpaulo } 876251538Srpaulo 877260463Skevlo m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 878292207Savos if (__predict_false(m == NULL)) { 879292207Savos device_printf(sc->sc_dev, "%s: could not allocate RX mbuf\n", 880292207Savos __func__); 881292207Savos goto fail; 882251538Srpaulo } 883251538Srpaulo 884251538Srpaulo /* Finalize mbuf. */ 885292207Savos memcpy(mtod(m, uint8_t *), (uint8_t *)stat, totlen); 886292207Savos m->m_pkthdr.len = m->m_len = totlen; 887292207Savos 888251538Srpaulo return (m); 889292207Savosfail: 890292207Savos counter_u64_add(ic->ic_ierrors, 1); 891292207Savos return (NULL); 892251538Srpaulo} 893251538Srpaulo 894251538Srpaulostatic struct mbuf * 895292207Savosurtwn_report_intr(struct usb_xfer *xfer, struct urtwn_data *data) 896251538Srpaulo{ 897251538Srpaulo struct urtwn_softc *sc = data->sc; 898287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 899251538Srpaulo struct r92c_rx_stat *stat; 900251538Srpaulo uint8_t *buf; 901292167Savos int len; 902251538Srpaulo 903251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 904251538Srpaulo 905251538Srpaulo if (len < sizeof(*stat)) { 906287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 907251538Srpaulo return (NULL); 908251538Srpaulo } 909251538Srpaulo 910251538Srpaulo buf = data->buf; 911292167Savos stat = (struct r92c_rx_stat *)buf; 912292167Savos 913297596Sadrian /* 914297596Sadrian * For 88E chips we can tie the FF flushing here; 915297596Sadrian * this is where we do know exactly how deep the 916297596Sadrian * transmit queue is. 917297596Sadrian * 918297596Sadrian * But it won't work for R92 chips, so we can't 919297596Sadrian * take the easy way out. 920297596Sadrian */ 921297596Sadrian 922292167Savos if (sc->chip & URTWN_CHIP_88E) { 923292167Savos int report_sel = MS(le32toh(stat->rxdw3), R88E_RXDW3_RPT); 924292167Savos 925292167Savos switch (report_sel) { 926292167Savos case R88E_RXDW3_RPT_RX: 927292207Savos return (urtwn_rxeof(sc, buf, len)); 928292167Savos case R88E_RXDW3_RPT_TX1: 929292167Savos urtwn_r88e_ratectl_tx_complete(sc, &stat[1]); 930292167Savos break; 931292167Savos default: 932294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, 933294471Savos "%s: case %d was not handled\n", __func__, 934294471Savos report_sel); 935292167Savos break; 936292167Savos } 937292167Savos } else 938292207Savos return (urtwn_rxeof(sc, buf, len)); 939292167Savos 940292167Savos return (NULL); 941292167Savos} 942292167Savos 943292167Savosstatic struct mbuf * 944292207Savosurtwn_rxeof(struct urtwn_softc *sc, uint8_t *buf, int len) 945292167Savos{ 946292167Savos struct r92c_rx_stat *stat; 947292167Savos struct mbuf *m, *m0 = NULL, *prevm = NULL; 948292167Savos uint32_t rxdw0; 949292167Savos int totlen, pktlen, infosz, npkts; 950292167Savos 951251538Srpaulo /* Get the number of encapsulated frames. */ 952251538Srpaulo stat = (struct r92c_rx_stat *)buf; 953251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 954294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 955294471Savos "%s: Rx %d frames in one chunk\n", __func__, npkts); 956251538Srpaulo 957251538Srpaulo /* Process all of them. */ 958251538Srpaulo while (npkts-- > 0) { 959251538Srpaulo if (len < sizeof(*stat)) 960251538Srpaulo break; 961251538Srpaulo stat = (struct r92c_rx_stat *)buf; 962251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 963251538Srpaulo 964251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 965251538Srpaulo if (pktlen == 0) 966251538Srpaulo break; 967251538Srpaulo 968251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 969251538Srpaulo 970251538Srpaulo /* Make sure everything fits in xfer. */ 971251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 972251538Srpaulo if (totlen > len) 973251538Srpaulo break; 974251538Srpaulo 975292207Savos m = urtwn_rx_copy_to_mbuf(sc, stat, totlen); 976251538Srpaulo if (m0 == NULL) 977251538Srpaulo m0 = m; 978251538Srpaulo if (prevm == NULL) 979251538Srpaulo prevm = m; 980251538Srpaulo else { 981251538Srpaulo prevm->m_next = m; 982251538Srpaulo prevm = m; 983251538Srpaulo } 984251538Srpaulo 985251538Srpaulo /* Next chunk is 128-byte aligned. */ 986251538Srpaulo totlen = (totlen + 127) & ~127; 987251538Srpaulo buf += totlen; 988251538Srpaulo len -= totlen; 989251538Srpaulo } 990251538Srpaulo 991251538Srpaulo return (m0); 992251538Srpaulo} 993251538Srpaulo 994251538Srpaulostatic void 995292167Savosurtwn_r88e_ratectl_tx_complete(struct urtwn_softc *sc, void *arg) 996292167Savos{ 997292167Savos struct r88e_tx_rpt_ccx *rpt = arg; 998292167Savos struct ieee80211vap *vap; 999292167Savos struct ieee80211_node *ni; 1000292167Savos uint8_t macid; 1001292167Savos int ntries; 1002292167Savos 1003292167Savos macid = MS(rpt->rptb1, R88E_RPTB1_MACID); 1004292167Savos ntries = MS(rpt->rptb2, R88E_RPTB2_RETRY_CNT); 1005292167Savos 1006292167Savos URTWN_NT_LOCK(sc); 1007292167Savos ni = sc->node_list[macid]; 1008292167Savos if (ni != NULL) { 1009292167Savos vap = ni->ni_vap; 1010294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: frame for macid %d was" 1011294471Savos "%s sent (%d retries)\n", __func__, macid, 1012294471Savos (rpt->rptb1 & R88E_RPTB1_PKT_OK) ? "" : " not", 1013294471Savos ntries); 1014292167Savos 1015292167Savos if (rpt->rptb1 & R88E_RPTB1_PKT_OK) { 1016292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1017292167Savos IEEE80211_RATECTL_TX_SUCCESS, &ntries, NULL); 1018292167Savos } else { 1019292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1020292167Savos IEEE80211_RATECTL_TX_FAILURE, &ntries, NULL); 1021292167Savos } 1022294471Savos } else { 1023294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: macid %d, ni is NULL\n", 1024294471Savos __func__, macid); 1025294471Savos } 1026292167Savos URTWN_NT_UNLOCK(sc); 1027292167Savos} 1028292167Savos 1029292207Savosstatic struct ieee80211_node * 1030292207Savosurtwn_rx_frame(struct urtwn_softc *sc, struct mbuf *m, int8_t *rssi_p) 1031292207Savos{ 1032292207Savos struct ieee80211com *ic = &sc->sc_ic; 1033292207Savos struct ieee80211_frame_min *wh; 1034292207Savos struct r92c_rx_stat *stat; 1035292207Savos uint32_t rxdw0, rxdw3; 1036292207Savos uint8_t rate, cipher; 1037297910Sadrian int8_t rssi = -127; 1038292207Savos int infosz; 1039292207Savos 1040292207Savos stat = mtod(m, struct r92c_rx_stat *); 1041292207Savos rxdw0 = le32toh(stat->rxdw0); 1042292207Savos rxdw3 = le32toh(stat->rxdw3); 1043292207Savos 1044292207Savos rate = MS(rxdw3, R92C_RXDW3_RATE); 1045292207Savos cipher = MS(rxdw0, R92C_RXDW0_CIPHER); 1046292207Savos infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 1047292207Savos 1048292207Savos /* Get RSSI from PHY status descriptor if present. */ 1049292207Savos if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 1050292207Savos if (sc->chip & URTWN_CHIP_88E) 1051292207Savos rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]); 1052292207Savos else 1053292207Savos rssi = urtwn_get_rssi(sc, rate, &stat[1]); 1054297910Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: rssi=%d\n", __func__, rssi); 1055292207Savos /* Update our average RSSI. */ 1056292207Savos urtwn_update_avgrssi(sc, rate, rssi); 1057292207Savos } 1058292207Savos 1059292207Savos if (ieee80211_radiotap_active(ic)) { 1060292207Savos struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 1061292207Savos 1062292207Savos tap->wr_flags = 0; 1063292207Savos 1064292207Savos urtwn_get_tsf(sc, &tap->wr_tsft); 1065292207Savos if (__predict_false(le32toh((uint32_t)tap->wr_tsft) < 1066292207Savos le32toh(stat->rxdw5))) { 1067292207Savos tap->wr_tsft = le32toh(tap->wr_tsft >> 32) - 1; 1068292207Savos tap->wr_tsft = (uint64_t)htole32(tap->wr_tsft) << 32; 1069292207Savos } else 1070292207Savos tap->wr_tsft &= 0xffffffff00000000; 1071292207Savos tap->wr_tsft += stat->rxdw5; 1072292207Savos 1073297175Sadrian /* XXX 20/40? */ 1074297175Sadrian /* XXX shortgi? */ 1075297175Sadrian 1076292207Savos /* Map HW rate index to 802.11 rate. */ 1077292207Savos if (!(rxdw3 & R92C_RXDW3_HT)) { 1078292207Savos tap->wr_rate = ridx2rate[rate]; 1079292207Savos } else if (rate >= 12) { /* MCS0~15. */ 1080292207Savos /* Bit 7 set means HT MCS instead of rate. */ 1081292207Savos tap->wr_rate = 0x80 | (rate - 12); 1082292207Savos } 1083297910Sadrian 1084297910Sadrian /* XXX TODO: this isn't right; should use the last good RSSI */ 1085292207Savos tap->wr_dbm_antsignal = rssi; 1086292207Savos tap->wr_dbm_antnoise = URTWN_NOISE_FLOOR; 1087292207Savos } 1088292207Savos 1089292207Savos *rssi_p = rssi; 1090292207Savos 1091292207Savos /* Drop descriptor. */ 1092292207Savos m_adj(m, sizeof(*stat) + infosz); 1093292207Savos wh = mtod(m, struct ieee80211_frame_min *); 1094292207Savos 1095292207Savos if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) && 1096292207Savos cipher != R92C_CAM_ALGO_NONE) { 1097292207Savos m->m_flags |= M_WEP; 1098292207Savos } 1099292207Savos 1100292207Savos if (m->m_len >= sizeof(*wh)) 1101292207Savos return (ieee80211_find_rxnode(ic, wh)); 1102292207Savos 1103292207Savos return (NULL); 1104292207Savos} 1105292207Savos 1106292167Savosstatic void 1107251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1108251538Srpaulo{ 1109251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1110287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1111251538Srpaulo struct ieee80211_node *ni; 1112251538Srpaulo struct mbuf *m = NULL, *next; 1113251538Srpaulo struct urtwn_data *data; 1114292207Savos int8_t nf, rssi; 1115251538Srpaulo 1116251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1117251538Srpaulo 1118251538Srpaulo switch (USB_GET_STATE(xfer)) { 1119251538Srpaulo case USB_ST_TRANSFERRED: 1120251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1121251538Srpaulo if (data == NULL) 1122251538Srpaulo goto tr_setup; 1123251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1124292207Savos m = urtwn_report_intr(xfer, data); 1125251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1126251538Srpaulo /* FALLTHROUGH */ 1127251538Srpaulo case USB_ST_SETUP: 1128251538Srpaulotr_setup: 1129251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 1130251538Srpaulo if (data == NULL) { 1131251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 1132297596Sadrian goto finish; 1133251538Srpaulo } 1134251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1135251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1136251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 1137251538Srpaulo usbd_xfer_max_len(xfer)); 1138251538Srpaulo usbd_transfer_submit(xfer); 1139251538Srpaulo 1140251538Srpaulo /* 1141251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 1142251538Srpaulo * ieee80211_input() because here is at the end of a USB 1143251538Srpaulo * callback and safe to unlock. 1144251538Srpaulo */ 1145251538Srpaulo while (m != NULL) { 1146251538Srpaulo next = m->m_next; 1147251538Srpaulo m->m_next = NULL; 1148292207Savos 1149292207Savos ni = urtwn_rx_frame(sc, m, &rssi); 1150297910Sadrian 1151297910Sadrian /* Store a global last-good RSSI */ 1152297910Sadrian if (rssi != -127) 1153297910Sadrian sc->last_rssi = rssi; 1154297910Sadrian 1155292207Savos URTWN_UNLOCK(sc); 1156292207Savos 1157251538Srpaulo nf = URTWN_NOISE_FLOOR; 1158251538Srpaulo if (ni != NULL) { 1159297910Sadrian if (rssi != -127) 1160297910Sadrian URTWN_NODE(ni)->last_rssi = rssi; 1161297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 1162297175Sadrian m->m_flags |= M_AMPDU; 1163297910Sadrian (void)ieee80211_input(ni, m, 1164297910Sadrian URTWN_NODE(ni)->last_rssi - nf, nf); 1165251538Srpaulo ieee80211_free_node(ni); 1166289799Savos } else { 1167297910Sadrian /* Use last good global RSSI */ 1168297910Sadrian (void)ieee80211_input_all(ic, m, 1169297910Sadrian sc->last_rssi - nf, nf); 1170289799Savos } 1171292207Savos URTWN_LOCK(sc); 1172251538Srpaulo m = next; 1173251538Srpaulo } 1174251538Srpaulo break; 1175251538Srpaulo default: 1176251538Srpaulo /* needs it to the inactive queue due to a error. */ 1177251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1178251538Srpaulo if (data != NULL) { 1179251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1180251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1181251538Srpaulo } 1182251538Srpaulo if (error != USB_ERR_CANCELLED) { 1183251538Srpaulo usbd_xfer_set_stall(xfer); 1184287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1185251538Srpaulo goto tr_setup; 1186251538Srpaulo } 1187251538Srpaulo break; 1188251538Srpaulo } 1189297596Sadrianfinish: 1190297596Sadrian /* Finished receive; age anything left on the FF queue by a little bump */ 1191297596Sadrian /* 1192297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1193297596Sadrian * flush the FF staging queue if we're approaching idle. 1194297596Sadrian */ 1195297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1196297596Sadrian URTWN_UNLOCK(sc); 1197297596Sadrian ieee80211_ff_age_all(ic, 1); 1198297596Sadrian URTWN_LOCK(sc); 1199297596Sadrian#endif 1200297596Sadrian 1201297596Sadrian /* Kick-start more transmit in case we stalled */ 1202297596Sadrian urtwn_start(sc); 1203251538Srpaulo} 1204251538Srpaulo 1205251538Srpaulostatic void 1206289891Savosurtwn_txeof(struct urtwn_softc *sc, struct urtwn_data *data, int status) 1207251538Srpaulo{ 1208251538Srpaulo 1209251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1210289891Savos 1211290631Savos if (data->ni != NULL) /* not a beacon frame */ 1212290631Savos ieee80211_tx_complete(data->ni, data->m, status); 1213289891Savos 1214297596Sadrian if (sc->sc_tx_n_active > 0) 1215297596Sadrian sc->sc_tx_n_active--; 1216297596Sadrian 1217287197Sglebius data->ni = NULL; 1218287197Sglebius data->m = NULL; 1219289891Savos 1220251538Srpaulo sc->sc_txtimer = 0; 1221289891Savos 1222289891Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1223251538Srpaulo} 1224251538Srpaulo 1225289066Skevlostatic int 1226289066Skevlourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 1227289066Skevlo int ndata, int maxsz) 1228289066Skevlo{ 1229289066Skevlo int i, error; 1230289066Skevlo 1231289066Skevlo for (i = 0; i < ndata; i++) { 1232289066Skevlo struct urtwn_data *dp = &data[i]; 1233289066Skevlo dp->sc = sc; 1234289066Skevlo dp->m = NULL; 1235289066Skevlo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1236289066Skevlo if (dp->buf == NULL) { 1237289066Skevlo device_printf(sc->sc_dev, 1238289066Skevlo "could not allocate buffer\n"); 1239289066Skevlo error = ENOMEM; 1240289066Skevlo goto fail; 1241289066Skevlo } 1242289066Skevlo dp->ni = NULL; 1243289066Skevlo } 1244289066Skevlo 1245289066Skevlo return (0); 1246289066Skevlofail: 1247289066Skevlo urtwn_free_list(sc, data, ndata); 1248289066Skevlo return (error); 1249289066Skevlo} 1250289066Skevlo 1251289066Skevlostatic int 1252289066Skevlourtwn_alloc_rx_list(struct urtwn_softc *sc) 1253289066Skevlo{ 1254289066Skevlo int error, i; 1255289066Skevlo 1256289066Skevlo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 1257289066Skevlo URTWN_RXBUFSZ); 1258289066Skevlo if (error != 0) 1259289066Skevlo return (error); 1260289066Skevlo 1261289066Skevlo STAILQ_INIT(&sc->sc_rx_active); 1262289066Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 1263289066Skevlo 1264289066Skevlo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 1265289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1266289066Skevlo 1267289066Skevlo return (0); 1268289066Skevlo} 1269289066Skevlo 1270289066Skevlostatic int 1271289066Skevlourtwn_alloc_tx_list(struct urtwn_softc *sc) 1272289066Skevlo{ 1273289066Skevlo int error, i; 1274289066Skevlo 1275289066Skevlo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 1276289066Skevlo URTWN_TXBUFSZ); 1277289066Skevlo if (error != 0) 1278289066Skevlo return (error); 1279289066Skevlo 1280289066Skevlo STAILQ_INIT(&sc->sc_tx_active); 1281289066Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 1282289066Skevlo STAILQ_INIT(&sc->sc_tx_pending); 1283289066Skevlo 1284289066Skevlo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 1285289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 1286289066Skevlo 1287289066Skevlo return (0); 1288289066Skevlo} 1289289066Skevlo 1290251538Srpaulostatic void 1291289066Skevlourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 1292289066Skevlo{ 1293289066Skevlo int i; 1294289066Skevlo 1295289066Skevlo for (i = 0; i < ndata; i++) { 1296289066Skevlo struct urtwn_data *dp = &data[i]; 1297289066Skevlo 1298289066Skevlo if (dp->buf != NULL) { 1299289066Skevlo free(dp->buf, M_USBDEV); 1300289066Skevlo dp->buf = NULL; 1301289066Skevlo } 1302289066Skevlo if (dp->ni != NULL) { 1303289066Skevlo ieee80211_free_node(dp->ni); 1304289066Skevlo dp->ni = NULL; 1305289066Skevlo } 1306289066Skevlo } 1307289066Skevlo} 1308289066Skevlo 1309289066Skevlostatic void 1310289066Skevlourtwn_free_rx_list(struct urtwn_softc *sc) 1311289066Skevlo{ 1312289066Skevlo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 1313289066Skevlo} 1314289066Skevlo 1315289066Skevlostatic void 1316289066Skevlourtwn_free_tx_list(struct urtwn_softc *sc) 1317289066Skevlo{ 1318289066Skevlo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 1319289066Skevlo} 1320289066Skevlo 1321289066Skevlostatic void 1322251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 1323251538Srpaulo{ 1324251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1325297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1326297596Sadrian struct ieee80211com *ic = &sc->sc_ic; 1327297596Sadrian#endif 1328251538Srpaulo struct urtwn_data *data; 1329251538Srpaulo 1330251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1331251538Srpaulo 1332251538Srpaulo switch (USB_GET_STATE(xfer)){ 1333251538Srpaulo case USB_ST_TRANSFERRED: 1334251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1335251538Srpaulo if (data == NULL) 1336251538Srpaulo goto tr_setup; 1337251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1338289891Savos urtwn_txeof(sc, data, 0); 1339251538Srpaulo /* FALLTHROUGH */ 1340251538Srpaulo case USB_ST_SETUP: 1341251538Srpaulotr_setup: 1342251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 1343251538Srpaulo if (data == NULL) { 1344294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1345294471Savos "%s: empty pending queue\n", __func__); 1346297596Sadrian sc->sc_tx_n_active = 0; 1347288353Sadrian goto finish; 1348251538Srpaulo } 1349251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1350251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1351251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1352251538Srpaulo usbd_transfer_submit(xfer); 1353297596Sadrian sc->sc_tx_n_active++; 1354251538Srpaulo break; 1355251538Srpaulo default: 1356251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1357251538Srpaulo if (data == NULL) 1358251538Srpaulo goto tr_setup; 1359289891Savos STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1360289891Savos urtwn_txeof(sc, data, 1); 1361251538Srpaulo if (error != USB_ERR_CANCELLED) { 1362251538Srpaulo usbd_xfer_set_stall(xfer); 1363251538Srpaulo goto tr_setup; 1364251538Srpaulo } 1365251538Srpaulo break; 1366251538Srpaulo } 1367288353Sadrianfinish: 1368297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1369297596Sadrian /* 1370297596Sadrian * If the TX active queue drops below a certain 1371297596Sadrian * threshold, ensure we age fast-frames out so they're 1372297596Sadrian * transmitted. 1373297596Sadrian */ 1374297596Sadrian if (sc->sc_tx_n_active <= 1) { 1375297596Sadrian /* XXX ew - net80211 should defer this for us! */ 1376297596Sadrian 1377297596Sadrian /* 1378297596Sadrian * Note: this sc_tx_n_active currently tracks 1379297596Sadrian * the number of pending transmit submissions 1380297596Sadrian * and not the actual depth of the TX frames 1381297596Sadrian * pending to the hardware. That means that 1382297596Sadrian * we're going to end up with some sub-optimal 1383297596Sadrian * aggregation behaviour. 1384297596Sadrian */ 1385297596Sadrian /* 1386297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1387297596Sadrian * flush the FF staging queue if we're approaching idle. 1388297596Sadrian */ 1389297596Sadrian URTWN_UNLOCK(sc); 1390297596Sadrian ieee80211_ff_flush(ic, WME_AC_VO); 1391297596Sadrian ieee80211_ff_flush(ic, WME_AC_VI); 1392297596Sadrian ieee80211_ff_flush(ic, WME_AC_BE); 1393297596Sadrian ieee80211_ff_flush(ic, WME_AC_BK); 1394297596Sadrian URTWN_LOCK(sc); 1395297596Sadrian } 1396297596Sadrian#endif 1397288353Sadrian /* Kick-start more transmit */ 1398288353Sadrian urtwn_start(sc); 1399251538Srpaulo} 1400251538Srpaulo 1401251538Srpaulostatic struct urtwn_data * 1402251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 1403251538Srpaulo{ 1404251538Srpaulo struct urtwn_data *bf; 1405251538Srpaulo 1406251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 1407251538Srpaulo if (bf != NULL) 1408251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 1409294471Savos else { 1410294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1411294471Savos "%s: out of xmit buffers\n", __func__); 1412294471Savos } 1413251538Srpaulo return (bf); 1414251538Srpaulo} 1415251538Srpaulo 1416251538Srpaulostatic struct urtwn_data * 1417251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 1418251538Srpaulo{ 1419251538Srpaulo struct urtwn_data *bf; 1420251538Srpaulo 1421251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1422251538Srpaulo 1423251538Srpaulo bf = _urtwn_getbuf(sc); 1424294471Savos if (bf == NULL) { 1425294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: stop queue\n", 1426294471Savos __func__); 1427294471Savos } 1428251538Srpaulo return (bf); 1429251538Srpaulo} 1430251538Srpaulo 1431291698Savosstatic usb_error_t 1432251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1433251538Srpaulo int len) 1434251538Srpaulo{ 1435251538Srpaulo usb_device_request_t req; 1436251538Srpaulo 1437251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1438251538Srpaulo req.bRequest = R92C_REQ_REGS; 1439251538Srpaulo USETW(req.wValue, addr); 1440251538Srpaulo USETW(req.wIndex, 0); 1441251538Srpaulo USETW(req.wLength, len); 1442251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1443251538Srpaulo} 1444251538Srpaulo 1445291698Savosstatic usb_error_t 1446251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 1447251538Srpaulo{ 1448291698Savos return (urtwn_write_region_1(sc, addr, &val, sizeof(val))); 1449251538Srpaulo} 1450251538Srpaulo 1451291698Savosstatic usb_error_t 1452251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 1453251538Srpaulo{ 1454251538Srpaulo val = htole16(val); 1455291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1456251538Srpaulo} 1457251538Srpaulo 1458291698Savosstatic usb_error_t 1459251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 1460251538Srpaulo{ 1461251538Srpaulo val = htole32(val); 1462291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1463251538Srpaulo} 1464251538Srpaulo 1465291698Savosstatic usb_error_t 1466251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1467251538Srpaulo int len) 1468251538Srpaulo{ 1469251538Srpaulo usb_device_request_t req; 1470251538Srpaulo 1471251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 1472251538Srpaulo req.bRequest = R92C_REQ_REGS; 1473251538Srpaulo USETW(req.wValue, addr); 1474251538Srpaulo USETW(req.wIndex, 0); 1475251538Srpaulo USETW(req.wLength, len); 1476251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1477251538Srpaulo} 1478251538Srpaulo 1479251538Srpaulostatic uint8_t 1480251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 1481251538Srpaulo{ 1482251538Srpaulo uint8_t val; 1483251538Srpaulo 1484251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 1485251538Srpaulo return (0xff); 1486251538Srpaulo return (val); 1487251538Srpaulo} 1488251538Srpaulo 1489251538Srpaulostatic uint16_t 1490251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 1491251538Srpaulo{ 1492251538Srpaulo uint16_t val; 1493251538Srpaulo 1494251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 1495251538Srpaulo return (0xffff); 1496251538Srpaulo return (le16toh(val)); 1497251538Srpaulo} 1498251538Srpaulo 1499251538Srpaulostatic uint32_t 1500251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 1501251538Srpaulo{ 1502251538Srpaulo uint32_t val; 1503251538Srpaulo 1504251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 1505251538Srpaulo return (0xffffffff); 1506251538Srpaulo return (le32toh(val)); 1507251538Srpaulo} 1508251538Srpaulo 1509251538Srpaulostatic int 1510251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1511251538Srpaulo{ 1512251538Srpaulo struct r92c_fw_cmd cmd; 1513291698Savos usb_error_t error; 1514251538Srpaulo int ntries; 1515251538Srpaulo 1516295871Savos if (!(sc->sc_flags & URTWN_FW_LOADED)) { 1517295871Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, "%s: firmware " 1518295871Savos "was not loaded; command (id %d) will be discarded\n", 1519295871Savos __func__, id); 1520295871Savos return (0); 1521295871Savos } 1522295871Savos 1523251538Srpaulo /* Wait for current FW box to be empty. */ 1524251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1525251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1526251538Srpaulo break; 1527266472Shselasky urtwn_ms_delay(sc); 1528251538Srpaulo } 1529251538Srpaulo if (ntries == 100) { 1530251538Srpaulo device_printf(sc->sc_dev, 1531251538Srpaulo "could not send firmware command\n"); 1532251538Srpaulo return (ETIMEDOUT); 1533251538Srpaulo } 1534251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1535251538Srpaulo cmd.id = id; 1536251538Srpaulo if (len > 3) 1537251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1538251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1539251538Srpaulo memcpy(cmd.msg, buf, len); 1540251538Srpaulo 1541251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1542291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1543251538Srpaulo (uint8_t *)&cmd + 4, 2); 1544291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1545291698Savos return (EIO); 1546291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1547251538Srpaulo (uint8_t *)&cmd + 0, 4); 1548291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1549291698Savos return (EIO); 1550251538Srpaulo 1551251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1552251538Srpaulo return (0); 1553251538Srpaulo} 1554251538Srpaulo 1555292174Savosstatic void 1556292174Savosurtwn_cmdq_cb(void *arg, int pending) 1557292174Savos{ 1558292174Savos struct urtwn_softc *sc = arg; 1559292174Savos struct urtwn_cmdq *item; 1560292174Savos 1561292174Savos /* 1562292174Savos * Device must be powered on (via urtwn_power_on()) 1563292174Savos * before any command may be sent. 1564292174Savos */ 1565292174Savos URTWN_LOCK(sc); 1566292174Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 1567292174Savos URTWN_UNLOCK(sc); 1568292174Savos return; 1569292174Savos } 1570292174Savos 1571292174Savos URTWN_CMDQ_LOCK(sc); 1572292174Savos while (sc->cmdq[sc->cmdq_first].func != NULL) { 1573292174Savos item = &sc->cmdq[sc->cmdq_first]; 1574292174Savos sc->cmdq_first = (sc->cmdq_first + 1) % URTWN_CMDQ_SIZE; 1575292174Savos URTWN_CMDQ_UNLOCK(sc); 1576292174Savos 1577292174Savos item->func(sc, &item->data); 1578292174Savos 1579292174Savos URTWN_CMDQ_LOCK(sc); 1580292174Savos memset(item, 0, sizeof (*item)); 1581292174Savos } 1582292174Savos URTWN_CMDQ_UNLOCK(sc); 1583292174Savos URTWN_UNLOCK(sc); 1584292174Savos} 1585292174Savos 1586292174Savosstatic int 1587292174Savosurtwn_cmd_sleepable(struct urtwn_softc *sc, const void *ptr, size_t len, 1588292174Savos CMD_FUNC_PROTO) 1589292174Savos{ 1590292174Savos struct ieee80211com *ic = &sc->sc_ic; 1591292174Savos 1592292174Savos KASSERT(len <= sizeof(union sec_param), ("buffer overflow")); 1593292174Savos 1594292174Savos URTWN_CMDQ_LOCK(sc); 1595292174Savos if (sc->cmdq[sc->cmdq_last].func != NULL) { 1596292174Savos device_printf(sc->sc_dev, "%s: cmdq overflow\n", __func__); 1597292174Savos URTWN_CMDQ_UNLOCK(sc); 1598292174Savos 1599292174Savos return (EAGAIN); 1600292174Savos } 1601292174Savos 1602292174Savos if (ptr != NULL) 1603292174Savos memcpy(&sc->cmdq[sc->cmdq_last].data, ptr, len); 1604292174Savos sc->cmdq[sc->cmdq_last].func = func; 1605292174Savos sc->cmdq_last = (sc->cmdq_last + 1) % URTWN_CMDQ_SIZE; 1606292174Savos URTWN_CMDQ_UNLOCK(sc); 1607292174Savos 1608292174Savos ieee80211_runtask(ic, &sc->cmdq_task); 1609292174Savos 1610292174Savos return (0); 1611292174Savos} 1612292174Savos 1613264912Skevlostatic __inline void 1614251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1615251538Srpaulo{ 1616264912Skevlo 1617264912Skevlo sc->sc_rf_write(sc, chain, addr, val); 1618264912Skevlo} 1619264912Skevlo 1620264912Skevlostatic void 1621264912Skevlourtwn_r92c_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1622264912Skevlo uint32_t val) 1623264912Skevlo{ 1624251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1625251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1626251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1627251538Srpaulo} 1628251538Srpaulo 1629264912Skevlostatic void 1630264912Skevlourtwn_r88e_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1631264912Skevlouint32_t val) 1632264912Skevlo{ 1633264912Skevlo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1634264912Skevlo SM(R88E_LSSI_PARAM_ADDR, addr) | 1635264912Skevlo SM(R92C_LSSI_PARAM_DATA, val)); 1636264912Skevlo} 1637264912Skevlo 1638251538Srpaulostatic uint32_t 1639251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1640251538Srpaulo{ 1641251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1642251538Srpaulo 1643251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1644251538Srpaulo if (chain != 0) 1645251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1646251538Srpaulo 1647251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1648251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1649266472Shselasky urtwn_ms_delay(sc); 1650251538Srpaulo 1651251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1652251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1653251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1654266472Shselasky urtwn_ms_delay(sc); 1655251538Srpaulo 1656251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1657251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1658266472Shselasky urtwn_ms_delay(sc); 1659251538Srpaulo 1660251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1661251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1662251538Srpaulo else 1663251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1664251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1665251538Srpaulo} 1666251538Srpaulo 1667251538Srpaulostatic int 1668251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1669251538Srpaulo{ 1670291698Savos usb_error_t error; 1671251538Srpaulo int ntries; 1672251538Srpaulo 1673291698Savos error = urtwn_write_4(sc, R92C_LLT_INIT, 1674251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1675251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1676251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1677291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1678291698Savos return (EIO); 1679251538Srpaulo /* Wait for write operation to complete. */ 1680251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1681251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1682251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1683251538Srpaulo return (0); 1684266472Shselasky urtwn_ms_delay(sc); 1685251538Srpaulo } 1686251538Srpaulo return (ETIMEDOUT); 1687251538Srpaulo} 1688251538Srpaulo 1689291264Savosstatic int 1690291264Savosurtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val) 1691251538Srpaulo{ 1692251538Srpaulo uint32_t reg; 1693291698Savos usb_error_t error; 1694251538Srpaulo int ntries; 1695251538Srpaulo 1696291264Savos if (sc->last_rom_addr >= URTWN_EFUSE_MAX_LEN) 1697291264Savos return (EFAULT); 1698291264Savos 1699251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1700291264Savos reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 1701251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1702291264Savos 1703291698Savos error = urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1704291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1705291698Savos return (EIO); 1706251538Srpaulo /* Wait for read operation to complete. */ 1707251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1708251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1709251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1710291264Savos break; 1711266472Shselasky urtwn_ms_delay(sc); 1712251538Srpaulo } 1713291264Savos if (ntries == 100) { 1714291264Savos device_printf(sc->sc_dev, 1715291264Savos "could not read efuse byte at address 0x%x\n", 1716291264Savos sc->last_rom_addr); 1717291264Savos return (ETIMEDOUT); 1718291264Savos } 1719291264Savos 1720291264Savos *val = MS(reg, R92C_EFUSE_CTRL_DATA); 1721291264Savos sc->last_rom_addr++; 1722291264Savos 1723291264Savos return (0); 1724251538Srpaulo} 1725251538Srpaulo 1726291264Savosstatic int 1727291264Savosurtwn_efuse_read_data(struct urtwn_softc *sc, uint8_t *rom, uint8_t off, 1728291264Savos uint8_t msk) 1729291264Savos{ 1730291264Savos uint8_t reg; 1731291264Savos int i, error; 1732291264Savos 1733291264Savos for (i = 0; i < 4; i++) { 1734291264Savos if (msk & (1 << i)) 1735291264Savos continue; 1736291264Savos error = urtwn_efuse_read_next(sc, ®); 1737291264Savos if (error != 0) 1738291264Savos return (error); 1739294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1740294471Savos off * 8 + i * 2, reg); 1741291264Savos rom[off * 8 + i * 2 + 0] = reg; 1742291264Savos 1743291264Savos error = urtwn_efuse_read_next(sc, ®); 1744291264Savos if (error != 0) 1745291264Savos return (error); 1746294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1747294471Savos off * 8 + i * 2 + 1, reg); 1748291264Savos rom[off * 8 + i * 2 + 1] = reg; 1749291264Savos } 1750291264Savos 1751291264Savos return (0); 1752291264Savos} 1753291264Savos 1754294471Savos#ifdef USB_DEBUG 1755251538Srpaulostatic void 1756291264Savosurtwn_dump_rom_contents(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1757251538Srpaulo{ 1758251538Srpaulo int i; 1759251538Srpaulo 1760291264Savos /* Dump ROM contents. */ 1761291264Savos device_printf(sc->sc_dev, "%s:", __func__); 1762291264Savos for (i = 0; i < size; i++) { 1763291264Savos if (i % 32 == 0) 1764291264Savos printf("\n%03X: ", i); 1765291264Savos else if (i % 4 == 0) 1766291264Savos printf(" "); 1767291264Savos 1768291264Savos printf("%02X", rom[i]); 1769291264Savos } 1770291264Savos printf("\n"); 1771291264Savos} 1772291264Savos#endif 1773291264Savos 1774291264Savosstatic int 1775291264Savosurtwn_efuse_read(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1776291264Savos{ 1777291264Savos#define URTWN_CHK(res) do { \ 1778291264Savos if ((error = res) != 0) \ 1779291264Savos goto end; \ 1780291264Savos} while(0) 1781291264Savos uint8_t msk, off, reg; 1782291264Savos int error; 1783291264Savos 1784291698Savos URTWN_CHK(urtwn_efuse_switch_power(sc)); 1785264912Skevlo 1786291264Savos /* Read full ROM image. */ 1787291264Savos sc->last_rom_addr = 0; 1788291264Savos memset(rom, 0xff, size); 1789291264Savos 1790291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1791291264Savos while (reg != 0xff) { 1792291264Savos /* check for extended header */ 1793291264Savos if ((sc->chip & URTWN_CHIP_88E) && (reg & 0x1f) == 0x0f) { 1794291264Savos off = reg >> 5; 1795291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1796291264Savos 1797291264Savos if ((reg & 0x0f) != 0x0f) 1798291264Savos off = ((reg & 0xf0) >> 1) | off; 1799291264Savos else 1800291264Savos continue; 1801291264Savos } else 1802291264Savos off = reg >> 4; 1803251538Srpaulo msk = reg & 0xf; 1804291264Savos 1805291264Savos URTWN_CHK(urtwn_efuse_read_data(sc, rom, off, msk)); 1806291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1807251538Srpaulo } 1808291264Savos 1809291264Savosend: 1810291264Savos 1811294471Savos#ifdef USB_DEBUG 1812294471Savos if (sc->sc_debug & URTWN_DEBUG_ROM) 1813291264Savos urtwn_dump_rom_contents(sc, rom, size); 1814251538Srpaulo#endif 1815291264Savos 1816282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); 1817291264Savos 1818291264Savos if (error != 0) { 1819291264Savos device_printf(sc->sc_dev, "%s: error while reading ROM\n", 1820291264Savos __func__); 1821291264Savos } 1822291264Savos 1823291264Savos return (error); 1824291264Savos#undef URTWN_CHK 1825282623Skevlo} 1826281592Skevlo 1827291698Savosstatic int 1828264912Skevlourtwn_efuse_switch_power(struct urtwn_softc *sc) 1829264912Skevlo{ 1830291698Savos usb_error_t error; 1831264912Skevlo uint32_t reg; 1832251538Srpaulo 1833291698Savos error = urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); 1834291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1835291698Savos return (EIO); 1836281918Skevlo 1837264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1838264912Skevlo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1839291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1840264912Skevlo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1841291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1842291698Savos return (EIO); 1843264912Skevlo } 1844264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1845264912Skevlo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1846291698Savos error = urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1847264912Skevlo reg | R92C_SYS_FUNC_EN_ELDR); 1848291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1849291698Savos return (EIO); 1850264912Skevlo } 1851264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1852264912Skevlo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1853264912Skevlo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1854291698Savos error = urtwn_write_2(sc, R92C_SYS_CLKR, 1855264912Skevlo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1856291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1857291698Savos return (EIO); 1858264912Skevlo } 1859291698Savos 1860291698Savos return (0); 1861264912Skevlo} 1862264912Skevlo 1863251538Srpaulostatic int 1864251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1865251538Srpaulo{ 1866251538Srpaulo uint32_t reg; 1867251538Srpaulo 1868264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1869264912Skevlo return (0); 1870264912Skevlo 1871251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1872251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1873251538Srpaulo return (EIO); 1874251538Srpaulo 1875251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1876251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1877251538Srpaulo /* Check if it is a castrated 8192C. */ 1878251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1879251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1880251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1881251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1882251538Srpaulo } 1883251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1884251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1885251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1886251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1887251538Srpaulo } 1888251538Srpaulo return (0); 1889251538Srpaulo} 1890251538Srpaulo 1891291264Savosstatic int 1892251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1893251538Srpaulo{ 1894291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 1895291264Savos int error; 1896251538Srpaulo 1897251538Srpaulo /* Read full ROM image. */ 1898291264Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(*rom)); 1899291264Savos if (error != 0) 1900291264Savos return (error); 1901251538Srpaulo 1902251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1903291264Savos sc->last_rom_addr = 0x1fa; 1904291264Savos error = urtwn_efuse_read_next(sc, &sc->pa_setting); 1905291264Savos if (error != 0) 1906291264Savos return (error); 1907294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: PA setting=0x%x\n", __func__, 1908294471Savos sc->pa_setting); 1909251538Srpaulo 1910251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1911251538Srpaulo 1912251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1913294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type=%d\n", 1914294471Savos __func__, sc->regulatory); 1915287197Sglebius IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1916251538Srpaulo 1917264912Skevlo sc->sc_rf_write = urtwn_r92c_rf_write; 1918264912Skevlo sc->sc_power_on = urtwn_r92c_power_on; 1919295874Savos sc->sc_power_off = urtwn_r92c_power_off; 1920291264Savos 1921291264Savos return (0); 1922251538Srpaulo} 1923251538Srpaulo 1924291264Savosstatic int 1925264912Skevlourtwn_r88e_read_rom(struct urtwn_softc *sc) 1926264912Skevlo{ 1927294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 1928294198Savos int error; 1929264912Skevlo 1930294198Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(sc->rom.r88e_rom)); 1931291264Savos if (error != 0) 1932291264Savos return (error); 1933264912Skevlo 1934294198Savos sc->bw20_tx_pwr_diff = (rom->tx_pwr_diff >> 4); 1935264912Skevlo if (sc->bw20_tx_pwr_diff & 0x08) 1936264912Skevlo sc->bw20_tx_pwr_diff |= 0xf0; 1937294198Savos sc->ofdm_tx_pwr_diff = (rom->tx_pwr_diff & 0xf); 1938264912Skevlo if (sc->ofdm_tx_pwr_diff & 0x08) 1939264912Skevlo sc->ofdm_tx_pwr_diff |= 0xf0; 1940294198Savos sc->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY); 1941294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type %d\n", 1942294471Savos __func__,sc->regulatory); 1943294198Savos IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1944264912Skevlo 1945264912Skevlo sc->sc_rf_write = urtwn_r88e_rf_write; 1946264912Skevlo sc->sc_power_on = urtwn_r88e_power_on; 1947295874Savos sc->sc_power_off = urtwn_r88e_power_off; 1948291264Savos 1949291264Savos return (0); 1950264912Skevlo} 1951264912Skevlo 1952298436Savosstatic __inline uint8_t 1953298436Savosrate2ridx(uint8_t rate) 1954298436Savos{ 1955298436Savos if (rate & IEEE80211_RATE_MCS) { 1956298436Savos /* 11n rates start at idx 12 */ 1957298436Savos return ((rate & 0xf) + 12); 1958298436Savos } 1959298436Savos switch (rate) { 1960298436Savos /* 11g */ 1961298436Savos case 12: return 4; 1962298436Savos case 18: return 5; 1963298436Savos case 24: return 6; 1964298436Savos case 36: return 7; 1965298436Savos case 48: return 8; 1966298436Savos case 72: return 9; 1967298436Savos case 96: return 10; 1968298436Savos case 108: return 11; 1969298436Savos /* 11b */ 1970298436Savos case 2: return 0; 1971298436Savos case 4: return 1; 1972298436Savos case 11: return 2; 1973298436Savos case 22: return 3; 1974298436Savos default: return URTWN_RIDX_UNKNOWN; 1975298436Savos } 1976298436Savos} 1977298436Savos 1978251538Srpaulo/* 1979251538Srpaulo * Initialize rate adaptation in firmware. 1980251538Srpaulo */ 1981251538Srpaulostatic int 1982251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 1983251538Srpaulo{ 1984287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1985251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1986251538Srpaulo struct ieee80211_node *ni; 1987297175Sadrian struct ieee80211_rateset *rs, *rs_ht; 1988251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 1989251538Srpaulo uint32_t rates, basicrates; 1990298436Savos uint8_t mode, ridx; 1991298436Savos int maxrate, maxbasicrate, error, i; 1992251538Srpaulo 1993251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1994251538Srpaulo rs = &ni->ni_rates; 1995297175Sadrian rs_ht = (struct ieee80211_rateset *) &ni->ni_htrates; 1996251538Srpaulo 1997251538Srpaulo /* Get normal and basic rates mask. */ 1998251538Srpaulo rates = basicrates = 0; 1999251538Srpaulo maxrate = maxbasicrate = 0; 2000297175Sadrian 2001297175Sadrian /* This is for 11bg */ 2002251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 2003251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 2004298436Savos ridx = rate2ridx(IEEE80211_RV(rs->rs_rates[i])); 2005298436Savos if (ridx == URTWN_RIDX_UNKNOWN) /* Unknown rate, skip. */ 2006251538Srpaulo continue; 2007298436Savos rates |= 1 << ridx; 2008298436Savos if (ridx > maxrate) 2009298436Savos maxrate = ridx; 2010251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 2011298436Savos basicrates |= 1 << ridx; 2012298436Savos if (ridx > maxbasicrate) 2013298436Savos maxbasicrate = ridx; 2014251538Srpaulo } 2015251538Srpaulo } 2016297175Sadrian 2017297175Sadrian /* If we're doing 11n, enable 11n rates */ 2018297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) { 2019297175Sadrian for (i = 0; i < rs_ht->rs_nrates; i++) { 2020297175Sadrian if ((rs_ht->rs_rates[i] & 0x7f) > 0xf) 2021297175Sadrian continue; 2022297175Sadrian /* 11n rates start at index 12 */ 2023298436Savos ridx = ((rs_ht->rs_rates[i]) & 0xf) + 12; 2024298436Savos rates |= (1 << ridx); 2025297175Sadrian 2026297175Sadrian /* Guard against the rate table being oddly ordered */ 2027298436Savos if (ridx > maxrate) 2028298436Savos maxrate = ridx; 2029297175Sadrian } 2030297175Sadrian } 2031297175Sadrian 2032297175Sadrian#if 0 2033297175Sadrian if (ic->ic_curmode == IEEE80211_MODE_11NG) 2034297175Sadrian raid = R92C_RAID_11GN; 2035297175Sadrian#endif 2036297175Sadrian /* NB: group addressed frames are done at 11bg rates for now */ 2037251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2038251538Srpaulo mode = R92C_RAID_11B; 2039251538Srpaulo else 2040251538Srpaulo mode = R92C_RAID_11BG; 2041297175Sadrian /* XXX misleading 'mode' value here for unicast frames */ 2042294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, 2043294471Savos "%s: mode 0x%x, rates 0x%08x, basicrates 0x%08x\n", __func__, 2044251538Srpaulo mode, rates, basicrates); 2045251538Srpaulo 2046251538Srpaulo /* Set rates mask for group addressed frames. */ 2047251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 2048251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 2049251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2050251538Srpaulo if (error != 0) { 2051252401Srpaulo ieee80211_free_node(ni); 2052251538Srpaulo device_printf(sc->sc_dev, 2053251538Srpaulo "could not add broadcast station\n"); 2054251538Srpaulo return (error); 2055251538Srpaulo } 2056297175Sadrian 2057251538Srpaulo /* Set initial MRR rate. */ 2058294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxbasicrate %d\n", __func__, 2059294471Savos maxbasicrate); 2060251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 2061251538Srpaulo maxbasicrate); 2062251538Srpaulo 2063251538Srpaulo /* Set rates mask for unicast frames. */ 2064297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2065297175Sadrian mode = R92C_RAID_11GN; 2066297175Sadrian else if (ic->ic_curmode == IEEE80211_MODE_11B) 2067297175Sadrian mode = R92C_RAID_11B; 2068297175Sadrian else 2069297175Sadrian mode = R92C_RAID_11BG; 2070251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 2071251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 2072251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2073251538Srpaulo if (error != 0) { 2074252401Srpaulo ieee80211_free_node(ni); 2075251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 2076251538Srpaulo return (error); 2077251538Srpaulo } 2078251538Srpaulo /* Set initial MRR rate. */ 2079294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxrate %d\n", __func__, 2080294471Savos maxrate); 2081251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 2082251538Srpaulo maxrate); 2083251538Srpaulo 2084251538Srpaulo /* Indicate highest supported rate. */ 2085297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2086297175Sadrian ni->ni_txrate = rs_ht->rs_rates[rs_ht->rs_nrates - 1] 2087297175Sadrian | IEEE80211_RATE_MCS; 2088297175Sadrian else 2089297175Sadrian ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 2090252401Srpaulo ieee80211_free_node(ni); 2091252401Srpaulo 2092251538Srpaulo return (0); 2093251538Srpaulo} 2094251538Srpaulo 2095290439Savosstatic void 2096290631Savosurtwn_init_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2097251538Srpaulo{ 2098290631Savos struct r92c_tx_desc *txd = &uvp->bcn_desc; 2099290631Savos 2100290631Savos txd->txdw0 = htole32( 2101290631Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | R92C_TXDW0_BMCAST | 2102290631Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2103290631Savos txd->txdw1 = htole32( 2104290631Savos SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) | 2105290631Savos SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 2106290631Savos 2107291858Savos if (sc->chip & URTWN_CHIP_88E) { 2108290631Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 2109291858Savos txd->txdseq |= htole16(R88E_TXDSEQ_HWSEQ_EN); 2110291858Savos } else { 2111290631Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 2112291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2113291858Savos } 2114290631Savos 2115290631Savos txd->txdw4 = htole32(R92C_TXDW4_DRVRATE); 2116290631Savos txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE, URTWN_RIDX_CCK1)); 2117251538Srpaulo} 2118251538Srpaulo 2119290631Savosstatic int 2120290631Savosurtwn_setup_beacon(struct urtwn_softc *sc, struct ieee80211_node *ni) 2121290631Savos{ 2122290631Savos struct ieee80211vap *vap = ni->ni_vap; 2123290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2124290631Savos struct mbuf *m; 2125290631Savos int error; 2126290631Savos 2127290631Savos URTWN_ASSERT_LOCKED(sc); 2128290631Savos 2129290631Savos if (ni->ni_chan == IEEE80211_CHAN_ANYC) 2130290631Savos return (EINVAL); 2131290631Savos 2132290631Savos m = ieee80211_beacon_alloc(ni); 2133290631Savos if (m == NULL) { 2134290631Savos device_printf(sc->sc_dev, 2135290631Savos "%s: could not allocate beacon frame\n", __func__); 2136290631Savos return (ENOMEM); 2137290631Savos } 2138290631Savos 2139290631Savos if (uvp->bcn_mbuf != NULL) 2140290631Savos m_freem(uvp->bcn_mbuf); 2141290631Savos 2142290631Savos uvp->bcn_mbuf = m; 2143290631Savos 2144290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2145290631Savos return (error); 2146290631Savos 2147290631Savos /* XXX bcnq stuck workaround */ 2148290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2149290631Savos return (error); 2150290631Savos 2151294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_BEACON, "%s: beacon was %srecognized\n", 2152294471Savos __func__, urtwn_read_1(sc, R92C_TDECTRL + 2) & 2153294471Savos (R92C_TDECTRL_BCN_VALID >> 16) ? "" : "not "); 2154294471Savos 2155290631Savos return (0); 2156290631Savos} 2157290631Savos 2158251538Srpaulostatic void 2159290631Savosurtwn_update_beacon(struct ieee80211vap *vap, int item) 2160290631Savos{ 2161290631Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2162290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2163290631Savos struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 2164290631Savos struct ieee80211_node *ni = vap->iv_bss; 2165290631Savos int mcast = 0; 2166290631Savos 2167290631Savos URTWN_LOCK(sc); 2168290631Savos if (uvp->bcn_mbuf == NULL) { 2169290631Savos uvp->bcn_mbuf = ieee80211_beacon_alloc(ni); 2170290631Savos if (uvp->bcn_mbuf == NULL) { 2171290631Savos device_printf(sc->sc_dev, 2172290631Savos "%s: could not allocate beacon frame\n", __func__); 2173290631Savos URTWN_UNLOCK(sc); 2174290631Savos return; 2175290631Savos } 2176290631Savos } 2177290631Savos URTWN_UNLOCK(sc); 2178290631Savos 2179290631Savos if (item == IEEE80211_BEACON_TIM) 2180290631Savos mcast = 1; /* XXX */ 2181290631Savos 2182290631Savos setbit(bo->bo_flags, item); 2183290631Savos ieee80211_beacon_update(ni, uvp->bcn_mbuf, mcast); 2184290631Savos 2185290631Savos URTWN_LOCK(sc); 2186290631Savos urtwn_tx_beacon(sc, uvp); 2187290631Savos URTWN_UNLOCK(sc); 2188290631Savos} 2189290631Savos 2190290631Savos/* 2191290631Savos * Push a beacon frame into the chip. Beacon will 2192290631Savos * be repeated by the chip every R92C_BCN_INTERVAL. 2193290631Savos */ 2194290631Savosstatic int 2195290631Savosurtwn_tx_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2196290631Savos{ 2197290631Savos struct r92c_tx_desc *desc = &uvp->bcn_desc; 2198290631Savos struct urtwn_data *bf; 2199290631Savos 2200290631Savos URTWN_ASSERT_LOCKED(sc); 2201290631Savos 2202290631Savos bf = urtwn_getbuf(sc); 2203290631Savos if (bf == NULL) 2204290631Savos return (ENOMEM); 2205290631Savos 2206290631Savos memcpy(bf->buf, desc, sizeof(*desc)); 2207290631Savos urtwn_tx_start(sc, uvp->bcn_mbuf, IEEE80211_FC0_TYPE_MGT, bf); 2208290631Savos 2209290631Savos sc->sc_txtimer = 5; 2210290631Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2211290631Savos 2212290631Savos return (0); 2213290631Savos} 2214290631Savos 2215292175Savosstatic int 2216292175Savosurtwn_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k, 2217292175Savos ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix) 2218292175Savos{ 2219292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2220292175Savos uint8_t i; 2221292175Savos 2222292175Savos if (!(&vap->iv_nw_keys[0] <= k && 2223292175Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) { 2224292175Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 2225292175Savos URTWN_LOCK(sc); 2226292175Savos /* 2227292175Savos * First 4 slots for group keys, 2228292175Savos * what is left - for pairwise. 2229292175Savos * XXX incompatible with IBSS RSN. 2230292175Savos */ 2231292175Savos for (i = IEEE80211_WEP_NKID; 2232292175Savos i < R92C_CAM_ENTRY_COUNT; i++) { 2233292175Savos if ((sc->keys_bmap & (1 << i)) == 0) { 2234292175Savos sc->keys_bmap |= 1 << i; 2235292175Savos *keyix = i; 2236292175Savos break; 2237292175Savos } 2238292175Savos } 2239292175Savos URTWN_UNLOCK(sc); 2240292175Savos if (i == R92C_CAM_ENTRY_COUNT) { 2241292175Savos device_printf(sc->sc_dev, 2242292175Savos "%s: no free space in the key table\n", 2243292175Savos __func__); 2244292175Savos return 0; 2245292175Savos } 2246292175Savos } else 2247292175Savos *keyix = 0; 2248292175Savos } else { 2249292175Savos *keyix = k - vap->iv_nw_keys; 2250292175Savos } 2251292175Savos *rxkeyix = *keyix; 2252292175Savos return 1; 2253292175Savos} 2254292175Savos 2255290631Savosstatic void 2256292175Savosurtwn_key_set_cb(struct urtwn_softc *sc, union sec_param *data) 2257292175Savos{ 2258292175Savos struct ieee80211_key *k = &data->key; 2259292175Savos uint8_t algo, keyid; 2260292175Savos int i, error; 2261292175Savos 2262292175Savos if (k->wk_keyix < IEEE80211_WEP_NKID) 2263292175Savos keyid = k->wk_keyix; 2264292175Savos else 2265292175Savos keyid = 0; 2266292175Savos 2267292175Savos /* Map net80211 cipher to HW crypto algorithm. */ 2268292175Savos switch (k->wk_cipher->ic_cipher) { 2269292175Savos case IEEE80211_CIPHER_WEP: 2270292175Savos if (k->wk_keylen < 8) 2271292175Savos algo = R92C_CAM_ALGO_WEP40; 2272292175Savos else 2273292175Savos algo = R92C_CAM_ALGO_WEP104; 2274292175Savos break; 2275292175Savos case IEEE80211_CIPHER_TKIP: 2276292175Savos algo = R92C_CAM_ALGO_TKIP; 2277292175Savos break; 2278292175Savos case IEEE80211_CIPHER_AES_CCM: 2279292175Savos algo = R92C_CAM_ALGO_AES; 2280292175Savos break; 2281292175Savos default: 2282292175Savos device_printf(sc->sc_dev, "%s: undefined cipher %d\n", 2283292175Savos __func__, k->wk_cipher->ic_cipher); 2284292175Savos return; 2285292175Savos } 2286292175Savos 2287294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2288294471Savos "%s: keyix %d, keyid %d, algo %d/%d, flags %04X, len %d, " 2289294471Savos "macaddr %s\n", __func__, k->wk_keyix, keyid, 2290294471Savos k->wk_cipher->ic_cipher, algo, k->wk_flags, k->wk_keylen, 2291294471Savos ether_sprintf(k->wk_macaddr)); 2292292175Savos 2293292175Savos /* Write key. */ 2294292175Savos for (i = 0; i < 4; i++) { 2295292175Savos error = urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 2296298359Savos le32dec(&k->wk_key[i * 4])); 2297292175Savos if (error != 0) 2298292175Savos goto fail; 2299292175Savos } 2300292175Savos 2301292175Savos /* Write CTL0 last since that will validate the CAM entry. */ 2302292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 2303298359Savos le32dec(&k->wk_macaddr[2])); 2304292175Savos if (error != 0) 2305292175Savos goto fail; 2306292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 2307292175Savos SM(R92C_CAM_ALGO, algo) | 2308292175Savos SM(R92C_CAM_KEYID, keyid) | 2309298359Savos SM(R92C_CAM_MACLO, le16dec(&k->wk_macaddr[0])) | 2310292175Savos R92C_CAM_VALID); 2311292175Savos if (error != 0) 2312292175Savos goto fail; 2313292175Savos 2314292175Savos return; 2315292175Savos 2316292175Savosfail: 2317292175Savos device_printf(sc->sc_dev, "%s fails, error %d\n", __func__, error); 2318292175Savos} 2319292175Savos 2320292175Savosstatic void 2321292175Savosurtwn_key_del_cb(struct urtwn_softc *sc, union sec_param *data) 2322292175Savos{ 2323292175Savos struct ieee80211_key *k = &data->key; 2324292175Savos int i; 2325292175Savos 2326294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2327294471Savos "%s: keyix %d, flags %04X, macaddr %s\n", __func__, 2328292175Savos k->wk_keyix, k->wk_flags, ether_sprintf(k->wk_macaddr)); 2329292175Savos 2330292175Savos urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 0); 2331292175Savos urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 0); 2332292175Savos 2333292175Savos /* Clear key. */ 2334292175Savos for (i = 0; i < 4; i++) 2335292175Savos urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 0); 2336292175Savos sc->keys_bmap &= ~(1 << k->wk_keyix); 2337292175Savos} 2338292175Savos 2339292175Savosstatic int 2340292175Savosurtwn_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k) 2341292175Savos{ 2342292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2343292175Savos 2344292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2345292175Savos /* Not for us. */ 2346292175Savos return (1); 2347292175Savos } 2348292175Savos 2349292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_set_cb)); 2350292175Savos} 2351292175Savos 2352292175Savosstatic int 2353292175Savosurtwn_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k) 2354292175Savos{ 2355292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2356292175Savos 2357292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2358292175Savos /* Not for us. */ 2359292175Savos return (1); 2360292175Savos } 2361292175Savos 2362292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_del_cb)); 2363292175Savos} 2364292175Savos 2365292175Savosstatic void 2366290651Savosurtwn_tsf_task_adhoc(void *arg, int pending) 2367290651Savos{ 2368290651Savos struct ieee80211vap *vap = arg; 2369290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2370290651Savos struct ieee80211_node *ni; 2371290651Savos uint32_t reg; 2372290651Savos 2373290651Savos URTWN_LOCK(sc); 2374290651Savos ni = ieee80211_ref_node(vap->iv_bss); 2375290651Savos reg = urtwn_read_1(sc, R92C_BCN_CTRL); 2376290651Savos 2377290651Savos /* Accept beacons with the same BSSID. */ 2378290651Savos urtwn_set_rx_bssid_all(sc, 0); 2379290651Savos 2380290651Savos /* Enable synchronization. */ 2381290651Savos reg &= ~R92C_BCN_CTRL_DIS_TSF_UDT0; 2382290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2383290651Savos 2384290651Savos /* Synchronize. */ 2385290651Savos usb_pause_mtx(&sc->sc_mtx, hz * ni->ni_intval * 5 / 1000); 2386290651Savos 2387290651Savos /* Disable synchronization. */ 2388290651Savos reg |= R92C_BCN_CTRL_DIS_TSF_UDT0; 2389290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2390290651Savos 2391290651Savos /* Remove beacon filter. */ 2392290651Savos urtwn_set_rx_bssid_all(sc, 1); 2393290651Savos 2394290651Savos /* Enable beaconing. */ 2395290651Savos urtwn_write_1(sc, R92C_MBID_NUM, 2396290651Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2397290651Savos reg |= R92C_BCN_CTRL_EN_BCN; 2398290651Savos 2399290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2400290651Savos ieee80211_free_node(ni); 2401290651Savos URTWN_UNLOCK(sc); 2402290651Savos} 2403290651Savos 2404290651Savosstatic void 2405290631Savosurtwn_tsf_sync_enable(struct urtwn_softc *sc, struct ieee80211vap *vap) 2406290631Savos{ 2407290651Savos struct ieee80211com *ic = &sc->sc_ic; 2408290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2409290651Savos 2410290631Savos /* Reset TSF. */ 2411290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2412290631Savos 2413290631Savos switch (vap->iv_opmode) { 2414290631Savos case IEEE80211_M_STA: 2415290631Savos /* Enable TSF synchronization. */ 2416290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2417290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) & 2418290631Savos ~R92C_BCN_CTRL_DIS_TSF_UDT0); 2419290631Savos break; 2420290651Savos case IEEE80211_M_IBSS: 2421290651Savos ieee80211_runtask(ic, &uvp->tsf_task_adhoc); 2422290651Savos break; 2423290631Savos case IEEE80211_M_HOSTAP: 2424290631Savos /* Enable beaconing. */ 2425290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2426290631Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2427290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2428290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 2429290631Savos break; 2430290631Savos default: 2431290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2432290631Savos vap->iv_opmode); 2433290631Savos return; 2434290631Savos } 2435290631Savos} 2436290631Savos 2437290631Savosstatic void 2438292203Savosurtwn_get_tsf(struct urtwn_softc *sc, uint64_t *buf) 2439292203Savos{ 2440292203Savos urtwn_read_region_1(sc, R92C_TSFTR, (uint8_t *)buf, sizeof(*buf)); 2441292203Savos} 2442292203Savos 2443292203Savosstatic void 2444251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 2445251538Srpaulo{ 2446251538Srpaulo uint8_t reg; 2447281069Srpaulo 2448251538Srpaulo if (led == URTWN_LED_LINK) { 2449264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 2450264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 2451264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, reg | 0x60); 2452264912Skevlo if (!on) { 2453264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0x90; 2454264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, 2455264912Skevlo reg | R92C_LEDCFG0_DIS); 2456264912Skevlo urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 2457264912Skevlo urtwn_read_1(sc, R92C_MAC_PINMUX_CFG) & 2458264912Skevlo 0xfe); 2459264912Skevlo } 2460264912Skevlo } else { 2461264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 2462264912Skevlo if (!on) 2463264912Skevlo reg |= R92C_LEDCFG0_DIS; 2464264912Skevlo urtwn_write_1(sc, R92C_LEDCFG0, reg); 2465264912Skevlo } 2466264912Skevlo sc->ledlink = on; /* Save LED state. */ 2467251538Srpaulo } 2468251538Srpaulo} 2469251538Srpaulo 2470289811Savosstatic void 2471289811Savosurtwn_set_mode(struct urtwn_softc *sc, uint8_t mode) 2472289811Savos{ 2473289811Savos uint8_t reg; 2474289811Savos 2475289811Savos reg = urtwn_read_1(sc, R92C_MSR); 2476289811Savos reg = (reg & ~R92C_MSR_MASK) | mode; 2477289811Savos urtwn_write_1(sc, R92C_MSR, reg); 2478289811Savos} 2479289811Savos 2480290651Savosstatic void 2481290651Savosurtwn_ibss_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 2482290651Savos const struct ieee80211_rx_stats *rxs, 2483290651Savos int rssi, int nf) 2484290651Savos{ 2485290651Savos struct ieee80211vap *vap = ni->ni_vap; 2486290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2487290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2488290651Savos uint64_t ni_tstamp, curr_tstamp; 2489290651Savos 2490290651Savos uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 2491290651Savos 2492290651Savos if (vap->iv_state == IEEE80211_S_RUN && 2493290651Savos (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 2494290651Savos subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 2495290651Savos ni_tstamp = le64toh(ni->ni_tstamp.tsf); 2496290651Savos URTWN_LOCK(sc); 2497290651Savos urtwn_get_tsf(sc, &curr_tstamp); 2498290651Savos URTWN_UNLOCK(sc); 2499290651Savos curr_tstamp = le64toh(curr_tstamp); 2500290651Savos 2501290651Savos if (ni_tstamp >= curr_tstamp) 2502290651Savos (void) ieee80211_ibss_merge(ni); 2503290651Savos } 2504290651Savos} 2505290651Savos 2506251538Srpaulostatic int 2507251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 2508251538Srpaulo{ 2509251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 2510251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 2511286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2512251538Srpaulo struct ieee80211_node *ni; 2513251538Srpaulo enum ieee80211_state ostate; 2514290631Savos uint32_t reg; 2515290631Savos uint8_t mode; 2516290631Savos int error = 0; 2517251538Srpaulo 2518251538Srpaulo ostate = vap->iv_state; 2519294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_STATE, "%s -> %s\n", 2520294471Savos ieee80211_state_name[ostate], ieee80211_state_name[nstate]); 2521251538Srpaulo 2522251538Srpaulo IEEE80211_UNLOCK(ic); 2523251538Srpaulo URTWN_LOCK(sc); 2524251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 2525251538Srpaulo 2526251538Srpaulo if (ostate == IEEE80211_S_RUN) { 2527294473Savos /* Stop calibration. */ 2528294473Savos callout_stop(&sc->sc_calib_to); 2529294473Savos 2530251538Srpaulo /* Turn link LED off. */ 2531251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2532251538Srpaulo 2533251538Srpaulo /* Set media status to 'No Link'. */ 2534289811Savos urtwn_set_mode(sc, R92C_MSR_NOLINK); 2535251538Srpaulo 2536251538Srpaulo /* Stop Rx of data frames. */ 2537251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 2538251538Srpaulo 2539251538Srpaulo /* Disable TSF synchronization. */ 2540251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 2541290631Savos (urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN) | 2542251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 2543251538Srpaulo 2544290631Savos /* Disable beaconing. */ 2545290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2546290631Savos urtwn_read_1(sc, R92C_MBID_NUM) & ~R92C_MBID_TXBCN_RPT0); 2547290631Savos 2548290631Savos /* Reset TSF. */ 2549290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2550290631Savos 2551251538Srpaulo /* Reset EDCA parameters. */ 2552251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 2553251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 2554251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 2555251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 2556251538Srpaulo } 2557251538Srpaulo 2558251538Srpaulo switch (nstate) { 2559251538Srpaulo case IEEE80211_S_INIT: 2560251538Srpaulo /* Turn link LED off. */ 2561251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2562251538Srpaulo break; 2563251538Srpaulo case IEEE80211_S_SCAN: 2564251538Srpaulo /* Pause AC Tx queues. */ 2565251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 2566293180Savos urtwn_read_1(sc, R92C_TXPAUSE) | R92C_TX_QUEUE_AC); 2567251538Srpaulo break; 2568251538Srpaulo case IEEE80211_S_AUTH: 2569251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 2570251538Srpaulo break; 2571251538Srpaulo case IEEE80211_S_RUN: 2572251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 2573251538Srpaulo /* Turn link LED on. */ 2574251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2575251538Srpaulo break; 2576251538Srpaulo } 2577251538Srpaulo 2578251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 2579290631Savos 2580290631Savos if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || 2581290631Savos ni->ni_chan == IEEE80211_CHAN_ANYC) { 2582290631Savos device_printf(sc->sc_dev, 2583290631Savos "%s: could not move to RUN state\n", __func__); 2584290631Savos error = EINVAL; 2585290631Savos goto end_run; 2586290631Savos } 2587290631Savos 2588290631Savos switch (vap->iv_opmode) { 2589290631Savos case IEEE80211_M_STA: 2590290631Savos mode = R92C_MSR_INFRA; 2591290631Savos break; 2592290651Savos case IEEE80211_M_IBSS: 2593290651Savos mode = R92C_MSR_ADHOC; 2594290651Savos break; 2595290631Savos case IEEE80211_M_HOSTAP: 2596290631Savos mode = R92C_MSR_AP; 2597290631Savos break; 2598290631Savos default: 2599290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2600290631Savos vap->iv_opmode); 2601290631Savos error = EINVAL; 2602290631Savos goto end_run; 2603290631Savos } 2604290631Savos 2605251538Srpaulo /* Set media status to 'Associated'. */ 2606290631Savos urtwn_set_mode(sc, mode); 2607251538Srpaulo 2608251538Srpaulo /* Set BSSID. */ 2609298359Savos urtwn_write_4(sc, R92C_BSSID + 0, le32dec(&ni->ni_bssid[0])); 2610298359Savos urtwn_write_4(sc, R92C_BSSID + 4, le16dec(&ni->ni_bssid[4])); 2611251538Srpaulo 2612251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2613251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 2614251538Srpaulo else /* 802.11b/g */ 2615251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 2616251538Srpaulo 2617251538Srpaulo /* Enable Rx of data frames. */ 2618251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 2619251538Srpaulo 2620251538Srpaulo /* Flush all AC queues. */ 2621251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 2622251538Srpaulo 2623251538Srpaulo /* Set beacon interval. */ 2624251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 2625251538Srpaulo 2626251538Srpaulo /* Allow Rx from our BSSID only. */ 2627290564Savos if (ic->ic_promisc == 0) { 2628290631Savos reg = urtwn_read_4(sc, R92C_RCR); 2629290631Savos 2630290631Savos if (vap->iv_opmode != IEEE80211_M_HOSTAP) 2631290631Savos reg |= R92C_RCR_CBSSID_DATA; 2632290651Savos if (vap->iv_opmode != IEEE80211_M_IBSS) 2633290651Savos reg |= R92C_RCR_CBSSID_BCN; 2634290631Savos 2635290631Savos urtwn_write_4(sc, R92C_RCR, reg); 2636290564Savos } 2637251538Srpaulo 2638290651Savos if (vap->iv_opmode == IEEE80211_M_HOSTAP || 2639290651Savos vap->iv_opmode == IEEE80211_M_IBSS) { 2640290631Savos error = urtwn_setup_beacon(sc, ni); 2641290631Savos if (error != 0) { 2642290631Savos device_printf(sc->sc_dev, 2643290631Savos "unable to push beacon into the chip, " 2644290631Savos "error %d\n", error); 2645290631Savos goto end_run; 2646290631Savos } 2647290631Savos } 2648290631Savos 2649251538Srpaulo /* Enable TSF synchronization. */ 2650290631Savos urtwn_tsf_sync_enable(sc, vap); 2651251538Srpaulo 2652251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 2653251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 2654251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 2655251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 2656251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 2657251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 2658251538Srpaulo 2659251538Srpaulo /* Intialize rate adaptation. */ 2660292167Savos if (!(sc->chip & URTWN_CHIP_88E)) 2661264912Skevlo urtwn_ra_init(sc); 2662251538Srpaulo /* Turn link LED on. */ 2663251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2664251538Srpaulo 2665251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 2666251538Srpaulo /* Reset temperature calibration state machine. */ 2667294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 2668251538Srpaulo sc->thcal_lctemp = 0; 2669294473Savos /* Start periodic calibration. */ 2670294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2671290631Savos 2672290631Savosend_run: 2673251538Srpaulo ieee80211_free_node(ni); 2674251538Srpaulo break; 2675251538Srpaulo default: 2676251538Srpaulo break; 2677251538Srpaulo } 2678290631Savos 2679251538Srpaulo URTWN_UNLOCK(sc); 2680251538Srpaulo IEEE80211_LOCK(ic); 2681290631Savos return (error != 0 ? error : uvp->newstate(vap, nstate, arg)); 2682251538Srpaulo} 2683251538Srpaulo 2684251538Srpaulostatic void 2685294473Savosurtwn_calib_to(void *arg) 2686294473Savos{ 2687294473Savos struct urtwn_softc *sc = arg; 2688294473Savos 2689294473Savos /* Do it in a process context. */ 2690294473Savos urtwn_cmd_sleepable(sc, NULL, 0, urtwn_calib_cb); 2691294473Savos} 2692294473Savos 2693294473Savosstatic void 2694294473Savosurtwn_calib_cb(struct urtwn_softc *sc, union sec_param *data) 2695294473Savos{ 2696294473Savos /* Do temperature compensation. */ 2697294473Savos urtwn_temp_calib(sc); 2698294473Savos 2699294473Savos if ((urtwn_read_1(sc, R92C_MSR) & R92C_MSR_MASK) != R92C_MSR_NOLINK) 2700294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2701294473Savos} 2702294473Savos 2703294473Savosstatic void 2704251538Srpaulourtwn_watchdog(void *arg) 2705251538Srpaulo{ 2706251538Srpaulo struct urtwn_softc *sc = arg; 2707251538Srpaulo 2708251538Srpaulo if (sc->sc_txtimer > 0) { 2709251538Srpaulo if (--sc->sc_txtimer == 0) { 2710251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 2711287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2712251538Srpaulo return; 2713251538Srpaulo } 2714251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2715251538Srpaulo } 2716251538Srpaulo} 2717251538Srpaulo 2718251538Srpaulostatic void 2719251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 2720251538Srpaulo{ 2721251538Srpaulo int pwdb; 2722251538Srpaulo 2723251538Srpaulo /* Convert antenna signal to percentage. */ 2724251538Srpaulo if (rssi <= -100 || rssi >= 20) 2725251538Srpaulo pwdb = 0; 2726251538Srpaulo else if (rssi >= 0) 2727251538Srpaulo pwdb = 100; 2728251538Srpaulo else 2729251538Srpaulo pwdb = 100 + rssi; 2730264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2731289758Savos if (rate <= URTWN_RIDX_CCK11) { 2732264912Skevlo /* CCK gain is smaller than OFDM/MCS gain. */ 2733264912Skevlo pwdb += 6; 2734264912Skevlo if (pwdb > 100) 2735264912Skevlo pwdb = 100; 2736264912Skevlo if (pwdb <= 14) 2737264912Skevlo pwdb -= 4; 2738264912Skevlo else if (pwdb <= 26) 2739264912Skevlo pwdb -= 8; 2740264912Skevlo else if (pwdb <= 34) 2741264912Skevlo pwdb -= 6; 2742264912Skevlo else if (pwdb <= 42) 2743264912Skevlo pwdb -= 2; 2744264912Skevlo } 2745251538Srpaulo } 2746251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 2747251538Srpaulo sc->avg_pwdb = pwdb; 2748251538Srpaulo else if (sc->avg_pwdb < pwdb) 2749251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 2750251538Srpaulo else 2751251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 2752297175Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: PWDB %d, EMA %d\n", __func__, 2753294471Savos pwdb, sc->avg_pwdb); 2754251538Srpaulo} 2755251538Srpaulo 2756251538Srpaulostatic int8_t 2757251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2758251538Srpaulo{ 2759251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 2760251538Srpaulo struct r92c_rx_phystat *phy; 2761251538Srpaulo struct r92c_rx_cck *cck; 2762251538Srpaulo uint8_t rpt; 2763251538Srpaulo int8_t rssi; 2764251538Srpaulo 2765289758Savos if (rate <= URTWN_RIDX_CCK11) { 2766251538Srpaulo cck = (struct r92c_rx_cck *)physt; 2767251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 2768251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 2769251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 2770251538Srpaulo } else { 2771251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 2772251538Srpaulo rssi = cck->agc_rpt & 0x3e; 2773251538Srpaulo } 2774251538Srpaulo rssi = cckoff[rpt] - rssi; 2775251538Srpaulo } else { /* OFDM/HT. */ 2776251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 2777251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2778251538Srpaulo } 2779251538Srpaulo return (rssi); 2780251538Srpaulo} 2781251538Srpaulo 2782264912Skevlostatic int8_t 2783264912Skevlourtwn_r88e_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2784264912Skevlo{ 2785264912Skevlo struct r92c_rx_phystat *phy; 2786264912Skevlo struct r88e_rx_cck *cck; 2787264912Skevlo uint8_t cck_agc_rpt, lna_idx, vga_idx; 2788264912Skevlo int8_t rssi; 2789264912Skevlo 2790264972Skevlo rssi = 0; 2791289758Savos if (rate <= URTWN_RIDX_CCK11) { 2792264912Skevlo cck = (struct r88e_rx_cck *)physt; 2793264912Skevlo cck_agc_rpt = cck->agc_rpt; 2794264912Skevlo lna_idx = (cck_agc_rpt & 0xe0) >> 5; 2795281069Srpaulo vga_idx = cck_agc_rpt & 0x1f; 2796264912Skevlo switch (lna_idx) { 2797264912Skevlo case 7: 2798264912Skevlo if (vga_idx <= 27) 2799264912Skevlo rssi = -100 + 2* (27 - vga_idx); 2800264912Skevlo else 2801264912Skevlo rssi = -100; 2802264912Skevlo break; 2803264912Skevlo case 6: 2804264912Skevlo rssi = -48 + 2 * (2 - vga_idx); 2805264912Skevlo break; 2806264912Skevlo case 5: 2807264912Skevlo rssi = -42 + 2 * (7 - vga_idx); 2808264912Skevlo break; 2809264912Skevlo case 4: 2810264912Skevlo rssi = -36 + 2 * (7 - vga_idx); 2811264912Skevlo break; 2812264912Skevlo case 3: 2813264912Skevlo rssi = -24 + 2 * (7 - vga_idx); 2814264912Skevlo break; 2815264912Skevlo case 2: 2816264912Skevlo rssi = -12 + 2 * (5 - vga_idx); 2817264912Skevlo break; 2818264912Skevlo case 1: 2819264912Skevlo rssi = 8 - (2 * vga_idx); 2820264912Skevlo break; 2821264912Skevlo case 0: 2822264912Skevlo rssi = 14 - (2 * vga_idx); 2823264912Skevlo break; 2824264912Skevlo } 2825264912Skevlo rssi += 6; 2826264912Skevlo } else { /* OFDM/HT. */ 2827264912Skevlo phy = (struct r92c_rx_phystat *)physt; 2828264912Skevlo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2829264912Skevlo } 2830264912Skevlo return (rssi); 2831264912Skevlo} 2832264912Skevlo 2833251538Srpaulostatic int 2834290630Savosurtwn_tx_data(struct urtwn_softc *sc, struct ieee80211_node *ni, 2835290630Savos struct mbuf *m, struct urtwn_data *data) 2836251538Srpaulo{ 2837292167Savos const struct ieee80211_txparam *tp; 2838287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2839251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 2840292167Savos struct ieee80211_key *k = NULL; 2841292167Savos struct ieee80211_channel *chan; 2842292167Savos struct ieee80211_frame *wh; 2843251538Srpaulo struct r92c_tx_desc *txd; 2844300434Savos uint8_t macid, raid, rate, ridx, type, tid, qos, qsel; 2845292014Savos int hasqos, ismcast; 2846251538Srpaulo 2847251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2848251538Srpaulo 2849290630Savos wh = mtod(m, struct ieee80211_frame *); 2850264912Skevlo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2851292014Savos hasqos = IEEE80211_QOS_HAS_SEQ(wh); 2852290630Savos ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2853264912Skevlo 2854292014Savos /* Select TX ring for this frame. */ 2855292014Savos if (hasqos) { 2856300433Savos qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0]; 2857300433Savos tid = qos & IEEE80211_QOS_TID; 2858300433Savos } else { 2859300433Savos qos = 0; 2860292014Savos tid = 0; 2861300433Savos } 2862292014Savos 2863292167Savos chan = (ni->ni_chan != IEEE80211_CHAN_ANYC) ? 2864292167Savos ni->ni_chan : ic->ic_curchan; 2865292167Savos tp = &vap->iv_txparms[ieee80211_chan2mode(chan)]; 2866292167Savos 2867292167Savos /* Choose a TX rate index. */ 2868292167Savos if (type == IEEE80211_FC0_TYPE_MGT) 2869292167Savos rate = tp->mgmtrate; 2870292167Savos else if (ismcast) 2871292167Savos rate = tp->mcastrate; 2872292167Savos else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 2873292167Savos rate = tp->ucastrate; 2874292167Savos else if (m->m_flags & M_EAPOL) 2875292167Savos rate = tp->mgmtrate; 2876292167Savos else { 2877292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) { 2878292167Savos /* XXX pass pktlen */ 2879292167Savos (void) ieee80211_ratectl_rate(ni, NULL, 0); 2880292167Savos rate = ni->ni_txrate; 2881292167Savos } else { 2882297175Sadrian /* XXX TODO: drop the default rate for 11b/11g? */ 2883297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2884297175Sadrian rate = IEEE80211_RATE_MCS | 0x4; /* MCS4 */ 2885297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2886292167Savos rate = 108; 2887292167Savos else 2888292167Savos rate = 22; 2889292167Savos } 2890292167Savos } 2891292167Savos 2892297175Sadrian /* 2893297175Sadrian * XXX TODO: this should be per-node, for 11b versus 11bg 2894297175Sadrian * nodes in hostap mode 2895297175Sadrian */ 2896292167Savos ridx = rate2ridx(rate); 2897297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2898297175Sadrian raid = R92C_RAID_11GN; 2899297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2900292167Savos raid = R92C_RAID_11BG; 2901292167Savos else 2902292167Savos raid = R92C_RAID_11B; 2903292167Savos 2904260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2905290630Savos k = ieee80211_crypto_encap(ni, m); 2906251538Srpaulo if (k == NULL) { 2907251538Srpaulo device_printf(sc->sc_dev, 2908251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 2909251538Srpaulo return (ENOBUFS); 2910251538Srpaulo } 2911251538Srpaulo 2912251538Srpaulo /* in case packet header moved, reset pointer */ 2913290630Savos wh = mtod(m, struct ieee80211_frame *); 2914251538Srpaulo } 2915281069Srpaulo 2916251538Srpaulo /* Fill Tx descriptor. */ 2917251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 2918251538Srpaulo memset(txd, 0, sizeof(*txd)); 2919251538Srpaulo 2920251538Srpaulo txd->txdw0 |= htole32( 2921251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 2922251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2923290630Savos if (ismcast) 2924251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 2925290630Savos 2926290630Savos if (!ismcast) { 2927300433Savos /* Unicast frame, check if an ACK is expected. */ 2928300433Savos if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) != 2929300433Savos IEEE80211_QOS_ACKPOLICY_NOACK) { 2930300433Savos txd->txdw5 |= htole32(R92C_TXDW5_RTY_LMT_ENA); 2931300433Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT, 2932300433Savos tp->maxretry)); 2933300433Savos } 2934300433Savos 2935292167Savos if (sc->chip & URTWN_CHIP_88E) { 2936292167Savos struct urtwn_node *un = URTWN_NODE(ni); 2937292167Savos macid = un->id; 2938292167Savos } else 2939292167Savos macid = URTWN_MACID_BSS; 2940290630Savos 2941290630Savos if (type == IEEE80211_FC0_TYPE_DATA) { 2942292014Savos qsel = tid % URTWN_MAX_TID; 2943290630Savos 2944292167Savos if (sc->chip & URTWN_CHIP_88E) { 2945292167Savos txd->txdw2 |= htole32( 2946292167Savos R88E_TXDW2_AGGBK | 2947292167Savos R88E_TXDW2_CCX_RPT); 2948292167Savos } else 2949290630Savos txd->txdw1 |= htole32(R92C_TXDW1_AGGBK); 2950290630Savos 2951297175Sadrian /* protmode, non-HT */ 2952297175Sadrian /* XXX TODO: noack frames? */ 2953297175Sadrian if ((rate & 0x80) == 0 && 2954297175Sadrian (ic->ic_flags & IEEE80211_F_USEPROT)) { 2955290630Savos switch (ic->ic_protmode) { 2956290630Savos case IEEE80211_PROT_CTSONLY: 2957290630Savos txd->txdw4 |= htole32( 2958290630Savos R92C_TXDW4_CTS2SELF | 2959290630Savos R92C_TXDW4_HWRTSEN); 2960290630Savos break; 2961290630Savos case IEEE80211_PROT_RTSCTS: 2962290630Savos txd->txdw4 |= htole32( 2963290630Savos R92C_TXDW4_RTSEN | 2964290630Savos R92C_TXDW4_HWRTSEN); 2965290630Savos break; 2966290630Savos default: 2967290630Savos break; 2968290630Savos } 2969290630Savos } 2970297175Sadrian 2971297175Sadrian /* protmode, HT */ 2972297175Sadrian /* XXX TODO: noack frames? */ 2973297175Sadrian if ((rate & 0x80) && 2974297175Sadrian (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) { 2975297175Sadrian txd->txdw4 |= htole32( 2976297175Sadrian R92C_TXDW4_RTSEN | 2977297175Sadrian R92C_TXDW4_HWRTSEN); 2978297175Sadrian } 2979297175Sadrian 2980297175Sadrian /* XXX TODO: rtsrate is configurable? 24mbit may 2981297175Sadrian * be a bit high for RTS rate? */ 2982290630Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 2983290630Savos URTWN_RIDX_OFDM24)); 2984297175Sadrian 2985290630Savos txd->txdw5 |= htole32(0x0001ff00); 2986290630Savos } else /* IEEE80211_FC0_TYPE_MGT */ 2987290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2988251538Srpaulo } else { 2989290630Savos macid = URTWN_MACID_BC; 2990290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2991290630Savos } 2992251538Srpaulo 2993290630Savos txd->txdw1 |= htole32( 2994290630Savos SM(R92C_TXDW1_QSEL, qsel) | 2995290630Savos SM(R92C_TXDW1_RAID, raid)); 2996290630Savos 2997297175Sadrian /* XXX TODO: 40MHZ flag? */ 2998297175Sadrian /* XXX TODO: AMPDU flag? (AGG_ENABLE or AGG_BREAK?) Density shift? */ 2999297175Sadrian /* XXX Short preamble? */ 3000297175Sadrian /* XXX Short-GI? */ 3001297175Sadrian 3002290630Savos if (sc->chip & URTWN_CHIP_88E) 3003290630Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, macid)); 3004290630Savos else 3005290630Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, macid)); 3006290630Savos 3007290630Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 3008297175Sadrian 3009291858Savos /* Force this rate if needed. */ 3010292167Savos if (URTWN_CHIP_HAS_RATECTL(sc) || ismcast || 3011297175Sadrian (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) || 3012292167Savos (m->m_flags & M_EAPOL) || type != IEEE80211_FC0_TYPE_DATA) 3013251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3014251538Srpaulo 3015292014Savos if (!hasqos) { 3016251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 3017291858Savos if (sc->chip & URTWN_CHIP_88E) 3018291858Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3019291858Savos else 3020291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3021290630Savos } else { 3022290630Savos /* Set sequence number. */ 3023290630Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3024290630Savos } 3025251538Srpaulo 3026292175Savos if (k != NULL && !(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3027292175Savos uint8_t cipher; 3028292175Savos 3029292175Savos switch (k->wk_cipher->ic_cipher) { 3030292175Savos case IEEE80211_CIPHER_WEP: 3031292175Savos case IEEE80211_CIPHER_TKIP: 3032292175Savos cipher = R92C_TXDW1_CIPHER_RC4; 3033292175Savos break; 3034292175Savos case IEEE80211_CIPHER_AES_CCM: 3035292175Savos cipher = R92C_TXDW1_CIPHER_AES; 3036292175Savos break; 3037292175Savos default: 3038292175Savos device_printf(sc->sc_dev, "%s: unknown cipher %d\n", 3039292175Savos __func__, k->wk_cipher->ic_cipher); 3040292175Savos return (EINVAL); 3041292175Savos } 3042292175Savos 3043292175Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3044292175Savos } 3045292175Savos 3046251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 3047251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3048251538Srpaulo 3049251538Srpaulo tap->wt_flags = 0; 3050290630Savos if (k != NULL) 3051290630Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3052290630Savos ieee80211_radiotap_tx(vap, m); 3053251538Srpaulo } 3054251538Srpaulo 3055290630Savos data->ni = ni; 3056251538Srpaulo 3057290630Savos urtwn_tx_start(sc, m, type, data); 3058290630Savos 3059290630Savos return (0); 3060290630Savos} 3061290630Savos 3062292221Savosstatic int 3063292221Savosurtwn_tx_raw(struct urtwn_softc *sc, struct ieee80211_node *ni, 3064292221Savos struct mbuf *m, struct urtwn_data *data, 3065292221Savos const struct ieee80211_bpf_params *params) 3066292221Savos{ 3067292221Savos struct ieee80211vap *vap = ni->ni_vap; 3068292221Savos struct ieee80211_key *k = NULL; 3069292221Savos struct ieee80211_frame *wh; 3070292221Savos struct r92c_tx_desc *txd; 3071292221Savos uint8_t cipher, ridx, type; 3072292221Savos 3073292221Savos /* Encrypt the frame if need be. */ 3074292221Savos cipher = R92C_TXDW1_CIPHER_NONE; 3075292221Savos if (params->ibp_flags & IEEE80211_BPF_CRYPTO) { 3076292221Savos /* Retrieve key for TX. */ 3077292221Savos k = ieee80211_crypto_encap(ni, m); 3078292221Savos if (k == NULL) 3079292221Savos return (ENOBUFS); 3080292221Savos 3081292221Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3082292221Savos switch (k->wk_cipher->ic_cipher) { 3083292221Savos case IEEE80211_CIPHER_WEP: 3084292221Savos case IEEE80211_CIPHER_TKIP: 3085292221Savos cipher = R92C_TXDW1_CIPHER_RC4; 3086292221Savos break; 3087292221Savos case IEEE80211_CIPHER_AES_CCM: 3088292221Savos cipher = R92C_TXDW1_CIPHER_AES; 3089292221Savos break; 3090292221Savos default: 3091292221Savos device_printf(sc->sc_dev, 3092292221Savos "%s: unknown cipher %d\n", 3093292221Savos __func__, k->wk_cipher->ic_cipher); 3094292221Savos return (EINVAL); 3095292221Savos } 3096292221Savos } 3097292221Savos } 3098292221Savos 3099297175Sadrian /* XXX TODO: 11n checks, matching urtwn_tx_data() */ 3100297175Sadrian 3101292221Savos wh = mtod(m, struct ieee80211_frame *); 3102292221Savos type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 3103292221Savos 3104292221Savos /* Fill Tx descriptor. */ 3105292221Savos txd = (struct r92c_tx_desc *)data->buf; 3106292221Savos memset(txd, 0, sizeof(*txd)); 3107292221Savos 3108292221Savos txd->txdw0 |= htole32( 3109292221Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 3110292221Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 3111292221Savos if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 3112292221Savos txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 3113292221Savos 3114300433Savos if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) { 3115300433Savos txd->txdw5 |= htole32(R92C_TXDW5_RTY_LMT_ENA); 3116300433Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT, 3117300433Savos params->ibp_try0)); 3118300433Savos } 3119292221Savos if (params->ibp_flags & IEEE80211_BPF_RTS) 3120292221Savos txd->txdw4 |= htole32(R92C_TXDW4_RTSEN); 3121292221Savos if (params->ibp_flags & IEEE80211_BPF_CTS) 3122292221Savos txd->txdw4 |= htole32(R92C_TXDW4_CTS2SELF); 3123292221Savos if (txd->txdw4 & htole32(R92C_TXDW4_RTSEN | R92C_TXDW4_CTS2SELF)) { 3124292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWRTSEN); 3125292221Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 3126292221Savos URTWN_RIDX_OFDM24)); 3127292221Savos } 3128292221Savos 3129292221Savos if (sc->chip & URTWN_CHIP_88E) 3130292221Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 3131292221Savos else 3132292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 3133292221Savos 3134297175Sadrian /* XXX TODO: rate index/config (RAID) for 11n? */ 3135292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_MGNT)); 3136292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3137292221Savos 3138292221Savos /* Choose a TX rate index. */ 3139292221Savos ridx = rate2ridx(params->ibp_rate0); 3140292221Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 3141292221Savos txd->txdw5 |= htole32(0x0001ff00); 3142292221Savos txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3143292221Savos 3144292221Savos if (!IEEE80211_QOS_HAS_SEQ(wh)) { 3145292221Savos /* Use HW sequence numbering for non-QoS frames. */ 3146292221Savos if (sc->chip & URTWN_CHIP_88E) 3147292221Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3148292221Savos else 3149292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3150292221Savos } else { 3151292221Savos /* Set sequence number. */ 3152292221Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3153292221Savos } 3154292221Savos 3155292221Savos if (ieee80211_radiotap_active_vap(vap)) { 3156292221Savos struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3157292221Savos 3158292221Savos tap->wt_flags = 0; 3159292221Savos if (k != NULL) 3160292221Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3161292221Savos ieee80211_radiotap_tx(vap, m); 3162292221Savos } 3163292221Savos 3164292221Savos data->ni = ni; 3165292221Savos 3166292221Savos urtwn_tx_start(sc, m, type, data); 3167292221Savos 3168292221Savos return (0); 3169292221Savos} 3170292221Savos 3171290630Savosstatic void 3172290630Savosurtwn_tx_start(struct urtwn_softc *sc, struct mbuf *m, uint8_t type, 3173290630Savos struct urtwn_data *data) 3174290630Savos{ 3175290630Savos struct usb_xfer *xfer; 3176290630Savos struct r92c_tx_desc *txd; 3177290630Savos uint16_t ac, sum; 3178290630Savos int i, xferlen; 3179290630Savos 3180290630Savos URTWN_ASSERT_LOCKED(sc); 3181290630Savos 3182290630Savos ac = M_WME_GETAC(m); 3183290630Savos 3184290630Savos switch (type) { 3185290630Savos case IEEE80211_FC0_TYPE_CTL: 3186290630Savos case IEEE80211_FC0_TYPE_MGT: 3187290630Savos xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 3188290630Savos break; 3189290630Savos default: 3190292014Savos xfer = sc->sc_xfer[wme2queue[ac].qid]; 3191290630Savos break; 3192290630Savos } 3193290630Savos 3194290630Savos txd = (struct r92c_tx_desc *)data->buf; 3195290630Savos txd->txdw0 |= htole32(SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len)); 3196290630Savos 3197290630Savos /* Compute Tx descriptor checksum. */ 3198290630Savos sum = 0; 3199290630Savos for (i = 0; i < sizeof(*txd) / 2; i++) 3200290630Savos sum ^= ((uint16_t *)txd)[i]; 3201290630Savos txd->txdsum = sum; /* NB: already little endian. */ 3202290630Savos 3203290630Savos xferlen = sizeof(*txd) + m->m_pkthdr.len; 3204290630Savos m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&txd[1]); 3205290630Savos 3206251538Srpaulo data->buflen = xferlen; 3207290630Savos data->m = m; 3208251538Srpaulo 3209251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 3210251538Srpaulo usbd_transfer_start(xfer); 3211251538Srpaulo} 3212251538Srpaulo 3213287197Sglebiusstatic int 3214287197Sglebiusurtwn_transmit(struct ieee80211com *ic, struct mbuf *m) 3215251538Srpaulo{ 3216287197Sglebius struct urtwn_softc *sc = ic->ic_softc; 3217287197Sglebius int error; 3218261863Srpaulo 3219261863Srpaulo URTWN_LOCK(sc); 3220287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 3221287197Sglebius URTWN_UNLOCK(sc); 3222287197Sglebius return (ENXIO); 3223287197Sglebius } 3224287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 3225287197Sglebius if (error) { 3226287197Sglebius URTWN_UNLOCK(sc); 3227287197Sglebius return (error); 3228287197Sglebius } 3229287197Sglebius urtwn_start(sc); 3230261863Srpaulo URTWN_UNLOCK(sc); 3231287197Sglebius 3232287197Sglebius return (0); 3233261863Srpaulo} 3234261863Srpaulo 3235261863Srpaulostatic void 3236287197Sglebiusurtwn_start(struct urtwn_softc *sc) 3237261863Srpaulo{ 3238251538Srpaulo struct ieee80211_node *ni; 3239251538Srpaulo struct mbuf *m; 3240251538Srpaulo struct urtwn_data *bf; 3241251538Srpaulo 3242261863Srpaulo URTWN_ASSERT_LOCKED(sc); 3243287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 3244251538Srpaulo bf = urtwn_getbuf(sc); 3245251538Srpaulo if (bf == NULL) { 3246287197Sglebius mbufq_prepend(&sc->sc_snd, m); 3247251538Srpaulo break; 3248251538Srpaulo } 3249251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 3250251538Srpaulo m->m_pkthdr.rcvif = NULL; 3251297596Sadrian 3252297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 3253297596Sadrian __func__, 3254297596Sadrian m); 3255297596Sadrian 3256290630Savos if (urtwn_tx_data(sc, ni, m, bf) != 0) { 3257287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 3258287197Sglebius IFCOUNTER_OERRORS, 1); 3259251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 3260288353Sadrian m_freem(m); 3261251538Srpaulo ieee80211_free_node(ni); 3262251538Srpaulo break; 3263251538Srpaulo } 3264251538Srpaulo sc->sc_txtimer = 5; 3265251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 3266251538Srpaulo } 3267251538Srpaulo} 3268251538Srpaulo 3269287197Sglebiusstatic void 3270287197Sglebiusurtwn_parent(struct ieee80211com *ic) 3271251538Srpaulo{ 3272286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 3273251538Srpaulo 3274263153Skevlo URTWN_LOCK(sc); 3275287197Sglebius if (sc->sc_flags & URTWN_DETACHED) { 3276287197Sglebius URTWN_UNLOCK(sc); 3277287197Sglebius return; 3278287197Sglebius } 3279291698Savos URTWN_UNLOCK(sc); 3280291698Savos 3281287197Sglebius if (ic->ic_nrunning > 0) { 3282291698Savos if (urtwn_init(sc) != 0) { 3283291698Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3284291698Savos if (vap != NULL) 3285291698Savos ieee80211_stop(vap); 3286291698Savos } else 3287291698Savos ieee80211_start_all(ic); 3288291698Savos } else 3289287197Sglebius urtwn_stop(sc); 3290251538Srpaulo} 3291251538Srpaulo 3292264912Skevlostatic __inline int 3293251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 3294251538Srpaulo{ 3295264912Skevlo 3296264912Skevlo return sc->sc_power_on(sc); 3297264912Skevlo} 3298264912Skevlo 3299264912Skevlostatic int 3300264912Skevlourtwn_r92c_power_on(struct urtwn_softc *sc) 3301264912Skevlo{ 3302251538Srpaulo uint32_t reg; 3303291698Savos usb_error_t error; 3304251538Srpaulo int ntries; 3305251538Srpaulo 3306251538Srpaulo /* Wait for autoload done bit. */ 3307251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3308251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 3309251538Srpaulo break; 3310266472Shselasky urtwn_ms_delay(sc); 3311251538Srpaulo } 3312251538Srpaulo if (ntries == 1000) { 3313251538Srpaulo device_printf(sc->sc_dev, 3314251538Srpaulo "timeout waiting for chip autoload\n"); 3315251538Srpaulo return (ETIMEDOUT); 3316251538Srpaulo } 3317251538Srpaulo 3318251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 3319291698Savos error = urtwn_write_1(sc, R92C_RSV_CTRL, 0); 3320291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3321291698Savos return (EIO); 3322251538Srpaulo /* Move SPS into PWM mode. */ 3323291698Savos error = urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 3324291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3325291698Savos return (EIO); 3326266472Shselasky urtwn_ms_delay(sc); 3327251538Srpaulo 3328251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 3329251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 3330291698Savos error = urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3331251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 3332291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3333291698Savos return (EIO); 3334266472Shselasky urtwn_ms_delay(sc); 3335291698Savos error = urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3336251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 3337251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 3338291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3339291698Savos return (EIO); 3340251538Srpaulo } 3341251538Srpaulo 3342251538Srpaulo /* Auto enable WLAN. */ 3343291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3344251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3345291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3346291698Savos return (EIO); 3347251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3348262822Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3349262822Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3350251538Srpaulo break; 3351266472Shselasky urtwn_ms_delay(sc); 3352251538Srpaulo } 3353251538Srpaulo if (ntries == 1000) { 3354251538Srpaulo device_printf(sc->sc_dev, 3355251538Srpaulo "timeout waiting for MAC auto ON\n"); 3356251538Srpaulo return (ETIMEDOUT); 3357251538Srpaulo } 3358251538Srpaulo 3359251538Srpaulo /* Enable radio, GPIO and LED functions. */ 3360291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3361251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 3362251538Srpaulo R92C_APS_FSMCO_PDN_EN | 3363251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 3364291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3365291698Savos return (EIO); 3366251538Srpaulo /* Release RF digital isolation. */ 3367291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 3368251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 3369291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3370291698Savos return (EIO); 3371251538Srpaulo 3372251538Srpaulo /* Initialize MAC. */ 3373291698Savos error = urtwn_write_1(sc, R92C_APSD_CTRL, 3374251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 3375291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3376291698Savos return (EIO); 3377251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 3378251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 3379251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 3380251538Srpaulo break; 3381266472Shselasky urtwn_ms_delay(sc); 3382251538Srpaulo } 3383251538Srpaulo if (ntries == 200) { 3384251538Srpaulo device_printf(sc->sc_dev, 3385251538Srpaulo "timeout waiting for MAC initialization\n"); 3386251538Srpaulo return (ETIMEDOUT); 3387251538Srpaulo } 3388251538Srpaulo 3389251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3390251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 3391251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3392251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3393251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 3394251538Srpaulo R92C_CR_ENSEC; 3395291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3396291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3397291698Savos return (EIO); 3398251538Srpaulo 3399291698Savos error = urtwn_write_1(sc, 0xfe10, 0x19); 3400291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3401291698Savos return (EIO); 3402251538Srpaulo return (0); 3403251538Srpaulo} 3404251538Srpaulo 3405251538Srpaulostatic int 3406264912Skevlourtwn_r88e_power_on(struct urtwn_softc *sc) 3407264912Skevlo{ 3408264912Skevlo uint32_t reg; 3409291698Savos usb_error_t error; 3410264912Skevlo int ntries; 3411264912Skevlo 3412264912Skevlo /* Wait for power ready bit. */ 3413264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3414281918Skevlo if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST) 3415264912Skevlo break; 3416266472Shselasky urtwn_ms_delay(sc); 3417264912Skevlo } 3418264912Skevlo if (ntries == 5000) { 3419264912Skevlo device_printf(sc->sc_dev, 3420264912Skevlo "timeout waiting for chip power up\n"); 3421264912Skevlo return (ETIMEDOUT); 3422264912Skevlo } 3423264912Skevlo 3424264912Skevlo /* Reset BB. */ 3425291698Savos error = urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3426264912Skevlo urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB | 3427264912Skevlo R92C_SYS_FUNC_EN_BB_GLB_RST)); 3428291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3429291698Savos return (EIO); 3430264912Skevlo 3431291698Savos error = urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3432281918Skevlo urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3433291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3434291698Savos return (EIO); 3435264912Skevlo 3436264912Skevlo /* Disable HWPDN. */ 3437291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3438281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN); 3439291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3440291698Savos return (EIO); 3441264912Skevlo 3442264912Skevlo /* Disable WL suspend. */ 3443291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3444281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & 3445281918Skevlo ~(R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE)); 3446291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3447291698Savos return (EIO); 3448264912Skevlo 3449291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3450281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3451291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3452291698Savos return (EIO); 3453264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3454281918Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3455281918Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3456264912Skevlo break; 3457266472Shselasky urtwn_ms_delay(sc); 3458264912Skevlo } 3459264912Skevlo if (ntries == 5000) 3460264912Skevlo return (ETIMEDOUT); 3461264912Skevlo 3462264912Skevlo /* Enable LDO normal mode. */ 3463291698Savos error = urtwn_write_1(sc, R92C_LPLDO_CTRL, 3464295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) & ~R92C_LPLDO_CTRL_SLEEP); 3465291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3466291698Savos return (EIO); 3467264912Skevlo 3468264912Skevlo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3469291698Savos error = urtwn_write_2(sc, R92C_CR, 0); 3470291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3471291698Savos return (EIO); 3472264912Skevlo reg = urtwn_read_2(sc, R92C_CR); 3473264912Skevlo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3474264912Skevlo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3475264912Skevlo R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC | R92C_CR_CALTMR_EN; 3476291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3477291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3478291698Savos return (EIO); 3479264912Skevlo 3480264912Skevlo return (0); 3481264912Skevlo} 3482264912Skevlo 3483295874Savosstatic __inline void 3484295874Savosurtwn_power_off(struct urtwn_softc *sc) 3485295874Savos{ 3486295874Savos 3487295874Savos return sc->sc_power_off(sc); 3488295874Savos} 3489295874Savos 3490295874Savosstatic void 3491295874Savosurtwn_r92c_power_off(struct urtwn_softc *sc) 3492295874Savos{ 3493295874Savos uint32_t reg; 3494295874Savos 3495295874Savos /* Block all Tx queues. */ 3496295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3497295874Savos 3498295874Savos /* Disable RF */ 3499295874Savos urtwn_rf_write(sc, 0, 0, 0); 3500295874Savos 3501295874Savos urtwn_write_1(sc, R92C_APSD_CTRL, R92C_APSD_CTRL_OFF); 3502295874Savos 3503295874Savos /* Reset BB state machine */ 3504295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3505295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA | 3506295874Savos R92C_SYS_FUNC_EN_BB_GLB_RST); 3507295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3508295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA); 3509295874Savos 3510295874Savos /* 3511295874Savos * Reset digital sequence 3512295874Savos */ 3513295874Savos#ifndef URTWN_WITHOUT_UCODE 3514295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) { 3515295874Savos /* Reset MCU ready status */ 3516295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3517295874Savos 3518295874Savos /* If firmware in ram code, do reset */ 3519295874Savos urtwn_fw_reset(sc); 3520295874Savos } 3521295874Savos#endif 3522295874Savos 3523295874Savos /* Reset MAC and Enable 8051 */ 3524295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN + 1, 3525295874Savos (R92C_SYS_FUNC_EN_CPUEN | 3526295874Savos R92C_SYS_FUNC_EN_ELDR | 3527295874Savos R92C_SYS_FUNC_EN_HWPDN) >> 8); 3528295874Savos 3529295874Savos /* Reset MCU ready status */ 3530295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3531295874Savos 3532295874Savos /* Disable MAC clock */ 3533295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3534295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3535295874Savos R92C_SYS_CLKR_ANA8M | 3536295874Savos R92C_SYS_CLKR_LOADER_EN | 3537295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3538295874Savos R92C_SYS_CLKR_SYS_EN | 3539295874Savos R92C_SYS_CLKR_RING_EN | 3540295874Savos 0x4000); 3541295874Savos 3542295874Savos /* Disable AFE PLL */ 3543295874Savos urtwn_write_1(sc, R92C_AFE_PLL_CTRL, 0x80); 3544295874Savos 3545295874Savos /* Gated AFE DIG_CLOCK */ 3546295874Savos urtwn_write_2(sc, R92C_AFE_XTAL_CTRL, 0x880F); 3547295874Savos 3548295874Savos /* Isolated digital to PON */ 3549295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3550295874Savos R92C_SYS_ISO_CTRL_MD2PP | 3551295874Savos R92C_SYS_ISO_CTRL_PA2PCIE | 3552295874Savos R92C_SYS_ISO_CTRL_PD2CORE | 3553295874Savos R92C_SYS_ISO_CTRL_IP2MAC | 3554295874Savos R92C_SYS_ISO_CTRL_DIOP | 3555295874Savos R92C_SYS_ISO_CTRL_DIOE); 3556295874Savos 3557295874Savos /* 3558295874Savos * Pull GPIO PIN to balance level and LED control 3559295874Savos */ 3560295874Savos /* 1. Disable GPIO[7:0] */ 3561295874Savos urtwn_write_2(sc, R92C_GPIO_IOSEL, 0x0000); 3562295874Savos 3563295874Savos reg = urtwn_read_4(sc, R92C_GPIO_PIN_CTRL) & ~0x0000ff00; 3564295874Savos reg |= ((reg << 8) & 0x0000ff00) | 0x00ff0000; 3565295874Savos urtwn_write_4(sc, R92C_GPIO_PIN_CTRL, reg); 3566295874Savos 3567295874Savos /* Disable GPIO[10:8] */ 3568295874Savos urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 0x00); 3569295874Savos 3570295874Savos reg = urtwn_read_2(sc, R92C_GPIO_IO_SEL) & ~0x00f0; 3571295874Savos reg |= (((reg & 0x000f) << 4) | 0x0780); 3572295874Savos urtwn_write_2(sc, R92C_GPIO_IO_SEL, reg); 3573295874Savos 3574295874Savos /* Disable LED0 & 1 */ 3575295874Savos urtwn_write_2(sc, R92C_LEDCFG0, 0x8080); 3576295874Savos 3577295874Savos /* 3578295874Savos * Reset digital sequence 3579295874Savos */ 3580295874Savos /* Disable ELDR clock */ 3581295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3582295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3583295874Savos R92C_SYS_CLKR_ANA8M | 3584295874Savos R92C_SYS_CLKR_LOADER_EN | 3585295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3586295874Savos R92C_SYS_CLKR_SYS_EN | 3587295874Savos R92C_SYS_CLKR_RING_EN | 3588295874Savos 0x4000); 3589295874Savos 3590295874Savos /* Isolated ELDR to PON */ 3591295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL + 1, 3592295874Savos (R92C_SYS_ISO_CTRL_DIOR | 3593295874Savos R92C_SYS_ISO_CTRL_PWC_EV12V) >> 8); 3594295874Savos 3595295874Savos /* 3596295874Savos * Disable analog sequence 3597295874Savos */ 3598295874Savos /* Disable A15 power */ 3599295874Savos urtwn_write_1(sc, R92C_LDOA15_CTRL, R92C_LDOA15_CTRL_OBUF); 3600295874Savos /* Disable digital core power */ 3601295874Savos urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3602295874Savos urtwn_read_1(sc, R92C_LDOV12D_CTRL) & 3603295874Savos ~R92C_LDOV12D_CTRL_LDV12_EN); 3604295874Savos 3605295874Savos /* Enter PFM mode */ 3606295874Savos urtwn_write_1(sc, R92C_SPS0_CTRL, 0x23); 3607295874Savos 3608295874Savos /* Set USB suspend */ 3609295874Savos urtwn_write_2(sc, R92C_APS_FSMCO, 3610295874Savos R92C_APS_FSMCO_APDM_HOST | 3611295874Savos R92C_APS_FSMCO_AFSM_HSUS | 3612295874Savos R92C_APS_FSMCO_PFM_ALDN); 3613295874Savos 3614295874Savos /* Lock ISO/CLK/Power control register. */ 3615295874Savos urtwn_write_1(sc, R92C_RSV_CTRL, 0x0E); 3616295874Savos} 3617295874Savos 3618295874Savosstatic void 3619295874Savosurtwn_r88e_power_off(struct urtwn_softc *sc) 3620295874Savos{ 3621295874Savos uint8_t reg; 3622295874Savos int ntries; 3623295874Savos 3624295874Savos /* Disable any kind of TX reports. */ 3625295874Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 3626295874Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) & 3627295874Savos ~(R88E_TX_RPT1_ENA | R88E_TX_RPT2_ENA)); 3628295874Savos 3629295874Savos /* Stop Rx. */ 3630295874Savos urtwn_write_1(sc, R92C_CR, 0); 3631295874Savos 3632295874Savos /* Move card to Low Power State. */ 3633295874Savos /* Block all Tx queues. */ 3634295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3635295874Savos 3636295874Savos for (ntries = 0; ntries < 20; ntries++) { 3637295874Savos /* Should be zero if no packet is transmitting. */ 3638295874Savos if (urtwn_read_4(sc, R88E_SCH_TXCMD) == 0) 3639295874Savos break; 3640295874Savos 3641295874Savos urtwn_ms_delay(sc); 3642295874Savos } 3643295874Savos if (ntries == 20) { 3644295874Savos device_printf(sc->sc_dev, "%s: failed to block Tx queues\n", 3645295874Savos __func__); 3646295874Savos return; 3647295874Savos } 3648295874Savos 3649295874Savos /* CCK and OFDM are disabled, and clock are gated. */ 3650295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3651295874Savos urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~R92C_SYS_FUNC_EN_BBRSTB); 3652295874Savos 3653295874Savos urtwn_ms_delay(sc); 3654295874Savos 3655295874Savos /* Reset MAC TRX */ 3656295874Savos urtwn_write_1(sc, R92C_CR, 3657295874Savos R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3658295874Savos R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | 3659295874Savos R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN); 3660295874Savos 3661295874Savos /* check if removed later */ 3662295874Savos urtwn_write_1(sc, R92C_CR + 1, 3663295874Savos urtwn_read_1(sc, R92C_CR + 1) & ~(R92C_CR_ENSEC >> 8)); 3664295874Savos 3665295874Savos /* Respond TxOK to scheduler */ 3666295874Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, 3667295874Savos urtwn_read_1(sc, R92C_DUAL_TSF_RST) | 0x20); 3668295874Savos 3669295874Savos /* If firmware in ram code, do reset. */ 3670295874Savos#ifndef URTWN_WITHOUT_UCODE 3671295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) 3672295874Savos urtwn_r88e_fw_reset(sc); 3673295874Savos#endif 3674295874Savos 3675295874Savos /* Reset MCU ready status. */ 3676295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0x00); 3677295874Savos 3678295874Savos /* Disable 32k. */ 3679295874Savos urtwn_write_1(sc, R88E_32K_CTRL, 3680295874Savos urtwn_read_1(sc, R88E_32K_CTRL) & ~0x01); 3681295874Savos 3682295874Savos /* Move card to Disabled state. */ 3683295874Savos /* Turn off RF. */ 3684295874Savos urtwn_write_1(sc, R92C_RF_CTRL, 0); 3685295874Savos 3686295874Savos /* LDO Sleep mode. */ 3687295874Savos urtwn_write_1(sc, R92C_LPLDO_CTRL, 3688295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) | R92C_LPLDO_CTRL_SLEEP); 3689295874Savos 3690295874Savos /* Turn off MAC by HW state machine */ 3691295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3692295874Savos urtwn_read_1(sc, R92C_APS_FSMCO + 1) | 3693295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)); 3694295874Savos 3695295874Savos for (ntries = 0; ntries < 20; ntries++) { 3696295874Savos /* Wait until it will be disabled. */ 3697295874Savos if ((urtwn_read_1(sc, R92C_APS_FSMCO + 1) & 3698295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)) == 0) 3699295874Savos break; 3700295874Savos 3701295874Savos urtwn_ms_delay(sc); 3702295874Savos } 3703295874Savos if (ntries == 20) { 3704295874Savos device_printf(sc->sc_dev, "%s: could not turn off MAC\n", 3705295874Savos __func__); 3706295874Savos return; 3707295874Savos } 3708295874Savos 3709295874Savos /* schmit trigger */ 3710295874Savos urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3711295874Savos urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3712295874Savos 3713295874Savos /* Enable WL suspend. */ 3714295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3715295874Savos (urtwn_read_1(sc, R92C_APS_FSMCO + 1) & ~0x10) | 0x08); 3716295874Savos 3717295874Savos /* Enable bandgap mbias in suspend. */ 3718295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 3, 0); 3719295874Savos 3720295874Savos /* Clear SIC_EN register. */ 3721295874Savos urtwn_write_1(sc, R92C_GPIO_MUXCFG + 1, 3722295874Savos urtwn_read_1(sc, R92C_GPIO_MUXCFG + 1) & ~0x10); 3723295874Savos 3724295874Savos /* Set USB suspend enable local register */ 3725295874Savos urtwn_write_1(sc, R92C_USB_SUSPEND, 3726295874Savos urtwn_read_1(sc, R92C_USB_SUSPEND) | 0x10); 3727295874Savos 3728295874Savos /* Reset MCU IO Wrapper. */ 3729295874Savos reg = urtwn_read_1(sc, R92C_RSV_CTRL + 1); 3730295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08); 3731295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08); 3732295874Savos 3733295874Savos /* marked as 'For Power Consumption' code. */ 3734295874Savos urtwn_write_1(sc, R92C_GPIO_OUT, urtwn_read_1(sc, R92C_GPIO_IN)); 3735295874Savos urtwn_write_1(sc, R92C_GPIO_IOSEL, 0xff); 3736295874Savos 3737295874Savos urtwn_write_1(sc, R92C_GPIO_IO_SEL, 3738295874Savos urtwn_read_1(sc, R92C_GPIO_IO_SEL) << 4); 3739295874Savos urtwn_write_1(sc, R92C_GPIO_MOD, 3740295874Savos urtwn_read_1(sc, R92C_GPIO_MOD) | 0x0f); 3741295874Savos 3742295874Savos /* Set LNA, TRSW, EX_PA Pin to output mode. */ 3743295874Savos urtwn_write_4(sc, R88E_BB_PAD_CTRL, 0x00080808); 3744295874Savos} 3745295874Savos 3746264912Skevlostatic int 3747251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 3748251538Srpaulo{ 3749264912Skevlo int i, error, page_count, pktbuf_count; 3750251538Srpaulo 3751264912Skevlo page_count = (sc->chip & URTWN_CHIP_88E) ? 3752264912Skevlo R88E_TX_PAGE_COUNT : R92C_TX_PAGE_COUNT; 3753264912Skevlo pktbuf_count = (sc->chip & URTWN_CHIP_88E) ? 3754264912Skevlo R88E_TXPKTBUF_COUNT : R92C_TXPKTBUF_COUNT; 3755264912Skevlo 3756264912Skevlo /* Reserve pages [0; page_count]. */ 3757264912Skevlo for (i = 0; i < page_count; i++) { 3758251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3759251538Srpaulo return (error); 3760251538Srpaulo } 3761251538Srpaulo /* NB: 0xff indicates end-of-list. */ 3762251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 3763251538Srpaulo return (error); 3764251538Srpaulo /* 3765264912Skevlo * Use pages [page_count + 1; pktbuf_count - 1] 3766251538Srpaulo * as ring buffer. 3767251538Srpaulo */ 3768264912Skevlo for (++i; i < pktbuf_count - 1; i++) { 3769251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3770251538Srpaulo return (error); 3771251538Srpaulo } 3772251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 3773264912Skevlo error = urtwn_llt_write(sc, i, page_count + 1); 3774251538Srpaulo return (error); 3775251538Srpaulo} 3776251538Srpaulo 3777295871Savos#ifndef URTWN_WITHOUT_UCODE 3778251538Srpaulostatic void 3779251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 3780251538Srpaulo{ 3781251538Srpaulo uint16_t reg; 3782251538Srpaulo int ntries; 3783251538Srpaulo 3784251538Srpaulo /* Tell 8051 to reset itself. */ 3785251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 3786251538Srpaulo 3787251538Srpaulo /* Wait until 8051 resets by itself. */ 3788251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 3789251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3790251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 3791251538Srpaulo return; 3792266472Shselasky urtwn_ms_delay(sc); 3793251538Srpaulo } 3794251538Srpaulo /* Force 8051 reset. */ 3795251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3796251538Srpaulo} 3797251538Srpaulo 3798264912Skevlostatic void 3799264912Skevlourtwn_r88e_fw_reset(struct urtwn_softc *sc) 3800264912Skevlo{ 3801264912Skevlo uint16_t reg; 3802264912Skevlo 3803264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3804264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3805264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN); 3806264912Skevlo} 3807264912Skevlo 3808251538Srpaulostatic int 3809251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 3810251538Srpaulo{ 3811251538Srpaulo uint32_t reg; 3812291698Savos usb_error_t error = USB_ERR_NORMAL_COMPLETION; 3813291698Savos int off, mlen; 3814251538Srpaulo 3815251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3816251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 3817251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3818251538Srpaulo 3819251538Srpaulo off = R92C_FW_START_ADDR; 3820251538Srpaulo while (len > 0) { 3821251538Srpaulo if (len > 196) 3822251538Srpaulo mlen = 196; 3823251538Srpaulo else if (len > 4) 3824251538Srpaulo mlen = 4; 3825251538Srpaulo else 3826251538Srpaulo mlen = 1; 3827251538Srpaulo /* XXX fix this deconst */ 3828281069Srpaulo error = urtwn_write_region_1(sc, off, 3829251538Srpaulo __DECONST(uint8_t *, buf), mlen); 3830291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3831251538Srpaulo break; 3832251538Srpaulo off += mlen; 3833251538Srpaulo buf += mlen; 3834251538Srpaulo len -= mlen; 3835251538Srpaulo } 3836251538Srpaulo return (error); 3837251538Srpaulo} 3838251538Srpaulo 3839251538Srpaulostatic int 3840251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 3841251538Srpaulo{ 3842251538Srpaulo const struct firmware *fw; 3843251538Srpaulo const struct r92c_fw_hdr *hdr; 3844251538Srpaulo const char *imagename; 3845251538Srpaulo const u_char *ptr; 3846251538Srpaulo size_t len; 3847251538Srpaulo uint32_t reg; 3848251538Srpaulo int mlen, ntries, page, error; 3849251538Srpaulo 3850264864Skevlo URTWN_UNLOCK(sc); 3851251538Srpaulo /* Read firmware image from the filesystem. */ 3852264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3853264912Skevlo imagename = "urtwn-rtl8188eufw"; 3854264912Skevlo else if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3855264912Skevlo URTWN_CHIP_UMC_A_CUT) 3856251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 3857251538Srpaulo else 3858251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 3859251538Srpaulo 3860251538Srpaulo fw = firmware_get(imagename); 3861264864Skevlo URTWN_LOCK(sc); 3862251538Srpaulo if (fw == NULL) { 3863251538Srpaulo device_printf(sc->sc_dev, 3864251538Srpaulo "failed loadfirmware of file %s\n", imagename); 3865251538Srpaulo return (ENOENT); 3866251538Srpaulo } 3867251538Srpaulo 3868251538Srpaulo len = fw->datasize; 3869251538Srpaulo 3870251538Srpaulo if (len < sizeof(*hdr)) { 3871251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 3872251538Srpaulo error = EINVAL; 3873251538Srpaulo goto fail; 3874251538Srpaulo } 3875251538Srpaulo ptr = fw->data; 3876251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 3877251538Srpaulo /* Check if there is a valid FW header and skip it. */ 3878251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 3879264912Skevlo (le16toh(hdr->signature) >> 4) == 0x88e || 3880251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 3881294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, 3882294471Savos "FW V%d.%d %02d-%02d %02d:%02d\n", 3883251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 3884251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 3885251538Srpaulo ptr += sizeof(*hdr); 3886251538Srpaulo len -= sizeof(*hdr); 3887251538Srpaulo } 3888251538Srpaulo 3889264912Skevlo if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) { 3890264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3891264912Skevlo urtwn_r88e_fw_reset(sc); 3892264912Skevlo else 3893264912Skevlo urtwn_fw_reset(sc); 3894251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 3895251538Srpaulo } 3896264912Skevlo 3897268487Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3898268487Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3899268487Skevlo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3900268487Skevlo R92C_SYS_FUNC_EN_CPUEN); 3901268487Skevlo } 3902251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3903251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 3904251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 3905251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 3906251538Srpaulo 3907263154Skevlo /* Reset the FWDL checksum. */ 3908263154Skevlo urtwn_write_1(sc, R92C_MCUFWDL, 3909263154Skevlo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 3910263154Skevlo 3911251538Srpaulo for (page = 0; len > 0; page++) { 3912251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 3913251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 3914251538Srpaulo if (error != 0) { 3915251538Srpaulo device_printf(sc->sc_dev, 3916251538Srpaulo "could not load firmware page\n"); 3917251538Srpaulo goto fail; 3918251538Srpaulo } 3919251538Srpaulo ptr += mlen; 3920251538Srpaulo len -= mlen; 3921251538Srpaulo } 3922251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3923251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 3924251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 3925251538Srpaulo 3926251538Srpaulo /* Wait for checksum report. */ 3927251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3928251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 3929251538Srpaulo break; 3930266472Shselasky urtwn_ms_delay(sc); 3931251538Srpaulo } 3932251538Srpaulo if (ntries == 1000) { 3933251538Srpaulo device_printf(sc->sc_dev, 3934251538Srpaulo "timeout waiting for checksum report\n"); 3935251538Srpaulo error = ETIMEDOUT; 3936251538Srpaulo goto fail; 3937251538Srpaulo } 3938251538Srpaulo 3939251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3940251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 3941251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3942264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3943264912Skevlo urtwn_r88e_fw_reset(sc); 3944251538Srpaulo /* Wait for firmware readiness. */ 3945251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3946251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 3947251538Srpaulo break; 3948266472Shselasky urtwn_ms_delay(sc); 3949251538Srpaulo } 3950251538Srpaulo if (ntries == 1000) { 3951251538Srpaulo device_printf(sc->sc_dev, 3952251538Srpaulo "timeout waiting for firmware readiness\n"); 3953251538Srpaulo error = ETIMEDOUT; 3954251538Srpaulo goto fail; 3955251538Srpaulo } 3956251538Srpaulofail: 3957251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 3958251538Srpaulo return (error); 3959251538Srpaulo} 3960295871Savos#endif 3961251538Srpaulo 3962291902Skevlostatic int 3963251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 3964251538Srpaulo{ 3965291902Skevlo struct usb_endpoint *ep, *ep_end; 3966291698Savos usb_error_t usb_err; 3967291902Skevlo uint32_t reg; 3968291902Skevlo int hashq, hasnq, haslq, nqueues, ntx; 3969291902Skevlo int error, pagecount, npubqpages, nqpages, nrempages, tx_boundary; 3970281069Srpaulo 3971291695Savos /* Initialize LLT table. */ 3972291695Savos error = urtwn_llt_init(sc); 3973291695Savos if (error != 0) 3974291695Savos return (error); 3975291695Savos 3976291902Skevlo /* Determine the number of bulk-out pipes. */ 3977291902Skevlo ntx = 0; 3978291902Skevlo ep = sc->sc_udev->endpoints; 3979291902Skevlo ep_end = sc->sc_udev->endpoints + sc->sc_udev->endpoints_max; 3980291902Skevlo for (; ep != ep_end; ep++) { 3981291902Skevlo if ((ep->edesc == NULL) || 3982291902Skevlo (ep->iface_index != sc->sc_iface_index)) 3983291902Skevlo continue; 3984291902Skevlo if (UE_GET_DIR(ep->edesc->bEndpointAddress) == UE_DIR_OUT) 3985291902Skevlo ntx++; 3986291902Skevlo } 3987291902Skevlo if (ntx == 0) { 3988291902Skevlo device_printf(sc->sc_dev, 3989291902Skevlo "%d: invalid number of Tx bulk pipes\n", ntx); 3990291698Savos return (EIO); 3991291902Skevlo } 3992291695Savos 3993251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 3994291902Skevlo hashq = hasnq = haslq = nqueues = 0; 3995291902Skevlo switch (ntx) { 3996291902Skevlo case 1: hashq = 1; break; 3997291902Skevlo case 2: hashq = hasnq = 1; break; 3998291902Skevlo case 3: case 4: hashq = hasnq = haslq = 1; break; 3999291902Skevlo } 4000251538Srpaulo nqueues = hashq + hasnq + haslq; 4001251538Srpaulo if (nqueues == 0) 4002251538Srpaulo return (EIO); 4003251538Srpaulo 4004291902Skevlo npubqpages = nqpages = nrempages = pagecount = 0; 4005291902Skevlo if (sc->chip & URTWN_CHIP_88E) 4006291902Skevlo tx_boundary = R88E_TX_PAGE_BOUNDARY; 4007291902Skevlo else { 4008291902Skevlo pagecount = R92C_TX_PAGE_COUNT; 4009291902Skevlo npubqpages = R92C_PUBQ_NPAGES; 4010291902Skevlo tx_boundary = R92C_TX_PAGE_BOUNDARY; 4011291902Skevlo } 4012291902Skevlo 4013251538Srpaulo /* Set number of pages for normal priority queue. */ 4014291902Skevlo if (sc->chip & URTWN_CHIP_88E) { 4015291902Skevlo usb_err = urtwn_write_2(sc, R92C_RQPN_NPQ, 0xd); 4016291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4017291902Skevlo return (EIO); 4018291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 0x808e000d); 4019291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4020291902Skevlo return (EIO); 4021291902Skevlo } else { 4022291902Skevlo /* Get the number of pages for each queue. */ 4023291902Skevlo nqpages = (pagecount - npubqpages) / nqueues; 4024291902Skevlo /* 4025291902Skevlo * The remaining pages are assigned to the high priority 4026291902Skevlo * queue. 4027291902Skevlo */ 4028291902Skevlo nrempages = (pagecount - npubqpages) % nqueues; 4029291902Skevlo usb_err = urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 4030291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4031291902Skevlo return (EIO); 4032291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 4033291902Skevlo /* Set number of pages for public queue. */ 4034291902Skevlo SM(R92C_RQPN_PUBQ, npubqpages) | 4035291902Skevlo /* Set number of pages for high priority queue. */ 4036291902Skevlo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 4037291902Skevlo /* Set number of pages for low priority queue. */ 4038291902Skevlo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 4039291902Skevlo /* Load values. */ 4040291902Skevlo R92C_RQPN_LD); 4041291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4042291902Skevlo return (EIO); 4043291902Skevlo } 4044251538Srpaulo 4045291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary); 4046291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4047291698Savos return (EIO); 4048291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary); 4049291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4050291698Savos return (EIO); 4051291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary); 4052291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4053291698Savos return (EIO); 4054291902Skevlo usb_err = urtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary); 4055291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4056291698Savos return (EIO); 4057291902Skevlo usb_err = urtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary); 4058291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4059291698Savos return (EIO); 4060251538Srpaulo 4061251538Srpaulo /* Set queue to USB pipe mapping. */ 4062251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 4063251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 4064251538Srpaulo if (nqueues == 1) { 4065251538Srpaulo if (hashq) 4066251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 4067251538Srpaulo else if (hasnq) 4068251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 4069251538Srpaulo else 4070251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 4071251538Srpaulo } else if (nqueues == 2) { 4072292056Skevlo /* 4073292056Skevlo * All 2-endpoints configs have high and normal 4074292056Skevlo * priority queues. 4075292056Skevlo */ 4076292056Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 4077251538Srpaulo } else 4078251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 4079291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 4080291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4081291698Savos return (EIO); 4082251538Srpaulo 4083251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 4084291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 4085291902Skevlo (sc->chip & URTWN_CHIP_88E) ? 0x23ff : 0x27ff); 4086291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4087291698Savos return (EIO); 4088251538Srpaulo 4089291902Skevlo /* Set Tx/Rx transfer page size. */ 4090291902Skevlo usb_err = urtwn_write_1(sc, R92C_PBP, 4091291902Skevlo SM(R92C_PBP_PSRX, R92C_PBP_128) | 4092291902Skevlo SM(R92C_PBP_PSTX, R92C_PBP_128)); 4093291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4094264912Skevlo return (EIO); 4095264912Skevlo 4096264912Skevlo return (0); 4097264912Skevlo} 4098264912Skevlo 4099291698Savosstatic int 4100251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 4101251538Srpaulo{ 4102291698Savos usb_error_t error; 4103251538Srpaulo int i; 4104251538Srpaulo 4105251538Srpaulo /* Write MAC initialization values. */ 4106264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4107264912Skevlo for (i = 0; i < nitems(rtl8188eu_mac); i++) { 4108291698Savos error = urtwn_write_1(sc, rtl8188eu_mac[i].reg, 4109264912Skevlo rtl8188eu_mac[i].val); 4110291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4111291698Savos return (EIO); 4112264912Skevlo } 4113264912Skevlo urtwn_write_1(sc, R92C_MAX_AGGR_NUM, 0x07); 4114264912Skevlo } else { 4115264912Skevlo for (i = 0; i < nitems(rtl8192cu_mac); i++) 4116291698Savos error = urtwn_write_1(sc, rtl8192cu_mac[i].reg, 4117264912Skevlo rtl8192cu_mac[i].val); 4118291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4119291698Savos return (EIO); 4120264912Skevlo } 4121291698Savos 4122291698Savos return (0); 4123251538Srpaulo} 4124251538Srpaulo 4125251538Srpaulostatic void 4126251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 4127251538Srpaulo{ 4128251538Srpaulo const struct urtwn_bb_prog *prog; 4129251538Srpaulo uint32_t reg; 4130264912Skevlo uint8_t crystalcap; 4131251538Srpaulo int i; 4132251538Srpaulo 4133251538Srpaulo /* Enable BB and RF. */ 4134251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 4135251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 4136251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 4137251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 4138251538Srpaulo 4139264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 4140264912Skevlo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 4141251538Srpaulo 4142251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 4143251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 4144251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 4145251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 4146251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 4147251538Srpaulo 4148264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4149264912Skevlo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 4150264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 4151264912Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 4152264912Skevlo } 4153251538Srpaulo 4154251538Srpaulo /* Select BB programming based on board type. */ 4155264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4156264912Skevlo prog = &rtl8188eu_bb_prog; 4157264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4158251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4159251538Srpaulo prog = &rtl8188ce_bb_prog; 4160251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4161251538Srpaulo prog = &rtl8188ru_bb_prog; 4162251538Srpaulo else 4163251538Srpaulo prog = &rtl8188cu_bb_prog; 4164251538Srpaulo } else { 4165251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4166251538Srpaulo prog = &rtl8192ce_bb_prog; 4167251538Srpaulo else 4168251538Srpaulo prog = &rtl8192cu_bb_prog; 4169251538Srpaulo } 4170251538Srpaulo /* Write BB initialization values. */ 4171251538Srpaulo for (i = 0; i < prog->count; i++) { 4172251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 4173266472Shselasky urtwn_ms_delay(sc); 4174251538Srpaulo } 4175251538Srpaulo 4176251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 4177251538Srpaulo /* 8192C 1T only configuration. */ 4178251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 4179251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 4180251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 4181251538Srpaulo 4182251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 4183251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 4184251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 4185251538Srpaulo 4186251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 4187251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 4188251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 4189251538Srpaulo 4190251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 4191251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 4192251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 4193251538Srpaulo 4194251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 4195251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 4196251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 4197251538Srpaulo 4198251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 4199251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4200251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 4201251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 4202251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4203251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 4204251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 4205251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4206251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 4207251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 4208251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4209251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 4210251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 4211251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4212251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 4213251538Srpaulo } 4214251538Srpaulo 4215251538Srpaulo /* Write AGC values. */ 4216251538Srpaulo for (i = 0; i < prog->agccount; i++) { 4217251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 4218251538Srpaulo prog->agcvals[i]); 4219266472Shselasky urtwn_ms_delay(sc); 4220251538Srpaulo } 4221251538Srpaulo 4222264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4223264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422); 4224266472Shselasky urtwn_ms_delay(sc); 4225264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420); 4226266472Shselasky urtwn_ms_delay(sc); 4227264912Skevlo 4228294198Savos crystalcap = sc->rom.r88e_rom.crystalcap; 4229264912Skevlo if (crystalcap == 0xff) 4230264912Skevlo crystalcap = 0x20; 4231264912Skevlo crystalcap &= 0x3f; 4232264912Skevlo reg = urtwn_bb_read(sc, R92C_AFE_XTAL_CTRL); 4233264912Skevlo urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL, 4234264912Skevlo RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 4235264912Skevlo crystalcap | crystalcap << 6)); 4236264912Skevlo } else { 4237264912Skevlo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 4238264912Skevlo R92C_HSSI_PARAM2_CCK_HIPWR) 4239264912Skevlo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 4240264912Skevlo } 4241251538Srpaulo} 4242251538Srpaulo 4243289066Skevlostatic void 4244251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 4245251538Srpaulo{ 4246251538Srpaulo const struct urtwn_rf_prog *prog; 4247251538Srpaulo uint32_t reg, type; 4248251538Srpaulo int i, j, idx, off; 4249251538Srpaulo 4250251538Srpaulo /* Select RF programming based on board type. */ 4251264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4252264912Skevlo prog = rtl8188eu_rf_prog; 4253264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4254251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4255251538Srpaulo prog = rtl8188ce_rf_prog; 4256251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4257251538Srpaulo prog = rtl8188ru_rf_prog; 4258251538Srpaulo else 4259251538Srpaulo prog = rtl8188cu_rf_prog; 4260251538Srpaulo } else 4261251538Srpaulo prog = rtl8192ce_rf_prog; 4262251538Srpaulo 4263251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4264251538Srpaulo /* Save RF_ENV control type. */ 4265251538Srpaulo idx = i / 2; 4266251538Srpaulo off = (i % 2) * 16; 4267251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4268251538Srpaulo type = (reg >> off) & 0x10; 4269251538Srpaulo 4270251538Srpaulo /* Set RF_ENV enable. */ 4271251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4272251538Srpaulo reg |= 0x100000; 4273251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4274266472Shselasky urtwn_ms_delay(sc); 4275251538Srpaulo /* Set RF_ENV output high. */ 4276251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4277251538Srpaulo reg |= 0x10; 4278251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4279266472Shselasky urtwn_ms_delay(sc); 4280251538Srpaulo /* Set address and data lengths of RF registers. */ 4281251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4282251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 4283251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4284266472Shselasky urtwn_ms_delay(sc); 4285251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4286251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 4287251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4288266472Shselasky urtwn_ms_delay(sc); 4289251538Srpaulo 4290251538Srpaulo /* Write RF initialization values for this chain. */ 4291251538Srpaulo for (j = 0; j < prog[i].count; j++) { 4292251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 4293251538Srpaulo prog[i].regs[j] <= 0xfe) { 4294251538Srpaulo /* 4295251538Srpaulo * These are fake RF registers offsets that 4296251538Srpaulo * indicate a delay is required. 4297251538Srpaulo */ 4298266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 20); /* 50ms */ 4299251538Srpaulo continue; 4300251538Srpaulo } 4301251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 4302251538Srpaulo prog[i].vals[j]); 4303266472Shselasky urtwn_ms_delay(sc); 4304251538Srpaulo } 4305251538Srpaulo 4306251538Srpaulo /* Restore RF_ENV control type. */ 4307251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4308251538Srpaulo reg &= ~(0x10 << off) | (type << off); 4309251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 4310251538Srpaulo 4311251538Srpaulo /* Cache RF register CHNLBW. */ 4312251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 4313251538Srpaulo } 4314251538Srpaulo 4315251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 4316251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 4317251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 4318251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 4319251538Srpaulo } 4320251538Srpaulo} 4321251538Srpaulo 4322251538Srpaulostatic void 4323251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 4324251538Srpaulo{ 4325251538Srpaulo /* Invalidate all CAM entries. */ 4326251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 4327251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 4328251538Srpaulo} 4329251538Srpaulo 4330292175Savosstatic int 4331292175Savosurtwn_cam_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 4332292175Savos{ 4333292175Savos usb_error_t error; 4334292175Savos 4335292175Savos error = urtwn_write_4(sc, R92C_CAMWRITE, data); 4336292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4337292175Savos return (EIO); 4338292175Savos error = urtwn_write_4(sc, R92C_CAMCMD, 4339292175Savos R92C_CAMCMD_POLLING | R92C_CAMCMD_WRITE | 4340292175Savos SM(R92C_CAMCMD_ADDR, addr)); 4341292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4342292175Savos return (EIO); 4343292175Savos 4344292175Savos return (0); 4345292175Savos} 4346292175Savos 4347251538Srpaulostatic void 4348251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 4349251538Srpaulo{ 4350251538Srpaulo uint8_t reg; 4351251538Srpaulo int i; 4352251538Srpaulo 4353251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4354251538Srpaulo if (sc->pa_setting & (1 << i)) 4355251538Srpaulo continue; 4356251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 4357251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 4358251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 4359251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 4360251538Srpaulo } 4361251538Srpaulo if (!(sc->pa_setting & 0x10)) { 4362251538Srpaulo reg = urtwn_read_1(sc, 0x16); 4363251538Srpaulo reg = (reg & ~0xf0) | 0x90; 4364251538Srpaulo urtwn_write_1(sc, 0x16, reg); 4365251538Srpaulo } 4366251538Srpaulo} 4367251538Srpaulo 4368251538Srpaulostatic void 4369251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 4370251538Srpaulo{ 4371290564Savos struct ieee80211com *ic = &sc->sc_ic; 4372290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4373290564Savos uint32_t rcr; 4374290564Savos uint16_t filter; 4375290564Savos 4376290564Savos URTWN_ASSERT_LOCKED(sc); 4377290564Savos 4378299965Savos /* Setup multicast filter. */ 4379299965Savos urtwn_set_multi(sc); 4380290564Savos 4381290564Savos /* Filter for management frames. */ 4382290564Savos filter = 0x7f3f; 4383290631Savos switch (vap->iv_opmode) { 4384290631Savos case IEEE80211_M_STA: 4385290564Savos filter &= ~( 4386290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | 4387290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | 4388290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); 4389290631Savos break; 4390290631Savos case IEEE80211_M_HOSTAP: 4391290631Savos filter &= ~( 4392290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | 4393296174Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP)); 4394290631Savos break; 4395290631Savos case IEEE80211_M_MONITOR: 4396290651Savos case IEEE80211_M_IBSS: 4397290631Savos break; 4398290631Savos default: 4399290631Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4400290631Savos __func__, vap->iv_opmode); 4401290631Savos break; 4402290564Savos } 4403290564Savos urtwn_write_2(sc, R92C_RXFLTMAP0, filter); 4404290564Savos 4405251538Srpaulo /* Reject all control frames. */ 4406251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 4407290564Savos 4408290564Savos /* Reject all data frames. */ 4409290564Savos urtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); 4410290564Savos 4411290564Savos rcr = R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | 4412290564Savos R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | 4413290564Savos R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; 4414290564Savos 4415290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) { 4416290564Savos /* Accept all frames. */ 4417290564Savos rcr |= R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | 4418290564Savos R92C_RCR_AAP; 4419290564Savos } 4420290564Savos 4421290564Savos /* Set Rx filter. */ 4422290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4423290564Savos 4424290564Savos if (ic->ic_promisc != 0) { 4425290564Savos /* Update Rx filter. */ 4426290564Savos urtwn_set_promisc(sc); 4427290564Savos } 4428251538Srpaulo} 4429251538Srpaulo 4430251538Srpaulostatic void 4431251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 4432251538Srpaulo{ 4433251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 4434251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 4435251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 4436251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 4437251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 4438251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 4439251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 4440251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 4441251538Srpaulo} 4442251538Srpaulo 4443289066Skevlostatic void 4444251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 4445251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4446251538Srpaulo{ 4447251538Srpaulo uint32_t reg; 4448251538Srpaulo 4449251538Srpaulo /* Write per-CCK rate Tx power. */ 4450251538Srpaulo if (chain == 0) { 4451251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 4452251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 4453251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 4454251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4455251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 4456251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 4457251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 4458251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4459251538Srpaulo } else { 4460251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 4461251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 4462251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 4463251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 4464251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 4465251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4466251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 4467251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4468251538Srpaulo } 4469251538Srpaulo /* Write per-OFDM rate Tx power. */ 4470251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 4471251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 4472251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 4473251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 4474251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 4475251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 4476251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 4477251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 4478251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 4479251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 4480251538Srpaulo /* Write per-MCS Tx power. */ 4481251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 4482251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 4483251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 4484251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 4485251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 4486251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 4487251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 4488251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 4489251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 4490251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 4491251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 4492251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 4493261506Skevlo SM(R92C_TXAGC_MCS09, power[21]) | 4494251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 4495251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 4496251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 4497251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 4498251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 4499251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 4500251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 4501251538Srpaulo} 4502251538Srpaulo 4503289066Skevlostatic void 4504251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 4505251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4506251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4507251538Srpaulo{ 4508287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4509291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 4510251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 4511251538Srpaulo const struct urtwn_txpwr *base; 4512251538Srpaulo int ridx, chan, group; 4513251538Srpaulo 4514251538Srpaulo /* Determine channel group. */ 4515251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4516251538Srpaulo if (chan <= 3) 4517251538Srpaulo group = 0; 4518251538Srpaulo else if (chan <= 9) 4519251538Srpaulo group = 1; 4520251538Srpaulo else 4521251538Srpaulo group = 2; 4522251538Srpaulo 4523251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 4524251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 4525251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4526251538Srpaulo base = &rtl8188ru_txagc[chain]; 4527251538Srpaulo else 4528251538Srpaulo base = &rtl8192cu_txagc[chain]; 4529251538Srpaulo } else 4530251538Srpaulo base = &rtl8192cu_txagc[chain]; 4531251538Srpaulo 4532251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4533251538Srpaulo if (sc->regulatory == 0) { 4534289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4535251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4536251538Srpaulo } 4537289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4538251538Srpaulo if (sc->regulatory == 3) { 4539251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4540251538Srpaulo /* Apply vendor limits. */ 4541251538Srpaulo if (extc != NULL) 4542251538Srpaulo max = rom->ht40_max_pwr[group]; 4543251538Srpaulo else 4544251538Srpaulo max = rom->ht20_max_pwr[group]; 4545251538Srpaulo max = (max >> (chain * 4)) & 0xf; 4546251538Srpaulo if (power[ridx] > max) 4547251538Srpaulo power[ridx] = max; 4548251538Srpaulo } else if (sc->regulatory == 1) { 4549251538Srpaulo if (extc == NULL) 4550251538Srpaulo power[ridx] = base->pwr[group][ridx]; 4551251538Srpaulo } else if (sc->regulatory != 2) 4552251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4553251538Srpaulo } 4554251538Srpaulo 4555251538Srpaulo /* Compute per-CCK rate Tx power. */ 4556251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 4557289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4558251538Srpaulo power[ridx] += cckpow; 4559251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4560251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4561251538Srpaulo } 4562251538Srpaulo 4563251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 4564251538Srpaulo if (sc->ntxchains > 1) { 4565251538Srpaulo /* Apply reduction for 2 spatial streams. */ 4566251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 4567251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4568251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 4569251538Srpaulo } 4570251538Srpaulo 4571251538Srpaulo /* Compute per-OFDM rate Tx power. */ 4572251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 4573251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4574251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 4575289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4576251538Srpaulo power[ridx] += ofdmpow; 4577251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4578251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4579251538Srpaulo } 4580251538Srpaulo 4581251538Srpaulo /* Compute per-MCS Tx power. */ 4582251538Srpaulo if (extc == NULL) { 4583251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 4584251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4585251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 4586251538Srpaulo } 4587251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 4588251538Srpaulo power[ridx] += htpow; 4589251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4590251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4591251538Srpaulo } 4592294471Savos#ifdef USB_DEBUG 4593294471Savos if (sc->sc_debug & URTWN_DEBUG_TXPWR) { 4594251538Srpaulo /* Dump per-rate Tx power values. */ 4595251538Srpaulo printf("Tx power for chain %d:\n", chain); 4596289758Savos for (ridx = URTWN_RIDX_CCK1; ridx < URTWN_RIDX_COUNT; ridx++) 4597251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 4598251538Srpaulo } 4599251538Srpaulo#endif 4600251538Srpaulo} 4601251538Srpaulo 4602289066Skevlostatic void 4603264912Skevlourtwn_r88e_get_txpower(struct urtwn_softc *sc, int chain, 4604264912Skevlo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4605264912Skevlo uint16_t power[URTWN_RIDX_COUNT]) 4606264912Skevlo{ 4607287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4608294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 4609264912Skevlo uint16_t cckpow, ofdmpow, bw20pow, htpow; 4610264912Skevlo const struct urtwn_r88e_txpwr *base; 4611264912Skevlo int ridx, chan, group; 4612264912Skevlo 4613264912Skevlo /* Determine channel group. */ 4614264912Skevlo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4615264912Skevlo if (chan <= 2) 4616264912Skevlo group = 0; 4617264912Skevlo else if (chan <= 5) 4618264912Skevlo group = 1; 4619264912Skevlo else if (chan <= 8) 4620264912Skevlo group = 2; 4621264912Skevlo else if (chan <= 11) 4622264912Skevlo group = 3; 4623264912Skevlo else if (chan <= 13) 4624264912Skevlo group = 4; 4625264912Skevlo else 4626264912Skevlo group = 5; 4627264912Skevlo 4628264912Skevlo /* Get original Tx power based on board type and RF chain. */ 4629264912Skevlo base = &rtl8188eu_txagc[chain]; 4630264912Skevlo 4631264912Skevlo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4632264912Skevlo if (sc->regulatory == 0) { 4633289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4634264912Skevlo power[ridx] = base->pwr[0][ridx]; 4635264912Skevlo } 4636289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4637264912Skevlo if (sc->regulatory == 3) 4638264912Skevlo power[ridx] = base->pwr[0][ridx]; 4639264912Skevlo else if (sc->regulatory == 1) { 4640264912Skevlo if (extc == NULL) 4641264912Skevlo power[ridx] = base->pwr[group][ridx]; 4642264912Skevlo } else if (sc->regulatory != 2) 4643264912Skevlo power[ridx] = base->pwr[0][ridx]; 4644264912Skevlo } 4645264912Skevlo 4646264912Skevlo /* Compute per-CCK rate Tx power. */ 4647294198Savos cckpow = rom->cck_tx_pwr[group]; 4648289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4649264912Skevlo power[ridx] += cckpow; 4650264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4651264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4652264912Skevlo } 4653264912Skevlo 4654294198Savos htpow = rom->ht40_tx_pwr[group]; 4655264912Skevlo 4656264912Skevlo /* Compute per-OFDM rate Tx power. */ 4657264912Skevlo ofdmpow = htpow + sc->ofdm_tx_pwr_diff; 4658289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4659264912Skevlo power[ridx] += ofdmpow; 4660264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4661264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4662264912Skevlo } 4663264912Skevlo 4664264912Skevlo bw20pow = htpow + sc->bw20_tx_pwr_diff; 4665264912Skevlo for (ridx = 12; ridx <= 27; ridx++) { 4666264912Skevlo power[ridx] += bw20pow; 4667264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4668264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4669264912Skevlo } 4670264912Skevlo} 4671264912Skevlo 4672289066Skevlostatic void 4673251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 4674251538Srpaulo struct ieee80211_channel *extc) 4675251538Srpaulo{ 4676251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 4677251538Srpaulo int i; 4678251538Srpaulo 4679251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 4680251538Srpaulo /* Compute per-rate Tx power values. */ 4681264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4682264912Skevlo urtwn_r88e_get_txpower(sc, i, c, extc, power); 4683264912Skevlo else 4684264912Skevlo urtwn_get_txpower(sc, i, c, extc, power); 4685251538Srpaulo /* Write per-rate Tx power values to hardware. */ 4686251538Srpaulo urtwn_write_txpower(sc, i, power); 4687251538Srpaulo } 4688251538Srpaulo} 4689251538Srpaulo 4690251538Srpaulostatic void 4691290048Savosurtwn_set_rx_bssid_all(struct urtwn_softc *sc, int enable) 4692290048Savos{ 4693290048Savos uint32_t reg; 4694290048Savos 4695290048Savos reg = urtwn_read_4(sc, R92C_RCR); 4696290048Savos if (enable) 4697290048Savos reg &= ~R92C_RCR_CBSSID_BCN; 4698290048Savos else 4699290048Savos reg |= R92C_RCR_CBSSID_BCN; 4700290048Savos urtwn_write_4(sc, R92C_RCR, reg); 4701290048Savos} 4702290048Savos 4703290048Savosstatic void 4704290048Savosurtwn_set_gain(struct urtwn_softc *sc, uint8_t gain) 4705290048Savos{ 4706290048Savos uint32_t reg; 4707290048Savos 4708290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 4709290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4710290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 4711290048Savos 4712290048Savos if (!(sc->chip & URTWN_CHIP_88E)) { 4713290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 4714290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4715290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 4716290048Savos } 4717290048Savos} 4718290048Savos 4719290048Savosstatic void 4720251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 4721251538Srpaulo{ 4722290048Savos struct urtwn_softc *sc = ic->ic_softc; 4723290048Savos 4724290048Savos URTWN_LOCK(sc); 4725290048Savos /* Receive beacons / probe responses from any BSSID. */ 4726290651Savos if (ic->ic_opmode != IEEE80211_M_IBSS) 4727290651Savos urtwn_set_rx_bssid_all(sc, 1); 4728290651Savos 4729290048Savos /* Set gain for scanning. */ 4730290048Savos urtwn_set_gain(sc, 0x20); 4731290048Savos URTWN_UNLOCK(sc); 4732251538Srpaulo} 4733251538Srpaulo 4734251538Srpaulostatic void 4735251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 4736251538Srpaulo{ 4737290048Savos struct urtwn_softc *sc = ic->ic_softc; 4738290048Savos 4739290048Savos URTWN_LOCK(sc); 4740290048Savos /* Restore limitations. */ 4741290651Savos if (ic->ic_promisc == 0 && ic->ic_opmode != IEEE80211_M_IBSS) 4742290564Savos urtwn_set_rx_bssid_all(sc, 0); 4743290651Savos 4744290048Savos /* Set gain under link. */ 4745290048Savos urtwn_set_gain(sc, 0x32); 4746290048Savos URTWN_UNLOCK(sc); 4747251538Srpaulo} 4748251538Srpaulo 4749251538Srpaulostatic void 4750300754Savosurtwn_getradiocaps(struct ieee80211com *ic, 4751300754Savos int maxchans, int *nchans, struct ieee80211_channel chans[]) 4752300754Savos{ 4753300754Savos uint8_t bands[IEEE80211_MODE_BYTES]; 4754300754Savos 4755300754Savos memset(bands, 0, sizeof(bands)); 4756300754Savos setbit(bands, IEEE80211_MODE_11B); 4757300754Savos setbit(bands, IEEE80211_MODE_11G); 4758300754Savos if (urtwn_enable_11n) 4759300754Savos setbit(bands, IEEE80211_MODE_11NG); 4760300754Savos ieee80211_add_channel_list_2ghz(chans, maxchans, nchans, 4761300754Savos urtwn_chan_2ghz, nitems(urtwn_chan_2ghz), bands, 0); 4762300754Savos} 4763300754Savos 4764300754Savosstatic void 4765251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 4766251538Srpaulo{ 4767286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4768292173Savos struct ieee80211_channel *c = ic->ic_curchan; 4769281070Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4770251538Srpaulo 4771251538Srpaulo URTWN_LOCK(sc); 4772281070Srpaulo if (vap->iv_state == IEEE80211_S_SCAN) { 4773281070Srpaulo /* Make link LED blink during scan. */ 4774281070Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 4775281070Srpaulo } 4776292173Savos urtwn_set_chan(sc, c, NULL); 4777292173Savos sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq); 4778292173Savos sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags); 4779292173Savos sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq); 4780292173Savos sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags); 4781251538Srpaulo URTWN_UNLOCK(sc); 4782251538Srpaulo} 4783251538Srpaulo 4784292014Savosstatic int 4785292014Savosurtwn_wme_update(struct ieee80211com *ic) 4786292014Savos{ 4787292014Savos const struct wmeParams *wmep = 4788292014Savos ic->ic_wme.wme_chanParams.cap_wmeParams; 4789292014Savos struct urtwn_softc *sc = ic->ic_softc; 4790292014Savos uint8_t aifs, acm, slottime; 4791292014Savos int ac; 4792292014Savos 4793292014Savos acm = 0; 4794292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4795292014Savos 4796292014Savos URTWN_LOCK(sc); 4797292014Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4798292014Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4799292014Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4800292014Savos urtwn_write_4(sc, wme2queue[ac].reg, 4801292014Savos SM(R92C_EDCA_PARAM_TXOP, wmep[ac].wmep_txopLimit) | 4802292014Savos SM(R92C_EDCA_PARAM_ECWMIN, wmep[ac].wmep_logcwmin) | 4803292014Savos SM(R92C_EDCA_PARAM_ECWMAX, wmep[ac].wmep_logcwmax) | 4804292014Savos SM(R92C_EDCA_PARAM_AIFS, aifs)); 4805292014Savos if (ac != WME_AC_BE) 4806292014Savos acm |= wmep[ac].wmep_acm << ac; 4807292014Savos } 4808292014Savos 4809292014Savos if (acm != 0) 4810292014Savos acm |= R92C_ACMHWCTRL_EN; 4811292014Savos urtwn_write_1(sc, R92C_ACMHWCTRL, 4812292014Savos (urtwn_read_1(sc, R92C_ACMHWCTRL) & ~R92C_ACMHWCTRL_ACM_MASK) | 4813292014Savos acm); 4814292014Savos 4815292014Savos URTWN_UNLOCK(sc); 4816292014Savos 4817292014Savos return 0; 4818292014Savos} 4819292014Savos 4820251538Srpaulostatic void 4821294465Savosurtwn_update_slot(struct ieee80211com *ic) 4822294465Savos{ 4823294465Savos urtwn_cmd_sleepable(ic->ic_softc, NULL, 0, urtwn_update_slot_cb); 4824294465Savos} 4825294465Savos 4826294465Savosstatic void 4827294465Savosurtwn_update_slot_cb(struct urtwn_softc *sc, union sec_param *data) 4828294465Savos{ 4829294465Savos struct ieee80211com *ic = &sc->sc_ic; 4830294465Savos uint8_t slottime; 4831294465Savos 4832294465Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4833294465Savos 4834294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ANY, "%s: setting slot time to %uus\n", 4835294471Savos __func__, slottime); 4836294465Savos 4837294465Savos urtwn_write_1(sc, R92C_SLOT, slottime); 4838294465Savos urtwn_update_aifs(sc, slottime); 4839294465Savos} 4840294465Savos 4841294465Savosstatic void 4842294465Savosurtwn_update_aifs(struct urtwn_softc *sc, uint8_t slottime) 4843294465Savos{ 4844294465Savos const struct wmeParams *wmep = 4845294465Savos sc->sc_ic.ic_wme.wme_chanParams.cap_wmeParams; 4846294465Savos uint8_t aifs, ac; 4847294465Savos 4848294465Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4849294465Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4850294465Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4851294465Savos urtwn_write_1(sc, wme2queue[ac].reg, aifs); 4852294465Savos } 4853294465Savos} 4854294465Savos 4855299965Savosstatic uint8_t 4856299965Savosurtwn_get_multi_pos(const uint8_t maddr[]) 4857299965Savos{ 4858299965Savos uint64_t mask = 0x00004d101df481b4; 4859299965Savos uint8_t pos = 0x27; /* initial value */ 4860299965Savos int i, j; 4861299965Savos 4862299965Savos for (i = 0; i < IEEE80211_ADDR_LEN; i++) 4863299965Savos for (j = (i == 0) ? 1 : 0; j < 8; j++) 4864299965Savos if ((maddr[i] >> j) & 1) 4865299965Savos pos ^= (mask >> (i * 8 + j - 1)); 4866299965Savos 4867299965Savos pos &= 0x3f; 4868299965Savos 4869299965Savos return (pos); 4870299965Savos} 4871299965Savos 4872294465Savosstatic void 4873299965Savosurtwn_set_multi(struct urtwn_softc *sc) 4874299965Savos{ 4875299965Savos struct ieee80211com *ic = &sc->sc_ic; 4876299965Savos uint32_t mfilt[2]; 4877299965Savos 4878299965Savos URTWN_ASSERT_LOCKED(sc); 4879299965Savos 4880299965Savos /* general structure was copied from ath(4). */ 4881299965Savos if (ic->ic_allmulti == 0) { 4882299965Savos struct ieee80211vap *vap; 4883299965Savos struct ifnet *ifp; 4884299965Savos struct ifmultiaddr *ifma; 4885299965Savos 4886299965Savos /* 4887299965Savos * Merge multicast addresses to form the hardware filter. 4888299965Savos */ 4889299965Savos mfilt[0] = mfilt[1] = 0; 4890299965Savos TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { 4891299965Savos ifp = vap->iv_ifp; 4892299965Savos if_maddr_rlock(ifp); 4893299965Savos TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 4894299965Savos caddr_t dl; 4895299965Savos uint8_t pos; 4896299965Savos 4897299965Savos dl = LLADDR((struct sockaddr_dl *) 4898299965Savos ifma->ifma_addr); 4899299965Savos pos = urtwn_get_multi_pos(dl); 4900299965Savos 4901299965Savos mfilt[pos / 32] |= (1 << (pos % 32)); 4902299965Savos } 4903299965Savos if_maddr_runlock(ifp); 4904299965Savos } 4905299965Savos } else 4906299965Savos mfilt[0] = mfilt[1] = ~0; 4907299965Savos 4908299965Savos 4909299965Savos urtwn_write_4(sc, R92C_MAR + 0, mfilt[0]); 4910299965Savos urtwn_write_4(sc, R92C_MAR + 4, mfilt[1]); 4911299965Savos 4912299965Savos URTWN_DPRINTF(sc, URTWN_DEBUG_STATE, "%s: MC filter %08x:%08x\n", 4913299965Savos __func__, mfilt[0], mfilt[1]); 4914299965Savos} 4915299965Savos 4916299965Savosstatic void 4917290564Savosurtwn_set_promisc(struct urtwn_softc *sc) 4918290564Savos{ 4919290564Savos struct ieee80211com *ic = &sc->sc_ic; 4920290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4921290564Savos uint32_t rcr, mask1, mask2; 4922290564Savos 4923290564Savos URTWN_ASSERT_LOCKED(sc); 4924290564Savos 4925290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) 4926290564Savos return; 4927290564Savos 4928290564Savos mask1 = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; 4929290564Savos mask2 = R92C_RCR_APM; 4930290564Savos 4931290564Savos if (vap->iv_state == IEEE80211_S_RUN) { 4932290564Savos switch (vap->iv_opmode) { 4933290564Savos case IEEE80211_M_STA: 4934290631Savos mask2 |= R92C_RCR_CBSSID_DATA; 4935290631Savos /* FALLTHROUGH */ 4936290631Savos case IEEE80211_M_HOSTAP: 4937290631Savos mask2 |= R92C_RCR_CBSSID_BCN; 4938290564Savos break; 4939290651Savos case IEEE80211_M_IBSS: 4940290651Savos mask2 |= R92C_RCR_CBSSID_DATA; 4941290651Savos break; 4942290564Savos default: 4943290564Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4944290564Savos __func__, vap->iv_opmode); 4945290564Savos return; 4946290564Savos } 4947290564Savos } 4948290564Savos 4949290564Savos rcr = urtwn_read_4(sc, R92C_RCR); 4950290564Savos if (ic->ic_promisc == 0) 4951290564Savos rcr = (rcr & ~mask1) | mask2; 4952290564Savos else 4953290564Savos rcr = (rcr & ~mask2) | mask1; 4954290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4955290564Savos} 4956290564Savos 4957290564Savosstatic void 4958290564Savosurtwn_update_promisc(struct ieee80211com *ic) 4959290564Savos{ 4960290564Savos struct urtwn_softc *sc = ic->ic_softc; 4961290564Savos 4962290564Savos URTWN_LOCK(sc); 4963290564Savos if (sc->sc_flags & URTWN_RUNNING) 4964290564Savos urtwn_set_promisc(sc); 4965290564Savos URTWN_UNLOCK(sc); 4966290564Savos} 4967290564Savos 4968290564Savosstatic void 4969283540Sglebiusurtwn_update_mcast(struct ieee80211com *ic) 4970251538Srpaulo{ 4971299965Savos struct urtwn_softc *sc = ic->ic_softc; 4972299965Savos 4973299965Savos URTWN_LOCK(sc); 4974299965Savos if (sc->sc_flags & URTWN_RUNNING) 4975299965Savos urtwn_set_multi(sc); 4976299965Savos URTWN_UNLOCK(sc); 4977251538Srpaulo} 4978251538Srpaulo 4979292167Savosstatic struct ieee80211_node * 4980297910Sadrianurtwn_node_alloc(struct ieee80211vap *vap, 4981292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]) 4982292167Savos{ 4983292167Savos struct urtwn_node *un; 4984292167Savos 4985292167Savos un = malloc(sizeof (struct urtwn_node), M_80211_NODE, 4986292167Savos M_NOWAIT | M_ZERO); 4987292167Savos 4988292167Savos if (un == NULL) 4989292167Savos return NULL; 4990292167Savos 4991292167Savos un->id = URTWN_MACID_UNDEFINED; 4992292167Savos 4993292167Savos return &un->ni; 4994292167Savos} 4995292167Savos 4996251538Srpaulostatic void 4997297910Sadrianurtwn_newassoc(struct ieee80211_node *ni, int isnew) 4998292167Savos{ 4999292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 5000292167Savos struct urtwn_node *un = URTWN_NODE(ni); 5001292167Savos uint8_t id; 5002292167Savos 5003297910Sadrian /* Only do this bit for R88E chips */ 5004297910Sadrian if (! (sc->chip & URTWN_CHIP_88E)) 5005297910Sadrian return; 5006297910Sadrian 5007292167Savos if (!isnew) 5008292167Savos return; 5009292167Savos 5010292167Savos URTWN_NT_LOCK(sc); 5011292167Savos for (id = 0; id <= URTWN_MACID_MAX(sc); id++) { 5012292167Savos if (id != URTWN_MACID_BC && sc->node_list[id] == NULL) { 5013292167Savos un->id = id; 5014292167Savos sc->node_list[id] = ni; 5015292167Savos break; 5016292167Savos } 5017292167Savos } 5018292167Savos URTWN_NT_UNLOCK(sc); 5019292167Savos 5020292167Savos if (id > URTWN_MACID_MAX(sc)) { 5021292167Savos device_printf(sc->sc_dev, "%s: node table is full\n", 5022292167Savos __func__); 5023292167Savos } 5024292167Savos} 5025292167Savos 5026292167Savosstatic void 5027297910Sadrianurtwn_node_free(struct ieee80211_node *ni) 5028292167Savos{ 5029292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 5030292167Savos struct urtwn_node *un = URTWN_NODE(ni); 5031292167Savos 5032292167Savos URTWN_NT_LOCK(sc); 5033292167Savos if (un->id != URTWN_MACID_UNDEFINED) 5034292167Savos sc->node_list[un->id] = NULL; 5035292167Savos URTWN_NT_UNLOCK(sc); 5036292167Savos 5037292167Savos sc->sc_node_free(ni); 5038292167Savos} 5039292167Savos 5040292167Savosstatic void 5041251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 5042251538Srpaulo struct ieee80211_channel *extc) 5043251538Srpaulo{ 5044287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 5045251538Srpaulo uint32_t reg; 5046251538Srpaulo u_int chan; 5047251538Srpaulo int i; 5048251538Srpaulo 5049251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 5050251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 5051251538Srpaulo device_printf(sc->sc_dev, 5052251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 5053251538Srpaulo return; 5054251538Srpaulo } 5055251538Srpaulo 5056251538Srpaulo /* Set Tx power for this new channel. */ 5057251538Srpaulo urtwn_set_txpower(sc, c, extc); 5058251538Srpaulo 5059251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 5060251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 5061251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 5062251538Srpaulo } 5063251538Srpaulo#ifndef IEEE80211_NO_HT 5064251538Srpaulo if (extc != NULL) { 5065251538Srpaulo /* Is secondary channel below or above primary? */ 5066251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 5067251538Srpaulo 5068251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 5069251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 5070251538Srpaulo 5071251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 5072251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 5073251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 5074251538Srpaulo 5075251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 5076251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 5077251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 5078251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 5079251538Srpaulo 5080251538Srpaulo /* Set CCK side band. */ 5081251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 5082251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 5083251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 5084251538Srpaulo 5085251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 5086251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 5087251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 5088251538Srpaulo 5089251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 5090251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 5091251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 5092251538Srpaulo 5093251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 5094251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 5095251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 5096251538Srpaulo 5097251538Srpaulo /* Select 40MHz bandwidth. */ 5098251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5099251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 5100251538Srpaulo } else 5101251538Srpaulo#endif 5102251538Srpaulo { 5103251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 5104251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 5105251538Srpaulo 5106251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 5107251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 5108251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 5109251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 5110251538Srpaulo 5111264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5112264912Skevlo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 5113264912Skevlo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 5114264912Skevlo R92C_FPGA0_ANAPARAM2_CBW20); 5115264912Skevlo } 5116281069Srpaulo 5117251538Srpaulo /* Select 20MHz bandwidth. */ 5118251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5119281069Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan | 5120264912Skevlo ((sc->chip & URTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 : 5121264912Skevlo R92C_RF_CHNLBW_BW20)); 5122251538Srpaulo } 5123251538Srpaulo} 5124251538Srpaulo 5125251538Srpaulostatic void 5126251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 5127251538Srpaulo{ 5128251538Srpaulo /* TODO */ 5129251538Srpaulo} 5130251538Srpaulo 5131251538Srpaulostatic void 5132251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 5133251538Srpaulo{ 5134251538Srpaulo uint32_t rf_ac[2]; 5135251538Srpaulo uint8_t txmode; 5136251538Srpaulo int i; 5137251538Srpaulo 5138251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 5139251538Srpaulo if ((txmode & 0x70) != 0) { 5140251538Srpaulo /* Disable all continuous Tx. */ 5141251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 5142251538Srpaulo 5143251538Srpaulo /* Set RF mode to standby mode. */ 5144251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 5145251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 5146251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 5147251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 5148251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 5149251538Srpaulo } 5150251538Srpaulo } else { 5151251538Srpaulo /* Block all Tx queues. */ 5152293180Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 5153251538Srpaulo } 5154251538Srpaulo /* Start calibration. */ 5155251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5156251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 5157251538Srpaulo 5158251538Srpaulo /* Give calibration the time to complete. */ 5159266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 10); /* 100ms */ 5160251538Srpaulo 5161251538Srpaulo /* Restore configuration. */ 5162251538Srpaulo if ((txmode & 0x70) != 0) { 5163251538Srpaulo /* Restore Tx mode. */ 5164251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 5165251538Srpaulo /* Restore RF mode. */ 5166251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 5167251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 5168251538Srpaulo } else { 5169251538Srpaulo /* Unblock all Tx queues. */ 5170251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 5171251538Srpaulo } 5172251538Srpaulo} 5173251538Srpaulo 5174294473Savosstatic void 5175294473Savosurtwn_temp_calib(struct urtwn_softc *sc) 5176294473Savos{ 5177294473Savos uint8_t temp; 5178294473Savos 5179294473Savos URTWN_ASSERT_LOCKED(sc); 5180294473Savos 5181294473Savos if (!(sc->sc_flags & URTWN_TEMP_MEASURED)) { 5182294473Savos /* Start measuring temperature. */ 5183294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5184294473Savos "%s: start measuring temperature\n", __func__); 5185294473Savos if (sc->chip & URTWN_CHIP_88E) { 5186294473Savos urtwn_rf_write(sc, 0, R88E_RF_T_METER, 5187294473Savos R88E_RF_T_METER_START); 5188294473Savos } else { 5189294473Savos urtwn_rf_write(sc, 0, R92C_RF_T_METER, 5190294473Savos R92C_RF_T_METER_START); 5191294473Savos } 5192294473Savos sc->sc_flags |= URTWN_TEMP_MEASURED; 5193294473Savos return; 5194294473Savos } 5195294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 5196294473Savos 5197294473Savos /* Read measured temperature. */ 5198294473Savos if (sc->chip & URTWN_CHIP_88E) { 5199294473Savos temp = MS(urtwn_rf_read(sc, 0, R88E_RF_T_METER), 5200294473Savos R88E_RF_T_METER_VAL); 5201294473Savos } else { 5202294473Savos temp = MS(urtwn_rf_read(sc, 0, R92C_RF_T_METER), 5203294473Savos R92C_RF_T_METER_VAL); 5204294473Savos } 5205294473Savos if (temp == 0) { /* Read failed, skip. */ 5206294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5207294473Savos "%s: temperature read failed, skipping\n", __func__); 5208294473Savos return; 5209294473Savos } 5210294473Savos 5211294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5212294473Savos "%s: temperature: previous %u, current %u\n", 5213294473Savos __func__, sc->thcal_lctemp, temp); 5214294473Savos 5215294473Savos /* 5216294473Savos * Redo LC calibration if temperature changed significantly since 5217294473Savos * last calibration. 5218294473Savos */ 5219294473Savos if (sc->thcal_lctemp == 0) { 5220294473Savos /* First LC calibration is performed in urtwn_init(). */ 5221294473Savos sc->thcal_lctemp = temp; 5222294473Savos } else if (abs(temp - sc->thcal_lctemp) > 1) { 5223294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5224294473Savos "%s: LC calib triggered by temp: %u -> %u\n", 5225294473Savos __func__, sc->thcal_lctemp, temp); 5226294473Savos urtwn_lc_calib(sc); 5227294473Savos /* Record temperature of last LC calibration. */ 5228294473Savos sc->thcal_lctemp = temp; 5229294473Savos } 5230294473Savos} 5231294473Savos 5232291698Savosstatic int 5233287197Sglebiusurtwn_init(struct urtwn_softc *sc) 5234251538Srpaulo{ 5235287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 5236287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 5237287197Sglebius uint8_t macaddr[IEEE80211_ADDR_LEN]; 5238251538Srpaulo uint32_t reg; 5239291698Savos usb_error_t usb_err = USB_ERR_NORMAL_COMPLETION; 5240251538Srpaulo int error; 5241251538Srpaulo 5242291698Savos URTWN_LOCK(sc); 5243291698Savos if (sc->sc_flags & URTWN_RUNNING) { 5244291698Savos URTWN_UNLOCK(sc); 5245291698Savos return (0); 5246291698Savos } 5247264864Skevlo 5248251538Srpaulo /* Init firmware commands ring. */ 5249251538Srpaulo sc->fwcur = 0; 5250251538Srpaulo 5251251538Srpaulo /* Allocate Tx/Rx buffers. */ 5252251538Srpaulo error = urtwn_alloc_rx_list(sc); 5253251538Srpaulo if (error != 0) 5254251538Srpaulo goto fail; 5255281069Srpaulo 5256251538Srpaulo error = urtwn_alloc_tx_list(sc); 5257251538Srpaulo if (error != 0) 5258251538Srpaulo goto fail; 5259251538Srpaulo 5260251538Srpaulo /* Power on adapter. */ 5261251538Srpaulo error = urtwn_power_on(sc); 5262251538Srpaulo if (error != 0) 5263251538Srpaulo goto fail; 5264251538Srpaulo 5265251538Srpaulo /* Initialize DMA. */ 5266251538Srpaulo error = urtwn_dma_init(sc); 5267251538Srpaulo if (error != 0) 5268251538Srpaulo goto fail; 5269251538Srpaulo 5270251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 5271251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 5272251538Srpaulo 5273251538Srpaulo /* Init interrupts. */ 5274264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5275291698Savos usb_err = urtwn_write_4(sc, R88E_HISR, 0xffffffff); 5276291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5277291698Savos goto fail; 5278291698Savos usb_err = urtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | 5279264912Skevlo R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); 5280291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5281291698Savos goto fail; 5282291698Savos usb_err = urtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | 5283264912Skevlo R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); 5284291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5285291698Savos goto fail; 5286291698Savos usb_err = urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5287264912Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5288264912Skevlo R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); 5289291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5290291698Savos goto fail; 5291264912Skevlo } else { 5292291698Savos usb_err = urtwn_write_4(sc, R92C_HISR, 0xffffffff); 5293291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5294291698Savos goto fail; 5295291698Savos usb_err = urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 5296291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5297291698Savos goto fail; 5298264912Skevlo } 5299251538Srpaulo 5300251538Srpaulo /* Set MAC address. */ 5301287197Sglebius IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 5302291698Savos usb_err = urtwn_write_region_1(sc, R92C_MACID, macaddr, IEEE80211_ADDR_LEN); 5303291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5304291698Savos goto fail; 5305251538Srpaulo 5306251538Srpaulo /* Set initial network type. */ 5307289811Savos urtwn_set_mode(sc, R92C_MSR_INFRA); 5308251538Srpaulo 5309290564Savos /* Initialize Rx filter. */ 5310251538Srpaulo urtwn_rxfilter_init(sc); 5311251538Srpaulo 5312282623Skevlo /* Set response rate. */ 5313251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 5314251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 5315251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 5316251538Srpaulo 5317251538Srpaulo /* Set short/long retry limits. */ 5318251538Srpaulo urtwn_write_2(sc, R92C_RL, 5319251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 5320251538Srpaulo 5321251538Srpaulo /* Initialize EDCA parameters. */ 5322251538Srpaulo urtwn_edca_init(sc); 5323251538Srpaulo 5324251538Srpaulo /* Setup rate fallback. */ 5325264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5326264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 5327264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 5328264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 5329264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 5330264912Skevlo } 5331251538Srpaulo 5332251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 5333251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 5334251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 5335251538Srpaulo /* Set ACK timeout. */ 5336251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 5337251538Srpaulo 5338251538Srpaulo /* Setup USB aggregation. */ 5339251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 5340251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 5341251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 5342251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 5343251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 5344251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 5345251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 5346264912Skevlo if (sc->chip & URTWN_CHIP_88E) 5347264912Skevlo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); 5348282266Skevlo else { 5349264912Skevlo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 5350282266Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5351282266Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5352282266Skevlo R92C_USB_SPECIAL_OPTION_AGG_EN); 5353282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 5354282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 5355282266Skevlo } 5356251538Srpaulo 5357251538Srpaulo /* Initialize beacon parameters. */ 5358264912Skevlo urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010); 5359251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 5360251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 5361251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 5362251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 5363251538Srpaulo 5364264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5365264912Skevlo /* Setup AMPDU aggregation. */ 5366264912Skevlo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 5367264912Skevlo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 5368264912Skevlo urtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); 5369251538Srpaulo 5370264912Skevlo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 5371264912Skevlo } 5372251538Srpaulo 5373295871Savos#ifndef URTWN_WITHOUT_UCODE 5374251538Srpaulo /* Load 8051 microcode. */ 5375251538Srpaulo error = urtwn_load_firmware(sc); 5376295871Savos if (error == 0) 5377295871Savos sc->sc_flags |= URTWN_FW_LOADED; 5378295871Savos#endif 5379251538Srpaulo 5380251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 5381291698Savos error = urtwn_mac_init(sc); 5382291698Savos if (error != 0) { 5383291698Savos device_printf(sc->sc_dev, 5384291698Savos "%s: error while initializing MAC block\n", __func__); 5385291698Savos goto fail; 5386291698Savos } 5387251538Srpaulo urtwn_bb_init(sc); 5388251538Srpaulo urtwn_rf_init(sc); 5389251538Srpaulo 5390290564Savos /* Reinitialize Rx filter (D3845 is not committed yet). */ 5391290564Savos urtwn_rxfilter_init(sc); 5392290564Savos 5393264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5394264912Skevlo urtwn_write_2(sc, R92C_CR, 5395264912Skevlo urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN | 5396264912Skevlo R92C_CR_MACRXEN); 5397264912Skevlo } 5398264912Skevlo 5399251538Srpaulo /* Turn CCK and OFDM blocks on. */ 5400251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5401251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 5402291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5403291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5404291698Savos goto fail; 5405251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5406251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 5407291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5408291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5409291698Savos goto fail; 5410251538Srpaulo 5411251538Srpaulo /* Clear per-station keys table. */ 5412251538Srpaulo urtwn_cam_init(sc); 5413251538Srpaulo 5414292175Savos /* Enable decryption / encryption. */ 5415292175Savos urtwn_write_2(sc, R92C_SECCFG, 5416292175Savos R92C_SECCFG_TXUCKEY_DEF | R92C_SECCFG_RXUCKEY_DEF | 5417292175Savos R92C_SECCFG_TXENC_ENA | R92C_SECCFG_RXDEC_ENA | 5418292175Savos R92C_SECCFG_TXBCKEY_DEF | R92C_SECCFG_RXBCKEY_DEF); 5419292175Savos 5420292175Savos /* 5421292175Savos * Install static keys (if any). 5422292175Savos * Must be called after urtwn_cam_init(). 5423292175Savos */ 5424292175Savos ieee80211_runtask(ic, &sc->cmdq_task); 5425292175Savos 5426251538Srpaulo /* Enable hardware sequence numbering. */ 5427293180Savos urtwn_write_1(sc, R92C_HWSEQ_CTRL, R92C_TX_QUEUE_ALL); 5428251538Srpaulo 5429292167Savos /* Enable per-packet TX report. */ 5430292167Savos if (sc->chip & URTWN_CHIP_88E) { 5431292167Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 5432292167Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) | R88E_TX_RPT1_ENA); 5433292167Savos } 5434292167Savos 5435251538Srpaulo /* Perform LO and IQ calibrations. */ 5436251538Srpaulo urtwn_iq_calib(sc); 5437251538Srpaulo /* Perform LC calibration. */ 5438251538Srpaulo urtwn_lc_calib(sc); 5439251538Srpaulo 5440251538Srpaulo /* Fix USB interference issue. */ 5441264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5442264912Skevlo urtwn_write_1(sc, 0xfe40, 0xe0); 5443264912Skevlo urtwn_write_1(sc, 0xfe41, 0x8d); 5444264912Skevlo urtwn_write_1(sc, 0xfe42, 0x80); 5445251538Srpaulo 5446264912Skevlo urtwn_pa_bias_init(sc); 5447264912Skevlo } 5448251538Srpaulo 5449251538Srpaulo /* Initialize GPIO setting. */ 5450251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 5451251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 5452251538Srpaulo 5453251538Srpaulo /* Fix for lower temperature. */ 5454264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 5455264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 5456251538Srpaulo 5457251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 5458251538Srpaulo 5459287197Sglebius sc->sc_flags |= URTWN_RUNNING; 5460251538Srpaulo 5461251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5462251538Srpaulofail: 5463291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5464291698Savos error = EIO; 5465291698Savos 5466291698Savos URTWN_UNLOCK(sc); 5467291698Savos 5468291698Savos return (error); 5469251538Srpaulo} 5470251538Srpaulo 5471251538Srpaulostatic void 5472287197Sglebiusurtwn_stop(struct urtwn_softc *sc) 5473251538Srpaulo{ 5474251538Srpaulo 5475291698Savos URTWN_LOCK(sc); 5476291698Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 5477291698Savos URTWN_UNLOCK(sc); 5478291698Savos return; 5479291698Savos } 5480291698Savos 5481295871Savos sc->sc_flags &= ~(URTWN_RUNNING | URTWN_FW_LOADED | 5482295871Savos URTWN_TEMP_MEASURED); 5483294473Savos sc->thcal_lctemp = 0; 5484251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 5485295874Savos 5486251538Srpaulo urtwn_abort_xfers(sc); 5487288353Sadrian urtwn_drain_mbufq(sc); 5488295874Savos urtwn_power_off(sc); 5489291698Savos URTWN_UNLOCK(sc); 5490251538Srpaulo} 5491251538Srpaulo 5492251538Srpaulostatic void 5493251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 5494251538Srpaulo{ 5495251538Srpaulo int i; 5496251538Srpaulo 5497251538Srpaulo URTWN_ASSERT_LOCKED(sc); 5498251538Srpaulo 5499251538Srpaulo /* abort any pending transfers */ 5500251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 5501251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 5502251538Srpaulo} 5503251538Srpaulo 5504251538Srpaulostatic int 5505251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 5506251538Srpaulo const struct ieee80211_bpf_params *params) 5507251538Srpaulo{ 5508251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 5509286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 5510251538Srpaulo struct urtwn_data *bf; 5511290630Savos int error; 5512251538Srpaulo 5513297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 5514297596Sadrian __func__, 5515297596Sadrian m); 5516297596Sadrian 5517251538Srpaulo /* prevent management frames from being sent if we're not ready */ 5518290630Savos URTWN_LOCK(sc); 5519287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) { 5520290630Savos error = ENETDOWN; 5521290630Savos goto end; 5522251538Srpaulo } 5523290630Savos 5524251538Srpaulo bf = urtwn_getbuf(sc); 5525251538Srpaulo if (bf == NULL) { 5526290630Savos error = ENOBUFS; 5527290630Savos goto end; 5528251538Srpaulo } 5529251538Srpaulo 5530292221Savos if (params == NULL) { 5531292221Savos /* 5532292221Savos * Legacy path; interpret frame contents to decide 5533292221Savos * precisely how to send the frame. 5534292221Savos */ 5535292221Savos error = urtwn_tx_data(sc, ni, m, bf); 5536292221Savos } else { 5537292221Savos /* 5538292221Savos * Caller supplied explicit parameters to use in 5539292221Savos * sending the frame. 5540292221Savos */ 5541292221Savos error = urtwn_tx_raw(sc, ni, m, bf, params); 5542292221Savos } 5543292221Savos if (error != 0) { 5544251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 5545290630Savos goto end; 5546251538Srpaulo } 5547290630Savos 5548288353Sadrian sc->sc_txtimer = 5; 5549290630Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5550290630Savos 5551290630Savosend: 5552290630Savos if (error != 0) 5553290630Savos m_freem(m); 5554290630Savos 5555251538Srpaulo URTWN_UNLOCK(sc); 5556251538Srpaulo 5557290630Savos return (error); 5558251538Srpaulo} 5559251538Srpaulo 5560266472Shselaskystatic void 5561266472Shselaskyurtwn_ms_delay(struct urtwn_softc *sc) 5562266472Shselasky{ 5563266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 1000); 5564266472Shselasky} 5565266472Shselasky 5566251538Srpaulostatic device_method_t urtwn_methods[] = { 5567251538Srpaulo /* Device interface */ 5568251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 5569251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 5570251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 5571251538Srpaulo 5572264912Skevlo DEVMETHOD_END 5573251538Srpaulo}; 5574251538Srpaulo 5575251538Srpaulostatic driver_t urtwn_driver = { 5576251538Srpaulo "urtwn", 5577251538Srpaulo urtwn_methods, 5578251538Srpaulo sizeof(struct urtwn_softc) 5579251538Srpaulo}; 5580251538Srpaulo 5581251538Srpaulostatic devclass_t urtwn_devclass; 5582251538Srpaulo 5583251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 5584251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 5585251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 5586295871Savos#ifndef URTWN_WITHOUT_UCODE 5587251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 5588295871Savos#endif 5589251538SrpauloMODULE_VERSION(urtwn, 1); 5590292080SimpUSB_PNP_HOST_INFO(urtwn_devs); 5591