if_urtwn.c revision 300434
1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5264912Skevlo * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6292176Savos * Copyright (c) 2015 Andriy Voskoboinyk <avos@FreeBSD.org> 7251538Srpaulo * 8251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 9251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 10251538Srpaulo * copyright notice and this permission notice appear in all copies. 11251538Srpaulo * 12251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19251538Srpaulo */ 20251538Srpaulo 21251538Srpaulo#include <sys/cdefs.h> 22251538Srpaulo__FBSDID("$FreeBSD: head/sys/dev/urtwn/if_urtwn.c 300434 2016-05-22 20:12:07Z avos $"); 23251538Srpaulo 24251538Srpaulo/* 25264912Skevlo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU. 26251538Srpaulo */ 27251538Srpaulo 28288353Sadrian#include "opt_wlan.h" 29295871Savos#include "opt_urtwn.h" 30288353Sadrian 31251538Srpaulo#include <sys/param.h> 32251538Srpaulo#include <sys/sockio.h> 33251538Srpaulo#include <sys/sysctl.h> 34251538Srpaulo#include <sys/lock.h> 35251538Srpaulo#include <sys/mutex.h> 36291902Skevlo#include <sys/condvar.h> 37251538Srpaulo#include <sys/mbuf.h> 38251538Srpaulo#include <sys/kernel.h> 39251538Srpaulo#include <sys/socket.h> 40251538Srpaulo#include <sys/systm.h> 41251538Srpaulo#include <sys/malloc.h> 42251538Srpaulo#include <sys/module.h> 43251538Srpaulo#include <sys/bus.h> 44251538Srpaulo#include <sys/endian.h> 45251538Srpaulo#include <sys/linker.h> 46251538Srpaulo#include <sys/firmware.h> 47251538Srpaulo#include <sys/kdb.h> 48251538Srpaulo 49251538Srpaulo#include <machine/bus.h> 50251538Srpaulo#include <machine/resource.h> 51251538Srpaulo#include <sys/rman.h> 52251538Srpaulo 53251538Srpaulo#include <net/bpf.h> 54251538Srpaulo#include <net/if.h> 55257176Sglebius#include <net/if_var.h> 56251538Srpaulo#include <net/if_arp.h> 57251538Srpaulo#include <net/ethernet.h> 58251538Srpaulo#include <net/if_dl.h> 59251538Srpaulo#include <net/if_media.h> 60251538Srpaulo#include <net/if_types.h> 61251538Srpaulo 62251538Srpaulo#include <netinet/in.h> 63251538Srpaulo#include <netinet/in_systm.h> 64251538Srpaulo#include <netinet/in_var.h> 65251538Srpaulo#include <netinet/if_ether.h> 66251538Srpaulo#include <netinet/ip.h> 67251538Srpaulo 68251538Srpaulo#include <net80211/ieee80211_var.h> 69251538Srpaulo#include <net80211/ieee80211_regdomain.h> 70251538Srpaulo#include <net80211/ieee80211_radiotap.h> 71251538Srpaulo#include <net80211/ieee80211_ratectl.h> 72297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 73297596Sadrian#include <net80211/ieee80211_superg.h> 74297596Sadrian#endif 75251538Srpaulo 76251538Srpaulo#include <dev/usb/usb.h> 77251538Srpaulo#include <dev/usb/usbdi.h> 78291902Skevlo#include <dev/usb/usb_device.h> 79251538Srpaulo#include "usbdevs.h" 80251538Srpaulo 81251538Srpaulo#include <dev/usb/usb_debug.h> 82251538Srpaulo 83297058Sadrian#include <dev/urtwn/if_urtwnreg.h> 84297058Sadrian#include <dev/urtwn/if_urtwnvar.h> 85251538Srpaulo 86251538Srpaulo#ifdef USB_DEBUG 87294471Savosenum { 88294471Savos URTWN_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 89294471Savos URTWN_DEBUG_RECV = 0x00000002, /* basic recv operation */ 90294471Savos URTWN_DEBUG_STATE = 0x00000004, /* 802.11 state transitions */ 91294471Savos URTWN_DEBUG_RA = 0x00000008, /* f/w rate adaptation setup */ 92294471Savos URTWN_DEBUG_USB = 0x00000010, /* usb requests */ 93294471Savos URTWN_DEBUG_FIRMWARE = 0x00000020, /* firmware(9) loading debug */ 94294471Savos URTWN_DEBUG_BEACON = 0x00000040, /* beacon handling */ 95294471Savos URTWN_DEBUG_INTR = 0x00000080, /* ISR */ 96294471Savos URTWN_DEBUG_TEMP = 0x00000100, /* temperature calibration */ 97294471Savos URTWN_DEBUG_ROM = 0x00000200, /* various ROM info */ 98294471Savos URTWN_DEBUG_KEY = 0x00000400, /* crypto keys management */ 99294471Savos URTWN_DEBUG_TXPWR = 0x00000800, /* dump Tx power values */ 100297175Sadrian URTWN_DEBUG_RSSI = 0x00001000, /* dump RSSI lookups */ 101294471Savos URTWN_DEBUG_ANY = 0xffffffff 102294471Savos}; 103251538Srpaulo 104294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { \ 105294471Savos if ((_sc)->sc_debug & (_m)) \ 106294471Savos device_printf((_sc)->sc_dev, __VA_ARGS__); \ 107294471Savos} while(0) 108294471Savos 109294471Savos#else 110294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { (void) sc; } while (0) 111251538Srpaulo#endif 112251538Srpaulo 113288088Sadrian#define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 114251538Srpaulo 115297175Sadrianstatic int urtwn_enable_11n = 1; 116297175SadrianTUNABLE_INT("hw.usb.urtwn.enable_11n", &urtwn_enable_11n); 117297175Sadrian 118251538Srpaulo/* various supported device vendors/products */ 119251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 120251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 121264912Skevlo#define URTWN_RTL8188E_DEV(v,p) \ 122264912Skevlo { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTWN_RTL8188E) } 123264912Skevlo#define URTWN_RTL8188E 1 124251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 125251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 126251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 127251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 128266721Skevlo URTWN_DEV(ASUS, USBN10NANO), 129251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 130251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 131251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 132251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 133251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 134251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 135251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 136251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 137251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 138251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 139251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 140251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 141251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 142251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 143251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 144251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 145252196Skevlo URTWN_DEV(DLINK, DWA131B), 146251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 147251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 148251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 149251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 150251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 151251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 152251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 153251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 154251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 155251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 156251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 157251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 158251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 159251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 160251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 161251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 162251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 163251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 164251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 165251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 166251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 167251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 168251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 169282119Skevlo URTWN_DEV(REALTEK, RTL8188CU_3), 170251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 171251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 172251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 173251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 174272410Shselasky URTWN_DEV(REALTEK, RTL8188RU_3), 175251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 176251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 177251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 178251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 179251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 180251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 181251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 182251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 183251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 184264912Skevlo /* URTWN_RTL8188E */ 185295907Skevlo URTWN_RTL8188E_DEV(ABOCOM, RTL8188EU), 186273589Skevlo URTWN_RTL8188E_DEV(DLINK, DWA123D1), 187270191Skevlo URTWN_RTL8188E_DEV(DLINK, DWA125D1), 188273589Skevlo URTWN_RTL8188E_DEV(ELECOM, WDC150SU2M), 189264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188ETV), 190264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188EU), 191264912Skevlo#undef URTWN_RTL8188E_DEV 192251538Srpaulo#undef URTWN_DEV 193251538Srpaulo}; 194251538Srpaulo 195251538Srpaulostatic device_probe_t urtwn_match; 196251538Srpaulostatic device_attach_t urtwn_attach; 197251538Srpaulostatic device_detach_t urtwn_detach; 198251538Srpaulo 199251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 200251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 201251538Srpaulo 202294471Savosstatic void urtwn_sysctlattach(struct urtwn_softc *); 203294471Savosstatic void urtwn_drain_mbufq(struct urtwn_softc *); 204287197Sglebiusstatic usb_error_t urtwn_do_request(struct urtwn_softc *, 205287197Sglebius struct usb_device_request *, void *); 206251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 207251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 208251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 209251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 210251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 211292207Savosstatic struct mbuf * urtwn_rx_copy_to_mbuf(struct urtwn_softc *, 212292207Savos struct r92c_rx_stat *, int); 213292207Savosstatic struct mbuf * urtwn_report_intr(struct usb_xfer *, 214292207Savos struct urtwn_data *); 215292207Savosstatic struct mbuf * urtwn_rxeof(struct urtwn_softc *, uint8_t *, int); 216292167Savosstatic void urtwn_r88e_ratectl_tx_complete(struct urtwn_softc *, 217292167Savos void *); 218292207Savosstatic struct ieee80211_node *urtwn_rx_frame(struct urtwn_softc *, 219292207Savos struct mbuf *, int8_t *); 220289891Savosstatic void urtwn_txeof(struct urtwn_softc *, struct urtwn_data *, 221289891Savos int); 222281069Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 223251538Srpaulo struct urtwn_data[], int, int); 224251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 225251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 226251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 227251538Srpaulo struct urtwn_data data[], int); 228289066Skevlostatic void urtwn_free_rx_list(struct urtwn_softc *); 229289066Skevlostatic void urtwn_free_tx_list(struct urtwn_softc *); 230251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 231251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 232291698Savosstatic usb_error_t urtwn_write_region_1(struct urtwn_softc *, uint16_t, 233251538Srpaulo uint8_t *, int); 234291698Savosstatic usb_error_t urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 235291698Savosstatic usb_error_t urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 236291698Savosstatic usb_error_t urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 237291698Savosstatic usb_error_t urtwn_read_region_1(struct urtwn_softc *, uint16_t, 238251538Srpaulo uint8_t *, int); 239251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 240251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 241251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 242281069Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 243251538Srpaulo const void *, int); 244292174Savosstatic void urtwn_cmdq_cb(void *, int); 245292174Savosstatic int urtwn_cmd_sleepable(struct urtwn_softc *, const void *, 246292174Savos size_t, CMD_FUNC_PROTO); 247264912Skevlostatic void urtwn_r92c_rf_write(struct urtwn_softc *, int, 248264912Skevlo uint8_t, uint32_t); 249281069Srpaulostatic void urtwn_r88e_rf_write(struct urtwn_softc *, int, 250264912Skevlo uint8_t, uint32_t); 251251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 252281069Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 253251538Srpaulo uint32_t); 254291264Savosstatic int urtwn_efuse_read_next(struct urtwn_softc *, uint8_t *); 255291264Savosstatic int urtwn_efuse_read_data(struct urtwn_softc *, uint8_t *, 256291264Savos uint8_t, uint8_t); 257294471Savos#ifdef USB_DEBUG 258291264Savosstatic void urtwn_dump_rom_contents(struct urtwn_softc *, 259291264Savos uint8_t *, uint16_t); 260291264Savos#endif 261291264Savosstatic int urtwn_efuse_read(struct urtwn_softc *, uint8_t *, 262291264Savos uint16_t); 263291698Savosstatic int urtwn_efuse_switch_power(struct urtwn_softc *); 264251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 265291264Savosstatic int urtwn_read_rom(struct urtwn_softc *); 266291264Savosstatic int urtwn_r88e_read_rom(struct urtwn_softc *); 267251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 268290631Savosstatic void urtwn_init_beacon(struct urtwn_softc *, 269290631Savos struct urtwn_vap *); 270290631Savosstatic int urtwn_setup_beacon(struct urtwn_softc *, 271290631Savos struct ieee80211_node *); 272290631Savosstatic void urtwn_update_beacon(struct ieee80211vap *, int); 273290631Savosstatic int urtwn_tx_beacon(struct urtwn_softc *sc, 274290631Savos struct urtwn_vap *); 275292175Savosstatic int urtwn_key_alloc(struct ieee80211vap *, 276292175Savos struct ieee80211_key *, ieee80211_keyix *, 277292175Savos ieee80211_keyix *); 278292175Savosstatic void urtwn_key_set_cb(struct urtwn_softc *, 279292175Savos union sec_param *); 280292175Savosstatic void urtwn_key_del_cb(struct urtwn_softc *, 281292175Savos union sec_param *); 282292175Savosstatic int urtwn_key_set(struct ieee80211vap *, 283292175Savos const struct ieee80211_key *); 284292175Savosstatic int urtwn_key_delete(struct ieee80211vap *, 285292175Savos const struct ieee80211_key *); 286290651Savosstatic void urtwn_tsf_task_adhoc(void *, int); 287290631Savosstatic void urtwn_tsf_sync_enable(struct urtwn_softc *, 288290631Savos struct ieee80211vap *); 289292203Savosstatic void urtwn_get_tsf(struct urtwn_softc *, uint64_t *); 290251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 291289811Savosstatic void urtwn_set_mode(struct urtwn_softc *, uint8_t); 292290651Savosstatic void urtwn_ibss_recv_mgmt(struct ieee80211_node *, 293290651Savos struct mbuf *, int, 294290651Savos const struct ieee80211_rx_stats *, int, int); 295281069Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 296251538Srpaulo enum ieee80211_state, int); 297294473Savosstatic void urtwn_calib_to(void *); 298294473Savosstatic void urtwn_calib_cb(struct urtwn_softc *, 299294473Savos union sec_param *); 300251538Srpaulostatic void urtwn_watchdog(void *); 301251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 302251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 303264912Skevlostatic int8_t urtwn_r88e_get_rssi(struct urtwn_softc *, int, void *); 304290630Savosstatic int urtwn_tx_data(struct urtwn_softc *, 305251538Srpaulo struct ieee80211_node *, struct mbuf *, 306251538Srpaulo struct urtwn_data *); 307292221Savosstatic int urtwn_tx_raw(struct urtwn_softc *, 308292221Savos struct ieee80211_node *, struct mbuf *, 309292221Savos struct urtwn_data *, 310292221Savos const struct ieee80211_bpf_params *); 311290630Savosstatic void urtwn_tx_start(struct urtwn_softc *, struct mbuf *, 312290630Savos uint8_t, struct urtwn_data *); 313287197Sglebiusstatic int urtwn_transmit(struct ieee80211com *, struct mbuf *); 314287197Sglebiusstatic void urtwn_start(struct urtwn_softc *); 315287197Sglebiusstatic void urtwn_parent(struct ieee80211com *); 316264912Skevlostatic int urtwn_r92c_power_on(struct urtwn_softc *); 317264912Skevlostatic int urtwn_r88e_power_on(struct urtwn_softc *); 318295874Savosstatic void urtwn_r92c_power_off(struct urtwn_softc *); 319295874Savosstatic void urtwn_r88e_power_off(struct urtwn_softc *); 320251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 321295871Savos#ifndef URTWN_WITHOUT_UCODE 322251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 323264912Skevlostatic void urtwn_r88e_fw_reset(struct urtwn_softc *); 324281069Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 325251538Srpaulo const uint8_t *, int); 326251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 327295871Savos#endif 328291902Skevlostatic int urtwn_dma_init(struct urtwn_softc *); 329291698Savosstatic int urtwn_mac_init(struct urtwn_softc *); 330251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 331251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 332251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 333292175Savosstatic int urtwn_cam_write(struct urtwn_softc *, uint32_t, 334292175Savos uint32_t); 335251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 336251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 337251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 338281069Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 339251538Srpaulo uint16_t[]); 340251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 341281069Srpaulo struct ieee80211_channel *, 342251538Srpaulo struct ieee80211_channel *, uint16_t[]); 343264912Skevlostatic void urtwn_r88e_get_txpower(struct urtwn_softc *, int, 344281069Srpaulo struct ieee80211_channel *, 345264912Skevlo struct ieee80211_channel *, uint16_t[]); 346251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 347281069Srpaulo struct ieee80211_channel *, 348251538Srpaulo struct ieee80211_channel *); 349290048Savosstatic void urtwn_set_rx_bssid_all(struct urtwn_softc *, int); 350290048Savosstatic void urtwn_set_gain(struct urtwn_softc *, uint8_t); 351251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 352251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 353251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 354292014Savosstatic int urtwn_wme_update(struct ieee80211com *); 355294465Savosstatic void urtwn_update_slot(struct ieee80211com *); 356294465Savosstatic void urtwn_update_slot_cb(struct urtwn_softc *, 357294465Savos union sec_param *); 358294465Savosstatic void urtwn_update_aifs(struct urtwn_softc *, uint8_t); 359299965Savosstatic uint8_t urtwn_get_multi_pos(const uint8_t[]); 360299965Savosstatic void urtwn_set_multi(struct urtwn_softc *); 361290564Savosstatic void urtwn_set_promisc(struct urtwn_softc *); 362290564Savosstatic void urtwn_update_promisc(struct ieee80211com *); 363289066Skevlostatic void urtwn_update_mcast(struct ieee80211com *); 364297910Sadrianstatic struct ieee80211_node *urtwn_node_alloc(struct ieee80211vap *, 365292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]); 366297910Sadrianstatic void urtwn_newassoc(struct ieee80211_node *, int); 367297910Sadrianstatic void urtwn_node_free(struct ieee80211_node *); 368251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 369281069Srpaulo struct ieee80211_channel *, 370251538Srpaulo struct ieee80211_channel *); 371251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 372251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 373294473Savosstatic void urtwn_temp_calib(struct urtwn_softc *); 374291698Savosstatic int urtwn_init(struct urtwn_softc *); 375287197Sglebiusstatic void urtwn_stop(struct urtwn_softc *); 376251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 377251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 378251538Srpaulo const struct ieee80211_bpf_params *); 379266472Shselaskystatic void urtwn_ms_delay(struct urtwn_softc *); 380251538Srpaulo 381251538Srpaulo/* Aliases. */ 382251538Srpaulo#define urtwn_bb_write urtwn_write_4 383251538Srpaulo#define urtwn_bb_read urtwn_read_4 384251538Srpaulo 385251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 386251538Srpaulo [URTWN_BULK_RX] = { 387251538Srpaulo .type = UE_BULK, 388251538Srpaulo .endpoint = UE_ADDR_ANY, 389251538Srpaulo .direction = UE_DIR_IN, 390251538Srpaulo .bufsize = URTWN_RXBUFSZ, 391251538Srpaulo .flags = { 392251538Srpaulo .pipe_bof = 1, 393251538Srpaulo .short_xfer_ok = 1 394251538Srpaulo }, 395251538Srpaulo .callback = urtwn_bulk_rx_callback, 396251538Srpaulo }, 397251538Srpaulo [URTWN_BULK_TX_BE] = { 398251538Srpaulo .type = UE_BULK, 399251538Srpaulo .endpoint = 0x03, 400251538Srpaulo .direction = UE_DIR_OUT, 401251538Srpaulo .bufsize = URTWN_TXBUFSZ, 402251538Srpaulo .flags = { 403251538Srpaulo .ext_buffer = 1, 404251538Srpaulo .pipe_bof = 1, 405251538Srpaulo .force_short_xfer = 1 406251538Srpaulo }, 407251538Srpaulo .callback = urtwn_bulk_tx_callback, 408251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 409251538Srpaulo }, 410251538Srpaulo [URTWN_BULK_TX_BK] = { 411251538Srpaulo .type = UE_BULK, 412251538Srpaulo .endpoint = 0x03, 413251538Srpaulo .direction = UE_DIR_OUT, 414251538Srpaulo .bufsize = URTWN_TXBUFSZ, 415251538Srpaulo .flags = { 416251538Srpaulo .ext_buffer = 1, 417251538Srpaulo .pipe_bof = 1, 418251538Srpaulo .force_short_xfer = 1, 419251538Srpaulo }, 420251538Srpaulo .callback = urtwn_bulk_tx_callback, 421251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 422251538Srpaulo }, 423251538Srpaulo [URTWN_BULK_TX_VI] = { 424251538Srpaulo .type = UE_BULK, 425251538Srpaulo .endpoint = 0x02, 426251538Srpaulo .direction = UE_DIR_OUT, 427251538Srpaulo .bufsize = URTWN_TXBUFSZ, 428251538Srpaulo .flags = { 429251538Srpaulo .ext_buffer = 1, 430251538Srpaulo .pipe_bof = 1, 431251538Srpaulo .force_short_xfer = 1 432251538Srpaulo }, 433251538Srpaulo .callback = urtwn_bulk_tx_callback, 434251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 435251538Srpaulo }, 436251538Srpaulo [URTWN_BULK_TX_VO] = { 437251538Srpaulo .type = UE_BULK, 438251538Srpaulo .endpoint = 0x02, 439251538Srpaulo .direction = UE_DIR_OUT, 440251538Srpaulo .bufsize = URTWN_TXBUFSZ, 441251538Srpaulo .flags = { 442251538Srpaulo .ext_buffer = 1, 443251538Srpaulo .pipe_bof = 1, 444251538Srpaulo .force_short_xfer = 1 445251538Srpaulo }, 446251538Srpaulo .callback = urtwn_bulk_tx_callback, 447251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 448251538Srpaulo }, 449251538Srpaulo}; 450251538Srpaulo 451292014Savosstatic const struct wme_to_queue { 452292014Savos uint16_t reg; 453292014Savos uint8_t qid; 454292014Savos} wme2queue[WME_NUM_AC] = { 455292014Savos { R92C_EDCA_BE_PARAM, URTWN_BULK_TX_BE}, 456292014Savos { R92C_EDCA_BK_PARAM, URTWN_BULK_TX_BK}, 457292014Savos { R92C_EDCA_VI_PARAM, URTWN_BULK_TX_VI}, 458292014Savos { R92C_EDCA_VO_PARAM, URTWN_BULK_TX_VO} 459292014Savos}; 460292014Savos 461251538Srpaulostatic int 462251538Srpaulourtwn_match(device_t self) 463251538Srpaulo{ 464251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 465251538Srpaulo 466251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 467251538Srpaulo return (ENXIO); 468251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 469251538Srpaulo return (ENXIO); 470251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 471251538Srpaulo return (ENXIO); 472251538Srpaulo 473251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 474251538Srpaulo} 475251538Srpaulo 476297175Sadrianstatic void 477297175Sadrianurtwn_update_chw(struct ieee80211com *ic) 478297175Sadrian{ 479297175Sadrian} 480297175Sadrian 481251538Srpaulostatic int 482297175Sadrianurtwn_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 483297175Sadrian{ 484297175Sadrian 485297175Sadrian /* We're driving this ourselves (eventually); don't involve net80211 */ 486297175Sadrian return (0); 487297175Sadrian} 488297175Sadrian 489297175Sadrianstatic int 490251538Srpaulourtwn_attach(device_t self) 491251538Srpaulo{ 492251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 493251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 494287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 495298818Savos uint8_t bands[IEEE80211_MODE_BYTES]; 496251538Srpaulo int error; 497251538Srpaulo 498251538Srpaulo device_set_usb_desc(self); 499251538Srpaulo sc->sc_udev = uaa->device; 500251538Srpaulo sc->sc_dev = self; 501264912Skevlo if (USB_GET_DRIVER_INFO(uaa) == URTWN_RTL8188E) 502264912Skevlo sc->chip |= URTWN_CHIP_88E; 503251538Srpaulo 504294471Savos#ifdef USB_DEBUG 505294471Savos int debug; 506294471Savos if (resource_int_value(device_get_name(sc->sc_dev), 507294471Savos device_get_unit(sc->sc_dev), "debug", &debug) == 0) 508294471Savos sc->sc_debug = debug; 509294471Savos#endif 510294471Savos 511251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 512251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 513292174Savos URTWN_CMDQ_LOCK_INIT(sc); 514292167Savos URTWN_NT_LOCK_INIT(sc); 515294473Savos callout_init(&sc->sc_calib_to, 0); 516251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 517287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 518251538Srpaulo 519291902Skevlo sc->sc_iface_index = URTWN_IFACE_INDEX; 520291902Skevlo error = usbd_transfer_setup(uaa->device, &sc->sc_iface_index, 521291902Skevlo sc->sc_xfer, urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 522251538Srpaulo if (error) { 523251538Srpaulo device_printf(self, "could not allocate USB transfers, " 524251538Srpaulo "err=%s\n", usbd_errstr(error)); 525251538Srpaulo goto detach; 526251538Srpaulo } 527251538Srpaulo 528251538Srpaulo URTWN_LOCK(sc); 529251538Srpaulo 530251538Srpaulo error = urtwn_read_chipid(sc); 531251538Srpaulo if (error) { 532251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 533251538Srpaulo URTWN_UNLOCK(sc); 534251538Srpaulo goto detach; 535251538Srpaulo } 536251538Srpaulo 537251538Srpaulo /* Determine number of Tx/Rx chains. */ 538251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 539251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 540251538Srpaulo sc->nrxchains = 2; 541251538Srpaulo } else { 542251538Srpaulo sc->ntxchains = 1; 543251538Srpaulo sc->nrxchains = 1; 544251538Srpaulo } 545251538Srpaulo 546264912Skevlo if (sc->chip & URTWN_CHIP_88E) 547291264Savos error = urtwn_r88e_read_rom(sc); 548264912Skevlo else 549291264Savos error = urtwn_read_rom(sc); 550291264Savos if (error != 0) { 551291264Savos device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", 552291264Savos __func__, error); 553291264Savos URTWN_UNLOCK(sc); 554291264Savos goto detach; 555291264Savos } 556264912Skevlo 557251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 558251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 559264912Skevlo (sc->chip & URTWN_CHIP_88E) ? "8188EU" : 560251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 561251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 562251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 563251538Srpaulo 564251538Srpaulo URTWN_UNLOCK(sc); 565251538Srpaulo 566283537Sglebius ic->ic_softc = sc; 567283527Sglebius ic->ic_name = device_get_nameunit(self); 568251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 569251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 570251538Srpaulo 571251538Srpaulo /* set device capabilities */ 572251538Srpaulo ic->ic_caps = 573251538Srpaulo IEEE80211_C_STA /* station mode */ 574251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 575290651Savos | IEEE80211_C_IBSS /* adhoc mode */ 576290631Savos | IEEE80211_C_HOSTAP /* hostap mode */ 577251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 578251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 579297175Sadrian#if 0 580251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 581297175Sadrian#endif 582251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 583292014Savos | IEEE80211_C_WME /* 802.11e */ 584297596Sadrian | IEEE80211_C_SWAMSDUTX /* Do software A-MSDU TX */ 585297596Sadrian | IEEE80211_C_FF /* Atheros fast-frames */ 586251538Srpaulo ; 587251538Srpaulo 588292175Savos ic->ic_cryptocaps = 589292175Savos IEEE80211_CRYPTO_WEP | 590292175Savos IEEE80211_CRYPTO_TKIP | 591292175Savos IEEE80211_CRYPTO_AES_CCM; 592292175Savos 593297175Sadrian /* Assume they're all 11n capable for now */ 594297175Sadrian if (urtwn_enable_11n) { 595297175Sadrian device_printf(self, "enabling 11n\n"); 596297175Sadrian ic->ic_htcaps = IEEE80211_HTC_HT | 597297601Sadrian#if 0 598297175Sadrian IEEE80211_HTC_AMPDU | 599297601Sadrian#endif 600297175Sadrian IEEE80211_HTC_AMSDU | 601297175Sadrian IEEE80211_HTCAP_MAXAMSDU_3839 | 602297175Sadrian IEEE80211_HTCAP_SMPS_OFF; 603297175Sadrian /* no HT40 just yet */ 604297175Sadrian // ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 605297175Sadrian 606297175Sadrian /* XXX TODO: verify chains versus streams for urtwn */ 607297175Sadrian ic->ic_txstream = sc->ntxchains; 608297175Sadrian ic->ic_rxstream = sc->nrxchains; 609297175Sadrian } 610297175Sadrian 611293339Savos memset(bands, 0, sizeof(bands)); 612293339Savos setbit(bands, IEEE80211_MODE_11B); 613293339Savos setbit(bands, IEEE80211_MODE_11G); 614297175Sadrian if (urtwn_enable_11n) 615297175Sadrian setbit(bands, IEEE80211_MODE_11NG); 616293339Savos ieee80211_init_channels(ic, NULL, bands); 617251538Srpaulo 618287197Sglebius ieee80211_ifattach(ic); 619251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 620251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 621251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 622251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 623287197Sglebius ic->ic_transmit = urtwn_transmit; 624287197Sglebius ic->ic_parent = urtwn_parent; 625251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 626251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 627292014Savos ic->ic_wme.wme_update = urtwn_wme_update; 628294465Savos ic->ic_updateslot = urtwn_update_slot; 629290564Savos ic->ic_update_promisc = urtwn_update_promisc; 630251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 631292167Savos if (sc->chip & URTWN_CHIP_88E) { 632297910Sadrian ic->ic_node_alloc = urtwn_node_alloc; 633297910Sadrian ic->ic_newassoc = urtwn_newassoc; 634292167Savos sc->sc_node_free = ic->ic_node_free; 635297910Sadrian ic->ic_node_free = urtwn_node_free; 636292167Savos } 637297175Sadrian ic->ic_update_chw = urtwn_update_chw; 638297175Sadrian ic->ic_ampdu_enable = urtwn_ampdu_enable; 639251538Srpaulo 640281069Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 641251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 642251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 643251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 644251538Srpaulo 645292174Savos TASK_INIT(&sc->cmdq_task, 0, urtwn_cmdq_cb, sc); 646292174Savos 647294471Savos urtwn_sysctlattach(sc); 648294471Savos 649251538Srpaulo if (bootverbose) 650251538Srpaulo ieee80211_announce(ic); 651251538Srpaulo 652251538Srpaulo return (0); 653251538Srpaulo 654251538Srpaulodetach: 655251538Srpaulo urtwn_detach(self); 656251538Srpaulo return (ENXIO); /* failure */ 657251538Srpaulo} 658251538Srpaulo 659294471Savosstatic void 660294471Savosurtwn_sysctlattach(struct urtwn_softc *sc) 661294471Savos{ 662294471Savos#ifdef USB_DEBUG 663294471Savos struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 664294471Savos struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 665294471Savos 666294471Savos SYSCTL_ADD_U32(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 667294471Savos "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug, 668294471Savos "control debugging printfs"); 669294471Savos#endif 670294471Savos} 671294471Savos 672251538Srpaulostatic int 673251538Srpaulourtwn_detach(device_t self) 674251538Srpaulo{ 675251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 676287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 677263153Skevlo unsigned int x; 678281069Srpaulo 679263153Skevlo /* Prevent further ioctls. */ 680263153Skevlo URTWN_LOCK(sc); 681263153Skevlo sc->sc_flags |= URTWN_DETACHED; 682263153Skevlo URTWN_UNLOCK(sc); 683251538Srpaulo 684291698Savos urtwn_stop(sc); 685291698Savos 686251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 687294473Savos callout_drain(&sc->sc_calib_to); 688251538Srpaulo 689288353Sadrian /* stop all USB transfers */ 690288353Sadrian usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 691288353Sadrian 692263153Skevlo /* Prevent further allocations from RX/TX data lists. */ 693263153Skevlo URTWN_LOCK(sc); 694263153Skevlo STAILQ_INIT(&sc->sc_tx_active); 695263153Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 696263153Skevlo STAILQ_INIT(&sc->sc_tx_pending); 697263153Skevlo 698263153Skevlo STAILQ_INIT(&sc->sc_rx_active); 699263153Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 700263153Skevlo URTWN_UNLOCK(sc); 701263153Skevlo 702263153Skevlo /* drain USB transfers */ 703263153Skevlo for (x = 0; x != URTWN_N_TRANSFER; x++) 704263153Skevlo usbd_transfer_drain(sc->sc_xfer[x]); 705263153Skevlo 706263153Skevlo /* Free data buffers. */ 707263153Skevlo URTWN_LOCK(sc); 708263153Skevlo urtwn_free_tx_list(sc); 709263153Skevlo urtwn_free_rx_list(sc); 710263153Skevlo URTWN_UNLOCK(sc); 711263153Skevlo 712292174Savos if (ic->ic_softc == sc) { 713292174Savos ieee80211_draintask(ic, &sc->cmdq_task); 714292174Savos ieee80211_ifdetach(ic); 715292174Savos } 716292174Savos 717292167Savos URTWN_NT_LOCK_DESTROY(sc); 718292174Savos URTWN_CMDQ_LOCK_DESTROY(sc); 719251538Srpaulo mtx_destroy(&sc->sc_mtx); 720251538Srpaulo 721251538Srpaulo return (0); 722251538Srpaulo} 723251538Srpaulo 724251538Srpaulostatic void 725289066Skevlourtwn_drain_mbufq(struct urtwn_softc *sc) 726251538Srpaulo{ 727289066Skevlo struct mbuf *m; 728289066Skevlo struct ieee80211_node *ni; 729289066Skevlo URTWN_ASSERT_LOCKED(sc); 730289066Skevlo while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 731289066Skevlo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 732289066Skevlo m->m_pkthdr.rcvif = NULL; 733289066Skevlo ieee80211_free_node(ni); 734289066Skevlo m_freem(m); 735251538Srpaulo } 736251538Srpaulo} 737251538Srpaulo 738251538Srpaulostatic usb_error_t 739251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 740251538Srpaulo void *data) 741251538Srpaulo{ 742251538Srpaulo usb_error_t err; 743251538Srpaulo int ntries = 10; 744251538Srpaulo 745251538Srpaulo URTWN_ASSERT_LOCKED(sc); 746251538Srpaulo 747251538Srpaulo while (ntries--) { 748251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 749251538Srpaulo req, data, 0, NULL, 250 /* ms */); 750251538Srpaulo if (err == 0) 751251538Srpaulo break; 752251538Srpaulo 753294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_USB, 754294471Savos "%s: control request failed, %s (retries left: %d)\n", 755294471Savos __func__, usbd_errstr(err), ntries); 756251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 757251538Srpaulo } 758251538Srpaulo return (err); 759251538Srpaulo} 760251538Srpaulo 761251538Srpaulostatic struct ieee80211vap * 762251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 763251538Srpaulo enum ieee80211_opmode opmode, int flags, 764251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 765251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 766251538Srpaulo{ 767290631Savos struct urtwn_softc *sc = ic->ic_softc; 768251538Srpaulo struct urtwn_vap *uvp; 769251538Srpaulo struct ieee80211vap *vap; 770251538Srpaulo 771251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 772251538Srpaulo return (NULL); 773251538Srpaulo 774287197Sglebius uvp = malloc(sizeof(struct urtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); 775251538Srpaulo vap = &uvp->vap; 776251538Srpaulo /* enable s/w bmiss handling for sta mode */ 777251538Srpaulo 778281069Srpaulo if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 779287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 780257743Shselasky /* out of memory */ 781257743Shselasky free(uvp, M_80211_VAP); 782257743Shselasky return (NULL); 783257743Shselasky } 784257743Shselasky 785290651Savos if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) 786290631Savos urtwn_init_beacon(sc, uvp); 787290631Savos 788251538Srpaulo /* override state transition machine */ 789251538Srpaulo uvp->newstate = vap->iv_newstate; 790251538Srpaulo vap->iv_newstate = urtwn_newstate; 791290631Savos vap->iv_update_beacon = urtwn_update_beacon; 792292175Savos vap->iv_key_alloc = urtwn_key_alloc; 793292175Savos vap->iv_key_set = urtwn_key_set; 794292175Savos vap->iv_key_delete = urtwn_key_delete; 795298138Sadrian 796298138Sadrian /* 802.11n parameters */ 797298138Sadrian vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16; 798298175Sadrian vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_64K; 799298138Sadrian 800290651Savos if (opmode == IEEE80211_M_IBSS) { 801290651Savos uvp->recv_mgmt = vap->iv_recv_mgmt; 802290651Savos vap->iv_recv_mgmt = urtwn_ibss_recv_mgmt; 803290651Savos TASK_INIT(&uvp->tsf_task_adhoc, 0, urtwn_tsf_task_adhoc, vap); 804290651Savos } 805251538Srpaulo 806292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 807292167Savos ieee80211_ratectl_init(vap); 808251538Srpaulo /* complete setup */ 809251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 810287197Sglebius ieee80211_media_status, mac); 811251538Srpaulo ic->ic_opmode = opmode; 812251538Srpaulo return (vap); 813251538Srpaulo} 814251538Srpaulo 815251538Srpaulostatic void 816251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 817251538Srpaulo{ 818290651Savos struct ieee80211com *ic = vap->iv_ic; 819292167Savos struct urtwn_softc *sc = ic->ic_softc; 820251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 821251538Srpaulo 822290651Savos if (uvp->bcn_mbuf != NULL) 823290651Savos m_freem(uvp->bcn_mbuf); 824290651Savos if (vap->iv_opmode == IEEE80211_M_IBSS) 825290651Savos ieee80211_draintask(ic, &uvp->tsf_task_adhoc); 826292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 827292167Savos ieee80211_ratectl_deinit(vap); 828251538Srpaulo ieee80211_vap_detach(vap); 829251538Srpaulo free(uvp, M_80211_VAP); 830251538Srpaulo} 831251538Srpaulo 832251538Srpaulostatic struct mbuf * 833292207Savosurtwn_rx_copy_to_mbuf(struct urtwn_softc *sc, struct r92c_rx_stat *stat, 834292207Savos int totlen) 835251538Srpaulo{ 836287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 837251538Srpaulo struct mbuf *m; 838292207Savos uint32_t rxdw0; 839292207Savos int pktlen; 840251538Srpaulo 841251538Srpaulo /* 842251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 843251538Srpaulo * RUNNING. 844251538Srpaulo */ 845287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) 846251538Srpaulo return (NULL); 847251538Srpaulo 848251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 849251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 850251538Srpaulo /* 851251538Srpaulo * This should not happen since we setup our Rx filter 852251538Srpaulo * to not receive these frames. 853251538Srpaulo */ 854294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 855294471Savos "%s: RX flags error (%s)\n", __func__, 856292207Savos rxdw0 & R92C_RXDW0_CRCERR ? "CRC" : "ICV"); 857292207Savos goto fail; 858251538Srpaulo } 859292207Savos 860292207Savos pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 861292207Savos if (pktlen < sizeof(struct ieee80211_frame_ack)) { 862294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 863294471Savos "%s: frame is too short: %d\n", __func__, pktlen); 864292207Savos goto fail; 865271303Skevlo } 866251538Srpaulo 867292207Savos if (__predict_false(totlen > MCLBYTES)) { 868292207Savos /* convert to m_getjcl if this happens */ 869292207Savos device_printf(sc->sc_dev, "%s: frame too long: %d (%d)\n", 870292207Savos __func__, pktlen, totlen); 871292207Savos goto fail; 872251538Srpaulo } 873251538Srpaulo 874260463Skevlo m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 875292207Savos if (__predict_false(m == NULL)) { 876292207Savos device_printf(sc->sc_dev, "%s: could not allocate RX mbuf\n", 877292207Savos __func__); 878292207Savos goto fail; 879251538Srpaulo } 880251538Srpaulo 881251538Srpaulo /* Finalize mbuf. */ 882292207Savos memcpy(mtod(m, uint8_t *), (uint8_t *)stat, totlen); 883292207Savos m->m_pkthdr.len = m->m_len = totlen; 884292207Savos 885251538Srpaulo return (m); 886292207Savosfail: 887292207Savos counter_u64_add(ic->ic_ierrors, 1); 888292207Savos return (NULL); 889251538Srpaulo} 890251538Srpaulo 891251538Srpaulostatic struct mbuf * 892292207Savosurtwn_report_intr(struct usb_xfer *xfer, struct urtwn_data *data) 893251538Srpaulo{ 894251538Srpaulo struct urtwn_softc *sc = data->sc; 895287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 896251538Srpaulo struct r92c_rx_stat *stat; 897251538Srpaulo uint8_t *buf; 898292167Savos int len; 899251538Srpaulo 900251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 901251538Srpaulo 902251538Srpaulo if (len < sizeof(*stat)) { 903287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 904251538Srpaulo return (NULL); 905251538Srpaulo } 906251538Srpaulo 907251538Srpaulo buf = data->buf; 908292167Savos stat = (struct r92c_rx_stat *)buf; 909292167Savos 910297596Sadrian /* 911297596Sadrian * For 88E chips we can tie the FF flushing here; 912297596Sadrian * this is where we do know exactly how deep the 913297596Sadrian * transmit queue is. 914297596Sadrian * 915297596Sadrian * But it won't work for R92 chips, so we can't 916297596Sadrian * take the easy way out. 917297596Sadrian */ 918297596Sadrian 919292167Savos if (sc->chip & URTWN_CHIP_88E) { 920292167Savos int report_sel = MS(le32toh(stat->rxdw3), R88E_RXDW3_RPT); 921292167Savos 922292167Savos switch (report_sel) { 923292167Savos case R88E_RXDW3_RPT_RX: 924292207Savos return (urtwn_rxeof(sc, buf, len)); 925292167Savos case R88E_RXDW3_RPT_TX1: 926292167Savos urtwn_r88e_ratectl_tx_complete(sc, &stat[1]); 927292167Savos break; 928292167Savos default: 929294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, 930294471Savos "%s: case %d was not handled\n", __func__, 931294471Savos report_sel); 932292167Savos break; 933292167Savos } 934292167Savos } else 935292207Savos return (urtwn_rxeof(sc, buf, len)); 936292167Savos 937292167Savos return (NULL); 938292167Savos} 939292167Savos 940292167Savosstatic struct mbuf * 941292207Savosurtwn_rxeof(struct urtwn_softc *sc, uint8_t *buf, int len) 942292167Savos{ 943292167Savos struct r92c_rx_stat *stat; 944292167Savos struct mbuf *m, *m0 = NULL, *prevm = NULL; 945292167Savos uint32_t rxdw0; 946292167Savos int totlen, pktlen, infosz, npkts; 947292167Savos 948251538Srpaulo /* Get the number of encapsulated frames. */ 949251538Srpaulo stat = (struct r92c_rx_stat *)buf; 950251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 951294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 952294471Savos "%s: Rx %d frames in one chunk\n", __func__, npkts); 953251538Srpaulo 954251538Srpaulo /* Process all of them. */ 955251538Srpaulo while (npkts-- > 0) { 956251538Srpaulo if (len < sizeof(*stat)) 957251538Srpaulo break; 958251538Srpaulo stat = (struct r92c_rx_stat *)buf; 959251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 960251538Srpaulo 961251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 962251538Srpaulo if (pktlen == 0) 963251538Srpaulo break; 964251538Srpaulo 965251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 966251538Srpaulo 967251538Srpaulo /* Make sure everything fits in xfer. */ 968251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 969251538Srpaulo if (totlen > len) 970251538Srpaulo break; 971251538Srpaulo 972292207Savos m = urtwn_rx_copy_to_mbuf(sc, stat, totlen); 973251538Srpaulo if (m0 == NULL) 974251538Srpaulo m0 = m; 975251538Srpaulo if (prevm == NULL) 976251538Srpaulo prevm = m; 977251538Srpaulo else { 978251538Srpaulo prevm->m_next = m; 979251538Srpaulo prevm = m; 980251538Srpaulo } 981251538Srpaulo 982251538Srpaulo /* Next chunk is 128-byte aligned. */ 983251538Srpaulo totlen = (totlen + 127) & ~127; 984251538Srpaulo buf += totlen; 985251538Srpaulo len -= totlen; 986251538Srpaulo } 987251538Srpaulo 988251538Srpaulo return (m0); 989251538Srpaulo} 990251538Srpaulo 991251538Srpaulostatic void 992292167Savosurtwn_r88e_ratectl_tx_complete(struct urtwn_softc *sc, void *arg) 993292167Savos{ 994292167Savos struct r88e_tx_rpt_ccx *rpt = arg; 995292167Savos struct ieee80211vap *vap; 996292167Savos struct ieee80211_node *ni; 997292167Savos uint8_t macid; 998292167Savos int ntries; 999292167Savos 1000292167Savos macid = MS(rpt->rptb1, R88E_RPTB1_MACID); 1001292167Savos ntries = MS(rpt->rptb2, R88E_RPTB2_RETRY_CNT); 1002292167Savos 1003292167Savos URTWN_NT_LOCK(sc); 1004292167Savos ni = sc->node_list[macid]; 1005292167Savos if (ni != NULL) { 1006292167Savos vap = ni->ni_vap; 1007294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: frame for macid %d was" 1008294471Savos "%s sent (%d retries)\n", __func__, macid, 1009294471Savos (rpt->rptb1 & R88E_RPTB1_PKT_OK) ? "" : " not", 1010294471Savos ntries); 1011292167Savos 1012292167Savos if (rpt->rptb1 & R88E_RPTB1_PKT_OK) { 1013292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1014292167Savos IEEE80211_RATECTL_TX_SUCCESS, &ntries, NULL); 1015292167Savos } else { 1016292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1017292167Savos IEEE80211_RATECTL_TX_FAILURE, &ntries, NULL); 1018292167Savos } 1019294471Savos } else { 1020294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: macid %d, ni is NULL\n", 1021294471Savos __func__, macid); 1022294471Savos } 1023292167Savos URTWN_NT_UNLOCK(sc); 1024292167Savos} 1025292167Savos 1026292207Savosstatic struct ieee80211_node * 1027292207Savosurtwn_rx_frame(struct urtwn_softc *sc, struct mbuf *m, int8_t *rssi_p) 1028292207Savos{ 1029292207Savos struct ieee80211com *ic = &sc->sc_ic; 1030292207Savos struct ieee80211_frame_min *wh; 1031292207Savos struct r92c_rx_stat *stat; 1032292207Savos uint32_t rxdw0, rxdw3; 1033292207Savos uint8_t rate, cipher; 1034297910Sadrian int8_t rssi = -127; 1035292207Savos int infosz; 1036292207Savos 1037292207Savos stat = mtod(m, struct r92c_rx_stat *); 1038292207Savos rxdw0 = le32toh(stat->rxdw0); 1039292207Savos rxdw3 = le32toh(stat->rxdw3); 1040292207Savos 1041292207Savos rate = MS(rxdw3, R92C_RXDW3_RATE); 1042292207Savos cipher = MS(rxdw0, R92C_RXDW0_CIPHER); 1043292207Savos infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 1044292207Savos 1045292207Savos /* Get RSSI from PHY status descriptor if present. */ 1046292207Savos if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 1047292207Savos if (sc->chip & URTWN_CHIP_88E) 1048292207Savos rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]); 1049292207Savos else 1050292207Savos rssi = urtwn_get_rssi(sc, rate, &stat[1]); 1051297910Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: rssi=%d\n", __func__, rssi); 1052292207Savos /* Update our average RSSI. */ 1053292207Savos urtwn_update_avgrssi(sc, rate, rssi); 1054292207Savos } 1055292207Savos 1056292207Savos if (ieee80211_radiotap_active(ic)) { 1057292207Savos struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 1058292207Savos 1059292207Savos tap->wr_flags = 0; 1060292207Savos 1061292207Savos urtwn_get_tsf(sc, &tap->wr_tsft); 1062292207Savos if (__predict_false(le32toh((uint32_t)tap->wr_tsft) < 1063292207Savos le32toh(stat->rxdw5))) { 1064292207Savos tap->wr_tsft = le32toh(tap->wr_tsft >> 32) - 1; 1065292207Savos tap->wr_tsft = (uint64_t)htole32(tap->wr_tsft) << 32; 1066292207Savos } else 1067292207Savos tap->wr_tsft &= 0xffffffff00000000; 1068292207Savos tap->wr_tsft += stat->rxdw5; 1069292207Savos 1070297175Sadrian /* XXX 20/40? */ 1071297175Sadrian /* XXX shortgi? */ 1072297175Sadrian 1073292207Savos /* Map HW rate index to 802.11 rate. */ 1074292207Savos if (!(rxdw3 & R92C_RXDW3_HT)) { 1075292207Savos tap->wr_rate = ridx2rate[rate]; 1076292207Savos } else if (rate >= 12) { /* MCS0~15. */ 1077292207Savos /* Bit 7 set means HT MCS instead of rate. */ 1078292207Savos tap->wr_rate = 0x80 | (rate - 12); 1079292207Savos } 1080297910Sadrian 1081297910Sadrian /* XXX TODO: this isn't right; should use the last good RSSI */ 1082292207Savos tap->wr_dbm_antsignal = rssi; 1083292207Savos tap->wr_dbm_antnoise = URTWN_NOISE_FLOOR; 1084292207Savos } 1085292207Savos 1086292207Savos *rssi_p = rssi; 1087292207Savos 1088292207Savos /* Drop descriptor. */ 1089292207Savos m_adj(m, sizeof(*stat) + infosz); 1090292207Savos wh = mtod(m, struct ieee80211_frame_min *); 1091292207Savos 1092292207Savos if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) && 1093292207Savos cipher != R92C_CAM_ALGO_NONE) { 1094292207Savos m->m_flags |= M_WEP; 1095292207Savos } 1096292207Savos 1097292207Savos if (m->m_len >= sizeof(*wh)) 1098292207Savos return (ieee80211_find_rxnode(ic, wh)); 1099292207Savos 1100292207Savos return (NULL); 1101292207Savos} 1102292207Savos 1103292167Savosstatic void 1104251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1105251538Srpaulo{ 1106251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1107287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1108251538Srpaulo struct ieee80211_node *ni; 1109251538Srpaulo struct mbuf *m = NULL, *next; 1110251538Srpaulo struct urtwn_data *data; 1111292207Savos int8_t nf, rssi; 1112251538Srpaulo 1113251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1114251538Srpaulo 1115251538Srpaulo switch (USB_GET_STATE(xfer)) { 1116251538Srpaulo case USB_ST_TRANSFERRED: 1117251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1118251538Srpaulo if (data == NULL) 1119251538Srpaulo goto tr_setup; 1120251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1121292207Savos m = urtwn_report_intr(xfer, data); 1122251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1123251538Srpaulo /* FALLTHROUGH */ 1124251538Srpaulo case USB_ST_SETUP: 1125251538Srpaulotr_setup: 1126251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 1127251538Srpaulo if (data == NULL) { 1128251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 1129297596Sadrian goto finish; 1130251538Srpaulo } 1131251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1132251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1133251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 1134251538Srpaulo usbd_xfer_max_len(xfer)); 1135251538Srpaulo usbd_transfer_submit(xfer); 1136251538Srpaulo 1137251538Srpaulo /* 1138251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 1139251538Srpaulo * ieee80211_input() because here is at the end of a USB 1140251538Srpaulo * callback and safe to unlock. 1141251538Srpaulo */ 1142251538Srpaulo while (m != NULL) { 1143251538Srpaulo next = m->m_next; 1144251538Srpaulo m->m_next = NULL; 1145292207Savos 1146292207Savos ni = urtwn_rx_frame(sc, m, &rssi); 1147297910Sadrian 1148297910Sadrian /* Store a global last-good RSSI */ 1149297910Sadrian if (rssi != -127) 1150297910Sadrian sc->last_rssi = rssi; 1151297910Sadrian 1152292207Savos URTWN_UNLOCK(sc); 1153292207Savos 1154251538Srpaulo nf = URTWN_NOISE_FLOOR; 1155251538Srpaulo if (ni != NULL) { 1156297910Sadrian if (rssi != -127) 1157297910Sadrian URTWN_NODE(ni)->last_rssi = rssi; 1158297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 1159297175Sadrian m->m_flags |= M_AMPDU; 1160297910Sadrian (void)ieee80211_input(ni, m, 1161297910Sadrian URTWN_NODE(ni)->last_rssi - nf, nf); 1162251538Srpaulo ieee80211_free_node(ni); 1163289799Savos } else { 1164297910Sadrian /* Use last good global RSSI */ 1165297910Sadrian (void)ieee80211_input_all(ic, m, 1166297910Sadrian sc->last_rssi - nf, nf); 1167289799Savos } 1168292207Savos URTWN_LOCK(sc); 1169251538Srpaulo m = next; 1170251538Srpaulo } 1171251538Srpaulo break; 1172251538Srpaulo default: 1173251538Srpaulo /* needs it to the inactive queue due to a error. */ 1174251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1175251538Srpaulo if (data != NULL) { 1176251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1177251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1178251538Srpaulo } 1179251538Srpaulo if (error != USB_ERR_CANCELLED) { 1180251538Srpaulo usbd_xfer_set_stall(xfer); 1181287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1182251538Srpaulo goto tr_setup; 1183251538Srpaulo } 1184251538Srpaulo break; 1185251538Srpaulo } 1186297596Sadrianfinish: 1187297596Sadrian /* Finished receive; age anything left on the FF queue by a little bump */ 1188297596Sadrian /* 1189297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1190297596Sadrian * flush the FF staging queue if we're approaching idle. 1191297596Sadrian */ 1192297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1193297596Sadrian URTWN_UNLOCK(sc); 1194297596Sadrian ieee80211_ff_age_all(ic, 1); 1195297596Sadrian URTWN_LOCK(sc); 1196297596Sadrian#endif 1197297596Sadrian 1198297596Sadrian /* Kick-start more transmit in case we stalled */ 1199297596Sadrian urtwn_start(sc); 1200251538Srpaulo} 1201251538Srpaulo 1202251538Srpaulostatic void 1203289891Savosurtwn_txeof(struct urtwn_softc *sc, struct urtwn_data *data, int status) 1204251538Srpaulo{ 1205251538Srpaulo 1206251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1207289891Savos 1208290631Savos if (data->ni != NULL) /* not a beacon frame */ 1209290631Savos ieee80211_tx_complete(data->ni, data->m, status); 1210289891Savos 1211297596Sadrian if (sc->sc_tx_n_active > 0) 1212297596Sadrian sc->sc_tx_n_active--; 1213297596Sadrian 1214287197Sglebius data->ni = NULL; 1215287197Sglebius data->m = NULL; 1216289891Savos 1217251538Srpaulo sc->sc_txtimer = 0; 1218289891Savos 1219289891Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1220251538Srpaulo} 1221251538Srpaulo 1222289066Skevlostatic int 1223289066Skevlourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 1224289066Skevlo int ndata, int maxsz) 1225289066Skevlo{ 1226289066Skevlo int i, error; 1227289066Skevlo 1228289066Skevlo for (i = 0; i < ndata; i++) { 1229289066Skevlo struct urtwn_data *dp = &data[i]; 1230289066Skevlo dp->sc = sc; 1231289066Skevlo dp->m = NULL; 1232289066Skevlo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1233289066Skevlo if (dp->buf == NULL) { 1234289066Skevlo device_printf(sc->sc_dev, 1235289066Skevlo "could not allocate buffer\n"); 1236289066Skevlo error = ENOMEM; 1237289066Skevlo goto fail; 1238289066Skevlo } 1239289066Skevlo dp->ni = NULL; 1240289066Skevlo } 1241289066Skevlo 1242289066Skevlo return (0); 1243289066Skevlofail: 1244289066Skevlo urtwn_free_list(sc, data, ndata); 1245289066Skevlo return (error); 1246289066Skevlo} 1247289066Skevlo 1248289066Skevlostatic int 1249289066Skevlourtwn_alloc_rx_list(struct urtwn_softc *sc) 1250289066Skevlo{ 1251289066Skevlo int error, i; 1252289066Skevlo 1253289066Skevlo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 1254289066Skevlo URTWN_RXBUFSZ); 1255289066Skevlo if (error != 0) 1256289066Skevlo return (error); 1257289066Skevlo 1258289066Skevlo STAILQ_INIT(&sc->sc_rx_active); 1259289066Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 1260289066Skevlo 1261289066Skevlo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 1262289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1263289066Skevlo 1264289066Skevlo return (0); 1265289066Skevlo} 1266289066Skevlo 1267289066Skevlostatic int 1268289066Skevlourtwn_alloc_tx_list(struct urtwn_softc *sc) 1269289066Skevlo{ 1270289066Skevlo int error, i; 1271289066Skevlo 1272289066Skevlo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 1273289066Skevlo URTWN_TXBUFSZ); 1274289066Skevlo if (error != 0) 1275289066Skevlo return (error); 1276289066Skevlo 1277289066Skevlo STAILQ_INIT(&sc->sc_tx_active); 1278289066Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 1279289066Skevlo STAILQ_INIT(&sc->sc_tx_pending); 1280289066Skevlo 1281289066Skevlo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 1282289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 1283289066Skevlo 1284289066Skevlo return (0); 1285289066Skevlo} 1286289066Skevlo 1287251538Srpaulostatic void 1288289066Skevlourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 1289289066Skevlo{ 1290289066Skevlo int i; 1291289066Skevlo 1292289066Skevlo for (i = 0; i < ndata; i++) { 1293289066Skevlo struct urtwn_data *dp = &data[i]; 1294289066Skevlo 1295289066Skevlo if (dp->buf != NULL) { 1296289066Skevlo free(dp->buf, M_USBDEV); 1297289066Skevlo dp->buf = NULL; 1298289066Skevlo } 1299289066Skevlo if (dp->ni != NULL) { 1300289066Skevlo ieee80211_free_node(dp->ni); 1301289066Skevlo dp->ni = NULL; 1302289066Skevlo } 1303289066Skevlo } 1304289066Skevlo} 1305289066Skevlo 1306289066Skevlostatic void 1307289066Skevlourtwn_free_rx_list(struct urtwn_softc *sc) 1308289066Skevlo{ 1309289066Skevlo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 1310289066Skevlo} 1311289066Skevlo 1312289066Skevlostatic void 1313289066Skevlourtwn_free_tx_list(struct urtwn_softc *sc) 1314289066Skevlo{ 1315289066Skevlo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 1316289066Skevlo} 1317289066Skevlo 1318289066Skevlostatic void 1319251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 1320251538Srpaulo{ 1321251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1322297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1323297596Sadrian struct ieee80211com *ic = &sc->sc_ic; 1324297596Sadrian#endif 1325251538Srpaulo struct urtwn_data *data; 1326251538Srpaulo 1327251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1328251538Srpaulo 1329251538Srpaulo switch (USB_GET_STATE(xfer)){ 1330251538Srpaulo case USB_ST_TRANSFERRED: 1331251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1332251538Srpaulo if (data == NULL) 1333251538Srpaulo goto tr_setup; 1334251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1335289891Savos urtwn_txeof(sc, data, 0); 1336251538Srpaulo /* FALLTHROUGH */ 1337251538Srpaulo case USB_ST_SETUP: 1338251538Srpaulotr_setup: 1339251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 1340251538Srpaulo if (data == NULL) { 1341294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1342294471Savos "%s: empty pending queue\n", __func__); 1343297596Sadrian sc->sc_tx_n_active = 0; 1344288353Sadrian goto finish; 1345251538Srpaulo } 1346251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1347251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1348251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1349251538Srpaulo usbd_transfer_submit(xfer); 1350297596Sadrian sc->sc_tx_n_active++; 1351251538Srpaulo break; 1352251538Srpaulo default: 1353251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1354251538Srpaulo if (data == NULL) 1355251538Srpaulo goto tr_setup; 1356289891Savos STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1357289891Savos urtwn_txeof(sc, data, 1); 1358251538Srpaulo if (error != USB_ERR_CANCELLED) { 1359251538Srpaulo usbd_xfer_set_stall(xfer); 1360251538Srpaulo goto tr_setup; 1361251538Srpaulo } 1362251538Srpaulo break; 1363251538Srpaulo } 1364288353Sadrianfinish: 1365297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1366297596Sadrian /* 1367297596Sadrian * If the TX active queue drops below a certain 1368297596Sadrian * threshold, ensure we age fast-frames out so they're 1369297596Sadrian * transmitted. 1370297596Sadrian */ 1371297596Sadrian if (sc->sc_tx_n_active <= 1) { 1372297596Sadrian /* XXX ew - net80211 should defer this for us! */ 1373297596Sadrian 1374297596Sadrian /* 1375297596Sadrian * Note: this sc_tx_n_active currently tracks 1376297596Sadrian * the number of pending transmit submissions 1377297596Sadrian * and not the actual depth of the TX frames 1378297596Sadrian * pending to the hardware. That means that 1379297596Sadrian * we're going to end up with some sub-optimal 1380297596Sadrian * aggregation behaviour. 1381297596Sadrian */ 1382297596Sadrian /* 1383297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1384297596Sadrian * flush the FF staging queue if we're approaching idle. 1385297596Sadrian */ 1386297596Sadrian URTWN_UNLOCK(sc); 1387297596Sadrian ieee80211_ff_flush(ic, WME_AC_VO); 1388297596Sadrian ieee80211_ff_flush(ic, WME_AC_VI); 1389297596Sadrian ieee80211_ff_flush(ic, WME_AC_BE); 1390297596Sadrian ieee80211_ff_flush(ic, WME_AC_BK); 1391297596Sadrian URTWN_LOCK(sc); 1392297596Sadrian } 1393297596Sadrian#endif 1394288353Sadrian /* Kick-start more transmit */ 1395288353Sadrian urtwn_start(sc); 1396251538Srpaulo} 1397251538Srpaulo 1398251538Srpaulostatic struct urtwn_data * 1399251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 1400251538Srpaulo{ 1401251538Srpaulo struct urtwn_data *bf; 1402251538Srpaulo 1403251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 1404251538Srpaulo if (bf != NULL) 1405251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 1406294471Savos else { 1407294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1408294471Savos "%s: out of xmit buffers\n", __func__); 1409294471Savos } 1410251538Srpaulo return (bf); 1411251538Srpaulo} 1412251538Srpaulo 1413251538Srpaulostatic struct urtwn_data * 1414251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 1415251538Srpaulo{ 1416251538Srpaulo struct urtwn_data *bf; 1417251538Srpaulo 1418251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1419251538Srpaulo 1420251538Srpaulo bf = _urtwn_getbuf(sc); 1421294471Savos if (bf == NULL) { 1422294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: stop queue\n", 1423294471Savos __func__); 1424294471Savos } 1425251538Srpaulo return (bf); 1426251538Srpaulo} 1427251538Srpaulo 1428291698Savosstatic usb_error_t 1429251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1430251538Srpaulo int len) 1431251538Srpaulo{ 1432251538Srpaulo usb_device_request_t req; 1433251538Srpaulo 1434251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1435251538Srpaulo req.bRequest = R92C_REQ_REGS; 1436251538Srpaulo USETW(req.wValue, addr); 1437251538Srpaulo USETW(req.wIndex, 0); 1438251538Srpaulo USETW(req.wLength, len); 1439251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1440251538Srpaulo} 1441251538Srpaulo 1442291698Savosstatic usb_error_t 1443251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 1444251538Srpaulo{ 1445291698Savos return (urtwn_write_region_1(sc, addr, &val, sizeof(val))); 1446251538Srpaulo} 1447251538Srpaulo 1448291698Savosstatic usb_error_t 1449251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 1450251538Srpaulo{ 1451251538Srpaulo val = htole16(val); 1452291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1453251538Srpaulo} 1454251538Srpaulo 1455291698Savosstatic usb_error_t 1456251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 1457251538Srpaulo{ 1458251538Srpaulo val = htole32(val); 1459291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1460251538Srpaulo} 1461251538Srpaulo 1462291698Savosstatic usb_error_t 1463251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1464251538Srpaulo int len) 1465251538Srpaulo{ 1466251538Srpaulo usb_device_request_t req; 1467251538Srpaulo 1468251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 1469251538Srpaulo req.bRequest = R92C_REQ_REGS; 1470251538Srpaulo USETW(req.wValue, addr); 1471251538Srpaulo USETW(req.wIndex, 0); 1472251538Srpaulo USETW(req.wLength, len); 1473251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1474251538Srpaulo} 1475251538Srpaulo 1476251538Srpaulostatic uint8_t 1477251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 1478251538Srpaulo{ 1479251538Srpaulo uint8_t val; 1480251538Srpaulo 1481251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 1482251538Srpaulo return (0xff); 1483251538Srpaulo return (val); 1484251538Srpaulo} 1485251538Srpaulo 1486251538Srpaulostatic uint16_t 1487251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 1488251538Srpaulo{ 1489251538Srpaulo uint16_t val; 1490251538Srpaulo 1491251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 1492251538Srpaulo return (0xffff); 1493251538Srpaulo return (le16toh(val)); 1494251538Srpaulo} 1495251538Srpaulo 1496251538Srpaulostatic uint32_t 1497251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 1498251538Srpaulo{ 1499251538Srpaulo uint32_t val; 1500251538Srpaulo 1501251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 1502251538Srpaulo return (0xffffffff); 1503251538Srpaulo return (le32toh(val)); 1504251538Srpaulo} 1505251538Srpaulo 1506251538Srpaulostatic int 1507251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1508251538Srpaulo{ 1509251538Srpaulo struct r92c_fw_cmd cmd; 1510291698Savos usb_error_t error; 1511251538Srpaulo int ntries; 1512251538Srpaulo 1513295871Savos if (!(sc->sc_flags & URTWN_FW_LOADED)) { 1514295871Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, "%s: firmware " 1515295871Savos "was not loaded; command (id %d) will be discarded\n", 1516295871Savos __func__, id); 1517295871Savos return (0); 1518295871Savos } 1519295871Savos 1520251538Srpaulo /* Wait for current FW box to be empty. */ 1521251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1522251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1523251538Srpaulo break; 1524266472Shselasky urtwn_ms_delay(sc); 1525251538Srpaulo } 1526251538Srpaulo if (ntries == 100) { 1527251538Srpaulo device_printf(sc->sc_dev, 1528251538Srpaulo "could not send firmware command\n"); 1529251538Srpaulo return (ETIMEDOUT); 1530251538Srpaulo } 1531251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1532251538Srpaulo cmd.id = id; 1533251538Srpaulo if (len > 3) 1534251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1535251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1536251538Srpaulo memcpy(cmd.msg, buf, len); 1537251538Srpaulo 1538251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1539291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1540251538Srpaulo (uint8_t *)&cmd + 4, 2); 1541291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1542291698Savos return (EIO); 1543291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1544251538Srpaulo (uint8_t *)&cmd + 0, 4); 1545291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1546291698Savos return (EIO); 1547251538Srpaulo 1548251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1549251538Srpaulo return (0); 1550251538Srpaulo} 1551251538Srpaulo 1552292174Savosstatic void 1553292174Savosurtwn_cmdq_cb(void *arg, int pending) 1554292174Savos{ 1555292174Savos struct urtwn_softc *sc = arg; 1556292174Savos struct urtwn_cmdq *item; 1557292174Savos 1558292174Savos /* 1559292174Savos * Device must be powered on (via urtwn_power_on()) 1560292174Savos * before any command may be sent. 1561292174Savos */ 1562292174Savos URTWN_LOCK(sc); 1563292174Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 1564292174Savos URTWN_UNLOCK(sc); 1565292174Savos return; 1566292174Savos } 1567292174Savos 1568292174Savos URTWN_CMDQ_LOCK(sc); 1569292174Savos while (sc->cmdq[sc->cmdq_first].func != NULL) { 1570292174Savos item = &sc->cmdq[sc->cmdq_first]; 1571292174Savos sc->cmdq_first = (sc->cmdq_first + 1) % URTWN_CMDQ_SIZE; 1572292174Savos URTWN_CMDQ_UNLOCK(sc); 1573292174Savos 1574292174Savos item->func(sc, &item->data); 1575292174Savos 1576292174Savos URTWN_CMDQ_LOCK(sc); 1577292174Savos memset(item, 0, sizeof (*item)); 1578292174Savos } 1579292174Savos URTWN_CMDQ_UNLOCK(sc); 1580292174Savos URTWN_UNLOCK(sc); 1581292174Savos} 1582292174Savos 1583292174Savosstatic int 1584292174Savosurtwn_cmd_sleepable(struct urtwn_softc *sc, const void *ptr, size_t len, 1585292174Savos CMD_FUNC_PROTO) 1586292174Savos{ 1587292174Savos struct ieee80211com *ic = &sc->sc_ic; 1588292174Savos 1589292174Savos KASSERT(len <= sizeof(union sec_param), ("buffer overflow")); 1590292174Savos 1591292174Savos URTWN_CMDQ_LOCK(sc); 1592292174Savos if (sc->cmdq[sc->cmdq_last].func != NULL) { 1593292174Savos device_printf(sc->sc_dev, "%s: cmdq overflow\n", __func__); 1594292174Savos URTWN_CMDQ_UNLOCK(sc); 1595292174Savos 1596292174Savos return (EAGAIN); 1597292174Savos } 1598292174Savos 1599292174Savos if (ptr != NULL) 1600292174Savos memcpy(&sc->cmdq[sc->cmdq_last].data, ptr, len); 1601292174Savos sc->cmdq[sc->cmdq_last].func = func; 1602292174Savos sc->cmdq_last = (sc->cmdq_last + 1) % URTWN_CMDQ_SIZE; 1603292174Savos URTWN_CMDQ_UNLOCK(sc); 1604292174Savos 1605292174Savos ieee80211_runtask(ic, &sc->cmdq_task); 1606292174Savos 1607292174Savos return (0); 1608292174Savos} 1609292174Savos 1610264912Skevlostatic __inline void 1611251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1612251538Srpaulo{ 1613264912Skevlo 1614264912Skevlo sc->sc_rf_write(sc, chain, addr, val); 1615264912Skevlo} 1616264912Skevlo 1617264912Skevlostatic void 1618264912Skevlourtwn_r92c_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1619264912Skevlo uint32_t val) 1620264912Skevlo{ 1621251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1622251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1623251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1624251538Srpaulo} 1625251538Srpaulo 1626264912Skevlostatic void 1627264912Skevlourtwn_r88e_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1628264912Skevlouint32_t val) 1629264912Skevlo{ 1630264912Skevlo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1631264912Skevlo SM(R88E_LSSI_PARAM_ADDR, addr) | 1632264912Skevlo SM(R92C_LSSI_PARAM_DATA, val)); 1633264912Skevlo} 1634264912Skevlo 1635251538Srpaulostatic uint32_t 1636251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1637251538Srpaulo{ 1638251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1639251538Srpaulo 1640251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1641251538Srpaulo if (chain != 0) 1642251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1643251538Srpaulo 1644251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1645251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1646266472Shselasky urtwn_ms_delay(sc); 1647251538Srpaulo 1648251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1649251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1650251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1651266472Shselasky urtwn_ms_delay(sc); 1652251538Srpaulo 1653251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1654251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1655266472Shselasky urtwn_ms_delay(sc); 1656251538Srpaulo 1657251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1658251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1659251538Srpaulo else 1660251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1661251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1662251538Srpaulo} 1663251538Srpaulo 1664251538Srpaulostatic int 1665251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1666251538Srpaulo{ 1667291698Savos usb_error_t error; 1668251538Srpaulo int ntries; 1669251538Srpaulo 1670291698Savos error = urtwn_write_4(sc, R92C_LLT_INIT, 1671251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1672251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1673251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1674291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1675291698Savos return (EIO); 1676251538Srpaulo /* Wait for write operation to complete. */ 1677251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1678251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1679251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1680251538Srpaulo return (0); 1681266472Shselasky urtwn_ms_delay(sc); 1682251538Srpaulo } 1683251538Srpaulo return (ETIMEDOUT); 1684251538Srpaulo} 1685251538Srpaulo 1686291264Savosstatic int 1687291264Savosurtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val) 1688251538Srpaulo{ 1689251538Srpaulo uint32_t reg; 1690291698Savos usb_error_t error; 1691251538Srpaulo int ntries; 1692251538Srpaulo 1693291264Savos if (sc->last_rom_addr >= URTWN_EFUSE_MAX_LEN) 1694291264Savos return (EFAULT); 1695291264Savos 1696251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1697291264Savos reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 1698251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1699291264Savos 1700291698Savos error = urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1701291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1702291698Savos return (EIO); 1703251538Srpaulo /* Wait for read operation to complete. */ 1704251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1705251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1706251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1707291264Savos break; 1708266472Shselasky urtwn_ms_delay(sc); 1709251538Srpaulo } 1710291264Savos if (ntries == 100) { 1711291264Savos device_printf(sc->sc_dev, 1712291264Savos "could not read efuse byte at address 0x%x\n", 1713291264Savos sc->last_rom_addr); 1714291264Savos return (ETIMEDOUT); 1715291264Savos } 1716291264Savos 1717291264Savos *val = MS(reg, R92C_EFUSE_CTRL_DATA); 1718291264Savos sc->last_rom_addr++; 1719291264Savos 1720291264Savos return (0); 1721251538Srpaulo} 1722251538Srpaulo 1723291264Savosstatic int 1724291264Savosurtwn_efuse_read_data(struct urtwn_softc *sc, uint8_t *rom, uint8_t off, 1725291264Savos uint8_t msk) 1726291264Savos{ 1727291264Savos uint8_t reg; 1728291264Savos int i, error; 1729291264Savos 1730291264Savos for (i = 0; i < 4; i++) { 1731291264Savos if (msk & (1 << i)) 1732291264Savos continue; 1733291264Savos error = urtwn_efuse_read_next(sc, ®); 1734291264Savos if (error != 0) 1735291264Savos return (error); 1736294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1737294471Savos off * 8 + i * 2, reg); 1738291264Savos rom[off * 8 + i * 2 + 0] = reg; 1739291264Savos 1740291264Savos error = urtwn_efuse_read_next(sc, ®); 1741291264Savos if (error != 0) 1742291264Savos return (error); 1743294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1744294471Savos off * 8 + i * 2 + 1, reg); 1745291264Savos rom[off * 8 + i * 2 + 1] = reg; 1746291264Savos } 1747291264Savos 1748291264Savos return (0); 1749291264Savos} 1750291264Savos 1751294471Savos#ifdef USB_DEBUG 1752251538Srpaulostatic void 1753291264Savosurtwn_dump_rom_contents(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1754251538Srpaulo{ 1755251538Srpaulo int i; 1756251538Srpaulo 1757291264Savos /* Dump ROM contents. */ 1758291264Savos device_printf(sc->sc_dev, "%s:", __func__); 1759291264Savos for (i = 0; i < size; i++) { 1760291264Savos if (i % 32 == 0) 1761291264Savos printf("\n%03X: ", i); 1762291264Savos else if (i % 4 == 0) 1763291264Savos printf(" "); 1764291264Savos 1765291264Savos printf("%02X", rom[i]); 1766291264Savos } 1767291264Savos printf("\n"); 1768291264Savos} 1769291264Savos#endif 1770291264Savos 1771291264Savosstatic int 1772291264Savosurtwn_efuse_read(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1773291264Savos{ 1774291264Savos#define URTWN_CHK(res) do { \ 1775291264Savos if ((error = res) != 0) \ 1776291264Savos goto end; \ 1777291264Savos} while(0) 1778291264Savos uint8_t msk, off, reg; 1779291264Savos int error; 1780291264Savos 1781291698Savos URTWN_CHK(urtwn_efuse_switch_power(sc)); 1782264912Skevlo 1783291264Savos /* Read full ROM image. */ 1784291264Savos sc->last_rom_addr = 0; 1785291264Savos memset(rom, 0xff, size); 1786291264Savos 1787291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1788291264Savos while (reg != 0xff) { 1789291264Savos /* check for extended header */ 1790291264Savos if ((sc->chip & URTWN_CHIP_88E) && (reg & 0x1f) == 0x0f) { 1791291264Savos off = reg >> 5; 1792291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1793291264Savos 1794291264Savos if ((reg & 0x0f) != 0x0f) 1795291264Savos off = ((reg & 0xf0) >> 1) | off; 1796291264Savos else 1797291264Savos continue; 1798291264Savos } else 1799291264Savos off = reg >> 4; 1800251538Srpaulo msk = reg & 0xf; 1801291264Savos 1802291264Savos URTWN_CHK(urtwn_efuse_read_data(sc, rom, off, msk)); 1803291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1804251538Srpaulo } 1805291264Savos 1806291264Savosend: 1807291264Savos 1808294471Savos#ifdef USB_DEBUG 1809294471Savos if (sc->sc_debug & URTWN_DEBUG_ROM) 1810291264Savos urtwn_dump_rom_contents(sc, rom, size); 1811251538Srpaulo#endif 1812291264Savos 1813282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); 1814291264Savos 1815291264Savos if (error != 0) { 1816291264Savos device_printf(sc->sc_dev, "%s: error while reading ROM\n", 1817291264Savos __func__); 1818291264Savos } 1819291264Savos 1820291264Savos return (error); 1821291264Savos#undef URTWN_CHK 1822282623Skevlo} 1823281592Skevlo 1824291698Savosstatic int 1825264912Skevlourtwn_efuse_switch_power(struct urtwn_softc *sc) 1826264912Skevlo{ 1827291698Savos usb_error_t error; 1828264912Skevlo uint32_t reg; 1829251538Srpaulo 1830291698Savos error = urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); 1831291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1832291698Savos return (EIO); 1833281918Skevlo 1834264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1835264912Skevlo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1836291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1837264912Skevlo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1838291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1839291698Savos return (EIO); 1840264912Skevlo } 1841264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1842264912Skevlo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1843291698Savos error = urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1844264912Skevlo reg | R92C_SYS_FUNC_EN_ELDR); 1845291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1846291698Savos return (EIO); 1847264912Skevlo } 1848264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1849264912Skevlo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1850264912Skevlo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1851291698Savos error = urtwn_write_2(sc, R92C_SYS_CLKR, 1852264912Skevlo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1853291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1854291698Savos return (EIO); 1855264912Skevlo } 1856291698Savos 1857291698Savos return (0); 1858264912Skevlo} 1859264912Skevlo 1860251538Srpaulostatic int 1861251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1862251538Srpaulo{ 1863251538Srpaulo uint32_t reg; 1864251538Srpaulo 1865264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1866264912Skevlo return (0); 1867264912Skevlo 1868251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1869251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1870251538Srpaulo return (EIO); 1871251538Srpaulo 1872251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1873251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1874251538Srpaulo /* Check if it is a castrated 8192C. */ 1875251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1876251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1877251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1878251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1879251538Srpaulo } 1880251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1881251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1882251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1883251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1884251538Srpaulo } 1885251538Srpaulo return (0); 1886251538Srpaulo} 1887251538Srpaulo 1888291264Savosstatic int 1889251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1890251538Srpaulo{ 1891291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 1892291264Savos int error; 1893251538Srpaulo 1894251538Srpaulo /* Read full ROM image. */ 1895291264Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(*rom)); 1896291264Savos if (error != 0) 1897291264Savos return (error); 1898251538Srpaulo 1899251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1900291264Savos sc->last_rom_addr = 0x1fa; 1901291264Savos error = urtwn_efuse_read_next(sc, &sc->pa_setting); 1902291264Savos if (error != 0) 1903291264Savos return (error); 1904294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: PA setting=0x%x\n", __func__, 1905294471Savos sc->pa_setting); 1906251538Srpaulo 1907251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1908251538Srpaulo 1909251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1910294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type=%d\n", 1911294471Savos __func__, sc->regulatory); 1912287197Sglebius IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1913251538Srpaulo 1914264912Skevlo sc->sc_rf_write = urtwn_r92c_rf_write; 1915264912Skevlo sc->sc_power_on = urtwn_r92c_power_on; 1916295874Savos sc->sc_power_off = urtwn_r92c_power_off; 1917291264Savos 1918291264Savos return (0); 1919251538Srpaulo} 1920251538Srpaulo 1921291264Savosstatic int 1922264912Skevlourtwn_r88e_read_rom(struct urtwn_softc *sc) 1923264912Skevlo{ 1924294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 1925294198Savos int error; 1926264912Skevlo 1927294198Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(sc->rom.r88e_rom)); 1928291264Savos if (error != 0) 1929291264Savos return (error); 1930264912Skevlo 1931294198Savos sc->bw20_tx_pwr_diff = (rom->tx_pwr_diff >> 4); 1932264912Skevlo if (sc->bw20_tx_pwr_diff & 0x08) 1933264912Skevlo sc->bw20_tx_pwr_diff |= 0xf0; 1934294198Savos sc->ofdm_tx_pwr_diff = (rom->tx_pwr_diff & 0xf); 1935264912Skevlo if (sc->ofdm_tx_pwr_diff & 0x08) 1936264912Skevlo sc->ofdm_tx_pwr_diff |= 0xf0; 1937294198Savos sc->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY); 1938294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type %d\n", 1939294471Savos __func__,sc->regulatory); 1940294198Savos IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1941264912Skevlo 1942264912Skevlo sc->sc_rf_write = urtwn_r88e_rf_write; 1943264912Skevlo sc->sc_power_on = urtwn_r88e_power_on; 1944295874Savos sc->sc_power_off = urtwn_r88e_power_off; 1945291264Savos 1946291264Savos return (0); 1947264912Skevlo} 1948264912Skevlo 1949298436Savosstatic __inline uint8_t 1950298436Savosrate2ridx(uint8_t rate) 1951298436Savos{ 1952298436Savos if (rate & IEEE80211_RATE_MCS) { 1953298436Savos /* 11n rates start at idx 12 */ 1954298436Savos return ((rate & 0xf) + 12); 1955298436Savos } 1956298436Savos switch (rate) { 1957298436Savos /* 11g */ 1958298436Savos case 12: return 4; 1959298436Savos case 18: return 5; 1960298436Savos case 24: return 6; 1961298436Savos case 36: return 7; 1962298436Savos case 48: return 8; 1963298436Savos case 72: return 9; 1964298436Savos case 96: return 10; 1965298436Savos case 108: return 11; 1966298436Savos /* 11b */ 1967298436Savos case 2: return 0; 1968298436Savos case 4: return 1; 1969298436Savos case 11: return 2; 1970298436Savos case 22: return 3; 1971298436Savos default: return URTWN_RIDX_UNKNOWN; 1972298436Savos } 1973298436Savos} 1974298436Savos 1975251538Srpaulo/* 1976251538Srpaulo * Initialize rate adaptation in firmware. 1977251538Srpaulo */ 1978251538Srpaulostatic int 1979251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 1980251538Srpaulo{ 1981287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1982251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1983251538Srpaulo struct ieee80211_node *ni; 1984297175Sadrian struct ieee80211_rateset *rs, *rs_ht; 1985251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 1986251538Srpaulo uint32_t rates, basicrates; 1987298436Savos uint8_t mode, ridx; 1988298436Savos int maxrate, maxbasicrate, error, i; 1989251538Srpaulo 1990251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1991251538Srpaulo rs = &ni->ni_rates; 1992297175Sadrian rs_ht = (struct ieee80211_rateset *) &ni->ni_htrates; 1993251538Srpaulo 1994251538Srpaulo /* Get normal and basic rates mask. */ 1995251538Srpaulo rates = basicrates = 0; 1996251538Srpaulo maxrate = maxbasicrate = 0; 1997297175Sadrian 1998297175Sadrian /* This is for 11bg */ 1999251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 2000251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 2001298436Savos ridx = rate2ridx(IEEE80211_RV(rs->rs_rates[i])); 2002298436Savos if (ridx == URTWN_RIDX_UNKNOWN) /* Unknown rate, skip. */ 2003251538Srpaulo continue; 2004298436Savos rates |= 1 << ridx; 2005298436Savos if (ridx > maxrate) 2006298436Savos maxrate = ridx; 2007251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 2008298436Savos basicrates |= 1 << ridx; 2009298436Savos if (ridx > maxbasicrate) 2010298436Savos maxbasicrate = ridx; 2011251538Srpaulo } 2012251538Srpaulo } 2013297175Sadrian 2014297175Sadrian /* If we're doing 11n, enable 11n rates */ 2015297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) { 2016297175Sadrian for (i = 0; i < rs_ht->rs_nrates; i++) { 2017297175Sadrian if ((rs_ht->rs_rates[i] & 0x7f) > 0xf) 2018297175Sadrian continue; 2019297175Sadrian /* 11n rates start at index 12 */ 2020298436Savos ridx = ((rs_ht->rs_rates[i]) & 0xf) + 12; 2021298436Savos rates |= (1 << ridx); 2022297175Sadrian 2023297175Sadrian /* Guard against the rate table being oddly ordered */ 2024298436Savos if (ridx > maxrate) 2025298436Savos maxrate = ridx; 2026297175Sadrian } 2027297175Sadrian } 2028297175Sadrian 2029297175Sadrian#if 0 2030297175Sadrian if (ic->ic_curmode == IEEE80211_MODE_11NG) 2031297175Sadrian raid = R92C_RAID_11GN; 2032297175Sadrian#endif 2033297175Sadrian /* NB: group addressed frames are done at 11bg rates for now */ 2034251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2035251538Srpaulo mode = R92C_RAID_11B; 2036251538Srpaulo else 2037251538Srpaulo mode = R92C_RAID_11BG; 2038297175Sadrian /* XXX misleading 'mode' value here for unicast frames */ 2039294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, 2040294471Savos "%s: mode 0x%x, rates 0x%08x, basicrates 0x%08x\n", __func__, 2041251538Srpaulo mode, rates, basicrates); 2042251538Srpaulo 2043251538Srpaulo /* Set rates mask for group addressed frames. */ 2044251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 2045251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 2046251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2047251538Srpaulo if (error != 0) { 2048252401Srpaulo ieee80211_free_node(ni); 2049251538Srpaulo device_printf(sc->sc_dev, 2050251538Srpaulo "could not add broadcast station\n"); 2051251538Srpaulo return (error); 2052251538Srpaulo } 2053297175Sadrian 2054251538Srpaulo /* Set initial MRR rate. */ 2055294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxbasicrate %d\n", __func__, 2056294471Savos maxbasicrate); 2057251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 2058251538Srpaulo maxbasicrate); 2059251538Srpaulo 2060251538Srpaulo /* Set rates mask for unicast frames. */ 2061297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2062297175Sadrian mode = R92C_RAID_11GN; 2063297175Sadrian else if (ic->ic_curmode == IEEE80211_MODE_11B) 2064297175Sadrian mode = R92C_RAID_11B; 2065297175Sadrian else 2066297175Sadrian mode = R92C_RAID_11BG; 2067251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 2068251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 2069251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2070251538Srpaulo if (error != 0) { 2071252401Srpaulo ieee80211_free_node(ni); 2072251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 2073251538Srpaulo return (error); 2074251538Srpaulo } 2075251538Srpaulo /* Set initial MRR rate. */ 2076294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxrate %d\n", __func__, 2077294471Savos maxrate); 2078251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 2079251538Srpaulo maxrate); 2080251538Srpaulo 2081251538Srpaulo /* Indicate highest supported rate. */ 2082297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2083297175Sadrian ni->ni_txrate = rs_ht->rs_rates[rs_ht->rs_nrates - 1] 2084297175Sadrian | IEEE80211_RATE_MCS; 2085297175Sadrian else 2086297175Sadrian ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 2087252401Srpaulo ieee80211_free_node(ni); 2088252401Srpaulo 2089251538Srpaulo return (0); 2090251538Srpaulo} 2091251538Srpaulo 2092290439Savosstatic void 2093290631Savosurtwn_init_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2094251538Srpaulo{ 2095290631Savos struct r92c_tx_desc *txd = &uvp->bcn_desc; 2096290631Savos 2097290631Savos txd->txdw0 = htole32( 2098290631Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | R92C_TXDW0_BMCAST | 2099290631Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2100290631Savos txd->txdw1 = htole32( 2101290631Savos SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) | 2102290631Savos SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 2103290631Savos 2104291858Savos if (sc->chip & URTWN_CHIP_88E) { 2105290631Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 2106291858Savos txd->txdseq |= htole16(R88E_TXDSEQ_HWSEQ_EN); 2107291858Savos } else { 2108290631Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 2109291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2110291858Savos } 2111290631Savos 2112290631Savos txd->txdw4 = htole32(R92C_TXDW4_DRVRATE); 2113290631Savos txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE, URTWN_RIDX_CCK1)); 2114251538Srpaulo} 2115251538Srpaulo 2116290631Savosstatic int 2117290631Savosurtwn_setup_beacon(struct urtwn_softc *sc, struct ieee80211_node *ni) 2118290631Savos{ 2119290631Savos struct ieee80211vap *vap = ni->ni_vap; 2120290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2121290631Savos struct mbuf *m; 2122290631Savos int error; 2123290631Savos 2124290631Savos URTWN_ASSERT_LOCKED(sc); 2125290631Savos 2126290631Savos if (ni->ni_chan == IEEE80211_CHAN_ANYC) 2127290631Savos return (EINVAL); 2128290631Savos 2129290631Savos m = ieee80211_beacon_alloc(ni); 2130290631Savos if (m == NULL) { 2131290631Savos device_printf(sc->sc_dev, 2132290631Savos "%s: could not allocate beacon frame\n", __func__); 2133290631Savos return (ENOMEM); 2134290631Savos } 2135290631Savos 2136290631Savos if (uvp->bcn_mbuf != NULL) 2137290631Savos m_freem(uvp->bcn_mbuf); 2138290631Savos 2139290631Savos uvp->bcn_mbuf = m; 2140290631Savos 2141290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2142290631Savos return (error); 2143290631Savos 2144290631Savos /* XXX bcnq stuck workaround */ 2145290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2146290631Savos return (error); 2147290631Savos 2148294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_BEACON, "%s: beacon was %srecognized\n", 2149294471Savos __func__, urtwn_read_1(sc, R92C_TDECTRL + 2) & 2150294471Savos (R92C_TDECTRL_BCN_VALID >> 16) ? "" : "not "); 2151294471Savos 2152290631Savos return (0); 2153290631Savos} 2154290631Savos 2155251538Srpaulostatic void 2156290631Savosurtwn_update_beacon(struct ieee80211vap *vap, int item) 2157290631Savos{ 2158290631Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2159290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2160290631Savos struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 2161290631Savos struct ieee80211_node *ni = vap->iv_bss; 2162290631Savos int mcast = 0; 2163290631Savos 2164290631Savos URTWN_LOCK(sc); 2165290631Savos if (uvp->bcn_mbuf == NULL) { 2166290631Savos uvp->bcn_mbuf = ieee80211_beacon_alloc(ni); 2167290631Savos if (uvp->bcn_mbuf == NULL) { 2168290631Savos device_printf(sc->sc_dev, 2169290631Savos "%s: could not allocate beacon frame\n", __func__); 2170290631Savos URTWN_UNLOCK(sc); 2171290631Savos return; 2172290631Savos } 2173290631Savos } 2174290631Savos URTWN_UNLOCK(sc); 2175290631Savos 2176290631Savos if (item == IEEE80211_BEACON_TIM) 2177290631Savos mcast = 1; /* XXX */ 2178290631Savos 2179290631Savos setbit(bo->bo_flags, item); 2180290631Savos ieee80211_beacon_update(ni, uvp->bcn_mbuf, mcast); 2181290631Savos 2182290631Savos URTWN_LOCK(sc); 2183290631Savos urtwn_tx_beacon(sc, uvp); 2184290631Savos URTWN_UNLOCK(sc); 2185290631Savos} 2186290631Savos 2187290631Savos/* 2188290631Savos * Push a beacon frame into the chip. Beacon will 2189290631Savos * be repeated by the chip every R92C_BCN_INTERVAL. 2190290631Savos */ 2191290631Savosstatic int 2192290631Savosurtwn_tx_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2193290631Savos{ 2194290631Savos struct r92c_tx_desc *desc = &uvp->bcn_desc; 2195290631Savos struct urtwn_data *bf; 2196290631Savos 2197290631Savos URTWN_ASSERT_LOCKED(sc); 2198290631Savos 2199290631Savos bf = urtwn_getbuf(sc); 2200290631Savos if (bf == NULL) 2201290631Savos return (ENOMEM); 2202290631Savos 2203290631Savos memcpy(bf->buf, desc, sizeof(*desc)); 2204290631Savos urtwn_tx_start(sc, uvp->bcn_mbuf, IEEE80211_FC0_TYPE_MGT, bf); 2205290631Savos 2206290631Savos sc->sc_txtimer = 5; 2207290631Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2208290631Savos 2209290631Savos return (0); 2210290631Savos} 2211290631Savos 2212292175Savosstatic int 2213292175Savosurtwn_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k, 2214292175Savos ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix) 2215292175Savos{ 2216292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2217292175Savos uint8_t i; 2218292175Savos 2219292175Savos if (!(&vap->iv_nw_keys[0] <= k && 2220292175Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) { 2221292175Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 2222292175Savos URTWN_LOCK(sc); 2223292175Savos /* 2224292175Savos * First 4 slots for group keys, 2225292175Savos * what is left - for pairwise. 2226292175Savos * XXX incompatible with IBSS RSN. 2227292175Savos */ 2228292175Savos for (i = IEEE80211_WEP_NKID; 2229292175Savos i < R92C_CAM_ENTRY_COUNT; i++) { 2230292175Savos if ((sc->keys_bmap & (1 << i)) == 0) { 2231292175Savos sc->keys_bmap |= 1 << i; 2232292175Savos *keyix = i; 2233292175Savos break; 2234292175Savos } 2235292175Savos } 2236292175Savos URTWN_UNLOCK(sc); 2237292175Savos if (i == R92C_CAM_ENTRY_COUNT) { 2238292175Savos device_printf(sc->sc_dev, 2239292175Savos "%s: no free space in the key table\n", 2240292175Savos __func__); 2241292175Savos return 0; 2242292175Savos } 2243292175Savos } else 2244292175Savos *keyix = 0; 2245292175Savos } else { 2246292175Savos *keyix = k - vap->iv_nw_keys; 2247292175Savos } 2248292175Savos *rxkeyix = *keyix; 2249292175Savos return 1; 2250292175Savos} 2251292175Savos 2252290631Savosstatic void 2253292175Savosurtwn_key_set_cb(struct urtwn_softc *sc, union sec_param *data) 2254292175Savos{ 2255292175Savos struct ieee80211_key *k = &data->key; 2256292175Savos uint8_t algo, keyid; 2257292175Savos int i, error; 2258292175Savos 2259292175Savos if (k->wk_keyix < IEEE80211_WEP_NKID) 2260292175Savos keyid = k->wk_keyix; 2261292175Savos else 2262292175Savos keyid = 0; 2263292175Savos 2264292175Savos /* Map net80211 cipher to HW crypto algorithm. */ 2265292175Savos switch (k->wk_cipher->ic_cipher) { 2266292175Savos case IEEE80211_CIPHER_WEP: 2267292175Savos if (k->wk_keylen < 8) 2268292175Savos algo = R92C_CAM_ALGO_WEP40; 2269292175Savos else 2270292175Savos algo = R92C_CAM_ALGO_WEP104; 2271292175Savos break; 2272292175Savos case IEEE80211_CIPHER_TKIP: 2273292175Savos algo = R92C_CAM_ALGO_TKIP; 2274292175Savos break; 2275292175Savos case IEEE80211_CIPHER_AES_CCM: 2276292175Savos algo = R92C_CAM_ALGO_AES; 2277292175Savos break; 2278292175Savos default: 2279292175Savos device_printf(sc->sc_dev, "%s: undefined cipher %d\n", 2280292175Savos __func__, k->wk_cipher->ic_cipher); 2281292175Savos return; 2282292175Savos } 2283292175Savos 2284294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2285294471Savos "%s: keyix %d, keyid %d, algo %d/%d, flags %04X, len %d, " 2286294471Savos "macaddr %s\n", __func__, k->wk_keyix, keyid, 2287294471Savos k->wk_cipher->ic_cipher, algo, k->wk_flags, k->wk_keylen, 2288294471Savos ether_sprintf(k->wk_macaddr)); 2289292175Savos 2290292175Savos /* Write key. */ 2291292175Savos for (i = 0; i < 4; i++) { 2292292175Savos error = urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 2293298359Savos le32dec(&k->wk_key[i * 4])); 2294292175Savos if (error != 0) 2295292175Savos goto fail; 2296292175Savos } 2297292175Savos 2298292175Savos /* Write CTL0 last since that will validate the CAM entry. */ 2299292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 2300298359Savos le32dec(&k->wk_macaddr[2])); 2301292175Savos if (error != 0) 2302292175Savos goto fail; 2303292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 2304292175Savos SM(R92C_CAM_ALGO, algo) | 2305292175Savos SM(R92C_CAM_KEYID, keyid) | 2306298359Savos SM(R92C_CAM_MACLO, le16dec(&k->wk_macaddr[0])) | 2307292175Savos R92C_CAM_VALID); 2308292175Savos if (error != 0) 2309292175Savos goto fail; 2310292175Savos 2311292175Savos return; 2312292175Savos 2313292175Savosfail: 2314292175Savos device_printf(sc->sc_dev, "%s fails, error %d\n", __func__, error); 2315292175Savos} 2316292175Savos 2317292175Savosstatic void 2318292175Savosurtwn_key_del_cb(struct urtwn_softc *sc, union sec_param *data) 2319292175Savos{ 2320292175Savos struct ieee80211_key *k = &data->key; 2321292175Savos int i; 2322292175Savos 2323294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2324294471Savos "%s: keyix %d, flags %04X, macaddr %s\n", __func__, 2325292175Savos k->wk_keyix, k->wk_flags, ether_sprintf(k->wk_macaddr)); 2326292175Savos 2327292175Savos urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 0); 2328292175Savos urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 0); 2329292175Savos 2330292175Savos /* Clear key. */ 2331292175Savos for (i = 0; i < 4; i++) 2332292175Savos urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 0); 2333292175Savos sc->keys_bmap &= ~(1 << k->wk_keyix); 2334292175Savos} 2335292175Savos 2336292175Savosstatic int 2337292175Savosurtwn_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k) 2338292175Savos{ 2339292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2340292175Savos 2341292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2342292175Savos /* Not for us. */ 2343292175Savos return (1); 2344292175Savos } 2345292175Savos 2346292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_set_cb)); 2347292175Savos} 2348292175Savos 2349292175Savosstatic int 2350292175Savosurtwn_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k) 2351292175Savos{ 2352292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2353292175Savos 2354292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2355292175Savos /* Not for us. */ 2356292175Savos return (1); 2357292175Savos } 2358292175Savos 2359292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_del_cb)); 2360292175Savos} 2361292175Savos 2362292175Savosstatic void 2363290651Savosurtwn_tsf_task_adhoc(void *arg, int pending) 2364290651Savos{ 2365290651Savos struct ieee80211vap *vap = arg; 2366290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2367290651Savos struct ieee80211_node *ni; 2368290651Savos uint32_t reg; 2369290651Savos 2370290651Savos URTWN_LOCK(sc); 2371290651Savos ni = ieee80211_ref_node(vap->iv_bss); 2372290651Savos reg = urtwn_read_1(sc, R92C_BCN_CTRL); 2373290651Savos 2374290651Savos /* Accept beacons with the same BSSID. */ 2375290651Savos urtwn_set_rx_bssid_all(sc, 0); 2376290651Savos 2377290651Savos /* Enable synchronization. */ 2378290651Savos reg &= ~R92C_BCN_CTRL_DIS_TSF_UDT0; 2379290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2380290651Savos 2381290651Savos /* Synchronize. */ 2382290651Savos usb_pause_mtx(&sc->sc_mtx, hz * ni->ni_intval * 5 / 1000); 2383290651Savos 2384290651Savos /* Disable synchronization. */ 2385290651Savos reg |= R92C_BCN_CTRL_DIS_TSF_UDT0; 2386290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2387290651Savos 2388290651Savos /* Remove beacon filter. */ 2389290651Savos urtwn_set_rx_bssid_all(sc, 1); 2390290651Savos 2391290651Savos /* Enable beaconing. */ 2392290651Savos urtwn_write_1(sc, R92C_MBID_NUM, 2393290651Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2394290651Savos reg |= R92C_BCN_CTRL_EN_BCN; 2395290651Savos 2396290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2397290651Savos ieee80211_free_node(ni); 2398290651Savos URTWN_UNLOCK(sc); 2399290651Savos} 2400290651Savos 2401290651Savosstatic void 2402290631Savosurtwn_tsf_sync_enable(struct urtwn_softc *sc, struct ieee80211vap *vap) 2403290631Savos{ 2404290651Savos struct ieee80211com *ic = &sc->sc_ic; 2405290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2406290651Savos 2407290631Savos /* Reset TSF. */ 2408290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2409290631Savos 2410290631Savos switch (vap->iv_opmode) { 2411290631Savos case IEEE80211_M_STA: 2412290631Savos /* Enable TSF synchronization. */ 2413290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2414290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) & 2415290631Savos ~R92C_BCN_CTRL_DIS_TSF_UDT0); 2416290631Savos break; 2417290651Savos case IEEE80211_M_IBSS: 2418290651Savos ieee80211_runtask(ic, &uvp->tsf_task_adhoc); 2419290651Savos break; 2420290631Savos case IEEE80211_M_HOSTAP: 2421290631Savos /* Enable beaconing. */ 2422290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2423290631Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2424290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2425290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 2426290631Savos break; 2427290631Savos default: 2428290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2429290631Savos vap->iv_opmode); 2430290631Savos return; 2431290631Savos } 2432290631Savos} 2433290631Savos 2434290631Savosstatic void 2435292203Savosurtwn_get_tsf(struct urtwn_softc *sc, uint64_t *buf) 2436292203Savos{ 2437292203Savos urtwn_read_region_1(sc, R92C_TSFTR, (uint8_t *)buf, sizeof(*buf)); 2438292203Savos} 2439292203Savos 2440292203Savosstatic void 2441251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 2442251538Srpaulo{ 2443251538Srpaulo uint8_t reg; 2444281069Srpaulo 2445251538Srpaulo if (led == URTWN_LED_LINK) { 2446264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 2447264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 2448264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, reg | 0x60); 2449264912Skevlo if (!on) { 2450264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0x90; 2451264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, 2452264912Skevlo reg | R92C_LEDCFG0_DIS); 2453264912Skevlo urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 2454264912Skevlo urtwn_read_1(sc, R92C_MAC_PINMUX_CFG) & 2455264912Skevlo 0xfe); 2456264912Skevlo } 2457264912Skevlo } else { 2458264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 2459264912Skevlo if (!on) 2460264912Skevlo reg |= R92C_LEDCFG0_DIS; 2461264912Skevlo urtwn_write_1(sc, R92C_LEDCFG0, reg); 2462264912Skevlo } 2463264912Skevlo sc->ledlink = on; /* Save LED state. */ 2464251538Srpaulo } 2465251538Srpaulo} 2466251538Srpaulo 2467289811Savosstatic void 2468289811Savosurtwn_set_mode(struct urtwn_softc *sc, uint8_t mode) 2469289811Savos{ 2470289811Savos uint8_t reg; 2471289811Savos 2472289811Savos reg = urtwn_read_1(sc, R92C_MSR); 2473289811Savos reg = (reg & ~R92C_MSR_MASK) | mode; 2474289811Savos urtwn_write_1(sc, R92C_MSR, reg); 2475289811Savos} 2476289811Savos 2477290651Savosstatic void 2478290651Savosurtwn_ibss_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 2479290651Savos const struct ieee80211_rx_stats *rxs, 2480290651Savos int rssi, int nf) 2481290651Savos{ 2482290651Savos struct ieee80211vap *vap = ni->ni_vap; 2483290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2484290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2485290651Savos uint64_t ni_tstamp, curr_tstamp; 2486290651Savos 2487290651Savos uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 2488290651Savos 2489290651Savos if (vap->iv_state == IEEE80211_S_RUN && 2490290651Savos (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 2491290651Savos subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 2492290651Savos ni_tstamp = le64toh(ni->ni_tstamp.tsf); 2493290651Savos URTWN_LOCK(sc); 2494290651Savos urtwn_get_tsf(sc, &curr_tstamp); 2495290651Savos URTWN_UNLOCK(sc); 2496290651Savos curr_tstamp = le64toh(curr_tstamp); 2497290651Savos 2498290651Savos if (ni_tstamp >= curr_tstamp) 2499290651Savos (void) ieee80211_ibss_merge(ni); 2500290651Savos } 2501290651Savos} 2502290651Savos 2503251538Srpaulostatic int 2504251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 2505251538Srpaulo{ 2506251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 2507251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 2508286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2509251538Srpaulo struct ieee80211_node *ni; 2510251538Srpaulo enum ieee80211_state ostate; 2511290631Savos uint32_t reg; 2512290631Savos uint8_t mode; 2513290631Savos int error = 0; 2514251538Srpaulo 2515251538Srpaulo ostate = vap->iv_state; 2516294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_STATE, "%s -> %s\n", 2517294471Savos ieee80211_state_name[ostate], ieee80211_state_name[nstate]); 2518251538Srpaulo 2519251538Srpaulo IEEE80211_UNLOCK(ic); 2520251538Srpaulo URTWN_LOCK(sc); 2521251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 2522251538Srpaulo 2523251538Srpaulo if (ostate == IEEE80211_S_RUN) { 2524294473Savos /* Stop calibration. */ 2525294473Savos callout_stop(&sc->sc_calib_to); 2526294473Savos 2527251538Srpaulo /* Turn link LED off. */ 2528251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2529251538Srpaulo 2530251538Srpaulo /* Set media status to 'No Link'. */ 2531289811Savos urtwn_set_mode(sc, R92C_MSR_NOLINK); 2532251538Srpaulo 2533251538Srpaulo /* Stop Rx of data frames. */ 2534251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 2535251538Srpaulo 2536251538Srpaulo /* Disable TSF synchronization. */ 2537251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 2538290631Savos (urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN) | 2539251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 2540251538Srpaulo 2541290631Savos /* Disable beaconing. */ 2542290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2543290631Savos urtwn_read_1(sc, R92C_MBID_NUM) & ~R92C_MBID_TXBCN_RPT0); 2544290631Savos 2545290631Savos /* Reset TSF. */ 2546290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2547290631Savos 2548251538Srpaulo /* Reset EDCA parameters. */ 2549251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 2550251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 2551251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 2552251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 2553251538Srpaulo } 2554251538Srpaulo 2555251538Srpaulo switch (nstate) { 2556251538Srpaulo case IEEE80211_S_INIT: 2557251538Srpaulo /* Turn link LED off. */ 2558251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2559251538Srpaulo break; 2560251538Srpaulo case IEEE80211_S_SCAN: 2561251538Srpaulo /* Pause AC Tx queues. */ 2562251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 2563293180Savos urtwn_read_1(sc, R92C_TXPAUSE) | R92C_TX_QUEUE_AC); 2564251538Srpaulo break; 2565251538Srpaulo case IEEE80211_S_AUTH: 2566251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 2567251538Srpaulo break; 2568251538Srpaulo case IEEE80211_S_RUN: 2569251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 2570251538Srpaulo /* Turn link LED on. */ 2571251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2572251538Srpaulo break; 2573251538Srpaulo } 2574251538Srpaulo 2575251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 2576290631Savos 2577290631Savos if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || 2578290631Savos ni->ni_chan == IEEE80211_CHAN_ANYC) { 2579290631Savos device_printf(sc->sc_dev, 2580290631Savos "%s: could not move to RUN state\n", __func__); 2581290631Savos error = EINVAL; 2582290631Savos goto end_run; 2583290631Savos } 2584290631Savos 2585290631Savos switch (vap->iv_opmode) { 2586290631Savos case IEEE80211_M_STA: 2587290631Savos mode = R92C_MSR_INFRA; 2588290631Savos break; 2589290651Savos case IEEE80211_M_IBSS: 2590290651Savos mode = R92C_MSR_ADHOC; 2591290651Savos break; 2592290631Savos case IEEE80211_M_HOSTAP: 2593290631Savos mode = R92C_MSR_AP; 2594290631Savos break; 2595290631Savos default: 2596290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2597290631Savos vap->iv_opmode); 2598290631Savos error = EINVAL; 2599290631Savos goto end_run; 2600290631Savos } 2601290631Savos 2602251538Srpaulo /* Set media status to 'Associated'. */ 2603290631Savos urtwn_set_mode(sc, mode); 2604251538Srpaulo 2605251538Srpaulo /* Set BSSID. */ 2606298359Savos urtwn_write_4(sc, R92C_BSSID + 0, le32dec(&ni->ni_bssid[0])); 2607298359Savos urtwn_write_4(sc, R92C_BSSID + 4, le16dec(&ni->ni_bssid[4])); 2608251538Srpaulo 2609251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2610251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 2611251538Srpaulo else /* 802.11b/g */ 2612251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 2613251538Srpaulo 2614251538Srpaulo /* Enable Rx of data frames. */ 2615251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 2616251538Srpaulo 2617251538Srpaulo /* Flush all AC queues. */ 2618251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 2619251538Srpaulo 2620251538Srpaulo /* Set beacon interval. */ 2621251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 2622251538Srpaulo 2623251538Srpaulo /* Allow Rx from our BSSID only. */ 2624290564Savos if (ic->ic_promisc == 0) { 2625290631Savos reg = urtwn_read_4(sc, R92C_RCR); 2626290631Savos 2627290631Savos if (vap->iv_opmode != IEEE80211_M_HOSTAP) 2628290631Savos reg |= R92C_RCR_CBSSID_DATA; 2629290651Savos if (vap->iv_opmode != IEEE80211_M_IBSS) 2630290651Savos reg |= R92C_RCR_CBSSID_BCN; 2631290631Savos 2632290631Savos urtwn_write_4(sc, R92C_RCR, reg); 2633290564Savos } 2634251538Srpaulo 2635290651Savos if (vap->iv_opmode == IEEE80211_M_HOSTAP || 2636290651Savos vap->iv_opmode == IEEE80211_M_IBSS) { 2637290631Savos error = urtwn_setup_beacon(sc, ni); 2638290631Savos if (error != 0) { 2639290631Savos device_printf(sc->sc_dev, 2640290631Savos "unable to push beacon into the chip, " 2641290631Savos "error %d\n", error); 2642290631Savos goto end_run; 2643290631Savos } 2644290631Savos } 2645290631Savos 2646251538Srpaulo /* Enable TSF synchronization. */ 2647290631Savos urtwn_tsf_sync_enable(sc, vap); 2648251538Srpaulo 2649251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 2650251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 2651251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 2652251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 2653251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 2654251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 2655251538Srpaulo 2656251538Srpaulo /* Intialize rate adaptation. */ 2657292167Savos if (!(sc->chip & URTWN_CHIP_88E)) 2658264912Skevlo urtwn_ra_init(sc); 2659251538Srpaulo /* Turn link LED on. */ 2660251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2661251538Srpaulo 2662251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 2663251538Srpaulo /* Reset temperature calibration state machine. */ 2664294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 2665251538Srpaulo sc->thcal_lctemp = 0; 2666294473Savos /* Start periodic calibration. */ 2667294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2668290631Savos 2669290631Savosend_run: 2670251538Srpaulo ieee80211_free_node(ni); 2671251538Srpaulo break; 2672251538Srpaulo default: 2673251538Srpaulo break; 2674251538Srpaulo } 2675290631Savos 2676251538Srpaulo URTWN_UNLOCK(sc); 2677251538Srpaulo IEEE80211_LOCK(ic); 2678290631Savos return (error != 0 ? error : uvp->newstate(vap, nstate, arg)); 2679251538Srpaulo} 2680251538Srpaulo 2681251538Srpaulostatic void 2682294473Savosurtwn_calib_to(void *arg) 2683294473Savos{ 2684294473Savos struct urtwn_softc *sc = arg; 2685294473Savos 2686294473Savos /* Do it in a process context. */ 2687294473Savos urtwn_cmd_sleepable(sc, NULL, 0, urtwn_calib_cb); 2688294473Savos} 2689294473Savos 2690294473Savosstatic void 2691294473Savosurtwn_calib_cb(struct urtwn_softc *sc, union sec_param *data) 2692294473Savos{ 2693294473Savos /* Do temperature compensation. */ 2694294473Savos urtwn_temp_calib(sc); 2695294473Savos 2696294473Savos if ((urtwn_read_1(sc, R92C_MSR) & R92C_MSR_MASK) != R92C_MSR_NOLINK) 2697294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2698294473Savos} 2699294473Savos 2700294473Savosstatic void 2701251538Srpaulourtwn_watchdog(void *arg) 2702251538Srpaulo{ 2703251538Srpaulo struct urtwn_softc *sc = arg; 2704251538Srpaulo 2705251538Srpaulo if (sc->sc_txtimer > 0) { 2706251538Srpaulo if (--sc->sc_txtimer == 0) { 2707251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 2708287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2709251538Srpaulo return; 2710251538Srpaulo } 2711251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2712251538Srpaulo } 2713251538Srpaulo} 2714251538Srpaulo 2715251538Srpaulostatic void 2716251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 2717251538Srpaulo{ 2718251538Srpaulo int pwdb; 2719251538Srpaulo 2720251538Srpaulo /* Convert antenna signal to percentage. */ 2721251538Srpaulo if (rssi <= -100 || rssi >= 20) 2722251538Srpaulo pwdb = 0; 2723251538Srpaulo else if (rssi >= 0) 2724251538Srpaulo pwdb = 100; 2725251538Srpaulo else 2726251538Srpaulo pwdb = 100 + rssi; 2727264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2728289758Savos if (rate <= URTWN_RIDX_CCK11) { 2729264912Skevlo /* CCK gain is smaller than OFDM/MCS gain. */ 2730264912Skevlo pwdb += 6; 2731264912Skevlo if (pwdb > 100) 2732264912Skevlo pwdb = 100; 2733264912Skevlo if (pwdb <= 14) 2734264912Skevlo pwdb -= 4; 2735264912Skevlo else if (pwdb <= 26) 2736264912Skevlo pwdb -= 8; 2737264912Skevlo else if (pwdb <= 34) 2738264912Skevlo pwdb -= 6; 2739264912Skevlo else if (pwdb <= 42) 2740264912Skevlo pwdb -= 2; 2741264912Skevlo } 2742251538Srpaulo } 2743251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 2744251538Srpaulo sc->avg_pwdb = pwdb; 2745251538Srpaulo else if (sc->avg_pwdb < pwdb) 2746251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 2747251538Srpaulo else 2748251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 2749297175Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: PWDB %d, EMA %d\n", __func__, 2750294471Savos pwdb, sc->avg_pwdb); 2751251538Srpaulo} 2752251538Srpaulo 2753251538Srpaulostatic int8_t 2754251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2755251538Srpaulo{ 2756251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 2757251538Srpaulo struct r92c_rx_phystat *phy; 2758251538Srpaulo struct r92c_rx_cck *cck; 2759251538Srpaulo uint8_t rpt; 2760251538Srpaulo int8_t rssi; 2761251538Srpaulo 2762289758Savos if (rate <= URTWN_RIDX_CCK11) { 2763251538Srpaulo cck = (struct r92c_rx_cck *)physt; 2764251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 2765251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 2766251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 2767251538Srpaulo } else { 2768251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 2769251538Srpaulo rssi = cck->agc_rpt & 0x3e; 2770251538Srpaulo } 2771251538Srpaulo rssi = cckoff[rpt] - rssi; 2772251538Srpaulo } else { /* OFDM/HT. */ 2773251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 2774251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2775251538Srpaulo } 2776251538Srpaulo return (rssi); 2777251538Srpaulo} 2778251538Srpaulo 2779264912Skevlostatic int8_t 2780264912Skevlourtwn_r88e_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2781264912Skevlo{ 2782264912Skevlo struct r92c_rx_phystat *phy; 2783264912Skevlo struct r88e_rx_cck *cck; 2784264912Skevlo uint8_t cck_agc_rpt, lna_idx, vga_idx; 2785264912Skevlo int8_t rssi; 2786264912Skevlo 2787264972Skevlo rssi = 0; 2788289758Savos if (rate <= URTWN_RIDX_CCK11) { 2789264912Skevlo cck = (struct r88e_rx_cck *)physt; 2790264912Skevlo cck_agc_rpt = cck->agc_rpt; 2791264912Skevlo lna_idx = (cck_agc_rpt & 0xe0) >> 5; 2792281069Srpaulo vga_idx = cck_agc_rpt & 0x1f; 2793264912Skevlo switch (lna_idx) { 2794264912Skevlo case 7: 2795264912Skevlo if (vga_idx <= 27) 2796264912Skevlo rssi = -100 + 2* (27 - vga_idx); 2797264912Skevlo else 2798264912Skevlo rssi = -100; 2799264912Skevlo break; 2800264912Skevlo case 6: 2801264912Skevlo rssi = -48 + 2 * (2 - vga_idx); 2802264912Skevlo break; 2803264912Skevlo case 5: 2804264912Skevlo rssi = -42 + 2 * (7 - vga_idx); 2805264912Skevlo break; 2806264912Skevlo case 4: 2807264912Skevlo rssi = -36 + 2 * (7 - vga_idx); 2808264912Skevlo break; 2809264912Skevlo case 3: 2810264912Skevlo rssi = -24 + 2 * (7 - vga_idx); 2811264912Skevlo break; 2812264912Skevlo case 2: 2813264912Skevlo rssi = -12 + 2 * (5 - vga_idx); 2814264912Skevlo break; 2815264912Skevlo case 1: 2816264912Skevlo rssi = 8 - (2 * vga_idx); 2817264912Skevlo break; 2818264912Skevlo case 0: 2819264912Skevlo rssi = 14 - (2 * vga_idx); 2820264912Skevlo break; 2821264912Skevlo } 2822264912Skevlo rssi += 6; 2823264912Skevlo } else { /* OFDM/HT. */ 2824264912Skevlo phy = (struct r92c_rx_phystat *)physt; 2825264912Skevlo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2826264912Skevlo } 2827264912Skevlo return (rssi); 2828264912Skevlo} 2829264912Skevlo 2830251538Srpaulostatic int 2831290630Savosurtwn_tx_data(struct urtwn_softc *sc, struct ieee80211_node *ni, 2832290630Savos struct mbuf *m, struct urtwn_data *data) 2833251538Srpaulo{ 2834292167Savos const struct ieee80211_txparam *tp; 2835287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2836251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 2837292167Savos struct ieee80211_key *k = NULL; 2838292167Savos struct ieee80211_channel *chan; 2839292167Savos struct ieee80211_frame *wh; 2840251538Srpaulo struct r92c_tx_desc *txd; 2841300434Savos uint8_t macid, raid, rate, ridx, type, tid, qos, qsel; 2842292014Savos int hasqos, ismcast; 2843251538Srpaulo 2844251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2845251538Srpaulo 2846290630Savos wh = mtod(m, struct ieee80211_frame *); 2847264912Skevlo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2848292014Savos hasqos = IEEE80211_QOS_HAS_SEQ(wh); 2849290630Savos ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2850264912Skevlo 2851292014Savos /* Select TX ring for this frame. */ 2852292014Savos if (hasqos) { 2853300433Savos qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0]; 2854300433Savos tid = qos & IEEE80211_QOS_TID; 2855300433Savos } else { 2856300433Savos qos = 0; 2857292014Savos tid = 0; 2858300433Savos } 2859292014Savos 2860292167Savos chan = (ni->ni_chan != IEEE80211_CHAN_ANYC) ? 2861292167Savos ni->ni_chan : ic->ic_curchan; 2862292167Savos tp = &vap->iv_txparms[ieee80211_chan2mode(chan)]; 2863292167Savos 2864292167Savos /* Choose a TX rate index. */ 2865292167Savos if (type == IEEE80211_FC0_TYPE_MGT) 2866292167Savos rate = tp->mgmtrate; 2867292167Savos else if (ismcast) 2868292167Savos rate = tp->mcastrate; 2869292167Savos else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 2870292167Savos rate = tp->ucastrate; 2871292167Savos else if (m->m_flags & M_EAPOL) 2872292167Savos rate = tp->mgmtrate; 2873292167Savos else { 2874292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) { 2875292167Savos /* XXX pass pktlen */ 2876292167Savos (void) ieee80211_ratectl_rate(ni, NULL, 0); 2877292167Savos rate = ni->ni_txrate; 2878292167Savos } else { 2879297175Sadrian /* XXX TODO: drop the default rate for 11b/11g? */ 2880297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2881297175Sadrian rate = IEEE80211_RATE_MCS | 0x4; /* MCS4 */ 2882297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2883292167Savos rate = 108; 2884292167Savos else 2885292167Savos rate = 22; 2886292167Savos } 2887292167Savos } 2888292167Savos 2889297175Sadrian /* 2890297175Sadrian * XXX TODO: this should be per-node, for 11b versus 11bg 2891297175Sadrian * nodes in hostap mode 2892297175Sadrian */ 2893292167Savos ridx = rate2ridx(rate); 2894297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2895297175Sadrian raid = R92C_RAID_11GN; 2896297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2897292167Savos raid = R92C_RAID_11BG; 2898292167Savos else 2899292167Savos raid = R92C_RAID_11B; 2900292167Savos 2901260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2902290630Savos k = ieee80211_crypto_encap(ni, m); 2903251538Srpaulo if (k == NULL) { 2904251538Srpaulo device_printf(sc->sc_dev, 2905251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 2906251538Srpaulo return (ENOBUFS); 2907251538Srpaulo } 2908251538Srpaulo 2909251538Srpaulo /* in case packet header moved, reset pointer */ 2910290630Savos wh = mtod(m, struct ieee80211_frame *); 2911251538Srpaulo } 2912281069Srpaulo 2913251538Srpaulo /* Fill Tx descriptor. */ 2914251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 2915251538Srpaulo memset(txd, 0, sizeof(*txd)); 2916251538Srpaulo 2917251538Srpaulo txd->txdw0 |= htole32( 2918251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 2919251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2920290630Savos if (ismcast) 2921251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 2922290630Savos 2923290630Savos if (!ismcast) { 2924300433Savos /* Unicast frame, check if an ACK is expected. */ 2925300433Savos if (!qos || (qos & IEEE80211_QOS_ACKPOLICY) != 2926300433Savos IEEE80211_QOS_ACKPOLICY_NOACK) { 2927300433Savos txd->txdw5 |= htole32(R92C_TXDW5_RTY_LMT_ENA); 2928300433Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT, 2929300433Savos tp->maxretry)); 2930300433Savos } 2931300433Savos 2932292167Savos if (sc->chip & URTWN_CHIP_88E) { 2933292167Savos struct urtwn_node *un = URTWN_NODE(ni); 2934292167Savos macid = un->id; 2935292167Savos } else 2936292167Savos macid = URTWN_MACID_BSS; 2937290630Savos 2938290630Savos if (type == IEEE80211_FC0_TYPE_DATA) { 2939292014Savos qsel = tid % URTWN_MAX_TID; 2940290630Savos 2941292167Savos if (sc->chip & URTWN_CHIP_88E) { 2942292167Savos txd->txdw2 |= htole32( 2943292167Savos R88E_TXDW2_AGGBK | 2944292167Savos R88E_TXDW2_CCX_RPT); 2945292167Savos } else 2946290630Savos txd->txdw1 |= htole32(R92C_TXDW1_AGGBK); 2947290630Savos 2948297175Sadrian /* protmode, non-HT */ 2949297175Sadrian /* XXX TODO: noack frames? */ 2950297175Sadrian if ((rate & 0x80) == 0 && 2951297175Sadrian (ic->ic_flags & IEEE80211_F_USEPROT)) { 2952290630Savos switch (ic->ic_protmode) { 2953290630Savos case IEEE80211_PROT_CTSONLY: 2954290630Savos txd->txdw4 |= htole32( 2955290630Savos R92C_TXDW4_CTS2SELF | 2956290630Savos R92C_TXDW4_HWRTSEN); 2957290630Savos break; 2958290630Savos case IEEE80211_PROT_RTSCTS: 2959290630Savos txd->txdw4 |= htole32( 2960290630Savos R92C_TXDW4_RTSEN | 2961290630Savos R92C_TXDW4_HWRTSEN); 2962290630Savos break; 2963290630Savos default: 2964290630Savos break; 2965290630Savos } 2966290630Savos } 2967297175Sadrian 2968297175Sadrian /* protmode, HT */ 2969297175Sadrian /* XXX TODO: noack frames? */ 2970297175Sadrian if ((rate & 0x80) && 2971297175Sadrian (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) { 2972297175Sadrian txd->txdw4 |= htole32( 2973297175Sadrian R92C_TXDW4_RTSEN | 2974297175Sadrian R92C_TXDW4_HWRTSEN); 2975297175Sadrian } 2976297175Sadrian 2977297175Sadrian /* XXX TODO: rtsrate is configurable? 24mbit may 2978297175Sadrian * be a bit high for RTS rate? */ 2979290630Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 2980290630Savos URTWN_RIDX_OFDM24)); 2981297175Sadrian 2982290630Savos txd->txdw5 |= htole32(0x0001ff00); 2983290630Savos } else /* IEEE80211_FC0_TYPE_MGT */ 2984290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2985251538Srpaulo } else { 2986290630Savos macid = URTWN_MACID_BC; 2987290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2988290630Savos } 2989251538Srpaulo 2990290630Savos txd->txdw1 |= htole32( 2991290630Savos SM(R92C_TXDW1_QSEL, qsel) | 2992290630Savos SM(R92C_TXDW1_RAID, raid)); 2993290630Savos 2994297175Sadrian /* XXX TODO: 40MHZ flag? */ 2995297175Sadrian /* XXX TODO: AMPDU flag? (AGG_ENABLE or AGG_BREAK?) Density shift? */ 2996297175Sadrian /* XXX Short preamble? */ 2997297175Sadrian /* XXX Short-GI? */ 2998297175Sadrian 2999290630Savos if (sc->chip & URTWN_CHIP_88E) 3000290630Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, macid)); 3001290630Savos else 3002290630Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, macid)); 3003290630Savos 3004290630Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 3005297175Sadrian 3006291858Savos /* Force this rate if needed. */ 3007292167Savos if (URTWN_CHIP_HAS_RATECTL(sc) || ismcast || 3008297175Sadrian (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) || 3009292167Savos (m->m_flags & M_EAPOL) || type != IEEE80211_FC0_TYPE_DATA) 3010251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3011251538Srpaulo 3012292014Savos if (!hasqos) { 3013251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 3014291858Savos if (sc->chip & URTWN_CHIP_88E) 3015291858Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3016291858Savos else 3017291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3018290630Savos } else { 3019290630Savos /* Set sequence number. */ 3020290630Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3021290630Savos } 3022251538Srpaulo 3023292175Savos if (k != NULL && !(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3024292175Savos uint8_t cipher; 3025292175Savos 3026292175Savos switch (k->wk_cipher->ic_cipher) { 3027292175Savos case IEEE80211_CIPHER_WEP: 3028292175Savos case IEEE80211_CIPHER_TKIP: 3029292175Savos cipher = R92C_TXDW1_CIPHER_RC4; 3030292175Savos break; 3031292175Savos case IEEE80211_CIPHER_AES_CCM: 3032292175Savos cipher = R92C_TXDW1_CIPHER_AES; 3033292175Savos break; 3034292175Savos default: 3035292175Savos device_printf(sc->sc_dev, "%s: unknown cipher %d\n", 3036292175Savos __func__, k->wk_cipher->ic_cipher); 3037292175Savos return (EINVAL); 3038292175Savos } 3039292175Savos 3040292175Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3041292175Savos } 3042292175Savos 3043251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 3044251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3045251538Srpaulo 3046251538Srpaulo tap->wt_flags = 0; 3047290630Savos if (k != NULL) 3048290630Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3049290630Savos ieee80211_radiotap_tx(vap, m); 3050251538Srpaulo } 3051251538Srpaulo 3052290630Savos data->ni = ni; 3053251538Srpaulo 3054290630Savos urtwn_tx_start(sc, m, type, data); 3055290630Savos 3056290630Savos return (0); 3057290630Savos} 3058290630Savos 3059292221Savosstatic int 3060292221Savosurtwn_tx_raw(struct urtwn_softc *sc, struct ieee80211_node *ni, 3061292221Savos struct mbuf *m, struct urtwn_data *data, 3062292221Savos const struct ieee80211_bpf_params *params) 3063292221Savos{ 3064292221Savos struct ieee80211vap *vap = ni->ni_vap; 3065292221Savos struct ieee80211_key *k = NULL; 3066292221Savos struct ieee80211_frame *wh; 3067292221Savos struct r92c_tx_desc *txd; 3068292221Savos uint8_t cipher, ridx, type; 3069292221Savos 3070292221Savos /* Encrypt the frame if need be. */ 3071292221Savos cipher = R92C_TXDW1_CIPHER_NONE; 3072292221Savos if (params->ibp_flags & IEEE80211_BPF_CRYPTO) { 3073292221Savos /* Retrieve key for TX. */ 3074292221Savos k = ieee80211_crypto_encap(ni, m); 3075292221Savos if (k == NULL) 3076292221Savos return (ENOBUFS); 3077292221Savos 3078292221Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3079292221Savos switch (k->wk_cipher->ic_cipher) { 3080292221Savos case IEEE80211_CIPHER_WEP: 3081292221Savos case IEEE80211_CIPHER_TKIP: 3082292221Savos cipher = R92C_TXDW1_CIPHER_RC4; 3083292221Savos break; 3084292221Savos case IEEE80211_CIPHER_AES_CCM: 3085292221Savos cipher = R92C_TXDW1_CIPHER_AES; 3086292221Savos break; 3087292221Savos default: 3088292221Savos device_printf(sc->sc_dev, 3089292221Savos "%s: unknown cipher %d\n", 3090292221Savos __func__, k->wk_cipher->ic_cipher); 3091292221Savos return (EINVAL); 3092292221Savos } 3093292221Savos } 3094292221Savos } 3095292221Savos 3096297175Sadrian /* XXX TODO: 11n checks, matching urtwn_tx_data() */ 3097297175Sadrian 3098292221Savos wh = mtod(m, struct ieee80211_frame *); 3099292221Savos type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 3100292221Savos 3101292221Savos /* Fill Tx descriptor. */ 3102292221Savos txd = (struct r92c_tx_desc *)data->buf; 3103292221Savos memset(txd, 0, sizeof(*txd)); 3104292221Savos 3105292221Savos txd->txdw0 |= htole32( 3106292221Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 3107292221Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 3108292221Savos if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 3109292221Savos txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 3110292221Savos 3111300433Savos if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) { 3112300433Savos txd->txdw5 |= htole32(R92C_TXDW5_RTY_LMT_ENA); 3113300433Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_RTY_LMT, 3114300433Savos params->ibp_try0)); 3115300433Savos } 3116292221Savos if (params->ibp_flags & IEEE80211_BPF_RTS) 3117292221Savos txd->txdw4 |= htole32(R92C_TXDW4_RTSEN); 3118292221Savos if (params->ibp_flags & IEEE80211_BPF_CTS) 3119292221Savos txd->txdw4 |= htole32(R92C_TXDW4_CTS2SELF); 3120292221Savos if (txd->txdw4 & htole32(R92C_TXDW4_RTSEN | R92C_TXDW4_CTS2SELF)) { 3121292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWRTSEN); 3122292221Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 3123292221Savos URTWN_RIDX_OFDM24)); 3124292221Savos } 3125292221Savos 3126292221Savos if (sc->chip & URTWN_CHIP_88E) 3127292221Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 3128292221Savos else 3129292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 3130292221Savos 3131297175Sadrian /* XXX TODO: rate index/config (RAID) for 11n? */ 3132292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_MGNT)); 3133292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3134292221Savos 3135292221Savos /* Choose a TX rate index. */ 3136292221Savos ridx = rate2ridx(params->ibp_rate0); 3137292221Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 3138292221Savos txd->txdw5 |= htole32(0x0001ff00); 3139292221Savos txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3140292221Savos 3141292221Savos if (!IEEE80211_QOS_HAS_SEQ(wh)) { 3142292221Savos /* Use HW sequence numbering for non-QoS frames. */ 3143292221Savos if (sc->chip & URTWN_CHIP_88E) 3144292221Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3145292221Savos else 3146292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3147292221Savos } else { 3148292221Savos /* Set sequence number. */ 3149292221Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3150292221Savos } 3151292221Savos 3152292221Savos if (ieee80211_radiotap_active_vap(vap)) { 3153292221Savos struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3154292221Savos 3155292221Savos tap->wt_flags = 0; 3156292221Savos if (k != NULL) 3157292221Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3158292221Savos ieee80211_radiotap_tx(vap, m); 3159292221Savos } 3160292221Savos 3161292221Savos data->ni = ni; 3162292221Savos 3163292221Savos urtwn_tx_start(sc, m, type, data); 3164292221Savos 3165292221Savos return (0); 3166292221Savos} 3167292221Savos 3168290630Savosstatic void 3169290630Savosurtwn_tx_start(struct urtwn_softc *sc, struct mbuf *m, uint8_t type, 3170290630Savos struct urtwn_data *data) 3171290630Savos{ 3172290630Savos struct usb_xfer *xfer; 3173290630Savos struct r92c_tx_desc *txd; 3174290630Savos uint16_t ac, sum; 3175290630Savos int i, xferlen; 3176290630Savos 3177290630Savos URTWN_ASSERT_LOCKED(sc); 3178290630Savos 3179290630Savos ac = M_WME_GETAC(m); 3180290630Savos 3181290630Savos switch (type) { 3182290630Savos case IEEE80211_FC0_TYPE_CTL: 3183290630Savos case IEEE80211_FC0_TYPE_MGT: 3184290630Savos xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 3185290630Savos break; 3186290630Savos default: 3187292014Savos xfer = sc->sc_xfer[wme2queue[ac].qid]; 3188290630Savos break; 3189290630Savos } 3190290630Savos 3191290630Savos txd = (struct r92c_tx_desc *)data->buf; 3192290630Savos txd->txdw0 |= htole32(SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len)); 3193290630Savos 3194290630Savos /* Compute Tx descriptor checksum. */ 3195290630Savos sum = 0; 3196290630Savos for (i = 0; i < sizeof(*txd) / 2; i++) 3197290630Savos sum ^= ((uint16_t *)txd)[i]; 3198290630Savos txd->txdsum = sum; /* NB: already little endian. */ 3199290630Savos 3200290630Savos xferlen = sizeof(*txd) + m->m_pkthdr.len; 3201290630Savos m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&txd[1]); 3202290630Savos 3203251538Srpaulo data->buflen = xferlen; 3204290630Savos data->m = m; 3205251538Srpaulo 3206251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 3207251538Srpaulo usbd_transfer_start(xfer); 3208251538Srpaulo} 3209251538Srpaulo 3210287197Sglebiusstatic int 3211287197Sglebiusurtwn_transmit(struct ieee80211com *ic, struct mbuf *m) 3212251538Srpaulo{ 3213287197Sglebius struct urtwn_softc *sc = ic->ic_softc; 3214287197Sglebius int error; 3215261863Srpaulo 3216261863Srpaulo URTWN_LOCK(sc); 3217287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 3218287197Sglebius URTWN_UNLOCK(sc); 3219287197Sglebius return (ENXIO); 3220287197Sglebius } 3221287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 3222287197Sglebius if (error) { 3223287197Sglebius URTWN_UNLOCK(sc); 3224287197Sglebius return (error); 3225287197Sglebius } 3226287197Sglebius urtwn_start(sc); 3227261863Srpaulo URTWN_UNLOCK(sc); 3228287197Sglebius 3229287197Sglebius return (0); 3230261863Srpaulo} 3231261863Srpaulo 3232261863Srpaulostatic void 3233287197Sglebiusurtwn_start(struct urtwn_softc *sc) 3234261863Srpaulo{ 3235251538Srpaulo struct ieee80211_node *ni; 3236251538Srpaulo struct mbuf *m; 3237251538Srpaulo struct urtwn_data *bf; 3238251538Srpaulo 3239261863Srpaulo URTWN_ASSERT_LOCKED(sc); 3240287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 3241251538Srpaulo bf = urtwn_getbuf(sc); 3242251538Srpaulo if (bf == NULL) { 3243287197Sglebius mbufq_prepend(&sc->sc_snd, m); 3244251538Srpaulo break; 3245251538Srpaulo } 3246251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 3247251538Srpaulo m->m_pkthdr.rcvif = NULL; 3248297596Sadrian 3249297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 3250297596Sadrian __func__, 3251297596Sadrian m); 3252297596Sadrian 3253290630Savos if (urtwn_tx_data(sc, ni, m, bf) != 0) { 3254287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 3255287197Sglebius IFCOUNTER_OERRORS, 1); 3256251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 3257288353Sadrian m_freem(m); 3258251538Srpaulo ieee80211_free_node(ni); 3259251538Srpaulo break; 3260251538Srpaulo } 3261251538Srpaulo sc->sc_txtimer = 5; 3262251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 3263251538Srpaulo } 3264251538Srpaulo} 3265251538Srpaulo 3266287197Sglebiusstatic void 3267287197Sglebiusurtwn_parent(struct ieee80211com *ic) 3268251538Srpaulo{ 3269286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 3270251538Srpaulo 3271263153Skevlo URTWN_LOCK(sc); 3272287197Sglebius if (sc->sc_flags & URTWN_DETACHED) { 3273287197Sglebius URTWN_UNLOCK(sc); 3274287197Sglebius return; 3275287197Sglebius } 3276291698Savos URTWN_UNLOCK(sc); 3277291698Savos 3278287197Sglebius if (ic->ic_nrunning > 0) { 3279291698Savos if (urtwn_init(sc) != 0) { 3280291698Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3281291698Savos if (vap != NULL) 3282291698Savos ieee80211_stop(vap); 3283291698Savos } else 3284291698Savos ieee80211_start_all(ic); 3285291698Savos } else 3286287197Sglebius urtwn_stop(sc); 3287251538Srpaulo} 3288251538Srpaulo 3289264912Skevlostatic __inline int 3290251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 3291251538Srpaulo{ 3292264912Skevlo 3293264912Skevlo return sc->sc_power_on(sc); 3294264912Skevlo} 3295264912Skevlo 3296264912Skevlostatic int 3297264912Skevlourtwn_r92c_power_on(struct urtwn_softc *sc) 3298264912Skevlo{ 3299251538Srpaulo uint32_t reg; 3300291698Savos usb_error_t error; 3301251538Srpaulo int ntries; 3302251538Srpaulo 3303251538Srpaulo /* Wait for autoload done bit. */ 3304251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3305251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 3306251538Srpaulo break; 3307266472Shselasky urtwn_ms_delay(sc); 3308251538Srpaulo } 3309251538Srpaulo if (ntries == 1000) { 3310251538Srpaulo device_printf(sc->sc_dev, 3311251538Srpaulo "timeout waiting for chip autoload\n"); 3312251538Srpaulo return (ETIMEDOUT); 3313251538Srpaulo } 3314251538Srpaulo 3315251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 3316291698Savos error = urtwn_write_1(sc, R92C_RSV_CTRL, 0); 3317291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3318291698Savos return (EIO); 3319251538Srpaulo /* Move SPS into PWM mode. */ 3320291698Savos error = urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 3321291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3322291698Savos return (EIO); 3323266472Shselasky urtwn_ms_delay(sc); 3324251538Srpaulo 3325251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 3326251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 3327291698Savos error = urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3328251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 3329291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3330291698Savos return (EIO); 3331266472Shselasky urtwn_ms_delay(sc); 3332291698Savos error = urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3333251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 3334251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 3335291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3336291698Savos return (EIO); 3337251538Srpaulo } 3338251538Srpaulo 3339251538Srpaulo /* Auto enable WLAN. */ 3340291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3341251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3342291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3343291698Savos return (EIO); 3344251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3345262822Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3346262822Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3347251538Srpaulo break; 3348266472Shselasky urtwn_ms_delay(sc); 3349251538Srpaulo } 3350251538Srpaulo if (ntries == 1000) { 3351251538Srpaulo device_printf(sc->sc_dev, 3352251538Srpaulo "timeout waiting for MAC auto ON\n"); 3353251538Srpaulo return (ETIMEDOUT); 3354251538Srpaulo } 3355251538Srpaulo 3356251538Srpaulo /* Enable radio, GPIO and LED functions. */ 3357291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3358251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 3359251538Srpaulo R92C_APS_FSMCO_PDN_EN | 3360251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 3361291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3362291698Savos return (EIO); 3363251538Srpaulo /* Release RF digital isolation. */ 3364291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 3365251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 3366291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3367291698Savos return (EIO); 3368251538Srpaulo 3369251538Srpaulo /* Initialize MAC. */ 3370291698Savos error = urtwn_write_1(sc, R92C_APSD_CTRL, 3371251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 3372291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3373291698Savos return (EIO); 3374251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 3375251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 3376251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 3377251538Srpaulo break; 3378266472Shselasky urtwn_ms_delay(sc); 3379251538Srpaulo } 3380251538Srpaulo if (ntries == 200) { 3381251538Srpaulo device_printf(sc->sc_dev, 3382251538Srpaulo "timeout waiting for MAC initialization\n"); 3383251538Srpaulo return (ETIMEDOUT); 3384251538Srpaulo } 3385251538Srpaulo 3386251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3387251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 3388251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3389251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3390251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 3391251538Srpaulo R92C_CR_ENSEC; 3392291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3393291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3394291698Savos return (EIO); 3395251538Srpaulo 3396291698Savos error = urtwn_write_1(sc, 0xfe10, 0x19); 3397291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3398291698Savos return (EIO); 3399251538Srpaulo return (0); 3400251538Srpaulo} 3401251538Srpaulo 3402251538Srpaulostatic int 3403264912Skevlourtwn_r88e_power_on(struct urtwn_softc *sc) 3404264912Skevlo{ 3405264912Skevlo uint32_t reg; 3406291698Savos usb_error_t error; 3407264912Skevlo int ntries; 3408264912Skevlo 3409264912Skevlo /* Wait for power ready bit. */ 3410264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3411281918Skevlo if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST) 3412264912Skevlo break; 3413266472Shselasky urtwn_ms_delay(sc); 3414264912Skevlo } 3415264912Skevlo if (ntries == 5000) { 3416264912Skevlo device_printf(sc->sc_dev, 3417264912Skevlo "timeout waiting for chip power up\n"); 3418264912Skevlo return (ETIMEDOUT); 3419264912Skevlo } 3420264912Skevlo 3421264912Skevlo /* Reset BB. */ 3422291698Savos error = urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3423264912Skevlo urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB | 3424264912Skevlo R92C_SYS_FUNC_EN_BB_GLB_RST)); 3425291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3426291698Savos return (EIO); 3427264912Skevlo 3428291698Savos error = urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3429281918Skevlo urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3430291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3431291698Savos return (EIO); 3432264912Skevlo 3433264912Skevlo /* Disable HWPDN. */ 3434291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3435281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN); 3436291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3437291698Savos return (EIO); 3438264912Skevlo 3439264912Skevlo /* Disable WL suspend. */ 3440291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3441281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & 3442281918Skevlo ~(R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE)); 3443291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3444291698Savos return (EIO); 3445264912Skevlo 3446291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3447281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3448291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3449291698Savos return (EIO); 3450264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3451281918Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3452281918Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3453264912Skevlo break; 3454266472Shselasky urtwn_ms_delay(sc); 3455264912Skevlo } 3456264912Skevlo if (ntries == 5000) 3457264912Skevlo return (ETIMEDOUT); 3458264912Skevlo 3459264912Skevlo /* Enable LDO normal mode. */ 3460291698Savos error = urtwn_write_1(sc, R92C_LPLDO_CTRL, 3461295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) & ~R92C_LPLDO_CTRL_SLEEP); 3462291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3463291698Savos return (EIO); 3464264912Skevlo 3465264912Skevlo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3466291698Savos error = urtwn_write_2(sc, R92C_CR, 0); 3467291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3468291698Savos return (EIO); 3469264912Skevlo reg = urtwn_read_2(sc, R92C_CR); 3470264912Skevlo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3471264912Skevlo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3472264912Skevlo R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC | R92C_CR_CALTMR_EN; 3473291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3474291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3475291698Savos return (EIO); 3476264912Skevlo 3477264912Skevlo return (0); 3478264912Skevlo} 3479264912Skevlo 3480295874Savosstatic __inline void 3481295874Savosurtwn_power_off(struct urtwn_softc *sc) 3482295874Savos{ 3483295874Savos 3484295874Savos return sc->sc_power_off(sc); 3485295874Savos} 3486295874Savos 3487295874Savosstatic void 3488295874Savosurtwn_r92c_power_off(struct urtwn_softc *sc) 3489295874Savos{ 3490295874Savos uint32_t reg; 3491295874Savos 3492295874Savos /* Block all Tx queues. */ 3493295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3494295874Savos 3495295874Savos /* Disable RF */ 3496295874Savos urtwn_rf_write(sc, 0, 0, 0); 3497295874Savos 3498295874Savos urtwn_write_1(sc, R92C_APSD_CTRL, R92C_APSD_CTRL_OFF); 3499295874Savos 3500295874Savos /* Reset BB state machine */ 3501295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3502295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA | 3503295874Savos R92C_SYS_FUNC_EN_BB_GLB_RST); 3504295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3505295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA); 3506295874Savos 3507295874Savos /* 3508295874Savos * Reset digital sequence 3509295874Savos */ 3510295874Savos#ifndef URTWN_WITHOUT_UCODE 3511295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) { 3512295874Savos /* Reset MCU ready status */ 3513295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3514295874Savos 3515295874Savos /* If firmware in ram code, do reset */ 3516295874Savos urtwn_fw_reset(sc); 3517295874Savos } 3518295874Savos#endif 3519295874Savos 3520295874Savos /* Reset MAC and Enable 8051 */ 3521295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN + 1, 3522295874Savos (R92C_SYS_FUNC_EN_CPUEN | 3523295874Savos R92C_SYS_FUNC_EN_ELDR | 3524295874Savos R92C_SYS_FUNC_EN_HWPDN) >> 8); 3525295874Savos 3526295874Savos /* Reset MCU ready status */ 3527295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3528295874Savos 3529295874Savos /* Disable MAC clock */ 3530295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3531295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3532295874Savos R92C_SYS_CLKR_ANA8M | 3533295874Savos R92C_SYS_CLKR_LOADER_EN | 3534295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3535295874Savos R92C_SYS_CLKR_SYS_EN | 3536295874Savos R92C_SYS_CLKR_RING_EN | 3537295874Savos 0x4000); 3538295874Savos 3539295874Savos /* Disable AFE PLL */ 3540295874Savos urtwn_write_1(sc, R92C_AFE_PLL_CTRL, 0x80); 3541295874Savos 3542295874Savos /* Gated AFE DIG_CLOCK */ 3543295874Savos urtwn_write_2(sc, R92C_AFE_XTAL_CTRL, 0x880F); 3544295874Savos 3545295874Savos /* Isolated digital to PON */ 3546295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3547295874Savos R92C_SYS_ISO_CTRL_MD2PP | 3548295874Savos R92C_SYS_ISO_CTRL_PA2PCIE | 3549295874Savos R92C_SYS_ISO_CTRL_PD2CORE | 3550295874Savos R92C_SYS_ISO_CTRL_IP2MAC | 3551295874Savos R92C_SYS_ISO_CTRL_DIOP | 3552295874Savos R92C_SYS_ISO_CTRL_DIOE); 3553295874Savos 3554295874Savos /* 3555295874Savos * Pull GPIO PIN to balance level and LED control 3556295874Savos */ 3557295874Savos /* 1. Disable GPIO[7:0] */ 3558295874Savos urtwn_write_2(sc, R92C_GPIO_IOSEL, 0x0000); 3559295874Savos 3560295874Savos reg = urtwn_read_4(sc, R92C_GPIO_PIN_CTRL) & ~0x0000ff00; 3561295874Savos reg |= ((reg << 8) & 0x0000ff00) | 0x00ff0000; 3562295874Savos urtwn_write_4(sc, R92C_GPIO_PIN_CTRL, reg); 3563295874Savos 3564295874Savos /* Disable GPIO[10:8] */ 3565295874Savos urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 0x00); 3566295874Savos 3567295874Savos reg = urtwn_read_2(sc, R92C_GPIO_IO_SEL) & ~0x00f0; 3568295874Savos reg |= (((reg & 0x000f) << 4) | 0x0780); 3569295874Savos urtwn_write_2(sc, R92C_GPIO_IO_SEL, reg); 3570295874Savos 3571295874Savos /* Disable LED0 & 1 */ 3572295874Savos urtwn_write_2(sc, R92C_LEDCFG0, 0x8080); 3573295874Savos 3574295874Savos /* 3575295874Savos * Reset digital sequence 3576295874Savos */ 3577295874Savos /* Disable ELDR clock */ 3578295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3579295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3580295874Savos R92C_SYS_CLKR_ANA8M | 3581295874Savos R92C_SYS_CLKR_LOADER_EN | 3582295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3583295874Savos R92C_SYS_CLKR_SYS_EN | 3584295874Savos R92C_SYS_CLKR_RING_EN | 3585295874Savos 0x4000); 3586295874Savos 3587295874Savos /* Isolated ELDR to PON */ 3588295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL + 1, 3589295874Savos (R92C_SYS_ISO_CTRL_DIOR | 3590295874Savos R92C_SYS_ISO_CTRL_PWC_EV12V) >> 8); 3591295874Savos 3592295874Savos /* 3593295874Savos * Disable analog sequence 3594295874Savos */ 3595295874Savos /* Disable A15 power */ 3596295874Savos urtwn_write_1(sc, R92C_LDOA15_CTRL, R92C_LDOA15_CTRL_OBUF); 3597295874Savos /* Disable digital core power */ 3598295874Savos urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3599295874Savos urtwn_read_1(sc, R92C_LDOV12D_CTRL) & 3600295874Savos ~R92C_LDOV12D_CTRL_LDV12_EN); 3601295874Savos 3602295874Savos /* Enter PFM mode */ 3603295874Savos urtwn_write_1(sc, R92C_SPS0_CTRL, 0x23); 3604295874Savos 3605295874Savos /* Set USB suspend */ 3606295874Savos urtwn_write_2(sc, R92C_APS_FSMCO, 3607295874Savos R92C_APS_FSMCO_APDM_HOST | 3608295874Savos R92C_APS_FSMCO_AFSM_HSUS | 3609295874Savos R92C_APS_FSMCO_PFM_ALDN); 3610295874Savos 3611295874Savos /* Lock ISO/CLK/Power control register. */ 3612295874Savos urtwn_write_1(sc, R92C_RSV_CTRL, 0x0E); 3613295874Savos} 3614295874Savos 3615295874Savosstatic void 3616295874Savosurtwn_r88e_power_off(struct urtwn_softc *sc) 3617295874Savos{ 3618295874Savos uint8_t reg; 3619295874Savos int ntries; 3620295874Savos 3621295874Savos /* Disable any kind of TX reports. */ 3622295874Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 3623295874Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) & 3624295874Savos ~(R88E_TX_RPT1_ENA | R88E_TX_RPT2_ENA)); 3625295874Savos 3626295874Savos /* Stop Rx. */ 3627295874Savos urtwn_write_1(sc, R92C_CR, 0); 3628295874Savos 3629295874Savos /* Move card to Low Power State. */ 3630295874Savos /* Block all Tx queues. */ 3631295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3632295874Savos 3633295874Savos for (ntries = 0; ntries < 20; ntries++) { 3634295874Savos /* Should be zero if no packet is transmitting. */ 3635295874Savos if (urtwn_read_4(sc, R88E_SCH_TXCMD) == 0) 3636295874Savos break; 3637295874Savos 3638295874Savos urtwn_ms_delay(sc); 3639295874Savos } 3640295874Savos if (ntries == 20) { 3641295874Savos device_printf(sc->sc_dev, "%s: failed to block Tx queues\n", 3642295874Savos __func__); 3643295874Savos return; 3644295874Savos } 3645295874Savos 3646295874Savos /* CCK and OFDM are disabled, and clock are gated. */ 3647295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3648295874Savos urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~R92C_SYS_FUNC_EN_BBRSTB); 3649295874Savos 3650295874Savos urtwn_ms_delay(sc); 3651295874Savos 3652295874Savos /* Reset MAC TRX */ 3653295874Savos urtwn_write_1(sc, R92C_CR, 3654295874Savos R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3655295874Savos R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | 3656295874Savos R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN); 3657295874Savos 3658295874Savos /* check if removed later */ 3659295874Savos urtwn_write_1(sc, R92C_CR + 1, 3660295874Savos urtwn_read_1(sc, R92C_CR + 1) & ~(R92C_CR_ENSEC >> 8)); 3661295874Savos 3662295874Savos /* Respond TxOK to scheduler */ 3663295874Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, 3664295874Savos urtwn_read_1(sc, R92C_DUAL_TSF_RST) | 0x20); 3665295874Savos 3666295874Savos /* If firmware in ram code, do reset. */ 3667295874Savos#ifndef URTWN_WITHOUT_UCODE 3668295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) 3669295874Savos urtwn_r88e_fw_reset(sc); 3670295874Savos#endif 3671295874Savos 3672295874Savos /* Reset MCU ready status. */ 3673295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0x00); 3674295874Savos 3675295874Savos /* Disable 32k. */ 3676295874Savos urtwn_write_1(sc, R88E_32K_CTRL, 3677295874Savos urtwn_read_1(sc, R88E_32K_CTRL) & ~0x01); 3678295874Savos 3679295874Savos /* Move card to Disabled state. */ 3680295874Savos /* Turn off RF. */ 3681295874Savos urtwn_write_1(sc, R92C_RF_CTRL, 0); 3682295874Savos 3683295874Savos /* LDO Sleep mode. */ 3684295874Savos urtwn_write_1(sc, R92C_LPLDO_CTRL, 3685295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) | R92C_LPLDO_CTRL_SLEEP); 3686295874Savos 3687295874Savos /* Turn off MAC by HW state machine */ 3688295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3689295874Savos urtwn_read_1(sc, R92C_APS_FSMCO + 1) | 3690295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)); 3691295874Savos 3692295874Savos for (ntries = 0; ntries < 20; ntries++) { 3693295874Savos /* Wait until it will be disabled. */ 3694295874Savos if ((urtwn_read_1(sc, R92C_APS_FSMCO + 1) & 3695295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)) == 0) 3696295874Savos break; 3697295874Savos 3698295874Savos urtwn_ms_delay(sc); 3699295874Savos } 3700295874Savos if (ntries == 20) { 3701295874Savos device_printf(sc->sc_dev, "%s: could not turn off MAC\n", 3702295874Savos __func__); 3703295874Savos return; 3704295874Savos } 3705295874Savos 3706295874Savos /* schmit trigger */ 3707295874Savos urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3708295874Savos urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3709295874Savos 3710295874Savos /* Enable WL suspend. */ 3711295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3712295874Savos (urtwn_read_1(sc, R92C_APS_FSMCO + 1) & ~0x10) | 0x08); 3713295874Savos 3714295874Savos /* Enable bandgap mbias in suspend. */ 3715295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 3, 0); 3716295874Savos 3717295874Savos /* Clear SIC_EN register. */ 3718295874Savos urtwn_write_1(sc, R92C_GPIO_MUXCFG + 1, 3719295874Savos urtwn_read_1(sc, R92C_GPIO_MUXCFG + 1) & ~0x10); 3720295874Savos 3721295874Savos /* Set USB suspend enable local register */ 3722295874Savos urtwn_write_1(sc, R92C_USB_SUSPEND, 3723295874Savos urtwn_read_1(sc, R92C_USB_SUSPEND) | 0x10); 3724295874Savos 3725295874Savos /* Reset MCU IO Wrapper. */ 3726295874Savos reg = urtwn_read_1(sc, R92C_RSV_CTRL + 1); 3727295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08); 3728295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08); 3729295874Savos 3730295874Savos /* marked as 'For Power Consumption' code. */ 3731295874Savos urtwn_write_1(sc, R92C_GPIO_OUT, urtwn_read_1(sc, R92C_GPIO_IN)); 3732295874Savos urtwn_write_1(sc, R92C_GPIO_IOSEL, 0xff); 3733295874Savos 3734295874Savos urtwn_write_1(sc, R92C_GPIO_IO_SEL, 3735295874Savos urtwn_read_1(sc, R92C_GPIO_IO_SEL) << 4); 3736295874Savos urtwn_write_1(sc, R92C_GPIO_MOD, 3737295874Savos urtwn_read_1(sc, R92C_GPIO_MOD) | 0x0f); 3738295874Savos 3739295874Savos /* Set LNA, TRSW, EX_PA Pin to output mode. */ 3740295874Savos urtwn_write_4(sc, R88E_BB_PAD_CTRL, 0x00080808); 3741295874Savos} 3742295874Savos 3743264912Skevlostatic int 3744251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 3745251538Srpaulo{ 3746264912Skevlo int i, error, page_count, pktbuf_count; 3747251538Srpaulo 3748264912Skevlo page_count = (sc->chip & URTWN_CHIP_88E) ? 3749264912Skevlo R88E_TX_PAGE_COUNT : R92C_TX_PAGE_COUNT; 3750264912Skevlo pktbuf_count = (sc->chip & URTWN_CHIP_88E) ? 3751264912Skevlo R88E_TXPKTBUF_COUNT : R92C_TXPKTBUF_COUNT; 3752264912Skevlo 3753264912Skevlo /* Reserve pages [0; page_count]. */ 3754264912Skevlo for (i = 0; i < page_count; i++) { 3755251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3756251538Srpaulo return (error); 3757251538Srpaulo } 3758251538Srpaulo /* NB: 0xff indicates end-of-list. */ 3759251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 3760251538Srpaulo return (error); 3761251538Srpaulo /* 3762264912Skevlo * Use pages [page_count + 1; pktbuf_count - 1] 3763251538Srpaulo * as ring buffer. 3764251538Srpaulo */ 3765264912Skevlo for (++i; i < pktbuf_count - 1; i++) { 3766251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3767251538Srpaulo return (error); 3768251538Srpaulo } 3769251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 3770264912Skevlo error = urtwn_llt_write(sc, i, page_count + 1); 3771251538Srpaulo return (error); 3772251538Srpaulo} 3773251538Srpaulo 3774295871Savos#ifndef URTWN_WITHOUT_UCODE 3775251538Srpaulostatic void 3776251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 3777251538Srpaulo{ 3778251538Srpaulo uint16_t reg; 3779251538Srpaulo int ntries; 3780251538Srpaulo 3781251538Srpaulo /* Tell 8051 to reset itself. */ 3782251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 3783251538Srpaulo 3784251538Srpaulo /* Wait until 8051 resets by itself. */ 3785251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 3786251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3787251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 3788251538Srpaulo return; 3789266472Shselasky urtwn_ms_delay(sc); 3790251538Srpaulo } 3791251538Srpaulo /* Force 8051 reset. */ 3792251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3793251538Srpaulo} 3794251538Srpaulo 3795264912Skevlostatic void 3796264912Skevlourtwn_r88e_fw_reset(struct urtwn_softc *sc) 3797264912Skevlo{ 3798264912Skevlo uint16_t reg; 3799264912Skevlo 3800264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3801264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3802264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN); 3803264912Skevlo} 3804264912Skevlo 3805251538Srpaulostatic int 3806251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 3807251538Srpaulo{ 3808251538Srpaulo uint32_t reg; 3809291698Savos usb_error_t error = USB_ERR_NORMAL_COMPLETION; 3810291698Savos int off, mlen; 3811251538Srpaulo 3812251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3813251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 3814251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3815251538Srpaulo 3816251538Srpaulo off = R92C_FW_START_ADDR; 3817251538Srpaulo while (len > 0) { 3818251538Srpaulo if (len > 196) 3819251538Srpaulo mlen = 196; 3820251538Srpaulo else if (len > 4) 3821251538Srpaulo mlen = 4; 3822251538Srpaulo else 3823251538Srpaulo mlen = 1; 3824251538Srpaulo /* XXX fix this deconst */ 3825281069Srpaulo error = urtwn_write_region_1(sc, off, 3826251538Srpaulo __DECONST(uint8_t *, buf), mlen); 3827291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3828251538Srpaulo break; 3829251538Srpaulo off += mlen; 3830251538Srpaulo buf += mlen; 3831251538Srpaulo len -= mlen; 3832251538Srpaulo } 3833251538Srpaulo return (error); 3834251538Srpaulo} 3835251538Srpaulo 3836251538Srpaulostatic int 3837251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 3838251538Srpaulo{ 3839251538Srpaulo const struct firmware *fw; 3840251538Srpaulo const struct r92c_fw_hdr *hdr; 3841251538Srpaulo const char *imagename; 3842251538Srpaulo const u_char *ptr; 3843251538Srpaulo size_t len; 3844251538Srpaulo uint32_t reg; 3845251538Srpaulo int mlen, ntries, page, error; 3846251538Srpaulo 3847264864Skevlo URTWN_UNLOCK(sc); 3848251538Srpaulo /* Read firmware image from the filesystem. */ 3849264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3850264912Skevlo imagename = "urtwn-rtl8188eufw"; 3851264912Skevlo else if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3852264912Skevlo URTWN_CHIP_UMC_A_CUT) 3853251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 3854251538Srpaulo else 3855251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 3856251538Srpaulo 3857251538Srpaulo fw = firmware_get(imagename); 3858264864Skevlo URTWN_LOCK(sc); 3859251538Srpaulo if (fw == NULL) { 3860251538Srpaulo device_printf(sc->sc_dev, 3861251538Srpaulo "failed loadfirmware of file %s\n", imagename); 3862251538Srpaulo return (ENOENT); 3863251538Srpaulo } 3864251538Srpaulo 3865251538Srpaulo len = fw->datasize; 3866251538Srpaulo 3867251538Srpaulo if (len < sizeof(*hdr)) { 3868251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 3869251538Srpaulo error = EINVAL; 3870251538Srpaulo goto fail; 3871251538Srpaulo } 3872251538Srpaulo ptr = fw->data; 3873251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 3874251538Srpaulo /* Check if there is a valid FW header and skip it. */ 3875251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 3876264912Skevlo (le16toh(hdr->signature) >> 4) == 0x88e || 3877251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 3878294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, 3879294471Savos "FW V%d.%d %02d-%02d %02d:%02d\n", 3880251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 3881251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 3882251538Srpaulo ptr += sizeof(*hdr); 3883251538Srpaulo len -= sizeof(*hdr); 3884251538Srpaulo } 3885251538Srpaulo 3886264912Skevlo if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) { 3887264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3888264912Skevlo urtwn_r88e_fw_reset(sc); 3889264912Skevlo else 3890264912Skevlo urtwn_fw_reset(sc); 3891251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 3892251538Srpaulo } 3893264912Skevlo 3894268487Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3895268487Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3896268487Skevlo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3897268487Skevlo R92C_SYS_FUNC_EN_CPUEN); 3898268487Skevlo } 3899251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3900251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 3901251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 3902251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 3903251538Srpaulo 3904263154Skevlo /* Reset the FWDL checksum. */ 3905263154Skevlo urtwn_write_1(sc, R92C_MCUFWDL, 3906263154Skevlo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 3907263154Skevlo 3908251538Srpaulo for (page = 0; len > 0; page++) { 3909251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 3910251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 3911251538Srpaulo if (error != 0) { 3912251538Srpaulo device_printf(sc->sc_dev, 3913251538Srpaulo "could not load firmware page\n"); 3914251538Srpaulo goto fail; 3915251538Srpaulo } 3916251538Srpaulo ptr += mlen; 3917251538Srpaulo len -= mlen; 3918251538Srpaulo } 3919251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3920251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 3921251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 3922251538Srpaulo 3923251538Srpaulo /* Wait for checksum report. */ 3924251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3925251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 3926251538Srpaulo break; 3927266472Shselasky urtwn_ms_delay(sc); 3928251538Srpaulo } 3929251538Srpaulo if (ntries == 1000) { 3930251538Srpaulo device_printf(sc->sc_dev, 3931251538Srpaulo "timeout waiting for checksum report\n"); 3932251538Srpaulo error = ETIMEDOUT; 3933251538Srpaulo goto fail; 3934251538Srpaulo } 3935251538Srpaulo 3936251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3937251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 3938251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3939264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3940264912Skevlo urtwn_r88e_fw_reset(sc); 3941251538Srpaulo /* Wait for firmware readiness. */ 3942251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3943251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 3944251538Srpaulo break; 3945266472Shselasky urtwn_ms_delay(sc); 3946251538Srpaulo } 3947251538Srpaulo if (ntries == 1000) { 3948251538Srpaulo device_printf(sc->sc_dev, 3949251538Srpaulo "timeout waiting for firmware readiness\n"); 3950251538Srpaulo error = ETIMEDOUT; 3951251538Srpaulo goto fail; 3952251538Srpaulo } 3953251538Srpaulofail: 3954251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 3955251538Srpaulo return (error); 3956251538Srpaulo} 3957295871Savos#endif 3958251538Srpaulo 3959291902Skevlostatic int 3960251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 3961251538Srpaulo{ 3962291902Skevlo struct usb_endpoint *ep, *ep_end; 3963291698Savos usb_error_t usb_err; 3964291902Skevlo uint32_t reg; 3965291902Skevlo int hashq, hasnq, haslq, nqueues, ntx; 3966291902Skevlo int error, pagecount, npubqpages, nqpages, nrempages, tx_boundary; 3967281069Srpaulo 3968291695Savos /* Initialize LLT table. */ 3969291695Savos error = urtwn_llt_init(sc); 3970291695Savos if (error != 0) 3971291695Savos return (error); 3972291695Savos 3973291902Skevlo /* Determine the number of bulk-out pipes. */ 3974291902Skevlo ntx = 0; 3975291902Skevlo ep = sc->sc_udev->endpoints; 3976291902Skevlo ep_end = sc->sc_udev->endpoints + sc->sc_udev->endpoints_max; 3977291902Skevlo for (; ep != ep_end; ep++) { 3978291902Skevlo if ((ep->edesc == NULL) || 3979291902Skevlo (ep->iface_index != sc->sc_iface_index)) 3980291902Skevlo continue; 3981291902Skevlo if (UE_GET_DIR(ep->edesc->bEndpointAddress) == UE_DIR_OUT) 3982291902Skevlo ntx++; 3983291902Skevlo } 3984291902Skevlo if (ntx == 0) { 3985291902Skevlo device_printf(sc->sc_dev, 3986291902Skevlo "%d: invalid number of Tx bulk pipes\n", ntx); 3987291698Savos return (EIO); 3988291902Skevlo } 3989291695Savos 3990251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 3991291902Skevlo hashq = hasnq = haslq = nqueues = 0; 3992291902Skevlo switch (ntx) { 3993291902Skevlo case 1: hashq = 1; break; 3994291902Skevlo case 2: hashq = hasnq = 1; break; 3995291902Skevlo case 3: case 4: hashq = hasnq = haslq = 1; break; 3996291902Skevlo } 3997251538Srpaulo nqueues = hashq + hasnq + haslq; 3998251538Srpaulo if (nqueues == 0) 3999251538Srpaulo return (EIO); 4000251538Srpaulo 4001291902Skevlo npubqpages = nqpages = nrempages = pagecount = 0; 4002291902Skevlo if (sc->chip & URTWN_CHIP_88E) 4003291902Skevlo tx_boundary = R88E_TX_PAGE_BOUNDARY; 4004291902Skevlo else { 4005291902Skevlo pagecount = R92C_TX_PAGE_COUNT; 4006291902Skevlo npubqpages = R92C_PUBQ_NPAGES; 4007291902Skevlo tx_boundary = R92C_TX_PAGE_BOUNDARY; 4008291902Skevlo } 4009291902Skevlo 4010251538Srpaulo /* Set number of pages for normal priority queue. */ 4011291902Skevlo if (sc->chip & URTWN_CHIP_88E) { 4012291902Skevlo usb_err = urtwn_write_2(sc, R92C_RQPN_NPQ, 0xd); 4013291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4014291902Skevlo return (EIO); 4015291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 0x808e000d); 4016291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4017291902Skevlo return (EIO); 4018291902Skevlo } else { 4019291902Skevlo /* Get the number of pages for each queue. */ 4020291902Skevlo nqpages = (pagecount - npubqpages) / nqueues; 4021291902Skevlo /* 4022291902Skevlo * The remaining pages are assigned to the high priority 4023291902Skevlo * queue. 4024291902Skevlo */ 4025291902Skevlo nrempages = (pagecount - npubqpages) % nqueues; 4026291902Skevlo usb_err = urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 4027291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4028291902Skevlo return (EIO); 4029291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 4030291902Skevlo /* Set number of pages for public queue. */ 4031291902Skevlo SM(R92C_RQPN_PUBQ, npubqpages) | 4032291902Skevlo /* Set number of pages for high priority queue. */ 4033291902Skevlo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 4034291902Skevlo /* Set number of pages for low priority queue. */ 4035291902Skevlo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 4036291902Skevlo /* Load values. */ 4037291902Skevlo R92C_RQPN_LD); 4038291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4039291902Skevlo return (EIO); 4040291902Skevlo } 4041251538Srpaulo 4042291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary); 4043291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4044291698Savos return (EIO); 4045291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary); 4046291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4047291698Savos return (EIO); 4048291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary); 4049291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4050291698Savos return (EIO); 4051291902Skevlo usb_err = urtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary); 4052291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4053291698Savos return (EIO); 4054291902Skevlo usb_err = urtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary); 4055291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4056291698Savos return (EIO); 4057251538Srpaulo 4058251538Srpaulo /* Set queue to USB pipe mapping. */ 4059251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 4060251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 4061251538Srpaulo if (nqueues == 1) { 4062251538Srpaulo if (hashq) 4063251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 4064251538Srpaulo else if (hasnq) 4065251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 4066251538Srpaulo else 4067251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 4068251538Srpaulo } else if (nqueues == 2) { 4069292056Skevlo /* 4070292056Skevlo * All 2-endpoints configs have high and normal 4071292056Skevlo * priority queues. 4072292056Skevlo */ 4073292056Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 4074251538Srpaulo } else 4075251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 4076291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 4077291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4078291698Savos return (EIO); 4079251538Srpaulo 4080251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 4081291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 4082291902Skevlo (sc->chip & URTWN_CHIP_88E) ? 0x23ff : 0x27ff); 4083291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4084291698Savos return (EIO); 4085251538Srpaulo 4086291902Skevlo /* Set Tx/Rx transfer page size. */ 4087291902Skevlo usb_err = urtwn_write_1(sc, R92C_PBP, 4088291902Skevlo SM(R92C_PBP_PSRX, R92C_PBP_128) | 4089291902Skevlo SM(R92C_PBP_PSTX, R92C_PBP_128)); 4090291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4091264912Skevlo return (EIO); 4092264912Skevlo 4093264912Skevlo return (0); 4094264912Skevlo} 4095264912Skevlo 4096291698Savosstatic int 4097251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 4098251538Srpaulo{ 4099291698Savos usb_error_t error; 4100251538Srpaulo int i; 4101251538Srpaulo 4102251538Srpaulo /* Write MAC initialization values. */ 4103264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4104264912Skevlo for (i = 0; i < nitems(rtl8188eu_mac); i++) { 4105291698Savos error = urtwn_write_1(sc, rtl8188eu_mac[i].reg, 4106264912Skevlo rtl8188eu_mac[i].val); 4107291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4108291698Savos return (EIO); 4109264912Skevlo } 4110264912Skevlo urtwn_write_1(sc, R92C_MAX_AGGR_NUM, 0x07); 4111264912Skevlo } else { 4112264912Skevlo for (i = 0; i < nitems(rtl8192cu_mac); i++) 4113291698Savos error = urtwn_write_1(sc, rtl8192cu_mac[i].reg, 4114264912Skevlo rtl8192cu_mac[i].val); 4115291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4116291698Savos return (EIO); 4117264912Skevlo } 4118291698Savos 4119291698Savos return (0); 4120251538Srpaulo} 4121251538Srpaulo 4122251538Srpaulostatic void 4123251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 4124251538Srpaulo{ 4125251538Srpaulo const struct urtwn_bb_prog *prog; 4126251538Srpaulo uint32_t reg; 4127264912Skevlo uint8_t crystalcap; 4128251538Srpaulo int i; 4129251538Srpaulo 4130251538Srpaulo /* Enable BB and RF. */ 4131251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 4132251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 4133251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 4134251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 4135251538Srpaulo 4136264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 4137264912Skevlo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 4138251538Srpaulo 4139251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 4140251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 4141251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 4142251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 4143251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 4144251538Srpaulo 4145264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4146264912Skevlo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 4147264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 4148264912Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 4149264912Skevlo } 4150251538Srpaulo 4151251538Srpaulo /* Select BB programming based on board type. */ 4152264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4153264912Skevlo prog = &rtl8188eu_bb_prog; 4154264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4155251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4156251538Srpaulo prog = &rtl8188ce_bb_prog; 4157251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4158251538Srpaulo prog = &rtl8188ru_bb_prog; 4159251538Srpaulo else 4160251538Srpaulo prog = &rtl8188cu_bb_prog; 4161251538Srpaulo } else { 4162251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4163251538Srpaulo prog = &rtl8192ce_bb_prog; 4164251538Srpaulo else 4165251538Srpaulo prog = &rtl8192cu_bb_prog; 4166251538Srpaulo } 4167251538Srpaulo /* Write BB initialization values. */ 4168251538Srpaulo for (i = 0; i < prog->count; i++) { 4169251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 4170266472Shselasky urtwn_ms_delay(sc); 4171251538Srpaulo } 4172251538Srpaulo 4173251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 4174251538Srpaulo /* 8192C 1T only configuration. */ 4175251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 4176251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 4177251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 4178251538Srpaulo 4179251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 4180251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 4181251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 4182251538Srpaulo 4183251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 4184251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 4185251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 4186251538Srpaulo 4187251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 4188251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 4189251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 4190251538Srpaulo 4191251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 4192251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 4193251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 4194251538Srpaulo 4195251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 4196251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4197251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 4198251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 4199251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4200251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 4201251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 4202251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4203251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 4204251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 4205251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4206251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 4207251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 4208251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4209251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 4210251538Srpaulo } 4211251538Srpaulo 4212251538Srpaulo /* Write AGC values. */ 4213251538Srpaulo for (i = 0; i < prog->agccount; i++) { 4214251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 4215251538Srpaulo prog->agcvals[i]); 4216266472Shselasky urtwn_ms_delay(sc); 4217251538Srpaulo } 4218251538Srpaulo 4219264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4220264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422); 4221266472Shselasky urtwn_ms_delay(sc); 4222264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420); 4223266472Shselasky urtwn_ms_delay(sc); 4224264912Skevlo 4225294198Savos crystalcap = sc->rom.r88e_rom.crystalcap; 4226264912Skevlo if (crystalcap == 0xff) 4227264912Skevlo crystalcap = 0x20; 4228264912Skevlo crystalcap &= 0x3f; 4229264912Skevlo reg = urtwn_bb_read(sc, R92C_AFE_XTAL_CTRL); 4230264912Skevlo urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL, 4231264912Skevlo RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 4232264912Skevlo crystalcap | crystalcap << 6)); 4233264912Skevlo } else { 4234264912Skevlo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 4235264912Skevlo R92C_HSSI_PARAM2_CCK_HIPWR) 4236264912Skevlo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 4237264912Skevlo } 4238251538Srpaulo} 4239251538Srpaulo 4240289066Skevlostatic void 4241251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 4242251538Srpaulo{ 4243251538Srpaulo const struct urtwn_rf_prog *prog; 4244251538Srpaulo uint32_t reg, type; 4245251538Srpaulo int i, j, idx, off; 4246251538Srpaulo 4247251538Srpaulo /* Select RF programming based on board type. */ 4248264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4249264912Skevlo prog = rtl8188eu_rf_prog; 4250264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4251251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4252251538Srpaulo prog = rtl8188ce_rf_prog; 4253251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4254251538Srpaulo prog = rtl8188ru_rf_prog; 4255251538Srpaulo else 4256251538Srpaulo prog = rtl8188cu_rf_prog; 4257251538Srpaulo } else 4258251538Srpaulo prog = rtl8192ce_rf_prog; 4259251538Srpaulo 4260251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4261251538Srpaulo /* Save RF_ENV control type. */ 4262251538Srpaulo idx = i / 2; 4263251538Srpaulo off = (i % 2) * 16; 4264251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4265251538Srpaulo type = (reg >> off) & 0x10; 4266251538Srpaulo 4267251538Srpaulo /* Set RF_ENV enable. */ 4268251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4269251538Srpaulo reg |= 0x100000; 4270251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4271266472Shselasky urtwn_ms_delay(sc); 4272251538Srpaulo /* Set RF_ENV output high. */ 4273251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4274251538Srpaulo reg |= 0x10; 4275251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4276266472Shselasky urtwn_ms_delay(sc); 4277251538Srpaulo /* Set address and data lengths of RF registers. */ 4278251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4279251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 4280251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4281266472Shselasky urtwn_ms_delay(sc); 4282251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4283251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 4284251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4285266472Shselasky urtwn_ms_delay(sc); 4286251538Srpaulo 4287251538Srpaulo /* Write RF initialization values for this chain. */ 4288251538Srpaulo for (j = 0; j < prog[i].count; j++) { 4289251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 4290251538Srpaulo prog[i].regs[j] <= 0xfe) { 4291251538Srpaulo /* 4292251538Srpaulo * These are fake RF registers offsets that 4293251538Srpaulo * indicate a delay is required. 4294251538Srpaulo */ 4295266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 20); /* 50ms */ 4296251538Srpaulo continue; 4297251538Srpaulo } 4298251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 4299251538Srpaulo prog[i].vals[j]); 4300266472Shselasky urtwn_ms_delay(sc); 4301251538Srpaulo } 4302251538Srpaulo 4303251538Srpaulo /* Restore RF_ENV control type. */ 4304251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4305251538Srpaulo reg &= ~(0x10 << off) | (type << off); 4306251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 4307251538Srpaulo 4308251538Srpaulo /* Cache RF register CHNLBW. */ 4309251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 4310251538Srpaulo } 4311251538Srpaulo 4312251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 4313251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 4314251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 4315251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 4316251538Srpaulo } 4317251538Srpaulo} 4318251538Srpaulo 4319251538Srpaulostatic void 4320251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 4321251538Srpaulo{ 4322251538Srpaulo /* Invalidate all CAM entries. */ 4323251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 4324251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 4325251538Srpaulo} 4326251538Srpaulo 4327292175Savosstatic int 4328292175Savosurtwn_cam_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 4329292175Savos{ 4330292175Savos usb_error_t error; 4331292175Savos 4332292175Savos error = urtwn_write_4(sc, R92C_CAMWRITE, data); 4333292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4334292175Savos return (EIO); 4335292175Savos error = urtwn_write_4(sc, R92C_CAMCMD, 4336292175Savos R92C_CAMCMD_POLLING | R92C_CAMCMD_WRITE | 4337292175Savos SM(R92C_CAMCMD_ADDR, addr)); 4338292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4339292175Savos return (EIO); 4340292175Savos 4341292175Savos return (0); 4342292175Savos} 4343292175Savos 4344251538Srpaulostatic void 4345251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 4346251538Srpaulo{ 4347251538Srpaulo uint8_t reg; 4348251538Srpaulo int i; 4349251538Srpaulo 4350251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4351251538Srpaulo if (sc->pa_setting & (1 << i)) 4352251538Srpaulo continue; 4353251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 4354251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 4355251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 4356251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 4357251538Srpaulo } 4358251538Srpaulo if (!(sc->pa_setting & 0x10)) { 4359251538Srpaulo reg = urtwn_read_1(sc, 0x16); 4360251538Srpaulo reg = (reg & ~0xf0) | 0x90; 4361251538Srpaulo urtwn_write_1(sc, 0x16, reg); 4362251538Srpaulo } 4363251538Srpaulo} 4364251538Srpaulo 4365251538Srpaulostatic void 4366251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 4367251538Srpaulo{ 4368290564Savos struct ieee80211com *ic = &sc->sc_ic; 4369290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4370290564Savos uint32_t rcr; 4371290564Savos uint16_t filter; 4372290564Savos 4373290564Savos URTWN_ASSERT_LOCKED(sc); 4374290564Savos 4375299965Savos /* Setup multicast filter. */ 4376299965Savos urtwn_set_multi(sc); 4377290564Savos 4378290564Savos /* Filter for management frames. */ 4379290564Savos filter = 0x7f3f; 4380290631Savos switch (vap->iv_opmode) { 4381290631Savos case IEEE80211_M_STA: 4382290564Savos filter &= ~( 4383290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | 4384290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | 4385290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); 4386290631Savos break; 4387290631Savos case IEEE80211_M_HOSTAP: 4388290631Savos filter &= ~( 4389290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | 4390296174Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP)); 4391290631Savos break; 4392290631Savos case IEEE80211_M_MONITOR: 4393290651Savos case IEEE80211_M_IBSS: 4394290631Savos break; 4395290631Savos default: 4396290631Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4397290631Savos __func__, vap->iv_opmode); 4398290631Savos break; 4399290564Savos } 4400290564Savos urtwn_write_2(sc, R92C_RXFLTMAP0, filter); 4401290564Savos 4402251538Srpaulo /* Reject all control frames. */ 4403251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 4404290564Savos 4405290564Savos /* Reject all data frames. */ 4406290564Savos urtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); 4407290564Savos 4408290564Savos rcr = R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | 4409290564Savos R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | 4410290564Savos R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; 4411290564Savos 4412290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) { 4413290564Savos /* Accept all frames. */ 4414290564Savos rcr |= R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | 4415290564Savos R92C_RCR_AAP; 4416290564Savos } 4417290564Savos 4418290564Savos /* Set Rx filter. */ 4419290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4420290564Savos 4421290564Savos if (ic->ic_promisc != 0) { 4422290564Savos /* Update Rx filter. */ 4423290564Savos urtwn_set_promisc(sc); 4424290564Savos } 4425251538Srpaulo} 4426251538Srpaulo 4427251538Srpaulostatic void 4428251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 4429251538Srpaulo{ 4430251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 4431251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 4432251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 4433251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 4434251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 4435251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 4436251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 4437251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 4438251538Srpaulo} 4439251538Srpaulo 4440289066Skevlostatic void 4441251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 4442251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4443251538Srpaulo{ 4444251538Srpaulo uint32_t reg; 4445251538Srpaulo 4446251538Srpaulo /* Write per-CCK rate Tx power. */ 4447251538Srpaulo if (chain == 0) { 4448251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 4449251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 4450251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 4451251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4452251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 4453251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 4454251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 4455251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4456251538Srpaulo } else { 4457251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 4458251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 4459251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 4460251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 4461251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 4462251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4463251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 4464251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4465251538Srpaulo } 4466251538Srpaulo /* Write per-OFDM rate Tx power. */ 4467251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 4468251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 4469251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 4470251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 4471251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 4472251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 4473251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 4474251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 4475251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 4476251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 4477251538Srpaulo /* Write per-MCS Tx power. */ 4478251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 4479251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 4480251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 4481251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 4482251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 4483251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 4484251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 4485251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 4486251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 4487251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 4488251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 4489251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 4490261506Skevlo SM(R92C_TXAGC_MCS09, power[21]) | 4491251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 4492251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 4493251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 4494251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 4495251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 4496251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 4497251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 4498251538Srpaulo} 4499251538Srpaulo 4500289066Skevlostatic void 4501251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 4502251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4503251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4504251538Srpaulo{ 4505287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4506291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 4507251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 4508251538Srpaulo const struct urtwn_txpwr *base; 4509251538Srpaulo int ridx, chan, group; 4510251538Srpaulo 4511251538Srpaulo /* Determine channel group. */ 4512251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4513251538Srpaulo if (chan <= 3) 4514251538Srpaulo group = 0; 4515251538Srpaulo else if (chan <= 9) 4516251538Srpaulo group = 1; 4517251538Srpaulo else 4518251538Srpaulo group = 2; 4519251538Srpaulo 4520251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 4521251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 4522251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4523251538Srpaulo base = &rtl8188ru_txagc[chain]; 4524251538Srpaulo else 4525251538Srpaulo base = &rtl8192cu_txagc[chain]; 4526251538Srpaulo } else 4527251538Srpaulo base = &rtl8192cu_txagc[chain]; 4528251538Srpaulo 4529251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4530251538Srpaulo if (sc->regulatory == 0) { 4531289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4532251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4533251538Srpaulo } 4534289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4535251538Srpaulo if (sc->regulatory == 3) { 4536251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4537251538Srpaulo /* Apply vendor limits. */ 4538251538Srpaulo if (extc != NULL) 4539251538Srpaulo max = rom->ht40_max_pwr[group]; 4540251538Srpaulo else 4541251538Srpaulo max = rom->ht20_max_pwr[group]; 4542251538Srpaulo max = (max >> (chain * 4)) & 0xf; 4543251538Srpaulo if (power[ridx] > max) 4544251538Srpaulo power[ridx] = max; 4545251538Srpaulo } else if (sc->regulatory == 1) { 4546251538Srpaulo if (extc == NULL) 4547251538Srpaulo power[ridx] = base->pwr[group][ridx]; 4548251538Srpaulo } else if (sc->regulatory != 2) 4549251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4550251538Srpaulo } 4551251538Srpaulo 4552251538Srpaulo /* Compute per-CCK rate Tx power. */ 4553251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 4554289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4555251538Srpaulo power[ridx] += cckpow; 4556251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4557251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4558251538Srpaulo } 4559251538Srpaulo 4560251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 4561251538Srpaulo if (sc->ntxchains > 1) { 4562251538Srpaulo /* Apply reduction for 2 spatial streams. */ 4563251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 4564251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4565251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 4566251538Srpaulo } 4567251538Srpaulo 4568251538Srpaulo /* Compute per-OFDM rate Tx power. */ 4569251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 4570251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4571251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 4572289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4573251538Srpaulo power[ridx] += ofdmpow; 4574251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4575251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4576251538Srpaulo } 4577251538Srpaulo 4578251538Srpaulo /* Compute per-MCS Tx power. */ 4579251538Srpaulo if (extc == NULL) { 4580251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 4581251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4582251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 4583251538Srpaulo } 4584251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 4585251538Srpaulo power[ridx] += htpow; 4586251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4587251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4588251538Srpaulo } 4589294471Savos#ifdef USB_DEBUG 4590294471Savos if (sc->sc_debug & URTWN_DEBUG_TXPWR) { 4591251538Srpaulo /* Dump per-rate Tx power values. */ 4592251538Srpaulo printf("Tx power for chain %d:\n", chain); 4593289758Savos for (ridx = URTWN_RIDX_CCK1; ridx < URTWN_RIDX_COUNT; ridx++) 4594251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 4595251538Srpaulo } 4596251538Srpaulo#endif 4597251538Srpaulo} 4598251538Srpaulo 4599289066Skevlostatic void 4600264912Skevlourtwn_r88e_get_txpower(struct urtwn_softc *sc, int chain, 4601264912Skevlo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4602264912Skevlo uint16_t power[URTWN_RIDX_COUNT]) 4603264912Skevlo{ 4604287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4605294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 4606264912Skevlo uint16_t cckpow, ofdmpow, bw20pow, htpow; 4607264912Skevlo const struct urtwn_r88e_txpwr *base; 4608264912Skevlo int ridx, chan, group; 4609264912Skevlo 4610264912Skevlo /* Determine channel group. */ 4611264912Skevlo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4612264912Skevlo if (chan <= 2) 4613264912Skevlo group = 0; 4614264912Skevlo else if (chan <= 5) 4615264912Skevlo group = 1; 4616264912Skevlo else if (chan <= 8) 4617264912Skevlo group = 2; 4618264912Skevlo else if (chan <= 11) 4619264912Skevlo group = 3; 4620264912Skevlo else if (chan <= 13) 4621264912Skevlo group = 4; 4622264912Skevlo else 4623264912Skevlo group = 5; 4624264912Skevlo 4625264912Skevlo /* Get original Tx power based on board type and RF chain. */ 4626264912Skevlo base = &rtl8188eu_txagc[chain]; 4627264912Skevlo 4628264912Skevlo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4629264912Skevlo if (sc->regulatory == 0) { 4630289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4631264912Skevlo power[ridx] = base->pwr[0][ridx]; 4632264912Skevlo } 4633289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4634264912Skevlo if (sc->regulatory == 3) 4635264912Skevlo power[ridx] = base->pwr[0][ridx]; 4636264912Skevlo else if (sc->regulatory == 1) { 4637264912Skevlo if (extc == NULL) 4638264912Skevlo power[ridx] = base->pwr[group][ridx]; 4639264912Skevlo } else if (sc->regulatory != 2) 4640264912Skevlo power[ridx] = base->pwr[0][ridx]; 4641264912Skevlo } 4642264912Skevlo 4643264912Skevlo /* Compute per-CCK rate Tx power. */ 4644294198Savos cckpow = rom->cck_tx_pwr[group]; 4645289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4646264912Skevlo power[ridx] += cckpow; 4647264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4648264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4649264912Skevlo } 4650264912Skevlo 4651294198Savos htpow = rom->ht40_tx_pwr[group]; 4652264912Skevlo 4653264912Skevlo /* Compute per-OFDM rate Tx power. */ 4654264912Skevlo ofdmpow = htpow + sc->ofdm_tx_pwr_diff; 4655289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4656264912Skevlo power[ridx] += ofdmpow; 4657264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4658264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4659264912Skevlo } 4660264912Skevlo 4661264912Skevlo bw20pow = htpow + sc->bw20_tx_pwr_diff; 4662264912Skevlo for (ridx = 12; ridx <= 27; ridx++) { 4663264912Skevlo power[ridx] += bw20pow; 4664264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4665264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4666264912Skevlo } 4667264912Skevlo} 4668264912Skevlo 4669289066Skevlostatic void 4670251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 4671251538Srpaulo struct ieee80211_channel *extc) 4672251538Srpaulo{ 4673251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 4674251538Srpaulo int i; 4675251538Srpaulo 4676251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 4677251538Srpaulo /* Compute per-rate Tx power values. */ 4678264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4679264912Skevlo urtwn_r88e_get_txpower(sc, i, c, extc, power); 4680264912Skevlo else 4681264912Skevlo urtwn_get_txpower(sc, i, c, extc, power); 4682251538Srpaulo /* Write per-rate Tx power values to hardware. */ 4683251538Srpaulo urtwn_write_txpower(sc, i, power); 4684251538Srpaulo } 4685251538Srpaulo} 4686251538Srpaulo 4687251538Srpaulostatic void 4688290048Savosurtwn_set_rx_bssid_all(struct urtwn_softc *sc, int enable) 4689290048Savos{ 4690290048Savos uint32_t reg; 4691290048Savos 4692290048Savos reg = urtwn_read_4(sc, R92C_RCR); 4693290048Savos if (enable) 4694290048Savos reg &= ~R92C_RCR_CBSSID_BCN; 4695290048Savos else 4696290048Savos reg |= R92C_RCR_CBSSID_BCN; 4697290048Savos urtwn_write_4(sc, R92C_RCR, reg); 4698290048Savos} 4699290048Savos 4700290048Savosstatic void 4701290048Savosurtwn_set_gain(struct urtwn_softc *sc, uint8_t gain) 4702290048Savos{ 4703290048Savos uint32_t reg; 4704290048Savos 4705290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 4706290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4707290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 4708290048Savos 4709290048Savos if (!(sc->chip & URTWN_CHIP_88E)) { 4710290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 4711290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4712290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 4713290048Savos } 4714290048Savos} 4715290048Savos 4716290048Savosstatic void 4717251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 4718251538Srpaulo{ 4719290048Savos struct urtwn_softc *sc = ic->ic_softc; 4720290048Savos 4721290048Savos URTWN_LOCK(sc); 4722290048Savos /* Receive beacons / probe responses from any BSSID. */ 4723290651Savos if (ic->ic_opmode != IEEE80211_M_IBSS) 4724290651Savos urtwn_set_rx_bssid_all(sc, 1); 4725290651Savos 4726290048Savos /* Set gain for scanning. */ 4727290048Savos urtwn_set_gain(sc, 0x20); 4728290048Savos URTWN_UNLOCK(sc); 4729251538Srpaulo} 4730251538Srpaulo 4731251538Srpaulostatic void 4732251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 4733251538Srpaulo{ 4734290048Savos struct urtwn_softc *sc = ic->ic_softc; 4735290048Savos 4736290048Savos URTWN_LOCK(sc); 4737290048Savos /* Restore limitations. */ 4738290651Savos if (ic->ic_promisc == 0 && ic->ic_opmode != IEEE80211_M_IBSS) 4739290564Savos urtwn_set_rx_bssid_all(sc, 0); 4740290651Savos 4741290048Savos /* Set gain under link. */ 4742290048Savos urtwn_set_gain(sc, 0x32); 4743290048Savos URTWN_UNLOCK(sc); 4744251538Srpaulo} 4745251538Srpaulo 4746251538Srpaulostatic void 4747251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 4748251538Srpaulo{ 4749286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4750292173Savos struct ieee80211_channel *c = ic->ic_curchan; 4751281070Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4752251538Srpaulo 4753251538Srpaulo URTWN_LOCK(sc); 4754281070Srpaulo if (vap->iv_state == IEEE80211_S_SCAN) { 4755281070Srpaulo /* Make link LED blink during scan. */ 4756281070Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 4757281070Srpaulo } 4758292173Savos urtwn_set_chan(sc, c, NULL); 4759292173Savos sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq); 4760292173Savos sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags); 4761292173Savos sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq); 4762292173Savos sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags); 4763251538Srpaulo URTWN_UNLOCK(sc); 4764251538Srpaulo} 4765251538Srpaulo 4766292014Savosstatic int 4767292014Savosurtwn_wme_update(struct ieee80211com *ic) 4768292014Savos{ 4769292014Savos const struct wmeParams *wmep = 4770292014Savos ic->ic_wme.wme_chanParams.cap_wmeParams; 4771292014Savos struct urtwn_softc *sc = ic->ic_softc; 4772292014Savos uint8_t aifs, acm, slottime; 4773292014Savos int ac; 4774292014Savos 4775292014Savos acm = 0; 4776292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4777292014Savos 4778292014Savos URTWN_LOCK(sc); 4779292014Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4780292014Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4781292014Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4782292014Savos urtwn_write_4(sc, wme2queue[ac].reg, 4783292014Savos SM(R92C_EDCA_PARAM_TXOP, wmep[ac].wmep_txopLimit) | 4784292014Savos SM(R92C_EDCA_PARAM_ECWMIN, wmep[ac].wmep_logcwmin) | 4785292014Savos SM(R92C_EDCA_PARAM_ECWMAX, wmep[ac].wmep_logcwmax) | 4786292014Savos SM(R92C_EDCA_PARAM_AIFS, aifs)); 4787292014Savos if (ac != WME_AC_BE) 4788292014Savos acm |= wmep[ac].wmep_acm << ac; 4789292014Savos } 4790292014Savos 4791292014Savos if (acm != 0) 4792292014Savos acm |= R92C_ACMHWCTRL_EN; 4793292014Savos urtwn_write_1(sc, R92C_ACMHWCTRL, 4794292014Savos (urtwn_read_1(sc, R92C_ACMHWCTRL) & ~R92C_ACMHWCTRL_ACM_MASK) | 4795292014Savos acm); 4796292014Savos 4797292014Savos URTWN_UNLOCK(sc); 4798292014Savos 4799292014Savos return 0; 4800292014Savos} 4801292014Savos 4802251538Srpaulostatic void 4803294465Savosurtwn_update_slot(struct ieee80211com *ic) 4804294465Savos{ 4805294465Savos urtwn_cmd_sleepable(ic->ic_softc, NULL, 0, urtwn_update_slot_cb); 4806294465Savos} 4807294465Savos 4808294465Savosstatic void 4809294465Savosurtwn_update_slot_cb(struct urtwn_softc *sc, union sec_param *data) 4810294465Savos{ 4811294465Savos struct ieee80211com *ic = &sc->sc_ic; 4812294465Savos uint8_t slottime; 4813294465Savos 4814294465Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4815294465Savos 4816294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ANY, "%s: setting slot time to %uus\n", 4817294471Savos __func__, slottime); 4818294465Savos 4819294465Savos urtwn_write_1(sc, R92C_SLOT, slottime); 4820294465Savos urtwn_update_aifs(sc, slottime); 4821294465Savos} 4822294465Savos 4823294465Savosstatic void 4824294465Savosurtwn_update_aifs(struct urtwn_softc *sc, uint8_t slottime) 4825294465Savos{ 4826294465Savos const struct wmeParams *wmep = 4827294465Savos sc->sc_ic.ic_wme.wme_chanParams.cap_wmeParams; 4828294465Savos uint8_t aifs, ac; 4829294465Savos 4830294465Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4831294465Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4832294465Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4833294465Savos urtwn_write_1(sc, wme2queue[ac].reg, aifs); 4834294465Savos } 4835294465Savos} 4836294465Savos 4837299965Savosstatic uint8_t 4838299965Savosurtwn_get_multi_pos(const uint8_t maddr[]) 4839299965Savos{ 4840299965Savos uint64_t mask = 0x00004d101df481b4; 4841299965Savos uint8_t pos = 0x27; /* initial value */ 4842299965Savos int i, j; 4843299965Savos 4844299965Savos for (i = 0; i < IEEE80211_ADDR_LEN; i++) 4845299965Savos for (j = (i == 0) ? 1 : 0; j < 8; j++) 4846299965Savos if ((maddr[i] >> j) & 1) 4847299965Savos pos ^= (mask >> (i * 8 + j - 1)); 4848299965Savos 4849299965Savos pos &= 0x3f; 4850299965Savos 4851299965Savos return (pos); 4852299965Savos} 4853299965Savos 4854294465Savosstatic void 4855299965Savosurtwn_set_multi(struct urtwn_softc *sc) 4856299965Savos{ 4857299965Savos struct ieee80211com *ic = &sc->sc_ic; 4858299965Savos uint32_t mfilt[2]; 4859299965Savos 4860299965Savos URTWN_ASSERT_LOCKED(sc); 4861299965Savos 4862299965Savos /* general structure was copied from ath(4). */ 4863299965Savos if (ic->ic_allmulti == 0) { 4864299965Savos struct ieee80211vap *vap; 4865299965Savos struct ifnet *ifp; 4866299965Savos struct ifmultiaddr *ifma; 4867299965Savos 4868299965Savos /* 4869299965Savos * Merge multicast addresses to form the hardware filter. 4870299965Savos */ 4871299965Savos mfilt[0] = mfilt[1] = 0; 4872299965Savos TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) { 4873299965Savos ifp = vap->iv_ifp; 4874299965Savos if_maddr_rlock(ifp); 4875299965Savos TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 4876299965Savos caddr_t dl; 4877299965Savos uint8_t pos; 4878299965Savos 4879299965Savos dl = LLADDR((struct sockaddr_dl *) 4880299965Savos ifma->ifma_addr); 4881299965Savos pos = urtwn_get_multi_pos(dl); 4882299965Savos 4883299965Savos mfilt[pos / 32] |= (1 << (pos % 32)); 4884299965Savos } 4885299965Savos if_maddr_runlock(ifp); 4886299965Savos } 4887299965Savos } else 4888299965Savos mfilt[0] = mfilt[1] = ~0; 4889299965Savos 4890299965Savos 4891299965Savos urtwn_write_4(sc, R92C_MAR + 0, mfilt[0]); 4892299965Savos urtwn_write_4(sc, R92C_MAR + 4, mfilt[1]); 4893299965Savos 4894299965Savos URTWN_DPRINTF(sc, URTWN_DEBUG_STATE, "%s: MC filter %08x:%08x\n", 4895299965Savos __func__, mfilt[0], mfilt[1]); 4896299965Savos} 4897299965Savos 4898299965Savosstatic void 4899290564Savosurtwn_set_promisc(struct urtwn_softc *sc) 4900290564Savos{ 4901290564Savos struct ieee80211com *ic = &sc->sc_ic; 4902290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4903290564Savos uint32_t rcr, mask1, mask2; 4904290564Savos 4905290564Savos URTWN_ASSERT_LOCKED(sc); 4906290564Savos 4907290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) 4908290564Savos return; 4909290564Savos 4910290564Savos mask1 = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; 4911290564Savos mask2 = R92C_RCR_APM; 4912290564Savos 4913290564Savos if (vap->iv_state == IEEE80211_S_RUN) { 4914290564Savos switch (vap->iv_opmode) { 4915290564Savos case IEEE80211_M_STA: 4916290631Savos mask2 |= R92C_RCR_CBSSID_DATA; 4917290631Savos /* FALLTHROUGH */ 4918290631Savos case IEEE80211_M_HOSTAP: 4919290631Savos mask2 |= R92C_RCR_CBSSID_BCN; 4920290564Savos break; 4921290651Savos case IEEE80211_M_IBSS: 4922290651Savos mask2 |= R92C_RCR_CBSSID_DATA; 4923290651Savos break; 4924290564Savos default: 4925290564Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4926290564Savos __func__, vap->iv_opmode); 4927290564Savos return; 4928290564Savos } 4929290564Savos } 4930290564Savos 4931290564Savos rcr = urtwn_read_4(sc, R92C_RCR); 4932290564Savos if (ic->ic_promisc == 0) 4933290564Savos rcr = (rcr & ~mask1) | mask2; 4934290564Savos else 4935290564Savos rcr = (rcr & ~mask2) | mask1; 4936290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4937290564Savos} 4938290564Savos 4939290564Savosstatic void 4940290564Savosurtwn_update_promisc(struct ieee80211com *ic) 4941290564Savos{ 4942290564Savos struct urtwn_softc *sc = ic->ic_softc; 4943290564Savos 4944290564Savos URTWN_LOCK(sc); 4945290564Savos if (sc->sc_flags & URTWN_RUNNING) 4946290564Savos urtwn_set_promisc(sc); 4947290564Savos URTWN_UNLOCK(sc); 4948290564Savos} 4949290564Savos 4950290564Savosstatic void 4951283540Sglebiusurtwn_update_mcast(struct ieee80211com *ic) 4952251538Srpaulo{ 4953299965Savos struct urtwn_softc *sc = ic->ic_softc; 4954299965Savos 4955299965Savos URTWN_LOCK(sc); 4956299965Savos if (sc->sc_flags & URTWN_RUNNING) 4957299965Savos urtwn_set_multi(sc); 4958299965Savos URTWN_UNLOCK(sc); 4959251538Srpaulo} 4960251538Srpaulo 4961292167Savosstatic struct ieee80211_node * 4962297910Sadrianurtwn_node_alloc(struct ieee80211vap *vap, 4963292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]) 4964292167Savos{ 4965292167Savos struct urtwn_node *un; 4966292167Savos 4967292167Savos un = malloc(sizeof (struct urtwn_node), M_80211_NODE, 4968292167Savos M_NOWAIT | M_ZERO); 4969292167Savos 4970292167Savos if (un == NULL) 4971292167Savos return NULL; 4972292167Savos 4973292167Savos un->id = URTWN_MACID_UNDEFINED; 4974292167Savos 4975292167Savos return &un->ni; 4976292167Savos} 4977292167Savos 4978251538Srpaulostatic void 4979297910Sadrianurtwn_newassoc(struct ieee80211_node *ni, int isnew) 4980292167Savos{ 4981292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 4982292167Savos struct urtwn_node *un = URTWN_NODE(ni); 4983292167Savos uint8_t id; 4984292167Savos 4985297910Sadrian /* Only do this bit for R88E chips */ 4986297910Sadrian if (! (sc->chip & URTWN_CHIP_88E)) 4987297910Sadrian return; 4988297910Sadrian 4989292167Savos if (!isnew) 4990292167Savos return; 4991292167Savos 4992292167Savos URTWN_NT_LOCK(sc); 4993292167Savos for (id = 0; id <= URTWN_MACID_MAX(sc); id++) { 4994292167Savos if (id != URTWN_MACID_BC && sc->node_list[id] == NULL) { 4995292167Savos un->id = id; 4996292167Savos sc->node_list[id] = ni; 4997292167Savos break; 4998292167Savos } 4999292167Savos } 5000292167Savos URTWN_NT_UNLOCK(sc); 5001292167Savos 5002292167Savos if (id > URTWN_MACID_MAX(sc)) { 5003292167Savos device_printf(sc->sc_dev, "%s: node table is full\n", 5004292167Savos __func__); 5005292167Savos } 5006292167Savos} 5007292167Savos 5008292167Savosstatic void 5009297910Sadrianurtwn_node_free(struct ieee80211_node *ni) 5010292167Savos{ 5011292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 5012292167Savos struct urtwn_node *un = URTWN_NODE(ni); 5013292167Savos 5014292167Savos URTWN_NT_LOCK(sc); 5015292167Savos if (un->id != URTWN_MACID_UNDEFINED) 5016292167Savos sc->node_list[un->id] = NULL; 5017292167Savos URTWN_NT_UNLOCK(sc); 5018292167Savos 5019292167Savos sc->sc_node_free(ni); 5020292167Savos} 5021292167Savos 5022292167Savosstatic void 5023251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 5024251538Srpaulo struct ieee80211_channel *extc) 5025251538Srpaulo{ 5026287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 5027251538Srpaulo uint32_t reg; 5028251538Srpaulo u_int chan; 5029251538Srpaulo int i; 5030251538Srpaulo 5031251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 5032251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 5033251538Srpaulo device_printf(sc->sc_dev, 5034251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 5035251538Srpaulo return; 5036251538Srpaulo } 5037251538Srpaulo 5038251538Srpaulo /* Set Tx power for this new channel. */ 5039251538Srpaulo urtwn_set_txpower(sc, c, extc); 5040251538Srpaulo 5041251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 5042251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 5043251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 5044251538Srpaulo } 5045251538Srpaulo#ifndef IEEE80211_NO_HT 5046251538Srpaulo if (extc != NULL) { 5047251538Srpaulo /* Is secondary channel below or above primary? */ 5048251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 5049251538Srpaulo 5050251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 5051251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 5052251538Srpaulo 5053251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 5054251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 5055251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 5056251538Srpaulo 5057251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 5058251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 5059251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 5060251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 5061251538Srpaulo 5062251538Srpaulo /* Set CCK side band. */ 5063251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 5064251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 5065251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 5066251538Srpaulo 5067251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 5068251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 5069251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 5070251538Srpaulo 5071251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 5072251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 5073251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 5074251538Srpaulo 5075251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 5076251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 5077251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 5078251538Srpaulo 5079251538Srpaulo /* Select 40MHz bandwidth. */ 5080251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5081251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 5082251538Srpaulo } else 5083251538Srpaulo#endif 5084251538Srpaulo { 5085251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 5086251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 5087251538Srpaulo 5088251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 5089251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 5090251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 5091251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 5092251538Srpaulo 5093264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5094264912Skevlo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 5095264912Skevlo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 5096264912Skevlo R92C_FPGA0_ANAPARAM2_CBW20); 5097264912Skevlo } 5098281069Srpaulo 5099251538Srpaulo /* Select 20MHz bandwidth. */ 5100251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5101281069Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan | 5102264912Skevlo ((sc->chip & URTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 : 5103264912Skevlo R92C_RF_CHNLBW_BW20)); 5104251538Srpaulo } 5105251538Srpaulo} 5106251538Srpaulo 5107251538Srpaulostatic void 5108251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 5109251538Srpaulo{ 5110251538Srpaulo /* TODO */ 5111251538Srpaulo} 5112251538Srpaulo 5113251538Srpaulostatic void 5114251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 5115251538Srpaulo{ 5116251538Srpaulo uint32_t rf_ac[2]; 5117251538Srpaulo uint8_t txmode; 5118251538Srpaulo int i; 5119251538Srpaulo 5120251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 5121251538Srpaulo if ((txmode & 0x70) != 0) { 5122251538Srpaulo /* Disable all continuous Tx. */ 5123251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 5124251538Srpaulo 5125251538Srpaulo /* Set RF mode to standby mode. */ 5126251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 5127251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 5128251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 5129251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 5130251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 5131251538Srpaulo } 5132251538Srpaulo } else { 5133251538Srpaulo /* Block all Tx queues. */ 5134293180Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 5135251538Srpaulo } 5136251538Srpaulo /* Start calibration. */ 5137251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5138251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 5139251538Srpaulo 5140251538Srpaulo /* Give calibration the time to complete. */ 5141266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 10); /* 100ms */ 5142251538Srpaulo 5143251538Srpaulo /* Restore configuration. */ 5144251538Srpaulo if ((txmode & 0x70) != 0) { 5145251538Srpaulo /* Restore Tx mode. */ 5146251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 5147251538Srpaulo /* Restore RF mode. */ 5148251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 5149251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 5150251538Srpaulo } else { 5151251538Srpaulo /* Unblock all Tx queues. */ 5152251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 5153251538Srpaulo } 5154251538Srpaulo} 5155251538Srpaulo 5156294473Savosstatic void 5157294473Savosurtwn_temp_calib(struct urtwn_softc *sc) 5158294473Savos{ 5159294473Savos uint8_t temp; 5160294473Savos 5161294473Savos URTWN_ASSERT_LOCKED(sc); 5162294473Savos 5163294473Savos if (!(sc->sc_flags & URTWN_TEMP_MEASURED)) { 5164294473Savos /* Start measuring temperature. */ 5165294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5166294473Savos "%s: start measuring temperature\n", __func__); 5167294473Savos if (sc->chip & URTWN_CHIP_88E) { 5168294473Savos urtwn_rf_write(sc, 0, R88E_RF_T_METER, 5169294473Savos R88E_RF_T_METER_START); 5170294473Savos } else { 5171294473Savos urtwn_rf_write(sc, 0, R92C_RF_T_METER, 5172294473Savos R92C_RF_T_METER_START); 5173294473Savos } 5174294473Savos sc->sc_flags |= URTWN_TEMP_MEASURED; 5175294473Savos return; 5176294473Savos } 5177294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 5178294473Savos 5179294473Savos /* Read measured temperature. */ 5180294473Savos if (sc->chip & URTWN_CHIP_88E) { 5181294473Savos temp = MS(urtwn_rf_read(sc, 0, R88E_RF_T_METER), 5182294473Savos R88E_RF_T_METER_VAL); 5183294473Savos } else { 5184294473Savos temp = MS(urtwn_rf_read(sc, 0, R92C_RF_T_METER), 5185294473Savos R92C_RF_T_METER_VAL); 5186294473Savos } 5187294473Savos if (temp == 0) { /* Read failed, skip. */ 5188294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5189294473Savos "%s: temperature read failed, skipping\n", __func__); 5190294473Savos return; 5191294473Savos } 5192294473Savos 5193294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5194294473Savos "%s: temperature: previous %u, current %u\n", 5195294473Savos __func__, sc->thcal_lctemp, temp); 5196294473Savos 5197294473Savos /* 5198294473Savos * Redo LC calibration if temperature changed significantly since 5199294473Savos * last calibration. 5200294473Savos */ 5201294473Savos if (sc->thcal_lctemp == 0) { 5202294473Savos /* First LC calibration is performed in urtwn_init(). */ 5203294473Savos sc->thcal_lctemp = temp; 5204294473Savos } else if (abs(temp - sc->thcal_lctemp) > 1) { 5205294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5206294473Savos "%s: LC calib triggered by temp: %u -> %u\n", 5207294473Savos __func__, sc->thcal_lctemp, temp); 5208294473Savos urtwn_lc_calib(sc); 5209294473Savos /* Record temperature of last LC calibration. */ 5210294473Savos sc->thcal_lctemp = temp; 5211294473Savos } 5212294473Savos} 5213294473Savos 5214291698Savosstatic int 5215287197Sglebiusurtwn_init(struct urtwn_softc *sc) 5216251538Srpaulo{ 5217287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 5218287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 5219287197Sglebius uint8_t macaddr[IEEE80211_ADDR_LEN]; 5220251538Srpaulo uint32_t reg; 5221291698Savos usb_error_t usb_err = USB_ERR_NORMAL_COMPLETION; 5222251538Srpaulo int error; 5223251538Srpaulo 5224291698Savos URTWN_LOCK(sc); 5225291698Savos if (sc->sc_flags & URTWN_RUNNING) { 5226291698Savos URTWN_UNLOCK(sc); 5227291698Savos return (0); 5228291698Savos } 5229264864Skevlo 5230251538Srpaulo /* Init firmware commands ring. */ 5231251538Srpaulo sc->fwcur = 0; 5232251538Srpaulo 5233251538Srpaulo /* Allocate Tx/Rx buffers. */ 5234251538Srpaulo error = urtwn_alloc_rx_list(sc); 5235251538Srpaulo if (error != 0) 5236251538Srpaulo goto fail; 5237281069Srpaulo 5238251538Srpaulo error = urtwn_alloc_tx_list(sc); 5239251538Srpaulo if (error != 0) 5240251538Srpaulo goto fail; 5241251538Srpaulo 5242251538Srpaulo /* Power on adapter. */ 5243251538Srpaulo error = urtwn_power_on(sc); 5244251538Srpaulo if (error != 0) 5245251538Srpaulo goto fail; 5246251538Srpaulo 5247251538Srpaulo /* Initialize DMA. */ 5248251538Srpaulo error = urtwn_dma_init(sc); 5249251538Srpaulo if (error != 0) 5250251538Srpaulo goto fail; 5251251538Srpaulo 5252251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 5253251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 5254251538Srpaulo 5255251538Srpaulo /* Init interrupts. */ 5256264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5257291698Savos usb_err = urtwn_write_4(sc, R88E_HISR, 0xffffffff); 5258291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5259291698Savos goto fail; 5260291698Savos usb_err = urtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | 5261264912Skevlo R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); 5262291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5263291698Savos goto fail; 5264291698Savos usb_err = urtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | 5265264912Skevlo R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); 5266291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5267291698Savos goto fail; 5268291698Savos usb_err = urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5269264912Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5270264912Skevlo R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); 5271291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5272291698Savos goto fail; 5273264912Skevlo } else { 5274291698Savos usb_err = urtwn_write_4(sc, R92C_HISR, 0xffffffff); 5275291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5276291698Savos goto fail; 5277291698Savos usb_err = urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 5278291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5279291698Savos goto fail; 5280264912Skevlo } 5281251538Srpaulo 5282251538Srpaulo /* Set MAC address. */ 5283287197Sglebius IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 5284291698Savos usb_err = urtwn_write_region_1(sc, R92C_MACID, macaddr, IEEE80211_ADDR_LEN); 5285291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5286291698Savos goto fail; 5287251538Srpaulo 5288251538Srpaulo /* Set initial network type. */ 5289289811Savos urtwn_set_mode(sc, R92C_MSR_INFRA); 5290251538Srpaulo 5291290564Savos /* Initialize Rx filter. */ 5292251538Srpaulo urtwn_rxfilter_init(sc); 5293251538Srpaulo 5294282623Skevlo /* Set response rate. */ 5295251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 5296251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 5297251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 5298251538Srpaulo 5299251538Srpaulo /* Set short/long retry limits. */ 5300251538Srpaulo urtwn_write_2(sc, R92C_RL, 5301251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 5302251538Srpaulo 5303251538Srpaulo /* Initialize EDCA parameters. */ 5304251538Srpaulo urtwn_edca_init(sc); 5305251538Srpaulo 5306251538Srpaulo /* Setup rate fallback. */ 5307264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5308264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 5309264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 5310264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 5311264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 5312264912Skevlo } 5313251538Srpaulo 5314251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 5315251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 5316251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 5317251538Srpaulo /* Set ACK timeout. */ 5318251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 5319251538Srpaulo 5320251538Srpaulo /* Setup USB aggregation. */ 5321251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 5322251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 5323251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 5324251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 5325251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 5326251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 5327251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 5328264912Skevlo if (sc->chip & URTWN_CHIP_88E) 5329264912Skevlo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); 5330282266Skevlo else { 5331264912Skevlo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 5332282266Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5333282266Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5334282266Skevlo R92C_USB_SPECIAL_OPTION_AGG_EN); 5335282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 5336282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 5337282266Skevlo } 5338251538Srpaulo 5339251538Srpaulo /* Initialize beacon parameters. */ 5340264912Skevlo urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010); 5341251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 5342251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 5343251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 5344251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 5345251538Srpaulo 5346264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5347264912Skevlo /* Setup AMPDU aggregation. */ 5348264912Skevlo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 5349264912Skevlo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 5350264912Skevlo urtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); 5351251538Srpaulo 5352264912Skevlo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 5353264912Skevlo } 5354251538Srpaulo 5355295871Savos#ifndef URTWN_WITHOUT_UCODE 5356251538Srpaulo /* Load 8051 microcode. */ 5357251538Srpaulo error = urtwn_load_firmware(sc); 5358295871Savos if (error == 0) 5359295871Savos sc->sc_flags |= URTWN_FW_LOADED; 5360295871Savos#endif 5361251538Srpaulo 5362251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 5363291698Savos error = urtwn_mac_init(sc); 5364291698Savos if (error != 0) { 5365291698Savos device_printf(sc->sc_dev, 5366291698Savos "%s: error while initializing MAC block\n", __func__); 5367291698Savos goto fail; 5368291698Savos } 5369251538Srpaulo urtwn_bb_init(sc); 5370251538Srpaulo urtwn_rf_init(sc); 5371251538Srpaulo 5372290564Savos /* Reinitialize Rx filter (D3845 is not committed yet). */ 5373290564Savos urtwn_rxfilter_init(sc); 5374290564Savos 5375264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5376264912Skevlo urtwn_write_2(sc, R92C_CR, 5377264912Skevlo urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN | 5378264912Skevlo R92C_CR_MACRXEN); 5379264912Skevlo } 5380264912Skevlo 5381251538Srpaulo /* Turn CCK and OFDM blocks on. */ 5382251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5383251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 5384291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5385291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5386291698Savos goto fail; 5387251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5388251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 5389291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5390291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5391291698Savos goto fail; 5392251538Srpaulo 5393251538Srpaulo /* Clear per-station keys table. */ 5394251538Srpaulo urtwn_cam_init(sc); 5395251538Srpaulo 5396292175Savos /* Enable decryption / encryption. */ 5397292175Savos urtwn_write_2(sc, R92C_SECCFG, 5398292175Savos R92C_SECCFG_TXUCKEY_DEF | R92C_SECCFG_RXUCKEY_DEF | 5399292175Savos R92C_SECCFG_TXENC_ENA | R92C_SECCFG_RXDEC_ENA | 5400292175Savos R92C_SECCFG_TXBCKEY_DEF | R92C_SECCFG_RXBCKEY_DEF); 5401292175Savos 5402292175Savos /* 5403292175Savos * Install static keys (if any). 5404292175Savos * Must be called after urtwn_cam_init(). 5405292175Savos */ 5406292175Savos ieee80211_runtask(ic, &sc->cmdq_task); 5407292175Savos 5408251538Srpaulo /* Enable hardware sequence numbering. */ 5409293180Savos urtwn_write_1(sc, R92C_HWSEQ_CTRL, R92C_TX_QUEUE_ALL); 5410251538Srpaulo 5411292167Savos /* Enable per-packet TX report. */ 5412292167Savos if (sc->chip & URTWN_CHIP_88E) { 5413292167Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 5414292167Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) | R88E_TX_RPT1_ENA); 5415292167Savos } 5416292167Savos 5417251538Srpaulo /* Perform LO and IQ calibrations. */ 5418251538Srpaulo urtwn_iq_calib(sc); 5419251538Srpaulo /* Perform LC calibration. */ 5420251538Srpaulo urtwn_lc_calib(sc); 5421251538Srpaulo 5422251538Srpaulo /* Fix USB interference issue. */ 5423264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5424264912Skevlo urtwn_write_1(sc, 0xfe40, 0xe0); 5425264912Skevlo urtwn_write_1(sc, 0xfe41, 0x8d); 5426264912Skevlo urtwn_write_1(sc, 0xfe42, 0x80); 5427251538Srpaulo 5428264912Skevlo urtwn_pa_bias_init(sc); 5429264912Skevlo } 5430251538Srpaulo 5431251538Srpaulo /* Initialize GPIO setting. */ 5432251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 5433251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 5434251538Srpaulo 5435251538Srpaulo /* Fix for lower temperature. */ 5436264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 5437264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 5438251538Srpaulo 5439251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 5440251538Srpaulo 5441287197Sglebius sc->sc_flags |= URTWN_RUNNING; 5442251538Srpaulo 5443251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5444251538Srpaulofail: 5445291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5446291698Savos error = EIO; 5447291698Savos 5448291698Savos URTWN_UNLOCK(sc); 5449291698Savos 5450291698Savos return (error); 5451251538Srpaulo} 5452251538Srpaulo 5453251538Srpaulostatic void 5454287197Sglebiusurtwn_stop(struct urtwn_softc *sc) 5455251538Srpaulo{ 5456251538Srpaulo 5457291698Savos URTWN_LOCK(sc); 5458291698Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 5459291698Savos URTWN_UNLOCK(sc); 5460291698Savos return; 5461291698Savos } 5462291698Savos 5463295871Savos sc->sc_flags &= ~(URTWN_RUNNING | URTWN_FW_LOADED | 5464295871Savos URTWN_TEMP_MEASURED); 5465294473Savos sc->thcal_lctemp = 0; 5466251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 5467295874Savos 5468251538Srpaulo urtwn_abort_xfers(sc); 5469288353Sadrian urtwn_drain_mbufq(sc); 5470295874Savos urtwn_power_off(sc); 5471291698Savos URTWN_UNLOCK(sc); 5472251538Srpaulo} 5473251538Srpaulo 5474251538Srpaulostatic void 5475251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 5476251538Srpaulo{ 5477251538Srpaulo int i; 5478251538Srpaulo 5479251538Srpaulo URTWN_ASSERT_LOCKED(sc); 5480251538Srpaulo 5481251538Srpaulo /* abort any pending transfers */ 5482251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 5483251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 5484251538Srpaulo} 5485251538Srpaulo 5486251538Srpaulostatic int 5487251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 5488251538Srpaulo const struct ieee80211_bpf_params *params) 5489251538Srpaulo{ 5490251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 5491286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 5492251538Srpaulo struct urtwn_data *bf; 5493290630Savos int error; 5494251538Srpaulo 5495297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 5496297596Sadrian __func__, 5497297596Sadrian m); 5498297596Sadrian 5499251538Srpaulo /* prevent management frames from being sent if we're not ready */ 5500290630Savos URTWN_LOCK(sc); 5501287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) { 5502290630Savos error = ENETDOWN; 5503290630Savos goto end; 5504251538Srpaulo } 5505290630Savos 5506251538Srpaulo bf = urtwn_getbuf(sc); 5507251538Srpaulo if (bf == NULL) { 5508290630Savos error = ENOBUFS; 5509290630Savos goto end; 5510251538Srpaulo } 5511251538Srpaulo 5512292221Savos if (params == NULL) { 5513292221Savos /* 5514292221Savos * Legacy path; interpret frame contents to decide 5515292221Savos * precisely how to send the frame. 5516292221Savos */ 5517292221Savos error = urtwn_tx_data(sc, ni, m, bf); 5518292221Savos } else { 5519292221Savos /* 5520292221Savos * Caller supplied explicit parameters to use in 5521292221Savos * sending the frame. 5522292221Savos */ 5523292221Savos error = urtwn_tx_raw(sc, ni, m, bf, params); 5524292221Savos } 5525292221Savos if (error != 0) { 5526251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 5527290630Savos goto end; 5528251538Srpaulo } 5529290630Savos 5530288353Sadrian sc->sc_txtimer = 5; 5531290630Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5532290630Savos 5533290630Savosend: 5534290630Savos if (error != 0) 5535290630Savos m_freem(m); 5536290630Savos 5537251538Srpaulo URTWN_UNLOCK(sc); 5538251538Srpaulo 5539290630Savos return (error); 5540251538Srpaulo} 5541251538Srpaulo 5542266472Shselaskystatic void 5543266472Shselaskyurtwn_ms_delay(struct urtwn_softc *sc) 5544266472Shselasky{ 5545266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 1000); 5546266472Shselasky} 5547266472Shselasky 5548251538Srpaulostatic device_method_t urtwn_methods[] = { 5549251538Srpaulo /* Device interface */ 5550251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 5551251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 5552251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 5553251538Srpaulo 5554264912Skevlo DEVMETHOD_END 5555251538Srpaulo}; 5556251538Srpaulo 5557251538Srpaulostatic driver_t urtwn_driver = { 5558251538Srpaulo "urtwn", 5559251538Srpaulo urtwn_methods, 5560251538Srpaulo sizeof(struct urtwn_softc) 5561251538Srpaulo}; 5562251538Srpaulo 5563251538Srpaulostatic devclass_t urtwn_devclass; 5564251538Srpaulo 5565251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 5566251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 5567251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 5568295871Savos#ifndef URTWN_WITHOUT_UCODE 5569251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 5570295871Savos#endif 5571251538SrpauloMODULE_VERSION(urtwn, 1); 5572292080SimpUSB_PNP_HOST_INFO(urtwn_devs); 5573