if_urtwn.c revision 297910
1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5264912Skevlo * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6292176Savos * Copyright (c) 2015 Andriy Voskoboinyk <avos@FreeBSD.org> 7251538Srpaulo * 8251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 9251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 10251538Srpaulo * copyright notice and this permission notice appear in all copies. 11251538Srpaulo * 12251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19251538Srpaulo */ 20251538Srpaulo 21251538Srpaulo#include <sys/cdefs.h> 22251538Srpaulo__FBSDID("$FreeBSD: head/sys/dev/urtwn/if_urtwn.c 297910 2016-04-13 05:19:16Z adrian $"); 23251538Srpaulo 24251538Srpaulo/* 25264912Skevlo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU. 26251538Srpaulo */ 27251538Srpaulo 28288353Sadrian#include "opt_wlan.h" 29295871Savos#include "opt_urtwn.h" 30288353Sadrian 31251538Srpaulo#include <sys/param.h> 32251538Srpaulo#include <sys/sockio.h> 33251538Srpaulo#include <sys/sysctl.h> 34251538Srpaulo#include <sys/lock.h> 35251538Srpaulo#include <sys/mutex.h> 36291902Skevlo#include <sys/condvar.h> 37251538Srpaulo#include <sys/mbuf.h> 38251538Srpaulo#include <sys/kernel.h> 39251538Srpaulo#include <sys/socket.h> 40251538Srpaulo#include <sys/systm.h> 41251538Srpaulo#include <sys/malloc.h> 42251538Srpaulo#include <sys/module.h> 43251538Srpaulo#include <sys/bus.h> 44251538Srpaulo#include <sys/endian.h> 45251538Srpaulo#include <sys/linker.h> 46251538Srpaulo#include <sys/firmware.h> 47251538Srpaulo#include <sys/kdb.h> 48251538Srpaulo 49251538Srpaulo#include <machine/bus.h> 50251538Srpaulo#include <machine/resource.h> 51251538Srpaulo#include <sys/rman.h> 52251538Srpaulo 53251538Srpaulo#include <net/bpf.h> 54251538Srpaulo#include <net/if.h> 55257176Sglebius#include <net/if_var.h> 56251538Srpaulo#include <net/if_arp.h> 57251538Srpaulo#include <net/ethernet.h> 58251538Srpaulo#include <net/if_dl.h> 59251538Srpaulo#include <net/if_media.h> 60251538Srpaulo#include <net/if_types.h> 61251538Srpaulo 62251538Srpaulo#include <netinet/in.h> 63251538Srpaulo#include <netinet/in_systm.h> 64251538Srpaulo#include <netinet/in_var.h> 65251538Srpaulo#include <netinet/if_ether.h> 66251538Srpaulo#include <netinet/ip.h> 67251538Srpaulo 68251538Srpaulo#include <net80211/ieee80211_var.h> 69288088Sadrian#include <net80211/ieee80211_input.h> 70251538Srpaulo#include <net80211/ieee80211_regdomain.h> 71251538Srpaulo#include <net80211/ieee80211_radiotap.h> 72251538Srpaulo#include <net80211/ieee80211_ratectl.h> 73297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 74297596Sadrian#include <net80211/ieee80211_superg.h> 75297596Sadrian#endif 76251538Srpaulo 77251538Srpaulo#include <dev/usb/usb.h> 78251538Srpaulo#include <dev/usb/usbdi.h> 79291902Skevlo#include <dev/usb/usb_device.h> 80251538Srpaulo#include "usbdevs.h" 81251538Srpaulo 82251538Srpaulo#include <dev/usb/usb_debug.h> 83251538Srpaulo 84297058Sadrian#include <dev/urtwn/if_urtwnreg.h> 85297058Sadrian#include <dev/urtwn/if_urtwnvar.h> 86251538Srpaulo 87251538Srpaulo#ifdef USB_DEBUG 88294471Savosenum { 89294471Savos URTWN_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 90294471Savos URTWN_DEBUG_RECV = 0x00000002, /* basic recv operation */ 91294471Savos URTWN_DEBUG_STATE = 0x00000004, /* 802.11 state transitions */ 92294471Savos URTWN_DEBUG_RA = 0x00000008, /* f/w rate adaptation setup */ 93294471Savos URTWN_DEBUG_USB = 0x00000010, /* usb requests */ 94294471Savos URTWN_DEBUG_FIRMWARE = 0x00000020, /* firmware(9) loading debug */ 95294471Savos URTWN_DEBUG_BEACON = 0x00000040, /* beacon handling */ 96294471Savos URTWN_DEBUG_INTR = 0x00000080, /* ISR */ 97294471Savos URTWN_DEBUG_TEMP = 0x00000100, /* temperature calibration */ 98294471Savos URTWN_DEBUG_ROM = 0x00000200, /* various ROM info */ 99294471Savos URTWN_DEBUG_KEY = 0x00000400, /* crypto keys management */ 100294471Savos URTWN_DEBUG_TXPWR = 0x00000800, /* dump Tx power values */ 101297175Sadrian URTWN_DEBUG_RSSI = 0x00001000, /* dump RSSI lookups */ 102294471Savos URTWN_DEBUG_ANY = 0xffffffff 103294471Savos}; 104251538Srpaulo 105294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { \ 106294471Savos if ((_sc)->sc_debug & (_m)) \ 107294471Savos device_printf((_sc)->sc_dev, __VA_ARGS__); \ 108294471Savos} while(0) 109294471Savos 110294471Savos#else 111294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { (void) sc; } while (0) 112251538Srpaulo#endif 113251538Srpaulo 114288088Sadrian#define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 115251538Srpaulo 116297175Sadrianstatic int urtwn_enable_11n = 1; 117297175SadrianTUNABLE_INT("hw.usb.urtwn.enable_11n", &urtwn_enable_11n); 118297175Sadrian 119251538Srpaulo/* various supported device vendors/products */ 120251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 121251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 122264912Skevlo#define URTWN_RTL8188E_DEV(v,p) \ 123264912Skevlo { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTWN_RTL8188E) } 124264912Skevlo#define URTWN_RTL8188E 1 125251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 126251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 127251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 128251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 129266721Skevlo URTWN_DEV(ASUS, USBN10NANO), 130251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 131251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 132251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 133251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 134251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 135251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 136251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 137251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 138251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 139251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 140251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 141251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 142251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 143251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 144251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 145251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 146252196Skevlo URTWN_DEV(DLINK, DWA131B), 147251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 148251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 149251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 150251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 151251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 152251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 153251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 154251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 155251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 156251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 157251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 158251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 159251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 160251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 161251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 162251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 163251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 164251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 165251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 166251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 167251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 168251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 169251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 170282119Skevlo URTWN_DEV(REALTEK, RTL8188CU_3), 171251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 172251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 173251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 174251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 175272410Shselasky URTWN_DEV(REALTEK, RTL8188RU_3), 176251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 177251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 178251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 179251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 180251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 181251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 182251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 183251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 184251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 185264912Skevlo /* URTWN_RTL8188E */ 186295907Skevlo URTWN_RTL8188E_DEV(ABOCOM, RTL8188EU), 187273589Skevlo URTWN_RTL8188E_DEV(DLINK, DWA123D1), 188270191Skevlo URTWN_RTL8188E_DEV(DLINK, DWA125D1), 189273589Skevlo URTWN_RTL8188E_DEV(ELECOM, WDC150SU2M), 190264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188ETV), 191264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188EU), 192264912Skevlo#undef URTWN_RTL8188E_DEV 193251538Srpaulo#undef URTWN_DEV 194251538Srpaulo}; 195251538Srpaulo 196251538Srpaulostatic device_probe_t urtwn_match; 197251538Srpaulostatic device_attach_t urtwn_attach; 198251538Srpaulostatic device_detach_t urtwn_detach; 199251538Srpaulo 200251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 201251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 202251538Srpaulo 203294471Savosstatic void urtwn_sysctlattach(struct urtwn_softc *); 204294471Savosstatic void urtwn_drain_mbufq(struct urtwn_softc *); 205287197Sglebiusstatic usb_error_t urtwn_do_request(struct urtwn_softc *, 206287197Sglebius struct usb_device_request *, void *); 207251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 208251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 209251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 210251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 211251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 212292207Savosstatic struct mbuf * urtwn_rx_copy_to_mbuf(struct urtwn_softc *, 213292207Savos struct r92c_rx_stat *, int); 214292207Savosstatic struct mbuf * urtwn_report_intr(struct usb_xfer *, 215292207Savos struct urtwn_data *); 216292207Savosstatic struct mbuf * urtwn_rxeof(struct urtwn_softc *, uint8_t *, int); 217292167Savosstatic void urtwn_r88e_ratectl_tx_complete(struct urtwn_softc *, 218292167Savos void *); 219292207Savosstatic struct ieee80211_node *urtwn_rx_frame(struct urtwn_softc *, 220292207Savos struct mbuf *, int8_t *); 221289891Savosstatic void urtwn_txeof(struct urtwn_softc *, struct urtwn_data *, 222289891Savos int); 223281069Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 224251538Srpaulo struct urtwn_data[], int, int); 225251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 226251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 227251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 228251538Srpaulo struct urtwn_data data[], int); 229289066Skevlostatic void urtwn_free_rx_list(struct urtwn_softc *); 230289066Skevlostatic void urtwn_free_tx_list(struct urtwn_softc *); 231251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 232251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 233291698Savosstatic usb_error_t urtwn_write_region_1(struct urtwn_softc *, uint16_t, 234251538Srpaulo uint8_t *, int); 235291698Savosstatic usb_error_t urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 236291698Savosstatic usb_error_t urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 237291698Savosstatic usb_error_t urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 238291698Savosstatic usb_error_t urtwn_read_region_1(struct urtwn_softc *, uint16_t, 239251538Srpaulo uint8_t *, int); 240251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 241251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 242251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 243281069Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 244251538Srpaulo const void *, int); 245292174Savosstatic void urtwn_cmdq_cb(void *, int); 246292174Savosstatic int urtwn_cmd_sleepable(struct urtwn_softc *, const void *, 247292174Savos size_t, CMD_FUNC_PROTO); 248264912Skevlostatic void urtwn_r92c_rf_write(struct urtwn_softc *, int, 249264912Skevlo uint8_t, uint32_t); 250281069Srpaulostatic void urtwn_r88e_rf_write(struct urtwn_softc *, int, 251264912Skevlo uint8_t, uint32_t); 252251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 253281069Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 254251538Srpaulo uint32_t); 255291264Savosstatic int urtwn_efuse_read_next(struct urtwn_softc *, uint8_t *); 256291264Savosstatic int urtwn_efuse_read_data(struct urtwn_softc *, uint8_t *, 257291264Savos uint8_t, uint8_t); 258294471Savos#ifdef USB_DEBUG 259291264Savosstatic void urtwn_dump_rom_contents(struct urtwn_softc *, 260291264Savos uint8_t *, uint16_t); 261291264Savos#endif 262291264Savosstatic int urtwn_efuse_read(struct urtwn_softc *, uint8_t *, 263291264Savos uint16_t); 264291698Savosstatic int urtwn_efuse_switch_power(struct urtwn_softc *); 265251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 266291264Savosstatic int urtwn_read_rom(struct urtwn_softc *); 267291264Savosstatic int urtwn_r88e_read_rom(struct urtwn_softc *); 268251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 269290631Savosstatic void urtwn_init_beacon(struct urtwn_softc *, 270290631Savos struct urtwn_vap *); 271290631Savosstatic int urtwn_setup_beacon(struct urtwn_softc *, 272290631Savos struct ieee80211_node *); 273290631Savosstatic void urtwn_update_beacon(struct ieee80211vap *, int); 274290631Savosstatic int urtwn_tx_beacon(struct urtwn_softc *sc, 275290631Savos struct urtwn_vap *); 276292175Savosstatic int urtwn_key_alloc(struct ieee80211vap *, 277292175Savos struct ieee80211_key *, ieee80211_keyix *, 278292175Savos ieee80211_keyix *); 279292175Savosstatic void urtwn_key_set_cb(struct urtwn_softc *, 280292175Savos union sec_param *); 281292175Savosstatic void urtwn_key_del_cb(struct urtwn_softc *, 282292175Savos union sec_param *); 283292175Savosstatic int urtwn_key_set(struct ieee80211vap *, 284292175Savos const struct ieee80211_key *); 285292175Savosstatic int urtwn_key_delete(struct ieee80211vap *, 286292175Savos const struct ieee80211_key *); 287290651Savosstatic void urtwn_tsf_task_adhoc(void *, int); 288290631Savosstatic void urtwn_tsf_sync_enable(struct urtwn_softc *, 289290631Savos struct ieee80211vap *); 290292203Savosstatic void urtwn_get_tsf(struct urtwn_softc *, uint64_t *); 291251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 292289811Savosstatic void urtwn_set_mode(struct urtwn_softc *, uint8_t); 293290651Savosstatic void urtwn_ibss_recv_mgmt(struct ieee80211_node *, 294290651Savos struct mbuf *, int, 295290651Savos const struct ieee80211_rx_stats *, int, int); 296281069Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 297251538Srpaulo enum ieee80211_state, int); 298294473Savosstatic void urtwn_calib_to(void *); 299294473Savosstatic void urtwn_calib_cb(struct urtwn_softc *, 300294473Savos union sec_param *); 301251538Srpaulostatic void urtwn_watchdog(void *); 302251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 303251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 304264912Skevlostatic int8_t urtwn_r88e_get_rssi(struct urtwn_softc *, int, void *); 305290630Savosstatic int urtwn_tx_data(struct urtwn_softc *, 306251538Srpaulo struct ieee80211_node *, struct mbuf *, 307251538Srpaulo struct urtwn_data *); 308292221Savosstatic int urtwn_tx_raw(struct urtwn_softc *, 309292221Savos struct ieee80211_node *, struct mbuf *, 310292221Savos struct urtwn_data *, 311292221Savos const struct ieee80211_bpf_params *); 312290630Savosstatic void urtwn_tx_start(struct urtwn_softc *, struct mbuf *, 313290630Savos uint8_t, struct urtwn_data *); 314287197Sglebiusstatic int urtwn_transmit(struct ieee80211com *, struct mbuf *); 315287197Sglebiusstatic void urtwn_start(struct urtwn_softc *); 316287197Sglebiusstatic void urtwn_parent(struct ieee80211com *); 317264912Skevlostatic int urtwn_r92c_power_on(struct urtwn_softc *); 318264912Skevlostatic int urtwn_r88e_power_on(struct urtwn_softc *); 319295874Savosstatic void urtwn_r92c_power_off(struct urtwn_softc *); 320295874Savosstatic void urtwn_r88e_power_off(struct urtwn_softc *); 321251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 322295871Savos#ifndef URTWN_WITHOUT_UCODE 323251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 324264912Skevlostatic void urtwn_r88e_fw_reset(struct urtwn_softc *); 325281069Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 326251538Srpaulo const uint8_t *, int); 327251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 328295871Savos#endif 329291902Skevlostatic int urtwn_dma_init(struct urtwn_softc *); 330291698Savosstatic int urtwn_mac_init(struct urtwn_softc *); 331251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 332251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 333251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 334292175Savosstatic int urtwn_cam_write(struct urtwn_softc *, uint32_t, 335292175Savos uint32_t); 336251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 337251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 338251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 339281069Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 340251538Srpaulo uint16_t[]); 341251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 342281069Srpaulo struct ieee80211_channel *, 343251538Srpaulo struct ieee80211_channel *, uint16_t[]); 344264912Skevlostatic void urtwn_r88e_get_txpower(struct urtwn_softc *, int, 345281069Srpaulo struct ieee80211_channel *, 346264912Skevlo struct ieee80211_channel *, uint16_t[]); 347251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 348281069Srpaulo struct ieee80211_channel *, 349251538Srpaulo struct ieee80211_channel *); 350290048Savosstatic void urtwn_set_rx_bssid_all(struct urtwn_softc *, int); 351290048Savosstatic void urtwn_set_gain(struct urtwn_softc *, uint8_t); 352251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 353251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 354251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 355292014Savosstatic int urtwn_wme_update(struct ieee80211com *); 356294465Savosstatic void urtwn_update_slot(struct ieee80211com *); 357294465Savosstatic void urtwn_update_slot_cb(struct urtwn_softc *, 358294465Savos union sec_param *); 359294465Savosstatic void urtwn_update_aifs(struct urtwn_softc *, uint8_t); 360290564Savosstatic void urtwn_set_promisc(struct urtwn_softc *); 361290564Savosstatic void urtwn_update_promisc(struct ieee80211com *); 362289066Skevlostatic void urtwn_update_mcast(struct ieee80211com *); 363297910Sadrianstatic struct ieee80211_node *urtwn_node_alloc(struct ieee80211vap *, 364292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]); 365297910Sadrianstatic void urtwn_newassoc(struct ieee80211_node *, int); 366297910Sadrianstatic void urtwn_node_free(struct ieee80211_node *); 367251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 368281069Srpaulo struct ieee80211_channel *, 369251538Srpaulo struct ieee80211_channel *); 370251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 371251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 372294473Savosstatic void urtwn_temp_calib(struct urtwn_softc *); 373291698Savosstatic int urtwn_init(struct urtwn_softc *); 374287197Sglebiusstatic void urtwn_stop(struct urtwn_softc *); 375251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 376251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 377251538Srpaulo const struct ieee80211_bpf_params *); 378266472Shselaskystatic void urtwn_ms_delay(struct urtwn_softc *); 379251538Srpaulo 380251538Srpaulo/* Aliases. */ 381251538Srpaulo#define urtwn_bb_write urtwn_write_4 382251538Srpaulo#define urtwn_bb_read urtwn_read_4 383251538Srpaulo 384251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 385251538Srpaulo [URTWN_BULK_RX] = { 386251538Srpaulo .type = UE_BULK, 387251538Srpaulo .endpoint = UE_ADDR_ANY, 388251538Srpaulo .direction = UE_DIR_IN, 389251538Srpaulo .bufsize = URTWN_RXBUFSZ, 390251538Srpaulo .flags = { 391251538Srpaulo .pipe_bof = 1, 392251538Srpaulo .short_xfer_ok = 1 393251538Srpaulo }, 394251538Srpaulo .callback = urtwn_bulk_rx_callback, 395251538Srpaulo }, 396251538Srpaulo [URTWN_BULK_TX_BE] = { 397251538Srpaulo .type = UE_BULK, 398251538Srpaulo .endpoint = 0x03, 399251538Srpaulo .direction = UE_DIR_OUT, 400251538Srpaulo .bufsize = URTWN_TXBUFSZ, 401251538Srpaulo .flags = { 402251538Srpaulo .ext_buffer = 1, 403251538Srpaulo .pipe_bof = 1, 404251538Srpaulo .force_short_xfer = 1 405251538Srpaulo }, 406251538Srpaulo .callback = urtwn_bulk_tx_callback, 407251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 408251538Srpaulo }, 409251538Srpaulo [URTWN_BULK_TX_BK] = { 410251538Srpaulo .type = UE_BULK, 411251538Srpaulo .endpoint = 0x03, 412251538Srpaulo .direction = UE_DIR_OUT, 413251538Srpaulo .bufsize = URTWN_TXBUFSZ, 414251538Srpaulo .flags = { 415251538Srpaulo .ext_buffer = 1, 416251538Srpaulo .pipe_bof = 1, 417251538Srpaulo .force_short_xfer = 1, 418251538Srpaulo }, 419251538Srpaulo .callback = urtwn_bulk_tx_callback, 420251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 421251538Srpaulo }, 422251538Srpaulo [URTWN_BULK_TX_VI] = { 423251538Srpaulo .type = UE_BULK, 424251538Srpaulo .endpoint = 0x02, 425251538Srpaulo .direction = UE_DIR_OUT, 426251538Srpaulo .bufsize = URTWN_TXBUFSZ, 427251538Srpaulo .flags = { 428251538Srpaulo .ext_buffer = 1, 429251538Srpaulo .pipe_bof = 1, 430251538Srpaulo .force_short_xfer = 1 431251538Srpaulo }, 432251538Srpaulo .callback = urtwn_bulk_tx_callback, 433251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 434251538Srpaulo }, 435251538Srpaulo [URTWN_BULK_TX_VO] = { 436251538Srpaulo .type = UE_BULK, 437251538Srpaulo .endpoint = 0x02, 438251538Srpaulo .direction = UE_DIR_OUT, 439251538Srpaulo .bufsize = URTWN_TXBUFSZ, 440251538Srpaulo .flags = { 441251538Srpaulo .ext_buffer = 1, 442251538Srpaulo .pipe_bof = 1, 443251538Srpaulo .force_short_xfer = 1 444251538Srpaulo }, 445251538Srpaulo .callback = urtwn_bulk_tx_callback, 446251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 447251538Srpaulo }, 448251538Srpaulo}; 449251538Srpaulo 450292014Savosstatic const struct wme_to_queue { 451292014Savos uint16_t reg; 452292014Savos uint8_t qid; 453292014Savos} wme2queue[WME_NUM_AC] = { 454292014Savos { R92C_EDCA_BE_PARAM, URTWN_BULK_TX_BE}, 455292014Savos { R92C_EDCA_BK_PARAM, URTWN_BULK_TX_BK}, 456292014Savos { R92C_EDCA_VI_PARAM, URTWN_BULK_TX_VI}, 457292014Savos { R92C_EDCA_VO_PARAM, URTWN_BULK_TX_VO} 458292014Savos}; 459292014Savos 460251538Srpaulostatic int 461251538Srpaulourtwn_match(device_t self) 462251538Srpaulo{ 463251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 464251538Srpaulo 465251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 466251538Srpaulo return (ENXIO); 467251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 468251538Srpaulo return (ENXIO); 469251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 470251538Srpaulo return (ENXIO); 471251538Srpaulo 472251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 473251538Srpaulo} 474251538Srpaulo 475297175Sadrianstatic void 476297175Sadrianurtwn_update_chw(struct ieee80211com *ic) 477297175Sadrian{ 478297175Sadrian} 479297175Sadrian 480251538Srpaulostatic int 481297175Sadrianurtwn_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 482297175Sadrian{ 483297175Sadrian 484297175Sadrian /* We're driving this ourselves (eventually); don't involve net80211 */ 485297175Sadrian return (0); 486297175Sadrian} 487297175Sadrian 488297175Sadrianstatic int 489251538Srpaulourtwn_attach(device_t self) 490251538Srpaulo{ 491251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 492251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 493287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 494293339Savos uint8_t bands[howmany(IEEE80211_MODE_MAX, 8)]; 495251538Srpaulo int error; 496251538Srpaulo 497251538Srpaulo device_set_usb_desc(self); 498251538Srpaulo sc->sc_udev = uaa->device; 499251538Srpaulo sc->sc_dev = self; 500264912Skevlo if (USB_GET_DRIVER_INFO(uaa) == URTWN_RTL8188E) 501264912Skevlo sc->chip |= URTWN_CHIP_88E; 502251538Srpaulo 503294471Savos#ifdef USB_DEBUG 504294471Savos int debug; 505294471Savos if (resource_int_value(device_get_name(sc->sc_dev), 506294471Savos device_get_unit(sc->sc_dev), "debug", &debug) == 0) 507294471Savos sc->sc_debug = debug; 508294471Savos#endif 509294471Savos 510251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 511251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 512292174Savos URTWN_CMDQ_LOCK_INIT(sc); 513292167Savos URTWN_NT_LOCK_INIT(sc); 514294473Savos callout_init(&sc->sc_calib_to, 0); 515251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 516287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 517251538Srpaulo 518291902Skevlo sc->sc_iface_index = URTWN_IFACE_INDEX; 519291902Skevlo error = usbd_transfer_setup(uaa->device, &sc->sc_iface_index, 520291902Skevlo sc->sc_xfer, urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 521251538Srpaulo if (error) { 522251538Srpaulo device_printf(self, "could not allocate USB transfers, " 523251538Srpaulo "err=%s\n", usbd_errstr(error)); 524251538Srpaulo goto detach; 525251538Srpaulo } 526251538Srpaulo 527251538Srpaulo URTWN_LOCK(sc); 528251538Srpaulo 529251538Srpaulo error = urtwn_read_chipid(sc); 530251538Srpaulo if (error) { 531251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 532251538Srpaulo URTWN_UNLOCK(sc); 533251538Srpaulo goto detach; 534251538Srpaulo } 535251538Srpaulo 536251538Srpaulo /* Determine number of Tx/Rx chains. */ 537251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 538251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 539251538Srpaulo sc->nrxchains = 2; 540251538Srpaulo } else { 541251538Srpaulo sc->ntxchains = 1; 542251538Srpaulo sc->nrxchains = 1; 543251538Srpaulo } 544251538Srpaulo 545264912Skevlo if (sc->chip & URTWN_CHIP_88E) 546291264Savos error = urtwn_r88e_read_rom(sc); 547264912Skevlo else 548291264Savos error = urtwn_read_rom(sc); 549291264Savos if (error != 0) { 550291264Savos device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", 551291264Savos __func__, error); 552291264Savos URTWN_UNLOCK(sc); 553291264Savos goto detach; 554291264Savos } 555264912Skevlo 556251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 557251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 558264912Skevlo (sc->chip & URTWN_CHIP_88E) ? "8188EU" : 559251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 560251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 561251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 562251538Srpaulo 563251538Srpaulo URTWN_UNLOCK(sc); 564251538Srpaulo 565283537Sglebius ic->ic_softc = sc; 566283527Sglebius ic->ic_name = device_get_nameunit(self); 567251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 568251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 569251538Srpaulo 570251538Srpaulo /* set device capabilities */ 571251538Srpaulo ic->ic_caps = 572251538Srpaulo IEEE80211_C_STA /* station mode */ 573251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 574290651Savos | IEEE80211_C_IBSS /* adhoc mode */ 575290631Savos | IEEE80211_C_HOSTAP /* hostap mode */ 576251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 577251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 578297175Sadrian#if 0 579251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 580297175Sadrian#endif 581251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 582292014Savos | IEEE80211_C_WME /* 802.11e */ 583297596Sadrian | IEEE80211_C_SWAMSDUTX /* Do software A-MSDU TX */ 584297596Sadrian | IEEE80211_C_FF /* Atheros fast-frames */ 585251538Srpaulo ; 586251538Srpaulo 587292175Savos ic->ic_cryptocaps = 588292175Savos IEEE80211_CRYPTO_WEP | 589292175Savos IEEE80211_CRYPTO_TKIP | 590292175Savos IEEE80211_CRYPTO_AES_CCM; 591292175Savos 592297175Sadrian /* Assume they're all 11n capable for now */ 593297175Sadrian if (urtwn_enable_11n) { 594297175Sadrian device_printf(self, "enabling 11n\n"); 595297175Sadrian ic->ic_htcaps = IEEE80211_HTC_HT | 596297601Sadrian#if 0 597297175Sadrian IEEE80211_HTC_AMPDU | 598297601Sadrian#endif 599297175Sadrian IEEE80211_HTC_AMSDU | 600297175Sadrian IEEE80211_HTCAP_MAXAMSDU_3839 | 601297175Sadrian IEEE80211_HTCAP_SMPS_OFF; 602297175Sadrian /* no HT40 just yet */ 603297175Sadrian // ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 604297175Sadrian 605297175Sadrian /* XXX TODO: verify chains versus streams for urtwn */ 606297175Sadrian ic->ic_txstream = sc->ntxchains; 607297175Sadrian ic->ic_rxstream = sc->nrxchains; 608297175Sadrian } 609297175Sadrian 610293339Savos memset(bands, 0, sizeof(bands)); 611293339Savos setbit(bands, IEEE80211_MODE_11B); 612293339Savos setbit(bands, IEEE80211_MODE_11G); 613297175Sadrian if (urtwn_enable_11n) 614297175Sadrian setbit(bands, IEEE80211_MODE_11NG); 615293339Savos ieee80211_init_channels(ic, NULL, bands); 616251538Srpaulo 617287197Sglebius ieee80211_ifattach(ic); 618251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 619251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 620251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 621251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 622287197Sglebius ic->ic_transmit = urtwn_transmit; 623287197Sglebius ic->ic_parent = urtwn_parent; 624251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 625251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 626292014Savos ic->ic_wme.wme_update = urtwn_wme_update; 627294465Savos ic->ic_updateslot = urtwn_update_slot; 628290564Savos ic->ic_update_promisc = urtwn_update_promisc; 629251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 630292167Savos if (sc->chip & URTWN_CHIP_88E) { 631297910Sadrian ic->ic_node_alloc = urtwn_node_alloc; 632297910Sadrian ic->ic_newassoc = urtwn_newassoc; 633292167Savos sc->sc_node_free = ic->ic_node_free; 634297910Sadrian ic->ic_node_free = urtwn_node_free; 635292167Savos } 636297175Sadrian ic->ic_update_chw = urtwn_update_chw; 637297175Sadrian ic->ic_ampdu_enable = urtwn_ampdu_enable; 638251538Srpaulo 639281069Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 640251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 641251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 642251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 643251538Srpaulo 644292174Savos TASK_INIT(&sc->cmdq_task, 0, urtwn_cmdq_cb, sc); 645292174Savos 646294471Savos urtwn_sysctlattach(sc); 647294471Savos 648251538Srpaulo if (bootverbose) 649251538Srpaulo ieee80211_announce(ic); 650251538Srpaulo 651251538Srpaulo return (0); 652251538Srpaulo 653251538Srpaulodetach: 654251538Srpaulo urtwn_detach(self); 655251538Srpaulo return (ENXIO); /* failure */ 656251538Srpaulo} 657251538Srpaulo 658294471Savosstatic void 659294471Savosurtwn_sysctlattach(struct urtwn_softc *sc) 660294471Savos{ 661294471Savos#ifdef USB_DEBUG 662294471Savos struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 663294471Savos struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 664294471Savos 665294471Savos SYSCTL_ADD_U32(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 666294471Savos "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug, 667294471Savos "control debugging printfs"); 668294471Savos#endif 669294471Savos} 670294471Savos 671251538Srpaulostatic int 672251538Srpaulourtwn_detach(device_t self) 673251538Srpaulo{ 674251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 675287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 676263153Skevlo unsigned int x; 677281069Srpaulo 678263153Skevlo /* Prevent further ioctls. */ 679263153Skevlo URTWN_LOCK(sc); 680263153Skevlo sc->sc_flags |= URTWN_DETACHED; 681263153Skevlo URTWN_UNLOCK(sc); 682251538Srpaulo 683291698Savos urtwn_stop(sc); 684291698Savos 685251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 686294473Savos callout_drain(&sc->sc_calib_to); 687251538Srpaulo 688288353Sadrian /* stop all USB transfers */ 689288353Sadrian usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 690288353Sadrian 691263153Skevlo /* Prevent further allocations from RX/TX data lists. */ 692263153Skevlo URTWN_LOCK(sc); 693263153Skevlo STAILQ_INIT(&sc->sc_tx_active); 694263153Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 695263153Skevlo STAILQ_INIT(&sc->sc_tx_pending); 696263153Skevlo 697263153Skevlo STAILQ_INIT(&sc->sc_rx_active); 698263153Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 699263153Skevlo URTWN_UNLOCK(sc); 700263153Skevlo 701263153Skevlo /* drain USB transfers */ 702263153Skevlo for (x = 0; x != URTWN_N_TRANSFER; x++) 703263153Skevlo usbd_transfer_drain(sc->sc_xfer[x]); 704263153Skevlo 705263153Skevlo /* Free data buffers. */ 706263153Skevlo URTWN_LOCK(sc); 707263153Skevlo urtwn_free_tx_list(sc); 708263153Skevlo urtwn_free_rx_list(sc); 709263153Skevlo URTWN_UNLOCK(sc); 710263153Skevlo 711292174Savos if (ic->ic_softc == sc) { 712292174Savos ieee80211_draintask(ic, &sc->cmdq_task); 713292174Savos ieee80211_ifdetach(ic); 714292174Savos } 715292174Savos 716292167Savos URTWN_NT_LOCK_DESTROY(sc); 717292174Savos URTWN_CMDQ_LOCK_DESTROY(sc); 718251538Srpaulo mtx_destroy(&sc->sc_mtx); 719251538Srpaulo 720251538Srpaulo return (0); 721251538Srpaulo} 722251538Srpaulo 723251538Srpaulostatic void 724289066Skevlourtwn_drain_mbufq(struct urtwn_softc *sc) 725251538Srpaulo{ 726289066Skevlo struct mbuf *m; 727289066Skevlo struct ieee80211_node *ni; 728289066Skevlo URTWN_ASSERT_LOCKED(sc); 729289066Skevlo while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 730289066Skevlo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 731289066Skevlo m->m_pkthdr.rcvif = NULL; 732289066Skevlo ieee80211_free_node(ni); 733289066Skevlo m_freem(m); 734251538Srpaulo } 735251538Srpaulo} 736251538Srpaulo 737251538Srpaulostatic usb_error_t 738251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 739251538Srpaulo void *data) 740251538Srpaulo{ 741251538Srpaulo usb_error_t err; 742251538Srpaulo int ntries = 10; 743251538Srpaulo 744251538Srpaulo URTWN_ASSERT_LOCKED(sc); 745251538Srpaulo 746251538Srpaulo while (ntries--) { 747251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 748251538Srpaulo req, data, 0, NULL, 250 /* ms */); 749251538Srpaulo if (err == 0) 750251538Srpaulo break; 751251538Srpaulo 752294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_USB, 753294471Savos "%s: control request failed, %s (retries left: %d)\n", 754294471Savos __func__, usbd_errstr(err), ntries); 755251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 756251538Srpaulo } 757251538Srpaulo return (err); 758251538Srpaulo} 759251538Srpaulo 760251538Srpaulostatic struct ieee80211vap * 761251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 762251538Srpaulo enum ieee80211_opmode opmode, int flags, 763251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 764251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 765251538Srpaulo{ 766290631Savos struct urtwn_softc *sc = ic->ic_softc; 767251538Srpaulo struct urtwn_vap *uvp; 768251538Srpaulo struct ieee80211vap *vap; 769251538Srpaulo 770251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 771251538Srpaulo return (NULL); 772251538Srpaulo 773287197Sglebius uvp = malloc(sizeof(struct urtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); 774251538Srpaulo vap = &uvp->vap; 775251538Srpaulo /* enable s/w bmiss handling for sta mode */ 776251538Srpaulo 777281069Srpaulo if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 778287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 779257743Shselasky /* out of memory */ 780257743Shselasky free(uvp, M_80211_VAP); 781257743Shselasky return (NULL); 782257743Shselasky } 783257743Shselasky 784290651Savos if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) 785290631Savos urtwn_init_beacon(sc, uvp); 786290631Savos 787251538Srpaulo /* override state transition machine */ 788251538Srpaulo uvp->newstate = vap->iv_newstate; 789251538Srpaulo vap->iv_newstate = urtwn_newstate; 790290631Savos vap->iv_update_beacon = urtwn_update_beacon; 791292175Savos vap->iv_key_alloc = urtwn_key_alloc; 792292175Savos vap->iv_key_set = urtwn_key_set; 793292175Savos vap->iv_key_delete = urtwn_key_delete; 794290651Savos if (opmode == IEEE80211_M_IBSS) { 795290651Savos uvp->recv_mgmt = vap->iv_recv_mgmt; 796290651Savos vap->iv_recv_mgmt = urtwn_ibss_recv_mgmt; 797290651Savos TASK_INIT(&uvp->tsf_task_adhoc, 0, urtwn_tsf_task_adhoc, vap); 798290651Savos } 799251538Srpaulo 800292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 801292167Savos ieee80211_ratectl_init(vap); 802251538Srpaulo /* complete setup */ 803251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 804287197Sglebius ieee80211_media_status, mac); 805251538Srpaulo ic->ic_opmode = opmode; 806251538Srpaulo return (vap); 807251538Srpaulo} 808251538Srpaulo 809251538Srpaulostatic void 810251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 811251538Srpaulo{ 812290651Savos struct ieee80211com *ic = vap->iv_ic; 813292167Savos struct urtwn_softc *sc = ic->ic_softc; 814251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 815251538Srpaulo 816290651Savos if (uvp->bcn_mbuf != NULL) 817290651Savos m_freem(uvp->bcn_mbuf); 818290651Savos if (vap->iv_opmode == IEEE80211_M_IBSS) 819290651Savos ieee80211_draintask(ic, &uvp->tsf_task_adhoc); 820292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 821292167Savos ieee80211_ratectl_deinit(vap); 822251538Srpaulo ieee80211_vap_detach(vap); 823251538Srpaulo free(uvp, M_80211_VAP); 824251538Srpaulo} 825251538Srpaulo 826251538Srpaulostatic struct mbuf * 827292207Savosurtwn_rx_copy_to_mbuf(struct urtwn_softc *sc, struct r92c_rx_stat *stat, 828292207Savos int totlen) 829251538Srpaulo{ 830287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 831251538Srpaulo struct mbuf *m; 832292207Savos uint32_t rxdw0; 833292207Savos int pktlen; 834251538Srpaulo 835251538Srpaulo /* 836251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 837251538Srpaulo * RUNNING. 838251538Srpaulo */ 839287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) 840251538Srpaulo return (NULL); 841251538Srpaulo 842251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 843251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 844251538Srpaulo /* 845251538Srpaulo * This should not happen since we setup our Rx filter 846251538Srpaulo * to not receive these frames. 847251538Srpaulo */ 848294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 849294471Savos "%s: RX flags error (%s)\n", __func__, 850292207Savos rxdw0 & R92C_RXDW0_CRCERR ? "CRC" : "ICV"); 851292207Savos goto fail; 852251538Srpaulo } 853292207Savos 854292207Savos pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 855292207Savos if (pktlen < sizeof(struct ieee80211_frame_ack)) { 856294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 857294471Savos "%s: frame is too short: %d\n", __func__, pktlen); 858292207Savos goto fail; 859271303Skevlo } 860251538Srpaulo 861292207Savos if (__predict_false(totlen > MCLBYTES)) { 862292207Savos /* convert to m_getjcl if this happens */ 863292207Savos device_printf(sc->sc_dev, "%s: frame too long: %d (%d)\n", 864292207Savos __func__, pktlen, totlen); 865292207Savos goto fail; 866251538Srpaulo } 867251538Srpaulo 868260463Skevlo m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 869292207Savos if (__predict_false(m == NULL)) { 870292207Savos device_printf(sc->sc_dev, "%s: could not allocate RX mbuf\n", 871292207Savos __func__); 872292207Savos goto fail; 873251538Srpaulo } 874251538Srpaulo 875251538Srpaulo /* Finalize mbuf. */ 876292207Savos memcpy(mtod(m, uint8_t *), (uint8_t *)stat, totlen); 877292207Savos m->m_pkthdr.len = m->m_len = totlen; 878292207Savos 879251538Srpaulo return (m); 880292207Savosfail: 881292207Savos counter_u64_add(ic->ic_ierrors, 1); 882292207Savos return (NULL); 883251538Srpaulo} 884251538Srpaulo 885251538Srpaulostatic struct mbuf * 886292207Savosurtwn_report_intr(struct usb_xfer *xfer, struct urtwn_data *data) 887251538Srpaulo{ 888251538Srpaulo struct urtwn_softc *sc = data->sc; 889287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 890251538Srpaulo struct r92c_rx_stat *stat; 891251538Srpaulo uint8_t *buf; 892292167Savos int len; 893251538Srpaulo 894251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 895251538Srpaulo 896251538Srpaulo if (len < sizeof(*stat)) { 897287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 898251538Srpaulo return (NULL); 899251538Srpaulo } 900251538Srpaulo 901251538Srpaulo buf = data->buf; 902292167Savos stat = (struct r92c_rx_stat *)buf; 903292167Savos 904297596Sadrian /* 905297596Sadrian * For 88E chips we can tie the FF flushing here; 906297596Sadrian * this is where we do know exactly how deep the 907297596Sadrian * transmit queue is. 908297596Sadrian * 909297596Sadrian * But it won't work for R92 chips, so we can't 910297596Sadrian * take the easy way out. 911297596Sadrian */ 912297596Sadrian 913292167Savos if (sc->chip & URTWN_CHIP_88E) { 914292167Savos int report_sel = MS(le32toh(stat->rxdw3), R88E_RXDW3_RPT); 915292167Savos 916292167Savos switch (report_sel) { 917292167Savos case R88E_RXDW3_RPT_RX: 918292207Savos return (urtwn_rxeof(sc, buf, len)); 919292167Savos case R88E_RXDW3_RPT_TX1: 920292167Savos urtwn_r88e_ratectl_tx_complete(sc, &stat[1]); 921292167Savos break; 922292167Savos default: 923294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, 924294471Savos "%s: case %d was not handled\n", __func__, 925294471Savos report_sel); 926292167Savos break; 927292167Savos } 928292167Savos } else 929292207Savos return (urtwn_rxeof(sc, buf, len)); 930292167Savos 931292167Savos return (NULL); 932292167Savos} 933292167Savos 934292167Savosstatic struct mbuf * 935292207Savosurtwn_rxeof(struct urtwn_softc *sc, uint8_t *buf, int len) 936292167Savos{ 937292167Savos struct r92c_rx_stat *stat; 938292167Savos struct mbuf *m, *m0 = NULL, *prevm = NULL; 939292167Savos uint32_t rxdw0; 940292167Savos int totlen, pktlen, infosz, npkts; 941292167Savos 942251538Srpaulo /* Get the number of encapsulated frames. */ 943251538Srpaulo stat = (struct r92c_rx_stat *)buf; 944251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 945294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 946294471Savos "%s: Rx %d frames in one chunk\n", __func__, npkts); 947251538Srpaulo 948251538Srpaulo /* Process all of them. */ 949251538Srpaulo while (npkts-- > 0) { 950251538Srpaulo if (len < sizeof(*stat)) 951251538Srpaulo break; 952251538Srpaulo stat = (struct r92c_rx_stat *)buf; 953251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 954251538Srpaulo 955251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 956251538Srpaulo if (pktlen == 0) 957251538Srpaulo break; 958251538Srpaulo 959251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 960251538Srpaulo 961251538Srpaulo /* Make sure everything fits in xfer. */ 962251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 963251538Srpaulo if (totlen > len) 964251538Srpaulo break; 965251538Srpaulo 966292207Savos m = urtwn_rx_copy_to_mbuf(sc, stat, totlen); 967251538Srpaulo if (m0 == NULL) 968251538Srpaulo m0 = m; 969251538Srpaulo if (prevm == NULL) 970251538Srpaulo prevm = m; 971251538Srpaulo else { 972251538Srpaulo prevm->m_next = m; 973251538Srpaulo prevm = m; 974251538Srpaulo } 975251538Srpaulo 976251538Srpaulo /* Next chunk is 128-byte aligned. */ 977251538Srpaulo totlen = (totlen + 127) & ~127; 978251538Srpaulo buf += totlen; 979251538Srpaulo len -= totlen; 980251538Srpaulo } 981251538Srpaulo 982251538Srpaulo return (m0); 983251538Srpaulo} 984251538Srpaulo 985251538Srpaulostatic void 986292167Savosurtwn_r88e_ratectl_tx_complete(struct urtwn_softc *sc, void *arg) 987292167Savos{ 988292167Savos struct r88e_tx_rpt_ccx *rpt = arg; 989292167Savos struct ieee80211vap *vap; 990292167Savos struct ieee80211_node *ni; 991292167Savos uint8_t macid; 992292167Savos int ntries; 993292167Savos 994292167Savos macid = MS(rpt->rptb1, R88E_RPTB1_MACID); 995292167Savos ntries = MS(rpt->rptb2, R88E_RPTB2_RETRY_CNT); 996292167Savos 997292167Savos URTWN_NT_LOCK(sc); 998292167Savos ni = sc->node_list[macid]; 999292167Savos if (ni != NULL) { 1000292167Savos vap = ni->ni_vap; 1001294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: frame for macid %d was" 1002294471Savos "%s sent (%d retries)\n", __func__, macid, 1003294471Savos (rpt->rptb1 & R88E_RPTB1_PKT_OK) ? "" : " not", 1004294471Savos ntries); 1005292167Savos 1006292167Savos if (rpt->rptb1 & R88E_RPTB1_PKT_OK) { 1007292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1008292167Savos IEEE80211_RATECTL_TX_SUCCESS, &ntries, NULL); 1009292167Savos } else { 1010292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1011292167Savos IEEE80211_RATECTL_TX_FAILURE, &ntries, NULL); 1012292167Savos } 1013294471Savos } else { 1014294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: macid %d, ni is NULL\n", 1015294471Savos __func__, macid); 1016294471Savos } 1017292167Savos URTWN_NT_UNLOCK(sc); 1018292167Savos} 1019292167Savos 1020292207Savosstatic struct ieee80211_node * 1021292207Savosurtwn_rx_frame(struct urtwn_softc *sc, struct mbuf *m, int8_t *rssi_p) 1022292207Savos{ 1023292207Savos struct ieee80211com *ic = &sc->sc_ic; 1024292207Savos struct ieee80211_frame_min *wh; 1025292207Savos struct r92c_rx_stat *stat; 1026292207Savos uint32_t rxdw0, rxdw3; 1027292207Savos uint8_t rate, cipher; 1028297910Sadrian int8_t rssi = -127; 1029292207Savos int infosz; 1030292207Savos 1031292207Savos stat = mtod(m, struct r92c_rx_stat *); 1032292207Savos rxdw0 = le32toh(stat->rxdw0); 1033292207Savos rxdw3 = le32toh(stat->rxdw3); 1034292207Savos 1035292207Savos rate = MS(rxdw3, R92C_RXDW3_RATE); 1036292207Savos cipher = MS(rxdw0, R92C_RXDW0_CIPHER); 1037292207Savos infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 1038292207Savos 1039292207Savos /* Get RSSI from PHY status descriptor if present. */ 1040292207Savos if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 1041292207Savos if (sc->chip & URTWN_CHIP_88E) 1042292207Savos rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]); 1043292207Savos else 1044292207Savos rssi = urtwn_get_rssi(sc, rate, &stat[1]); 1045297910Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: rssi=%d\n", __func__, rssi); 1046292207Savos /* Update our average RSSI. */ 1047292207Savos urtwn_update_avgrssi(sc, rate, rssi); 1048292207Savos } 1049292207Savos 1050292207Savos if (ieee80211_radiotap_active(ic)) { 1051292207Savos struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 1052292207Savos 1053292207Savos tap->wr_flags = 0; 1054292207Savos 1055292207Savos urtwn_get_tsf(sc, &tap->wr_tsft); 1056292207Savos if (__predict_false(le32toh((uint32_t)tap->wr_tsft) < 1057292207Savos le32toh(stat->rxdw5))) { 1058292207Savos tap->wr_tsft = le32toh(tap->wr_tsft >> 32) - 1; 1059292207Savos tap->wr_tsft = (uint64_t)htole32(tap->wr_tsft) << 32; 1060292207Savos } else 1061292207Savos tap->wr_tsft &= 0xffffffff00000000; 1062292207Savos tap->wr_tsft += stat->rxdw5; 1063292207Savos 1064297175Sadrian /* XXX 20/40? */ 1065297175Sadrian /* XXX shortgi? */ 1066297175Sadrian 1067292207Savos /* Map HW rate index to 802.11 rate. */ 1068292207Savos if (!(rxdw3 & R92C_RXDW3_HT)) { 1069292207Savos tap->wr_rate = ridx2rate[rate]; 1070292207Savos } else if (rate >= 12) { /* MCS0~15. */ 1071292207Savos /* Bit 7 set means HT MCS instead of rate. */ 1072292207Savos tap->wr_rate = 0x80 | (rate - 12); 1073292207Savos } 1074297910Sadrian 1075297910Sadrian /* XXX TODO: this isn't right; should use the last good RSSI */ 1076292207Savos tap->wr_dbm_antsignal = rssi; 1077292207Savos tap->wr_dbm_antnoise = URTWN_NOISE_FLOOR; 1078292207Savos } 1079292207Savos 1080292207Savos *rssi_p = rssi; 1081292207Savos 1082292207Savos /* Drop descriptor. */ 1083292207Savos m_adj(m, sizeof(*stat) + infosz); 1084292207Savos wh = mtod(m, struct ieee80211_frame_min *); 1085292207Savos 1086292207Savos if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) && 1087292207Savos cipher != R92C_CAM_ALGO_NONE) { 1088292207Savos m->m_flags |= M_WEP; 1089292207Savos } 1090292207Savos 1091292207Savos if (m->m_len >= sizeof(*wh)) 1092292207Savos return (ieee80211_find_rxnode(ic, wh)); 1093292207Savos 1094292207Savos return (NULL); 1095292207Savos} 1096292207Savos 1097292167Savosstatic void 1098251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1099251538Srpaulo{ 1100251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1101287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1102251538Srpaulo struct ieee80211_node *ni; 1103251538Srpaulo struct mbuf *m = NULL, *next; 1104251538Srpaulo struct urtwn_data *data; 1105292207Savos int8_t nf, rssi; 1106251538Srpaulo 1107251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1108251538Srpaulo 1109251538Srpaulo switch (USB_GET_STATE(xfer)) { 1110251538Srpaulo case USB_ST_TRANSFERRED: 1111251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1112251538Srpaulo if (data == NULL) 1113251538Srpaulo goto tr_setup; 1114251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1115292207Savos m = urtwn_report_intr(xfer, data); 1116251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1117251538Srpaulo /* FALLTHROUGH */ 1118251538Srpaulo case USB_ST_SETUP: 1119251538Srpaulotr_setup: 1120251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 1121251538Srpaulo if (data == NULL) { 1122251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 1123297596Sadrian goto finish; 1124251538Srpaulo } 1125251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1126251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1127251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 1128251538Srpaulo usbd_xfer_max_len(xfer)); 1129251538Srpaulo usbd_transfer_submit(xfer); 1130251538Srpaulo 1131251538Srpaulo /* 1132251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 1133251538Srpaulo * ieee80211_input() because here is at the end of a USB 1134251538Srpaulo * callback and safe to unlock. 1135251538Srpaulo */ 1136251538Srpaulo while (m != NULL) { 1137251538Srpaulo next = m->m_next; 1138251538Srpaulo m->m_next = NULL; 1139292207Savos 1140292207Savos ni = urtwn_rx_frame(sc, m, &rssi); 1141297910Sadrian 1142297910Sadrian /* Store a global last-good RSSI */ 1143297910Sadrian if (rssi != -127) 1144297910Sadrian sc->last_rssi = rssi; 1145297910Sadrian 1146292207Savos URTWN_UNLOCK(sc); 1147292207Savos 1148251538Srpaulo nf = URTWN_NOISE_FLOOR; 1149251538Srpaulo if (ni != NULL) { 1150297910Sadrian if (rssi != -127) 1151297910Sadrian URTWN_NODE(ni)->last_rssi = rssi; 1152297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 1153297175Sadrian m->m_flags |= M_AMPDU; 1154297910Sadrian (void)ieee80211_input(ni, m, 1155297910Sadrian URTWN_NODE(ni)->last_rssi - nf, nf); 1156251538Srpaulo ieee80211_free_node(ni); 1157289799Savos } else { 1158297910Sadrian /* Use last good global RSSI */ 1159297910Sadrian (void)ieee80211_input_all(ic, m, 1160297910Sadrian sc->last_rssi - nf, nf); 1161289799Savos } 1162292207Savos URTWN_LOCK(sc); 1163251538Srpaulo m = next; 1164251538Srpaulo } 1165251538Srpaulo break; 1166251538Srpaulo default: 1167251538Srpaulo /* needs it to the inactive queue due to a error. */ 1168251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1169251538Srpaulo if (data != NULL) { 1170251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1171251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1172251538Srpaulo } 1173251538Srpaulo if (error != USB_ERR_CANCELLED) { 1174251538Srpaulo usbd_xfer_set_stall(xfer); 1175287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1176251538Srpaulo goto tr_setup; 1177251538Srpaulo } 1178251538Srpaulo break; 1179251538Srpaulo } 1180297596Sadrianfinish: 1181297596Sadrian /* Finished receive; age anything left on the FF queue by a little bump */ 1182297596Sadrian /* 1183297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1184297596Sadrian * flush the FF staging queue if we're approaching idle. 1185297596Sadrian */ 1186297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1187297596Sadrian URTWN_UNLOCK(sc); 1188297596Sadrian ieee80211_ff_age_all(ic, 1); 1189297596Sadrian URTWN_LOCK(sc); 1190297596Sadrian#endif 1191297596Sadrian 1192297596Sadrian /* Kick-start more transmit in case we stalled */ 1193297596Sadrian urtwn_start(sc); 1194251538Srpaulo} 1195251538Srpaulo 1196251538Srpaulostatic void 1197289891Savosurtwn_txeof(struct urtwn_softc *sc, struct urtwn_data *data, int status) 1198251538Srpaulo{ 1199251538Srpaulo 1200251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1201289891Savos 1202290631Savos if (data->ni != NULL) /* not a beacon frame */ 1203290631Savos ieee80211_tx_complete(data->ni, data->m, status); 1204289891Savos 1205297596Sadrian if (sc->sc_tx_n_active > 0) 1206297596Sadrian sc->sc_tx_n_active--; 1207297596Sadrian 1208287197Sglebius data->ni = NULL; 1209287197Sglebius data->m = NULL; 1210289891Savos 1211251538Srpaulo sc->sc_txtimer = 0; 1212289891Savos 1213289891Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1214251538Srpaulo} 1215251538Srpaulo 1216289066Skevlostatic int 1217289066Skevlourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 1218289066Skevlo int ndata, int maxsz) 1219289066Skevlo{ 1220289066Skevlo int i, error; 1221289066Skevlo 1222289066Skevlo for (i = 0; i < ndata; i++) { 1223289066Skevlo struct urtwn_data *dp = &data[i]; 1224289066Skevlo dp->sc = sc; 1225289066Skevlo dp->m = NULL; 1226289066Skevlo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1227289066Skevlo if (dp->buf == NULL) { 1228289066Skevlo device_printf(sc->sc_dev, 1229289066Skevlo "could not allocate buffer\n"); 1230289066Skevlo error = ENOMEM; 1231289066Skevlo goto fail; 1232289066Skevlo } 1233289066Skevlo dp->ni = NULL; 1234289066Skevlo } 1235289066Skevlo 1236289066Skevlo return (0); 1237289066Skevlofail: 1238289066Skevlo urtwn_free_list(sc, data, ndata); 1239289066Skevlo return (error); 1240289066Skevlo} 1241289066Skevlo 1242289066Skevlostatic int 1243289066Skevlourtwn_alloc_rx_list(struct urtwn_softc *sc) 1244289066Skevlo{ 1245289066Skevlo int error, i; 1246289066Skevlo 1247289066Skevlo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 1248289066Skevlo URTWN_RXBUFSZ); 1249289066Skevlo if (error != 0) 1250289066Skevlo return (error); 1251289066Skevlo 1252289066Skevlo STAILQ_INIT(&sc->sc_rx_active); 1253289066Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 1254289066Skevlo 1255289066Skevlo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 1256289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1257289066Skevlo 1258289066Skevlo return (0); 1259289066Skevlo} 1260289066Skevlo 1261289066Skevlostatic int 1262289066Skevlourtwn_alloc_tx_list(struct urtwn_softc *sc) 1263289066Skevlo{ 1264289066Skevlo int error, i; 1265289066Skevlo 1266289066Skevlo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 1267289066Skevlo URTWN_TXBUFSZ); 1268289066Skevlo if (error != 0) 1269289066Skevlo return (error); 1270289066Skevlo 1271289066Skevlo STAILQ_INIT(&sc->sc_tx_active); 1272289066Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 1273289066Skevlo STAILQ_INIT(&sc->sc_tx_pending); 1274289066Skevlo 1275289066Skevlo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 1276289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 1277289066Skevlo 1278289066Skevlo return (0); 1279289066Skevlo} 1280289066Skevlo 1281251538Srpaulostatic void 1282289066Skevlourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 1283289066Skevlo{ 1284289066Skevlo int i; 1285289066Skevlo 1286289066Skevlo for (i = 0; i < ndata; i++) { 1287289066Skevlo struct urtwn_data *dp = &data[i]; 1288289066Skevlo 1289289066Skevlo if (dp->buf != NULL) { 1290289066Skevlo free(dp->buf, M_USBDEV); 1291289066Skevlo dp->buf = NULL; 1292289066Skevlo } 1293289066Skevlo if (dp->ni != NULL) { 1294289066Skevlo ieee80211_free_node(dp->ni); 1295289066Skevlo dp->ni = NULL; 1296289066Skevlo } 1297289066Skevlo } 1298289066Skevlo} 1299289066Skevlo 1300289066Skevlostatic void 1301289066Skevlourtwn_free_rx_list(struct urtwn_softc *sc) 1302289066Skevlo{ 1303289066Skevlo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 1304289066Skevlo} 1305289066Skevlo 1306289066Skevlostatic void 1307289066Skevlourtwn_free_tx_list(struct urtwn_softc *sc) 1308289066Skevlo{ 1309289066Skevlo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 1310289066Skevlo} 1311289066Skevlo 1312289066Skevlostatic void 1313251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 1314251538Srpaulo{ 1315251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1316297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1317297596Sadrian struct ieee80211com *ic = &sc->sc_ic; 1318297596Sadrian#endif 1319251538Srpaulo struct urtwn_data *data; 1320251538Srpaulo 1321251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1322251538Srpaulo 1323251538Srpaulo switch (USB_GET_STATE(xfer)){ 1324251538Srpaulo case USB_ST_TRANSFERRED: 1325251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1326251538Srpaulo if (data == NULL) 1327251538Srpaulo goto tr_setup; 1328251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1329289891Savos urtwn_txeof(sc, data, 0); 1330251538Srpaulo /* FALLTHROUGH */ 1331251538Srpaulo case USB_ST_SETUP: 1332251538Srpaulotr_setup: 1333251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 1334251538Srpaulo if (data == NULL) { 1335294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1336294471Savos "%s: empty pending queue\n", __func__); 1337297596Sadrian sc->sc_tx_n_active = 0; 1338288353Sadrian goto finish; 1339251538Srpaulo } 1340251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1341251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1342251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1343251538Srpaulo usbd_transfer_submit(xfer); 1344297596Sadrian sc->sc_tx_n_active++; 1345251538Srpaulo break; 1346251538Srpaulo default: 1347251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1348251538Srpaulo if (data == NULL) 1349251538Srpaulo goto tr_setup; 1350289891Savos STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1351289891Savos urtwn_txeof(sc, data, 1); 1352251538Srpaulo if (error != USB_ERR_CANCELLED) { 1353251538Srpaulo usbd_xfer_set_stall(xfer); 1354251538Srpaulo goto tr_setup; 1355251538Srpaulo } 1356251538Srpaulo break; 1357251538Srpaulo } 1358288353Sadrianfinish: 1359297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1360297596Sadrian /* 1361297596Sadrian * If the TX active queue drops below a certain 1362297596Sadrian * threshold, ensure we age fast-frames out so they're 1363297596Sadrian * transmitted. 1364297596Sadrian */ 1365297596Sadrian if (sc->sc_tx_n_active <= 1) { 1366297596Sadrian /* XXX ew - net80211 should defer this for us! */ 1367297596Sadrian 1368297596Sadrian /* 1369297596Sadrian * Note: this sc_tx_n_active currently tracks 1370297596Sadrian * the number of pending transmit submissions 1371297596Sadrian * and not the actual depth of the TX frames 1372297596Sadrian * pending to the hardware. That means that 1373297596Sadrian * we're going to end up with some sub-optimal 1374297596Sadrian * aggregation behaviour. 1375297596Sadrian */ 1376297596Sadrian /* 1377297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1378297596Sadrian * flush the FF staging queue if we're approaching idle. 1379297596Sadrian */ 1380297596Sadrian URTWN_UNLOCK(sc); 1381297596Sadrian ieee80211_ff_flush(ic, WME_AC_VO); 1382297596Sadrian ieee80211_ff_flush(ic, WME_AC_VI); 1383297596Sadrian ieee80211_ff_flush(ic, WME_AC_BE); 1384297596Sadrian ieee80211_ff_flush(ic, WME_AC_BK); 1385297596Sadrian URTWN_LOCK(sc); 1386297596Sadrian } 1387297596Sadrian#endif 1388288353Sadrian /* Kick-start more transmit */ 1389288353Sadrian urtwn_start(sc); 1390251538Srpaulo} 1391251538Srpaulo 1392251538Srpaulostatic struct urtwn_data * 1393251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 1394251538Srpaulo{ 1395251538Srpaulo struct urtwn_data *bf; 1396251538Srpaulo 1397251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 1398251538Srpaulo if (bf != NULL) 1399251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 1400294471Savos else { 1401294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1402294471Savos "%s: out of xmit buffers\n", __func__); 1403294471Savos } 1404251538Srpaulo return (bf); 1405251538Srpaulo} 1406251538Srpaulo 1407251538Srpaulostatic struct urtwn_data * 1408251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 1409251538Srpaulo{ 1410251538Srpaulo struct urtwn_data *bf; 1411251538Srpaulo 1412251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1413251538Srpaulo 1414251538Srpaulo bf = _urtwn_getbuf(sc); 1415294471Savos if (bf == NULL) { 1416294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: stop queue\n", 1417294471Savos __func__); 1418294471Savos } 1419251538Srpaulo return (bf); 1420251538Srpaulo} 1421251538Srpaulo 1422291698Savosstatic usb_error_t 1423251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1424251538Srpaulo int len) 1425251538Srpaulo{ 1426251538Srpaulo usb_device_request_t req; 1427251538Srpaulo 1428251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1429251538Srpaulo req.bRequest = R92C_REQ_REGS; 1430251538Srpaulo USETW(req.wValue, addr); 1431251538Srpaulo USETW(req.wIndex, 0); 1432251538Srpaulo USETW(req.wLength, len); 1433251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1434251538Srpaulo} 1435251538Srpaulo 1436291698Savosstatic usb_error_t 1437251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 1438251538Srpaulo{ 1439291698Savos return (urtwn_write_region_1(sc, addr, &val, sizeof(val))); 1440251538Srpaulo} 1441251538Srpaulo 1442291698Savosstatic usb_error_t 1443251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 1444251538Srpaulo{ 1445251538Srpaulo val = htole16(val); 1446291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1447251538Srpaulo} 1448251538Srpaulo 1449291698Savosstatic usb_error_t 1450251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 1451251538Srpaulo{ 1452251538Srpaulo val = htole32(val); 1453291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1454251538Srpaulo} 1455251538Srpaulo 1456291698Savosstatic usb_error_t 1457251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1458251538Srpaulo int len) 1459251538Srpaulo{ 1460251538Srpaulo usb_device_request_t req; 1461251538Srpaulo 1462251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 1463251538Srpaulo req.bRequest = R92C_REQ_REGS; 1464251538Srpaulo USETW(req.wValue, addr); 1465251538Srpaulo USETW(req.wIndex, 0); 1466251538Srpaulo USETW(req.wLength, len); 1467251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1468251538Srpaulo} 1469251538Srpaulo 1470251538Srpaulostatic uint8_t 1471251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 1472251538Srpaulo{ 1473251538Srpaulo uint8_t val; 1474251538Srpaulo 1475251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 1476251538Srpaulo return (0xff); 1477251538Srpaulo return (val); 1478251538Srpaulo} 1479251538Srpaulo 1480251538Srpaulostatic uint16_t 1481251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 1482251538Srpaulo{ 1483251538Srpaulo uint16_t val; 1484251538Srpaulo 1485251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 1486251538Srpaulo return (0xffff); 1487251538Srpaulo return (le16toh(val)); 1488251538Srpaulo} 1489251538Srpaulo 1490251538Srpaulostatic uint32_t 1491251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 1492251538Srpaulo{ 1493251538Srpaulo uint32_t val; 1494251538Srpaulo 1495251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 1496251538Srpaulo return (0xffffffff); 1497251538Srpaulo return (le32toh(val)); 1498251538Srpaulo} 1499251538Srpaulo 1500251538Srpaulostatic int 1501251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1502251538Srpaulo{ 1503251538Srpaulo struct r92c_fw_cmd cmd; 1504291698Savos usb_error_t error; 1505251538Srpaulo int ntries; 1506251538Srpaulo 1507295871Savos if (!(sc->sc_flags & URTWN_FW_LOADED)) { 1508295871Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, "%s: firmware " 1509295871Savos "was not loaded; command (id %d) will be discarded\n", 1510295871Savos __func__, id); 1511295871Savos return (0); 1512295871Savos } 1513295871Savos 1514251538Srpaulo /* Wait for current FW box to be empty. */ 1515251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1516251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1517251538Srpaulo break; 1518266472Shselasky urtwn_ms_delay(sc); 1519251538Srpaulo } 1520251538Srpaulo if (ntries == 100) { 1521251538Srpaulo device_printf(sc->sc_dev, 1522251538Srpaulo "could not send firmware command\n"); 1523251538Srpaulo return (ETIMEDOUT); 1524251538Srpaulo } 1525251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1526251538Srpaulo cmd.id = id; 1527251538Srpaulo if (len > 3) 1528251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1529251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1530251538Srpaulo memcpy(cmd.msg, buf, len); 1531251538Srpaulo 1532251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1533291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1534251538Srpaulo (uint8_t *)&cmd + 4, 2); 1535291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1536291698Savos return (EIO); 1537291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1538251538Srpaulo (uint8_t *)&cmd + 0, 4); 1539291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1540291698Savos return (EIO); 1541251538Srpaulo 1542251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1543251538Srpaulo return (0); 1544251538Srpaulo} 1545251538Srpaulo 1546292174Savosstatic void 1547292174Savosurtwn_cmdq_cb(void *arg, int pending) 1548292174Savos{ 1549292174Savos struct urtwn_softc *sc = arg; 1550292174Savos struct urtwn_cmdq *item; 1551292174Savos 1552292174Savos /* 1553292174Savos * Device must be powered on (via urtwn_power_on()) 1554292174Savos * before any command may be sent. 1555292174Savos */ 1556292174Savos URTWN_LOCK(sc); 1557292174Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 1558292174Savos URTWN_UNLOCK(sc); 1559292174Savos return; 1560292174Savos } 1561292174Savos 1562292174Savos URTWN_CMDQ_LOCK(sc); 1563292174Savos while (sc->cmdq[sc->cmdq_first].func != NULL) { 1564292174Savos item = &sc->cmdq[sc->cmdq_first]; 1565292174Savos sc->cmdq_first = (sc->cmdq_first + 1) % URTWN_CMDQ_SIZE; 1566292174Savos URTWN_CMDQ_UNLOCK(sc); 1567292174Savos 1568292174Savos item->func(sc, &item->data); 1569292174Savos 1570292174Savos URTWN_CMDQ_LOCK(sc); 1571292174Savos memset(item, 0, sizeof (*item)); 1572292174Savos } 1573292174Savos URTWN_CMDQ_UNLOCK(sc); 1574292174Savos URTWN_UNLOCK(sc); 1575292174Savos} 1576292174Savos 1577292174Savosstatic int 1578292174Savosurtwn_cmd_sleepable(struct urtwn_softc *sc, const void *ptr, size_t len, 1579292174Savos CMD_FUNC_PROTO) 1580292174Savos{ 1581292174Savos struct ieee80211com *ic = &sc->sc_ic; 1582292174Savos 1583292174Savos KASSERT(len <= sizeof(union sec_param), ("buffer overflow")); 1584292174Savos 1585292174Savos URTWN_CMDQ_LOCK(sc); 1586292174Savos if (sc->cmdq[sc->cmdq_last].func != NULL) { 1587292174Savos device_printf(sc->sc_dev, "%s: cmdq overflow\n", __func__); 1588292174Savos URTWN_CMDQ_UNLOCK(sc); 1589292174Savos 1590292174Savos return (EAGAIN); 1591292174Savos } 1592292174Savos 1593292174Savos if (ptr != NULL) 1594292174Savos memcpy(&sc->cmdq[sc->cmdq_last].data, ptr, len); 1595292174Savos sc->cmdq[sc->cmdq_last].func = func; 1596292174Savos sc->cmdq_last = (sc->cmdq_last + 1) % URTWN_CMDQ_SIZE; 1597292174Savos URTWN_CMDQ_UNLOCK(sc); 1598292174Savos 1599292174Savos ieee80211_runtask(ic, &sc->cmdq_task); 1600292174Savos 1601292174Savos return (0); 1602292174Savos} 1603292174Savos 1604264912Skevlostatic __inline void 1605251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1606251538Srpaulo{ 1607264912Skevlo 1608264912Skevlo sc->sc_rf_write(sc, chain, addr, val); 1609264912Skevlo} 1610264912Skevlo 1611264912Skevlostatic void 1612264912Skevlourtwn_r92c_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1613264912Skevlo uint32_t val) 1614264912Skevlo{ 1615251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1616251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1617251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1618251538Srpaulo} 1619251538Srpaulo 1620264912Skevlostatic void 1621264912Skevlourtwn_r88e_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1622264912Skevlouint32_t val) 1623264912Skevlo{ 1624264912Skevlo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1625264912Skevlo SM(R88E_LSSI_PARAM_ADDR, addr) | 1626264912Skevlo SM(R92C_LSSI_PARAM_DATA, val)); 1627264912Skevlo} 1628264912Skevlo 1629251538Srpaulostatic uint32_t 1630251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1631251538Srpaulo{ 1632251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1633251538Srpaulo 1634251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1635251538Srpaulo if (chain != 0) 1636251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1637251538Srpaulo 1638251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1639251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1640266472Shselasky urtwn_ms_delay(sc); 1641251538Srpaulo 1642251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1643251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1644251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1645266472Shselasky urtwn_ms_delay(sc); 1646251538Srpaulo 1647251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1648251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1649266472Shselasky urtwn_ms_delay(sc); 1650251538Srpaulo 1651251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1652251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1653251538Srpaulo else 1654251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1655251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1656251538Srpaulo} 1657251538Srpaulo 1658251538Srpaulostatic int 1659251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1660251538Srpaulo{ 1661291698Savos usb_error_t error; 1662251538Srpaulo int ntries; 1663251538Srpaulo 1664291698Savos error = urtwn_write_4(sc, R92C_LLT_INIT, 1665251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1666251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1667251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1668291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1669291698Savos return (EIO); 1670251538Srpaulo /* Wait for write operation to complete. */ 1671251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1672251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1673251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1674251538Srpaulo return (0); 1675266472Shselasky urtwn_ms_delay(sc); 1676251538Srpaulo } 1677251538Srpaulo return (ETIMEDOUT); 1678251538Srpaulo} 1679251538Srpaulo 1680291264Savosstatic int 1681291264Savosurtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val) 1682251538Srpaulo{ 1683251538Srpaulo uint32_t reg; 1684291698Savos usb_error_t error; 1685251538Srpaulo int ntries; 1686251538Srpaulo 1687291264Savos if (sc->last_rom_addr >= URTWN_EFUSE_MAX_LEN) 1688291264Savos return (EFAULT); 1689291264Savos 1690251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1691291264Savos reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 1692251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1693291264Savos 1694291698Savos error = urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1695291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1696291698Savos return (EIO); 1697251538Srpaulo /* Wait for read operation to complete. */ 1698251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1699251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1700251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1701291264Savos break; 1702266472Shselasky urtwn_ms_delay(sc); 1703251538Srpaulo } 1704291264Savos if (ntries == 100) { 1705291264Savos device_printf(sc->sc_dev, 1706291264Savos "could not read efuse byte at address 0x%x\n", 1707291264Savos sc->last_rom_addr); 1708291264Savos return (ETIMEDOUT); 1709291264Savos } 1710291264Savos 1711291264Savos *val = MS(reg, R92C_EFUSE_CTRL_DATA); 1712291264Savos sc->last_rom_addr++; 1713291264Savos 1714291264Savos return (0); 1715251538Srpaulo} 1716251538Srpaulo 1717291264Savosstatic int 1718291264Savosurtwn_efuse_read_data(struct urtwn_softc *sc, uint8_t *rom, uint8_t off, 1719291264Savos uint8_t msk) 1720291264Savos{ 1721291264Savos uint8_t reg; 1722291264Savos int i, error; 1723291264Savos 1724291264Savos for (i = 0; i < 4; i++) { 1725291264Savos if (msk & (1 << i)) 1726291264Savos continue; 1727291264Savos error = urtwn_efuse_read_next(sc, ®); 1728291264Savos if (error != 0) 1729291264Savos return (error); 1730294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1731294471Savos off * 8 + i * 2, reg); 1732291264Savos rom[off * 8 + i * 2 + 0] = reg; 1733291264Savos 1734291264Savos error = urtwn_efuse_read_next(sc, ®); 1735291264Savos if (error != 0) 1736291264Savos return (error); 1737294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1738294471Savos off * 8 + i * 2 + 1, reg); 1739291264Savos rom[off * 8 + i * 2 + 1] = reg; 1740291264Savos } 1741291264Savos 1742291264Savos return (0); 1743291264Savos} 1744291264Savos 1745294471Savos#ifdef USB_DEBUG 1746251538Srpaulostatic void 1747291264Savosurtwn_dump_rom_contents(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1748251538Srpaulo{ 1749251538Srpaulo int i; 1750251538Srpaulo 1751291264Savos /* Dump ROM contents. */ 1752291264Savos device_printf(sc->sc_dev, "%s:", __func__); 1753291264Savos for (i = 0; i < size; i++) { 1754291264Savos if (i % 32 == 0) 1755291264Savos printf("\n%03X: ", i); 1756291264Savos else if (i % 4 == 0) 1757291264Savos printf(" "); 1758291264Savos 1759291264Savos printf("%02X", rom[i]); 1760291264Savos } 1761291264Savos printf("\n"); 1762291264Savos} 1763291264Savos#endif 1764291264Savos 1765291264Savosstatic int 1766291264Savosurtwn_efuse_read(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1767291264Savos{ 1768291264Savos#define URTWN_CHK(res) do { \ 1769291264Savos if ((error = res) != 0) \ 1770291264Savos goto end; \ 1771291264Savos} while(0) 1772291264Savos uint8_t msk, off, reg; 1773291264Savos int error; 1774291264Savos 1775291698Savos URTWN_CHK(urtwn_efuse_switch_power(sc)); 1776264912Skevlo 1777291264Savos /* Read full ROM image. */ 1778291264Savos sc->last_rom_addr = 0; 1779291264Savos memset(rom, 0xff, size); 1780291264Savos 1781291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1782291264Savos while (reg != 0xff) { 1783291264Savos /* check for extended header */ 1784291264Savos if ((sc->chip & URTWN_CHIP_88E) && (reg & 0x1f) == 0x0f) { 1785291264Savos off = reg >> 5; 1786291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1787291264Savos 1788291264Savos if ((reg & 0x0f) != 0x0f) 1789291264Savos off = ((reg & 0xf0) >> 1) | off; 1790291264Savos else 1791291264Savos continue; 1792291264Savos } else 1793291264Savos off = reg >> 4; 1794251538Srpaulo msk = reg & 0xf; 1795291264Savos 1796291264Savos URTWN_CHK(urtwn_efuse_read_data(sc, rom, off, msk)); 1797291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1798251538Srpaulo } 1799291264Savos 1800291264Savosend: 1801291264Savos 1802294471Savos#ifdef USB_DEBUG 1803294471Savos if (sc->sc_debug & URTWN_DEBUG_ROM) 1804291264Savos urtwn_dump_rom_contents(sc, rom, size); 1805251538Srpaulo#endif 1806291264Savos 1807282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); 1808291264Savos 1809291264Savos if (error != 0) { 1810291264Savos device_printf(sc->sc_dev, "%s: error while reading ROM\n", 1811291264Savos __func__); 1812291264Savos } 1813291264Savos 1814291264Savos return (error); 1815291264Savos#undef URTWN_CHK 1816282623Skevlo} 1817281592Skevlo 1818291698Savosstatic int 1819264912Skevlourtwn_efuse_switch_power(struct urtwn_softc *sc) 1820264912Skevlo{ 1821291698Savos usb_error_t error; 1822264912Skevlo uint32_t reg; 1823251538Srpaulo 1824291698Savos error = urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); 1825291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1826291698Savos return (EIO); 1827281918Skevlo 1828264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1829264912Skevlo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1830291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1831264912Skevlo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1832291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1833291698Savos return (EIO); 1834264912Skevlo } 1835264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1836264912Skevlo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1837291698Savos error = urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1838264912Skevlo reg | R92C_SYS_FUNC_EN_ELDR); 1839291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1840291698Savos return (EIO); 1841264912Skevlo } 1842264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1843264912Skevlo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1844264912Skevlo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1845291698Savos error = urtwn_write_2(sc, R92C_SYS_CLKR, 1846264912Skevlo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1847291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1848291698Savos return (EIO); 1849264912Skevlo } 1850291698Savos 1851291698Savos return (0); 1852264912Skevlo} 1853264912Skevlo 1854251538Srpaulostatic int 1855251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1856251538Srpaulo{ 1857251538Srpaulo uint32_t reg; 1858251538Srpaulo 1859264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1860264912Skevlo return (0); 1861264912Skevlo 1862251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1863251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1864251538Srpaulo return (EIO); 1865251538Srpaulo 1866251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1867251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1868251538Srpaulo /* Check if it is a castrated 8192C. */ 1869251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1870251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1871251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1872251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1873251538Srpaulo } 1874251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1875251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1876251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1877251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1878251538Srpaulo } 1879251538Srpaulo return (0); 1880251538Srpaulo} 1881251538Srpaulo 1882291264Savosstatic int 1883251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1884251538Srpaulo{ 1885291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 1886291264Savos int error; 1887251538Srpaulo 1888251538Srpaulo /* Read full ROM image. */ 1889291264Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(*rom)); 1890291264Savos if (error != 0) 1891291264Savos return (error); 1892251538Srpaulo 1893251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1894291264Savos sc->last_rom_addr = 0x1fa; 1895291264Savos error = urtwn_efuse_read_next(sc, &sc->pa_setting); 1896291264Savos if (error != 0) 1897291264Savos return (error); 1898294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: PA setting=0x%x\n", __func__, 1899294471Savos sc->pa_setting); 1900251538Srpaulo 1901251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1902251538Srpaulo 1903251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1904294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type=%d\n", 1905294471Savos __func__, sc->regulatory); 1906287197Sglebius IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1907251538Srpaulo 1908264912Skevlo sc->sc_rf_write = urtwn_r92c_rf_write; 1909264912Skevlo sc->sc_power_on = urtwn_r92c_power_on; 1910295874Savos sc->sc_power_off = urtwn_r92c_power_off; 1911291264Savos 1912291264Savos return (0); 1913251538Srpaulo} 1914251538Srpaulo 1915291264Savosstatic int 1916264912Skevlourtwn_r88e_read_rom(struct urtwn_softc *sc) 1917264912Skevlo{ 1918294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 1919294198Savos int error; 1920264912Skevlo 1921294198Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(sc->rom.r88e_rom)); 1922291264Savos if (error != 0) 1923291264Savos return (error); 1924264912Skevlo 1925294198Savos sc->bw20_tx_pwr_diff = (rom->tx_pwr_diff >> 4); 1926264912Skevlo if (sc->bw20_tx_pwr_diff & 0x08) 1927264912Skevlo sc->bw20_tx_pwr_diff |= 0xf0; 1928294198Savos sc->ofdm_tx_pwr_diff = (rom->tx_pwr_diff & 0xf); 1929264912Skevlo if (sc->ofdm_tx_pwr_diff & 0x08) 1930264912Skevlo sc->ofdm_tx_pwr_diff |= 0xf0; 1931294198Savos sc->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY); 1932294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type %d\n", 1933294471Savos __func__,sc->regulatory); 1934294198Savos IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1935264912Skevlo 1936264912Skevlo sc->sc_rf_write = urtwn_r88e_rf_write; 1937264912Skevlo sc->sc_power_on = urtwn_r88e_power_on; 1938295874Savos sc->sc_power_off = urtwn_r88e_power_off; 1939291264Savos 1940291264Savos return (0); 1941264912Skevlo} 1942264912Skevlo 1943251538Srpaulo/* 1944251538Srpaulo * Initialize rate adaptation in firmware. 1945251538Srpaulo */ 1946251538Srpaulostatic int 1947251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 1948251538Srpaulo{ 1949287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1950251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1951251538Srpaulo struct ieee80211_node *ni; 1952297175Sadrian struct ieee80211_rateset *rs, *rs_ht; 1953251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 1954251538Srpaulo uint32_t rates, basicrates; 1955251538Srpaulo uint8_t mode; 1956251538Srpaulo int maxrate, maxbasicrate, error, i, j; 1957251538Srpaulo 1958251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1959251538Srpaulo rs = &ni->ni_rates; 1960297175Sadrian rs_ht = (struct ieee80211_rateset *) &ni->ni_htrates; 1961251538Srpaulo 1962251538Srpaulo /* Get normal and basic rates mask. */ 1963251538Srpaulo rates = basicrates = 0; 1964251538Srpaulo maxrate = maxbasicrate = 0; 1965297175Sadrian 1966297175Sadrian /* This is for 11bg */ 1967251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 1968251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 1969289758Savos for (j = 0; j < nitems(ridx2rate); j++) 1970289758Savos if ((rs->rs_rates[i] & IEEE80211_RATE_VAL) == 1971289758Savos ridx2rate[j]) 1972251538Srpaulo break; 1973289758Savos if (j == nitems(ridx2rate)) /* Unknown rate, skip. */ 1974251538Srpaulo continue; 1975251538Srpaulo rates |= 1 << j; 1976251538Srpaulo if (j > maxrate) 1977251538Srpaulo maxrate = j; 1978251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 1979251538Srpaulo basicrates |= 1 << j; 1980251538Srpaulo if (j > maxbasicrate) 1981251538Srpaulo maxbasicrate = j; 1982251538Srpaulo } 1983251538Srpaulo } 1984297175Sadrian 1985297175Sadrian /* If we're doing 11n, enable 11n rates */ 1986297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) { 1987297175Sadrian for (i = 0; i < rs_ht->rs_nrates; i++) { 1988297175Sadrian if ((rs_ht->rs_rates[i] & 0x7f) > 0xf) 1989297175Sadrian continue; 1990297175Sadrian /* 11n rates start at index 12 */ 1991297175Sadrian j = ((rs_ht->rs_rates[i]) & 0xf) + 12; 1992297175Sadrian rates |= (1 << j); 1993297175Sadrian 1994297175Sadrian /* Guard against the rate table being oddly ordered */ 1995297175Sadrian if (j > maxrate) 1996297175Sadrian maxrate = j; 1997297175Sadrian } 1998297175Sadrian } 1999297175Sadrian 2000297175Sadrian#if 0 2001297175Sadrian if (ic->ic_curmode == IEEE80211_MODE_11NG) 2002297175Sadrian raid = R92C_RAID_11GN; 2003297175Sadrian#endif 2004297175Sadrian /* NB: group addressed frames are done at 11bg rates for now */ 2005251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2006251538Srpaulo mode = R92C_RAID_11B; 2007251538Srpaulo else 2008251538Srpaulo mode = R92C_RAID_11BG; 2009297175Sadrian /* XXX misleading 'mode' value here for unicast frames */ 2010294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, 2011294471Savos "%s: mode 0x%x, rates 0x%08x, basicrates 0x%08x\n", __func__, 2012251538Srpaulo mode, rates, basicrates); 2013251538Srpaulo 2014251538Srpaulo /* Set rates mask for group addressed frames. */ 2015251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 2016251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 2017251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2018251538Srpaulo if (error != 0) { 2019252401Srpaulo ieee80211_free_node(ni); 2020251538Srpaulo device_printf(sc->sc_dev, 2021251538Srpaulo "could not add broadcast station\n"); 2022251538Srpaulo return (error); 2023251538Srpaulo } 2024297175Sadrian 2025251538Srpaulo /* Set initial MRR rate. */ 2026294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxbasicrate %d\n", __func__, 2027294471Savos maxbasicrate); 2028251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 2029251538Srpaulo maxbasicrate); 2030251538Srpaulo 2031251538Srpaulo /* Set rates mask for unicast frames. */ 2032297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2033297175Sadrian mode = R92C_RAID_11GN; 2034297175Sadrian else if (ic->ic_curmode == IEEE80211_MODE_11B) 2035297175Sadrian mode = R92C_RAID_11B; 2036297175Sadrian else 2037297175Sadrian mode = R92C_RAID_11BG; 2038251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 2039251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 2040251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2041251538Srpaulo if (error != 0) { 2042252401Srpaulo ieee80211_free_node(ni); 2043251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 2044251538Srpaulo return (error); 2045251538Srpaulo } 2046251538Srpaulo /* Set initial MRR rate. */ 2047294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxrate %d\n", __func__, 2048294471Savos maxrate); 2049251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 2050251538Srpaulo maxrate); 2051251538Srpaulo 2052251538Srpaulo /* Indicate highest supported rate. */ 2053297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2054297175Sadrian ni->ni_txrate = rs_ht->rs_rates[rs_ht->rs_nrates - 1] 2055297175Sadrian | IEEE80211_RATE_MCS; 2056297175Sadrian else 2057297175Sadrian ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 2058252401Srpaulo ieee80211_free_node(ni); 2059252401Srpaulo 2060251538Srpaulo return (0); 2061251538Srpaulo} 2062251538Srpaulo 2063290439Savosstatic void 2064290631Savosurtwn_init_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2065251538Srpaulo{ 2066290631Savos struct r92c_tx_desc *txd = &uvp->bcn_desc; 2067290631Savos 2068290631Savos txd->txdw0 = htole32( 2069290631Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | R92C_TXDW0_BMCAST | 2070290631Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2071290631Savos txd->txdw1 = htole32( 2072290631Savos SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) | 2073290631Savos SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 2074290631Savos 2075291858Savos if (sc->chip & URTWN_CHIP_88E) { 2076290631Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 2077291858Savos txd->txdseq |= htole16(R88E_TXDSEQ_HWSEQ_EN); 2078291858Savos } else { 2079290631Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 2080291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2081291858Savos } 2082290631Savos 2083290631Savos txd->txdw4 = htole32(R92C_TXDW4_DRVRATE); 2084290631Savos txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE, URTWN_RIDX_CCK1)); 2085251538Srpaulo} 2086251538Srpaulo 2087290631Savosstatic int 2088290631Savosurtwn_setup_beacon(struct urtwn_softc *sc, struct ieee80211_node *ni) 2089290631Savos{ 2090290631Savos struct ieee80211vap *vap = ni->ni_vap; 2091290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2092290631Savos struct mbuf *m; 2093290631Savos int error; 2094290631Savos 2095290631Savos URTWN_ASSERT_LOCKED(sc); 2096290631Savos 2097290631Savos if (ni->ni_chan == IEEE80211_CHAN_ANYC) 2098290631Savos return (EINVAL); 2099290631Savos 2100290631Savos m = ieee80211_beacon_alloc(ni); 2101290631Savos if (m == NULL) { 2102290631Savos device_printf(sc->sc_dev, 2103290631Savos "%s: could not allocate beacon frame\n", __func__); 2104290631Savos return (ENOMEM); 2105290631Savos } 2106290631Savos 2107290631Savos if (uvp->bcn_mbuf != NULL) 2108290631Savos m_freem(uvp->bcn_mbuf); 2109290631Savos 2110290631Savos uvp->bcn_mbuf = m; 2111290631Savos 2112290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2113290631Savos return (error); 2114290631Savos 2115290631Savos /* XXX bcnq stuck workaround */ 2116290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2117290631Savos return (error); 2118290631Savos 2119294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_BEACON, "%s: beacon was %srecognized\n", 2120294471Savos __func__, urtwn_read_1(sc, R92C_TDECTRL + 2) & 2121294471Savos (R92C_TDECTRL_BCN_VALID >> 16) ? "" : "not "); 2122294471Savos 2123290631Savos return (0); 2124290631Savos} 2125290631Savos 2126251538Srpaulostatic void 2127290631Savosurtwn_update_beacon(struct ieee80211vap *vap, int item) 2128290631Savos{ 2129290631Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2130290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2131290631Savos struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 2132290631Savos struct ieee80211_node *ni = vap->iv_bss; 2133290631Savos int mcast = 0; 2134290631Savos 2135290631Savos URTWN_LOCK(sc); 2136290631Savos if (uvp->bcn_mbuf == NULL) { 2137290631Savos uvp->bcn_mbuf = ieee80211_beacon_alloc(ni); 2138290631Savos if (uvp->bcn_mbuf == NULL) { 2139290631Savos device_printf(sc->sc_dev, 2140290631Savos "%s: could not allocate beacon frame\n", __func__); 2141290631Savos URTWN_UNLOCK(sc); 2142290631Savos return; 2143290631Savos } 2144290631Savos } 2145290631Savos URTWN_UNLOCK(sc); 2146290631Savos 2147290631Savos if (item == IEEE80211_BEACON_TIM) 2148290631Savos mcast = 1; /* XXX */ 2149290631Savos 2150290631Savos setbit(bo->bo_flags, item); 2151290631Savos ieee80211_beacon_update(ni, uvp->bcn_mbuf, mcast); 2152290631Savos 2153290631Savos URTWN_LOCK(sc); 2154290631Savos urtwn_tx_beacon(sc, uvp); 2155290631Savos URTWN_UNLOCK(sc); 2156290631Savos} 2157290631Savos 2158290631Savos/* 2159290631Savos * Push a beacon frame into the chip. Beacon will 2160290631Savos * be repeated by the chip every R92C_BCN_INTERVAL. 2161290631Savos */ 2162290631Savosstatic int 2163290631Savosurtwn_tx_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2164290631Savos{ 2165290631Savos struct r92c_tx_desc *desc = &uvp->bcn_desc; 2166290631Savos struct urtwn_data *bf; 2167290631Savos 2168290631Savos URTWN_ASSERT_LOCKED(sc); 2169290631Savos 2170290631Savos bf = urtwn_getbuf(sc); 2171290631Savos if (bf == NULL) 2172290631Savos return (ENOMEM); 2173290631Savos 2174290631Savos memcpy(bf->buf, desc, sizeof(*desc)); 2175290631Savos urtwn_tx_start(sc, uvp->bcn_mbuf, IEEE80211_FC0_TYPE_MGT, bf); 2176290631Savos 2177290631Savos sc->sc_txtimer = 5; 2178290631Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2179290631Savos 2180290631Savos return (0); 2181290631Savos} 2182290631Savos 2183292175Savosstatic int 2184292175Savosurtwn_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k, 2185292175Savos ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix) 2186292175Savos{ 2187292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2188292175Savos uint8_t i; 2189292175Savos 2190292175Savos if (!(&vap->iv_nw_keys[0] <= k && 2191292175Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) { 2192292175Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 2193292175Savos URTWN_LOCK(sc); 2194292175Savos /* 2195292175Savos * First 4 slots for group keys, 2196292175Savos * what is left - for pairwise. 2197292175Savos * XXX incompatible with IBSS RSN. 2198292175Savos */ 2199292175Savos for (i = IEEE80211_WEP_NKID; 2200292175Savos i < R92C_CAM_ENTRY_COUNT; i++) { 2201292175Savos if ((sc->keys_bmap & (1 << i)) == 0) { 2202292175Savos sc->keys_bmap |= 1 << i; 2203292175Savos *keyix = i; 2204292175Savos break; 2205292175Savos } 2206292175Savos } 2207292175Savos URTWN_UNLOCK(sc); 2208292175Savos if (i == R92C_CAM_ENTRY_COUNT) { 2209292175Savos device_printf(sc->sc_dev, 2210292175Savos "%s: no free space in the key table\n", 2211292175Savos __func__); 2212292175Savos return 0; 2213292175Savos } 2214292175Savos } else 2215292175Savos *keyix = 0; 2216292175Savos } else { 2217292175Savos *keyix = k - vap->iv_nw_keys; 2218292175Savos } 2219292175Savos *rxkeyix = *keyix; 2220292175Savos return 1; 2221292175Savos} 2222292175Savos 2223290631Savosstatic void 2224292175Savosurtwn_key_set_cb(struct urtwn_softc *sc, union sec_param *data) 2225292175Savos{ 2226292175Savos struct ieee80211_key *k = &data->key; 2227292175Savos uint8_t algo, keyid; 2228292175Savos int i, error; 2229292175Savos 2230292175Savos if (k->wk_keyix < IEEE80211_WEP_NKID) 2231292175Savos keyid = k->wk_keyix; 2232292175Savos else 2233292175Savos keyid = 0; 2234292175Savos 2235292175Savos /* Map net80211 cipher to HW crypto algorithm. */ 2236292175Savos switch (k->wk_cipher->ic_cipher) { 2237292175Savos case IEEE80211_CIPHER_WEP: 2238292175Savos if (k->wk_keylen < 8) 2239292175Savos algo = R92C_CAM_ALGO_WEP40; 2240292175Savos else 2241292175Savos algo = R92C_CAM_ALGO_WEP104; 2242292175Savos break; 2243292175Savos case IEEE80211_CIPHER_TKIP: 2244292175Savos algo = R92C_CAM_ALGO_TKIP; 2245292175Savos break; 2246292175Savos case IEEE80211_CIPHER_AES_CCM: 2247292175Savos algo = R92C_CAM_ALGO_AES; 2248292175Savos break; 2249292175Savos default: 2250292175Savos device_printf(sc->sc_dev, "%s: undefined cipher %d\n", 2251292175Savos __func__, k->wk_cipher->ic_cipher); 2252292175Savos return; 2253292175Savos } 2254292175Savos 2255294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2256294471Savos "%s: keyix %d, keyid %d, algo %d/%d, flags %04X, len %d, " 2257294471Savos "macaddr %s\n", __func__, k->wk_keyix, keyid, 2258294471Savos k->wk_cipher->ic_cipher, algo, k->wk_flags, k->wk_keylen, 2259294471Savos ether_sprintf(k->wk_macaddr)); 2260292175Savos 2261292175Savos /* Write key. */ 2262292175Savos for (i = 0; i < 4; i++) { 2263292175Savos error = urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 2264292175Savos LE_READ_4(&k->wk_key[i * 4])); 2265292175Savos if (error != 0) 2266292175Savos goto fail; 2267292175Savos } 2268292175Savos 2269292175Savos /* Write CTL0 last since that will validate the CAM entry. */ 2270292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 2271292175Savos LE_READ_4(&k->wk_macaddr[2])); 2272292175Savos if (error != 0) 2273292175Savos goto fail; 2274292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 2275292175Savos SM(R92C_CAM_ALGO, algo) | 2276292175Savos SM(R92C_CAM_KEYID, keyid) | 2277292175Savos SM(R92C_CAM_MACLO, LE_READ_2(&k->wk_macaddr[0])) | 2278292175Savos R92C_CAM_VALID); 2279292175Savos if (error != 0) 2280292175Savos goto fail; 2281292175Savos 2282292175Savos return; 2283292175Savos 2284292175Savosfail: 2285292175Savos device_printf(sc->sc_dev, "%s fails, error %d\n", __func__, error); 2286292175Savos} 2287292175Savos 2288292175Savosstatic void 2289292175Savosurtwn_key_del_cb(struct urtwn_softc *sc, union sec_param *data) 2290292175Savos{ 2291292175Savos struct ieee80211_key *k = &data->key; 2292292175Savos int i; 2293292175Savos 2294294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2295294471Savos "%s: keyix %d, flags %04X, macaddr %s\n", __func__, 2296292175Savos k->wk_keyix, k->wk_flags, ether_sprintf(k->wk_macaddr)); 2297292175Savos 2298292175Savos urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 0); 2299292175Savos urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 0); 2300292175Savos 2301292175Savos /* Clear key. */ 2302292175Savos for (i = 0; i < 4; i++) 2303292175Savos urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 0); 2304292175Savos sc->keys_bmap &= ~(1 << k->wk_keyix); 2305292175Savos} 2306292175Savos 2307292175Savosstatic int 2308292175Savosurtwn_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k) 2309292175Savos{ 2310292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2311292175Savos 2312292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2313292175Savos /* Not for us. */ 2314292175Savos return (1); 2315292175Savos } 2316292175Savos 2317292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_set_cb)); 2318292175Savos} 2319292175Savos 2320292175Savosstatic int 2321292175Savosurtwn_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k) 2322292175Savos{ 2323292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2324292175Savos 2325292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2326292175Savos /* Not for us. */ 2327292175Savos return (1); 2328292175Savos } 2329292175Savos 2330292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_del_cb)); 2331292175Savos} 2332292175Savos 2333292175Savosstatic void 2334290651Savosurtwn_tsf_task_adhoc(void *arg, int pending) 2335290651Savos{ 2336290651Savos struct ieee80211vap *vap = arg; 2337290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2338290651Savos struct ieee80211_node *ni; 2339290651Savos uint32_t reg; 2340290651Savos 2341290651Savos URTWN_LOCK(sc); 2342290651Savos ni = ieee80211_ref_node(vap->iv_bss); 2343290651Savos reg = urtwn_read_1(sc, R92C_BCN_CTRL); 2344290651Savos 2345290651Savos /* Accept beacons with the same BSSID. */ 2346290651Savos urtwn_set_rx_bssid_all(sc, 0); 2347290651Savos 2348290651Savos /* Enable synchronization. */ 2349290651Savos reg &= ~R92C_BCN_CTRL_DIS_TSF_UDT0; 2350290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2351290651Savos 2352290651Savos /* Synchronize. */ 2353290651Savos usb_pause_mtx(&sc->sc_mtx, hz * ni->ni_intval * 5 / 1000); 2354290651Savos 2355290651Savos /* Disable synchronization. */ 2356290651Savos reg |= R92C_BCN_CTRL_DIS_TSF_UDT0; 2357290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2358290651Savos 2359290651Savos /* Remove beacon filter. */ 2360290651Savos urtwn_set_rx_bssid_all(sc, 1); 2361290651Savos 2362290651Savos /* Enable beaconing. */ 2363290651Savos urtwn_write_1(sc, R92C_MBID_NUM, 2364290651Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2365290651Savos reg |= R92C_BCN_CTRL_EN_BCN; 2366290651Savos 2367290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2368290651Savos ieee80211_free_node(ni); 2369290651Savos URTWN_UNLOCK(sc); 2370290651Savos} 2371290651Savos 2372290651Savosstatic void 2373290631Savosurtwn_tsf_sync_enable(struct urtwn_softc *sc, struct ieee80211vap *vap) 2374290631Savos{ 2375290651Savos struct ieee80211com *ic = &sc->sc_ic; 2376290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2377290651Savos 2378290631Savos /* Reset TSF. */ 2379290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2380290631Savos 2381290631Savos switch (vap->iv_opmode) { 2382290631Savos case IEEE80211_M_STA: 2383290631Savos /* Enable TSF synchronization. */ 2384290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2385290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) & 2386290631Savos ~R92C_BCN_CTRL_DIS_TSF_UDT0); 2387290631Savos break; 2388290651Savos case IEEE80211_M_IBSS: 2389290651Savos ieee80211_runtask(ic, &uvp->tsf_task_adhoc); 2390290651Savos break; 2391290631Savos case IEEE80211_M_HOSTAP: 2392290631Savos /* Enable beaconing. */ 2393290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2394290631Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2395290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2396290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 2397290631Savos break; 2398290631Savos default: 2399290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2400290631Savos vap->iv_opmode); 2401290631Savos return; 2402290631Savos } 2403290631Savos} 2404290631Savos 2405290631Savosstatic void 2406292203Savosurtwn_get_tsf(struct urtwn_softc *sc, uint64_t *buf) 2407292203Savos{ 2408292203Savos urtwn_read_region_1(sc, R92C_TSFTR, (uint8_t *)buf, sizeof(*buf)); 2409292203Savos} 2410292203Savos 2411292203Savosstatic void 2412251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 2413251538Srpaulo{ 2414251538Srpaulo uint8_t reg; 2415281069Srpaulo 2416251538Srpaulo if (led == URTWN_LED_LINK) { 2417264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 2418264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 2419264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, reg | 0x60); 2420264912Skevlo if (!on) { 2421264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0x90; 2422264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, 2423264912Skevlo reg | R92C_LEDCFG0_DIS); 2424264912Skevlo urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 2425264912Skevlo urtwn_read_1(sc, R92C_MAC_PINMUX_CFG) & 2426264912Skevlo 0xfe); 2427264912Skevlo } 2428264912Skevlo } else { 2429264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 2430264912Skevlo if (!on) 2431264912Skevlo reg |= R92C_LEDCFG0_DIS; 2432264912Skevlo urtwn_write_1(sc, R92C_LEDCFG0, reg); 2433264912Skevlo } 2434264912Skevlo sc->ledlink = on; /* Save LED state. */ 2435251538Srpaulo } 2436251538Srpaulo} 2437251538Srpaulo 2438289811Savosstatic void 2439289811Savosurtwn_set_mode(struct urtwn_softc *sc, uint8_t mode) 2440289811Savos{ 2441289811Savos uint8_t reg; 2442289811Savos 2443289811Savos reg = urtwn_read_1(sc, R92C_MSR); 2444289811Savos reg = (reg & ~R92C_MSR_MASK) | mode; 2445289811Savos urtwn_write_1(sc, R92C_MSR, reg); 2446289811Savos} 2447289811Savos 2448290651Savosstatic void 2449290651Savosurtwn_ibss_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 2450290651Savos const struct ieee80211_rx_stats *rxs, 2451290651Savos int rssi, int nf) 2452290651Savos{ 2453290651Savos struct ieee80211vap *vap = ni->ni_vap; 2454290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2455290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2456290651Savos uint64_t ni_tstamp, curr_tstamp; 2457290651Savos 2458290651Savos uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 2459290651Savos 2460290651Savos if (vap->iv_state == IEEE80211_S_RUN && 2461290651Savos (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 2462290651Savos subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 2463290651Savos ni_tstamp = le64toh(ni->ni_tstamp.tsf); 2464290651Savos URTWN_LOCK(sc); 2465290651Savos urtwn_get_tsf(sc, &curr_tstamp); 2466290651Savos URTWN_UNLOCK(sc); 2467290651Savos curr_tstamp = le64toh(curr_tstamp); 2468290651Savos 2469290651Savos if (ni_tstamp >= curr_tstamp) 2470290651Savos (void) ieee80211_ibss_merge(ni); 2471290651Savos } 2472290651Savos} 2473290651Savos 2474251538Srpaulostatic int 2475251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 2476251538Srpaulo{ 2477251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 2478251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 2479286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2480251538Srpaulo struct ieee80211_node *ni; 2481251538Srpaulo enum ieee80211_state ostate; 2482290631Savos uint32_t reg; 2483290631Savos uint8_t mode; 2484290631Savos int error = 0; 2485251538Srpaulo 2486251538Srpaulo ostate = vap->iv_state; 2487294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_STATE, "%s -> %s\n", 2488294471Savos ieee80211_state_name[ostate], ieee80211_state_name[nstate]); 2489251538Srpaulo 2490251538Srpaulo IEEE80211_UNLOCK(ic); 2491251538Srpaulo URTWN_LOCK(sc); 2492251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 2493251538Srpaulo 2494251538Srpaulo if (ostate == IEEE80211_S_RUN) { 2495294473Savos /* Stop calibration. */ 2496294473Savos callout_stop(&sc->sc_calib_to); 2497294473Savos 2498251538Srpaulo /* Turn link LED off. */ 2499251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2500251538Srpaulo 2501251538Srpaulo /* Set media status to 'No Link'. */ 2502289811Savos urtwn_set_mode(sc, R92C_MSR_NOLINK); 2503251538Srpaulo 2504251538Srpaulo /* Stop Rx of data frames. */ 2505251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 2506251538Srpaulo 2507251538Srpaulo /* Disable TSF synchronization. */ 2508251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 2509290631Savos (urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN) | 2510251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 2511251538Srpaulo 2512290631Savos /* Disable beaconing. */ 2513290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2514290631Savos urtwn_read_1(sc, R92C_MBID_NUM) & ~R92C_MBID_TXBCN_RPT0); 2515290631Savos 2516290631Savos /* Reset TSF. */ 2517290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2518290631Savos 2519251538Srpaulo /* Reset EDCA parameters. */ 2520251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 2521251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 2522251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 2523251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 2524251538Srpaulo } 2525251538Srpaulo 2526251538Srpaulo switch (nstate) { 2527251538Srpaulo case IEEE80211_S_INIT: 2528251538Srpaulo /* Turn link LED off. */ 2529251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2530251538Srpaulo break; 2531251538Srpaulo case IEEE80211_S_SCAN: 2532251538Srpaulo /* Pause AC Tx queues. */ 2533251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 2534293180Savos urtwn_read_1(sc, R92C_TXPAUSE) | R92C_TX_QUEUE_AC); 2535251538Srpaulo break; 2536251538Srpaulo case IEEE80211_S_AUTH: 2537251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 2538251538Srpaulo break; 2539251538Srpaulo case IEEE80211_S_RUN: 2540251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 2541251538Srpaulo /* Turn link LED on. */ 2542251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2543251538Srpaulo break; 2544251538Srpaulo } 2545251538Srpaulo 2546251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 2547290631Savos 2548290631Savos if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || 2549290631Savos ni->ni_chan == IEEE80211_CHAN_ANYC) { 2550290631Savos device_printf(sc->sc_dev, 2551290631Savos "%s: could not move to RUN state\n", __func__); 2552290631Savos error = EINVAL; 2553290631Savos goto end_run; 2554290631Savos } 2555290631Savos 2556290631Savos switch (vap->iv_opmode) { 2557290631Savos case IEEE80211_M_STA: 2558290631Savos mode = R92C_MSR_INFRA; 2559290631Savos break; 2560290651Savos case IEEE80211_M_IBSS: 2561290651Savos mode = R92C_MSR_ADHOC; 2562290651Savos break; 2563290631Savos case IEEE80211_M_HOSTAP: 2564290631Savos mode = R92C_MSR_AP; 2565290631Savos break; 2566290631Savos default: 2567290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2568290631Savos vap->iv_opmode); 2569290631Savos error = EINVAL; 2570290631Savos goto end_run; 2571290631Savos } 2572290631Savos 2573251538Srpaulo /* Set media status to 'Associated'. */ 2574290631Savos urtwn_set_mode(sc, mode); 2575251538Srpaulo 2576251538Srpaulo /* Set BSSID. */ 2577251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 0, LE_READ_4(&ni->ni_bssid[0])); 2578251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 4, LE_READ_2(&ni->ni_bssid[4])); 2579251538Srpaulo 2580251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2581251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 2582251538Srpaulo else /* 802.11b/g */ 2583251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 2584251538Srpaulo 2585251538Srpaulo /* Enable Rx of data frames. */ 2586251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 2587251538Srpaulo 2588251538Srpaulo /* Flush all AC queues. */ 2589251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 2590251538Srpaulo 2591251538Srpaulo /* Set beacon interval. */ 2592251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 2593251538Srpaulo 2594251538Srpaulo /* Allow Rx from our BSSID only. */ 2595290564Savos if (ic->ic_promisc == 0) { 2596290631Savos reg = urtwn_read_4(sc, R92C_RCR); 2597290631Savos 2598290631Savos if (vap->iv_opmode != IEEE80211_M_HOSTAP) 2599290631Savos reg |= R92C_RCR_CBSSID_DATA; 2600290651Savos if (vap->iv_opmode != IEEE80211_M_IBSS) 2601290651Savos reg |= R92C_RCR_CBSSID_BCN; 2602290631Savos 2603290631Savos urtwn_write_4(sc, R92C_RCR, reg); 2604290564Savos } 2605251538Srpaulo 2606290651Savos if (vap->iv_opmode == IEEE80211_M_HOSTAP || 2607290651Savos vap->iv_opmode == IEEE80211_M_IBSS) { 2608290631Savos error = urtwn_setup_beacon(sc, ni); 2609290631Savos if (error != 0) { 2610290631Savos device_printf(sc->sc_dev, 2611290631Savos "unable to push beacon into the chip, " 2612290631Savos "error %d\n", error); 2613290631Savos goto end_run; 2614290631Savos } 2615290631Savos } 2616290631Savos 2617251538Srpaulo /* Enable TSF synchronization. */ 2618290631Savos urtwn_tsf_sync_enable(sc, vap); 2619251538Srpaulo 2620251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 2621251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 2622251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 2623251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 2624251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 2625251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 2626251538Srpaulo 2627251538Srpaulo /* Intialize rate adaptation. */ 2628292167Savos if (!(sc->chip & URTWN_CHIP_88E)) 2629264912Skevlo urtwn_ra_init(sc); 2630251538Srpaulo /* Turn link LED on. */ 2631251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2632251538Srpaulo 2633251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 2634251538Srpaulo /* Reset temperature calibration state machine. */ 2635294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 2636251538Srpaulo sc->thcal_lctemp = 0; 2637294473Savos /* Start periodic calibration. */ 2638294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2639290631Savos 2640290631Savosend_run: 2641251538Srpaulo ieee80211_free_node(ni); 2642251538Srpaulo break; 2643251538Srpaulo default: 2644251538Srpaulo break; 2645251538Srpaulo } 2646290631Savos 2647251538Srpaulo URTWN_UNLOCK(sc); 2648251538Srpaulo IEEE80211_LOCK(ic); 2649290631Savos return (error != 0 ? error : uvp->newstate(vap, nstate, arg)); 2650251538Srpaulo} 2651251538Srpaulo 2652251538Srpaulostatic void 2653294473Savosurtwn_calib_to(void *arg) 2654294473Savos{ 2655294473Savos struct urtwn_softc *sc = arg; 2656294473Savos 2657294473Savos /* Do it in a process context. */ 2658294473Savos urtwn_cmd_sleepable(sc, NULL, 0, urtwn_calib_cb); 2659294473Savos} 2660294473Savos 2661294473Savosstatic void 2662294473Savosurtwn_calib_cb(struct urtwn_softc *sc, union sec_param *data) 2663294473Savos{ 2664294473Savos /* Do temperature compensation. */ 2665294473Savos urtwn_temp_calib(sc); 2666294473Savos 2667294473Savos if ((urtwn_read_1(sc, R92C_MSR) & R92C_MSR_MASK) != R92C_MSR_NOLINK) 2668294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2669294473Savos} 2670294473Savos 2671294473Savosstatic void 2672251538Srpaulourtwn_watchdog(void *arg) 2673251538Srpaulo{ 2674251538Srpaulo struct urtwn_softc *sc = arg; 2675251538Srpaulo 2676251538Srpaulo if (sc->sc_txtimer > 0) { 2677251538Srpaulo if (--sc->sc_txtimer == 0) { 2678251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 2679287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2680251538Srpaulo return; 2681251538Srpaulo } 2682251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2683251538Srpaulo } 2684251538Srpaulo} 2685251538Srpaulo 2686251538Srpaulostatic void 2687251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 2688251538Srpaulo{ 2689251538Srpaulo int pwdb; 2690251538Srpaulo 2691251538Srpaulo /* Convert antenna signal to percentage. */ 2692251538Srpaulo if (rssi <= -100 || rssi >= 20) 2693251538Srpaulo pwdb = 0; 2694251538Srpaulo else if (rssi >= 0) 2695251538Srpaulo pwdb = 100; 2696251538Srpaulo else 2697251538Srpaulo pwdb = 100 + rssi; 2698264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2699289758Savos if (rate <= URTWN_RIDX_CCK11) { 2700264912Skevlo /* CCK gain is smaller than OFDM/MCS gain. */ 2701264912Skevlo pwdb += 6; 2702264912Skevlo if (pwdb > 100) 2703264912Skevlo pwdb = 100; 2704264912Skevlo if (pwdb <= 14) 2705264912Skevlo pwdb -= 4; 2706264912Skevlo else if (pwdb <= 26) 2707264912Skevlo pwdb -= 8; 2708264912Skevlo else if (pwdb <= 34) 2709264912Skevlo pwdb -= 6; 2710264912Skevlo else if (pwdb <= 42) 2711264912Skevlo pwdb -= 2; 2712264912Skevlo } 2713251538Srpaulo } 2714251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 2715251538Srpaulo sc->avg_pwdb = pwdb; 2716251538Srpaulo else if (sc->avg_pwdb < pwdb) 2717251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 2718251538Srpaulo else 2719251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 2720297175Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: PWDB %d, EMA %d\n", __func__, 2721294471Savos pwdb, sc->avg_pwdb); 2722251538Srpaulo} 2723251538Srpaulo 2724251538Srpaulostatic int8_t 2725251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2726251538Srpaulo{ 2727251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 2728251538Srpaulo struct r92c_rx_phystat *phy; 2729251538Srpaulo struct r92c_rx_cck *cck; 2730251538Srpaulo uint8_t rpt; 2731251538Srpaulo int8_t rssi; 2732251538Srpaulo 2733289758Savos if (rate <= URTWN_RIDX_CCK11) { 2734251538Srpaulo cck = (struct r92c_rx_cck *)physt; 2735251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 2736251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 2737251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 2738251538Srpaulo } else { 2739251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 2740251538Srpaulo rssi = cck->agc_rpt & 0x3e; 2741251538Srpaulo } 2742251538Srpaulo rssi = cckoff[rpt] - rssi; 2743251538Srpaulo } else { /* OFDM/HT. */ 2744251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 2745251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2746251538Srpaulo } 2747251538Srpaulo return (rssi); 2748251538Srpaulo} 2749251538Srpaulo 2750264912Skevlostatic int8_t 2751264912Skevlourtwn_r88e_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2752264912Skevlo{ 2753264912Skevlo struct r92c_rx_phystat *phy; 2754264912Skevlo struct r88e_rx_cck *cck; 2755264912Skevlo uint8_t cck_agc_rpt, lna_idx, vga_idx; 2756264912Skevlo int8_t rssi; 2757264912Skevlo 2758264972Skevlo rssi = 0; 2759289758Savos if (rate <= URTWN_RIDX_CCK11) { 2760264912Skevlo cck = (struct r88e_rx_cck *)physt; 2761264912Skevlo cck_agc_rpt = cck->agc_rpt; 2762264912Skevlo lna_idx = (cck_agc_rpt & 0xe0) >> 5; 2763281069Srpaulo vga_idx = cck_agc_rpt & 0x1f; 2764264912Skevlo switch (lna_idx) { 2765264912Skevlo case 7: 2766264912Skevlo if (vga_idx <= 27) 2767264912Skevlo rssi = -100 + 2* (27 - vga_idx); 2768264912Skevlo else 2769264912Skevlo rssi = -100; 2770264912Skevlo break; 2771264912Skevlo case 6: 2772264912Skevlo rssi = -48 + 2 * (2 - vga_idx); 2773264912Skevlo break; 2774264912Skevlo case 5: 2775264912Skevlo rssi = -42 + 2 * (7 - vga_idx); 2776264912Skevlo break; 2777264912Skevlo case 4: 2778264912Skevlo rssi = -36 + 2 * (7 - vga_idx); 2779264912Skevlo break; 2780264912Skevlo case 3: 2781264912Skevlo rssi = -24 + 2 * (7 - vga_idx); 2782264912Skevlo break; 2783264912Skevlo case 2: 2784264912Skevlo rssi = -12 + 2 * (5 - vga_idx); 2785264912Skevlo break; 2786264912Skevlo case 1: 2787264912Skevlo rssi = 8 - (2 * vga_idx); 2788264912Skevlo break; 2789264912Skevlo case 0: 2790264912Skevlo rssi = 14 - (2 * vga_idx); 2791264912Skevlo break; 2792264912Skevlo } 2793264912Skevlo rssi += 6; 2794264912Skevlo } else { /* OFDM/HT. */ 2795264912Skevlo phy = (struct r92c_rx_phystat *)physt; 2796264912Skevlo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2797264912Skevlo } 2798264912Skevlo return (rssi); 2799264912Skevlo} 2800264912Skevlo 2801292167Savosstatic __inline uint8_t 2802292167Savosrate2ridx(uint8_t rate) 2803292167Savos{ 2804297175Sadrian if (rate & IEEE80211_RATE_MCS) { 2805297175Sadrian /* 11n rates start at idx 12 */ 2806297175Sadrian return ((rate & 0xf) + 12); 2807297175Sadrian } 2808292167Savos switch (rate) { 2809297175Sadrian /* 11g */ 2810292167Savos case 12: return 4; 2811292167Savos case 18: return 5; 2812292167Savos case 24: return 6; 2813292167Savos case 36: return 7; 2814292167Savos case 48: return 8; 2815292167Savos case 72: return 9; 2816292167Savos case 96: return 10; 2817292167Savos case 108: return 11; 2818297175Sadrian /* 11b */ 2819292167Savos case 2: return 0; 2820292167Savos case 4: return 1; 2821292167Savos case 11: return 2; 2822292167Savos case 22: return 3; 2823292167Savos default: return 0; 2824292167Savos } 2825292167Savos} 2826292167Savos 2827251538Srpaulostatic int 2828290630Savosurtwn_tx_data(struct urtwn_softc *sc, struct ieee80211_node *ni, 2829290630Savos struct mbuf *m, struct urtwn_data *data) 2830251538Srpaulo{ 2831292167Savos const struct ieee80211_txparam *tp; 2832287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2833251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 2834292167Savos struct ieee80211_key *k = NULL; 2835292167Savos struct ieee80211_channel *chan; 2836292167Savos struct ieee80211_frame *wh; 2837251538Srpaulo struct r92c_tx_desc *txd; 2838292167Savos uint8_t macid, raid, rate, ridx, subtype, type, tid, qsel; 2839292014Savos int hasqos, ismcast; 2840251538Srpaulo 2841251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2842251538Srpaulo 2843251538Srpaulo /* 2844251538Srpaulo * Software crypto. 2845251538Srpaulo */ 2846290630Savos wh = mtod(m, struct ieee80211_frame *); 2847264912Skevlo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2848290630Savos subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2849292014Savos hasqos = IEEE80211_QOS_HAS_SEQ(wh); 2850290630Savos ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2851264912Skevlo 2852292014Savos /* Select TX ring for this frame. */ 2853292014Savos if (hasqos) { 2854292014Savos tid = ((const struct ieee80211_qosframe *)wh)->i_qos[0]; 2855292014Savos tid &= IEEE80211_QOS_TID; 2856292014Savos } else 2857292014Savos tid = 0; 2858292014Savos 2859292167Savos chan = (ni->ni_chan != IEEE80211_CHAN_ANYC) ? 2860292167Savos ni->ni_chan : ic->ic_curchan; 2861292167Savos tp = &vap->iv_txparms[ieee80211_chan2mode(chan)]; 2862292167Savos 2863292167Savos /* Choose a TX rate index. */ 2864292167Savos if (type == IEEE80211_FC0_TYPE_MGT) 2865292167Savos rate = tp->mgmtrate; 2866292167Savos else if (ismcast) 2867292167Savos rate = tp->mcastrate; 2868292167Savos else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 2869292167Savos rate = tp->ucastrate; 2870292167Savos else if (m->m_flags & M_EAPOL) 2871292167Savos rate = tp->mgmtrate; 2872292167Savos else { 2873292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) { 2874292167Savos /* XXX pass pktlen */ 2875292167Savos (void) ieee80211_ratectl_rate(ni, NULL, 0); 2876292167Savos rate = ni->ni_txrate; 2877292167Savos } else { 2878297175Sadrian /* XXX TODO: drop the default rate for 11b/11g? */ 2879297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2880297175Sadrian rate = IEEE80211_RATE_MCS | 0x4; /* MCS4 */ 2881297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2882292167Savos rate = 108; 2883292167Savos else 2884292167Savos rate = 22; 2885292167Savos } 2886292167Savos } 2887292167Savos 2888297175Sadrian /* 2889297175Sadrian * XXX TODO: this should be per-node, for 11b versus 11bg 2890297175Sadrian * nodes in hostap mode 2891297175Sadrian */ 2892292167Savos ridx = rate2ridx(rate); 2893297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2894297175Sadrian raid = R92C_RAID_11GN; 2895297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2896292167Savos raid = R92C_RAID_11BG; 2897292167Savos else 2898292167Savos raid = R92C_RAID_11B; 2899292167Savos 2900260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2901290630Savos k = ieee80211_crypto_encap(ni, m); 2902251538Srpaulo if (k == NULL) { 2903251538Srpaulo device_printf(sc->sc_dev, 2904251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 2905251538Srpaulo return (ENOBUFS); 2906251538Srpaulo } 2907251538Srpaulo 2908251538Srpaulo /* in case packet header moved, reset pointer */ 2909290630Savos wh = mtod(m, struct ieee80211_frame *); 2910251538Srpaulo } 2911281069Srpaulo 2912251538Srpaulo /* Fill Tx descriptor. */ 2913251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 2914251538Srpaulo memset(txd, 0, sizeof(*txd)); 2915251538Srpaulo 2916251538Srpaulo txd->txdw0 |= htole32( 2917251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 2918251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2919290630Savos if (ismcast) 2920251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 2921290630Savos 2922290630Savos if (!ismcast) { 2923292167Savos if (sc->chip & URTWN_CHIP_88E) { 2924292167Savos struct urtwn_node *un = URTWN_NODE(ni); 2925292167Savos macid = un->id; 2926292167Savos } else 2927292167Savos macid = URTWN_MACID_BSS; 2928290630Savos 2929290630Savos if (type == IEEE80211_FC0_TYPE_DATA) { 2930292014Savos qsel = tid % URTWN_MAX_TID; 2931290630Savos 2932292167Savos if (sc->chip & URTWN_CHIP_88E) { 2933292167Savos txd->txdw2 |= htole32( 2934292167Savos R88E_TXDW2_AGGBK | 2935292167Savos R88E_TXDW2_CCX_RPT); 2936292167Savos } else 2937290630Savos txd->txdw1 |= htole32(R92C_TXDW1_AGGBK); 2938290630Savos 2939297175Sadrian /* protmode, non-HT */ 2940297175Sadrian /* XXX TODO: noack frames? */ 2941297175Sadrian if ((rate & 0x80) == 0 && 2942297175Sadrian (ic->ic_flags & IEEE80211_F_USEPROT)) { 2943290630Savos switch (ic->ic_protmode) { 2944290630Savos case IEEE80211_PROT_CTSONLY: 2945290630Savos txd->txdw4 |= htole32( 2946290630Savos R92C_TXDW4_CTS2SELF | 2947290630Savos R92C_TXDW4_HWRTSEN); 2948290630Savos break; 2949290630Savos case IEEE80211_PROT_RTSCTS: 2950290630Savos txd->txdw4 |= htole32( 2951290630Savos R92C_TXDW4_RTSEN | 2952290630Savos R92C_TXDW4_HWRTSEN); 2953290630Savos break; 2954290630Savos default: 2955290630Savos break; 2956290630Savos } 2957290630Savos } 2958297175Sadrian 2959297175Sadrian /* protmode, HT */ 2960297175Sadrian /* XXX TODO: noack frames? */ 2961297175Sadrian if ((rate & 0x80) && 2962297175Sadrian (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) { 2963297175Sadrian txd->txdw4 |= htole32( 2964297175Sadrian R92C_TXDW4_RTSEN | 2965297175Sadrian R92C_TXDW4_HWRTSEN); 2966297175Sadrian } 2967297175Sadrian 2968297175Sadrian /* XXX TODO: rtsrate is configurable? 24mbit may 2969297175Sadrian * be a bit high for RTS rate? */ 2970290630Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 2971290630Savos URTWN_RIDX_OFDM24)); 2972297175Sadrian 2973290630Savos txd->txdw5 |= htole32(0x0001ff00); 2974290630Savos } else /* IEEE80211_FC0_TYPE_MGT */ 2975290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2976251538Srpaulo } else { 2977290630Savos macid = URTWN_MACID_BC; 2978290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2979290630Savos } 2980251538Srpaulo 2981290630Savos txd->txdw1 |= htole32( 2982290630Savos SM(R92C_TXDW1_QSEL, qsel) | 2983290630Savos SM(R92C_TXDW1_RAID, raid)); 2984290630Savos 2985297175Sadrian /* XXX TODO: 40MHZ flag? */ 2986297175Sadrian /* XXX TODO: AMPDU flag? (AGG_ENABLE or AGG_BREAK?) Density shift? */ 2987297175Sadrian /* XXX Short preamble? */ 2988297175Sadrian /* XXX Short-GI? */ 2989297175Sadrian 2990290630Savos if (sc->chip & URTWN_CHIP_88E) 2991290630Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, macid)); 2992290630Savos else 2993290630Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, macid)); 2994290630Savos 2995290630Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 2996297175Sadrian 2997291858Savos /* Force this rate if needed. */ 2998292167Savos if (URTWN_CHIP_HAS_RATECTL(sc) || ismcast || 2999297175Sadrian (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) || 3000292167Savos (m->m_flags & M_EAPOL) || type != IEEE80211_FC0_TYPE_DATA) 3001251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3002251538Srpaulo 3003292014Savos if (!hasqos) { 3004251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 3005291858Savos if (sc->chip & URTWN_CHIP_88E) 3006291858Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3007291858Savos else 3008291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3009290630Savos } else { 3010290630Savos /* Set sequence number. */ 3011290630Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3012290630Savos } 3013251538Srpaulo 3014292175Savos if (k != NULL && !(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3015292175Savos uint8_t cipher; 3016292175Savos 3017292175Savos switch (k->wk_cipher->ic_cipher) { 3018292175Savos case IEEE80211_CIPHER_WEP: 3019292175Savos case IEEE80211_CIPHER_TKIP: 3020292175Savos cipher = R92C_TXDW1_CIPHER_RC4; 3021292175Savos break; 3022292175Savos case IEEE80211_CIPHER_AES_CCM: 3023292175Savos cipher = R92C_TXDW1_CIPHER_AES; 3024292175Savos break; 3025292175Savos default: 3026292175Savos device_printf(sc->sc_dev, "%s: unknown cipher %d\n", 3027292175Savos __func__, k->wk_cipher->ic_cipher); 3028292175Savos return (EINVAL); 3029292175Savos } 3030292175Savos 3031292175Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3032292175Savos } 3033292175Savos 3034251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 3035251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3036251538Srpaulo 3037251538Srpaulo tap->wt_flags = 0; 3038290630Savos if (k != NULL) 3039290630Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3040290630Savos ieee80211_radiotap_tx(vap, m); 3041251538Srpaulo } 3042251538Srpaulo 3043290630Savos data->ni = ni; 3044251538Srpaulo 3045290630Savos urtwn_tx_start(sc, m, type, data); 3046290630Savos 3047290630Savos return (0); 3048290630Savos} 3049290630Savos 3050292221Savosstatic int 3051292221Savosurtwn_tx_raw(struct urtwn_softc *sc, struct ieee80211_node *ni, 3052292221Savos struct mbuf *m, struct urtwn_data *data, 3053292221Savos const struct ieee80211_bpf_params *params) 3054292221Savos{ 3055292221Savos struct ieee80211vap *vap = ni->ni_vap; 3056292221Savos struct ieee80211_key *k = NULL; 3057292221Savos struct ieee80211_frame *wh; 3058292221Savos struct r92c_tx_desc *txd; 3059292221Savos uint8_t cipher, ridx, type; 3060292221Savos 3061292221Savos /* Encrypt the frame if need be. */ 3062292221Savos cipher = R92C_TXDW1_CIPHER_NONE; 3063292221Savos if (params->ibp_flags & IEEE80211_BPF_CRYPTO) { 3064292221Savos /* Retrieve key for TX. */ 3065292221Savos k = ieee80211_crypto_encap(ni, m); 3066292221Savos if (k == NULL) 3067292221Savos return (ENOBUFS); 3068292221Savos 3069292221Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3070292221Savos switch (k->wk_cipher->ic_cipher) { 3071292221Savos case IEEE80211_CIPHER_WEP: 3072292221Savos case IEEE80211_CIPHER_TKIP: 3073292221Savos cipher = R92C_TXDW1_CIPHER_RC4; 3074292221Savos break; 3075292221Savos case IEEE80211_CIPHER_AES_CCM: 3076292221Savos cipher = R92C_TXDW1_CIPHER_AES; 3077292221Savos break; 3078292221Savos default: 3079292221Savos device_printf(sc->sc_dev, 3080292221Savos "%s: unknown cipher %d\n", 3081292221Savos __func__, k->wk_cipher->ic_cipher); 3082292221Savos return (EINVAL); 3083292221Savos } 3084292221Savos } 3085292221Savos } 3086292221Savos 3087297175Sadrian /* XXX TODO: 11n checks, matching urtwn_tx_data() */ 3088297175Sadrian 3089292221Savos wh = mtod(m, struct ieee80211_frame *); 3090292221Savos type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 3091292221Savos 3092292221Savos /* Fill Tx descriptor. */ 3093292221Savos txd = (struct r92c_tx_desc *)data->buf; 3094292221Savos memset(txd, 0, sizeof(*txd)); 3095292221Savos 3096292221Savos txd->txdw0 |= htole32( 3097292221Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 3098292221Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 3099292221Savos if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 3100292221Savos txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 3101292221Savos 3102292221Savos if (params->ibp_flags & IEEE80211_BPF_RTS) 3103292221Savos txd->txdw4 |= htole32(R92C_TXDW4_RTSEN); 3104292221Savos if (params->ibp_flags & IEEE80211_BPF_CTS) 3105292221Savos txd->txdw4 |= htole32(R92C_TXDW4_CTS2SELF); 3106292221Savos if (txd->txdw4 & htole32(R92C_TXDW4_RTSEN | R92C_TXDW4_CTS2SELF)) { 3107292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWRTSEN); 3108292221Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 3109292221Savos URTWN_RIDX_OFDM24)); 3110292221Savos } 3111292221Savos 3112292221Savos if (sc->chip & URTWN_CHIP_88E) 3113292221Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 3114292221Savos else 3115292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 3116292221Savos 3117297175Sadrian /* XXX TODO: rate index/config (RAID) for 11n? */ 3118292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_MGNT)); 3119292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3120292221Savos 3121292221Savos /* Choose a TX rate index. */ 3122292221Savos ridx = rate2ridx(params->ibp_rate0); 3123292221Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 3124292221Savos txd->txdw5 |= htole32(0x0001ff00); 3125292221Savos txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3126292221Savos 3127292221Savos if (!IEEE80211_QOS_HAS_SEQ(wh)) { 3128292221Savos /* Use HW sequence numbering for non-QoS frames. */ 3129292221Savos if (sc->chip & URTWN_CHIP_88E) 3130292221Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3131292221Savos else 3132292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3133292221Savos } else { 3134292221Savos /* Set sequence number. */ 3135292221Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3136292221Savos } 3137292221Savos 3138292221Savos if (ieee80211_radiotap_active_vap(vap)) { 3139292221Savos struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3140292221Savos 3141292221Savos tap->wt_flags = 0; 3142292221Savos if (k != NULL) 3143292221Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3144292221Savos ieee80211_radiotap_tx(vap, m); 3145292221Savos } 3146292221Savos 3147292221Savos data->ni = ni; 3148292221Savos 3149292221Savos urtwn_tx_start(sc, m, type, data); 3150292221Savos 3151292221Savos return (0); 3152292221Savos} 3153292221Savos 3154290630Savosstatic void 3155290630Savosurtwn_tx_start(struct urtwn_softc *sc, struct mbuf *m, uint8_t type, 3156290630Savos struct urtwn_data *data) 3157290630Savos{ 3158290630Savos struct usb_xfer *xfer; 3159290630Savos struct r92c_tx_desc *txd; 3160290630Savos uint16_t ac, sum; 3161290630Savos int i, xferlen; 3162290630Savos 3163290630Savos URTWN_ASSERT_LOCKED(sc); 3164290630Savos 3165290630Savos ac = M_WME_GETAC(m); 3166290630Savos 3167290630Savos switch (type) { 3168290630Savos case IEEE80211_FC0_TYPE_CTL: 3169290630Savos case IEEE80211_FC0_TYPE_MGT: 3170290630Savos xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 3171290630Savos break; 3172290630Savos default: 3173292014Savos xfer = sc->sc_xfer[wme2queue[ac].qid]; 3174290630Savos break; 3175290630Savos } 3176290630Savos 3177290630Savos txd = (struct r92c_tx_desc *)data->buf; 3178290630Savos txd->txdw0 |= htole32(SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len)); 3179290630Savos 3180290630Savos /* Compute Tx descriptor checksum. */ 3181290630Savos sum = 0; 3182290630Savos for (i = 0; i < sizeof(*txd) / 2; i++) 3183290630Savos sum ^= ((uint16_t *)txd)[i]; 3184290630Savos txd->txdsum = sum; /* NB: already little endian. */ 3185290630Savos 3186290630Savos xferlen = sizeof(*txd) + m->m_pkthdr.len; 3187290630Savos m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&txd[1]); 3188290630Savos 3189251538Srpaulo data->buflen = xferlen; 3190290630Savos data->m = m; 3191251538Srpaulo 3192251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 3193251538Srpaulo usbd_transfer_start(xfer); 3194251538Srpaulo} 3195251538Srpaulo 3196287197Sglebiusstatic int 3197287197Sglebiusurtwn_transmit(struct ieee80211com *ic, struct mbuf *m) 3198251538Srpaulo{ 3199287197Sglebius struct urtwn_softc *sc = ic->ic_softc; 3200287197Sglebius int error; 3201261863Srpaulo 3202261863Srpaulo URTWN_LOCK(sc); 3203287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 3204287197Sglebius URTWN_UNLOCK(sc); 3205287197Sglebius return (ENXIO); 3206287197Sglebius } 3207287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 3208287197Sglebius if (error) { 3209287197Sglebius URTWN_UNLOCK(sc); 3210287197Sglebius return (error); 3211287197Sglebius } 3212287197Sglebius urtwn_start(sc); 3213261863Srpaulo URTWN_UNLOCK(sc); 3214287197Sglebius 3215287197Sglebius return (0); 3216261863Srpaulo} 3217261863Srpaulo 3218261863Srpaulostatic void 3219287197Sglebiusurtwn_start(struct urtwn_softc *sc) 3220261863Srpaulo{ 3221251538Srpaulo struct ieee80211_node *ni; 3222251538Srpaulo struct mbuf *m; 3223251538Srpaulo struct urtwn_data *bf; 3224251538Srpaulo 3225261863Srpaulo URTWN_ASSERT_LOCKED(sc); 3226287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 3227251538Srpaulo bf = urtwn_getbuf(sc); 3228251538Srpaulo if (bf == NULL) { 3229287197Sglebius mbufq_prepend(&sc->sc_snd, m); 3230251538Srpaulo break; 3231251538Srpaulo } 3232251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 3233251538Srpaulo m->m_pkthdr.rcvif = NULL; 3234297596Sadrian 3235297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 3236297596Sadrian __func__, 3237297596Sadrian m); 3238297596Sadrian 3239290630Savos if (urtwn_tx_data(sc, ni, m, bf) != 0) { 3240287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 3241287197Sglebius IFCOUNTER_OERRORS, 1); 3242251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 3243288353Sadrian m_freem(m); 3244251538Srpaulo ieee80211_free_node(ni); 3245251538Srpaulo break; 3246251538Srpaulo } 3247251538Srpaulo sc->sc_txtimer = 5; 3248251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 3249251538Srpaulo } 3250251538Srpaulo} 3251251538Srpaulo 3252287197Sglebiusstatic void 3253287197Sglebiusurtwn_parent(struct ieee80211com *ic) 3254251538Srpaulo{ 3255286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 3256251538Srpaulo 3257263153Skevlo URTWN_LOCK(sc); 3258287197Sglebius if (sc->sc_flags & URTWN_DETACHED) { 3259287197Sglebius URTWN_UNLOCK(sc); 3260287197Sglebius return; 3261287197Sglebius } 3262291698Savos URTWN_UNLOCK(sc); 3263291698Savos 3264287197Sglebius if (ic->ic_nrunning > 0) { 3265291698Savos if (urtwn_init(sc) != 0) { 3266291698Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3267291698Savos if (vap != NULL) 3268291698Savos ieee80211_stop(vap); 3269291698Savos } else 3270291698Savos ieee80211_start_all(ic); 3271291698Savos } else 3272287197Sglebius urtwn_stop(sc); 3273251538Srpaulo} 3274251538Srpaulo 3275264912Skevlostatic __inline int 3276251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 3277251538Srpaulo{ 3278264912Skevlo 3279264912Skevlo return sc->sc_power_on(sc); 3280264912Skevlo} 3281264912Skevlo 3282264912Skevlostatic int 3283264912Skevlourtwn_r92c_power_on(struct urtwn_softc *sc) 3284264912Skevlo{ 3285251538Srpaulo uint32_t reg; 3286291698Savos usb_error_t error; 3287251538Srpaulo int ntries; 3288251538Srpaulo 3289251538Srpaulo /* Wait for autoload done bit. */ 3290251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3291251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 3292251538Srpaulo break; 3293266472Shselasky urtwn_ms_delay(sc); 3294251538Srpaulo } 3295251538Srpaulo if (ntries == 1000) { 3296251538Srpaulo device_printf(sc->sc_dev, 3297251538Srpaulo "timeout waiting for chip autoload\n"); 3298251538Srpaulo return (ETIMEDOUT); 3299251538Srpaulo } 3300251538Srpaulo 3301251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 3302291698Savos error = urtwn_write_1(sc, R92C_RSV_CTRL, 0); 3303291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3304291698Savos return (EIO); 3305251538Srpaulo /* Move SPS into PWM mode. */ 3306291698Savos error = urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 3307291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3308291698Savos return (EIO); 3309266472Shselasky urtwn_ms_delay(sc); 3310251538Srpaulo 3311251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 3312251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 3313291698Savos error = urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3314251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 3315291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3316291698Savos return (EIO); 3317266472Shselasky urtwn_ms_delay(sc); 3318291698Savos error = urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3319251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 3320251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 3321291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3322291698Savos return (EIO); 3323251538Srpaulo } 3324251538Srpaulo 3325251538Srpaulo /* Auto enable WLAN. */ 3326291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3327251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3328291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3329291698Savos return (EIO); 3330251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3331262822Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3332262822Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3333251538Srpaulo break; 3334266472Shselasky urtwn_ms_delay(sc); 3335251538Srpaulo } 3336251538Srpaulo if (ntries == 1000) { 3337251538Srpaulo device_printf(sc->sc_dev, 3338251538Srpaulo "timeout waiting for MAC auto ON\n"); 3339251538Srpaulo return (ETIMEDOUT); 3340251538Srpaulo } 3341251538Srpaulo 3342251538Srpaulo /* Enable radio, GPIO and LED functions. */ 3343291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3344251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 3345251538Srpaulo R92C_APS_FSMCO_PDN_EN | 3346251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 3347291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3348291698Savos return (EIO); 3349251538Srpaulo /* Release RF digital isolation. */ 3350291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 3351251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 3352291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3353291698Savos return (EIO); 3354251538Srpaulo 3355251538Srpaulo /* Initialize MAC. */ 3356291698Savos error = urtwn_write_1(sc, R92C_APSD_CTRL, 3357251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 3358291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3359291698Savos return (EIO); 3360251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 3361251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 3362251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 3363251538Srpaulo break; 3364266472Shselasky urtwn_ms_delay(sc); 3365251538Srpaulo } 3366251538Srpaulo if (ntries == 200) { 3367251538Srpaulo device_printf(sc->sc_dev, 3368251538Srpaulo "timeout waiting for MAC initialization\n"); 3369251538Srpaulo return (ETIMEDOUT); 3370251538Srpaulo } 3371251538Srpaulo 3372251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3373251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 3374251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3375251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3376251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 3377251538Srpaulo R92C_CR_ENSEC; 3378291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3379291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3380291698Savos return (EIO); 3381251538Srpaulo 3382291698Savos error = urtwn_write_1(sc, 0xfe10, 0x19); 3383291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3384291698Savos return (EIO); 3385251538Srpaulo return (0); 3386251538Srpaulo} 3387251538Srpaulo 3388251538Srpaulostatic int 3389264912Skevlourtwn_r88e_power_on(struct urtwn_softc *sc) 3390264912Skevlo{ 3391264912Skevlo uint32_t reg; 3392291698Savos usb_error_t error; 3393264912Skevlo int ntries; 3394264912Skevlo 3395264912Skevlo /* Wait for power ready bit. */ 3396264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3397281918Skevlo if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST) 3398264912Skevlo break; 3399266472Shselasky urtwn_ms_delay(sc); 3400264912Skevlo } 3401264912Skevlo if (ntries == 5000) { 3402264912Skevlo device_printf(sc->sc_dev, 3403264912Skevlo "timeout waiting for chip power up\n"); 3404264912Skevlo return (ETIMEDOUT); 3405264912Skevlo } 3406264912Skevlo 3407264912Skevlo /* Reset BB. */ 3408291698Savos error = urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3409264912Skevlo urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB | 3410264912Skevlo R92C_SYS_FUNC_EN_BB_GLB_RST)); 3411291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3412291698Savos return (EIO); 3413264912Skevlo 3414291698Savos error = urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3415281918Skevlo urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3416291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3417291698Savos return (EIO); 3418264912Skevlo 3419264912Skevlo /* Disable HWPDN. */ 3420291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3421281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN); 3422291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3423291698Savos return (EIO); 3424264912Skevlo 3425264912Skevlo /* Disable WL suspend. */ 3426291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3427281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & 3428281918Skevlo ~(R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE)); 3429291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3430291698Savos return (EIO); 3431264912Skevlo 3432291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3433281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3434291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3435291698Savos return (EIO); 3436264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3437281918Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3438281918Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3439264912Skevlo break; 3440266472Shselasky urtwn_ms_delay(sc); 3441264912Skevlo } 3442264912Skevlo if (ntries == 5000) 3443264912Skevlo return (ETIMEDOUT); 3444264912Skevlo 3445264912Skevlo /* Enable LDO normal mode. */ 3446291698Savos error = urtwn_write_1(sc, R92C_LPLDO_CTRL, 3447295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) & ~R92C_LPLDO_CTRL_SLEEP); 3448291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3449291698Savos return (EIO); 3450264912Skevlo 3451264912Skevlo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3452291698Savos error = urtwn_write_2(sc, R92C_CR, 0); 3453291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3454291698Savos return (EIO); 3455264912Skevlo reg = urtwn_read_2(sc, R92C_CR); 3456264912Skevlo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3457264912Skevlo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3458264912Skevlo R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC | R92C_CR_CALTMR_EN; 3459291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3460291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3461291698Savos return (EIO); 3462264912Skevlo 3463264912Skevlo return (0); 3464264912Skevlo} 3465264912Skevlo 3466295874Savosstatic __inline void 3467295874Savosurtwn_power_off(struct urtwn_softc *sc) 3468295874Savos{ 3469295874Savos 3470295874Savos return sc->sc_power_off(sc); 3471295874Savos} 3472295874Savos 3473295874Savosstatic void 3474295874Savosurtwn_r92c_power_off(struct urtwn_softc *sc) 3475295874Savos{ 3476295874Savos uint32_t reg; 3477295874Savos 3478295874Savos /* Block all Tx queues. */ 3479295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3480295874Savos 3481295874Savos /* Disable RF */ 3482295874Savos urtwn_rf_write(sc, 0, 0, 0); 3483295874Savos 3484295874Savos urtwn_write_1(sc, R92C_APSD_CTRL, R92C_APSD_CTRL_OFF); 3485295874Savos 3486295874Savos /* Reset BB state machine */ 3487295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3488295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA | 3489295874Savos R92C_SYS_FUNC_EN_BB_GLB_RST); 3490295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3491295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA); 3492295874Savos 3493295874Savos /* 3494295874Savos * Reset digital sequence 3495295874Savos */ 3496295874Savos#ifndef URTWN_WITHOUT_UCODE 3497295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) { 3498295874Savos /* Reset MCU ready status */ 3499295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3500295874Savos 3501295874Savos /* If firmware in ram code, do reset */ 3502295874Savos urtwn_fw_reset(sc); 3503295874Savos } 3504295874Savos#endif 3505295874Savos 3506295874Savos /* Reset MAC and Enable 8051 */ 3507295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN + 1, 3508295874Savos (R92C_SYS_FUNC_EN_CPUEN | 3509295874Savos R92C_SYS_FUNC_EN_ELDR | 3510295874Savos R92C_SYS_FUNC_EN_HWPDN) >> 8); 3511295874Savos 3512295874Savos /* Reset MCU ready status */ 3513295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3514295874Savos 3515295874Savos /* Disable MAC clock */ 3516295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3517295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3518295874Savos R92C_SYS_CLKR_ANA8M | 3519295874Savos R92C_SYS_CLKR_LOADER_EN | 3520295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3521295874Savos R92C_SYS_CLKR_SYS_EN | 3522295874Savos R92C_SYS_CLKR_RING_EN | 3523295874Savos 0x4000); 3524295874Savos 3525295874Savos /* Disable AFE PLL */ 3526295874Savos urtwn_write_1(sc, R92C_AFE_PLL_CTRL, 0x80); 3527295874Savos 3528295874Savos /* Gated AFE DIG_CLOCK */ 3529295874Savos urtwn_write_2(sc, R92C_AFE_XTAL_CTRL, 0x880F); 3530295874Savos 3531295874Savos /* Isolated digital to PON */ 3532295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3533295874Savos R92C_SYS_ISO_CTRL_MD2PP | 3534295874Savos R92C_SYS_ISO_CTRL_PA2PCIE | 3535295874Savos R92C_SYS_ISO_CTRL_PD2CORE | 3536295874Savos R92C_SYS_ISO_CTRL_IP2MAC | 3537295874Savos R92C_SYS_ISO_CTRL_DIOP | 3538295874Savos R92C_SYS_ISO_CTRL_DIOE); 3539295874Savos 3540295874Savos /* 3541295874Savos * Pull GPIO PIN to balance level and LED control 3542295874Savos */ 3543295874Savos /* 1. Disable GPIO[7:0] */ 3544295874Savos urtwn_write_2(sc, R92C_GPIO_IOSEL, 0x0000); 3545295874Savos 3546295874Savos reg = urtwn_read_4(sc, R92C_GPIO_PIN_CTRL) & ~0x0000ff00; 3547295874Savos reg |= ((reg << 8) & 0x0000ff00) | 0x00ff0000; 3548295874Savos urtwn_write_4(sc, R92C_GPIO_PIN_CTRL, reg); 3549295874Savos 3550295874Savos /* Disable GPIO[10:8] */ 3551295874Savos urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 0x00); 3552295874Savos 3553295874Savos reg = urtwn_read_2(sc, R92C_GPIO_IO_SEL) & ~0x00f0; 3554295874Savos reg |= (((reg & 0x000f) << 4) | 0x0780); 3555295874Savos urtwn_write_2(sc, R92C_GPIO_IO_SEL, reg); 3556295874Savos 3557295874Savos /* Disable LED0 & 1 */ 3558295874Savos urtwn_write_2(sc, R92C_LEDCFG0, 0x8080); 3559295874Savos 3560295874Savos /* 3561295874Savos * Reset digital sequence 3562295874Savos */ 3563295874Savos /* Disable ELDR clock */ 3564295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3565295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3566295874Savos R92C_SYS_CLKR_ANA8M | 3567295874Savos R92C_SYS_CLKR_LOADER_EN | 3568295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3569295874Savos R92C_SYS_CLKR_SYS_EN | 3570295874Savos R92C_SYS_CLKR_RING_EN | 3571295874Savos 0x4000); 3572295874Savos 3573295874Savos /* Isolated ELDR to PON */ 3574295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL + 1, 3575295874Savos (R92C_SYS_ISO_CTRL_DIOR | 3576295874Savos R92C_SYS_ISO_CTRL_PWC_EV12V) >> 8); 3577295874Savos 3578295874Savos /* 3579295874Savos * Disable analog sequence 3580295874Savos */ 3581295874Savos /* Disable A15 power */ 3582295874Savos urtwn_write_1(sc, R92C_LDOA15_CTRL, R92C_LDOA15_CTRL_OBUF); 3583295874Savos /* Disable digital core power */ 3584295874Savos urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3585295874Savos urtwn_read_1(sc, R92C_LDOV12D_CTRL) & 3586295874Savos ~R92C_LDOV12D_CTRL_LDV12_EN); 3587295874Savos 3588295874Savos /* Enter PFM mode */ 3589295874Savos urtwn_write_1(sc, R92C_SPS0_CTRL, 0x23); 3590295874Savos 3591295874Savos /* Set USB suspend */ 3592295874Savos urtwn_write_2(sc, R92C_APS_FSMCO, 3593295874Savos R92C_APS_FSMCO_APDM_HOST | 3594295874Savos R92C_APS_FSMCO_AFSM_HSUS | 3595295874Savos R92C_APS_FSMCO_PFM_ALDN); 3596295874Savos 3597295874Savos /* Lock ISO/CLK/Power control register. */ 3598295874Savos urtwn_write_1(sc, R92C_RSV_CTRL, 0x0E); 3599295874Savos} 3600295874Savos 3601295874Savosstatic void 3602295874Savosurtwn_r88e_power_off(struct urtwn_softc *sc) 3603295874Savos{ 3604295874Savos uint8_t reg; 3605295874Savos int ntries; 3606295874Savos 3607295874Savos /* Disable any kind of TX reports. */ 3608295874Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 3609295874Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) & 3610295874Savos ~(R88E_TX_RPT1_ENA | R88E_TX_RPT2_ENA)); 3611295874Savos 3612295874Savos /* Stop Rx. */ 3613295874Savos urtwn_write_1(sc, R92C_CR, 0); 3614295874Savos 3615295874Savos /* Move card to Low Power State. */ 3616295874Savos /* Block all Tx queues. */ 3617295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3618295874Savos 3619295874Savos for (ntries = 0; ntries < 20; ntries++) { 3620295874Savos /* Should be zero if no packet is transmitting. */ 3621295874Savos if (urtwn_read_4(sc, R88E_SCH_TXCMD) == 0) 3622295874Savos break; 3623295874Savos 3624295874Savos urtwn_ms_delay(sc); 3625295874Savos } 3626295874Savos if (ntries == 20) { 3627295874Savos device_printf(sc->sc_dev, "%s: failed to block Tx queues\n", 3628295874Savos __func__); 3629295874Savos return; 3630295874Savos } 3631295874Savos 3632295874Savos /* CCK and OFDM are disabled, and clock are gated. */ 3633295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3634295874Savos urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~R92C_SYS_FUNC_EN_BBRSTB); 3635295874Savos 3636295874Savos urtwn_ms_delay(sc); 3637295874Savos 3638295874Savos /* Reset MAC TRX */ 3639295874Savos urtwn_write_1(sc, R92C_CR, 3640295874Savos R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3641295874Savos R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | 3642295874Savos R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN); 3643295874Savos 3644295874Savos /* check if removed later */ 3645295874Savos urtwn_write_1(sc, R92C_CR + 1, 3646295874Savos urtwn_read_1(sc, R92C_CR + 1) & ~(R92C_CR_ENSEC >> 8)); 3647295874Savos 3648295874Savos /* Respond TxOK to scheduler */ 3649295874Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, 3650295874Savos urtwn_read_1(sc, R92C_DUAL_TSF_RST) | 0x20); 3651295874Savos 3652295874Savos /* If firmware in ram code, do reset. */ 3653295874Savos#ifndef URTWN_WITHOUT_UCODE 3654295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) 3655295874Savos urtwn_r88e_fw_reset(sc); 3656295874Savos#endif 3657295874Savos 3658295874Savos /* Reset MCU ready status. */ 3659295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0x00); 3660295874Savos 3661295874Savos /* Disable 32k. */ 3662295874Savos urtwn_write_1(sc, R88E_32K_CTRL, 3663295874Savos urtwn_read_1(sc, R88E_32K_CTRL) & ~0x01); 3664295874Savos 3665295874Savos /* Move card to Disabled state. */ 3666295874Savos /* Turn off RF. */ 3667295874Savos urtwn_write_1(sc, R92C_RF_CTRL, 0); 3668295874Savos 3669295874Savos /* LDO Sleep mode. */ 3670295874Savos urtwn_write_1(sc, R92C_LPLDO_CTRL, 3671295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) | R92C_LPLDO_CTRL_SLEEP); 3672295874Savos 3673295874Savos /* Turn off MAC by HW state machine */ 3674295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3675295874Savos urtwn_read_1(sc, R92C_APS_FSMCO + 1) | 3676295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)); 3677295874Savos 3678295874Savos for (ntries = 0; ntries < 20; ntries++) { 3679295874Savos /* Wait until it will be disabled. */ 3680295874Savos if ((urtwn_read_1(sc, R92C_APS_FSMCO + 1) & 3681295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)) == 0) 3682295874Savos break; 3683295874Savos 3684295874Savos urtwn_ms_delay(sc); 3685295874Savos } 3686295874Savos if (ntries == 20) { 3687295874Savos device_printf(sc->sc_dev, "%s: could not turn off MAC\n", 3688295874Savos __func__); 3689295874Savos return; 3690295874Savos } 3691295874Savos 3692295874Savos /* schmit trigger */ 3693295874Savos urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3694295874Savos urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3695295874Savos 3696295874Savos /* Enable WL suspend. */ 3697295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3698295874Savos (urtwn_read_1(sc, R92C_APS_FSMCO + 1) & ~0x10) | 0x08); 3699295874Savos 3700295874Savos /* Enable bandgap mbias in suspend. */ 3701295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 3, 0); 3702295874Savos 3703295874Savos /* Clear SIC_EN register. */ 3704295874Savos urtwn_write_1(sc, R92C_GPIO_MUXCFG + 1, 3705295874Savos urtwn_read_1(sc, R92C_GPIO_MUXCFG + 1) & ~0x10); 3706295874Savos 3707295874Savos /* Set USB suspend enable local register */ 3708295874Savos urtwn_write_1(sc, R92C_USB_SUSPEND, 3709295874Savos urtwn_read_1(sc, R92C_USB_SUSPEND) | 0x10); 3710295874Savos 3711295874Savos /* Reset MCU IO Wrapper. */ 3712295874Savos reg = urtwn_read_1(sc, R92C_RSV_CTRL + 1); 3713295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08); 3714295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08); 3715295874Savos 3716295874Savos /* marked as 'For Power Consumption' code. */ 3717295874Savos urtwn_write_1(sc, R92C_GPIO_OUT, urtwn_read_1(sc, R92C_GPIO_IN)); 3718295874Savos urtwn_write_1(sc, R92C_GPIO_IOSEL, 0xff); 3719295874Savos 3720295874Savos urtwn_write_1(sc, R92C_GPIO_IO_SEL, 3721295874Savos urtwn_read_1(sc, R92C_GPIO_IO_SEL) << 4); 3722295874Savos urtwn_write_1(sc, R92C_GPIO_MOD, 3723295874Savos urtwn_read_1(sc, R92C_GPIO_MOD) | 0x0f); 3724295874Savos 3725295874Savos /* Set LNA, TRSW, EX_PA Pin to output mode. */ 3726295874Savos urtwn_write_4(sc, R88E_BB_PAD_CTRL, 0x00080808); 3727295874Savos} 3728295874Savos 3729264912Skevlostatic int 3730251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 3731251538Srpaulo{ 3732264912Skevlo int i, error, page_count, pktbuf_count; 3733251538Srpaulo 3734264912Skevlo page_count = (sc->chip & URTWN_CHIP_88E) ? 3735264912Skevlo R88E_TX_PAGE_COUNT : R92C_TX_PAGE_COUNT; 3736264912Skevlo pktbuf_count = (sc->chip & URTWN_CHIP_88E) ? 3737264912Skevlo R88E_TXPKTBUF_COUNT : R92C_TXPKTBUF_COUNT; 3738264912Skevlo 3739264912Skevlo /* Reserve pages [0; page_count]. */ 3740264912Skevlo for (i = 0; i < page_count; i++) { 3741251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3742251538Srpaulo return (error); 3743251538Srpaulo } 3744251538Srpaulo /* NB: 0xff indicates end-of-list. */ 3745251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 3746251538Srpaulo return (error); 3747251538Srpaulo /* 3748264912Skevlo * Use pages [page_count + 1; pktbuf_count - 1] 3749251538Srpaulo * as ring buffer. 3750251538Srpaulo */ 3751264912Skevlo for (++i; i < pktbuf_count - 1; i++) { 3752251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3753251538Srpaulo return (error); 3754251538Srpaulo } 3755251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 3756264912Skevlo error = urtwn_llt_write(sc, i, page_count + 1); 3757251538Srpaulo return (error); 3758251538Srpaulo} 3759251538Srpaulo 3760295871Savos#ifndef URTWN_WITHOUT_UCODE 3761251538Srpaulostatic void 3762251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 3763251538Srpaulo{ 3764251538Srpaulo uint16_t reg; 3765251538Srpaulo int ntries; 3766251538Srpaulo 3767251538Srpaulo /* Tell 8051 to reset itself. */ 3768251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 3769251538Srpaulo 3770251538Srpaulo /* Wait until 8051 resets by itself. */ 3771251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 3772251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3773251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 3774251538Srpaulo return; 3775266472Shselasky urtwn_ms_delay(sc); 3776251538Srpaulo } 3777251538Srpaulo /* Force 8051 reset. */ 3778251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3779251538Srpaulo} 3780251538Srpaulo 3781264912Skevlostatic void 3782264912Skevlourtwn_r88e_fw_reset(struct urtwn_softc *sc) 3783264912Skevlo{ 3784264912Skevlo uint16_t reg; 3785264912Skevlo 3786264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3787264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3788264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN); 3789264912Skevlo} 3790264912Skevlo 3791251538Srpaulostatic int 3792251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 3793251538Srpaulo{ 3794251538Srpaulo uint32_t reg; 3795291698Savos usb_error_t error = USB_ERR_NORMAL_COMPLETION; 3796291698Savos int off, mlen; 3797251538Srpaulo 3798251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3799251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 3800251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3801251538Srpaulo 3802251538Srpaulo off = R92C_FW_START_ADDR; 3803251538Srpaulo while (len > 0) { 3804251538Srpaulo if (len > 196) 3805251538Srpaulo mlen = 196; 3806251538Srpaulo else if (len > 4) 3807251538Srpaulo mlen = 4; 3808251538Srpaulo else 3809251538Srpaulo mlen = 1; 3810251538Srpaulo /* XXX fix this deconst */ 3811281069Srpaulo error = urtwn_write_region_1(sc, off, 3812251538Srpaulo __DECONST(uint8_t *, buf), mlen); 3813291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3814251538Srpaulo break; 3815251538Srpaulo off += mlen; 3816251538Srpaulo buf += mlen; 3817251538Srpaulo len -= mlen; 3818251538Srpaulo } 3819251538Srpaulo return (error); 3820251538Srpaulo} 3821251538Srpaulo 3822251538Srpaulostatic int 3823251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 3824251538Srpaulo{ 3825251538Srpaulo const struct firmware *fw; 3826251538Srpaulo const struct r92c_fw_hdr *hdr; 3827251538Srpaulo const char *imagename; 3828251538Srpaulo const u_char *ptr; 3829251538Srpaulo size_t len; 3830251538Srpaulo uint32_t reg; 3831251538Srpaulo int mlen, ntries, page, error; 3832251538Srpaulo 3833264864Skevlo URTWN_UNLOCK(sc); 3834251538Srpaulo /* Read firmware image from the filesystem. */ 3835264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3836264912Skevlo imagename = "urtwn-rtl8188eufw"; 3837264912Skevlo else if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3838264912Skevlo URTWN_CHIP_UMC_A_CUT) 3839251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 3840251538Srpaulo else 3841251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 3842251538Srpaulo 3843251538Srpaulo fw = firmware_get(imagename); 3844264864Skevlo URTWN_LOCK(sc); 3845251538Srpaulo if (fw == NULL) { 3846251538Srpaulo device_printf(sc->sc_dev, 3847251538Srpaulo "failed loadfirmware of file %s\n", imagename); 3848251538Srpaulo return (ENOENT); 3849251538Srpaulo } 3850251538Srpaulo 3851251538Srpaulo len = fw->datasize; 3852251538Srpaulo 3853251538Srpaulo if (len < sizeof(*hdr)) { 3854251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 3855251538Srpaulo error = EINVAL; 3856251538Srpaulo goto fail; 3857251538Srpaulo } 3858251538Srpaulo ptr = fw->data; 3859251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 3860251538Srpaulo /* Check if there is a valid FW header and skip it. */ 3861251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 3862264912Skevlo (le16toh(hdr->signature) >> 4) == 0x88e || 3863251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 3864294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, 3865294471Savos "FW V%d.%d %02d-%02d %02d:%02d\n", 3866251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 3867251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 3868251538Srpaulo ptr += sizeof(*hdr); 3869251538Srpaulo len -= sizeof(*hdr); 3870251538Srpaulo } 3871251538Srpaulo 3872264912Skevlo if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) { 3873264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3874264912Skevlo urtwn_r88e_fw_reset(sc); 3875264912Skevlo else 3876264912Skevlo urtwn_fw_reset(sc); 3877251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 3878251538Srpaulo } 3879264912Skevlo 3880268487Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3881268487Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3882268487Skevlo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3883268487Skevlo R92C_SYS_FUNC_EN_CPUEN); 3884268487Skevlo } 3885251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3886251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 3887251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 3888251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 3889251538Srpaulo 3890263154Skevlo /* Reset the FWDL checksum. */ 3891263154Skevlo urtwn_write_1(sc, R92C_MCUFWDL, 3892263154Skevlo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 3893263154Skevlo 3894251538Srpaulo for (page = 0; len > 0; page++) { 3895251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 3896251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 3897251538Srpaulo if (error != 0) { 3898251538Srpaulo device_printf(sc->sc_dev, 3899251538Srpaulo "could not load firmware page\n"); 3900251538Srpaulo goto fail; 3901251538Srpaulo } 3902251538Srpaulo ptr += mlen; 3903251538Srpaulo len -= mlen; 3904251538Srpaulo } 3905251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3906251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 3907251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 3908251538Srpaulo 3909251538Srpaulo /* Wait for checksum report. */ 3910251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3911251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 3912251538Srpaulo break; 3913266472Shselasky urtwn_ms_delay(sc); 3914251538Srpaulo } 3915251538Srpaulo if (ntries == 1000) { 3916251538Srpaulo device_printf(sc->sc_dev, 3917251538Srpaulo "timeout waiting for checksum report\n"); 3918251538Srpaulo error = ETIMEDOUT; 3919251538Srpaulo goto fail; 3920251538Srpaulo } 3921251538Srpaulo 3922251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3923251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 3924251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3925264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3926264912Skevlo urtwn_r88e_fw_reset(sc); 3927251538Srpaulo /* Wait for firmware readiness. */ 3928251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3929251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 3930251538Srpaulo break; 3931266472Shselasky urtwn_ms_delay(sc); 3932251538Srpaulo } 3933251538Srpaulo if (ntries == 1000) { 3934251538Srpaulo device_printf(sc->sc_dev, 3935251538Srpaulo "timeout waiting for firmware readiness\n"); 3936251538Srpaulo error = ETIMEDOUT; 3937251538Srpaulo goto fail; 3938251538Srpaulo } 3939251538Srpaulofail: 3940251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 3941251538Srpaulo return (error); 3942251538Srpaulo} 3943295871Savos#endif 3944251538Srpaulo 3945291902Skevlostatic int 3946251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 3947251538Srpaulo{ 3948291902Skevlo struct usb_endpoint *ep, *ep_end; 3949291698Savos usb_error_t usb_err; 3950291902Skevlo uint32_t reg; 3951291902Skevlo int hashq, hasnq, haslq, nqueues, ntx; 3952291902Skevlo int error, pagecount, npubqpages, nqpages, nrempages, tx_boundary; 3953281069Srpaulo 3954291695Savos /* Initialize LLT table. */ 3955291695Savos error = urtwn_llt_init(sc); 3956291695Savos if (error != 0) 3957291695Savos return (error); 3958291695Savos 3959291902Skevlo /* Determine the number of bulk-out pipes. */ 3960291902Skevlo ntx = 0; 3961291902Skevlo ep = sc->sc_udev->endpoints; 3962291902Skevlo ep_end = sc->sc_udev->endpoints + sc->sc_udev->endpoints_max; 3963291902Skevlo for (; ep != ep_end; ep++) { 3964291902Skevlo if ((ep->edesc == NULL) || 3965291902Skevlo (ep->iface_index != sc->sc_iface_index)) 3966291902Skevlo continue; 3967291902Skevlo if (UE_GET_DIR(ep->edesc->bEndpointAddress) == UE_DIR_OUT) 3968291902Skevlo ntx++; 3969291902Skevlo } 3970291902Skevlo if (ntx == 0) { 3971291902Skevlo device_printf(sc->sc_dev, 3972291902Skevlo "%d: invalid number of Tx bulk pipes\n", ntx); 3973291698Savos return (EIO); 3974291902Skevlo } 3975291695Savos 3976251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 3977291902Skevlo hashq = hasnq = haslq = nqueues = 0; 3978291902Skevlo switch (ntx) { 3979291902Skevlo case 1: hashq = 1; break; 3980291902Skevlo case 2: hashq = hasnq = 1; break; 3981291902Skevlo case 3: case 4: hashq = hasnq = haslq = 1; break; 3982291902Skevlo } 3983251538Srpaulo nqueues = hashq + hasnq + haslq; 3984251538Srpaulo if (nqueues == 0) 3985251538Srpaulo return (EIO); 3986251538Srpaulo 3987291902Skevlo npubqpages = nqpages = nrempages = pagecount = 0; 3988291902Skevlo if (sc->chip & URTWN_CHIP_88E) 3989291902Skevlo tx_boundary = R88E_TX_PAGE_BOUNDARY; 3990291902Skevlo else { 3991291902Skevlo pagecount = R92C_TX_PAGE_COUNT; 3992291902Skevlo npubqpages = R92C_PUBQ_NPAGES; 3993291902Skevlo tx_boundary = R92C_TX_PAGE_BOUNDARY; 3994291902Skevlo } 3995291902Skevlo 3996251538Srpaulo /* Set number of pages for normal priority queue. */ 3997291902Skevlo if (sc->chip & URTWN_CHIP_88E) { 3998291902Skevlo usb_err = urtwn_write_2(sc, R92C_RQPN_NPQ, 0xd); 3999291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4000291902Skevlo return (EIO); 4001291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 0x808e000d); 4002291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4003291902Skevlo return (EIO); 4004291902Skevlo } else { 4005291902Skevlo /* Get the number of pages for each queue. */ 4006291902Skevlo nqpages = (pagecount - npubqpages) / nqueues; 4007291902Skevlo /* 4008291902Skevlo * The remaining pages are assigned to the high priority 4009291902Skevlo * queue. 4010291902Skevlo */ 4011291902Skevlo nrempages = (pagecount - npubqpages) % nqueues; 4012291902Skevlo usb_err = urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 4013291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4014291902Skevlo return (EIO); 4015291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 4016291902Skevlo /* Set number of pages for public queue. */ 4017291902Skevlo SM(R92C_RQPN_PUBQ, npubqpages) | 4018291902Skevlo /* Set number of pages for high priority queue. */ 4019291902Skevlo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 4020291902Skevlo /* Set number of pages for low priority queue. */ 4021291902Skevlo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 4022291902Skevlo /* Load values. */ 4023291902Skevlo R92C_RQPN_LD); 4024291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4025291902Skevlo return (EIO); 4026291902Skevlo } 4027251538Srpaulo 4028291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary); 4029291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4030291698Savos return (EIO); 4031291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary); 4032291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4033291698Savos return (EIO); 4034291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary); 4035291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4036291698Savos return (EIO); 4037291902Skevlo usb_err = urtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary); 4038291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4039291698Savos return (EIO); 4040291902Skevlo usb_err = urtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary); 4041291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4042291698Savos return (EIO); 4043251538Srpaulo 4044251538Srpaulo /* Set queue to USB pipe mapping. */ 4045251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 4046251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 4047251538Srpaulo if (nqueues == 1) { 4048251538Srpaulo if (hashq) 4049251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 4050251538Srpaulo else if (hasnq) 4051251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 4052251538Srpaulo else 4053251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 4054251538Srpaulo } else if (nqueues == 2) { 4055292056Skevlo /* 4056292056Skevlo * All 2-endpoints configs have high and normal 4057292056Skevlo * priority queues. 4058292056Skevlo */ 4059292056Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 4060251538Srpaulo } else 4061251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 4062291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 4063291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4064291698Savos return (EIO); 4065251538Srpaulo 4066251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 4067291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 4068291902Skevlo (sc->chip & URTWN_CHIP_88E) ? 0x23ff : 0x27ff); 4069291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4070291698Savos return (EIO); 4071251538Srpaulo 4072291902Skevlo /* Set Tx/Rx transfer page size. */ 4073291902Skevlo usb_err = urtwn_write_1(sc, R92C_PBP, 4074291902Skevlo SM(R92C_PBP_PSRX, R92C_PBP_128) | 4075291902Skevlo SM(R92C_PBP_PSTX, R92C_PBP_128)); 4076291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4077264912Skevlo return (EIO); 4078264912Skevlo 4079264912Skevlo return (0); 4080264912Skevlo} 4081264912Skevlo 4082291698Savosstatic int 4083251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 4084251538Srpaulo{ 4085291698Savos usb_error_t error; 4086251538Srpaulo int i; 4087251538Srpaulo 4088251538Srpaulo /* Write MAC initialization values. */ 4089264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4090264912Skevlo for (i = 0; i < nitems(rtl8188eu_mac); i++) { 4091291698Savos error = urtwn_write_1(sc, rtl8188eu_mac[i].reg, 4092264912Skevlo rtl8188eu_mac[i].val); 4093291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4094291698Savos return (EIO); 4095264912Skevlo } 4096264912Skevlo urtwn_write_1(sc, R92C_MAX_AGGR_NUM, 0x07); 4097264912Skevlo } else { 4098264912Skevlo for (i = 0; i < nitems(rtl8192cu_mac); i++) 4099291698Savos error = urtwn_write_1(sc, rtl8192cu_mac[i].reg, 4100264912Skevlo rtl8192cu_mac[i].val); 4101291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4102291698Savos return (EIO); 4103264912Skevlo } 4104291698Savos 4105291698Savos return (0); 4106251538Srpaulo} 4107251538Srpaulo 4108251538Srpaulostatic void 4109251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 4110251538Srpaulo{ 4111251538Srpaulo const struct urtwn_bb_prog *prog; 4112251538Srpaulo uint32_t reg; 4113264912Skevlo uint8_t crystalcap; 4114251538Srpaulo int i; 4115251538Srpaulo 4116251538Srpaulo /* Enable BB and RF. */ 4117251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 4118251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 4119251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 4120251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 4121251538Srpaulo 4122264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 4123264912Skevlo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 4124251538Srpaulo 4125251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 4126251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 4127251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 4128251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 4129251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 4130251538Srpaulo 4131264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4132264912Skevlo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 4133264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 4134264912Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 4135264912Skevlo } 4136251538Srpaulo 4137251538Srpaulo /* Select BB programming based on board type. */ 4138264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4139264912Skevlo prog = &rtl8188eu_bb_prog; 4140264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4141251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4142251538Srpaulo prog = &rtl8188ce_bb_prog; 4143251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4144251538Srpaulo prog = &rtl8188ru_bb_prog; 4145251538Srpaulo else 4146251538Srpaulo prog = &rtl8188cu_bb_prog; 4147251538Srpaulo } else { 4148251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4149251538Srpaulo prog = &rtl8192ce_bb_prog; 4150251538Srpaulo else 4151251538Srpaulo prog = &rtl8192cu_bb_prog; 4152251538Srpaulo } 4153251538Srpaulo /* Write BB initialization values. */ 4154251538Srpaulo for (i = 0; i < prog->count; i++) { 4155251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 4156266472Shselasky urtwn_ms_delay(sc); 4157251538Srpaulo } 4158251538Srpaulo 4159251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 4160251538Srpaulo /* 8192C 1T only configuration. */ 4161251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 4162251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 4163251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 4164251538Srpaulo 4165251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 4166251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 4167251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 4168251538Srpaulo 4169251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 4170251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 4171251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 4172251538Srpaulo 4173251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 4174251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 4175251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 4176251538Srpaulo 4177251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 4178251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 4179251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 4180251538Srpaulo 4181251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 4182251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4183251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 4184251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 4185251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4186251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 4187251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 4188251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4189251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 4190251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 4191251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4192251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 4193251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 4194251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4195251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 4196251538Srpaulo } 4197251538Srpaulo 4198251538Srpaulo /* Write AGC values. */ 4199251538Srpaulo for (i = 0; i < prog->agccount; i++) { 4200251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 4201251538Srpaulo prog->agcvals[i]); 4202266472Shselasky urtwn_ms_delay(sc); 4203251538Srpaulo } 4204251538Srpaulo 4205264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4206264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422); 4207266472Shselasky urtwn_ms_delay(sc); 4208264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420); 4209266472Shselasky urtwn_ms_delay(sc); 4210264912Skevlo 4211294198Savos crystalcap = sc->rom.r88e_rom.crystalcap; 4212264912Skevlo if (crystalcap == 0xff) 4213264912Skevlo crystalcap = 0x20; 4214264912Skevlo crystalcap &= 0x3f; 4215264912Skevlo reg = urtwn_bb_read(sc, R92C_AFE_XTAL_CTRL); 4216264912Skevlo urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL, 4217264912Skevlo RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 4218264912Skevlo crystalcap | crystalcap << 6)); 4219264912Skevlo } else { 4220264912Skevlo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 4221264912Skevlo R92C_HSSI_PARAM2_CCK_HIPWR) 4222264912Skevlo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 4223264912Skevlo } 4224251538Srpaulo} 4225251538Srpaulo 4226289066Skevlostatic void 4227251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 4228251538Srpaulo{ 4229251538Srpaulo const struct urtwn_rf_prog *prog; 4230251538Srpaulo uint32_t reg, type; 4231251538Srpaulo int i, j, idx, off; 4232251538Srpaulo 4233251538Srpaulo /* Select RF programming based on board type. */ 4234264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4235264912Skevlo prog = rtl8188eu_rf_prog; 4236264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4237251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4238251538Srpaulo prog = rtl8188ce_rf_prog; 4239251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4240251538Srpaulo prog = rtl8188ru_rf_prog; 4241251538Srpaulo else 4242251538Srpaulo prog = rtl8188cu_rf_prog; 4243251538Srpaulo } else 4244251538Srpaulo prog = rtl8192ce_rf_prog; 4245251538Srpaulo 4246251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4247251538Srpaulo /* Save RF_ENV control type. */ 4248251538Srpaulo idx = i / 2; 4249251538Srpaulo off = (i % 2) * 16; 4250251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4251251538Srpaulo type = (reg >> off) & 0x10; 4252251538Srpaulo 4253251538Srpaulo /* Set RF_ENV enable. */ 4254251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4255251538Srpaulo reg |= 0x100000; 4256251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4257266472Shselasky urtwn_ms_delay(sc); 4258251538Srpaulo /* Set RF_ENV output high. */ 4259251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4260251538Srpaulo reg |= 0x10; 4261251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4262266472Shselasky urtwn_ms_delay(sc); 4263251538Srpaulo /* Set address and data lengths of RF registers. */ 4264251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4265251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 4266251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4267266472Shselasky urtwn_ms_delay(sc); 4268251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4269251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 4270251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4271266472Shselasky urtwn_ms_delay(sc); 4272251538Srpaulo 4273251538Srpaulo /* Write RF initialization values for this chain. */ 4274251538Srpaulo for (j = 0; j < prog[i].count; j++) { 4275251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 4276251538Srpaulo prog[i].regs[j] <= 0xfe) { 4277251538Srpaulo /* 4278251538Srpaulo * These are fake RF registers offsets that 4279251538Srpaulo * indicate a delay is required. 4280251538Srpaulo */ 4281266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 20); /* 50ms */ 4282251538Srpaulo continue; 4283251538Srpaulo } 4284251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 4285251538Srpaulo prog[i].vals[j]); 4286266472Shselasky urtwn_ms_delay(sc); 4287251538Srpaulo } 4288251538Srpaulo 4289251538Srpaulo /* Restore RF_ENV control type. */ 4290251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4291251538Srpaulo reg &= ~(0x10 << off) | (type << off); 4292251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 4293251538Srpaulo 4294251538Srpaulo /* Cache RF register CHNLBW. */ 4295251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 4296251538Srpaulo } 4297251538Srpaulo 4298251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 4299251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 4300251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 4301251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 4302251538Srpaulo } 4303251538Srpaulo} 4304251538Srpaulo 4305251538Srpaulostatic void 4306251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 4307251538Srpaulo{ 4308251538Srpaulo /* Invalidate all CAM entries. */ 4309251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 4310251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 4311251538Srpaulo} 4312251538Srpaulo 4313292175Savosstatic int 4314292175Savosurtwn_cam_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 4315292175Savos{ 4316292175Savos usb_error_t error; 4317292175Savos 4318292175Savos error = urtwn_write_4(sc, R92C_CAMWRITE, data); 4319292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4320292175Savos return (EIO); 4321292175Savos error = urtwn_write_4(sc, R92C_CAMCMD, 4322292175Savos R92C_CAMCMD_POLLING | R92C_CAMCMD_WRITE | 4323292175Savos SM(R92C_CAMCMD_ADDR, addr)); 4324292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4325292175Savos return (EIO); 4326292175Savos 4327292175Savos return (0); 4328292175Savos} 4329292175Savos 4330251538Srpaulostatic void 4331251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 4332251538Srpaulo{ 4333251538Srpaulo uint8_t reg; 4334251538Srpaulo int i; 4335251538Srpaulo 4336251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4337251538Srpaulo if (sc->pa_setting & (1 << i)) 4338251538Srpaulo continue; 4339251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 4340251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 4341251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 4342251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 4343251538Srpaulo } 4344251538Srpaulo if (!(sc->pa_setting & 0x10)) { 4345251538Srpaulo reg = urtwn_read_1(sc, 0x16); 4346251538Srpaulo reg = (reg & ~0xf0) | 0x90; 4347251538Srpaulo urtwn_write_1(sc, 0x16, reg); 4348251538Srpaulo } 4349251538Srpaulo} 4350251538Srpaulo 4351251538Srpaulostatic void 4352251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 4353251538Srpaulo{ 4354290564Savos struct ieee80211com *ic = &sc->sc_ic; 4355290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4356290564Savos uint32_t rcr; 4357290564Savos uint16_t filter; 4358290564Savos 4359290564Savos URTWN_ASSERT_LOCKED(sc); 4360290564Savos 4361251538Srpaulo /* Accept all multicast frames. */ 4362251538Srpaulo urtwn_write_4(sc, R92C_MAR + 0, 0xffffffff); 4363251538Srpaulo urtwn_write_4(sc, R92C_MAR + 4, 0xffffffff); 4364290564Savos 4365290564Savos /* Filter for management frames. */ 4366290564Savos filter = 0x7f3f; 4367290631Savos switch (vap->iv_opmode) { 4368290631Savos case IEEE80211_M_STA: 4369290564Savos filter &= ~( 4370290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | 4371290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | 4372290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); 4373290631Savos break; 4374290631Savos case IEEE80211_M_HOSTAP: 4375290631Savos filter &= ~( 4376290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | 4377296174Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP)); 4378290631Savos break; 4379290631Savos case IEEE80211_M_MONITOR: 4380290651Savos case IEEE80211_M_IBSS: 4381290631Savos break; 4382290631Savos default: 4383290631Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4384290631Savos __func__, vap->iv_opmode); 4385290631Savos break; 4386290564Savos } 4387290564Savos urtwn_write_2(sc, R92C_RXFLTMAP0, filter); 4388290564Savos 4389251538Srpaulo /* Reject all control frames. */ 4390251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 4391290564Savos 4392290564Savos /* Reject all data frames. */ 4393290564Savos urtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); 4394290564Savos 4395290564Savos rcr = R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | 4396290564Savos R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | 4397290564Savos R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; 4398290564Savos 4399290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) { 4400290564Savos /* Accept all frames. */ 4401290564Savos rcr |= R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | 4402290564Savos R92C_RCR_AAP; 4403290564Savos } 4404290564Savos 4405290564Savos /* Set Rx filter. */ 4406290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4407290564Savos 4408290564Savos if (ic->ic_promisc != 0) { 4409290564Savos /* Update Rx filter. */ 4410290564Savos urtwn_set_promisc(sc); 4411290564Savos } 4412251538Srpaulo} 4413251538Srpaulo 4414251538Srpaulostatic void 4415251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 4416251538Srpaulo{ 4417251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 4418251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 4419251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 4420251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 4421251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 4422251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 4423251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 4424251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 4425251538Srpaulo} 4426251538Srpaulo 4427289066Skevlostatic void 4428251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 4429251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4430251538Srpaulo{ 4431251538Srpaulo uint32_t reg; 4432251538Srpaulo 4433251538Srpaulo /* Write per-CCK rate Tx power. */ 4434251538Srpaulo if (chain == 0) { 4435251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 4436251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 4437251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 4438251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4439251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 4440251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 4441251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 4442251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4443251538Srpaulo } else { 4444251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 4445251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 4446251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 4447251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 4448251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 4449251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4450251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 4451251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4452251538Srpaulo } 4453251538Srpaulo /* Write per-OFDM rate Tx power. */ 4454251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 4455251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 4456251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 4457251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 4458251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 4459251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 4460251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 4461251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 4462251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 4463251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 4464251538Srpaulo /* Write per-MCS Tx power. */ 4465251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 4466251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 4467251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 4468251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 4469251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 4470251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 4471251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 4472251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 4473251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 4474251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 4475251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 4476251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 4477261506Skevlo SM(R92C_TXAGC_MCS09, power[21]) | 4478251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 4479251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 4480251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 4481251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 4482251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 4483251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 4484251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 4485251538Srpaulo} 4486251538Srpaulo 4487289066Skevlostatic void 4488251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 4489251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4490251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4491251538Srpaulo{ 4492287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4493291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 4494251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 4495251538Srpaulo const struct urtwn_txpwr *base; 4496251538Srpaulo int ridx, chan, group; 4497251538Srpaulo 4498251538Srpaulo /* Determine channel group. */ 4499251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4500251538Srpaulo if (chan <= 3) 4501251538Srpaulo group = 0; 4502251538Srpaulo else if (chan <= 9) 4503251538Srpaulo group = 1; 4504251538Srpaulo else 4505251538Srpaulo group = 2; 4506251538Srpaulo 4507251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 4508251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 4509251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4510251538Srpaulo base = &rtl8188ru_txagc[chain]; 4511251538Srpaulo else 4512251538Srpaulo base = &rtl8192cu_txagc[chain]; 4513251538Srpaulo } else 4514251538Srpaulo base = &rtl8192cu_txagc[chain]; 4515251538Srpaulo 4516251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4517251538Srpaulo if (sc->regulatory == 0) { 4518289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4519251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4520251538Srpaulo } 4521289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4522251538Srpaulo if (sc->regulatory == 3) { 4523251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4524251538Srpaulo /* Apply vendor limits. */ 4525251538Srpaulo if (extc != NULL) 4526251538Srpaulo max = rom->ht40_max_pwr[group]; 4527251538Srpaulo else 4528251538Srpaulo max = rom->ht20_max_pwr[group]; 4529251538Srpaulo max = (max >> (chain * 4)) & 0xf; 4530251538Srpaulo if (power[ridx] > max) 4531251538Srpaulo power[ridx] = max; 4532251538Srpaulo } else if (sc->regulatory == 1) { 4533251538Srpaulo if (extc == NULL) 4534251538Srpaulo power[ridx] = base->pwr[group][ridx]; 4535251538Srpaulo } else if (sc->regulatory != 2) 4536251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4537251538Srpaulo } 4538251538Srpaulo 4539251538Srpaulo /* Compute per-CCK rate Tx power. */ 4540251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 4541289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4542251538Srpaulo power[ridx] += cckpow; 4543251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4544251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4545251538Srpaulo } 4546251538Srpaulo 4547251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 4548251538Srpaulo if (sc->ntxchains > 1) { 4549251538Srpaulo /* Apply reduction for 2 spatial streams. */ 4550251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 4551251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4552251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 4553251538Srpaulo } 4554251538Srpaulo 4555251538Srpaulo /* Compute per-OFDM rate Tx power. */ 4556251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 4557251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4558251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 4559289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4560251538Srpaulo power[ridx] += ofdmpow; 4561251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4562251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4563251538Srpaulo } 4564251538Srpaulo 4565251538Srpaulo /* Compute per-MCS Tx power. */ 4566251538Srpaulo if (extc == NULL) { 4567251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 4568251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4569251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 4570251538Srpaulo } 4571251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 4572251538Srpaulo power[ridx] += htpow; 4573251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4574251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4575251538Srpaulo } 4576294471Savos#ifdef USB_DEBUG 4577294471Savos if (sc->sc_debug & URTWN_DEBUG_TXPWR) { 4578251538Srpaulo /* Dump per-rate Tx power values. */ 4579251538Srpaulo printf("Tx power for chain %d:\n", chain); 4580289758Savos for (ridx = URTWN_RIDX_CCK1; ridx < URTWN_RIDX_COUNT; ridx++) 4581251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 4582251538Srpaulo } 4583251538Srpaulo#endif 4584251538Srpaulo} 4585251538Srpaulo 4586289066Skevlostatic void 4587264912Skevlourtwn_r88e_get_txpower(struct urtwn_softc *sc, int chain, 4588264912Skevlo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4589264912Skevlo uint16_t power[URTWN_RIDX_COUNT]) 4590264912Skevlo{ 4591287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4592294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 4593264912Skevlo uint16_t cckpow, ofdmpow, bw20pow, htpow; 4594264912Skevlo const struct urtwn_r88e_txpwr *base; 4595264912Skevlo int ridx, chan, group; 4596264912Skevlo 4597264912Skevlo /* Determine channel group. */ 4598264912Skevlo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4599264912Skevlo if (chan <= 2) 4600264912Skevlo group = 0; 4601264912Skevlo else if (chan <= 5) 4602264912Skevlo group = 1; 4603264912Skevlo else if (chan <= 8) 4604264912Skevlo group = 2; 4605264912Skevlo else if (chan <= 11) 4606264912Skevlo group = 3; 4607264912Skevlo else if (chan <= 13) 4608264912Skevlo group = 4; 4609264912Skevlo else 4610264912Skevlo group = 5; 4611264912Skevlo 4612264912Skevlo /* Get original Tx power based on board type and RF chain. */ 4613264912Skevlo base = &rtl8188eu_txagc[chain]; 4614264912Skevlo 4615264912Skevlo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4616264912Skevlo if (sc->regulatory == 0) { 4617289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4618264912Skevlo power[ridx] = base->pwr[0][ridx]; 4619264912Skevlo } 4620289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4621264912Skevlo if (sc->regulatory == 3) 4622264912Skevlo power[ridx] = base->pwr[0][ridx]; 4623264912Skevlo else if (sc->regulatory == 1) { 4624264912Skevlo if (extc == NULL) 4625264912Skevlo power[ridx] = base->pwr[group][ridx]; 4626264912Skevlo } else if (sc->regulatory != 2) 4627264912Skevlo power[ridx] = base->pwr[0][ridx]; 4628264912Skevlo } 4629264912Skevlo 4630264912Skevlo /* Compute per-CCK rate Tx power. */ 4631294198Savos cckpow = rom->cck_tx_pwr[group]; 4632289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4633264912Skevlo power[ridx] += cckpow; 4634264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4635264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4636264912Skevlo } 4637264912Skevlo 4638294198Savos htpow = rom->ht40_tx_pwr[group]; 4639264912Skevlo 4640264912Skevlo /* Compute per-OFDM rate Tx power. */ 4641264912Skevlo ofdmpow = htpow + sc->ofdm_tx_pwr_diff; 4642289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4643264912Skevlo power[ridx] += ofdmpow; 4644264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4645264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4646264912Skevlo } 4647264912Skevlo 4648264912Skevlo bw20pow = htpow + sc->bw20_tx_pwr_diff; 4649264912Skevlo for (ridx = 12; ridx <= 27; ridx++) { 4650264912Skevlo power[ridx] += bw20pow; 4651264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4652264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4653264912Skevlo } 4654264912Skevlo} 4655264912Skevlo 4656289066Skevlostatic void 4657251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 4658251538Srpaulo struct ieee80211_channel *extc) 4659251538Srpaulo{ 4660251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 4661251538Srpaulo int i; 4662251538Srpaulo 4663251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 4664251538Srpaulo /* Compute per-rate Tx power values. */ 4665264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4666264912Skevlo urtwn_r88e_get_txpower(sc, i, c, extc, power); 4667264912Skevlo else 4668264912Skevlo urtwn_get_txpower(sc, i, c, extc, power); 4669251538Srpaulo /* Write per-rate Tx power values to hardware. */ 4670251538Srpaulo urtwn_write_txpower(sc, i, power); 4671251538Srpaulo } 4672251538Srpaulo} 4673251538Srpaulo 4674251538Srpaulostatic void 4675290048Savosurtwn_set_rx_bssid_all(struct urtwn_softc *sc, int enable) 4676290048Savos{ 4677290048Savos uint32_t reg; 4678290048Savos 4679290048Savos reg = urtwn_read_4(sc, R92C_RCR); 4680290048Savos if (enable) 4681290048Savos reg &= ~R92C_RCR_CBSSID_BCN; 4682290048Savos else 4683290048Savos reg |= R92C_RCR_CBSSID_BCN; 4684290048Savos urtwn_write_4(sc, R92C_RCR, reg); 4685290048Savos} 4686290048Savos 4687290048Savosstatic void 4688290048Savosurtwn_set_gain(struct urtwn_softc *sc, uint8_t gain) 4689290048Savos{ 4690290048Savos uint32_t reg; 4691290048Savos 4692290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 4693290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4694290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 4695290048Savos 4696290048Savos if (!(sc->chip & URTWN_CHIP_88E)) { 4697290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 4698290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4699290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 4700290048Savos } 4701290048Savos} 4702290048Savos 4703290048Savosstatic void 4704251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 4705251538Srpaulo{ 4706290048Savos struct urtwn_softc *sc = ic->ic_softc; 4707290048Savos 4708290048Savos URTWN_LOCK(sc); 4709290048Savos /* Receive beacons / probe responses from any BSSID. */ 4710290651Savos if (ic->ic_opmode != IEEE80211_M_IBSS) 4711290651Savos urtwn_set_rx_bssid_all(sc, 1); 4712290651Savos 4713290048Savos /* Set gain for scanning. */ 4714290048Savos urtwn_set_gain(sc, 0x20); 4715290048Savos URTWN_UNLOCK(sc); 4716251538Srpaulo} 4717251538Srpaulo 4718251538Srpaulostatic void 4719251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 4720251538Srpaulo{ 4721290048Savos struct urtwn_softc *sc = ic->ic_softc; 4722290048Savos 4723290048Savos URTWN_LOCK(sc); 4724290048Savos /* Restore limitations. */ 4725290651Savos if (ic->ic_promisc == 0 && ic->ic_opmode != IEEE80211_M_IBSS) 4726290564Savos urtwn_set_rx_bssid_all(sc, 0); 4727290651Savos 4728290048Savos /* Set gain under link. */ 4729290048Savos urtwn_set_gain(sc, 0x32); 4730290048Savos URTWN_UNLOCK(sc); 4731251538Srpaulo} 4732251538Srpaulo 4733251538Srpaulostatic void 4734251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 4735251538Srpaulo{ 4736286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4737292173Savos struct ieee80211_channel *c = ic->ic_curchan; 4738281070Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4739251538Srpaulo 4740251538Srpaulo URTWN_LOCK(sc); 4741281070Srpaulo if (vap->iv_state == IEEE80211_S_SCAN) { 4742281070Srpaulo /* Make link LED blink during scan. */ 4743281070Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 4744281070Srpaulo } 4745292173Savos urtwn_set_chan(sc, c, NULL); 4746292173Savos sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq); 4747292173Savos sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags); 4748292173Savos sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq); 4749292173Savos sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags); 4750251538Srpaulo URTWN_UNLOCK(sc); 4751251538Srpaulo} 4752251538Srpaulo 4753292014Savosstatic int 4754292014Savosurtwn_wme_update(struct ieee80211com *ic) 4755292014Savos{ 4756292014Savos const struct wmeParams *wmep = 4757292014Savos ic->ic_wme.wme_chanParams.cap_wmeParams; 4758292014Savos struct urtwn_softc *sc = ic->ic_softc; 4759292014Savos uint8_t aifs, acm, slottime; 4760292014Savos int ac; 4761292014Savos 4762292014Savos acm = 0; 4763292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4764292014Savos 4765292014Savos URTWN_LOCK(sc); 4766292014Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4767292014Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4768292014Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4769292014Savos urtwn_write_4(sc, wme2queue[ac].reg, 4770292014Savos SM(R92C_EDCA_PARAM_TXOP, wmep[ac].wmep_txopLimit) | 4771292014Savos SM(R92C_EDCA_PARAM_ECWMIN, wmep[ac].wmep_logcwmin) | 4772292014Savos SM(R92C_EDCA_PARAM_ECWMAX, wmep[ac].wmep_logcwmax) | 4773292014Savos SM(R92C_EDCA_PARAM_AIFS, aifs)); 4774292014Savos if (ac != WME_AC_BE) 4775292014Savos acm |= wmep[ac].wmep_acm << ac; 4776292014Savos } 4777292014Savos 4778292014Savos if (acm != 0) 4779292014Savos acm |= R92C_ACMHWCTRL_EN; 4780292014Savos urtwn_write_1(sc, R92C_ACMHWCTRL, 4781292014Savos (urtwn_read_1(sc, R92C_ACMHWCTRL) & ~R92C_ACMHWCTRL_ACM_MASK) | 4782292014Savos acm); 4783292014Savos 4784292014Savos URTWN_UNLOCK(sc); 4785292014Savos 4786292014Savos return 0; 4787292014Savos} 4788292014Savos 4789251538Srpaulostatic void 4790294465Savosurtwn_update_slot(struct ieee80211com *ic) 4791294465Savos{ 4792294465Savos urtwn_cmd_sleepable(ic->ic_softc, NULL, 0, urtwn_update_slot_cb); 4793294465Savos} 4794294465Savos 4795294465Savosstatic void 4796294465Savosurtwn_update_slot_cb(struct urtwn_softc *sc, union sec_param *data) 4797294465Savos{ 4798294465Savos struct ieee80211com *ic = &sc->sc_ic; 4799294465Savos uint8_t slottime; 4800294465Savos 4801294465Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4802294465Savos 4803294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ANY, "%s: setting slot time to %uus\n", 4804294471Savos __func__, slottime); 4805294465Savos 4806294465Savos urtwn_write_1(sc, R92C_SLOT, slottime); 4807294465Savos urtwn_update_aifs(sc, slottime); 4808294465Savos} 4809294465Savos 4810294465Savosstatic void 4811294465Savosurtwn_update_aifs(struct urtwn_softc *sc, uint8_t slottime) 4812294465Savos{ 4813294465Savos const struct wmeParams *wmep = 4814294465Savos sc->sc_ic.ic_wme.wme_chanParams.cap_wmeParams; 4815294465Savos uint8_t aifs, ac; 4816294465Savos 4817294465Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4818294465Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4819294465Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4820294465Savos urtwn_write_1(sc, wme2queue[ac].reg, aifs); 4821294465Savos } 4822294465Savos} 4823294465Savos 4824294465Savosstatic void 4825290564Savosurtwn_set_promisc(struct urtwn_softc *sc) 4826290564Savos{ 4827290564Savos struct ieee80211com *ic = &sc->sc_ic; 4828290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4829290564Savos uint32_t rcr, mask1, mask2; 4830290564Savos 4831290564Savos URTWN_ASSERT_LOCKED(sc); 4832290564Savos 4833290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) 4834290564Savos return; 4835290564Savos 4836290564Savos mask1 = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; 4837290564Savos mask2 = R92C_RCR_APM; 4838290564Savos 4839290564Savos if (vap->iv_state == IEEE80211_S_RUN) { 4840290564Savos switch (vap->iv_opmode) { 4841290564Savos case IEEE80211_M_STA: 4842290631Savos mask2 |= R92C_RCR_CBSSID_DATA; 4843290631Savos /* FALLTHROUGH */ 4844290631Savos case IEEE80211_M_HOSTAP: 4845290631Savos mask2 |= R92C_RCR_CBSSID_BCN; 4846290564Savos break; 4847290651Savos case IEEE80211_M_IBSS: 4848290651Savos mask2 |= R92C_RCR_CBSSID_DATA; 4849290651Savos break; 4850290564Savos default: 4851290564Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4852290564Savos __func__, vap->iv_opmode); 4853290564Savos return; 4854290564Savos } 4855290564Savos } 4856290564Savos 4857290564Savos rcr = urtwn_read_4(sc, R92C_RCR); 4858290564Savos if (ic->ic_promisc == 0) 4859290564Savos rcr = (rcr & ~mask1) | mask2; 4860290564Savos else 4861290564Savos rcr = (rcr & ~mask2) | mask1; 4862290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4863290564Savos} 4864290564Savos 4865290564Savosstatic void 4866290564Savosurtwn_update_promisc(struct ieee80211com *ic) 4867290564Savos{ 4868290564Savos struct urtwn_softc *sc = ic->ic_softc; 4869290564Savos 4870290564Savos URTWN_LOCK(sc); 4871290564Savos if (sc->sc_flags & URTWN_RUNNING) 4872290564Savos urtwn_set_promisc(sc); 4873290564Savos URTWN_UNLOCK(sc); 4874290564Savos} 4875290564Savos 4876290564Savosstatic void 4877283540Sglebiusurtwn_update_mcast(struct ieee80211com *ic) 4878251538Srpaulo{ 4879251538Srpaulo /* XXX do nothing? */ 4880251538Srpaulo} 4881251538Srpaulo 4882292167Savosstatic struct ieee80211_node * 4883297910Sadrianurtwn_node_alloc(struct ieee80211vap *vap, 4884292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]) 4885292167Savos{ 4886292167Savos struct urtwn_node *un; 4887292167Savos 4888292167Savos un = malloc(sizeof (struct urtwn_node), M_80211_NODE, 4889292167Savos M_NOWAIT | M_ZERO); 4890292167Savos 4891292167Savos if (un == NULL) 4892292167Savos return NULL; 4893292167Savos 4894292167Savos un->id = URTWN_MACID_UNDEFINED; 4895292167Savos 4896292167Savos return &un->ni; 4897292167Savos} 4898292167Savos 4899251538Srpaulostatic void 4900297910Sadrianurtwn_newassoc(struct ieee80211_node *ni, int isnew) 4901292167Savos{ 4902292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 4903292167Savos struct urtwn_node *un = URTWN_NODE(ni); 4904292167Savos uint8_t id; 4905292167Savos 4906297910Sadrian /* Only do this bit for R88E chips */ 4907297910Sadrian if (! (sc->chip & URTWN_CHIP_88E)) 4908297910Sadrian return; 4909297910Sadrian 4910292167Savos if (!isnew) 4911292167Savos return; 4912292167Savos 4913292167Savos URTWN_NT_LOCK(sc); 4914292167Savos for (id = 0; id <= URTWN_MACID_MAX(sc); id++) { 4915292167Savos if (id != URTWN_MACID_BC && sc->node_list[id] == NULL) { 4916292167Savos un->id = id; 4917292167Savos sc->node_list[id] = ni; 4918292167Savos break; 4919292167Savos } 4920292167Savos } 4921292167Savos URTWN_NT_UNLOCK(sc); 4922292167Savos 4923292167Savos if (id > URTWN_MACID_MAX(sc)) { 4924292167Savos device_printf(sc->sc_dev, "%s: node table is full\n", 4925292167Savos __func__); 4926292167Savos } 4927292167Savos} 4928292167Savos 4929292167Savosstatic void 4930297910Sadrianurtwn_node_free(struct ieee80211_node *ni) 4931292167Savos{ 4932292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 4933292167Savos struct urtwn_node *un = URTWN_NODE(ni); 4934292167Savos 4935292167Savos URTWN_NT_LOCK(sc); 4936292167Savos if (un->id != URTWN_MACID_UNDEFINED) 4937292167Savos sc->node_list[un->id] = NULL; 4938292167Savos URTWN_NT_UNLOCK(sc); 4939292167Savos 4940292167Savos sc->sc_node_free(ni); 4941292167Savos} 4942292167Savos 4943292167Savosstatic void 4944251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 4945251538Srpaulo struct ieee80211_channel *extc) 4946251538Srpaulo{ 4947287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4948251538Srpaulo uint32_t reg; 4949251538Srpaulo u_int chan; 4950251538Srpaulo int i; 4951251538Srpaulo 4952251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4953251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 4954251538Srpaulo device_printf(sc->sc_dev, 4955251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 4956251538Srpaulo return; 4957251538Srpaulo } 4958251538Srpaulo 4959251538Srpaulo /* Set Tx power for this new channel. */ 4960251538Srpaulo urtwn_set_txpower(sc, c, extc); 4961251538Srpaulo 4962251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4963251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 4964251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 4965251538Srpaulo } 4966251538Srpaulo#ifndef IEEE80211_NO_HT 4967251538Srpaulo if (extc != NULL) { 4968251538Srpaulo /* Is secondary channel below or above primary? */ 4969251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 4970251538Srpaulo 4971251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 4972251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 4973251538Srpaulo 4974251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 4975251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 4976251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 4977251538Srpaulo 4978251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 4979251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 4980251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 4981251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 4982251538Srpaulo 4983251538Srpaulo /* Set CCK side band. */ 4984251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 4985251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 4986251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 4987251538Srpaulo 4988251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 4989251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 4990251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 4991251538Srpaulo 4992251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 4993251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 4994251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 4995251538Srpaulo 4996251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 4997251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 4998251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 4999251538Srpaulo 5000251538Srpaulo /* Select 40MHz bandwidth. */ 5001251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5002251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 5003251538Srpaulo } else 5004251538Srpaulo#endif 5005251538Srpaulo { 5006251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 5007251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 5008251538Srpaulo 5009251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 5010251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 5011251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 5012251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 5013251538Srpaulo 5014264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5015264912Skevlo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 5016264912Skevlo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 5017264912Skevlo R92C_FPGA0_ANAPARAM2_CBW20); 5018264912Skevlo } 5019281069Srpaulo 5020251538Srpaulo /* Select 20MHz bandwidth. */ 5021251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5022281069Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan | 5023264912Skevlo ((sc->chip & URTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 : 5024264912Skevlo R92C_RF_CHNLBW_BW20)); 5025251538Srpaulo } 5026251538Srpaulo} 5027251538Srpaulo 5028251538Srpaulostatic void 5029251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 5030251538Srpaulo{ 5031251538Srpaulo /* TODO */ 5032251538Srpaulo} 5033251538Srpaulo 5034251538Srpaulostatic void 5035251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 5036251538Srpaulo{ 5037251538Srpaulo uint32_t rf_ac[2]; 5038251538Srpaulo uint8_t txmode; 5039251538Srpaulo int i; 5040251538Srpaulo 5041251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 5042251538Srpaulo if ((txmode & 0x70) != 0) { 5043251538Srpaulo /* Disable all continuous Tx. */ 5044251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 5045251538Srpaulo 5046251538Srpaulo /* Set RF mode to standby mode. */ 5047251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 5048251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 5049251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 5050251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 5051251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 5052251538Srpaulo } 5053251538Srpaulo } else { 5054251538Srpaulo /* Block all Tx queues. */ 5055293180Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 5056251538Srpaulo } 5057251538Srpaulo /* Start calibration. */ 5058251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5059251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 5060251538Srpaulo 5061251538Srpaulo /* Give calibration the time to complete. */ 5062266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 10); /* 100ms */ 5063251538Srpaulo 5064251538Srpaulo /* Restore configuration. */ 5065251538Srpaulo if ((txmode & 0x70) != 0) { 5066251538Srpaulo /* Restore Tx mode. */ 5067251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 5068251538Srpaulo /* Restore RF mode. */ 5069251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 5070251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 5071251538Srpaulo } else { 5072251538Srpaulo /* Unblock all Tx queues. */ 5073251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 5074251538Srpaulo } 5075251538Srpaulo} 5076251538Srpaulo 5077294473Savosstatic void 5078294473Savosurtwn_temp_calib(struct urtwn_softc *sc) 5079294473Savos{ 5080294473Savos uint8_t temp; 5081294473Savos 5082294473Savos URTWN_ASSERT_LOCKED(sc); 5083294473Savos 5084294473Savos if (!(sc->sc_flags & URTWN_TEMP_MEASURED)) { 5085294473Savos /* Start measuring temperature. */ 5086294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5087294473Savos "%s: start measuring temperature\n", __func__); 5088294473Savos if (sc->chip & URTWN_CHIP_88E) { 5089294473Savos urtwn_rf_write(sc, 0, R88E_RF_T_METER, 5090294473Savos R88E_RF_T_METER_START); 5091294473Savos } else { 5092294473Savos urtwn_rf_write(sc, 0, R92C_RF_T_METER, 5093294473Savos R92C_RF_T_METER_START); 5094294473Savos } 5095294473Savos sc->sc_flags |= URTWN_TEMP_MEASURED; 5096294473Savos return; 5097294473Savos } 5098294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 5099294473Savos 5100294473Savos /* Read measured temperature. */ 5101294473Savos if (sc->chip & URTWN_CHIP_88E) { 5102294473Savos temp = MS(urtwn_rf_read(sc, 0, R88E_RF_T_METER), 5103294473Savos R88E_RF_T_METER_VAL); 5104294473Savos } else { 5105294473Savos temp = MS(urtwn_rf_read(sc, 0, R92C_RF_T_METER), 5106294473Savos R92C_RF_T_METER_VAL); 5107294473Savos } 5108294473Savos if (temp == 0) { /* Read failed, skip. */ 5109294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5110294473Savos "%s: temperature read failed, skipping\n", __func__); 5111294473Savos return; 5112294473Savos } 5113294473Savos 5114294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5115294473Savos "%s: temperature: previous %u, current %u\n", 5116294473Savos __func__, sc->thcal_lctemp, temp); 5117294473Savos 5118294473Savos /* 5119294473Savos * Redo LC calibration if temperature changed significantly since 5120294473Savos * last calibration. 5121294473Savos */ 5122294473Savos if (sc->thcal_lctemp == 0) { 5123294473Savos /* First LC calibration is performed in urtwn_init(). */ 5124294473Savos sc->thcal_lctemp = temp; 5125294473Savos } else if (abs(temp - sc->thcal_lctemp) > 1) { 5126294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5127294473Savos "%s: LC calib triggered by temp: %u -> %u\n", 5128294473Savos __func__, sc->thcal_lctemp, temp); 5129294473Savos urtwn_lc_calib(sc); 5130294473Savos /* Record temperature of last LC calibration. */ 5131294473Savos sc->thcal_lctemp = temp; 5132294473Savos } 5133294473Savos} 5134294473Savos 5135291698Savosstatic int 5136287197Sglebiusurtwn_init(struct urtwn_softc *sc) 5137251538Srpaulo{ 5138287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 5139287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 5140287197Sglebius uint8_t macaddr[IEEE80211_ADDR_LEN]; 5141251538Srpaulo uint32_t reg; 5142291698Savos usb_error_t usb_err = USB_ERR_NORMAL_COMPLETION; 5143251538Srpaulo int error; 5144251538Srpaulo 5145291698Savos URTWN_LOCK(sc); 5146291698Savos if (sc->sc_flags & URTWN_RUNNING) { 5147291698Savos URTWN_UNLOCK(sc); 5148291698Savos return (0); 5149291698Savos } 5150264864Skevlo 5151251538Srpaulo /* Init firmware commands ring. */ 5152251538Srpaulo sc->fwcur = 0; 5153251538Srpaulo 5154251538Srpaulo /* Allocate Tx/Rx buffers. */ 5155251538Srpaulo error = urtwn_alloc_rx_list(sc); 5156251538Srpaulo if (error != 0) 5157251538Srpaulo goto fail; 5158281069Srpaulo 5159251538Srpaulo error = urtwn_alloc_tx_list(sc); 5160251538Srpaulo if (error != 0) 5161251538Srpaulo goto fail; 5162251538Srpaulo 5163251538Srpaulo /* Power on adapter. */ 5164251538Srpaulo error = urtwn_power_on(sc); 5165251538Srpaulo if (error != 0) 5166251538Srpaulo goto fail; 5167251538Srpaulo 5168251538Srpaulo /* Initialize DMA. */ 5169251538Srpaulo error = urtwn_dma_init(sc); 5170251538Srpaulo if (error != 0) 5171251538Srpaulo goto fail; 5172251538Srpaulo 5173251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 5174251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 5175251538Srpaulo 5176251538Srpaulo /* Init interrupts. */ 5177264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5178291698Savos usb_err = urtwn_write_4(sc, R88E_HISR, 0xffffffff); 5179291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5180291698Savos goto fail; 5181291698Savos usb_err = urtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | 5182264912Skevlo R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); 5183291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5184291698Savos goto fail; 5185291698Savos usb_err = urtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | 5186264912Skevlo R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); 5187291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5188291698Savos goto fail; 5189291698Savos usb_err = urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5190264912Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5191264912Skevlo R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); 5192291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5193291698Savos goto fail; 5194264912Skevlo } else { 5195291698Savos usb_err = urtwn_write_4(sc, R92C_HISR, 0xffffffff); 5196291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5197291698Savos goto fail; 5198291698Savos usb_err = urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 5199291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5200291698Savos goto fail; 5201264912Skevlo } 5202251538Srpaulo 5203251538Srpaulo /* Set MAC address. */ 5204287197Sglebius IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 5205291698Savos usb_err = urtwn_write_region_1(sc, R92C_MACID, macaddr, IEEE80211_ADDR_LEN); 5206291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5207291698Savos goto fail; 5208251538Srpaulo 5209251538Srpaulo /* Set initial network type. */ 5210289811Savos urtwn_set_mode(sc, R92C_MSR_INFRA); 5211251538Srpaulo 5212290564Savos /* Initialize Rx filter. */ 5213251538Srpaulo urtwn_rxfilter_init(sc); 5214251538Srpaulo 5215282623Skevlo /* Set response rate. */ 5216251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 5217251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 5218251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 5219251538Srpaulo 5220251538Srpaulo /* Set short/long retry limits. */ 5221251538Srpaulo urtwn_write_2(sc, R92C_RL, 5222251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 5223251538Srpaulo 5224251538Srpaulo /* Initialize EDCA parameters. */ 5225251538Srpaulo urtwn_edca_init(sc); 5226251538Srpaulo 5227251538Srpaulo /* Setup rate fallback. */ 5228264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5229264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 5230264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 5231264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 5232264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 5233264912Skevlo } 5234251538Srpaulo 5235251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 5236251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 5237251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 5238251538Srpaulo /* Set ACK timeout. */ 5239251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 5240251538Srpaulo 5241251538Srpaulo /* Setup USB aggregation. */ 5242251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 5243251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 5244251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 5245251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 5246251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 5247251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 5248251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 5249264912Skevlo if (sc->chip & URTWN_CHIP_88E) 5250264912Skevlo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); 5251282266Skevlo else { 5252264912Skevlo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 5253282266Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5254282266Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5255282266Skevlo R92C_USB_SPECIAL_OPTION_AGG_EN); 5256282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 5257282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 5258282266Skevlo } 5259251538Srpaulo 5260251538Srpaulo /* Initialize beacon parameters. */ 5261264912Skevlo urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010); 5262251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 5263251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 5264251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 5265251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 5266251538Srpaulo 5267264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5268264912Skevlo /* Setup AMPDU aggregation. */ 5269264912Skevlo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 5270264912Skevlo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 5271264912Skevlo urtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); 5272251538Srpaulo 5273264912Skevlo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 5274264912Skevlo } 5275251538Srpaulo 5276295871Savos#ifndef URTWN_WITHOUT_UCODE 5277251538Srpaulo /* Load 8051 microcode. */ 5278251538Srpaulo error = urtwn_load_firmware(sc); 5279295871Savos if (error == 0) 5280295871Savos sc->sc_flags |= URTWN_FW_LOADED; 5281295871Savos#endif 5282251538Srpaulo 5283251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 5284291698Savos error = urtwn_mac_init(sc); 5285291698Savos if (error != 0) { 5286291698Savos device_printf(sc->sc_dev, 5287291698Savos "%s: error while initializing MAC block\n", __func__); 5288291698Savos goto fail; 5289291698Savos } 5290251538Srpaulo urtwn_bb_init(sc); 5291251538Srpaulo urtwn_rf_init(sc); 5292251538Srpaulo 5293290564Savos /* Reinitialize Rx filter (D3845 is not committed yet). */ 5294290564Savos urtwn_rxfilter_init(sc); 5295290564Savos 5296264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5297264912Skevlo urtwn_write_2(sc, R92C_CR, 5298264912Skevlo urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN | 5299264912Skevlo R92C_CR_MACRXEN); 5300264912Skevlo } 5301264912Skevlo 5302251538Srpaulo /* Turn CCK and OFDM blocks on. */ 5303251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5304251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 5305291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5306291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5307291698Savos goto fail; 5308251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5309251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 5310291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5311291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5312291698Savos goto fail; 5313251538Srpaulo 5314251538Srpaulo /* Clear per-station keys table. */ 5315251538Srpaulo urtwn_cam_init(sc); 5316251538Srpaulo 5317292175Savos /* Enable decryption / encryption. */ 5318292175Savos urtwn_write_2(sc, R92C_SECCFG, 5319292175Savos R92C_SECCFG_TXUCKEY_DEF | R92C_SECCFG_RXUCKEY_DEF | 5320292175Savos R92C_SECCFG_TXENC_ENA | R92C_SECCFG_RXDEC_ENA | 5321292175Savos R92C_SECCFG_TXBCKEY_DEF | R92C_SECCFG_RXBCKEY_DEF); 5322292175Savos 5323292175Savos /* 5324292175Savos * Install static keys (if any). 5325292175Savos * Must be called after urtwn_cam_init(). 5326292175Savos */ 5327292175Savos ieee80211_runtask(ic, &sc->cmdq_task); 5328292175Savos 5329251538Srpaulo /* Enable hardware sequence numbering. */ 5330293180Savos urtwn_write_1(sc, R92C_HWSEQ_CTRL, R92C_TX_QUEUE_ALL); 5331251538Srpaulo 5332292167Savos /* Enable per-packet TX report. */ 5333292167Savos if (sc->chip & URTWN_CHIP_88E) { 5334292167Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 5335292167Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) | R88E_TX_RPT1_ENA); 5336292167Savos } 5337292167Savos 5338251538Srpaulo /* Perform LO and IQ calibrations. */ 5339251538Srpaulo urtwn_iq_calib(sc); 5340251538Srpaulo /* Perform LC calibration. */ 5341251538Srpaulo urtwn_lc_calib(sc); 5342251538Srpaulo 5343251538Srpaulo /* Fix USB interference issue. */ 5344264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5345264912Skevlo urtwn_write_1(sc, 0xfe40, 0xe0); 5346264912Skevlo urtwn_write_1(sc, 0xfe41, 0x8d); 5347264912Skevlo urtwn_write_1(sc, 0xfe42, 0x80); 5348251538Srpaulo 5349264912Skevlo urtwn_pa_bias_init(sc); 5350264912Skevlo } 5351251538Srpaulo 5352251538Srpaulo /* Initialize GPIO setting. */ 5353251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 5354251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 5355251538Srpaulo 5356251538Srpaulo /* Fix for lower temperature. */ 5357264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 5358264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 5359251538Srpaulo 5360251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 5361251538Srpaulo 5362287197Sglebius sc->sc_flags |= URTWN_RUNNING; 5363251538Srpaulo 5364251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5365251538Srpaulofail: 5366291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5367291698Savos error = EIO; 5368291698Savos 5369291698Savos URTWN_UNLOCK(sc); 5370291698Savos 5371291698Savos return (error); 5372251538Srpaulo} 5373251538Srpaulo 5374251538Srpaulostatic void 5375287197Sglebiusurtwn_stop(struct urtwn_softc *sc) 5376251538Srpaulo{ 5377251538Srpaulo 5378291698Savos URTWN_LOCK(sc); 5379291698Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 5380291698Savos URTWN_UNLOCK(sc); 5381291698Savos return; 5382291698Savos } 5383291698Savos 5384295871Savos sc->sc_flags &= ~(URTWN_RUNNING | URTWN_FW_LOADED | 5385295871Savos URTWN_TEMP_MEASURED); 5386294473Savos sc->thcal_lctemp = 0; 5387251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 5388295874Savos 5389251538Srpaulo urtwn_abort_xfers(sc); 5390288353Sadrian urtwn_drain_mbufq(sc); 5391295874Savos urtwn_power_off(sc); 5392291698Savos URTWN_UNLOCK(sc); 5393251538Srpaulo} 5394251538Srpaulo 5395251538Srpaulostatic void 5396251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 5397251538Srpaulo{ 5398251538Srpaulo int i; 5399251538Srpaulo 5400251538Srpaulo URTWN_ASSERT_LOCKED(sc); 5401251538Srpaulo 5402251538Srpaulo /* abort any pending transfers */ 5403251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 5404251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 5405251538Srpaulo} 5406251538Srpaulo 5407251538Srpaulostatic int 5408251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 5409251538Srpaulo const struct ieee80211_bpf_params *params) 5410251538Srpaulo{ 5411251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 5412286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 5413251538Srpaulo struct urtwn_data *bf; 5414290630Savos int error; 5415251538Srpaulo 5416297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 5417297596Sadrian __func__, 5418297596Sadrian m); 5419297596Sadrian 5420251538Srpaulo /* prevent management frames from being sent if we're not ready */ 5421290630Savos URTWN_LOCK(sc); 5422287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) { 5423290630Savos error = ENETDOWN; 5424290630Savos goto end; 5425251538Srpaulo } 5426290630Savos 5427251538Srpaulo bf = urtwn_getbuf(sc); 5428251538Srpaulo if (bf == NULL) { 5429290630Savos error = ENOBUFS; 5430290630Savos goto end; 5431251538Srpaulo } 5432251538Srpaulo 5433292221Savos if (params == NULL) { 5434292221Savos /* 5435292221Savos * Legacy path; interpret frame contents to decide 5436292221Savos * precisely how to send the frame. 5437292221Savos */ 5438292221Savos error = urtwn_tx_data(sc, ni, m, bf); 5439292221Savos } else { 5440292221Savos /* 5441292221Savos * Caller supplied explicit parameters to use in 5442292221Savos * sending the frame. 5443292221Savos */ 5444292221Savos error = urtwn_tx_raw(sc, ni, m, bf, params); 5445292221Savos } 5446292221Savos if (error != 0) { 5447251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 5448290630Savos goto end; 5449251538Srpaulo } 5450290630Savos 5451288353Sadrian sc->sc_txtimer = 5; 5452290630Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5453290630Savos 5454290630Savosend: 5455290630Savos if (error != 0) 5456290630Savos m_freem(m); 5457290630Savos 5458251538Srpaulo URTWN_UNLOCK(sc); 5459251538Srpaulo 5460290630Savos return (error); 5461251538Srpaulo} 5462251538Srpaulo 5463266472Shselaskystatic void 5464266472Shselaskyurtwn_ms_delay(struct urtwn_softc *sc) 5465266472Shselasky{ 5466266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 1000); 5467266472Shselasky} 5468266472Shselasky 5469251538Srpaulostatic device_method_t urtwn_methods[] = { 5470251538Srpaulo /* Device interface */ 5471251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 5472251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 5473251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 5474251538Srpaulo 5475264912Skevlo DEVMETHOD_END 5476251538Srpaulo}; 5477251538Srpaulo 5478251538Srpaulostatic driver_t urtwn_driver = { 5479251538Srpaulo "urtwn", 5480251538Srpaulo urtwn_methods, 5481251538Srpaulo sizeof(struct urtwn_softc) 5482251538Srpaulo}; 5483251538Srpaulo 5484251538Srpaulostatic devclass_t urtwn_devclass; 5485251538Srpaulo 5486251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 5487251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 5488251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 5489295871Savos#ifndef URTWN_WITHOUT_UCODE 5490251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 5491295871Savos#endif 5492251538SrpauloMODULE_VERSION(urtwn, 1); 5493292080SimpUSB_PNP_HOST_INFO(urtwn_devs); 5494