if_urtwn.c revision 297601
1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5264912Skevlo * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6292176Savos * Copyright (c) 2015 Andriy Voskoboinyk <avos@FreeBSD.org> 7251538Srpaulo * 8251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 9251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 10251538Srpaulo * copyright notice and this permission notice appear in all copies. 11251538Srpaulo * 12251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19251538Srpaulo */ 20251538Srpaulo 21251538Srpaulo#include <sys/cdefs.h> 22251538Srpaulo__FBSDID("$FreeBSD: head/sys/dev/urtwn/if_urtwn.c 297601 2016-04-06 00:52:30Z adrian $"); 23251538Srpaulo 24251538Srpaulo/* 25264912Skevlo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU. 26251538Srpaulo */ 27251538Srpaulo 28288353Sadrian#include "opt_wlan.h" 29295871Savos#include "opt_urtwn.h" 30288353Sadrian 31251538Srpaulo#include <sys/param.h> 32251538Srpaulo#include <sys/sockio.h> 33251538Srpaulo#include <sys/sysctl.h> 34251538Srpaulo#include <sys/lock.h> 35251538Srpaulo#include <sys/mutex.h> 36291902Skevlo#include <sys/condvar.h> 37251538Srpaulo#include <sys/mbuf.h> 38251538Srpaulo#include <sys/kernel.h> 39251538Srpaulo#include <sys/socket.h> 40251538Srpaulo#include <sys/systm.h> 41251538Srpaulo#include <sys/malloc.h> 42251538Srpaulo#include <sys/module.h> 43251538Srpaulo#include <sys/bus.h> 44251538Srpaulo#include <sys/endian.h> 45251538Srpaulo#include <sys/linker.h> 46251538Srpaulo#include <sys/firmware.h> 47251538Srpaulo#include <sys/kdb.h> 48251538Srpaulo 49251538Srpaulo#include <machine/bus.h> 50251538Srpaulo#include <machine/resource.h> 51251538Srpaulo#include <sys/rman.h> 52251538Srpaulo 53251538Srpaulo#include <net/bpf.h> 54251538Srpaulo#include <net/if.h> 55257176Sglebius#include <net/if_var.h> 56251538Srpaulo#include <net/if_arp.h> 57251538Srpaulo#include <net/ethernet.h> 58251538Srpaulo#include <net/if_dl.h> 59251538Srpaulo#include <net/if_media.h> 60251538Srpaulo#include <net/if_types.h> 61251538Srpaulo 62251538Srpaulo#include <netinet/in.h> 63251538Srpaulo#include <netinet/in_systm.h> 64251538Srpaulo#include <netinet/in_var.h> 65251538Srpaulo#include <netinet/if_ether.h> 66251538Srpaulo#include <netinet/ip.h> 67251538Srpaulo 68251538Srpaulo#include <net80211/ieee80211_var.h> 69288088Sadrian#include <net80211/ieee80211_input.h> 70251538Srpaulo#include <net80211/ieee80211_regdomain.h> 71251538Srpaulo#include <net80211/ieee80211_radiotap.h> 72251538Srpaulo#include <net80211/ieee80211_ratectl.h> 73297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 74297596Sadrian#include <net80211/ieee80211_superg.h> 75297596Sadrian#endif 76251538Srpaulo 77251538Srpaulo#include <dev/usb/usb.h> 78251538Srpaulo#include <dev/usb/usbdi.h> 79291902Skevlo#include <dev/usb/usb_device.h> 80251538Srpaulo#include "usbdevs.h" 81251538Srpaulo 82251538Srpaulo#include <dev/usb/usb_debug.h> 83251538Srpaulo 84297058Sadrian#include <dev/urtwn/if_urtwnreg.h> 85297058Sadrian#include <dev/urtwn/if_urtwnvar.h> 86251538Srpaulo 87251538Srpaulo#ifdef USB_DEBUG 88294471Savosenum { 89294471Savos URTWN_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 90294471Savos URTWN_DEBUG_RECV = 0x00000002, /* basic recv operation */ 91294471Savos URTWN_DEBUG_STATE = 0x00000004, /* 802.11 state transitions */ 92294471Savos URTWN_DEBUG_RA = 0x00000008, /* f/w rate adaptation setup */ 93294471Savos URTWN_DEBUG_USB = 0x00000010, /* usb requests */ 94294471Savos URTWN_DEBUG_FIRMWARE = 0x00000020, /* firmware(9) loading debug */ 95294471Savos URTWN_DEBUG_BEACON = 0x00000040, /* beacon handling */ 96294471Savos URTWN_DEBUG_INTR = 0x00000080, /* ISR */ 97294471Savos URTWN_DEBUG_TEMP = 0x00000100, /* temperature calibration */ 98294471Savos URTWN_DEBUG_ROM = 0x00000200, /* various ROM info */ 99294471Savos URTWN_DEBUG_KEY = 0x00000400, /* crypto keys management */ 100294471Savos URTWN_DEBUG_TXPWR = 0x00000800, /* dump Tx power values */ 101297175Sadrian URTWN_DEBUG_RSSI = 0x00001000, /* dump RSSI lookups */ 102294471Savos URTWN_DEBUG_ANY = 0xffffffff 103294471Savos}; 104251538Srpaulo 105294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { \ 106294471Savos if ((_sc)->sc_debug & (_m)) \ 107294471Savos device_printf((_sc)->sc_dev, __VA_ARGS__); \ 108294471Savos} while(0) 109294471Savos 110294471Savos#else 111294471Savos#define URTWN_DPRINTF(_sc, _m, ...) do { (void) sc; } while (0) 112251538Srpaulo#endif 113251538Srpaulo 114288088Sadrian#define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 115251538Srpaulo 116297175Sadrianstatic int urtwn_enable_11n = 1; 117297175SadrianTUNABLE_INT("hw.usb.urtwn.enable_11n", &urtwn_enable_11n); 118297175Sadrian 119251538Srpaulo/* various supported device vendors/products */ 120251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 121251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 122264912Skevlo#define URTWN_RTL8188E_DEV(v,p) \ 123264912Skevlo { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTWN_RTL8188E) } 124264912Skevlo#define URTWN_RTL8188E 1 125251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 126251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 127251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 128251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 129266721Skevlo URTWN_DEV(ASUS, USBN10NANO), 130251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 131251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 132251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 133251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 134251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 135251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 136251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 137251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 138251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 139251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 140251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 141251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 142251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 143251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 144251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 145251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 146252196Skevlo URTWN_DEV(DLINK, DWA131B), 147251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 148251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 149251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 150251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 151251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 152251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 153251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 154251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 155251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 156251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 157251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 158251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 159251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 160251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 161251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 162251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 163251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 164251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 165251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 166251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 167251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 168251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 169251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 170282119Skevlo URTWN_DEV(REALTEK, RTL8188CU_3), 171251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 172251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 173251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 174251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 175272410Shselasky URTWN_DEV(REALTEK, RTL8188RU_3), 176251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 177251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 178251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 179251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 180251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 181251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 182251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 183251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 184251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 185264912Skevlo /* URTWN_RTL8188E */ 186295907Skevlo URTWN_RTL8188E_DEV(ABOCOM, RTL8188EU), 187273589Skevlo URTWN_RTL8188E_DEV(DLINK, DWA123D1), 188270191Skevlo URTWN_RTL8188E_DEV(DLINK, DWA125D1), 189273589Skevlo URTWN_RTL8188E_DEV(ELECOM, WDC150SU2M), 190264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188ETV), 191264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188EU), 192264912Skevlo#undef URTWN_RTL8188E_DEV 193251538Srpaulo#undef URTWN_DEV 194251538Srpaulo}; 195251538Srpaulo 196251538Srpaulostatic device_probe_t urtwn_match; 197251538Srpaulostatic device_attach_t urtwn_attach; 198251538Srpaulostatic device_detach_t urtwn_detach; 199251538Srpaulo 200251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 201251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 202251538Srpaulo 203294471Savosstatic void urtwn_sysctlattach(struct urtwn_softc *); 204294471Savosstatic void urtwn_drain_mbufq(struct urtwn_softc *); 205287197Sglebiusstatic usb_error_t urtwn_do_request(struct urtwn_softc *, 206287197Sglebius struct usb_device_request *, void *); 207251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 208251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 209251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 210251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 211251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 212292207Savosstatic struct mbuf * urtwn_rx_copy_to_mbuf(struct urtwn_softc *, 213292207Savos struct r92c_rx_stat *, int); 214292207Savosstatic struct mbuf * urtwn_report_intr(struct usb_xfer *, 215292207Savos struct urtwn_data *); 216292207Savosstatic struct mbuf * urtwn_rxeof(struct urtwn_softc *, uint8_t *, int); 217292167Savosstatic void urtwn_r88e_ratectl_tx_complete(struct urtwn_softc *, 218292167Savos void *); 219292207Savosstatic struct ieee80211_node *urtwn_rx_frame(struct urtwn_softc *, 220292207Savos struct mbuf *, int8_t *); 221289891Savosstatic void urtwn_txeof(struct urtwn_softc *, struct urtwn_data *, 222289891Savos int); 223281069Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 224251538Srpaulo struct urtwn_data[], int, int); 225251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 226251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 227251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 228251538Srpaulo struct urtwn_data data[], int); 229289066Skevlostatic void urtwn_free_rx_list(struct urtwn_softc *); 230289066Skevlostatic void urtwn_free_tx_list(struct urtwn_softc *); 231251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 232251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 233291698Savosstatic usb_error_t urtwn_write_region_1(struct urtwn_softc *, uint16_t, 234251538Srpaulo uint8_t *, int); 235291698Savosstatic usb_error_t urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 236291698Savosstatic usb_error_t urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 237291698Savosstatic usb_error_t urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 238291698Savosstatic usb_error_t urtwn_read_region_1(struct urtwn_softc *, uint16_t, 239251538Srpaulo uint8_t *, int); 240251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 241251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 242251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 243281069Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 244251538Srpaulo const void *, int); 245292174Savosstatic void urtwn_cmdq_cb(void *, int); 246292174Savosstatic int urtwn_cmd_sleepable(struct urtwn_softc *, const void *, 247292174Savos size_t, CMD_FUNC_PROTO); 248264912Skevlostatic void urtwn_r92c_rf_write(struct urtwn_softc *, int, 249264912Skevlo uint8_t, uint32_t); 250281069Srpaulostatic void urtwn_r88e_rf_write(struct urtwn_softc *, int, 251264912Skevlo uint8_t, uint32_t); 252251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 253281069Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 254251538Srpaulo uint32_t); 255291264Savosstatic int urtwn_efuse_read_next(struct urtwn_softc *, uint8_t *); 256291264Savosstatic int urtwn_efuse_read_data(struct urtwn_softc *, uint8_t *, 257291264Savos uint8_t, uint8_t); 258294471Savos#ifdef USB_DEBUG 259291264Savosstatic void urtwn_dump_rom_contents(struct urtwn_softc *, 260291264Savos uint8_t *, uint16_t); 261291264Savos#endif 262291264Savosstatic int urtwn_efuse_read(struct urtwn_softc *, uint8_t *, 263291264Savos uint16_t); 264291698Savosstatic int urtwn_efuse_switch_power(struct urtwn_softc *); 265251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 266291264Savosstatic int urtwn_read_rom(struct urtwn_softc *); 267291264Savosstatic int urtwn_r88e_read_rom(struct urtwn_softc *); 268251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 269290631Savosstatic void urtwn_init_beacon(struct urtwn_softc *, 270290631Savos struct urtwn_vap *); 271290631Savosstatic int urtwn_setup_beacon(struct urtwn_softc *, 272290631Savos struct ieee80211_node *); 273290631Savosstatic void urtwn_update_beacon(struct ieee80211vap *, int); 274290631Savosstatic int urtwn_tx_beacon(struct urtwn_softc *sc, 275290631Savos struct urtwn_vap *); 276292175Savosstatic int urtwn_key_alloc(struct ieee80211vap *, 277292175Savos struct ieee80211_key *, ieee80211_keyix *, 278292175Savos ieee80211_keyix *); 279292175Savosstatic void urtwn_key_set_cb(struct urtwn_softc *, 280292175Savos union sec_param *); 281292175Savosstatic void urtwn_key_del_cb(struct urtwn_softc *, 282292175Savos union sec_param *); 283292175Savosstatic int urtwn_key_set(struct ieee80211vap *, 284292175Savos const struct ieee80211_key *); 285292175Savosstatic int urtwn_key_delete(struct ieee80211vap *, 286292175Savos const struct ieee80211_key *); 287290651Savosstatic void urtwn_tsf_task_adhoc(void *, int); 288290631Savosstatic void urtwn_tsf_sync_enable(struct urtwn_softc *, 289290631Savos struct ieee80211vap *); 290292203Savosstatic void urtwn_get_tsf(struct urtwn_softc *, uint64_t *); 291251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 292289811Savosstatic void urtwn_set_mode(struct urtwn_softc *, uint8_t); 293290651Savosstatic void urtwn_ibss_recv_mgmt(struct ieee80211_node *, 294290651Savos struct mbuf *, int, 295290651Savos const struct ieee80211_rx_stats *, int, int); 296281069Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 297251538Srpaulo enum ieee80211_state, int); 298294473Savosstatic void urtwn_calib_to(void *); 299294473Savosstatic void urtwn_calib_cb(struct urtwn_softc *, 300294473Savos union sec_param *); 301251538Srpaulostatic void urtwn_watchdog(void *); 302251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 303251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 304264912Skevlostatic int8_t urtwn_r88e_get_rssi(struct urtwn_softc *, int, void *); 305290630Savosstatic int urtwn_tx_data(struct urtwn_softc *, 306251538Srpaulo struct ieee80211_node *, struct mbuf *, 307251538Srpaulo struct urtwn_data *); 308292221Savosstatic int urtwn_tx_raw(struct urtwn_softc *, 309292221Savos struct ieee80211_node *, struct mbuf *, 310292221Savos struct urtwn_data *, 311292221Savos const struct ieee80211_bpf_params *); 312290630Savosstatic void urtwn_tx_start(struct urtwn_softc *, struct mbuf *, 313290630Savos uint8_t, struct urtwn_data *); 314287197Sglebiusstatic int urtwn_transmit(struct ieee80211com *, struct mbuf *); 315287197Sglebiusstatic void urtwn_start(struct urtwn_softc *); 316287197Sglebiusstatic void urtwn_parent(struct ieee80211com *); 317264912Skevlostatic int urtwn_r92c_power_on(struct urtwn_softc *); 318264912Skevlostatic int urtwn_r88e_power_on(struct urtwn_softc *); 319295874Savosstatic void urtwn_r92c_power_off(struct urtwn_softc *); 320295874Savosstatic void urtwn_r88e_power_off(struct urtwn_softc *); 321251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 322295871Savos#ifndef URTWN_WITHOUT_UCODE 323251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 324264912Skevlostatic void urtwn_r88e_fw_reset(struct urtwn_softc *); 325281069Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 326251538Srpaulo const uint8_t *, int); 327251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 328295871Savos#endif 329291902Skevlostatic int urtwn_dma_init(struct urtwn_softc *); 330291698Savosstatic int urtwn_mac_init(struct urtwn_softc *); 331251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 332251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 333251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 334292175Savosstatic int urtwn_cam_write(struct urtwn_softc *, uint32_t, 335292175Savos uint32_t); 336251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 337251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 338251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 339281069Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 340251538Srpaulo uint16_t[]); 341251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 342281069Srpaulo struct ieee80211_channel *, 343251538Srpaulo struct ieee80211_channel *, uint16_t[]); 344264912Skevlostatic void urtwn_r88e_get_txpower(struct urtwn_softc *, int, 345281069Srpaulo struct ieee80211_channel *, 346264912Skevlo struct ieee80211_channel *, uint16_t[]); 347251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 348281069Srpaulo struct ieee80211_channel *, 349251538Srpaulo struct ieee80211_channel *); 350290048Savosstatic void urtwn_set_rx_bssid_all(struct urtwn_softc *, int); 351290048Savosstatic void urtwn_set_gain(struct urtwn_softc *, uint8_t); 352251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 353251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 354251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 355292014Savosstatic int urtwn_wme_update(struct ieee80211com *); 356294465Savosstatic void urtwn_update_slot(struct ieee80211com *); 357294465Savosstatic void urtwn_update_slot_cb(struct urtwn_softc *, 358294465Savos union sec_param *); 359294465Savosstatic void urtwn_update_aifs(struct urtwn_softc *, uint8_t); 360290564Savosstatic void urtwn_set_promisc(struct urtwn_softc *); 361290564Savosstatic void urtwn_update_promisc(struct ieee80211com *); 362289066Skevlostatic void urtwn_update_mcast(struct ieee80211com *); 363292167Savosstatic struct ieee80211_node *urtwn_r88e_node_alloc(struct ieee80211vap *, 364292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]); 365292167Savosstatic void urtwn_r88e_newassoc(struct ieee80211_node *, int); 366292167Savosstatic void urtwn_r88e_node_free(struct ieee80211_node *); 367251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 368281069Srpaulo struct ieee80211_channel *, 369251538Srpaulo struct ieee80211_channel *); 370251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 371251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 372294473Savosstatic void urtwn_temp_calib(struct urtwn_softc *); 373291698Savosstatic int urtwn_init(struct urtwn_softc *); 374287197Sglebiusstatic void urtwn_stop(struct urtwn_softc *); 375251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 376251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 377251538Srpaulo const struct ieee80211_bpf_params *); 378266472Shselaskystatic void urtwn_ms_delay(struct urtwn_softc *); 379251538Srpaulo 380251538Srpaulo/* Aliases. */ 381251538Srpaulo#define urtwn_bb_write urtwn_write_4 382251538Srpaulo#define urtwn_bb_read urtwn_read_4 383251538Srpaulo 384251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 385251538Srpaulo [URTWN_BULK_RX] = { 386251538Srpaulo .type = UE_BULK, 387251538Srpaulo .endpoint = UE_ADDR_ANY, 388251538Srpaulo .direction = UE_DIR_IN, 389251538Srpaulo .bufsize = URTWN_RXBUFSZ, 390251538Srpaulo .flags = { 391251538Srpaulo .pipe_bof = 1, 392251538Srpaulo .short_xfer_ok = 1 393251538Srpaulo }, 394251538Srpaulo .callback = urtwn_bulk_rx_callback, 395251538Srpaulo }, 396251538Srpaulo [URTWN_BULK_TX_BE] = { 397251538Srpaulo .type = UE_BULK, 398251538Srpaulo .endpoint = 0x03, 399251538Srpaulo .direction = UE_DIR_OUT, 400251538Srpaulo .bufsize = URTWN_TXBUFSZ, 401251538Srpaulo .flags = { 402251538Srpaulo .ext_buffer = 1, 403251538Srpaulo .pipe_bof = 1, 404251538Srpaulo .force_short_xfer = 1 405251538Srpaulo }, 406251538Srpaulo .callback = urtwn_bulk_tx_callback, 407251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 408251538Srpaulo }, 409251538Srpaulo [URTWN_BULK_TX_BK] = { 410251538Srpaulo .type = UE_BULK, 411251538Srpaulo .endpoint = 0x03, 412251538Srpaulo .direction = UE_DIR_OUT, 413251538Srpaulo .bufsize = URTWN_TXBUFSZ, 414251538Srpaulo .flags = { 415251538Srpaulo .ext_buffer = 1, 416251538Srpaulo .pipe_bof = 1, 417251538Srpaulo .force_short_xfer = 1, 418251538Srpaulo }, 419251538Srpaulo .callback = urtwn_bulk_tx_callback, 420251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 421251538Srpaulo }, 422251538Srpaulo [URTWN_BULK_TX_VI] = { 423251538Srpaulo .type = UE_BULK, 424251538Srpaulo .endpoint = 0x02, 425251538Srpaulo .direction = UE_DIR_OUT, 426251538Srpaulo .bufsize = URTWN_TXBUFSZ, 427251538Srpaulo .flags = { 428251538Srpaulo .ext_buffer = 1, 429251538Srpaulo .pipe_bof = 1, 430251538Srpaulo .force_short_xfer = 1 431251538Srpaulo }, 432251538Srpaulo .callback = urtwn_bulk_tx_callback, 433251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 434251538Srpaulo }, 435251538Srpaulo [URTWN_BULK_TX_VO] = { 436251538Srpaulo .type = UE_BULK, 437251538Srpaulo .endpoint = 0x02, 438251538Srpaulo .direction = UE_DIR_OUT, 439251538Srpaulo .bufsize = URTWN_TXBUFSZ, 440251538Srpaulo .flags = { 441251538Srpaulo .ext_buffer = 1, 442251538Srpaulo .pipe_bof = 1, 443251538Srpaulo .force_short_xfer = 1 444251538Srpaulo }, 445251538Srpaulo .callback = urtwn_bulk_tx_callback, 446251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 447251538Srpaulo }, 448251538Srpaulo}; 449251538Srpaulo 450292014Savosstatic const struct wme_to_queue { 451292014Savos uint16_t reg; 452292014Savos uint8_t qid; 453292014Savos} wme2queue[WME_NUM_AC] = { 454292014Savos { R92C_EDCA_BE_PARAM, URTWN_BULK_TX_BE}, 455292014Savos { R92C_EDCA_BK_PARAM, URTWN_BULK_TX_BK}, 456292014Savos { R92C_EDCA_VI_PARAM, URTWN_BULK_TX_VI}, 457292014Savos { R92C_EDCA_VO_PARAM, URTWN_BULK_TX_VO} 458292014Savos}; 459292014Savos 460251538Srpaulostatic int 461251538Srpaulourtwn_match(device_t self) 462251538Srpaulo{ 463251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 464251538Srpaulo 465251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 466251538Srpaulo return (ENXIO); 467251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 468251538Srpaulo return (ENXIO); 469251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 470251538Srpaulo return (ENXIO); 471251538Srpaulo 472251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 473251538Srpaulo} 474251538Srpaulo 475297175Sadrianstatic void 476297175Sadrianurtwn_update_chw(struct ieee80211com *ic) 477297175Sadrian{ 478297175Sadrian} 479297175Sadrian 480251538Srpaulostatic int 481297175Sadrianurtwn_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 482297175Sadrian{ 483297175Sadrian 484297175Sadrian /* We're driving this ourselves (eventually); don't involve net80211 */ 485297175Sadrian return (0); 486297175Sadrian} 487297175Sadrian 488297175Sadrianstatic int 489251538Srpaulourtwn_attach(device_t self) 490251538Srpaulo{ 491251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 492251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 493287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 494293339Savos uint8_t bands[howmany(IEEE80211_MODE_MAX, 8)]; 495251538Srpaulo int error; 496251538Srpaulo 497251538Srpaulo device_set_usb_desc(self); 498251538Srpaulo sc->sc_udev = uaa->device; 499251538Srpaulo sc->sc_dev = self; 500264912Skevlo if (USB_GET_DRIVER_INFO(uaa) == URTWN_RTL8188E) 501264912Skevlo sc->chip |= URTWN_CHIP_88E; 502251538Srpaulo 503294471Savos#ifdef USB_DEBUG 504294471Savos int debug; 505294471Savos if (resource_int_value(device_get_name(sc->sc_dev), 506294471Savos device_get_unit(sc->sc_dev), "debug", &debug) == 0) 507294471Savos sc->sc_debug = debug; 508294471Savos#endif 509294471Savos 510251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 511251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 512292174Savos URTWN_CMDQ_LOCK_INIT(sc); 513292167Savos URTWN_NT_LOCK_INIT(sc); 514294473Savos callout_init(&sc->sc_calib_to, 0); 515251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 516287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 517251538Srpaulo 518291902Skevlo sc->sc_iface_index = URTWN_IFACE_INDEX; 519291902Skevlo error = usbd_transfer_setup(uaa->device, &sc->sc_iface_index, 520291902Skevlo sc->sc_xfer, urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 521251538Srpaulo if (error) { 522251538Srpaulo device_printf(self, "could not allocate USB transfers, " 523251538Srpaulo "err=%s\n", usbd_errstr(error)); 524251538Srpaulo goto detach; 525251538Srpaulo } 526251538Srpaulo 527251538Srpaulo URTWN_LOCK(sc); 528251538Srpaulo 529251538Srpaulo error = urtwn_read_chipid(sc); 530251538Srpaulo if (error) { 531251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 532251538Srpaulo URTWN_UNLOCK(sc); 533251538Srpaulo goto detach; 534251538Srpaulo } 535251538Srpaulo 536251538Srpaulo /* Determine number of Tx/Rx chains. */ 537251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 538251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 539251538Srpaulo sc->nrxchains = 2; 540251538Srpaulo } else { 541251538Srpaulo sc->ntxchains = 1; 542251538Srpaulo sc->nrxchains = 1; 543251538Srpaulo } 544251538Srpaulo 545264912Skevlo if (sc->chip & URTWN_CHIP_88E) 546291264Savos error = urtwn_r88e_read_rom(sc); 547264912Skevlo else 548291264Savos error = urtwn_read_rom(sc); 549291264Savos if (error != 0) { 550291264Savos device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", 551291264Savos __func__, error); 552291264Savos URTWN_UNLOCK(sc); 553291264Savos goto detach; 554291264Savos } 555264912Skevlo 556251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 557251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 558264912Skevlo (sc->chip & URTWN_CHIP_88E) ? "8188EU" : 559251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 560251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 561251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 562251538Srpaulo 563251538Srpaulo URTWN_UNLOCK(sc); 564251538Srpaulo 565283537Sglebius ic->ic_softc = sc; 566283527Sglebius ic->ic_name = device_get_nameunit(self); 567251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 568251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 569251538Srpaulo 570251538Srpaulo /* set device capabilities */ 571251538Srpaulo ic->ic_caps = 572251538Srpaulo IEEE80211_C_STA /* station mode */ 573251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 574290651Savos | IEEE80211_C_IBSS /* adhoc mode */ 575290631Savos | IEEE80211_C_HOSTAP /* hostap mode */ 576251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 577251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 578297175Sadrian#if 0 579251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 580297175Sadrian#endif 581251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 582292014Savos | IEEE80211_C_WME /* 802.11e */ 583297596Sadrian | IEEE80211_C_SWAMSDUTX /* Do software A-MSDU TX */ 584297596Sadrian | IEEE80211_C_FF /* Atheros fast-frames */ 585251538Srpaulo ; 586251538Srpaulo 587292175Savos ic->ic_cryptocaps = 588292175Savos IEEE80211_CRYPTO_WEP | 589292175Savos IEEE80211_CRYPTO_TKIP | 590292175Savos IEEE80211_CRYPTO_AES_CCM; 591292175Savos 592297175Sadrian /* Assume they're all 11n capable for now */ 593297175Sadrian if (urtwn_enable_11n) { 594297175Sadrian device_printf(self, "enabling 11n\n"); 595297175Sadrian ic->ic_htcaps = IEEE80211_HTC_HT | 596297601Sadrian#if 0 597297175Sadrian IEEE80211_HTC_AMPDU | 598297601Sadrian#endif 599297175Sadrian IEEE80211_HTC_AMSDU | 600297175Sadrian IEEE80211_HTCAP_MAXAMSDU_3839 | 601297175Sadrian IEEE80211_HTCAP_SMPS_OFF; 602297175Sadrian /* no HT40 just yet */ 603297175Sadrian // ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40; 604297175Sadrian 605297175Sadrian /* XXX TODO: verify chains versus streams for urtwn */ 606297175Sadrian ic->ic_txstream = sc->ntxchains; 607297175Sadrian ic->ic_rxstream = sc->nrxchains; 608297175Sadrian } 609297175Sadrian 610293339Savos memset(bands, 0, sizeof(bands)); 611293339Savos setbit(bands, IEEE80211_MODE_11B); 612293339Savos setbit(bands, IEEE80211_MODE_11G); 613297175Sadrian if (urtwn_enable_11n) 614297175Sadrian setbit(bands, IEEE80211_MODE_11NG); 615293339Savos ieee80211_init_channels(ic, NULL, bands); 616251538Srpaulo 617287197Sglebius ieee80211_ifattach(ic); 618251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 619251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 620251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 621251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 622287197Sglebius ic->ic_transmit = urtwn_transmit; 623287197Sglebius ic->ic_parent = urtwn_parent; 624251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 625251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 626292014Savos ic->ic_wme.wme_update = urtwn_wme_update; 627294465Savos ic->ic_updateslot = urtwn_update_slot; 628290564Savos ic->ic_update_promisc = urtwn_update_promisc; 629251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 630292167Savos if (sc->chip & URTWN_CHIP_88E) { 631292167Savos ic->ic_node_alloc = urtwn_r88e_node_alloc; 632292167Savos ic->ic_newassoc = urtwn_r88e_newassoc; 633292167Savos sc->sc_node_free = ic->ic_node_free; 634292167Savos ic->ic_node_free = urtwn_r88e_node_free; 635292167Savos } 636297175Sadrian ic->ic_update_chw = urtwn_update_chw; 637297175Sadrian ic->ic_ampdu_enable = urtwn_ampdu_enable; 638251538Srpaulo 639281069Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 640251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 641251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 642251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 643251538Srpaulo 644292174Savos TASK_INIT(&sc->cmdq_task, 0, urtwn_cmdq_cb, sc); 645292174Savos 646294471Savos urtwn_sysctlattach(sc); 647294471Savos 648251538Srpaulo if (bootverbose) 649251538Srpaulo ieee80211_announce(ic); 650251538Srpaulo 651251538Srpaulo return (0); 652251538Srpaulo 653251538Srpaulodetach: 654251538Srpaulo urtwn_detach(self); 655251538Srpaulo return (ENXIO); /* failure */ 656251538Srpaulo} 657251538Srpaulo 658294471Savosstatic void 659294471Savosurtwn_sysctlattach(struct urtwn_softc *sc) 660294471Savos{ 661294471Savos#ifdef USB_DEBUG 662294471Savos struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); 663294471Savos struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev); 664294471Savos 665294471Savos SYSCTL_ADD_U32(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 666294471Savos "debug", CTLFLAG_RW, &sc->sc_debug, sc->sc_debug, 667294471Savos "control debugging printfs"); 668294471Savos#endif 669294471Savos} 670294471Savos 671251538Srpaulostatic int 672251538Srpaulourtwn_detach(device_t self) 673251538Srpaulo{ 674251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 675287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 676263153Skevlo unsigned int x; 677281069Srpaulo 678263153Skevlo /* Prevent further ioctls. */ 679263153Skevlo URTWN_LOCK(sc); 680263153Skevlo sc->sc_flags |= URTWN_DETACHED; 681263153Skevlo URTWN_UNLOCK(sc); 682251538Srpaulo 683291698Savos urtwn_stop(sc); 684291698Savos 685251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 686294473Savos callout_drain(&sc->sc_calib_to); 687251538Srpaulo 688288353Sadrian /* stop all USB transfers */ 689288353Sadrian usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 690288353Sadrian 691263153Skevlo /* Prevent further allocations from RX/TX data lists. */ 692263153Skevlo URTWN_LOCK(sc); 693263153Skevlo STAILQ_INIT(&sc->sc_tx_active); 694263153Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 695263153Skevlo STAILQ_INIT(&sc->sc_tx_pending); 696263153Skevlo 697263153Skevlo STAILQ_INIT(&sc->sc_rx_active); 698263153Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 699263153Skevlo URTWN_UNLOCK(sc); 700263153Skevlo 701263153Skevlo /* drain USB transfers */ 702263153Skevlo for (x = 0; x != URTWN_N_TRANSFER; x++) 703263153Skevlo usbd_transfer_drain(sc->sc_xfer[x]); 704263153Skevlo 705263153Skevlo /* Free data buffers. */ 706263153Skevlo URTWN_LOCK(sc); 707263153Skevlo urtwn_free_tx_list(sc); 708263153Skevlo urtwn_free_rx_list(sc); 709263153Skevlo URTWN_UNLOCK(sc); 710263153Skevlo 711292174Savos if (ic->ic_softc == sc) { 712292174Savos ieee80211_draintask(ic, &sc->cmdq_task); 713292174Savos ieee80211_ifdetach(ic); 714292174Savos } 715292174Savos 716292167Savos URTWN_NT_LOCK_DESTROY(sc); 717292174Savos URTWN_CMDQ_LOCK_DESTROY(sc); 718251538Srpaulo mtx_destroy(&sc->sc_mtx); 719251538Srpaulo 720251538Srpaulo return (0); 721251538Srpaulo} 722251538Srpaulo 723251538Srpaulostatic void 724289066Skevlourtwn_drain_mbufq(struct urtwn_softc *sc) 725251538Srpaulo{ 726289066Skevlo struct mbuf *m; 727289066Skevlo struct ieee80211_node *ni; 728289066Skevlo URTWN_ASSERT_LOCKED(sc); 729289066Skevlo while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 730289066Skevlo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 731289066Skevlo m->m_pkthdr.rcvif = NULL; 732289066Skevlo ieee80211_free_node(ni); 733289066Skevlo m_freem(m); 734251538Srpaulo } 735251538Srpaulo} 736251538Srpaulo 737251538Srpaulostatic usb_error_t 738251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 739251538Srpaulo void *data) 740251538Srpaulo{ 741251538Srpaulo usb_error_t err; 742251538Srpaulo int ntries = 10; 743251538Srpaulo 744251538Srpaulo URTWN_ASSERT_LOCKED(sc); 745251538Srpaulo 746251538Srpaulo while (ntries--) { 747251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 748251538Srpaulo req, data, 0, NULL, 250 /* ms */); 749251538Srpaulo if (err == 0) 750251538Srpaulo break; 751251538Srpaulo 752294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_USB, 753294471Savos "%s: control request failed, %s (retries left: %d)\n", 754294471Savos __func__, usbd_errstr(err), ntries); 755251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 756251538Srpaulo } 757251538Srpaulo return (err); 758251538Srpaulo} 759251538Srpaulo 760251538Srpaulostatic struct ieee80211vap * 761251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 762251538Srpaulo enum ieee80211_opmode opmode, int flags, 763251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 764251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 765251538Srpaulo{ 766290631Savos struct urtwn_softc *sc = ic->ic_softc; 767251538Srpaulo struct urtwn_vap *uvp; 768251538Srpaulo struct ieee80211vap *vap; 769251538Srpaulo 770251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 771251538Srpaulo return (NULL); 772251538Srpaulo 773287197Sglebius uvp = malloc(sizeof(struct urtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); 774251538Srpaulo vap = &uvp->vap; 775251538Srpaulo /* enable s/w bmiss handling for sta mode */ 776251538Srpaulo 777281069Srpaulo if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 778287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 779257743Shselasky /* out of memory */ 780257743Shselasky free(uvp, M_80211_VAP); 781257743Shselasky return (NULL); 782257743Shselasky } 783257743Shselasky 784290651Savos if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) 785290631Savos urtwn_init_beacon(sc, uvp); 786290631Savos 787251538Srpaulo /* override state transition machine */ 788251538Srpaulo uvp->newstate = vap->iv_newstate; 789251538Srpaulo vap->iv_newstate = urtwn_newstate; 790290631Savos vap->iv_update_beacon = urtwn_update_beacon; 791292175Savos vap->iv_key_alloc = urtwn_key_alloc; 792292175Savos vap->iv_key_set = urtwn_key_set; 793292175Savos vap->iv_key_delete = urtwn_key_delete; 794290651Savos if (opmode == IEEE80211_M_IBSS) { 795290651Savos uvp->recv_mgmt = vap->iv_recv_mgmt; 796290651Savos vap->iv_recv_mgmt = urtwn_ibss_recv_mgmt; 797290651Savos TASK_INIT(&uvp->tsf_task_adhoc, 0, urtwn_tsf_task_adhoc, vap); 798290651Savos } 799251538Srpaulo 800292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 801292167Savos ieee80211_ratectl_init(vap); 802251538Srpaulo /* complete setup */ 803251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 804287197Sglebius ieee80211_media_status, mac); 805251538Srpaulo ic->ic_opmode = opmode; 806251538Srpaulo return (vap); 807251538Srpaulo} 808251538Srpaulo 809251538Srpaulostatic void 810251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 811251538Srpaulo{ 812290651Savos struct ieee80211com *ic = vap->iv_ic; 813292167Savos struct urtwn_softc *sc = ic->ic_softc; 814251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 815251538Srpaulo 816290651Savos if (uvp->bcn_mbuf != NULL) 817290651Savos m_freem(uvp->bcn_mbuf); 818290651Savos if (vap->iv_opmode == IEEE80211_M_IBSS) 819290651Savos ieee80211_draintask(ic, &uvp->tsf_task_adhoc); 820292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 821292167Savos ieee80211_ratectl_deinit(vap); 822251538Srpaulo ieee80211_vap_detach(vap); 823251538Srpaulo free(uvp, M_80211_VAP); 824251538Srpaulo} 825251538Srpaulo 826251538Srpaulostatic struct mbuf * 827292207Savosurtwn_rx_copy_to_mbuf(struct urtwn_softc *sc, struct r92c_rx_stat *stat, 828292207Savos int totlen) 829251538Srpaulo{ 830287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 831251538Srpaulo struct mbuf *m; 832292207Savos uint32_t rxdw0; 833292207Savos int pktlen; 834251538Srpaulo 835251538Srpaulo /* 836251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 837251538Srpaulo * RUNNING. 838251538Srpaulo */ 839287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) 840251538Srpaulo return (NULL); 841251538Srpaulo 842251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 843251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 844251538Srpaulo /* 845251538Srpaulo * This should not happen since we setup our Rx filter 846251538Srpaulo * to not receive these frames. 847251538Srpaulo */ 848294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 849294471Savos "%s: RX flags error (%s)\n", __func__, 850292207Savos rxdw0 & R92C_RXDW0_CRCERR ? "CRC" : "ICV"); 851292207Savos goto fail; 852251538Srpaulo } 853292207Savos 854292207Savos pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 855292207Savos if (pktlen < sizeof(struct ieee80211_frame_ack)) { 856294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 857294471Savos "%s: frame is too short: %d\n", __func__, pktlen); 858292207Savos goto fail; 859271303Skevlo } 860251538Srpaulo 861292207Savos if (__predict_false(totlen > MCLBYTES)) { 862292207Savos /* convert to m_getjcl if this happens */ 863292207Savos device_printf(sc->sc_dev, "%s: frame too long: %d (%d)\n", 864292207Savos __func__, pktlen, totlen); 865292207Savos goto fail; 866251538Srpaulo } 867251538Srpaulo 868260463Skevlo m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 869292207Savos if (__predict_false(m == NULL)) { 870292207Savos device_printf(sc->sc_dev, "%s: could not allocate RX mbuf\n", 871292207Savos __func__); 872292207Savos goto fail; 873251538Srpaulo } 874251538Srpaulo 875251538Srpaulo /* Finalize mbuf. */ 876292207Savos memcpy(mtod(m, uint8_t *), (uint8_t *)stat, totlen); 877292207Savos m->m_pkthdr.len = m->m_len = totlen; 878292207Savos 879251538Srpaulo return (m); 880292207Savosfail: 881292207Savos counter_u64_add(ic->ic_ierrors, 1); 882292207Savos return (NULL); 883251538Srpaulo} 884251538Srpaulo 885251538Srpaulostatic struct mbuf * 886292207Savosurtwn_report_intr(struct usb_xfer *xfer, struct urtwn_data *data) 887251538Srpaulo{ 888251538Srpaulo struct urtwn_softc *sc = data->sc; 889287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 890251538Srpaulo struct r92c_rx_stat *stat; 891251538Srpaulo uint8_t *buf; 892292167Savos int len; 893251538Srpaulo 894251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 895251538Srpaulo 896251538Srpaulo if (len < sizeof(*stat)) { 897287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 898251538Srpaulo return (NULL); 899251538Srpaulo } 900251538Srpaulo 901251538Srpaulo buf = data->buf; 902292167Savos stat = (struct r92c_rx_stat *)buf; 903292167Savos 904297596Sadrian /* 905297596Sadrian * For 88E chips we can tie the FF flushing here; 906297596Sadrian * this is where we do know exactly how deep the 907297596Sadrian * transmit queue is. 908297596Sadrian * 909297596Sadrian * But it won't work for R92 chips, so we can't 910297596Sadrian * take the easy way out. 911297596Sadrian */ 912297596Sadrian 913292167Savos if (sc->chip & URTWN_CHIP_88E) { 914292167Savos int report_sel = MS(le32toh(stat->rxdw3), R88E_RXDW3_RPT); 915292167Savos 916292167Savos switch (report_sel) { 917292167Savos case R88E_RXDW3_RPT_RX: 918292207Savos return (urtwn_rxeof(sc, buf, len)); 919292167Savos case R88E_RXDW3_RPT_TX1: 920292167Savos urtwn_r88e_ratectl_tx_complete(sc, &stat[1]); 921292167Savos break; 922292167Savos default: 923294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, 924294471Savos "%s: case %d was not handled\n", __func__, 925294471Savos report_sel); 926292167Savos break; 927292167Savos } 928292167Savos } else 929292207Savos return (urtwn_rxeof(sc, buf, len)); 930292167Savos 931292167Savos return (NULL); 932292167Savos} 933292167Savos 934292167Savosstatic struct mbuf * 935292207Savosurtwn_rxeof(struct urtwn_softc *sc, uint8_t *buf, int len) 936292167Savos{ 937292167Savos struct r92c_rx_stat *stat; 938292167Savos struct mbuf *m, *m0 = NULL, *prevm = NULL; 939292167Savos uint32_t rxdw0; 940292167Savos int totlen, pktlen, infosz, npkts; 941292167Savos 942251538Srpaulo /* Get the number of encapsulated frames. */ 943251538Srpaulo stat = (struct r92c_rx_stat *)buf; 944251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 945294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RECV, 946294471Savos "%s: Rx %d frames in one chunk\n", __func__, npkts); 947251538Srpaulo 948251538Srpaulo /* Process all of them. */ 949251538Srpaulo while (npkts-- > 0) { 950251538Srpaulo if (len < sizeof(*stat)) 951251538Srpaulo break; 952251538Srpaulo stat = (struct r92c_rx_stat *)buf; 953251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 954251538Srpaulo 955251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 956251538Srpaulo if (pktlen == 0) 957251538Srpaulo break; 958251538Srpaulo 959251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 960251538Srpaulo 961251538Srpaulo /* Make sure everything fits in xfer. */ 962251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 963251538Srpaulo if (totlen > len) 964251538Srpaulo break; 965251538Srpaulo 966292207Savos m = urtwn_rx_copy_to_mbuf(sc, stat, totlen); 967251538Srpaulo if (m0 == NULL) 968251538Srpaulo m0 = m; 969251538Srpaulo if (prevm == NULL) 970251538Srpaulo prevm = m; 971251538Srpaulo else { 972251538Srpaulo prevm->m_next = m; 973251538Srpaulo prevm = m; 974251538Srpaulo } 975251538Srpaulo 976251538Srpaulo /* Next chunk is 128-byte aligned. */ 977251538Srpaulo totlen = (totlen + 127) & ~127; 978251538Srpaulo buf += totlen; 979251538Srpaulo len -= totlen; 980251538Srpaulo } 981251538Srpaulo 982251538Srpaulo return (m0); 983251538Srpaulo} 984251538Srpaulo 985251538Srpaulostatic void 986292167Savosurtwn_r88e_ratectl_tx_complete(struct urtwn_softc *sc, void *arg) 987292167Savos{ 988292167Savos struct r88e_tx_rpt_ccx *rpt = arg; 989292167Savos struct ieee80211vap *vap; 990292167Savos struct ieee80211_node *ni; 991292167Savos uint8_t macid; 992292167Savos int ntries; 993292167Savos 994292167Savos macid = MS(rpt->rptb1, R88E_RPTB1_MACID); 995292167Savos ntries = MS(rpt->rptb2, R88E_RPTB2_RETRY_CNT); 996292167Savos 997292167Savos URTWN_NT_LOCK(sc); 998292167Savos ni = sc->node_list[macid]; 999292167Savos if (ni != NULL) { 1000292167Savos vap = ni->ni_vap; 1001294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: frame for macid %d was" 1002294471Savos "%s sent (%d retries)\n", __func__, macid, 1003294471Savos (rpt->rptb1 & R88E_RPTB1_PKT_OK) ? "" : " not", 1004294471Savos ntries); 1005292167Savos 1006292167Savos if (rpt->rptb1 & R88E_RPTB1_PKT_OK) { 1007292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1008292167Savos IEEE80211_RATECTL_TX_SUCCESS, &ntries, NULL); 1009292167Savos } else { 1010292167Savos ieee80211_ratectl_tx_complete(vap, ni, 1011292167Savos IEEE80211_RATECTL_TX_FAILURE, &ntries, NULL); 1012292167Savos } 1013294471Savos } else { 1014294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_INTR, "%s: macid %d, ni is NULL\n", 1015294471Savos __func__, macid); 1016294471Savos } 1017292167Savos URTWN_NT_UNLOCK(sc); 1018292167Savos} 1019292167Savos 1020292207Savosstatic struct ieee80211_node * 1021292207Savosurtwn_rx_frame(struct urtwn_softc *sc, struct mbuf *m, int8_t *rssi_p) 1022292207Savos{ 1023292207Savos struct ieee80211com *ic = &sc->sc_ic; 1024292207Savos struct ieee80211_frame_min *wh; 1025292207Savos struct r92c_rx_stat *stat; 1026292207Savos uint32_t rxdw0, rxdw3; 1027292207Savos uint8_t rate, cipher; 1028292207Savos int8_t rssi = URTWN_NOISE_FLOOR + 1; 1029292207Savos int infosz; 1030292207Savos 1031292207Savos stat = mtod(m, struct r92c_rx_stat *); 1032292207Savos rxdw0 = le32toh(stat->rxdw0); 1033292207Savos rxdw3 = le32toh(stat->rxdw3); 1034292207Savos 1035292207Savos rate = MS(rxdw3, R92C_RXDW3_RATE); 1036292207Savos cipher = MS(rxdw0, R92C_RXDW0_CIPHER); 1037292207Savos infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 1038292207Savos 1039292207Savos /* Get RSSI from PHY status descriptor if present. */ 1040292207Savos if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 1041292207Savos if (sc->chip & URTWN_CHIP_88E) 1042292207Savos rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]); 1043292207Savos else 1044292207Savos rssi = urtwn_get_rssi(sc, rate, &stat[1]); 1045292207Savos /* Update our average RSSI. */ 1046292207Savos urtwn_update_avgrssi(sc, rate, rssi); 1047292207Savos } 1048292207Savos 1049292207Savos if (ieee80211_radiotap_active(ic)) { 1050292207Savos struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 1051292207Savos 1052292207Savos tap->wr_flags = 0; 1053292207Savos 1054292207Savos urtwn_get_tsf(sc, &tap->wr_tsft); 1055292207Savos if (__predict_false(le32toh((uint32_t)tap->wr_tsft) < 1056292207Savos le32toh(stat->rxdw5))) { 1057292207Savos tap->wr_tsft = le32toh(tap->wr_tsft >> 32) - 1; 1058292207Savos tap->wr_tsft = (uint64_t)htole32(tap->wr_tsft) << 32; 1059292207Savos } else 1060292207Savos tap->wr_tsft &= 0xffffffff00000000; 1061292207Savos tap->wr_tsft += stat->rxdw5; 1062292207Savos 1063297175Sadrian /* XXX 20/40? */ 1064297175Sadrian /* XXX shortgi? */ 1065297175Sadrian 1066292207Savos /* Map HW rate index to 802.11 rate. */ 1067292207Savos if (!(rxdw3 & R92C_RXDW3_HT)) { 1068292207Savos tap->wr_rate = ridx2rate[rate]; 1069292207Savos } else if (rate >= 12) { /* MCS0~15. */ 1070292207Savos /* Bit 7 set means HT MCS instead of rate. */ 1071292207Savos tap->wr_rate = 0x80 | (rate - 12); 1072292207Savos } 1073292207Savos tap->wr_dbm_antsignal = rssi; 1074292207Savos tap->wr_dbm_antnoise = URTWN_NOISE_FLOOR; 1075292207Savos } 1076292207Savos 1077292207Savos *rssi_p = rssi; 1078292207Savos 1079292207Savos /* Drop descriptor. */ 1080292207Savos m_adj(m, sizeof(*stat) + infosz); 1081292207Savos wh = mtod(m, struct ieee80211_frame_min *); 1082292207Savos 1083292207Savos if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) && 1084292207Savos cipher != R92C_CAM_ALGO_NONE) { 1085292207Savos m->m_flags |= M_WEP; 1086292207Savos } 1087292207Savos 1088292207Savos if (m->m_len >= sizeof(*wh)) 1089292207Savos return (ieee80211_find_rxnode(ic, wh)); 1090292207Savos 1091292207Savos return (NULL); 1092292207Savos} 1093292207Savos 1094292167Savosstatic void 1095251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 1096251538Srpaulo{ 1097251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1098287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1099251538Srpaulo struct ieee80211_node *ni; 1100251538Srpaulo struct mbuf *m = NULL, *next; 1101251538Srpaulo struct urtwn_data *data; 1102292207Savos int8_t nf, rssi; 1103251538Srpaulo 1104251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1105251538Srpaulo 1106251538Srpaulo switch (USB_GET_STATE(xfer)) { 1107251538Srpaulo case USB_ST_TRANSFERRED: 1108251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1109251538Srpaulo if (data == NULL) 1110251538Srpaulo goto tr_setup; 1111251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1112292207Savos m = urtwn_report_intr(xfer, data); 1113251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1114251538Srpaulo /* FALLTHROUGH */ 1115251538Srpaulo case USB_ST_SETUP: 1116251538Srpaulotr_setup: 1117251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 1118251538Srpaulo if (data == NULL) { 1119251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 1120297596Sadrian goto finish; 1121251538Srpaulo } 1122251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 1123251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 1124251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 1125251538Srpaulo usbd_xfer_max_len(xfer)); 1126251538Srpaulo usbd_transfer_submit(xfer); 1127251538Srpaulo 1128251538Srpaulo /* 1129251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 1130251538Srpaulo * ieee80211_input() because here is at the end of a USB 1131251538Srpaulo * callback and safe to unlock. 1132251538Srpaulo */ 1133251538Srpaulo while (m != NULL) { 1134251538Srpaulo next = m->m_next; 1135251538Srpaulo m->m_next = NULL; 1136292207Savos 1137292207Savos ni = urtwn_rx_frame(sc, m, &rssi); 1138292207Savos URTWN_UNLOCK(sc); 1139292207Savos 1140251538Srpaulo nf = URTWN_NOISE_FLOOR; 1141251538Srpaulo if (ni != NULL) { 1142297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 1143297175Sadrian m->m_flags |= M_AMPDU; 1144289799Savos (void)ieee80211_input(ni, m, rssi - nf, nf); 1145251538Srpaulo ieee80211_free_node(ni); 1146289799Savos } else { 1147289799Savos (void)ieee80211_input_all(ic, m, rssi - nf, 1148289799Savos nf); 1149289799Savos } 1150292207Savos URTWN_LOCK(sc); 1151251538Srpaulo m = next; 1152251538Srpaulo } 1153251538Srpaulo break; 1154251538Srpaulo default: 1155251538Srpaulo /* needs it to the inactive queue due to a error. */ 1156251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1157251538Srpaulo if (data != NULL) { 1158251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1159251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1160251538Srpaulo } 1161251538Srpaulo if (error != USB_ERR_CANCELLED) { 1162251538Srpaulo usbd_xfer_set_stall(xfer); 1163287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1164251538Srpaulo goto tr_setup; 1165251538Srpaulo } 1166251538Srpaulo break; 1167251538Srpaulo } 1168297596Sadrianfinish: 1169297596Sadrian /* Finished receive; age anything left on the FF queue by a little bump */ 1170297596Sadrian /* 1171297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1172297596Sadrian * flush the FF staging queue if we're approaching idle. 1173297596Sadrian */ 1174297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1175297596Sadrian URTWN_UNLOCK(sc); 1176297596Sadrian ieee80211_ff_age_all(ic, 1); 1177297596Sadrian URTWN_LOCK(sc); 1178297596Sadrian#endif 1179297596Sadrian 1180297596Sadrian /* Kick-start more transmit in case we stalled */ 1181297596Sadrian urtwn_start(sc); 1182251538Srpaulo} 1183251538Srpaulo 1184251538Srpaulostatic void 1185289891Savosurtwn_txeof(struct urtwn_softc *sc, struct urtwn_data *data, int status) 1186251538Srpaulo{ 1187251538Srpaulo 1188251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1189289891Savos 1190290631Savos if (data->ni != NULL) /* not a beacon frame */ 1191290631Savos ieee80211_tx_complete(data->ni, data->m, status); 1192289891Savos 1193297596Sadrian if (sc->sc_tx_n_active > 0) 1194297596Sadrian sc->sc_tx_n_active--; 1195297596Sadrian 1196287197Sglebius data->ni = NULL; 1197287197Sglebius data->m = NULL; 1198289891Savos 1199251538Srpaulo sc->sc_txtimer = 0; 1200289891Savos 1201289891Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1202251538Srpaulo} 1203251538Srpaulo 1204289066Skevlostatic int 1205289066Skevlourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 1206289066Skevlo int ndata, int maxsz) 1207289066Skevlo{ 1208289066Skevlo int i, error; 1209289066Skevlo 1210289066Skevlo for (i = 0; i < ndata; i++) { 1211289066Skevlo struct urtwn_data *dp = &data[i]; 1212289066Skevlo dp->sc = sc; 1213289066Skevlo dp->m = NULL; 1214289066Skevlo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1215289066Skevlo if (dp->buf == NULL) { 1216289066Skevlo device_printf(sc->sc_dev, 1217289066Skevlo "could not allocate buffer\n"); 1218289066Skevlo error = ENOMEM; 1219289066Skevlo goto fail; 1220289066Skevlo } 1221289066Skevlo dp->ni = NULL; 1222289066Skevlo } 1223289066Skevlo 1224289066Skevlo return (0); 1225289066Skevlofail: 1226289066Skevlo urtwn_free_list(sc, data, ndata); 1227289066Skevlo return (error); 1228289066Skevlo} 1229289066Skevlo 1230289066Skevlostatic int 1231289066Skevlourtwn_alloc_rx_list(struct urtwn_softc *sc) 1232289066Skevlo{ 1233289066Skevlo int error, i; 1234289066Skevlo 1235289066Skevlo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 1236289066Skevlo URTWN_RXBUFSZ); 1237289066Skevlo if (error != 0) 1238289066Skevlo return (error); 1239289066Skevlo 1240289066Skevlo STAILQ_INIT(&sc->sc_rx_active); 1241289066Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 1242289066Skevlo 1243289066Skevlo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 1244289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1245289066Skevlo 1246289066Skevlo return (0); 1247289066Skevlo} 1248289066Skevlo 1249289066Skevlostatic int 1250289066Skevlourtwn_alloc_tx_list(struct urtwn_softc *sc) 1251289066Skevlo{ 1252289066Skevlo int error, i; 1253289066Skevlo 1254289066Skevlo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 1255289066Skevlo URTWN_TXBUFSZ); 1256289066Skevlo if (error != 0) 1257289066Skevlo return (error); 1258289066Skevlo 1259289066Skevlo STAILQ_INIT(&sc->sc_tx_active); 1260289066Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 1261289066Skevlo STAILQ_INIT(&sc->sc_tx_pending); 1262289066Skevlo 1263289066Skevlo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 1264289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 1265289066Skevlo 1266289066Skevlo return (0); 1267289066Skevlo} 1268289066Skevlo 1269251538Srpaulostatic void 1270289066Skevlourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 1271289066Skevlo{ 1272289066Skevlo int i; 1273289066Skevlo 1274289066Skevlo for (i = 0; i < ndata; i++) { 1275289066Skevlo struct urtwn_data *dp = &data[i]; 1276289066Skevlo 1277289066Skevlo if (dp->buf != NULL) { 1278289066Skevlo free(dp->buf, M_USBDEV); 1279289066Skevlo dp->buf = NULL; 1280289066Skevlo } 1281289066Skevlo if (dp->ni != NULL) { 1282289066Skevlo ieee80211_free_node(dp->ni); 1283289066Skevlo dp->ni = NULL; 1284289066Skevlo } 1285289066Skevlo } 1286289066Skevlo} 1287289066Skevlo 1288289066Skevlostatic void 1289289066Skevlourtwn_free_rx_list(struct urtwn_softc *sc) 1290289066Skevlo{ 1291289066Skevlo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 1292289066Skevlo} 1293289066Skevlo 1294289066Skevlostatic void 1295289066Skevlourtwn_free_tx_list(struct urtwn_softc *sc) 1296289066Skevlo{ 1297289066Skevlo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 1298289066Skevlo} 1299289066Skevlo 1300289066Skevlostatic void 1301251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 1302251538Srpaulo{ 1303251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1304297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1305297596Sadrian struct ieee80211com *ic = &sc->sc_ic; 1306297596Sadrian#endif 1307251538Srpaulo struct urtwn_data *data; 1308251538Srpaulo 1309251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1310251538Srpaulo 1311251538Srpaulo switch (USB_GET_STATE(xfer)){ 1312251538Srpaulo case USB_ST_TRANSFERRED: 1313251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1314251538Srpaulo if (data == NULL) 1315251538Srpaulo goto tr_setup; 1316251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1317289891Savos urtwn_txeof(sc, data, 0); 1318251538Srpaulo /* FALLTHROUGH */ 1319251538Srpaulo case USB_ST_SETUP: 1320251538Srpaulotr_setup: 1321251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 1322251538Srpaulo if (data == NULL) { 1323294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1324294471Savos "%s: empty pending queue\n", __func__); 1325297596Sadrian sc->sc_tx_n_active = 0; 1326288353Sadrian goto finish; 1327251538Srpaulo } 1328251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1329251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1330251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1331251538Srpaulo usbd_transfer_submit(xfer); 1332297596Sadrian sc->sc_tx_n_active++; 1333251538Srpaulo break; 1334251538Srpaulo default: 1335251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1336251538Srpaulo if (data == NULL) 1337251538Srpaulo goto tr_setup; 1338289891Savos STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1339289891Savos urtwn_txeof(sc, data, 1); 1340251538Srpaulo if (error != USB_ERR_CANCELLED) { 1341251538Srpaulo usbd_xfer_set_stall(xfer); 1342251538Srpaulo goto tr_setup; 1343251538Srpaulo } 1344251538Srpaulo break; 1345251538Srpaulo } 1346288353Sadrianfinish: 1347297596Sadrian#ifdef IEEE80211_SUPPORT_SUPERG 1348297596Sadrian /* 1349297596Sadrian * If the TX active queue drops below a certain 1350297596Sadrian * threshold, ensure we age fast-frames out so they're 1351297596Sadrian * transmitted. 1352297596Sadrian */ 1353297596Sadrian if (sc->sc_tx_n_active <= 1) { 1354297596Sadrian /* XXX ew - net80211 should defer this for us! */ 1355297596Sadrian 1356297596Sadrian /* 1357297596Sadrian * Note: this sc_tx_n_active currently tracks 1358297596Sadrian * the number of pending transmit submissions 1359297596Sadrian * and not the actual depth of the TX frames 1360297596Sadrian * pending to the hardware. That means that 1361297596Sadrian * we're going to end up with some sub-optimal 1362297596Sadrian * aggregation behaviour. 1363297596Sadrian */ 1364297596Sadrian /* 1365297596Sadrian * XXX TODO: just make this a callout timer schedule so we can 1366297596Sadrian * flush the FF staging queue if we're approaching idle. 1367297596Sadrian */ 1368297596Sadrian URTWN_UNLOCK(sc); 1369297596Sadrian ieee80211_ff_flush(ic, WME_AC_VO); 1370297596Sadrian ieee80211_ff_flush(ic, WME_AC_VI); 1371297596Sadrian ieee80211_ff_flush(ic, WME_AC_BE); 1372297596Sadrian ieee80211_ff_flush(ic, WME_AC_BK); 1373297596Sadrian URTWN_LOCK(sc); 1374297596Sadrian } 1375297596Sadrian#endif 1376288353Sadrian /* Kick-start more transmit */ 1377288353Sadrian urtwn_start(sc); 1378251538Srpaulo} 1379251538Srpaulo 1380251538Srpaulostatic struct urtwn_data * 1381251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 1382251538Srpaulo{ 1383251538Srpaulo struct urtwn_data *bf; 1384251538Srpaulo 1385251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 1386251538Srpaulo if (bf != NULL) 1387251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 1388294471Savos else { 1389294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, 1390294471Savos "%s: out of xmit buffers\n", __func__); 1391294471Savos } 1392251538Srpaulo return (bf); 1393251538Srpaulo} 1394251538Srpaulo 1395251538Srpaulostatic struct urtwn_data * 1396251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 1397251538Srpaulo{ 1398251538Srpaulo struct urtwn_data *bf; 1399251538Srpaulo 1400251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1401251538Srpaulo 1402251538Srpaulo bf = _urtwn_getbuf(sc); 1403294471Savos if (bf == NULL) { 1404294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: stop queue\n", 1405294471Savos __func__); 1406294471Savos } 1407251538Srpaulo return (bf); 1408251538Srpaulo} 1409251538Srpaulo 1410291698Savosstatic usb_error_t 1411251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1412251538Srpaulo int len) 1413251538Srpaulo{ 1414251538Srpaulo usb_device_request_t req; 1415251538Srpaulo 1416251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1417251538Srpaulo req.bRequest = R92C_REQ_REGS; 1418251538Srpaulo USETW(req.wValue, addr); 1419251538Srpaulo USETW(req.wIndex, 0); 1420251538Srpaulo USETW(req.wLength, len); 1421251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1422251538Srpaulo} 1423251538Srpaulo 1424291698Savosstatic usb_error_t 1425251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 1426251538Srpaulo{ 1427291698Savos return (urtwn_write_region_1(sc, addr, &val, sizeof(val))); 1428251538Srpaulo} 1429251538Srpaulo 1430291698Savosstatic usb_error_t 1431251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 1432251538Srpaulo{ 1433251538Srpaulo val = htole16(val); 1434291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1435251538Srpaulo} 1436251538Srpaulo 1437291698Savosstatic usb_error_t 1438251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 1439251538Srpaulo{ 1440251538Srpaulo val = htole32(val); 1441291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1442251538Srpaulo} 1443251538Srpaulo 1444291698Savosstatic usb_error_t 1445251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1446251538Srpaulo int len) 1447251538Srpaulo{ 1448251538Srpaulo usb_device_request_t req; 1449251538Srpaulo 1450251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 1451251538Srpaulo req.bRequest = R92C_REQ_REGS; 1452251538Srpaulo USETW(req.wValue, addr); 1453251538Srpaulo USETW(req.wIndex, 0); 1454251538Srpaulo USETW(req.wLength, len); 1455251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1456251538Srpaulo} 1457251538Srpaulo 1458251538Srpaulostatic uint8_t 1459251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 1460251538Srpaulo{ 1461251538Srpaulo uint8_t val; 1462251538Srpaulo 1463251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 1464251538Srpaulo return (0xff); 1465251538Srpaulo return (val); 1466251538Srpaulo} 1467251538Srpaulo 1468251538Srpaulostatic uint16_t 1469251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 1470251538Srpaulo{ 1471251538Srpaulo uint16_t val; 1472251538Srpaulo 1473251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 1474251538Srpaulo return (0xffff); 1475251538Srpaulo return (le16toh(val)); 1476251538Srpaulo} 1477251538Srpaulo 1478251538Srpaulostatic uint32_t 1479251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 1480251538Srpaulo{ 1481251538Srpaulo uint32_t val; 1482251538Srpaulo 1483251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 1484251538Srpaulo return (0xffffffff); 1485251538Srpaulo return (le32toh(val)); 1486251538Srpaulo} 1487251538Srpaulo 1488251538Srpaulostatic int 1489251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1490251538Srpaulo{ 1491251538Srpaulo struct r92c_fw_cmd cmd; 1492291698Savos usb_error_t error; 1493251538Srpaulo int ntries; 1494251538Srpaulo 1495295871Savos if (!(sc->sc_flags & URTWN_FW_LOADED)) { 1496295871Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, "%s: firmware " 1497295871Savos "was not loaded; command (id %d) will be discarded\n", 1498295871Savos __func__, id); 1499295871Savos return (0); 1500295871Savos } 1501295871Savos 1502251538Srpaulo /* Wait for current FW box to be empty. */ 1503251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1504251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1505251538Srpaulo break; 1506266472Shselasky urtwn_ms_delay(sc); 1507251538Srpaulo } 1508251538Srpaulo if (ntries == 100) { 1509251538Srpaulo device_printf(sc->sc_dev, 1510251538Srpaulo "could not send firmware command\n"); 1511251538Srpaulo return (ETIMEDOUT); 1512251538Srpaulo } 1513251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1514251538Srpaulo cmd.id = id; 1515251538Srpaulo if (len > 3) 1516251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1517251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1518251538Srpaulo memcpy(cmd.msg, buf, len); 1519251538Srpaulo 1520251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1521291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1522251538Srpaulo (uint8_t *)&cmd + 4, 2); 1523291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1524291698Savos return (EIO); 1525291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1526251538Srpaulo (uint8_t *)&cmd + 0, 4); 1527291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1528291698Savos return (EIO); 1529251538Srpaulo 1530251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1531251538Srpaulo return (0); 1532251538Srpaulo} 1533251538Srpaulo 1534292174Savosstatic void 1535292174Savosurtwn_cmdq_cb(void *arg, int pending) 1536292174Savos{ 1537292174Savos struct urtwn_softc *sc = arg; 1538292174Savos struct urtwn_cmdq *item; 1539292174Savos 1540292174Savos /* 1541292174Savos * Device must be powered on (via urtwn_power_on()) 1542292174Savos * before any command may be sent. 1543292174Savos */ 1544292174Savos URTWN_LOCK(sc); 1545292174Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 1546292174Savos URTWN_UNLOCK(sc); 1547292174Savos return; 1548292174Savos } 1549292174Savos 1550292174Savos URTWN_CMDQ_LOCK(sc); 1551292174Savos while (sc->cmdq[sc->cmdq_first].func != NULL) { 1552292174Savos item = &sc->cmdq[sc->cmdq_first]; 1553292174Savos sc->cmdq_first = (sc->cmdq_first + 1) % URTWN_CMDQ_SIZE; 1554292174Savos URTWN_CMDQ_UNLOCK(sc); 1555292174Savos 1556292174Savos item->func(sc, &item->data); 1557292174Savos 1558292174Savos URTWN_CMDQ_LOCK(sc); 1559292174Savos memset(item, 0, sizeof (*item)); 1560292174Savos } 1561292174Savos URTWN_CMDQ_UNLOCK(sc); 1562292174Savos URTWN_UNLOCK(sc); 1563292174Savos} 1564292174Savos 1565292174Savosstatic int 1566292174Savosurtwn_cmd_sleepable(struct urtwn_softc *sc, const void *ptr, size_t len, 1567292174Savos CMD_FUNC_PROTO) 1568292174Savos{ 1569292174Savos struct ieee80211com *ic = &sc->sc_ic; 1570292174Savos 1571292174Savos KASSERT(len <= sizeof(union sec_param), ("buffer overflow")); 1572292174Savos 1573292174Savos URTWN_CMDQ_LOCK(sc); 1574292174Savos if (sc->cmdq[sc->cmdq_last].func != NULL) { 1575292174Savos device_printf(sc->sc_dev, "%s: cmdq overflow\n", __func__); 1576292174Savos URTWN_CMDQ_UNLOCK(sc); 1577292174Savos 1578292174Savos return (EAGAIN); 1579292174Savos } 1580292174Savos 1581292174Savos if (ptr != NULL) 1582292174Savos memcpy(&sc->cmdq[sc->cmdq_last].data, ptr, len); 1583292174Savos sc->cmdq[sc->cmdq_last].func = func; 1584292174Savos sc->cmdq_last = (sc->cmdq_last + 1) % URTWN_CMDQ_SIZE; 1585292174Savos URTWN_CMDQ_UNLOCK(sc); 1586292174Savos 1587292174Savos ieee80211_runtask(ic, &sc->cmdq_task); 1588292174Savos 1589292174Savos return (0); 1590292174Savos} 1591292174Savos 1592264912Skevlostatic __inline void 1593251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1594251538Srpaulo{ 1595264912Skevlo 1596264912Skevlo sc->sc_rf_write(sc, chain, addr, val); 1597264912Skevlo} 1598264912Skevlo 1599264912Skevlostatic void 1600264912Skevlourtwn_r92c_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1601264912Skevlo uint32_t val) 1602264912Skevlo{ 1603251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1604251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1605251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1606251538Srpaulo} 1607251538Srpaulo 1608264912Skevlostatic void 1609264912Skevlourtwn_r88e_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1610264912Skevlouint32_t val) 1611264912Skevlo{ 1612264912Skevlo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1613264912Skevlo SM(R88E_LSSI_PARAM_ADDR, addr) | 1614264912Skevlo SM(R92C_LSSI_PARAM_DATA, val)); 1615264912Skevlo} 1616264912Skevlo 1617251538Srpaulostatic uint32_t 1618251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1619251538Srpaulo{ 1620251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1621251538Srpaulo 1622251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1623251538Srpaulo if (chain != 0) 1624251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1625251538Srpaulo 1626251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1627251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1628266472Shselasky urtwn_ms_delay(sc); 1629251538Srpaulo 1630251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1631251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1632251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1633266472Shselasky urtwn_ms_delay(sc); 1634251538Srpaulo 1635251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1636251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1637266472Shselasky urtwn_ms_delay(sc); 1638251538Srpaulo 1639251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1640251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1641251538Srpaulo else 1642251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1643251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1644251538Srpaulo} 1645251538Srpaulo 1646251538Srpaulostatic int 1647251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1648251538Srpaulo{ 1649291698Savos usb_error_t error; 1650251538Srpaulo int ntries; 1651251538Srpaulo 1652291698Savos error = urtwn_write_4(sc, R92C_LLT_INIT, 1653251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1654251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1655251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1656291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1657291698Savos return (EIO); 1658251538Srpaulo /* Wait for write operation to complete. */ 1659251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1660251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1661251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1662251538Srpaulo return (0); 1663266472Shselasky urtwn_ms_delay(sc); 1664251538Srpaulo } 1665251538Srpaulo return (ETIMEDOUT); 1666251538Srpaulo} 1667251538Srpaulo 1668291264Savosstatic int 1669291264Savosurtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val) 1670251538Srpaulo{ 1671251538Srpaulo uint32_t reg; 1672291698Savos usb_error_t error; 1673251538Srpaulo int ntries; 1674251538Srpaulo 1675291264Savos if (sc->last_rom_addr >= URTWN_EFUSE_MAX_LEN) 1676291264Savos return (EFAULT); 1677291264Savos 1678251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1679291264Savos reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 1680251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1681291264Savos 1682291698Savos error = urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1683291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1684291698Savos return (EIO); 1685251538Srpaulo /* Wait for read operation to complete. */ 1686251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1687251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1688251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1689291264Savos break; 1690266472Shselasky urtwn_ms_delay(sc); 1691251538Srpaulo } 1692291264Savos if (ntries == 100) { 1693291264Savos device_printf(sc->sc_dev, 1694291264Savos "could not read efuse byte at address 0x%x\n", 1695291264Savos sc->last_rom_addr); 1696291264Savos return (ETIMEDOUT); 1697291264Savos } 1698291264Savos 1699291264Savos *val = MS(reg, R92C_EFUSE_CTRL_DATA); 1700291264Savos sc->last_rom_addr++; 1701291264Savos 1702291264Savos return (0); 1703251538Srpaulo} 1704251538Srpaulo 1705291264Savosstatic int 1706291264Savosurtwn_efuse_read_data(struct urtwn_softc *sc, uint8_t *rom, uint8_t off, 1707291264Savos uint8_t msk) 1708291264Savos{ 1709291264Savos uint8_t reg; 1710291264Savos int i, error; 1711291264Savos 1712291264Savos for (i = 0; i < 4; i++) { 1713291264Savos if (msk & (1 << i)) 1714291264Savos continue; 1715291264Savos error = urtwn_efuse_read_next(sc, ®); 1716291264Savos if (error != 0) 1717291264Savos return (error); 1718294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1719294471Savos off * 8 + i * 2, reg); 1720291264Savos rom[off * 8 + i * 2 + 0] = reg; 1721291264Savos 1722291264Savos error = urtwn_efuse_read_next(sc, ®); 1723291264Savos if (error != 0) 1724291264Savos return (error); 1725294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "rom[0x%03X] == 0x%02X\n", 1726294471Savos off * 8 + i * 2 + 1, reg); 1727291264Savos rom[off * 8 + i * 2 + 1] = reg; 1728291264Savos } 1729291264Savos 1730291264Savos return (0); 1731291264Savos} 1732291264Savos 1733294471Savos#ifdef USB_DEBUG 1734251538Srpaulostatic void 1735291264Savosurtwn_dump_rom_contents(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1736251538Srpaulo{ 1737251538Srpaulo int i; 1738251538Srpaulo 1739291264Savos /* Dump ROM contents. */ 1740291264Savos device_printf(sc->sc_dev, "%s:", __func__); 1741291264Savos for (i = 0; i < size; i++) { 1742291264Savos if (i % 32 == 0) 1743291264Savos printf("\n%03X: ", i); 1744291264Savos else if (i % 4 == 0) 1745291264Savos printf(" "); 1746291264Savos 1747291264Savos printf("%02X", rom[i]); 1748291264Savos } 1749291264Savos printf("\n"); 1750291264Savos} 1751291264Savos#endif 1752291264Savos 1753291264Savosstatic int 1754291264Savosurtwn_efuse_read(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1755291264Savos{ 1756291264Savos#define URTWN_CHK(res) do { \ 1757291264Savos if ((error = res) != 0) \ 1758291264Savos goto end; \ 1759291264Savos} while(0) 1760291264Savos uint8_t msk, off, reg; 1761291264Savos int error; 1762291264Savos 1763291698Savos URTWN_CHK(urtwn_efuse_switch_power(sc)); 1764264912Skevlo 1765291264Savos /* Read full ROM image. */ 1766291264Savos sc->last_rom_addr = 0; 1767291264Savos memset(rom, 0xff, size); 1768291264Savos 1769291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1770291264Savos while (reg != 0xff) { 1771291264Savos /* check for extended header */ 1772291264Savos if ((sc->chip & URTWN_CHIP_88E) && (reg & 0x1f) == 0x0f) { 1773291264Savos off = reg >> 5; 1774291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1775291264Savos 1776291264Savos if ((reg & 0x0f) != 0x0f) 1777291264Savos off = ((reg & 0xf0) >> 1) | off; 1778291264Savos else 1779291264Savos continue; 1780291264Savos } else 1781291264Savos off = reg >> 4; 1782251538Srpaulo msk = reg & 0xf; 1783291264Savos 1784291264Savos URTWN_CHK(urtwn_efuse_read_data(sc, rom, off, msk)); 1785291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1786251538Srpaulo } 1787291264Savos 1788291264Savosend: 1789291264Savos 1790294471Savos#ifdef USB_DEBUG 1791294471Savos if (sc->sc_debug & URTWN_DEBUG_ROM) 1792291264Savos urtwn_dump_rom_contents(sc, rom, size); 1793251538Srpaulo#endif 1794291264Savos 1795282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); 1796291264Savos 1797291264Savos if (error != 0) { 1798291264Savos device_printf(sc->sc_dev, "%s: error while reading ROM\n", 1799291264Savos __func__); 1800291264Savos } 1801291264Savos 1802291264Savos return (error); 1803291264Savos#undef URTWN_CHK 1804282623Skevlo} 1805281592Skevlo 1806291698Savosstatic int 1807264912Skevlourtwn_efuse_switch_power(struct urtwn_softc *sc) 1808264912Skevlo{ 1809291698Savos usb_error_t error; 1810264912Skevlo uint32_t reg; 1811251538Srpaulo 1812291698Savos error = urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); 1813291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1814291698Savos return (EIO); 1815281918Skevlo 1816264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1817264912Skevlo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1818291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1819264912Skevlo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1820291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1821291698Savos return (EIO); 1822264912Skevlo } 1823264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1824264912Skevlo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1825291698Savos error = urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1826264912Skevlo reg | R92C_SYS_FUNC_EN_ELDR); 1827291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1828291698Savos return (EIO); 1829264912Skevlo } 1830264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1831264912Skevlo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1832264912Skevlo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1833291698Savos error = urtwn_write_2(sc, R92C_SYS_CLKR, 1834264912Skevlo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1835291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1836291698Savos return (EIO); 1837264912Skevlo } 1838291698Savos 1839291698Savos return (0); 1840264912Skevlo} 1841264912Skevlo 1842251538Srpaulostatic int 1843251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1844251538Srpaulo{ 1845251538Srpaulo uint32_t reg; 1846251538Srpaulo 1847264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1848264912Skevlo return (0); 1849264912Skevlo 1850251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1851251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1852251538Srpaulo return (EIO); 1853251538Srpaulo 1854251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1855251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1856251538Srpaulo /* Check if it is a castrated 8192C. */ 1857251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1858251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1859251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1860251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1861251538Srpaulo } 1862251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1863251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1864251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1865251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1866251538Srpaulo } 1867251538Srpaulo return (0); 1868251538Srpaulo} 1869251538Srpaulo 1870291264Savosstatic int 1871251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1872251538Srpaulo{ 1873291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 1874291264Savos int error; 1875251538Srpaulo 1876251538Srpaulo /* Read full ROM image. */ 1877291264Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(*rom)); 1878291264Savos if (error != 0) 1879291264Savos return (error); 1880251538Srpaulo 1881251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1882291264Savos sc->last_rom_addr = 0x1fa; 1883291264Savos error = urtwn_efuse_read_next(sc, &sc->pa_setting); 1884291264Savos if (error != 0) 1885291264Savos return (error); 1886294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: PA setting=0x%x\n", __func__, 1887294471Savos sc->pa_setting); 1888251538Srpaulo 1889251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1890251538Srpaulo 1891251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1892294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type=%d\n", 1893294471Savos __func__, sc->regulatory); 1894287197Sglebius IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1895251538Srpaulo 1896264912Skevlo sc->sc_rf_write = urtwn_r92c_rf_write; 1897264912Skevlo sc->sc_power_on = urtwn_r92c_power_on; 1898295874Savos sc->sc_power_off = urtwn_r92c_power_off; 1899291264Savos 1900291264Savos return (0); 1901251538Srpaulo} 1902251538Srpaulo 1903291264Savosstatic int 1904264912Skevlourtwn_r88e_read_rom(struct urtwn_softc *sc) 1905264912Skevlo{ 1906294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 1907294198Savos int error; 1908264912Skevlo 1909294198Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(sc->rom.r88e_rom)); 1910291264Savos if (error != 0) 1911291264Savos return (error); 1912264912Skevlo 1913294198Savos sc->bw20_tx_pwr_diff = (rom->tx_pwr_diff >> 4); 1914264912Skevlo if (sc->bw20_tx_pwr_diff & 0x08) 1915264912Skevlo sc->bw20_tx_pwr_diff |= 0xf0; 1916294198Savos sc->ofdm_tx_pwr_diff = (rom->tx_pwr_diff & 0xf); 1917264912Skevlo if (sc->ofdm_tx_pwr_diff & 0x08) 1918264912Skevlo sc->ofdm_tx_pwr_diff |= 0xf0; 1919294198Savos sc->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY); 1920294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ROM, "%s: regulatory type %d\n", 1921294471Savos __func__,sc->regulatory); 1922294198Savos IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1923264912Skevlo 1924264912Skevlo sc->sc_rf_write = urtwn_r88e_rf_write; 1925264912Skevlo sc->sc_power_on = urtwn_r88e_power_on; 1926295874Savos sc->sc_power_off = urtwn_r88e_power_off; 1927291264Savos 1928291264Savos return (0); 1929264912Skevlo} 1930264912Skevlo 1931251538Srpaulo/* 1932251538Srpaulo * Initialize rate adaptation in firmware. 1933251538Srpaulo */ 1934251538Srpaulostatic int 1935251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 1936251538Srpaulo{ 1937287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1938251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1939251538Srpaulo struct ieee80211_node *ni; 1940297175Sadrian struct ieee80211_rateset *rs, *rs_ht; 1941251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 1942251538Srpaulo uint32_t rates, basicrates; 1943251538Srpaulo uint8_t mode; 1944251538Srpaulo int maxrate, maxbasicrate, error, i, j; 1945251538Srpaulo 1946251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1947251538Srpaulo rs = &ni->ni_rates; 1948297175Sadrian rs_ht = (struct ieee80211_rateset *) &ni->ni_htrates; 1949251538Srpaulo 1950251538Srpaulo /* Get normal and basic rates mask. */ 1951251538Srpaulo rates = basicrates = 0; 1952251538Srpaulo maxrate = maxbasicrate = 0; 1953297175Sadrian 1954297175Sadrian /* This is for 11bg */ 1955251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 1956251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 1957289758Savos for (j = 0; j < nitems(ridx2rate); j++) 1958289758Savos if ((rs->rs_rates[i] & IEEE80211_RATE_VAL) == 1959289758Savos ridx2rate[j]) 1960251538Srpaulo break; 1961289758Savos if (j == nitems(ridx2rate)) /* Unknown rate, skip. */ 1962251538Srpaulo continue; 1963251538Srpaulo rates |= 1 << j; 1964251538Srpaulo if (j > maxrate) 1965251538Srpaulo maxrate = j; 1966251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 1967251538Srpaulo basicrates |= 1 << j; 1968251538Srpaulo if (j > maxbasicrate) 1969251538Srpaulo maxbasicrate = j; 1970251538Srpaulo } 1971251538Srpaulo } 1972297175Sadrian 1973297175Sadrian /* If we're doing 11n, enable 11n rates */ 1974297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) { 1975297175Sadrian for (i = 0; i < rs_ht->rs_nrates; i++) { 1976297175Sadrian if ((rs_ht->rs_rates[i] & 0x7f) > 0xf) 1977297175Sadrian continue; 1978297175Sadrian /* 11n rates start at index 12 */ 1979297175Sadrian j = ((rs_ht->rs_rates[i]) & 0xf) + 12; 1980297175Sadrian rates |= (1 << j); 1981297175Sadrian 1982297175Sadrian /* Guard against the rate table being oddly ordered */ 1983297175Sadrian if (j > maxrate) 1984297175Sadrian maxrate = j; 1985297175Sadrian } 1986297175Sadrian } 1987297175Sadrian 1988297175Sadrian#if 0 1989297175Sadrian if (ic->ic_curmode == IEEE80211_MODE_11NG) 1990297175Sadrian raid = R92C_RAID_11GN; 1991297175Sadrian#endif 1992297175Sadrian /* NB: group addressed frames are done at 11bg rates for now */ 1993251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 1994251538Srpaulo mode = R92C_RAID_11B; 1995251538Srpaulo else 1996251538Srpaulo mode = R92C_RAID_11BG; 1997297175Sadrian /* XXX misleading 'mode' value here for unicast frames */ 1998294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, 1999294471Savos "%s: mode 0x%x, rates 0x%08x, basicrates 0x%08x\n", __func__, 2000251538Srpaulo mode, rates, basicrates); 2001251538Srpaulo 2002251538Srpaulo /* Set rates mask for group addressed frames. */ 2003251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 2004251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 2005251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2006251538Srpaulo if (error != 0) { 2007252401Srpaulo ieee80211_free_node(ni); 2008251538Srpaulo device_printf(sc->sc_dev, 2009251538Srpaulo "could not add broadcast station\n"); 2010251538Srpaulo return (error); 2011251538Srpaulo } 2012297175Sadrian 2013251538Srpaulo /* Set initial MRR rate. */ 2014294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxbasicrate %d\n", __func__, 2015294471Savos maxbasicrate); 2016251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 2017251538Srpaulo maxbasicrate); 2018251538Srpaulo 2019251538Srpaulo /* Set rates mask for unicast frames. */ 2020297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2021297175Sadrian mode = R92C_RAID_11GN; 2022297175Sadrian else if (ic->ic_curmode == IEEE80211_MODE_11B) 2023297175Sadrian mode = R92C_RAID_11B; 2024297175Sadrian else 2025297175Sadrian mode = R92C_RAID_11BG; 2026251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 2027251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 2028251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 2029251538Srpaulo if (error != 0) { 2030252401Srpaulo ieee80211_free_node(ni); 2031251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 2032251538Srpaulo return (error); 2033251538Srpaulo } 2034251538Srpaulo /* Set initial MRR rate. */ 2035294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_RA, "%s: maxrate %d\n", __func__, 2036294471Savos maxrate); 2037251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 2038251538Srpaulo maxrate); 2039251538Srpaulo 2040251538Srpaulo /* Indicate highest supported rate. */ 2041297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2042297175Sadrian ni->ni_txrate = rs_ht->rs_rates[rs_ht->rs_nrates - 1] 2043297175Sadrian | IEEE80211_RATE_MCS; 2044297175Sadrian else 2045297175Sadrian ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 2046252401Srpaulo ieee80211_free_node(ni); 2047252401Srpaulo 2048251538Srpaulo return (0); 2049251538Srpaulo} 2050251538Srpaulo 2051290439Savosstatic void 2052290631Savosurtwn_init_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2053251538Srpaulo{ 2054290631Savos struct r92c_tx_desc *txd = &uvp->bcn_desc; 2055290631Savos 2056290631Savos txd->txdw0 = htole32( 2057290631Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | R92C_TXDW0_BMCAST | 2058290631Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2059290631Savos txd->txdw1 = htole32( 2060290631Savos SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) | 2061290631Savos SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 2062290631Savos 2063291858Savos if (sc->chip & URTWN_CHIP_88E) { 2064290631Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 2065291858Savos txd->txdseq |= htole16(R88E_TXDSEQ_HWSEQ_EN); 2066291858Savos } else { 2067290631Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 2068291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2069291858Savos } 2070290631Savos 2071290631Savos txd->txdw4 = htole32(R92C_TXDW4_DRVRATE); 2072290631Savos txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE, URTWN_RIDX_CCK1)); 2073251538Srpaulo} 2074251538Srpaulo 2075290631Savosstatic int 2076290631Savosurtwn_setup_beacon(struct urtwn_softc *sc, struct ieee80211_node *ni) 2077290631Savos{ 2078290631Savos struct ieee80211vap *vap = ni->ni_vap; 2079290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2080290631Savos struct mbuf *m; 2081290631Savos int error; 2082290631Savos 2083290631Savos URTWN_ASSERT_LOCKED(sc); 2084290631Savos 2085290631Savos if (ni->ni_chan == IEEE80211_CHAN_ANYC) 2086290631Savos return (EINVAL); 2087290631Savos 2088290631Savos m = ieee80211_beacon_alloc(ni); 2089290631Savos if (m == NULL) { 2090290631Savos device_printf(sc->sc_dev, 2091290631Savos "%s: could not allocate beacon frame\n", __func__); 2092290631Savos return (ENOMEM); 2093290631Savos } 2094290631Savos 2095290631Savos if (uvp->bcn_mbuf != NULL) 2096290631Savos m_freem(uvp->bcn_mbuf); 2097290631Savos 2098290631Savos uvp->bcn_mbuf = m; 2099290631Savos 2100290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2101290631Savos return (error); 2102290631Savos 2103290631Savos /* XXX bcnq stuck workaround */ 2104290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 2105290631Savos return (error); 2106290631Savos 2107294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_BEACON, "%s: beacon was %srecognized\n", 2108294471Savos __func__, urtwn_read_1(sc, R92C_TDECTRL + 2) & 2109294471Savos (R92C_TDECTRL_BCN_VALID >> 16) ? "" : "not "); 2110294471Savos 2111290631Savos return (0); 2112290631Savos} 2113290631Savos 2114251538Srpaulostatic void 2115290631Savosurtwn_update_beacon(struct ieee80211vap *vap, int item) 2116290631Savos{ 2117290631Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2118290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2119290631Savos struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 2120290631Savos struct ieee80211_node *ni = vap->iv_bss; 2121290631Savos int mcast = 0; 2122290631Savos 2123290631Savos URTWN_LOCK(sc); 2124290631Savos if (uvp->bcn_mbuf == NULL) { 2125290631Savos uvp->bcn_mbuf = ieee80211_beacon_alloc(ni); 2126290631Savos if (uvp->bcn_mbuf == NULL) { 2127290631Savos device_printf(sc->sc_dev, 2128290631Savos "%s: could not allocate beacon frame\n", __func__); 2129290631Savos URTWN_UNLOCK(sc); 2130290631Savos return; 2131290631Savos } 2132290631Savos } 2133290631Savos URTWN_UNLOCK(sc); 2134290631Savos 2135290631Savos if (item == IEEE80211_BEACON_TIM) 2136290631Savos mcast = 1; /* XXX */ 2137290631Savos 2138290631Savos setbit(bo->bo_flags, item); 2139290631Savos ieee80211_beacon_update(ni, uvp->bcn_mbuf, mcast); 2140290631Savos 2141290631Savos URTWN_LOCK(sc); 2142290631Savos urtwn_tx_beacon(sc, uvp); 2143290631Savos URTWN_UNLOCK(sc); 2144290631Savos} 2145290631Savos 2146290631Savos/* 2147290631Savos * Push a beacon frame into the chip. Beacon will 2148290631Savos * be repeated by the chip every R92C_BCN_INTERVAL. 2149290631Savos */ 2150290631Savosstatic int 2151290631Savosurtwn_tx_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 2152290631Savos{ 2153290631Savos struct r92c_tx_desc *desc = &uvp->bcn_desc; 2154290631Savos struct urtwn_data *bf; 2155290631Savos 2156290631Savos URTWN_ASSERT_LOCKED(sc); 2157290631Savos 2158290631Savos bf = urtwn_getbuf(sc); 2159290631Savos if (bf == NULL) 2160290631Savos return (ENOMEM); 2161290631Savos 2162290631Savos memcpy(bf->buf, desc, sizeof(*desc)); 2163290631Savos urtwn_tx_start(sc, uvp->bcn_mbuf, IEEE80211_FC0_TYPE_MGT, bf); 2164290631Savos 2165290631Savos sc->sc_txtimer = 5; 2166290631Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2167290631Savos 2168290631Savos return (0); 2169290631Savos} 2170290631Savos 2171292175Savosstatic int 2172292175Savosurtwn_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k, 2173292175Savos ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix) 2174292175Savos{ 2175292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2176292175Savos uint8_t i; 2177292175Savos 2178292175Savos if (!(&vap->iv_nw_keys[0] <= k && 2179292175Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) { 2180292175Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 2181292175Savos URTWN_LOCK(sc); 2182292175Savos /* 2183292175Savos * First 4 slots for group keys, 2184292175Savos * what is left - for pairwise. 2185292175Savos * XXX incompatible with IBSS RSN. 2186292175Savos */ 2187292175Savos for (i = IEEE80211_WEP_NKID; 2188292175Savos i < R92C_CAM_ENTRY_COUNT; i++) { 2189292175Savos if ((sc->keys_bmap & (1 << i)) == 0) { 2190292175Savos sc->keys_bmap |= 1 << i; 2191292175Savos *keyix = i; 2192292175Savos break; 2193292175Savos } 2194292175Savos } 2195292175Savos URTWN_UNLOCK(sc); 2196292175Savos if (i == R92C_CAM_ENTRY_COUNT) { 2197292175Savos device_printf(sc->sc_dev, 2198292175Savos "%s: no free space in the key table\n", 2199292175Savos __func__); 2200292175Savos return 0; 2201292175Savos } 2202292175Savos } else 2203292175Savos *keyix = 0; 2204292175Savos } else { 2205292175Savos *keyix = k - vap->iv_nw_keys; 2206292175Savos } 2207292175Savos *rxkeyix = *keyix; 2208292175Savos return 1; 2209292175Savos} 2210292175Savos 2211290631Savosstatic void 2212292175Savosurtwn_key_set_cb(struct urtwn_softc *sc, union sec_param *data) 2213292175Savos{ 2214292175Savos struct ieee80211_key *k = &data->key; 2215292175Savos uint8_t algo, keyid; 2216292175Savos int i, error; 2217292175Savos 2218292175Savos if (k->wk_keyix < IEEE80211_WEP_NKID) 2219292175Savos keyid = k->wk_keyix; 2220292175Savos else 2221292175Savos keyid = 0; 2222292175Savos 2223292175Savos /* Map net80211 cipher to HW crypto algorithm. */ 2224292175Savos switch (k->wk_cipher->ic_cipher) { 2225292175Savos case IEEE80211_CIPHER_WEP: 2226292175Savos if (k->wk_keylen < 8) 2227292175Savos algo = R92C_CAM_ALGO_WEP40; 2228292175Savos else 2229292175Savos algo = R92C_CAM_ALGO_WEP104; 2230292175Savos break; 2231292175Savos case IEEE80211_CIPHER_TKIP: 2232292175Savos algo = R92C_CAM_ALGO_TKIP; 2233292175Savos break; 2234292175Savos case IEEE80211_CIPHER_AES_CCM: 2235292175Savos algo = R92C_CAM_ALGO_AES; 2236292175Savos break; 2237292175Savos default: 2238292175Savos device_printf(sc->sc_dev, "%s: undefined cipher %d\n", 2239292175Savos __func__, k->wk_cipher->ic_cipher); 2240292175Savos return; 2241292175Savos } 2242292175Savos 2243294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2244294471Savos "%s: keyix %d, keyid %d, algo %d/%d, flags %04X, len %d, " 2245294471Savos "macaddr %s\n", __func__, k->wk_keyix, keyid, 2246294471Savos k->wk_cipher->ic_cipher, algo, k->wk_flags, k->wk_keylen, 2247294471Savos ether_sprintf(k->wk_macaddr)); 2248292175Savos 2249292175Savos /* Write key. */ 2250292175Savos for (i = 0; i < 4; i++) { 2251292175Savos error = urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 2252292175Savos LE_READ_4(&k->wk_key[i * 4])); 2253292175Savos if (error != 0) 2254292175Savos goto fail; 2255292175Savos } 2256292175Savos 2257292175Savos /* Write CTL0 last since that will validate the CAM entry. */ 2258292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 2259292175Savos LE_READ_4(&k->wk_macaddr[2])); 2260292175Savos if (error != 0) 2261292175Savos goto fail; 2262292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 2263292175Savos SM(R92C_CAM_ALGO, algo) | 2264292175Savos SM(R92C_CAM_KEYID, keyid) | 2265292175Savos SM(R92C_CAM_MACLO, LE_READ_2(&k->wk_macaddr[0])) | 2266292175Savos R92C_CAM_VALID); 2267292175Savos if (error != 0) 2268292175Savos goto fail; 2269292175Savos 2270292175Savos return; 2271292175Savos 2272292175Savosfail: 2273292175Savos device_printf(sc->sc_dev, "%s fails, error %d\n", __func__, error); 2274292175Savos} 2275292175Savos 2276292175Savosstatic void 2277292175Savosurtwn_key_del_cb(struct urtwn_softc *sc, union sec_param *data) 2278292175Savos{ 2279292175Savos struct ieee80211_key *k = &data->key; 2280292175Savos int i; 2281292175Savos 2282294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_KEY, 2283294471Savos "%s: keyix %d, flags %04X, macaddr %s\n", __func__, 2284292175Savos k->wk_keyix, k->wk_flags, ether_sprintf(k->wk_macaddr)); 2285292175Savos 2286292175Savos urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 0); 2287292175Savos urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 0); 2288292175Savos 2289292175Savos /* Clear key. */ 2290292175Savos for (i = 0; i < 4; i++) 2291292175Savos urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 0); 2292292175Savos sc->keys_bmap &= ~(1 << k->wk_keyix); 2293292175Savos} 2294292175Savos 2295292175Savosstatic int 2296292175Savosurtwn_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k) 2297292175Savos{ 2298292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2299292175Savos 2300292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2301292175Savos /* Not for us. */ 2302292175Savos return (1); 2303292175Savos } 2304292175Savos 2305292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_set_cb)); 2306292175Savos} 2307292175Savos 2308292175Savosstatic int 2309292175Savosurtwn_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k) 2310292175Savos{ 2311292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2312292175Savos 2313292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2314292175Savos /* Not for us. */ 2315292175Savos return (1); 2316292175Savos } 2317292175Savos 2318292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_del_cb)); 2319292175Savos} 2320292175Savos 2321292175Savosstatic void 2322290651Savosurtwn_tsf_task_adhoc(void *arg, int pending) 2323290651Savos{ 2324290651Savos struct ieee80211vap *vap = arg; 2325290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2326290651Savos struct ieee80211_node *ni; 2327290651Savos uint32_t reg; 2328290651Savos 2329290651Savos URTWN_LOCK(sc); 2330290651Savos ni = ieee80211_ref_node(vap->iv_bss); 2331290651Savos reg = urtwn_read_1(sc, R92C_BCN_CTRL); 2332290651Savos 2333290651Savos /* Accept beacons with the same BSSID. */ 2334290651Savos urtwn_set_rx_bssid_all(sc, 0); 2335290651Savos 2336290651Savos /* Enable synchronization. */ 2337290651Savos reg &= ~R92C_BCN_CTRL_DIS_TSF_UDT0; 2338290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2339290651Savos 2340290651Savos /* Synchronize. */ 2341290651Savos usb_pause_mtx(&sc->sc_mtx, hz * ni->ni_intval * 5 / 1000); 2342290651Savos 2343290651Savos /* Disable synchronization. */ 2344290651Savos reg |= R92C_BCN_CTRL_DIS_TSF_UDT0; 2345290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2346290651Savos 2347290651Savos /* Remove beacon filter. */ 2348290651Savos urtwn_set_rx_bssid_all(sc, 1); 2349290651Savos 2350290651Savos /* Enable beaconing. */ 2351290651Savos urtwn_write_1(sc, R92C_MBID_NUM, 2352290651Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2353290651Savos reg |= R92C_BCN_CTRL_EN_BCN; 2354290651Savos 2355290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2356290651Savos ieee80211_free_node(ni); 2357290651Savos URTWN_UNLOCK(sc); 2358290651Savos} 2359290651Savos 2360290651Savosstatic void 2361290631Savosurtwn_tsf_sync_enable(struct urtwn_softc *sc, struct ieee80211vap *vap) 2362290631Savos{ 2363290651Savos struct ieee80211com *ic = &sc->sc_ic; 2364290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2365290651Savos 2366290631Savos /* Reset TSF. */ 2367290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2368290631Savos 2369290631Savos switch (vap->iv_opmode) { 2370290631Savos case IEEE80211_M_STA: 2371290631Savos /* Enable TSF synchronization. */ 2372290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2373290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) & 2374290631Savos ~R92C_BCN_CTRL_DIS_TSF_UDT0); 2375290631Savos break; 2376290651Savos case IEEE80211_M_IBSS: 2377290651Savos ieee80211_runtask(ic, &uvp->tsf_task_adhoc); 2378290651Savos break; 2379290631Savos case IEEE80211_M_HOSTAP: 2380290631Savos /* Enable beaconing. */ 2381290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2382290631Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2383290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2384290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 2385290631Savos break; 2386290631Savos default: 2387290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2388290631Savos vap->iv_opmode); 2389290631Savos return; 2390290631Savos } 2391290631Savos} 2392290631Savos 2393290631Savosstatic void 2394292203Savosurtwn_get_tsf(struct urtwn_softc *sc, uint64_t *buf) 2395292203Savos{ 2396292203Savos urtwn_read_region_1(sc, R92C_TSFTR, (uint8_t *)buf, sizeof(*buf)); 2397292203Savos} 2398292203Savos 2399292203Savosstatic void 2400251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 2401251538Srpaulo{ 2402251538Srpaulo uint8_t reg; 2403281069Srpaulo 2404251538Srpaulo if (led == URTWN_LED_LINK) { 2405264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 2406264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 2407264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, reg | 0x60); 2408264912Skevlo if (!on) { 2409264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0x90; 2410264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, 2411264912Skevlo reg | R92C_LEDCFG0_DIS); 2412264912Skevlo urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 2413264912Skevlo urtwn_read_1(sc, R92C_MAC_PINMUX_CFG) & 2414264912Skevlo 0xfe); 2415264912Skevlo } 2416264912Skevlo } else { 2417264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 2418264912Skevlo if (!on) 2419264912Skevlo reg |= R92C_LEDCFG0_DIS; 2420264912Skevlo urtwn_write_1(sc, R92C_LEDCFG0, reg); 2421264912Skevlo } 2422264912Skevlo sc->ledlink = on; /* Save LED state. */ 2423251538Srpaulo } 2424251538Srpaulo} 2425251538Srpaulo 2426289811Savosstatic void 2427289811Savosurtwn_set_mode(struct urtwn_softc *sc, uint8_t mode) 2428289811Savos{ 2429289811Savos uint8_t reg; 2430289811Savos 2431289811Savos reg = urtwn_read_1(sc, R92C_MSR); 2432289811Savos reg = (reg & ~R92C_MSR_MASK) | mode; 2433289811Savos urtwn_write_1(sc, R92C_MSR, reg); 2434289811Savos} 2435289811Savos 2436290651Savosstatic void 2437290651Savosurtwn_ibss_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 2438290651Savos const struct ieee80211_rx_stats *rxs, 2439290651Savos int rssi, int nf) 2440290651Savos{ 2441290651Savos struct ieee80211vap *vap = ni->ni_vap; 2442290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2443290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2444290651Savos uint64_t ni_tstamp, curr_tstamp; 2445290651Savos 2446290651Savos uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 2447290651Savos 2448290651Savos if (vap->iv_state == IEEE80211_S_RUN && 2449290651Savos (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 2450290651Savos subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 2451290651Savos ni_tstamp = le64toh(ni->ni_tstamp.tsf); 2452290651Savos URTWN_LOCK(sc); 2453290651Savos urtwn_get_tsf(sc, &curr_tstamp); 2454290651Savos URTWN_UNLOCK(sc); 2455290651Savos curr_tstamp = le64toh(curr_tstamp); 2456290651Savos 2457290651Savos if (ni_tstamp >= curr_tstamp) 2458290651Savos (void) ieee80211_ibss_merge(ni); 2459290651Savos } 2460290651Savos} 2461290651Savos 2462251538Srpaulostatic int 2463251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 2464251538Srpaulo{ 2465251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 2466251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 2467286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2468251538Srpaulo struct ieee80211_node *ni; 2469251538Srpaulo enum ieee80211_state ostate; 2470290631Savos uint32_t reg; 2471290631Savos uint8_t mode; 2472290631Savos int error = 0; 2473251538Srpaulo 2474251538Srpaulo ostate = vap->iv_state; 2475294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_STATE, "%s -> %s\n", 2476294471Savos ieee80211_state_name[ostate], ieee80211_state_name[nstate]); 2477251538Srpaulo 2478251538Srpaulo IEEE80211_UNLOCK(ic); 2479251538Srpaulo URTWN_LOCK(sc); 2480251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 2481251538Srpaulo 2482251538Srpaulo if (ostate == IEEE80211_S_RUN) { 2483294473Savos /* Stop calibration. */ 2484294473Savos callout_stop(&sc->sc_calib_to); 2485294473Savos 2486251538Srpaulo /* Turn link LED off. */ 2487251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2488251538Srpaulo 2489251538Srpaulo /* Set media status to 'No Link'. */ 2490289811Savos urtwn_set_mode(sc, R92C_MSR_NOLINK); 2491251538Srpaulo 2492251538Srpaulo /* Stop Rx of data frames. */ 2493251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 2494251538Srpaulo 2495251538Srpaulo /* Disable TSF synchronization. */ 2496251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 2497290631Savos (urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN) | 2498251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 2499251538Srpaulo 2500290631Savos /* Disable beaconing. */ 2501290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2502290631Savos urtwn_read_1(sc, R92C_MBID_NUM) & ~R92C_MBID_TXBCN_RPT0); 2503290631Savos 2504290631Savos /* Reset TSF. */ 2505290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2506290631Savos 2507251538Srpaulo /* Reset EDCA parameters. */ 2508251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 2509251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 2510251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 2511251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 2512251538Srpaulo } 2513251538Srpaulo 2514251538Srpaulo switch (nstate) { 2515251538Srpaulo case IEEE80211_S_INIT: 2516251538Srpaulo /* Turn link LED off. */ 2517251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2518251538Srpaulo break; 2519251538Srpaulo case IEEE80211_S_SCAN: 2520251538Srpaulo /* Pause AC Tx queues. */ 2521251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 2522293180Savos urtwn_read_1(sc, R92C_TXPAUSE) | R92C_TX_QUEUE_AC); 2523251538Srpaulo break; 2524251538Srpaulo case IEEE80211_S_AUTH: 2525251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 2526251538Srpaulo break; 2527251538Srpaulo case IEEE80211_S_RUN: 2528251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 2529251538Srpaulo /* Turn link LED on. */ 2530251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2531251538Srpaulo break; 2532251538Srpaulo } 2533251538Srpaulo 2534251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 2535290631Savos 2536290631Savos if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || 2537290631Savos ni->ni_chan == IEEE80211_CHAN_ANYC) { 2538290631Savos device_printf(sc->sc_dev, 2539290631Savos "%s: could not move to RUN state\n", __func__); 2540290631Savos error = EINVAL; 2541290631Savos goto end_run; 2542290631Savos } 2543290631Savos 2544290631Savos switch (vap->iv_opmode) { 2545290631Savos case IEEE80211_M_STA: 2546290631Savos mode = R92C_MSR_INFRA; 2547290631Savos break; 2548290651Savos case IEEE80211_M_IBSS: 2549290651Savos mode = R92C_MSR_ADHOC; 2550290651Savos break; 2551290631Savos case IEEE80211_M_HOSTAP: 2552290631Savos mode = R92C_MSR_AP; 2553290631Savos break; 2554290631Savos default: 2555290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2556290631Savos vap->iv_opmode); 2557290631Savos error = EINVAL; 2558290631Savos goto end_run; 2559290631Savos } 2560290631Savos 2561251538Srpaulo /* Set media status to 'Associated'. */ 2562290631Savos urtwn_set_mode(sc, mode); 2563251538Srpaulo 2564251538Srpaulo /* Set BSSID. */ 2565251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 0, LE_READ_4(&ni->ni_bssid[0])); 2566251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 4, LE_READ_2(&ni->ni_bssid[4])); 2567251538Srpaulo 2568251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2569251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 2570251538Srpaulo else /* 802.11b/g */ 2571251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 2572251538Srpaulo 2573251538Srpaulo /* Enable Rx of data frames. */ 2574251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 2575251538Srpaulo 2576251538Srpaulo /* Flush all AC queues. */ 2577251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 2578251538Srpaulo 2579251538Srpaulo /* Set beacon interval. */ 2580251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 2581251538Srpaulo 2582251538Srpaulo /* Allow Rx from our BSSID only. */ 2583290564Savos if (ic->ic_promisc == 0) { 2584290631Savos reg = urtwn_read_4(sc, R92C_RCR); 2585290631Savos 2586290631Savos if (vap->iv_opmode != IEEE80211_M_HOSTAP) 2587290631Savos reg |= R92C_RCR_CBSSID_DATA; 2588290651Savos if (vap->iv_opmode != IEEE80211_M_IBSS) 2589290651Savos reg |= R92C_RCR_CBSSID_BCN; 2590290631Savos 2591290631Savos urtwn_write_4(sc, R92C_RCR, reg); 2592290564Savos } 2593251538Srpaulo 2594290651Savos if (vap->iv_opmode == IEEE80211_M_HOSTAP || 2595290651Savos vap->iv_opmode == IEEE80211_M_IBSS) { 2596290631Savos error = urtwn_setup_beacon(sc, ni); 2597290631Savos if (error != 0) { 2598290631Savos device_printf(sc->sc_dev, 2599290631Savos "unable to push beacon into the chip, " 2600290631Savos "error %d\n", error); 2601290631Savos goto end_run; 2602290631Savos } 2603290631Savos } 2604290631Savos 2605251538Srpaulo /* Enable TSF synchronization. */ 2606290631Savos urtwn_tsf_sync_enable(sc, vap); 2607251538Srpaulo 2608251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 2609251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 2610251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 2611251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 2612251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 2613251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 2614251538Srpaulo 2615251538Srpaulo /* Intialize rate adaptation. */ 2616292167Savos if (!(sc->chip & URTWN_CHIP_88E)) 2617264912Skevlo urtwn_ra_init(sc); 2618251538Srpaulo /* Turn link LED on. */ 2619251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2620251538Srpaulo 2621251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 2622251538Srpaulo /* Reset temperature calibration state machine. */ 2623294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 2624251538Srpaulo sc->thcal_lctemp = 0; 2625294473Savos /* Start periodic calibration. */ 2626294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2627290631Savos 2628290631Savosend_run: 2629251538Srpaulo ieee80211_free_node(ni); 2630251538Srpaulo break; 2631251538Srpaulo default: 2632251538Srpaulo break; 2633251538Srpaulo } 2634290631Savos 2635251538Srpaulo URTWN_UNLOCK(sc); 2636251538Srpaulo IEEE80211_LOCK(ic); 2637290631Savos return (error != 0 ? error : uvp->newstate(vap, nstate, arg)); 2638251538Srpaulo} 2639251538Srpaulo 2640251538Srpaulostatic void 2641294473Savosurtwn_calib_to(void *arg) 2642294473Savos{ 2643294473Savos struct urtwn_softc *sc = arg; 2644294473Savos 2645294473Savos /* Do it in a process context. */ 2646294473Savos urtwn_cmd_sleepable(sc, NULL, 0, urtwn_calib_cb); 2647294473Savos} 2648294473Savos 2649294473Savosstatic void 2650294473Savosurtwn_calib_cb(struct urtwn_softc *sc, union sec_param *data) 2651294473Savos{ 2652294473Savos /* Do temperature compensation. */ 2653294473Savos urtwn_temp_calib(sc); 2654294473Savos 2655294473Savos if ((urtwn_read_1(sc, R92C_MSR) & R92C_MSR_MASK) != R92C_MSR_NOLINK) 2656294473Savos callout_reset(&sc->sc_calib_to, 2*hz, urtwn_calib_to, sc); 2657294473Savos} 2658294473Savos 2659294473Savosstatic void 2660251538Srpaulourtwn_watchdog(void *arg) 2661251538Srpaulo{ 2662251538Srpaulo struct urtwn_softc *sc = arg; 2663251538Srpaulo 2664251538Srpaulo if (sc->sc_txtimer > 0) { 2665251538Srpaulo if (--sc->sc_txtimer == 0) { 2666251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 2667287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2668251538Srpaulo return; 2669251538Srpaulo } 2670251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2671251538Srpaulo } 2672251538Srpaulo} 2673251538Srpaulo 2674251538Srpaulostatic void 2675251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 2676251538Srpaulo{ 2677251538Srpaulo int pwdb; 2678251538Srpaulo 2679251538Srpaulo /* Convert antenna signal to percentage. */ 2680251538Srpaulo if (rssi <= -100 || rssi >= 20) 2681251538Srpaulo pwdb = 0; 2682251538Srpaulo else if (rssi >= 0) 2683251538Srpaulo pwdb = 100; 2684251538Srpaulo else 2685251538Srpaulo pwdb = 100 + rssi; 2686264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2687289758Savos if (rate <= URTWN_RIDX_CCK11) { 2688264912Skevlo /* CCK gain is smaller than OFDM/MCS gain. */ 2689264912Skevlo pwdb += 6; 2690264912Skevlo if (pwdb > 100) 2691264912Skevlo pwdb = 100; 2692264912Skevlo if (pwdb <= 14) 2693264912Skevlo pwdb -= 4; 2694264912Skevlo else if (pwdb <= 26) 2695264912Skevlo pwdb -= 8; 2696264912Skevlo else if (pwdb <= 34) 2697264912Skevlo pwdb -= 6; 2698264912Skevlo else if (pwdb <= 42) 2699264912Skevlo pwdb -= 2; 2700264912Skevlo } 2701251538Srpaulo } 2702251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 2703251538Srpaulo sc->avg_pwdb = pwdb; 2704251538Srpaulo else if (sc->avg_pwdb < pwdb) 2705251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 2706251538Srpaulo else 2707251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 2708297175Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_RSSI, "%s: PWDB %d, EMA %d\n", __func__, 2709294471Savos pwdb, sc->avg_pwdb); 2710251538Srpaulo} 2711251538Srpaulo 2712251538Srpaulostatic int8_t 2713251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2714251538Srpaulo{ 2715251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 2716251538Srpaulo struct r92c_rx_phystat *phy; 2717251538Srpaulo struct r92c_rx_cck *cck; 2718251538Srpaulo uint8_t rpt; 2719251538Srpaulo int8_t rssi; 2720251538Srpaulo 2721289758Savos if (rate <= URTWN_RIDX_CCK11) { 2722251538Srpaulo cck = (struct r92c_rx_cck *)physt; 2723251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 2724251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 2725251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 2726251538Srpaulo } else { 2727251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 2728251538Srpaulo rssi = cck->agc_rpt & 0x3e; 2729251538Srpaulo } 2730251538Srpaulo rssi = cckoff[rpt] - rssi; 2731251538Srpaulo } else { /* OFDM/HT. */ 2732251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 2733251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2734251538Srpaulo } 2735251538Srpaulo return (rssi); 2736251538Srpaulo} 2737251538Srpaulo 2738264912Skevlostatic int8_t 2739264912Skevlourtwn_r88e_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2740264912Skevlo{ 2741264912Skevlo struct r92c_rx_phystat *phy; 2742264912Skevlo struct r88e_rx_cck *cck; 2743264912Skevlo uint8_t cck_agc_rpt, lna_idx, vga_idx; 2744264912Skevlo int8_t rssi; 2745264912Skevlo 2746264972Skevlo rssi = 0; 2747289758Savos if (rate <= URTWN_RIDX_CCK11) { 2748264912Skevlo cck = (struct r88e_rx_cck *)physt; 2749264912Skevlo cck_agc_rpt = cck->agc_rpt; 2750264912Skevlo lna_idx = (cck_agc_rpt & 0xe0) >> 5; 2751281069Srpaulo vga_idx = cck_agc_rpt & 0x1f; 2752264912Skevlo switch (lna_idx) { 2753264912Skevlo case 7: 2754264912Skevlo if (vga_idx <= 27) 2755264912Skevlo rssi = -100 + 2* (27 - vga_idx); 2756264912Skevlo else 2757264912Skevlo rssi = -100; 2758264912Skevlo break; 2759264912Skevlo case 6: 2760264912Skevlo rssi = -48 + 2 * (2 - vga_idx); 2761264912Skevlo break; 2762264912Skevlo case 5: 2763264912Skevlo rssi = -42 + 2 * (7 - vga_idx); 2764264912Skevlo break; 2765264912Skevlo case 4: 2766264912Skevlo rssi = -36 + 2 * (7 - vga_idx); 2767264912Skevlo break; 2768264912Skevlo case 3: 2769264912Skevlo rssi = -24 + 2 * (7 - vga_idx); 2770264912Skevlo break; 2771264912Skevlo case 2: 2772264912Skevlo rssi = -12 + 2 * (5 - vga_idx); 2773264912Skevlo break; 2774264912Skevlo case 1: 2775264912Skevlo rssi = 8 - (2 * vga_idx); 2776264912Skevlo break; 2777264912Skevlo case 0: 2778264912Skevlo rssi = 14 - (2 * vga_idx); 2779264912Skevlo break; 2780264912Skevlo } 2781264912Skevlo rssi += 6; 2782264912Skevlo } else { /* OFDM/HT. */ 2783264912Skevlo phy = (struct r92c_rx_phystat *)physt; 2784264912Skevlo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2785264912Skevlo } 2786264912Skevlo return (rssi); 2787264912Skevlo} 2788264912Skevlo 2789292167Savosstatic __inline uint8_t 2790292167Savosrate2ridx(uint8_t rate) 2791292167Savos{ 2792297175Sadrian if (rate & IEEE80211_RATE_MCS) { 2793297175Sadrian /* 11n rates start at idx 12 */ 2794297175Sadrian return ((rate & 0xf) + 12); 2795297175Sadrian } 2796292167Savos switch (rate) { 2797297175Sadrian /* 11g */ 2798292167Savos case 12: return 4; 2799292167Savos case 18: return 5; 2800292167Savos case 24: return 6; 2801292167Savos case 36: return 7; 2802292167Savos case 48: return 8; 2803292167Savos case 72: return 9; 2804292167Savos case 96: return 10; 2805292167Savos case 108: return 11; 2806297175Sadrian /* 11b */ 2807292167Savos case 2: return 0; 2808292167Savos case 4: return 1; 2809292167Savos case 11: return 2; 2810292167Savos case 22: return 3; 2811292167Savos default: return 0; 2812292167Savos } 2813292167Savos} 2814292167Savos 2815251538Srpaulostatic int 2816290630Savosurtwn_tx_data(struct urtwn_softc *sc, struct ieee80211_node *ni, 2817290630Savos struct mbuf *m, struct urtwn_data *data) 2818251538Srpaulo{ 2819292167Savos const struct ieee80211_txparam *tp; 2820287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2821251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 2822292167Savos struct ieee80211_key *k = NULL; 2823292167Savos struct ieee80211_channel *chan; 2824292167Savos struct ieee80211_frame *wh; 2825251538Srpaulo struct r92c_tx_desc *txd; 2826292167Savos uint8_t macid, raid, rate, ridx, subtype, type, tid, qsel; 2827292014Savos int hasqos, ismcast; 2828251538Srpaulo 2829251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2830251538Srpaulo 2831251538Srpaulo /* 2832251538Srpaulo * Software crypto. 2833251538Srpaulo */ 2834290630Savos wh = mtod(m, struct ieee80211_frame *); 2835264912Skevlo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2836290630Savos subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2837292014Savos hasqos = IEEE80211_QOS_HAS_SEQ(wh); 2838290630Savos ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2839264912Skevlo 2840292014Savos /* Select TX ring for this frame. */ 2841292014Savos if (hasqos) { 2842292014Savos tid = ((const struct ieee80211_qosframe *)wh)->i_qos[0]; 2843292014Savos tid &= IEEE80211_QOS_TID; 2844292014Savos } else 2845292014Savos tid = 0; 2846292014Savos 2847292167Savos chan = (ni->ni_chan != IEEE80211_CHAN_ANYC) ? 2848292167Savos ni->ni_chan : ic->ic_curchan; 2849292167Savos tp = &vap->iv_txparms[ieee80211_chan2mode(chan)]; 2850292167Savos 2851292167Savos /* Choose a TX rate index. */ 2852292167Savos if (type == IEEE80211_FC0_TYPE_MGT) 2853292167Savos rate = tp->mgmtrate; 2854292167Savos else if (ismcast) 2855292167Savos rate = tp->mcastrate; 2856292167Savos else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 2857292167Savos rate = tp->ucastrate; 2858292167Savos else if (m->m_flags & M_EAPOL) 2859292167Savos rate = tp->mgmtrate; 2860292167Savos else { 2861292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) { 2862292167Savos /* XXX pass pktlen */ 2863292167Savos (void) ieee80211_ratectl_rate(ni, NULL, 0); 2864292167Savos rate = ni->ni_txrate; 2865292167Savos } else { 2866297175Sadrian /* XXX TODO: drop the default rate for 11b/11g? */ 2867297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2868297175Sadrian rate = IEEE80211_RATE_MCS | 0x4; /* MCS4 */ 2869297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2870292167Savos rate = 108; 2871292167Savos else 2872292167Savos rate = 22; 2873292167Savos } 2874292167Savos } 2875292167Savos 2876297175Sadrian /* 2877297175Sadrian * XXX TODO: this should be per-node, for 11b versus 11bg 2878297175Sadrian * nodes in hostap mode 2879297175Sadrian */ 2880292167Savos ridx = rate2ridx(rate); 2881297175Sadrian if (ni->ni_flags & IEEE80211_NODE_HT) 2882297175Sadrian raid = R92C_RAID_11GN; 2883297175Sadrian else if (ic->ic_curmode != IEEE80211_MODE_11B) 2884292167Savos raid = R92C_RAID_11BG; 2885292167Savos else 2886292167Savos raid = R92C_RAID_11B; 2887292167Savos 2888260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2889290630Savos k = ieee80211_crypto_encap(ni, m); 2890251538Srpaulo if (k == NULL) { 2891251538Srpaulo device_printf(sc->sc_dev, 2892251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 2893251538Srpaulo return (ENOBUFS); 2894251538Srpaulo } 2895251538Srpaulo 2896251538Srpaulo /* in case packet header moved, reset pointer */ 2897290630Savos wh = mtod(m, struct ieee80211_frame *); 2898251538Srpaulo } 2899281069Srpaulo 2900251538Srpaulo /* Fill Tx descriptor. */ 2901251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 2902251538Srpaulo memset(txd, 0, sizeof(*txd)); 2903251538Srpaulo 2904251538Srpaulo txd->txdw0 |= htole32( 2905251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 2906251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2907290630Savos if (ismcast) 2908251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 2909290630Savos 2910290630Savos if (!ismcast) { 2911292167Savos if (sc->chip & URTWN_CHIP_88E) { 2912292167Savos struct urtwn_node *un = URTWN_NODE(ni); 2913292167Savos macid = un->id; 2914292167Savos } else 2915292167Savos macid = URTWN_MACID_BSS; 2916290630Savos 2917290630Savos if (type == IEEE80211_FC0_TYPE_DATA) { 2918292014Savos qsel = tid % URTWN_MAX_TID; 2919290630Savos 2920292167Savos if (sc->chip & URTWN_CHIP_88E) { 2921292167Savos txd->txdw2 |= htole32( 2922292167Savos R88E_TXDW2_AGGBK | 2923292167Savos R88E_TXDW2_CCX_RPT); 2924292167Savos } else 2925290630Savos txd->txdw1 |= htole32(R92C_TXDW1_AGGBK); 2926290630Savos 2927297175Sadrian /* protmode, non-HT */ 2928297175Sadrian /* XXX TODO: noack frames? */ 2929297175Sadrian if ((rate & 0x80) == 0 && 2930297175Sadrian (ic->ic_flags & IEEE80211_F_USEPROT)) { 2931290630Savos switch (ic->ic_protmode) { 2932290630Savos case IEEE80211_PROT_CTSONLY: 2933290630Savos txd->txdw4 |= htole32( 2934290630Savos R92C_TXDW4_CTS2SELF | 2935290630Savos R92C_TXDW4_HWRTSEN); 2936290630Savos break; 2937290630Savos case IEEE80211_PROT_RTSCTS: 2938290630Savos txd->txdw4 |= htole32( 2939290630Savos R92C_TXDW4_RTSEN | 2940290630Savos R92C_TXDW4_HWRTSEN); 2941290630Savos break; 2942290630Savos default: 2943290630Savos break; 2944290630Savos } 2945290630Savos } 2946297175Sadrian 2947297175Sadrian /* protmode, HT */ 2948297175Sadrian /* XXX TODO: noack frames? */ 2949297175Sadrian if ((rate & 0x80) && 2950297175Sadrian (ic->ic_htprotmode == IEEE80211_PROT_RTSCTS)) { 2951297175Sadrian txd->txdw4 |= htole32( 2952297175Sadrian R92C_TXDW4_RTSEN | 2953297175Sadrian R92C_TXDW4_HWRTSEN); 2954297175Sadrian } 2955297175Sadrian 2956297175Sadrian /* XXX TODO: rtsrate is configurable? 24mbit may 2957297175Sadrian * be a bit high for RTS rate? */ 2958290630Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 2959290630Savos URTWN_RIDX_OFDM24)); 2960297175Sadrian 2961290630Savos txd->txdw5 |= htole32(0x0001ff00); 2962290630Savos } else /* IEEE80211_FC0_TYPE_MGT */ 2963290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2964251538Srpaulo } else { 2965290630Savos macid = URTWN_MACID_BC; 2966290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2967290630Savos } 2968251538Srpaulo 2969290630Savos txd->txdw1 |= htole32( 2970290630Savos SM(R92C_TXDW1_QSEL, qsel) | 2971290630Savos SM(R92C_TXDW1_RAID, raid)); 2972290630Savos 2973297175Sadrian /* XXX TODO: 40MHZ flag? */ 2974297175Sadrian /* XXX TODO: AMPDU flag? (AGG_ENABLE or AGG_BREAK?) Density shift? */ 2975297175Sadrian /* XXX Short preamble? */ 2976297175Sadrian /* XXX Short-GI? */ 2977297175Sadrian 2978290630Savos if (sc->chip & URTWN_CHIP_88E) 2979290630Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, macid)); 2980290630Savos else 2981290630Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, macid)); 2982290630Savos 2983290630Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 2984297175Sadrian 2985291858Savos /* Force this rate if needed. */ 2986292167Savos if (URTWN_CHIP_HAS_RATECTL(sc) || ismcast || 2987297175Sadrian (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) || 2988292167Savos (m->m_flags & M_EAPOL) || type != IEEE80211_FC0_TYPE_DATA) 2989251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 2990251538Srpaulo 2991292014Savos if (!hasqos) { 2992251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 2993291858Savos if (sc->chip & URTWN_CHIP_88E) 2994291858Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 2995291858Savos else 2996291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2997290630Savos } else { 2998290630Savos /* Set sequence number. */ 2999290630Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3000290630Savos } 3001251538Srpaulo 3002292175Savos if (k != NULL && !(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3003292175Savos uint8_t cipher; 3004292175Savos 3005292175Savos switch (k->wk_cipher->ic_cipher) { 3006292175Savos case IEEE80211_CIPHER_WEP: 3007292175Savos case IEEE80211_CIPHER_TKIP: 3008292175Savos cipher = R92C_TXDW1_CIPHER_RC4; 3009292175Savos break; 3010292175Savos case IEEE80211_CIPHER_AES_CCM: 3011292175Savos cipher = R92C_TXDW1_CIPHER_AES; 3012292175Savos break; 3013292175Savos default: 3014292175Savos device_printf(sc->sc_dev, "%s: unknown cipher %d\n", 3015292175Savos __func__, k->wk_cipher->ic_cipher); 3016292175Savos return (EINVAL); 3017292175Savos } 3018292175Savos 3019292175Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3020292175Savos } 3021292175Savos 3022251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 3023251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3024251538Srpaulo 3025251538Srpaulo tap->wt_flags = 0; 3026290630Savos if (k != NULL) 3027290630Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3028290630Savos ieee80211_radiotap_tx(vap, m); 3029251538Srpaulo } 3030251538Srpaulo 3031290630Savos data->ni = ni; 3032251538Srpaulo 3033290630Savos urtwn_tx_start(sc, m, type, data); 3034290630Savos 3035290630Savos return (0); 3036290630Savos} 3037290630Savos 3038292221Savosstatic int 3039292221Savosurtwn_tx_raw(struct urtwn_softc *sc, struct ieee80211_node *ni, 3040292221Savos struct mbuf *m, struct urtwn_data *data, 3041292221Savos const struct ieee80211_bpf_params *params) 3042292221Savos{ 3043292221Savos struct ieee80211vap *vap = ni->ni_vap; 3044292221Savos struct ieee80211_key *k = NULL; 3045292221Savos struct ieee80211_frame *wh; 3046292221Savos struct r92c_tx_desc *txd; 3047292221Savos uint8_t cipher, ridx, type; 3048292221Savos 3049292221Savos /* Encrypt the frame if need be. */ 3050292221Savos cipher = R92C_TXDW1_CIPHER_NONE; 3051292221Savos if (params->ibp_flags & IEEE80211_BPF_CRYPTO) { 3052292221Savos /* Retrieve key for TX. */ 3053292221Savos k = ieee80211_crypto_encap(ni, m); 3054292221Savos if (k == NULL) 3055292221Savos return (ENOBUFS); 3056292221Savos 3057292221Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 3058292221Savos switch (k->wk_cipher->ic_cipher) { 3059292221Savos case IEEE80211_CIPHER_WEP: 3060292221Savos case IEEE80211_CIPHER_TKIP: 3061292221Savos cipher = R92C_TXDW1_CIPHER_RC4; 3062292221Savos break; 3063292221Savos case IEEE80211_CIPHER_AES_CCM: 3064292221Savos cipher = R92C_TXDW1_CIPHER_AES; 3065292221Savos break; 3066292221Savos default: 3067292221Savos device_printf(sc->sc_dev, 3068292221Savos "%s: unknown cipher %d\n", 3069292221Savos __func__, k->wk_cipher->ic_cipher); 3070292221Savos return (EINVAL); 3071292221Savos } 3072292221Savos } 3073292221Savos } 3074292221Savos 3075297175Sadrian /* XXX TODO: 11n checks, matching urtwn_tx_data() */ 3076297175Sadrian 3077292221Savos wh = mtod(m, struct ieee80211_frame *); 3078292221Savos type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 3079292221Savos 3080292221Savos /* Fill Tx descriptor. */ 3081292221Savos txd = (struct r92c_tx_desc *)data->buf; 3082292221Savos memset(txd, 0, sizeof(*txd)); 3083292221Savos 3084292221Savos txd->txdw0 |= htole32( 3085292221Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 3086292221Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 3087292221Savos if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 3088292221Savos txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 3089292221Savos 3090292221Savos if (params->ibp_flags & IEEE80211_BPF_RTS) 3091292221Savos txd->txdw4 |= htole32(R92C_TXDW4_RTSEN); 3092292221Savos if (params->ibp_flags & IEEE80211_BPF_CTS) 3093292221Savos txd->txdw4 |= htole32(R92C_TXDW4_CTS2SELF); 3094292221Savos if (txd->txdw4 & htole32(R92C_TXDW4_RTSEN | R92C_TXDW4_CTS2SELF)) { 3095292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWRTSEN); 3096292221Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 3097292221Savos URTWN_RIDX_OFDM24)); 3098292221Savos } 3099292221Savos 3100292221Savos if (sc->chip & URTWN_CHIP_88E) 3101292221Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 3102292221Savos else 3103292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 3104292221Savos 3105297175Sadrian /* XXX TODO: rate index/config (RAID) for 11n? */ 3106292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_MGNT)); 3107292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 3108292221Savos 3109292221Savos /* Choose a TX rate index. */ 3110292221Savos ridx = rate2ridx(params->ibp_rate0); 3111292221Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 3112292221Savos txd->txdw5 |= htole32(0x0001ff00); 3113292221Savos txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 3114292221Savos 3115292221Savos if (!IEEE80211_QOS_HAS_SEQ(wh)) { 3116292221Savos /* Use HW sequence numbering for non-QoS frames. */ 3117292221Savos if (sc->chip & URTWN_CHIP_88E) 3118292221Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 3119292221Savos else 3120292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 3121292221Savos } else { 3122292221Savos /* Set sequence number. */ 3123292221Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 3124292221Savos } 3125292221Savos 3126292221Savos if (ieee80211_radiotap_active_vap(vap)) { 3127292221Savos struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 3128292221Savos 3129292221Savos tap->wt_flags = 0; 3130292221Savos if (k != NULL) 3131292221Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 3132292221Savos ieee80211_radiotap_tx(vap, m); 3133292221Savos } 3134292221Savos 3135292221Savos data->ni = ni; 3136292221Savos 3137292221Savos urtwn_tx_start(sc, m, type, data); 3138292221Savos 3139292221Savos return (0); 3140292221Savos} 3141292221Savos 3142290630Savosstatic void 3143290630Savosurtwn_tx_start(struct urtwn_softc *sc, struct mbuf *m, uint8_t type, 3144290630Savos struct urtwn_data *data) 3145290630Savos{ 3146290630Savos struct usb_xfer *xfer; 3147290630Savos struct r92c_tx_desc *txd; 3148290630Savos uint16_t ac, sum; 3149290630Savos int i, xferlen; 3150290630Savos 3151290630Savos URTWN_ASSERT_LOCKED(sc); 3152290630Savos 3153290630Savos ac = M_WME_GETAC(m); 3154290630Savos 3155290630Savos switch (type) { 3156290630Savos case IEEE80211_FC0_TYPE_CTL: 3157290630Savos case IEEE80211_FC0_TYPE_MGT: 3158290630Savos xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 3159290630Savos break; 3160290630Savos default: 3161292014Savos xfer = sc->sc_xfer[wme2queue[ac].qid]; 3162290630Savos break; 3163290630Savos } 3164290630Savos 3165290630Savos txd = (struct r92c_tx_desc *)data->buf; 3166290630Savos txd->txdw0 |= htole32(SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len)); 3167290630Savos 3168290630Savos /* Compute Tx descriptor checksum. */ 3169290630Savos sum = 0; 3170290630Savos for (i = 0; i < sizeof(*txd) / 2; i++) 3171290630Savos sum ^= ((uint16_t *)txd)[i]; 3172290630Savos txd->txdsum = sum; /* NB: already little endian. */ 3173290630Savos 3174290630Savos xferlen = sizeof(*txd) + m->m_pkthdr.len; 3175290630Savos m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&txd[1]); 3176290630Savos 3177251538Srpaulo data->buflen = xferlen; 3178290630Savos data->m = m; 3179251538Srpaulo 3180251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 3181251538Srpaulo usbd_transfer_start(xfer); 3182251538Srpaulo} 3183251538Srpaulo 3184287197Sglebiusstatic int 3185287197Sglebiusurtwn_transmit(struct ieee80211com *ic, struct mbuf *m) 3186251538Srpaulo{ 3187287197Sglebius struct urtwn_softc *sc = ic->ic_softc; 3188287197Sglebius int error; 3189261863Srpaulo 3190261863Srpaulo URTWN_LOCK(sc); 3191287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 3192287197Sglebius URTWN_UNLOCK(sc); 3193287197Sglebius return (ENXIO); 3194287197Sglebius } 3195287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 3196287197Sglebius if (error) { 3197287197Sglebius URTWN_UNLOCK(sc); 3198287197Sglebius return (error); 3199287197Sglebius } 3200287197Sglebius urtwn_start(sc); 3201261863Srpaulo URTWN_UNLOCK(sc); 3202287197Sglebius 3203287197Sglebius return (0); 3204261863Srpaulo} 3205261863Srpaulo 3206261863Srpaulostatic void 3207287197Sglebiusurtwn_start(struct urtwn_softc *sc) 3208261863Srpaulo{ 3209251538Srpaulo struct ieee80211_node *ni; 3210251538Srpaulo struct mbuf *m; 3211251538Srpaulo struct urtwn_data *bf; 3212251538Srpaulo 3213261863Srpaulo URTWN_ASSERT_LOCKED(sc); 3214287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 3215251538Srpaulo bf = urtwn_getbuf(sc); 3216251538Srpaulo if (bf == NULL) { 3217287197Sglebius mbufq_prepend(&sc->sc_snd, m); 3218251538Srpaulo break; 3219251538Srpaulo } 3220251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 3221251538Srpaulo m->m_pkthdr.rcvif = NULL; 3222297596Sadrian 3223297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 3224297596Sadrian __func__, 3225297596Sadrian m); 3226297596Sadrian 3227290630Savos if (urtwn_tx_data(sc, ni, m, bf) != 0) { 3228287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 3229287197Sglebius IFCOUNTER_OERRORS, 1); 3230251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 3231288353Sadrian m_freem(m); 3232251538Srpaulo ieee80211_free_node(ni); 3233251538Srpaulo break; 3234251538Srpaulo } 3235251538Srpaulo sc->sc_txtimer = 5; 3236251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 3237251538Srpaulo } 3238251538Srpaulo} 3239251538Srpaulo 3240287197Sglebiusstatic void 3241287197Sglebiusurtwn_parent(struct ieee80211com *ic) 3242251538Srpaulo{ 3243286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 3244251538Srpaulo 3245263153Skevlo URTWN_LOCK(sc); 3246287197Sglebius if (sc->sc_flags & URTWN_DETACHED) { 3247287197Sglebius URTWN_UNLOCK(sc); 3248287197Sglebius return; 3249287197Sglebius } 3250291698Savos URTWN_UNLOCK(sc); 3251291698Savos 3252287197Sglebius if (ic->ic_nrunning > 0) { 3253291698Savos if (urtwn_init(sc) != 0) { 3254291698Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3255291698Savos if (vap != NULL) 3256291698Savos ieee80211_stop(vap); 3257291698Savos } else 3258291698Savos ieee80211_start_all(ic); 3259291698Savos } else 3260287197Sglebius urtwn_stop(sc); 3261251538Srpaulo} 3262251538Srpaulo 3263264912Skevlostatic __inline int 3264251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 3265251538Srpaulo{ 3266264912Skevlo 3267264912Skevlo return sc->sc_power_on(sc); 3268264912Skevlo} 3269264912Skevlo 3270264912Skevlostatic int 3271264912Skevlourtwn_r92c_power_on(struct urtwn_softc *sc) 3272264912Skevlo{ 3273251538Srpaulo uint32_t reg; 3274291698Savos usb_error_t error; 3275251538Srpaulo int ntries; 3276251538Srpaulo 3277251538Srpaulo /* Wait for autoload done bit. */ 3278251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3279251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 3280251538Srpaulo break; 3281266472Shselasky urtwn_ms_delay(sc); 3282251538Srpaulo } 3283251538Srpaulo if (ntries == 1000) { 3284251538Srpaulo device_printf(sc->sc_dev, 3285251538Srpaulo "timeout waiting for chip autoload\n"); 3286251538Srpaulo return (ETIMEDOUT); 3287251538Srpaulo } 3288251538Srpaulo 3289251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 3290291698Savos error = urtwn_write_1(sc, R92C_RSV_CTRL, 0); 3291291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3292291698Savos return (EIO); 3293251538Srpaulo /* Move SPS into PWM mode. */ 3294291698Savos error = urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 3295291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3296291698Savos return (EIO); 3297266472Shselasky urtwn_ms_delay(sc); 3298251538Srpaulo 3299251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 3300251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 3301291698Savos error = urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3302251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 3303291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3304291698Savos return (EIO); 3305266472Shselasky urtwn_ms_delay(sc); 3306291698Savos error = urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3307251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 3308251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 3309291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3310291698Savos return (EIO); 3311251538Srpaulo } 3312251538Srpaulo 3313251538Srpaulo /* Auto enable WLAN. */ 3314291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3315251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3316291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3317291698Savos return (EIO); 3318251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3319262822Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3320262822Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3321251538Srpaulo break; 3322266472Shselasky urtwn_ms_delay(sc); 3323251538Srpaulo } 3324251538Srpaulo if (ntries == 1000) { 3325251538Srpaulo device_printf(sc->sc_dev, 3326251538Srpaulo "timeout waiting for MAC auto ON\n"); 3327251538Srpaulo return (ETIMEDOUT); 3328251538Srpaulo } 3329251538Srpaulo 3330251538Srpaulo /* Enable radio, GPIO and LED functions. */ 3331291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3332251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 3333251538Srpaulo R92C_APS_FSMCO_PDN_EN | 3334251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 3335291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3336291698Savos return (EIO); 3337251538Srpaulo /* Release RF digital isolation. */ 3338291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 3339251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 3340291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3341291698Savos return (EIO); 3342251538Srpaulo 3343251538Srpaulo /* Initialize MAC. */ 3344291698Savos error = urtwn_write_1(sc, R92C_APSD_CTRL, 3345251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 3346291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3347291698Savos return (EIO); 3348251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 3349251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 3350251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 3351251538Srpaulo break; 3352266472Shselasky urtwn_ms_delay(sc); 3353251538Srpaulo } 3354251538Srpaulo if (ntries == 200) { 3355251538Srpaulo device_printf(sc->sc_dev, 3356251538Srpaulo "timeout waiting for MAC initialization\n"); 3357251538Srpaulo return (ETIMEDOUT); 3358251538Srpaulo } 3359251538Srpaulo 3360251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3361251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 3362251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3363251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3364251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 3365251538Srpaulo R92C_CR_ENSEC; 3366291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3367291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3368291698Savos return (EIO); 3369251538Srpaulo 3370291698Savos error = urtwn_write_1(sc, 0xfe10, 0x19); 3371291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3372291698Savos return (EIO); 3373251538Srpaulo return (0); 3374251538Srpaulo} 3375251538Srpaulo 3376251538Srpaulostatic int 3377264912Skevlourtwn_r88e_power_on(struct urtwn_softc *sc) 3378264912Skevlo{ 3379264912Skevlo uint32_t reg; 3380291698Savos usb_error_t error; 3381264912Skevlo int ntries; 3382264912Skevlo 3383264912Skevlo /* Wait for power ready bit. */ 3384264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3385281918Skevlo if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST) 3386264912Skevlo break; 3387266472Shselasky urtwn_ms_delay(sc); 3388264912Skevlo } 3389264912Skevlo if (ntries == 5000) { 3390264912Skevlo device_printf(sc->sc_dev, 3391264912Skevlo "timeout waiting for chip power up\n"); 3392264912Skevlo return (ETIMEDOUT); 3393264912Skevlo } 3394264912Skevlo 3395264912Skevlo /* Reset BB. */ 3396291698Savos error = urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3397264912Skevlo urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB | 3398264912Skevlo R92C_SYS_FUNC_EN_BB_GLB_RST)); 3399291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3400291698Savos return (EIO); 3401264912Skevlo 3402291698Savos error = urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3403281918Skevlo urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3404291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3405291698Savos return (EIO); 3406264912Skevlo 3407264912Skevlo /* Disable HWPDN. */ 3408291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3409281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN); 3410291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3411291698Savos return (EIO); 3412264912Skevlo 3413264912Skevlo /* Disable WL suspend. */ 3414291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3415281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & 3416281918Skevlo ~(R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE)); 3417291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3418291698Savos return (EIO); 3419264912Skevlo 3420291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3421281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3422291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3423291698Savos return (EIO); 3424264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3425281918Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3426281918Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3427264912Skevlo break; 3428266472Shselasky urtwn_ms_delay(sc); 3429264912Skevlo } 3430264912Skevlo if (ntries == 5000) 3431264912Skevlo return (ETIMEDOUT); 3432264912Skevlo 3433264912Skevlo /* Enable LDO normal mode. */ 3434291698Savos error = urtwn_write_1(sc, R92C_LPLDO_CTRL, 3435295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) & ~R92C_LPLDO_CTRL_SLEEP); 3436291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3437291698Savos return (EIO); 3438264912Skevlo 3439264912Skevlo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3440291698Savos error = urtwn_write_2(sc, R92C_CR, 0); 3441291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3442291698Savos return (EIO); 3443264912Skevlo reg = urtwn_read_2(sc, R92C_CR); 3444264912Skevlo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3445264912Skevlo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3446264912Skevlo R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC | R92C_CR_CALTMR_EN; 3447291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3448291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3449291698Savos return (EIO); 3450264912Skevlo 3451264912Skevlo return (0); 3452264912Skevlo} 3453264912Skevlo 3454295874Savosstatic __inline void 3455295874Savosurtwn_power_off(struct urtwn_softc *sc) 3456295874Savos{ 3457295874Savos 3458295874Savos return sc->sc_power_off(sc); 3459295874Savos} 3460295874Savos 3461295874Savosstatic void 3462295874Savosurtwn_r92c_power_off(struct urtwn_softc *sc) 3463295874Savos{ 3464295874Savos uint32_t reg; 3465295874Savos 3466295874Savos /* Block all Tx queues. */ 3467295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3468295874Savos 3469295874Savos /* Disable RF */ 3470295874Savos urtwn_rf_write(sc, 0, 0, 0); 3471295874Savos 3472295874Savos urtwn_write_1(sc, R92C_APSD_CTRL, R92C_APSD_CTRL_OFF); 3473295874Savos 3474295874Savos /* Reset BB state machine */ 3475295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3476295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA | 3477295874Savos R92C_SYS_FUNC_EN_BB_GLB_RST); 3478295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3479295874Savos R92C_SYS_FUNC_EN_USBD | R92C_SYS_FUNC_EN_USBA); 3480295874Savos 3481295874Savos /* 3482295874Savos * Reset digital sequence 3483295874Savos */ 3484295874Savos#ifndef URTWN_WITHOUT_UCODE 3485295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) { 3486295874Savos /* Reset MCU ready status */ 3487295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3488295874Savos 3489295874Savos /* If firmware in ram code, do reset */ 3490295874Savos urtwn_fw_reset(sc); 3491295874Savos } 3492295874Savos#endif 3493295874Savos 3494295874Savos /* Reset MAC and Enable 8051 */ 3495295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN + 1, 3496295874Savos (R92C_SYS_FUNC_EN_CPUEN | 3497295874Savos R92C_SYS_FUNC_EN_ELDR | 3498295874Savos R92C_SYS_FUNC_EN_HWPDN) >> 8); 3499295874Savos 3500295874Savos /* Reset MCU ready status */ 3501295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0); 3502295874Savos 3503295874Savos /* Disable MAC clock */ 3504295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3505295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3506295874Savos R92C_SYS_CLKR_ANA8M | 3507295874Savos R92C_SYS_CLKR_LOADER_EN | 3508295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3509295874Savos R92C_SYS_CLKR_SYS_EN | 3510295874Savos R92C_SYS_CLKR_RING_EN | 3511295874Savos 0x4000); 3512295874Savos 3513295874Savos /* Disable AFE PLL */ 3514295874Savos urtwn_write_1(sc, R92C_AFE_PLL_CTRL, 0x80); 3515295874Savos 3516295874Savos /* Gated AFE DIG_CLOCK */ 3517295874Savos urtwn_write_2(sc, R92C_AFE_XTAL_CTRL, 0x880F); 3518295874Savos 3519295874Savos /* Isolated digital to PON */ 3520295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 3521295874Savos R92C_SYS_ISO_CTRL_MD2PP | 3522295874Savos R92C_SYS_ISO_CTRL_PA2PCIE | 3523295874Savos R92C_SYS_ISO_CTRL_PD2CORE | 3524295874Savos R92C_SYS_ISO_CTRL_IP2MAC | 3525295874Savos R92C_SYS_ISO_CTRL_DIOP | 3526295874Savos R92C_SYS_ISO_CTRL_DIOE); 3527295874Savos 3528295874Savos /* 3529295874Savos * Pull GPIO PIN to balance level and LED control 3530295874Savos */ 3531295874Savos /* 1. Disable GPIO[7:0] */ 3532295874Savos urtwn_write_2(sc, R92C_GPIO_IOSEL, 0x0000); 3533295874Savos 3534295874Savos reg = urtwn_read_4(sc, R92C_GPIO_PIN_CTRL) & ~0x0000ff00; 3535295874Savos reg |= ((reg << 8) & 0x0000ff00) | 0x00ff0000; 3536295874Savos urtwn_write_4(sc, R92C_GPIO_PIN_CTRL, reg); 3537295874Savos 3538295874Savos /* Disable GPIO[10:8] */ 3539295874Savos urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 0x00); 3540295874Savos 3541295874Savos reg = urtwn_read_2(sc, R92C_GPIO_IO_SEL) & ~0x00f0; 3542295874Savos reg |= (((reg & 0x000f) << 4) | 0x0780); 3543295874Savos urtwn_write_2(sc, R92C_GPIO_IO_SEL, reg); 3544295874Savos 3545295874Savos /* Disable LED0 & 1 */ 3546295874Savos urtwn_write_2(sc, R92C_LEDCFG0, 0x8080); 3547295874Savos 3548295874Savos /* 3549295874Savos * Reset digital sequence 3550295874Savos */ 3551295874Savos /* Disable ELDR clock */ 3552295874Savos urtwn_write_2(sc, R92C_SYS_CLKR, 3553295874Savos R92C_SYS_CLKR_ANAD16V_EN | 3554295874Savos R92C_SYS_CLKR_ANA8M | 3555295874Savos R92C_SYS_CLKR_LOADER_EN | 3556295874Savos R92C_SYS_CLKR_80M_SSC_DIS | 3557295874Savos R92C_SYS_CLKR_SYS_EN | 3558295874Savos R92C_SYS_CLKR_RING_EN | 3559295874Savos 0x4000); 3560295874Savos 3561295874Savos /* Isolated ELDR to PON */ 3562295874Savos urtwn_write_1(sc, R92C_SYS_ISO_CTRL + 1, 3563295874Savos (R92C_SYS_ISO_CTRL_DIOR | 3564295874Savos R92C_SYS_ISO_CTRL_PWC_EV12V) >> 8); 3565295874Savos 3566295874Savos /* 3567295874Savos * Disable analog sequence 3568295874Savos */ 3569295874Savos /* Disable A15 power */ 3570295874Savos urtwn_write_1(sc, R92C_LDOA15_CTRL, R92C_LDOA15_CTRL_OBUF); 3571295874Savos /* Disable digital core power */ 3572295874Savos urtwn_write_1(sc, R92C_LDOV12D_CTRL, 3573295874Savos urtwn_read_1(sc, R92C_LDOV12D_CTRL) & 3574295874Savos ~R92C_LDOV12D_CTRL_LDV12_EN); 3575295874Savos 3576295874Savos /* Enter PFM mode */ 3577295874Savos urtwn_write_1(sc, R92C_SPS0_CTRL, 0x23); 3578295874Savos 3579295874Savos /* Set USB suspend */ 3580295874Savos urtwn_write_2(sc, R92C_APS_FSMCO, 3581295874Savos R92C_APS_FSMCO_APDM_HOST | 3582295874Savos R92C_APS_FSMCO_AFSM_HSUS | 3583295874Savos R92C_APS_FSMCO_PFM_ALDN); 3584295874Savos 3585295874Savos /* Lock ISO/CLK/Power control register. */ 3586295874Savos urtwn_write_1(sc, R92C_RSV_CTRL, 0x0E); 3587295874Savos} 3588295874Savos 3589295874Savosstatic void 3590295874Savosurtwn_r88e_power_off(struct urtwn_softc *sc) 3591295874Savos{ 3592295874Savos uint8_t reg; 3593295874Savos int ntries; 3594295874Savos 3595295874Savos /* Disable any kind of TX reports. */ 3596295874Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 3597295874Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) & 3598295874Savos ~(R88E_TX_RPT1_ENA | R88E_TX_RPT2_ENA)); 3599295874Savos 3600295874Savos /* Stop Rx. */ 3601295874Savos urtwn_write_1(sc, R92C_CR, 0); 3602295874Savos 3603295874Savos /* Move card to Low Power State. */ 3604295874Savos /* Block all Tx queues. */ 3605295874Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 3606295874Savos 3607295874Savos for (ntries = 0; ntries < 20; ntries++) { 3608295874Savos /* Should be zero if no packet is transmitting. */ 3609295874Savos if (urtwn_read_4(sc, R88E_SCH_TXCMD) == 0) 3610295874Savos break; 3611295874Savos 3612295874Savos urtwn_ms_delay(sc); 3613295874Savos } 3614295874Savos if (ntries == 20) { 3615295874Savos device_printf(sc->sc_dev, "%s: failed to block Tx queues\n", 3616295874Savos __func__); 3617295874Savos return; 3618295874Savos } 3619295874Savos 3620295874Savos /* CCK and OFDM are disabled, and clock are gated. */ 3621295874Savos urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3622295874Savos urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~R92C_SYS_FUNC_EN_BBRSTB); 3623295874Savos 3624295874Savos urtwn_ms_delay(sc); 3625295874Savos 3626295874Savos /* Reset MAC TRX */ 3627295874Savos urtwn_write_1(sc, R92C_CR, 3628295874Savos R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3629295874Savos R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | 3630295874Savos R92C_CR_PROTOCOL_EN | R92C_CR_SCHEDULE_EN); 3631295874Savos 3632295874Savos /* check if removed later */ 3633295874Savos urtwn_write_1(sc, R92C_CR + 1, 3634295874Savos urtwn_read_1(sc, R92C_CR + 1) & ~(R92C_CR_ENSEC >> 8)); 3635295874Savos 3636295874Savos /* Respond TxOK to scheduler */ 3637295874Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, 3638295874Savos urtwn_read_1(sc, R92C_DUAL_TSF_RST) | 0x20); 3639295874Savos 3640295874Savos /* If firmware in ram code, do reset. */ 3641295874Savos#ifndef URTWN_WITHOUT_UCODE 3642295874Savos if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RDY) 3643295874Savos urtwn_r88e_fw_reset(sc); 3644295874Savos#endif 3645295874Savos 3646295874Savos /* Reset MCU ready status. */ 3647295874Savos urtwn_write_1(sc, R92C_MCUFWDL, 0x00); 3648295874Savos 3649295874Savos /* Disable 32k. */ 3650295874Savos urtwn_write_1(sc, R88E_32K_CTRL, 3651295874Savos urtwn_read_1(sc, R88E_32K_CTRL) & ~0x01); 3652295874Savos 3653295874Savos /* Move card to Disabled state. */ 3654295874Savos /* Turn off RF. */ 3655295874Savos urtwn_write_1(sc, R92C_RF_CTRL, 0); 3656295874Savos 3657295874Savos /* LDO Sleep mode. */ 3658295874Savos urtwn_write_1(sc, R92C_LPLDO_CTRL, 3659295874Savos urtwn_read_1(sc, R92C_LPLDO_CTRL) | R92C_LPLDO_CTRL_SLEEP); 3660295874Savos 3661295874Savos /* Turn off MAC by HW state machine */ 3662295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3663295874Savos urtwn_read_1(sc, R92C_APS_FSMCO + 1) | 3664295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)); 3665295874Savos 3666295874Savos for (ntries = 0; ntries < 20; ntries++) { 3667295874Savos /* Wait until it will be disabled. */ 3668295874Savos if ((urtwn_read_1(sc, R92C_APS_FSMCO + 1) & 3669295874Savos (R92C_APS_FSMCO_APFM_OFF >> 8)) == 0) 3670295874Savos break; 3671295874Savos 3672295874Savos urtwn_ms_delay(sc); 3673295874Savos } 3674295874Savos if (ntries == 20) { 3675295874Savos device_printf(sc->sc_dev, "%s: could not turn off MAC\n", 3676295874Savos __func__); 3677295874Savos return; 3678295874Savos } 3679295874Savos 3680295874Savos /* schmit trigger */ 3681295874Savos urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3682295874Savos urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3683295874Savos 3684295874Savos /* Enable WL suspend. */ 3685295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 1, 3686295874Savos (urtwn_read_1(sc, R92C_APS_FSMCO + 1) & ~0x10) | 0x08); 3687295874Savos 3688295874Savos /* Enable bandgap mbias in suspend. */ 3689295874Savos urtwn_write_1(sc, R92C_APS_FSMCO + 3, 0); 3690295874Savos 3691295874Savos /* Clear SIC_EN register. */ 3692295874Savos urtwn_write_1(sc, R92C_GPIO_MUXCFG + 1, 3693295874Savos urtwn_read_1(sc, R92C_GPIO_MUXCFG + 1) & ~0x10); 3694295874Savos 3695295874Savos /* Set USB suspend enable local register */ 3696295874Savos urtwn_write_1(sc, R92C_USB_SUSPEND, 3697295874Savos urtwn_read_1(sc, R92C_USB_SUSPEND) | 0x10); 3698295874Savos 3699295874Savos /* Reset MCU IO Wrapper. */ 3700295874Savos reg = urtwn_read_1(sc, R92C_RSV_CTRL + 1); 3701295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08); 3702295874Savos urtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08); 3703295874Savos 3704295874Savos /* marked as 'For Power Consumption' code. */ 3705295874Savos urtwn_write_1(sc, R92C_GPIO_OUT, urtwn_read_1(sc, R92C_GPIO_IN)); 3706295874Savos urtwn_write_1(sc, R92C_GPIO_IOSEL, 0xff); 3707295874Savos 3708295874Savos urtwn_write_1(sc, R92C_GPIO_IO_SEL, 3709295874Savos urtwn_read_1(sc, R92C_GPIO_IO_SEL) << 4); 3710295874Savos urtwn_write_1(sc, R92C_GPIO_MOD, 3711295874Savos urtwn_read_1(sc, R92C_GPIO_MOD) | 0x0f); 3712295874Savos 3713295874Savos /* Set LNA, TRSW, EX_PA Pin to output mode. */ 3714295874Savos urtwn_write_4(sc, R88E_BB_PAD_CTRL, 0x00080808); 3715295874Savos} 3716295874Savos 3717264912Skevlostatic int 3718251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 3719251538Srpaulo{ 3720264912Skevlo int i, error, page_count, pktbuf_count; 3721251538Srpaulo 3722264912Skevlo page_count = (sc->chip & URTWN_CHIP_88E) ? 3723264912Skevlo R88E_TX_PAGE_COUNT : R92C_TX_PAGE_COUNT; 3724264912Skevlo pktbuf_count = (sc->chip & URTWN_CHIP_88E) ? 3725264912Skevlo R88E_TXPKTBUF_COUNT : R92C_TXPKTBUF_COUNT; 3726264912Skevlo 3727264912Skevlo /* Reserve pages [0; page_count]. */ 3728264912Skevlo for (i = 0; i < page_count; i++) { 3729251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3730251538Srpaulo return (error); 3731251538Srpaulo } 3732251538Srpaulo /* NB: 0xff indicates end-of-list. */ 3733251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 3734251538Srpaulo return (error); 3735251538Srpaulo /* 3736264912Skevlo * Use pages [page_count + 1; pktbuf_count - 1] 3737251538Srpaulo * as ring buffer. 3738251538Srpaulo */ 3739264912Skevlo for (++i; i < pktbuf_count - 1; i++) { 3740251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3741251538Srpaulo return (error); 3742251538Srpaulo } 3743251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 3744264912Skevlo error = urtwn_llt_write(sc, i, page_count + 1); 3745251538Srpaulo return (error); 3746251538Srpaulo} 3747251538Srpaulo 3748295871Savos#ifndef URTWN_WITHOUT_UCODE 3749251538Srpaulostatic void 3750251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 3751251538Srpaulo{ 3752251538Srpaulo uint16_t reg; 3753251538Srpaulo int ntries; 3754251538Srpaulo 3755251538Srpaulo /* Tell 8051 to reset itself. */ 3756251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 3757251538Srpaulo 3758251538Srpaulo /* Wait until 8051 resets by itself. */ 3759251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 3760251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3761251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 3762251538Srpaulo return; 3763266472Shselasky urtwn_ms_delay(sc); 3764251538Srpaulo } 3765251538Srpaulo /* Force 8051 reset. */ 3766251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3767251538Srpaulo} 3768251538Srpaulo 3769264912Skevlostatic void 3770264912Skevlourtwn_r88e_fw_reset(struct urtwn_softc *sc) 3771264912Skevlo{ 3772264912Skevlo uint16_t reg; 3773264912Skevlo 3774264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3775264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3776264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN); 3777264912Skevlo} 3778264912Skevlo 3779251538Srpaulostatic int 3780251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 3781251538Srpaulo{ 3782251538Srpaulo uint32_t reg; 3783291698Savos usb_error_t error = USB_ERR_NORMAL_COMPLETION; 3784291698Savos int off, mlen; 3785251538Srpaulo 3786251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3787251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 3788251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3789251538Srpaulo 3790251538Srpaulo off = R92C_FW_START_ADDR; 3791251538Srpaulo while (len > 0) { 3792251538Srpaulo if (len > 196) 3793251538Srpaulo mlen = 196; 3794251538Srpaulo else if (len > 4) 3795251538Srpaulo mlen = 4; 3796251538Srpaulo else 3797251538Srpaulo mlen = 1; 3798251538Srpaulo /* XXX fix this deconst */ 3799281069Srpaulo error = urtwn_write_region_1(sc, off, 3800251538Srpaulo __DECONST(uint8_t *, buf), mlen); 3801291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3802251538Srpaulo break; 3803251538Srpaulo off += mlen; 3804251538Srpaulo buf += mlen; 3805251538Srpaulo len -= mlen; 3806251538Srpaulo } 3807251538Srpaulo return (error); 3808251538Srpaulo} 3809251538Srpaulo 3810251538Srpaulostatic int 3811251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 3812251538Srpaulo{ 3813251538Srpaulo const struct firmware *fw; 3814251538Srpaulo const struct r92c_fw_hdr *hdr; 3815251538Srpaulo const char *imagename; 3816251538Srpaulo const u_char *ptr; 3817251538Srpaulo size_t len; 3818251538Srpaulo uint32_t reg; 3819251538Srpaulo int mlen, ntries, page, error; 3820251538Srpaulo 3821264864Skevlo URTWN_UNLOCK(sc); 3822251538Srpaulo /* Read firmware image from the filesystem. */ 3823264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3824264912Skevlo imagename = "urtwn-rtl8188eufw"; 3825264912Skevlo else if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3826264912Skevlo URTWN_CHIP_UMC_A_CUT) 3827251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 3828251538Srpaulo else 3829251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 3830251538Srpaulo 3831251538Srpaulo fw = firmware_get(imagename); 3832264864Skevlo URTWN_LOCK(sc); 3833251538Srpaulo if (fw == NULL) { 3834251538Srpaulo device_printf(sc->sc_dev, 3835251538Srpaulo "failed loadfirmware of file %s\n", imagename); 3836251538Srpaulo return (ENOENT); 3837251538Srpaulo } 3838251538Srpaulo 3839251538Srpaulo len = fw->datasize; 3840251538Srpaulo 3841251538Srpaulo if (len < sizeof(*hdr)) { 3842251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 3843251538Srpaulo error = EINVAL; 3844251538Srpaulo goto fail; 3845251538Srpaulo } 3846251538Srpaulo ptr = fw->data; 3847251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 3848251538Srpaulo /* Check if there is a valid FW header and skip it. */ 3849251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 3850264912Skevlo (le16toh(hdr->signature) >> 4) == 0x88e || 3851251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 3852294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_FIRMWARE, 3853294471Savos "FW V%d.%d %02d-%02d %02d:%02d\n", 3854251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 3855251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 3856251538Srpaulo ptr += sizeof(*hdr); 3857251538Srpaulo len -= sizeof(*hdr); 3858251538Srpaulo } 3859251538Srpaulo 3860264912Skevlo if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) { 3861264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3862264912Skevlo urtwn_r88e_fw_reset(sc); 3863264912Skevlo else 3864264912Skevlo urtwn_fw_reset(sc); 3865251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 3866251538Srpaulo } 3867264912Skevlo 3868268487Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3869268487Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3870268487Skevlo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3871268487Skevlo R92C_SYS_FUNC_EN_CPUEN); 3872268487Skevlo } 3873251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3874251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 3875251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 3876251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 3877251538Srpaulo 3878263154Skevlo /* Reset the FWDL checksum. */ 3879263154Skevlo urtwn_write_1(sc, R92C_MCUFWDL, 3880263154Skevlo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 3881263154Skevlo 3882251538Srpaulo for (page = 0; len > 0; page++) { 3883251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 3884251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 3885251538Srpaulo if (error != 0) { 3886251538Srpaulo device_printf(sc->sc_dev, 3887251538Srpaulo "could not load firmware page\n"); 3888251538Srpaulo goto fail; 3889251538Srpaulo } 3890251538Srpaulo ptr += mlen; 3891251538Srpaulo len -= mlen; 3892251538Srpaulo } 3893251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3894251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 3895251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 3896251538Srpaulo 3897251538Srpaulo /* Wait for checksum report. */ 3898251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3899251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 3900251538Srpaulo break; 3901266472Shselasky urtwn_ms_delay(sc); 3902251538Srpaulo } 3903251538Srpaulo if (ntries == 1000) { 3904251538Srpaulo device_printf(sc->sc_dev, 3905251538Srpaulo "timeout waiting for checksum report\n"); 3906251538Srpaulo error = ETIMEDOUT; 3907251538Srpaulo goto fail; 3908251538Srpaulo } 3909251538Srpaulo 3910251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3911251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 3912251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3913264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3914264912Skevlo urtwn_r88e_fw_reset(sc); 3915251538Srpaulo /* Wait for firmware readiness. */ 3916251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3917251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 3918251538Srpaulo break; 3919266472Shselasky urtwn_ms_delay(sc); 3920251538Srpaulo } 3921251538Srpaulo if (ntries == 1000) { 3922251538Srpaulo device_printf(sc->sc_dev, 3923251538Srpaulo "timeout waiting for firmware readiness\n"); 3924251538Srpaulo error = ETIMEDOUT; 3925251538Srpaulo goto fail; 3926251538Srpaulo } 3927251538Srpaulofail: 3928251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 3929251538Srpaulo return (error); 3930251538Srpaulo} 3931295871Savos#endif 3932251538Srpaulo 3933291902Skevlostatic int 3934251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 3935251538Srpaulo{ 3936291902Skevlo struct usb_endpoint *ep, *ep_end; 3937291698Savos usb_error_t usb_err; 3938291902Skevlo uint32_t reg; 3939291902Skevlo int hashq, hasnq, haslq, nqueues, ntx; 3940291902Skevlo int error, pagecount, npubqpages, nqpages, nrempages, tx_boundary; 3941281069Srpaulo 3942291695Savos /* Initialize LLT table. */ 3943291695Savos error = urtwn_llt_init(sc); 3944291695Savos if (error != 0) 3945291695Savos return (error); 3946291695Savos 3947291902Skevlo /* Determine the number of bulk-out pipes. */ 3948291902Skevlo ntx = 0; 3949291902Skevlo ep = sc->sc_udev->endpoints; 3950291902Skevlo ep_end = sc->sc_udev->endpoints + sc->sc_udev->endpoints_max; 3951291902Skevlo for (; ep != ep_end; ep++) { 3952291902Skevlo if ((ep->edesc == NULL) || 3953291902Skevlo (ep->iface_index != sc->sc_iface_index)) 3954291902Skevlo continue; 3955291902Skevlo if (UE_GET_DIR(ep->edesc->bEndpointAddress) == UE_DIR_OUT) 3956291902Skevlo ntx++; 3957291902Skevlo } 3958291902Skevlo if (ntx == 0) { 3959291902Skevlo device_printf(sc->sc_dev, 3960291902Skevlo "%d: invalid number of Tx bulk pipes\n", ntx); 3961291698Savos return (EIO); 3962291902Skevlo } 3963291695Savos 3964251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 3965291902Skevlo hashq = hasnq = haslq = nqueues = 0; 3966291902Skevlo switch (ntx) { 3967291902Skevlo case 1: hashq = 1; break; 3968291902Skevlo case 2: hashq = hasnq = 1; break; 3969291902Skevlo case 3: case 4: hashq = hasnq = haslq = 1; break; 3970291902Skevlo } 3971251538Srpaulo nqueues = hashq + hasnq + haslq; 3972251538Srpaulo if (nqueues == 0) 3973251538Srpaulo return (EIO); 3974251538Srpaulo 3975291902Skevlo npubqpages = nqpages = nrempages = pagecount = 0; 3976291902Skevlo if (sc->chip & URTWN_CHIP_88E) 3977291902Skevlo tx_boundary = R88E_TX_PAGE_BOUNDARY; 3978291902Skevlo else { 3979291902Skevlo pagecount = R92C_TX_PAGE_COUNT; 3980291902Skevlo npubqpages = R92C_PUBQ_NPAGES; 3981291902Skevlo tx_boundary = R92C_TX_PAGE_BOUNDARY; 3982291902Skevlo } 3983291902Skevlo 3984251538Srpaulo /* Set number of pages for normal priority queue. */ 3985291902Skevlo if (sc->chip & URTWN_CHIP_88E) { 3986291902Skevlo usb_err = urtwn_write_2(sc, R92C_RQPN_NPQ, 0xd); 3987291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3988291902Skevlo return (EIO); 3989291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 0x808e000d); 3990291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3991291902Skevlo return (EIO); 3992291902Skevlo } else { 3993291902Skevlo /* Get the number of pages for each queue. */ 3994291902Skevlo nqpages = (pagecount - npubqpages) / nqueues; 3995291902Skevlo /* 3996291902Skevlo * The remaining pages are assigned to the high priority 3997291902Skevlo * queue. 3998291902Skevlo */ 3999291902Skevlo nrempages = (pagecount - npubqpages) % nqueues; 4000291902Skevlo usb_err = urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 4001291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4002291902Skevlo return (EIO); 4003291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 4004291902Skevlo /* Set number of pages for public queue. */ 4005291902Skevlo SM(R92C_RQPN_PUBQ, npubqpages) | 4006291902Skevlo /* Set number of pages for high priority queue. */ 4007291902Skevlo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 4008291902Skevlo /* Set number of pages for low priority queue. */ 4009291902Skevlo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 4010291902Skevlo /* Load values. */ 4011291902Skevlo R92C_RQPN_LD); 4012291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4013291902Skevlo return (EIO); 4014291902Skevlo } 4015251538Srpaulo 4016291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary); 4017291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4018291698Savos return (EIO); 4019291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary); 4020291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4021291698Savos return (EIO); 4022291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary); 4023291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4024291698Savos return (EIO); 4025291902Skevlo usb_err = urtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary); 4026291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4027291698Savos return (EIO); 4028291902Skevlo usb_err = urtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary); 4029291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4030291698Savos return (EIO); 4031251538Srpaulo 4032251538Srpaulo /* Set queue to USB pipe mapping. */ 4033251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 4034251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 4035251538Srpaulo if (nqueues == 1) { 4036251538Srpaulo if (hashq) 4037251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 4038251538Srpaulo else if (hasnq) 4039251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 4040251538Srpaulo else 4041251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 4042251538Srpaulo } else if (nqueues == 2) { 4043292056Skevlo /* 4044292056Skevlo * All 2-endpoints configs have high and normal 4045292056Skevlo * priority queues. 4046292056Skevlo */ 4047292056Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 4048251538Srpaulo } else 4049251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 4050291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 4051291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4052291698Savos return (EIO); 4053251538Srpaulo 4054251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 4055291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 4056291902Skevlo (sc->chip & URTWN_CHIP_88E) ? 0x23ff : 0x27ff); 4057291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4058291698Savos return (EIO); 4059251538Srpaulo 4060291902Skevlo /* Set Tx/Rx transfer page size. */ 4061291902Skevlo usb_err = urtwn_write_1(sc, R92C_PBP, 4062291902Skevlo SM(R92C_PBP_PSRX, R92C_PBP_128) | 4063291902Skevlo SM(R92C_PBP_PSTX, R92C_PBP_128)); 4064291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 4065264912Skevlo return (EIO); 4066264912Skevlo 4067264912Skevlo return (0); 4068264912Skevlo} 4069264912Skevlo 4070291698Savosstatic int 4071251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 4072251538Srpaulo{ 4073291698Savos usb_error_t error; 4074251538Srpaulo int i; 4075251538Srpaulo 4076251538Srpaulo /* Write MAC initialization values. */ 4077264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4078264912Skevlo for (i = 0; i < nitems(rtl8188eu_mac); i++) { 4079291698Savos error = urtwn_write_1(sc, rtl8188eu_mac[i].reg, 4080264912Skevlo rtl8188eu_mac[i].val); 4081291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4082291698Savos return (EIO); 4083264912Skevlo } 4084264912Skevlo urtwn_write_1(sc, R92C_MAX_AGGR_NUM, 0x07); 4085264912Skevlo } else { 4086264912Skevlo for (i = 0; i < nitems(rtl8192cu_mac); i++) 4087291698Savos error = urtwn_write_1(sc, rtl8192cu_mac[i].reg, 4088264912Skevlo rtl8192cu_mac[i].val); 4089291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 4090291698Savos return (EIO); 4091264912Skevlo } 4092291698Savos 4093291698Savos return (0); 4094251538Srpaulo} 4095251538Srpaulo 4096251538Srpaulostatic void 4097251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 4098251538Srpaulo{ 4099251538Srpaulo const struct urtwn_bb_prog *prog; 4100251538Srpaulo uint32_t reg; 4101264912Skevlo uint8_t crystalcap; 4102251538Srpaulo int i; 4103251538Srpaulo 4104251538Srpaulo /* Enable BB and RF. */ 4105251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 4106251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 4107251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 4108251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 4109251538Srpaulo 4110264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 4111264912Skevlo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 4112251538Srpaulo 4113251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 4114251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 4115251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 4116251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 4117251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 4118251538Srpaulo 4119264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4120264912Skevlo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 4121264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 4122264912Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 4123264912Skevlo } 4124251538Srpaulo 4125251538Srpaulo /* Select BB programming based on board type. */ 4126264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4127264912Skevlo prog = &rtl8188eu_bb_prog; 4128264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4129251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4130251538Srpaulo prog = &rtl8188ce_bb_prog; 4131251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4132251538Srpaulo prog = &rtl8188ru_bb_prog; 4133251538Srpaulo else 4134251538Srpaulo prog = &rtl8188cu_bb_prog; 4135251538Srpaulo } else { 4136251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4137251538Srpaulo prog = &rtl8192ce_bb_prog; 4138251538Srpaulo else 4139251538Srpaulo prog = &rtl8192cu_bb_prog; 4140251538Srpaulo } 4141251538Srpaulo /* Write BB initialization values. */ 4142251538Srpaulo for (i = 0; i < prog->count; i++) { 4143251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 4144266472Shselasky urtwn_ms_delay(sc); 4145251538Srpaulo } 4146251538Srpaulo 4147251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 4148251538Srpaulo /* 8192C 1T only configuration. */ 4149251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 4150251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 4151251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 4152251538Srpaulo 4153251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 4154251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 4155251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 4156251538Srpaulo 4157251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 4158251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 4159251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 4160251538Srpaulo 4161251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 4162251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 4163251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 4164251538Srpaulo 4165251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 4166251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 4167251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 4168251538Srpaulo 4169251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 4170251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4171251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 4172251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 4173251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4174251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 4175251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 4176251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4177251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 4178251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 4179251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4180251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 4181251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 4182251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 4183251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 4184251538Srpaulo } 4185251538Srpaulo 4186251538Srpaulo /* Write AGC values. */ 4187251538Srpaulo for (i = 0; i < prog->agccount; i++) { 4188251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 4189251538Srpaulo prog->agcvals[i]); 4190266472Shselasky urtwn_ms_delay(sc); 4191251538Srpaulo } 4192251538Srpaulo 4193264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4194264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422); 4195266472Shselasky urtwn_ms_delay(sc); 4196264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420); 4197266472Shselasky urtwn_ms_delay(sc); 4198264912Skevlo 4199294198Savos crystalcap = sc->rom.r88e_rom.crystalcap; 4200264912Skevlo if (crystalcap == 0xff) 4201264912Skevlo crystalcap = 0x20; 4202264912Skevlo crystalcap &= 0x3f; 4203264912Skevlo reg = urtwn_bb_read(sc, R92C_AFE_XTAL_CTRL); 4204264912Skevlo urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL, 4205264912Skevlo RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 4206264912Skevlo crystalcap | crystalcap << 6)); 4207264912Skevlo } else { 4208264912Skevlo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 4209264912Skevlo R92C_HSSI_PARAM2_CCK_HIPWR) 4210264912Skevlo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 4211264912Skevlo } 4212251538Srpaulo} 4213251538Srpaulo 4214289066Skevlostatic void 4215251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 4216251538Srpaulo{ 4217251538Srpaulo const struct urtwn_rf_prog *prog; 4218251538Srpaulo uint32_t reg, type; 4219251538Srpaulo int i, j, idx, off; 4220251538Srpaulo 4221251538Srpaulo /* Select RF programming based on board type. */ 4222264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4223264912Skevlo prog = rtl8188eu_rf_prog; 4224264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 4225251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 4226251538Srpaulo prog = rtl8188ce_rf_prog; 4227251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4228251538Srpaulo prog = rtl8188ru_rf_prog; 4229251538Srpaulo else 4230251538Srpaulo prog = rtl8188cu_rf_prog; 4231251538Srpaulo } else 4232251538Srpaulo prog = rtl8192ce_rf_prog; 4233251538Srpaulo 4234251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4235251538Srpaulo /* Save RF_ENV control type. */ 4236251538Srpaulo idx = i / 2; 4237251538Srpaulo off = (i % 2) * 16; 4238251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4239251538Srpaulo type = (reg >> off) & 0x10; 4240251538Srpaulo 4241251538Srpaulo /* Set RF_ENV enable. */ 4242251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4243251538Srpaulo reg |= 0x100000; 4244251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4245266472Shselasky urtwn_ms_delay(sc); 4246251538Srpaulo /* Set RF_ENV output high. */ 4247251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 4248251538Srpaulo reg |= 0x10; 4249251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 4250266472Shselasky urtwn_ms_delay(sc); 4251251538Srpaulo /* Set address and data lengths of RF registers. */ 4252251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4253251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 4254251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4255266472Shselasky urtwn_ms_delay(sc); 4256251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 4257251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 4258251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 4259266472Shselasky urtwn_ms_delay(sc); 4260251538Srpaulo 4261251538Srpaulo /* Write RF initialization values for this chain. */ 4262251538Srpaulo for (j = 0; j < prog[i].count; j++) { 4263251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 4264251538Srpaulo prog[i].regs[j] <= 0xfe) { 4265251538Srpaulo /* 4266251538Srpaulo * These are fake RF registers offsets that 4267251538Srpaulo * indicate a delay is required. 4268251538Srpaulo */ 4269266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 20); /* 50ms */ 4270251538Srpaulo continue; 4271251538Srpaulo } 4272251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 4273251538Srpaulo prog[i].vals[j]); 4274266472Shselasky urtwn_ms_delay(sc); 4275251538Srpaulo } 4276251538Srpaulo 4277251538Srpaulo /* Restore RF_ENV control type. */ 4278251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 4279251538Srpaulo reg &= ~(0x10 << off) | (type << off); 4280251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 4281251538Srpaulo 4282251538Srpaulo /* Cache RF register CHNLBW. */ 4283251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 4284251538Srpaulo } 4285251538Srpaulo 4286251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 4287251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 4288251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 4289251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 4290251538Srpaulo } 4291251538Srpaulo} 4292251538Srpaulo 4293251538Srpaulostatic void 4294251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 4295251538Srpaulo{ 4296251538Srpaulo /* Invalidate all CAM entries. */ 4297251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 4298251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 4299251538Srpaulo} 4300251538Srpaulo 4301292175Savosstatic int 4302292175Savosurtwn_cam_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 4303292175Savos{ 4304292175Savos usb_error_t error; 4305292175Savos 4306292175Savos error = urtwn_write_4(sc, R92C_CAMWRITE, data); 4307292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4308292175Savos return (EIO); 4309292175Savos error = urtwn_write_4(sc, R92C_CAMCMD, 4310292175Savos R92C_CAMCMD_POLLING | R92C_CAMCMD_WRITE | 4311292175Savos SM(R92C_CAMCMD_ADDR, addr)); 4312292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 4313292175Savos return (EIO); 4314292175Savos 4315292175Savos return (0); 4316292175Savos} 4317292175Savos 4318251538Srpaulostatic void 4319251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 4320251538Srpaulo{ 4321251538Srpaulo uint8_t reg; 4322251538Srpaulo int i; 4323251538Srpaulo 4324251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4325251538Srpaulo if (sc->pa_setting & (1 << i)) 4326251538Srpaulo continue; 4327251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 4328251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 4329251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 4330251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 4331251538Srpaulo } 4332251538Srpaulo if (!(sc->pa_setting & 0x10)) { 4333251538Srpaulo reg = urtwn_read_1(sc, 0x16); 4334251538Srpaulo reg = (reg & ~0xf0) | 0x90; 4335251538Srpaulo urtwn_write_1(sc, 0x16, reg); 4336251538Srpaulo } 4337251538Srpaulo} 4338251538Srpaulo 4339251538Srpaulostatic void 4340251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 4341251538Srpaulo{ 4342290564Savos struct ieee80211com *ic = &sc->sc_ic; 4343290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4344290564Savos uint32_t rcr; 4345290564Savos uint16_t filter; 4346290564Savos 4347290564Savos URTWN_ASSERT_LOCKED(sc); 4348290564Savos 4349251538Srpaulo /* Accept all multicast frames. */ 4350251538Srpaulo urtwn_write_4(sc, R92C_MAR + 0, 0xffffffff); 4351251538Srpaulo urtwn_write_4(sc, R92C_MAR + 4, 0xffffffff); 4352290564Savos 4353290564Savos /* Filter for management frames. */ 4354290564Savos filter = 0x7f3f; 4355290631Savos switch (vap->iv_opmode) { 4356290631Savos case IEEE80211_M_STA: 4357290564Savos filter &= ~( 4358290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | 4359290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | 4360290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); 4361290631Savos break; 4362290631Savos case IEEE80211_M_HOSTAP: 4363290631Savos filter &= ~( 4364290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | 4365296174Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP)); 4366290631Savos break; 4367290631Savos case IEEE80211_M_MONITOR: 4368290651Savos case IEEE80211_M_IBSS: 4369290631Savos break; 4370290631Savos default: 4371290631Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4372290631Savos __func__, vap->iv_opmode); 4373290631Savos break; 4374290564Savos } 4375290564Savos urtwn_write_2(sc, R92C_RXFLTMAP0, filter); 4376290564Savos 4377251538Srpaulo /* Reject all control frames. */ 4378251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 4379290564Savos 4380290564Savos /* Reject all data frames. */ 4381290564Savos urtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); 4382290564Savos 4383290564Savos rcr = R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | 4384290564Savos R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | 4385290564Savos R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; 4386290564Savos 4387290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) { 4388290564Savos /* Accept all frames. */ 4389290564Savos rcr |= R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | 4390290564Savos R92C_RCR_AAP; 4391290564Savos } 4392290564Savos 4393290564Savos /* Set Rx filter. */ 4394290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4395290564Savos 4396290564Savos if (ic->ic_promisc != 0) { 4397290564Savos /* Update Rx filter. */ 4398290564Savos urtwn_set_promisc(sc); 4399290564Savos } 4400251538Srpaulo} 4401251538Srpaulo 4402251538Srpaulostatic void 4403251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 4404251538Srpaulo{ 4405251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 4406251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 4407251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 4408251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 4409251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 4410251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 4411251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 4412251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 4413251538Srpaulo} 4414251538Srpaulo 4415289066Skevlostatic void 4416251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 4417251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4418251538Srpaulo{ 4419251538Srpaulo uint32_t reg; 4420251538Srpaulo 4421251538Srpaulo /* Write per-CCK rate Tx power. */ 4422251538Srpaulo if (chain == 0) { 4423251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 4424251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 4425251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 4426251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4427251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 4428251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 4429251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 4430251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4431251538Srpaulo } else { 4432251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 4433251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 4434251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 4435251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 4436251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 4437251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 4438251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 4439251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 4440251538Srpaulo } 4441251538Srpaulo /* Write per-OFDM rate Tx power. */ 4442251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 4443251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 4444251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 4445251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 4446251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 4447251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 4448251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 4449251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 4450251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 4451251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 4452251538Srpaulo /* Write per-MCS Tx power. */ 4453251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 4454251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 4455251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 4456251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 4457251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 4458251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 4459251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 4460251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 4461251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 4462251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 4463251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 4464251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 4465261506Skevlo SM(R92C_TXAGC_MCS09, power[21]) | 4466251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 4467251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 4468251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 4469251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 4470251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 4471251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 4472251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 4473251538Srpaulo} 4474251538Srpaulo 4475289066Skevlostatic void 4476251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 4477251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4478251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 4479251538Srpaulo{ 4480287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4481291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 4482251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 4483251538Srpaulo const struct urtwn_txpwr *base; 4484251538Srpaulo int ridx, chan, group; 4485251538Srpaulo 4486251538Srpaulo /* Determine channel group. */ 4487251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4488251538Srpaulo if (chan <= 3) 4489251538Srpaulo group = 0; 4490251538Srpaulo else if (chan <= 9) 4491251538Srpaulo group = 1; 4492251538Srpaulo else 4493251538Srpaulo group = 2; 4494251538Srpaulo 4495251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 4496251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 4497251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 4498251538Srpaulo base = &rtl8188ru_txagc[chain]; 4499251538Srpaulo else 4500251538Srpaulo base = &rtl8192cu_txagc[chain]; 4501251538Srpaulo } else 4502251538Srpaulo base = &rtl8192cu_txagc[chain]; 4503251538Srpaulo 4504251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4505251538Srpaulo if (sc->regulatory == 0) { 4506289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4507251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4508251538Srpaulo } 4509289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4510251538Srpaulo if (sc->regulatory == 3) { 4511251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4512251538Srpaulo /* Apply vendor limits. */ 4513251538Srpaulo if (extc != NULL) 4514251538Srpaulo max = rom->ht40_max_pwr[group]; 4515251538Srpaulo else 4516251538Srpaulo max = rom->ht20_max_pwr[group]; 4517251538Srpaulo max = (max >> (chain * 4)) & 0xf; 4518251538Srpaulo if (power[ridx] > max) 4519251538Srpaulo power[ridx] = max; 4520251538Srpaulo } else if (sc->regulatory == 1) { 4521251538Srpaulo if (extc == NULL) 4522251538Srpaulo power[ridx] = base->pwr[group][ridx]; 4523251538Srpaulo } else if (sc->regulatory != 2) 4524251538Srpaulo power[ridx] = base->pwr[0][ridx]; 4525251538Srpaulo } 4526251538Srpaulo 4527251538Srpaulo /* Compute per-CCK rate Tx power. */ 4528251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 4529289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4530251538Srpaulo power[ridx] += cckpow; 4531251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4532251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4533251538Srpaulo } 4534251538Srpaulo 4535251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 4536251538Srpaulo if (sc->ntxchains > 1) { 4537251538Srpaulo /* Apply reduction for 2 spatial streams. */ 4538251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 4539251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4540251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 4541251538Srpaulo } 4542251538Srpaulo 4543251538Srpaulo /* Compute per-OFDM rate Tx power. */ 4544251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 4545251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4546251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 4547289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4548251538Srpaulo power[ridx] += ofdmpow; 4549251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4550251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4551251538Srpaulo } 4552251538Srpaulo 4553251538Srpaulo /* Compute per-MCS Tx power. */ 4554251538Srpaulo if (extc == NULL) { 4555251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 4556251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 4557251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 4558251538Srpaulo } 4559251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 4560251538Srpaulo power[ridx] += htpow; 4561251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 4562251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 4563251538Srpaulo } 4564294471Savos#ifdef USB_DEBUG 4565294471Savos if (sc->sc_debug & URTWN_DEBUG_TXPWR) { 4566251538Srpaulo /* Dump per-rate Tx power values. */ 4567251538Srpaulo printf("Tx power for chain %d:\n", chain); 4568289758Savos for (ridx = URTWN_RIDX_CCK1; ridx < URTWN_RIDX_COUNT; ridx++) 4569251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 4570251538Srpaulo } 4571251538Srpaulo#endif 4572251538Srpaulo} 4573251538Srpaulo 4574289066Skevlostatic void 4575264912Skevlourtwn_r88e_get_txpower(struct urtwn_softc *sc, int chain, 4576264912Skevlo struct ieee80211_channel *c, struct ieee80211_channel *extc, 4577264912Skevlo uint16_t power[URTWN_RIDX_COUNT]) 4578264912Skevlo{ 4579287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4580294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 4581264912Skevlo uint16_t cckpow, ofdmpow, bw20pow, htpow; 4582264912Skevlo const struct urtwn_r88e_txpwr *base; 4583264912Skevlo int ridx, chan, group; 4584264912Skevlo 4585264912Skevlo /* Determine channel group. */ 4586264912Skevlo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4587264912Skevlo if (chan <= 2) 4588264912Skevlo group = 0; 4589264912Skevlo else if (chan <= 5) 4590264912Skevlo group = 1; 4591264912Skevlo else if (chan <= 8) 4592264912Skevlo group = 2; 4593264912Skevlo else if (chan <= 11) 4594264912Skevlo group = 3; 4595264912Skevlo else if (chan <= 13) 4596264912Skevlo group = 4; 4597264912Skevlo else 4598264912Skevlo group = 5; 4599264912Skevlo 4600264912Skevlo /* Get original Tx power based on board type and RF chain. */ 4601264912Skevlo base = &rtl8188eu_txagc[chain]; 4602264912Skevlo 4603264912Skevlo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4604264912Skevlo if (sc->regulatory == 0) { 4605289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4606264912Skevlo power[ridx] = base->pwr[0][ridx]; 4607264912Skevlo } 4608289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4609264912Skevlo if (sc->regulatory == 3) 4610264912Skevlo power[ridx] = base->pwr[0][ridx]; 4611264912Skevlo else if (sc->regulatory == 1) { 4612264912Skevlo if (extc == NULL) 4613264912Skevlo power[ridx] = base->pwr[group][ridx]; 4614264912Skevlo } else if (sc->regulatory != 2) 4615264912Skevlo power[ridx] = base->pwr[0][ridx]; 4616264912Skevlo } 4617264912Skevlo 4618264912Skevlo /* Compute per-CCK rate Tx power. */ 4619294198Savos cckpow = rom->cck_tx_pwr[group]; 4620289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4621264912Skevlo power[ridx] += cckpow; 4622264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4623264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4624264912Skevlo } 4625264912Skevlo 4626294198Savos htpow = rom->ht40_tx_pwr[group]; 4627264912Skevlo 4628264912Skevlo /* Compute per-OFDM rate Tx power. */ 4629264912Skevlo ofdmpow = htpow + sc->ofdm_tx_pwr_diff; 4630289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4631264912Skevlo power[ridx] += ofdmpow; 4632264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4633264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4634264912Skevlo } 4635264912Skevlo 4636264912Skevlo bw20pow = htpow + sc->bw20_tx_pwr_diff; 4637264912Skevlo for (ridx = 12; ridx <= 27; ridx++) { 4638264912Skevlo power[ridx] += bw20pow; 4639264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4640264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4641264912Skevlo } 4642264912Skevlo} 4643264912Skevlo 4644289066Skevlostatic void 4645251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 4646251538Srpaulo struct ieee80211_channel *extc) 4647251538Srpaulo{ 4648251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 4649251538Srpaulo int i; 4650251538Srpaulo 4651251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 4652251538Srpaulo /* Compute per-rate Tx power values. */ 4653264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4654264912Skevlo urtwn_r88e_get_txpower(sc, i, c, extc, power); 4655264912Skevlo else 4656264912Skevlo urtwn_get_txpower(sc, i, c, extc, power); 4657251538Srpaulo /* Write per-rate Tx power values to hardware. */ 4658251538Srpaulo urtwn_write_txpower(sc, i, power); 4659251538Srpaulo } 4660251538Srpaulo} 4661251538Srpaulo 4662251538Srpaulostatic void 4663290048Savosurtwn_set_rx_bssid_all(struct urtwn_softc *sc, int enable) 4664290048Savos{ 4665290048Savos uint32_t reg; 4666290048Savos 4667290048Savos reg = urtwn_read_4(sc, R92C_RCR); 4668290048Savos if (enable) 4669290048Savos reg &= ~R92C_RCR_CBSSID_BCN; 4670290048Savos else 4671290048Savos reg |= R92C_RCR_CBSSID_BCN; 4672290048Savos urtwn_write_4(sc, R92C_RCR, reg); 4673290048Savos} 4674290048Savos 4675290048Savosstatic void 4676290048Savosurtwn_set_gain(struct urtwn_softc *sc, uint8_t gain) 4677290048Savos{ 4678290048Savos uint32_t reg; 4679290048Savos 4680290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 4681290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4682290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 4683290048Savos 4684290048Savos if (!(sc->chip & URTWN_CHIP_88E)) { 4685290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 4686290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4687290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 4688290048Savos } 4689290048Savos} 4690290048Savos 4691290048Savosstatic void 4692251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 4693251538Srpaulo{ 4694290048Savos struct urtwn_softc *sc = ic->ic_softc; 4695290048Savos 4696290048Savos URTWN_LOCK(sc); 4697290048Savos /* Receive beacons / probe responses from any BSSID. */ 4698290651Savos if (ic->ic_opmode != IEEE80211_M_IBSS) 4699290651Savos urtwn_set_rx_bssid_all(sc, 1); 4700290651Savos 4701290048Savos /* Set gain for scanning. */ 4702290048Savos urtwn_set_gain(sc, 0x20); 4703290048Savos URTWN_UNLOCK(sc); 4704251538Srpaulo} 4705251538Srpaulo 4706251538Srpaulostatic void 4707251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 4708251538Srpaulo{ 4709290048Savos struct urtwn_softc *sc = ic->ic_softc; 4710290048Savos 4711290048Savos URTWN_LOCK(sc); 4712290048Savos /* Restore limitations. */ 4713290651Savos if (ic->ic_promisc == 0 && ic->ic_opmode != IEEE80211_M_IBSS) 4714290564Savos urtwn_set_rx_bssid_all(sc, 0); 4715290651Savos 4716290048Savos /* Set gain under link. */ 4717290048Savos urtwn_set_gain(sc, 0x32); 4718290048Savos URTWN_UNLOCK(sc); 4719251538Srpaulo} 4720251538Srpaulo 4721251538Srpaulostatic void 4722251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 4723251538Srpaulo{ 4724286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4725292173Savos struct ieee80211_channel *c = ic->ic_curchan; 4726281070Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4727251538Srpaulo 4728251538Srpaulo URTWN_LOCK(sc); 4729281070Srpaulo if (vap->iv_state == IEEE80211_S_SCAN) { 4730281070Srpaulo /* Make link LED blink during scan. */ 4731281070Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 4732281070Srpaulo } 4733292173Savos urtwn_set_chan(sc, c, NULL); 4734292173Savos sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq); 4735292173Savos sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags); 4736292173Savos sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq); 4737292173Savos sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags); 4738251538Srpaulo URTWN_UNLOCK(sc); 4739251538Srpaulo} 4740251538Srpaulo 4741292014Savosstatic int 4742292014Savosurtwn_wme_update(struct ieee80211com *ic) 4743292014Savos{ 4744292014Savos const struct wmeParams *wmep = 4745292014Savos ic->ic_wme.wme_chanParams.cap_wmeParams; 4746292014Savos struct urtwn_softc *sc = ic->ic_softc; 4747292014Savos uint8_t aifs, acm, slottime; 4748292014Savos int ac; 4749292014Savos 4750292014Savos acm = 0; 4751292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4752292014Savos 4753292014Savos URTWN_LOCK(sc); 4754292014Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4755292014Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4756292014Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4757292014Savos urtwn_write_4(sc, wme2queue[ac].reg, 4758292014Savos SM(R92C_EDCA_PARAM_TXOP, wmep[ac].wmep_txopLimit) | 4759292014Savos SM(R92C_EDCA_PARAM_ECWMIN, wmep[ac].wmep_logcwmin) | 4760292014Savos SM(R92C_EDCA_PARAM_ECWMAX, wmep[ac].wmep_logcwmax) | 4761292014Savos SM(R92C_EDCA_PARAM_AIFS, aifs)); 4762292014Savos if (ac != WME_AC_BE) 4763292014Savos acm |= wmep[ac].wmep_acm << ac; 4764292014Savos } 4765292014Savos 4766292014Savos if (acm != 0) 4767292014Savos acm |= R92C_ACMHWCTRL_EN; 4768292014Savos urtwn_write_1(sc, R92C_ACMHWCTRL, 4769292014Savos (urtwn_read_1(sc, R92C_ACMHWCTRL) & ~R92C_ACMHWCTRL_ACM_MASK) | 4770292014Savos acm); 4771292014Savos 4772292014Savos URTWN_UNLOCK(sc); 4773292014Savos 4774292014Savos return 0; 4775292014Savos} 4776292014Savos 4777251538Srpaulostatic void 4778294465Savosurtwn_update_slot(struct ieee80211com *ic) 4779294465Savos{ 4780294465Savos urtwn_cmd_sleepable(ic->ic_softc, NULL, 0, urtwn_update_slot_cb); 4781294465Savos} 4782294465Savos 4783294465Savosstatic void 4784294465Savosurtwn_update_slot_cb(struct urtwn_softc *sc, union sec_param *data) 4785294465Savos{ 4786294465Savos struct ieee80211com *ic = &sc->sc_ic; 4787294465Savos uint8_t slottime; 4788294465Savos 4789294465Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4790294465Savos 4791294471Savos URTWN_DPRINTF(sc, URTWN_DEBUG_ANY, "%s: setting slot time to %uus\n", 4792294471Savos __func__, slottime); 4793294465Savos 4794294465Savos urtwn_write_1(sc, R92C_SLOT, slottime); 4795294465Savos urtwn_update_aifs(sc, slottime); 4796294465Savos} 4797294465Savos 4798294465Savosstatic void 4799294465Savosurtwn_update_aifs(struct urtwn_softc *sc, uint8_t slottime) 4800294465Savos{ 4801294465Savos const struct wmeParams *wmep = 4802294465Savos sc->sc_ic.ic_wme.wme_chanParams.cap_wmeParams; 4803294465Savos uint8_t aifs, ac; 4804294465Savos 4805294465Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4806294465Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4807294465Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4808294465Savos urtwn_write_1(sc, wme2queue[ac].reg, aifs); 4809294465Savos } 4810294465Savos} 4811294465Savos 4812294465Savosstatic void 4813290564Savosurtwn_set_promisc(struct urtwn_softc *sc) 4814290564Savos{ 4815290564Savos struct ieee80211com *ic = &sc->sc_ic; 4816290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4817290564Savos uint32_t rcr, mask1, mask2; 4818290564Savos 4819290564Savos URTWN_ASSERT_LOCKED(sc); 4820290564Savos 4821290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) 4822290564Savos return; 4823290564Savos 4824290564Savos mask1 = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; 4825290564Savos mask2 = R92C_RCR_APM; 4826290564Savos 4827290564Savos if (vap->iv_state == IEEE80211_S_RUN) { 4828290564Savos switch (vap->iv_opmode) { 4829290564Savos case IEEE80211_M_STA: 4830290631Savos mask2 |= R92C_RCR_CBSSID_DATA; 4831290631Savos /* FALLTHROUGH */ 4832290631Savos case IEEE80211_M_HOSTAP: 4833290631Savos mask2 |= R92C_RCR_CBSSID_BCN; 4834290564Savos break; 4835290651Savos case IEEE80211_M_IBSS: 4836290651Savos mask2 |= R92C_RCR_CBSSID_DATA; 4837290651Savos break; 4838290564Savos default: 4839290564Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4840290564Savos __func__, vap->iv_opmode); 4841290564Savos return; 4842290564Savos } 4843290564Savos } 4844290564Savos 4845290564Savos rcr = urtwn_read_4(sc, R92C_RCR); 4846290564Savos if (ic->ic_promisc == 0) 4847290564Savos rcr = (rcr & ~mask1) | mask2; 4848290564Savos else 4849290564Savos rcr = (rcr & ~mask2) | mask1; 4850290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4851290564Savos} 4852290564Savos 4853290564Savosstatic void 4854290564Savosurtwn_update_promisc(struct ieee80211com *ic) 4855290564Savos{ 4856290564Savos struct urtwn_softc *sc = ic->ic_softc; 4857290564Savos 4858290564Savos URTWN_LOCK(sc); 4859290564Savos if (sc->sc_flags & URTWN_RUNNING) 4860290564Savos urtwn_set_promisc(sc); 4861290564Savos URTWN_UNLOCK(sc); 4862290564Savos} 4863290564Savos 4864290564Savosstatic void 4865283540Sglebiusurtwn_update_mcast(struct ieee80211com *ic) 4866251538Srpaulo{ 4867251538Srpaulo /* XXX do nothing? */ 4868251538Srpaulo} 4869251538Srpaulo 4870292167Savosstatic struct ieee80211_node * 4871292167Savosurtwn_r88e_node_alloc(struct ieee80211vap *vap, 4872292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]) 4873292167Savos{ 4874292167Savos struct urtwn_node *un; 4875292167Savos 4876292167Savos un = malloc(sizeof (struct urtwn_node), M_80211_NODE, 4877292167Savos M_NOWAIT | M_ZERO); 4878292167Savos 4879292167Savos if (un == NULL) 4880292167Savos return NULL; 4881292167Savos 4882292167Savos un->id = URTWN_MACID_UNDEFINED; 4883292167Savos 4884292167Savos return &un->ni; 4885292167Savos} 4886292167Savos 4887251538Srpaulostatic void 4888292167Savosurtwn_r88e_newassoc(struct ieee80211_node *ni, int isnew) 4889292167Savos{ 4890292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 4891292167Savos struct urtwn_node *un = URTWN_NODE(ni); 4892292167Savos uint8_t id; 4893292167Savos 4894292167Savos if (!isnew) 4895292167Savos return; 4896292167Savos 4897292167Savos URTWN_NT_LOCK(sc); 4898292167Savos for (id = 0; id <= URTWN_MACID_MAX(sc); id++) { 4899292167Savos if (id != URTWN_MACID_BC && sc->node_list[id] == NULL) { 4900292167Savos un->id = id; 4901292167Savos sc->node_list[id] = ni; 4902292167Savos break; 4903292167Savos } 4904292167Savos } 4905292167Savos URTWN_NT_UNLOCK(sc); 4906292167Savos 4907292167Savos if (id > URTWN_MACID_MAX(sc)) { 4908292167Savos device_printf(sc->sc_dev, "%s: node table is full\n", 4909292167Savos __func__); 4910292167Savos } 4911292167Savos} 4912292167Savos 4913292167Savosstatic void 4914292167Savosurtwn_r88e_node_free(struct ieee80211_node *ni) 4915292167Savos{ 4916292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 4917292167Savos struct urtwn_node *un = URTWN_NODE(ni); 4918292167Savos 4919292167Savos URTWN_NT_LOCK(sc); 4920292167Savos if (un->id != URTWN_MACID_UNDEFINED) 4921292167Savos sc->node_list[un->id] = NULL; 4922292167Savos URTWN_NT_UNLOCK(sc); 4923292167Savos 4924292167Savos sc->sc_node_free(ni); 4925292167Savos} 4926292167Savos 4927292167Savosstatic void 4928251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 4929251538Srpaulo struct ieee80211_channel *extc) 4930251538Srpaulo{ 4931287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4932251538Srpaulo uint32_t reg; 4933251538Srpaulo u_int chan; 4934251538Srpaulo int i; 4935251538Srpaulo 4936251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4937251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 4938251538Srpaulo device_printf(sc->sc_dev, 4939251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 4940251538Srpaulo return; 4941251538Srpaulo } 4942251538Srpaulo 4943251538Srpaulo /* Set Tx power for this new channel. */ 4944251538Srpaulo urtwn_set_txpower(sc, c, extc); 4945251538Srpaulo 4946251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4947251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 4948251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 4949251538Srpaulo } 4950251538Srpaulo#ifndef IEEE80211_NO_HT 4951251538Srpaulo if (extc != NULL) { 4952251538Srpaulo /* Is secondary channel below or above primary? */ 4953251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 4954251538Srpaulo 4955251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 4956251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 4957251538Srpaulo 4958251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 4959251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 4960251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 4961251538Srpaulo 4962251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 4963251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 4964251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 4965251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 4966251538Srpaulo 4967251538Srpaulo /* Set CCK side band. */ 4968251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 4969251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 4970251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 4971251538Srpaulo 4972251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 4973251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 4974251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 4975251538Srpaulo 4976251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 4977251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 4978251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 4979251538Srpaulo 4980251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 4981251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 4982251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 4983251538Srpaulo 4984251538Srpaulo /* Select 40MHz bandwidth. */ 4985251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 4986251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 4987251538Srpaulo } else 4988251538Srpaulo#endif 4989251538Srpaulo { 4990251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 4991251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 4992251538Srpaulo 4993251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 4994251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 4995251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 4996251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 4997251538Srpaulo 4998264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4999264912Skevlo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 5000264912Skevlo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 5001264912Skevlo R92C_FPGA0_ANAPARAM2_CBW20); 5002264912Skevlo } 5003281069Srpaulo 5004251538Srpaulo /* Select 20MHz bandwidth. */ 5005251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5006281069Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan | 5007264912Skevlo ((sc->chip & URTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 : 5008264912Skevlo R92C_RF_CHNLBW_BW20)); 5009251538Srpaulo } 5010251538Srpaulo} 5011251538Srpaulo 5012251538Srpaulostatic void 5013251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 5014251538Srpaulo{ 5015251538Srpaulo /* TODO */ 5016251538Srpaulo} 5017251538Srpaulo 5018251538Srpaulostatic void 5019251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 5020251538Srpaulo{ 5021251538Srpaulo uint32_t rf_ac[2]; 5022251538Srpaulo uint8_t txmode; 5023251538Srpaulo int i; 5024251538Srpaulo 5025251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 5026251538Srpaulo if ((txmode & 0x70) != 0) { 5027251538Srpaulo /* Disable all continuous Tx. */ 5028251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 5029251538Srpaulo 5030251538Srpaulo /* Set RF mode to standby mode. */ 5031251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 5032251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 5033251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 5034251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 5035251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 5036251538Srpaulo } 5037251538Srpaulo } else { 5038251538Srpaulo /* Block all Tx queues. */ 5039293180Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 5040251538Srpaulo } 5041251538Srpaulo /* Start calibration. */ 5042251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 5043251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 5044251538Srpaulo 5045251538Srpaulo /* Give calibration the time to complete. */ 5046266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 10); /* 100ms */ 5047251538Srpaulo 5048251538Srpaulo /* Restore configuration. */ 5049251538Srpaulo if ((txmode & 0x70) != 0) { 5050251538Srpaulo /* Restore Tx mode. */ 5051251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 5052251538Srpaulo /* Restore RF mode. */ 5053251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 5054251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 5055251538Srpaulo } else { 5056251538Srpaulo /* Unblock all Tx queues. */ 5057251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 5058251538Srpaulo } 5059251538Srpaulo} 5060251538Srpaulo 5061294473Savosstatic void 5062294473Savosurtwn_temp_calib(struct urtwn_softc *sc) 5063294473Savos{ 5064294473Savos uint8_t temp; 5065294473Savos 5066294473Savos URTWN_ASSERT_LOCKED(sc); 5067294473Savos 5068294473Savos if (!(sc->sc_flags & URTWN_TEMP_MEASURED)) { 5069294473Savos /* Start measuring temperature. */ 5070294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5071294473Savos "%s: start measuring temperature\n", __func__); 5072294473Savos if (sc->chip & URTWN_CHIP_88E) { 5073294473Savos urtwn_rf_write(sc, 0, R88E_RF_T_METER, 5074294473Savos R88E_RF_T_METER_START); 5075294473Savos } else { 5076294473Savos urtwn_rf_write(sc, 0, R92C_RF_T_METER, 5077294473Savos R92C_RF_T_METER_START); 5078294473Savos } 5079294473Savos sc->sc_flags |= URTWN_TEMP_MEASURED; 5080294473Savos return; 5081294473Savos } 5082294473Savos sc->sc_flags &= ~URTWN_TEMP_MEASURED; 5083294473Savos 5084294473Savos /* Read measured temperature. */ 5085294473Savos if (sc->chip & URTWN_CHIP_88E) { 5086294473Savos temp = MS(urtwn_rf_read(sc, 0, R88E_RF_T_METER), 5087294473Savos R88E_RF_T_METER_VAL); 5088294473Savos } else { 5089294473Savos temp = MS(urtwn_rf_read(sc, 0, R92C_RF_T_METER), 5090294473Savos R92C_RF_T_METER_VAL); 5091294473Savos } 5092294473Savos if (temp == 0) { /* Read failed, skip. */ 5093294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5094294473Savos "%s: temperature read failed, skipping\n", __func__); 5095294473Savos return; 5096294473Savos } 5097294473Savos 5098294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5099294473Savos "%s: temperature: previous %u, current %u\n", 5100294473Savos __func__, sc->thcal_lctemp, temp); 5101294473Savos 5102294473Savos /* 5103294473Savos * Redo LC calibration if temperature changed significantly since 5104294473Savos * last calibration. 5105294473Savos */ 5106294473Savos if (sc->thcal_lctemp == 0) { 5107294473Savos /* First LC calibration is performed in urtwn_init(). */ 5108294473Savos sc->thcal_lctemp = temp; 5109294473Savos } else if (abs(temp - sc->thcal_lctemp) > 1) { 5110294473Savos URTWN_DPRINTF(sc, URTWN_DEBUG_TEMP, 5111294473Savos "%s: LC calib triggered by temp: %u -> %u\n", 5112294473Savos __func__, sc->thcal_lctemp, temp); 5113294473Savos urtwn_lc_calib(sc); 5114294473Savos /* Record temperature of last LC calibration. */ 5115294473Savos sc->thcal_lctemp = temp; 5116294473Savos } 5117294473Savos} 5118294473Savos 5119291698Savosstatic int 5120287197Sglebiusurtwn_init(struct urtwn_softc *sc) 5121251538Srpaulo{ 5122287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 5123287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 5124287197Sglebius uint8_t macaddr[IEEE80211_ADDR_LEN]; 5125251538Srpaulo uint32_t reg; 5126291698Savos usb_error_t usb_err = USB_ERR_NORMAL_COMPLETION; 5127251538Srpaulo int error; 5128251538Srpaulo 5129291698Savos URTWN_LOCK(sc); 5130291698Savos if (sc->sc_flags & URTWN_RUNNING) { 5131291698Savos URTWN_UNLOCK(sc); 5132291698Savos return (0); 5133291698Savos } 5134264864Skevlo 5135251538Srpaulo /* Init firmware commands ring. */ 5136251538Srpaulo sc->fwcur = 0; 5137251538Srpaulo 5138251538Srpaulo /* Allocate Tx/Rx buffers. */ 5139251538Srpaulo error = urtwn_alloc_rx_list(sc); 5140251538Srpaulo if (error != 0) 5141251538Srpaulo goto fail; 5142281069Srpaulo 5143251538Srpaulo error = urtwn_alloc_tx_list(sc); 5144251538Srpaulo if (error != 0) 5145251538Srpaulo goto fail; 5146251538Srpaulo 5147251538Srpaulo /* Power on adapter. */ 5148251538Srpaulo error = urtwn_power_on(sc); 5149251538Srpaulo if (error != 0) 5150251538Srpaulo goto fail; 5151251538Srpaulo 5152251538Srpaulo /* Initialize DMA. */ 5153251538Srpaulo error = urtwn_dma_init(sc); 5154251538Srpaulo if (error != 0) 5155251538Srpaulo goto fail; 5156251538Srpaulo 5157251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 5158251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 5159251538Srpaulo 5160251538Srpaulo /* Init interrupts. */ 5161264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5162291698Savos usb_err = urtwn_write_4(sc, R88E_HISR, 0xffffffff); 5163291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5164291698Savos goto fail; 5165291698Savos usb_err = urtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | 5166264912Skevlo R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); 5167291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5168291698Savos goto fail; 5169291698Savos usb_err = urtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | 5170264912Skevlo R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); 5171291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5172291698Savos goto fail; 5173291698Savos usb_err = urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5174264912Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5175264912Skevlo R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); 5176291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5177291698Savos goto fail; 5178264912Skevlo } else { 5179291698Savos usb_err = urtwn_write_4(sc, R92C_HISR, 0xffffffff); 5180291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5181291698Savos goto fail; 5182291698Savos usb_err = urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 5183291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5184291698Savos goto fail; 5185264912Skevlo } 5186251538Srpaulo 5187251538Srpaulo /* Set MAC address. */ 5188287197Sglebius IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 5189291698Savos usb_err = urtwn_write_region_1(sc, R92C_MACID, macaddr, IEEE80211_ADDR_LEN); 5190291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5191291698Savos goto fail; 5192251538Srpaulo 5193251538Srpaulo /* Set initial network type. */ 5194289811Savos urtwn_set_mode(sc, R92C_MSR_INFRA); 5195251538Srpaulo 5196290564Savos /* Initialize Rx filter. */ 5197251538Srpaulo urtwn_rxfilter_init(sc); 5198251538Srpaulo 5199282623Skevlo /* Set response rate. */ 5200251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 5201251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 5202251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 5203251538Srpaulo 5204251538Srpaulo /* Set short/long retry limits. */ 5205251538Srpaulo urtwn_write_2(sc, R92C_RL, 5206251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 5207251538Srpaulo 5208251538Srpaulo /* Initialize EDCA parameters. */ 5209251538Srpaulo urtwn_edca_init(sc); 5210251538Srpaulo 5211251538Srpaulo /* Setup rate fallback. */ 5212264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5213264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 5214264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 5215264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 5216264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 5217264912Skevlo } 5218251538Srpaulo 5219251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 5220251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 5221251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 5222251538Srpaulo /* Set ACK timeout. */ 5223251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 5224251538Srpaulo 5225251538Srpaulo /* Setup USB aggregation. */ 5226251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 5227251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 5228251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 5229251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 5230251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 5231251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 5232251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 5233264912Skevlo if (sc->chip & URTWN_CHIP_88E) 5234264912Skevlo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); 5235282266Skevlo else { 5236264912Skevlo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 5237282266Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 5238282266Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 5239282266Skevlo R92C_USB_SPECIAL_OPTION_AGG_EN); 5240282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 5241282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 5242282266Skevlo } 5243251538Srpaulo 5244251538Srpaulo /* Initialize beacon parameters. */ 5245264912Skevlo urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010); 5246251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 5247251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 5248251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 5249251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 5250251538Srpaulo 5251264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5252264912Skevlo /* Setup AMPDU aggregation. */ 5253264912Skevlo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 5254264912Skevlo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 5255264912Skevlo urtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); 5256251538Srpaulo 5257264912Skevlo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 5258264912Skevlo } 5259251538Srpaulo 5260295871Savos#ifndef URTWN_WITHOUT_UCODE 5261251538Srpaulo /* Load 8051 microcode. */ 5262251538Srpaulo error = urtwn_load_firmware(sc); 5263295871Savos if (error == 0) 5264295871Savos sc->sc_flags |= URTWN_FW_LOADED; 5265295871Savos#endif 5266251538Srpaulo 5267251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 5268291698Savos error = urtwn_mac_init(sc); 5269291698Savos if (error != 0) { 5270291698Savos device_printf(sc->sc_dev, 5271291698Savos "%s: error while initializing MAC block\n", __func__); 5272291698Savos goto fail; 5273291698Savos } 5274251538Srpaulo urtwn_bb_init(sc); 5275251538Srpaulo urtwn_rf_init(sc); 5276251538Srpaulo 5277290564Savos /* Reinitialize Rx filter (D3845 is not committed yet). */ 5278290564Savos urtwn_rxfilter_init(sc); 5279290564Savos 5280264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 5281264912Skevlo urtwn_write_2(sc, R92C_CR, 5282264912Skevlo urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN | 5283264912Skevlo R92C_CR_MACRXEN); 5284264912Skevlo } 5285264912Skevlo 5286251538Srpaulo /* Turn CCK and OFDM blocks on. */ 5287251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5288251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 5289291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5290291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5291291698Savos goto fail; 5292251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 5293251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 5294291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 5295291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5296291698Savos goto fail; 5297251538Srpaulo 5298251538Srpaulo /* Clear per-station keys table. */ 5299251538Srpaulo urtwn_cam_init(sc); 5300251538Srpaulo 5301292175Savos /* Enable decryption / encryption. */ 5302292175Savos urtwn_write_2(sc, R92C_SECCFG, 5303292175Savos R92C_SECCFG_TXUCKEY_DEF | R92C_SECCFG_RXUCKEY_DEF | 5304292175Savos R92C_SECCFG_TXENC_ENA | R92C_SECCFG_RXDEC_ENA | 5305292175Savos R92C_SECCFG_TXBCKEY_DEF | R92C_SECCFG_RXBCKEY_DEF); 5306292175Savos 5307292175Savos /* 5308292175Savos * Install static keys (if any). 5309292175Savos * Must be called after urtwn_cam_init(). 5310292175Savos */ 5311292175Savos ieee80211_runtask(ic, &sc->cmdq_task); 5312292175Savos 5313251538Srpaulo /* Enable hardware sequence numbering. */ 5314293180Savos urtwn_write_1(sc, R92C_HWSEQ_CTRL, R92C_TX_QUEUE_ALL); 5315251538Srpaulo 5316292167Savos /* Enable per-packet TX report. */ 5317292167Savos if (sc->chip & URTWN_CHIP_88E) { 5318292167Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 5319292167Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) | R88E_TX_RPT1_ENA); 5320292167Savos } 5321292167Savos 5322251538Srpaulo /* Perform LO and IQ calibrations. */ 5323251538Srpaulo urtwn_iq_calib(sc); 5324251538Srpaulo /* Perform LC calibration. */ 5325251538Srpaulo urtwn_lc_calib(sc); 5326251538Srpaulo 5327251538Srpaulo /* Fix USB interference issue. */ 5328264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 5329264912Skevlo urtwn_write_1(sc, 0xfe40, 0xe0); 5330264912Skevlo urtwn_write_1(sc, 0xfe41, 0x8d); 5331264912Skevlo urtwn_write_1(sc, 0xfe42, 0x80); 5332251538Srpaulo 5333264912Skevlo urtwn_pa_bias_init(sc); 5334264912Skevlo } 5335251538Srpaulo 5336251538Srpaulo /* Initialize GPIO setting. */ 5337251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 5338251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 5339251538Srpaulo 5340251538Srpaulo /* Fix for lower temperature. */ 5341264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 5342264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 5343251538Srpaulo 5344251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 5345251538Srpaulo 5346287197Sglebius sc->sc_flags |= URTWN_RUNNING; 5347251538Srpaulo 5348251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5349251538Srpaulofail: 5350291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 5351291698Savos error = EIO; 5352291698Savos 5353291698Savos URTWN_UNLOCK(sc); 5354291698Savos 5355291698Savos return (error); 5356251538Srpaulo} 5357251538Srpaulo 5358251538Srpaulostatic void 5359287197Sglebiusurtwn_stop(struct urtwn_softc *sc) 5360251538Srpaulo{ 5361251538Srpaulo 5362291698Savos URTWN_LOCK(sc); 5363291698Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 5364291698Savos URTWN_UNLOCK(sc); 5365291698Savos return; 5366291698Savos } 5367291698Savos 5368295871Savos sc->sc_flags &= ~(URTWN_RUNNING | URTWN_FW_LOADED | 5369295871Savos URTWN_TEMP_MEASURED); 5370294473Savos sc->thcal_lctemp = 0; 5371251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 5372295874Savos 5373251538Srpaulo urtwn_abort_xfers(sc); 5374288353Sadrian urtwn_drain_mbufq(sc); 5375295874Savos urtwn_power_off(sc); 5376291698Savos URTWN_UNLOCK(sc); 5377251538Srpaulo} 5378251538Srpaulo 5379251538Srpaulostatic void 5380251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 5381251538Srpaulo{ 5382251538Srpaulo int i; 5383251538Srpaulo 5384251538Srpaulo URTWN_ASSERT_LOCKED(sc); 5385251538Srpaulo 5386251538Srpaulo /* abort any pending transfers */ 5387251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 5388251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 5389251538Srpaulo} 5390251538Srpaulo 5391251538Srpaulostatic int 5392251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 5393251538Srpaulo const struct ieee80211_bpf_params *params) 5394251538Srpaulo{ 5395251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 5396286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 5397251538Srpaulo struct urtwn_data *bf; 5398290630Savos int error; 5399251538Srpaulo 5400297596Sadrian URTWN_DPRINTF(sc, URTWN_DEBUG_XMIT, "%s: called; m=%p\n", 5401297596Sadrian __func__, 5402297596Sadrian m); 5403297596Sadrian 5404251538Srpaulo /* prevent management frames from being sent if we're not ready */ 5405290630Savos URTWN_LOCK(sc); 5406287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) { 5407290630Savos error = ENETDOWN; 5408290630Savos goto end; 5409251538Srpaulo } 5410290630Savos 5411251538Srpaulo bf = urtwn_getbuf(sc); 5412251538Srpaulo if (bf == NULL) { 5413290630Savos error = ENOBUFS; 5414290630Savos goto end; 5415251538Srpaulo } 5416251538Srpaulo 5417292221Savos if (params == NULL) { 5418292221Savos /* 5419292221Savos * Legacy path; interpret frame contents to decide 5420292221Savos * precisely how to send the frame. 5421292221Savos */ 5422292221Savos error = urtwn_tx_data(sc, ni, m, bf); 5423292221Savos } else { 5424292221Savos /* 5425292221Savos * Caller supplied explicit parameters to use in 5426292221Savos * sending the frame. 5427292221Savos */ 5428292221Savos error = urtwn_tx_raw(sc, ni, m, bf, params); 5429292221Savos } 5430292221Savos if (error != 0) { 5431251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 5432290630Savos goto end; 5433251538Srpaulo } 5434290630Savos 5435288353Sadrian sc->sc_txtimer = 5; 5436290630Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 5437290630Savos 5438290630Savosend: 5439290630Savos if (error != 0) 5440290630Savos m_freem(m); 5441290630Savos 5442251538Srpaulo URTWN_UNLOCK(sc); 5443251538Srpaulo 5444290630Savos return (error); 5445251538Srpaulo} 5446251538Srpaulo 5447266472Shselaskystatic void 5448266472Shselaskyurtwn_ms_delay(struct urtwn_softc *sc) 5449266472Shselasky{ 5450266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 1000); 5451266472Shselasky} 5452266472Shselasky 5453251538Srpaulostatic device_method_t urtwn_methods[] = { 5454251538Srpaulo /* Device interface */ 5455251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 5456251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 5457251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 5458251538Srpaulo 5459264912Skevlo DEVMETHOD_END 5460251538Srpaulo}; 5461251538Srpaulo 5462251538Srpaulostatic driver_t urtwn_driver = { 5463251538Srpaulo "urtwn", 5464251538Srpaulo urtwn_methods, 5465251538Srpaulo sizeof(struct urtwn_softc) 5466251538Srpaulo}; 5467251538Srpaulo 5468251538Srpaulostatic devclass_t urtwn_devclass; 5469251538Srpaulo 5470251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 5471251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 5472251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 5473295871Savos#ifndef URTWN_WITHOUT_UCODE 5474251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 5475295871Savos#endif 5476251538SrpauloMODULE_VERSION(urtwn, 1); 5477292080SimpUSB_PNP_HOST_INFO(urtwn_devs); 5478