if_urtwn.c revision 294198
1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5264912Skevlo * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6292176Savos * Copyright (c) 2015 Andriy Voskoboinyk <avos@FreeBSD.org> 7251538Srpaulo * 8251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 9251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 10251538Srpaulo * copyright notice and this permission notice appear in all copies. 11251538Srpaulo * 12251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19251538Srpaulo */ 20251538Srpaulo 21251538Srpaulo#include <sys/cdefs.h> 22251538Srpaulo__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtwn.c 294198 2016-01-17 00:52:21Z avos $"); 23251538Srpaulo 24251538Srpaulo/* 25264912Skevlo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU. 26251538Srpaulo */ 27251538Srpaulo 28288353Sadrian#include "opt_wlan.h" 29288353Sadrian 30251538Srpaulo#include <sys/param.h> 31251538Srpaulo#include <sys/sockio.h> 32251538Srpaulo#include <sys/sysctl.h> 33251538Srpaulo#include <sys/lock.h> 34251538Srpaulo#include <sys/mutex.h> 35291902Skevlo#include <sys/condvar.h> 36251538Srpaulo#include <sys/mbuf.h> 37251538Srpaulo#include <sys/kernel.h> 38251538Srpaulo#include <sys/socket.h> 39251538Srpaulo#include <sys/systm.h> 40251538Srpaulo#include <sys/malloc.h> 41251538Srpaulo#include <sys/module.h> 42251538Srpaulo#include <sys/bus.h> 43251538Srpaulo#include <sys/endian.h> 44251538Srpaulo#include <sys/linker.h> 45251538Srpaulo#include <sys/firmware.h> 46251538Srpaulo#include <sys/kdb.h> 47251538Srpaulo 48251538Srpaulo#include <machine/bus.h> 49251538Srpaulo#include <machine/resource.h> 50251538Srpaulo#include <sys/rman.h> 51251538Srpaulo 52251538Srpaulo#include <net/bpf.h> 53251538Srpaulo#include <net/if.h> 54257176Sglebius#include <net/if_var.h> 55251538Srpaulo#include <net/if_arp.h> 56251538Srpaulo#include <net/ethernet.h> 57251538Srpaulo#include <net/if_dl.h> 58251538Srpaulo#include <net/if_media.h> 59251538Srpaulo#include <net/if_types.h> 60251538Srpaulo 61251538Srpaulo#include <netinet/in.h> 62251538Srpaulo#include <netinet/in_systm.h> 63251538Srpaulo#include <netinet/in_var.h> 64251538Srpaulo#include <netinet/if_ether.h> 65251538Srpaulo#include <netinet/ip.h> 66251538Srpaulo 67251538Srpaulo#include <net80211/ieee80211_var.h> 68288088Sadrian#include <net80211/ieee80211_input.h> 69251538Srpaulo#include <net80211/ieee80211_regdomain.h> 70251538Srpaulo#include <net80211/ieee80211_radiotap.h> 71251538Srpaulo#include <net80211/ieee80211_ratectl.h> 72251538Srpaulo 73251538Srpaulo#include <dev/usb/usb.h> 74251538Srpaulo#include <dev/usb/usbdi.h> 75291902Skevlo#include <dev/usb/usb_device.h> 76251538Srpaulo#include "usbdevs.h" 77251538Srpaulo 78251538Srpaulo#define USB_DEBUG_VAR urtwn_debug 79251538Srpaulo#include <dev/usb/usb_debug.h> 80251538Srpaulo 81251538Srpaulo#include <dev/usb/wlan/if_urtwnreg.h> 82289167Sadrian#include <dev/usb/wlan/if_urtwnvar.h> 83251538Srpaulo 84251538Srpaulo#ifdef USB_DEBUG 85251538Srpaulostatic int urtwn_debug = 0; 86251538Srpaulo 87251538SrpauloSYSCTL_NODE(_hw_usb, OID_AUTO, urtwn, CTLFLAG_RW, 0, "USB urtwn"); 88276701ShselaskySYSCTL_INT(_hw_usb_urtwn, OID_AUTO, debug, CTLFLAG_RWTUN, &urtwn_debug, 0, 89251538Srpaulo "Debug level"); 90251538Srpaulo#endif 91251538Srpaulo 92288088Sadrian#define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 93251538Srpaulo 94251538Srpaulo/* various supported device vendors/products */ 95251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 96251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 97264912Skevlo#define URTWN_RTL8188E_DEV(v,p) \ 98264912Skevlo { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTWN_RTL8188E) } 99264912Skevlo#define URTWN_RTL8188E 1 100251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 101251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 102251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 103251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 104266721Skevlo URTWN_DEV(ASUS, USBN10NANO), 105251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 106251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 107251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 108251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 109251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 110251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 111251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 112251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 113251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 114251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 115251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 116251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 117251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 118251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 119251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 120251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 121252196Skevlo URTWN_DEV(DLINK, DWA131B), 122251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 123251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 124251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 125251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 126251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 127251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 128251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 129251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 130251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 131251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 132251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 133251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 134251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 135251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 136251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 137251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 138251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 139251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 140251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 141251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 142251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 143251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 144251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 145282119Skevlo URTWN_DEV(REALTEK, RTL8188CU_3), 146251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 147251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 148251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 149251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 150272410Shselasky URTWN_DEV(REALTEK, RTL8188RU_3), 151251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 152251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 153251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 154251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 155251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 156251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 157251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 158251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 159251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 160264912Skevlo /* URTWN_RTL8188E */ 161273589Skevlo URTWN_RTL8188E_DEV(DLINK, DWA123D1), 162270191Skevlo URTWN_RTL8188E_DEV(DLINK, DWA125D1), 163273589Skevlo URTWN_RTL8188E_DEV(ELECOM, WDC150SU2M), 164264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188ETV), 165264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188EU), 166264912Skevlo#undef URTWN_RTL8188E_DEV 167251538Srpaulo#undef URTWN_DEV 168251538Srpaulo}; 169251538Srpaulo 170251538Srpaulostatic device_probe_t urtwn_match; 171251538Srpaulostatic device_attach_t urtwn_attach; 172251538Srpaulostatic device_detach_t urtwn_detach; 173251538Srpaulo 174251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 175251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 176251538Srpaulo 177288353Sadrianstatic void urtwn_drain_mbufq(struct urtwn_softc *sc); 178287197Sglebiusstatic usb_error_t urtwn_do_request(struct urtwn_softc *, 179287197Sglebius struct usb_device_request *, void *); 180251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 181251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 182251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 183251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 184251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 185292207Savosstatic struct mbuf * urtwn_rx_copy_to_mbuf(struct urtwn_softc *, 186292207Savos struct r92c_rx_stat *, int); 187292207Savosstatic struct mbuf * urtwn_report_intr(struct usb_xfer *, 188292207Savos struct urtwn_data *); 189292207Savosstatic struct mbuf * urtwn_rxeof(struct urtwn_softc *, uint8_t *, int); 190292167Savosstatic void urtwn_r88e_ratectl_tx_complete(struct urtwn_softc *, 191292167Savos void *); 192292207Savosstatic struct ieee80211_node *urtwn_rx_frame(struct urtwn_softc *, 193292207Savos struct mbuf *, int8_t *); 194289891Savosstatic void urtwn_txeof(struct urtwn_softc *, struct urtwn_data *, 195289891Savos int); 196281069Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 197251538Srpaulo struct urtwn_data[], int, int); 198251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 199251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 200251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 201251538Srpaulo struct urtwn_data data[], int); 202289066Skevlostatic void urtwn_free_rx_list(struct urtwn_softc *); 203289066Skevlostatic void urtwn_free_tx_list(struct urtwn_softc *); 204251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 205251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 206291698Savosstatic usb_error_t urtwn_write_region_1(struct urtwn_softc *, uint16_t, 207251538Srpaulo uint8_t *, int); 208291698Savosstatic usb_error_t urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 209291698Savosstatic usb_error_t urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 210291698Savosstatic usb_error_t urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 211291698Savosstatic usb_error_t urtwn_read_region_1(struct urtwn_softc *, uint16_t, 212251538Srpaulo uint8_t *, int); 213251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 214251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 215251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 216281069Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 217251538Srpaulo const void *, int); 218292174Savosstatic void urtwn_cmdq_cb(void *, int); 219292174Savosstatic int urtwn_cmd_sleepable(struct urtwn_softc *, const void *, 220292174Savos size_t, CMD_FUNC_PROTO); 221264912Skevlostatic void urtwn_r92c_rf_write(struct urtwn_softc *, int, 222264912Skevlo uint8_t, uint32_t); 223281069Srpaulostatic void urtwn_r88e_rf_write(struct urtwn_softc *, int, 224264912Skevlo uint8_t, uint32_t); 225251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 226281069Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 227251538Srpaulo uint32_t); 228291264Savosstatic int urtwn_efuse_read_next(struct urtwn_softc *, uint8_t *); 229291264Savosstatic int urtwn_efuse_read_data(struct urtwn_softc *, uint8_t *, 230291264Savos uint8_t, uint8_t); 231291264Savos#ifdef URTWN_DEBUG 232291264Savosstatic void urtwn_dump_rom_contents(struct urtwn_softc *, 233291264Savos uint8_t *, uint16_t); 234291264Savos#endif 235291264Savosstatic int urtwn_efuse_read(struct urtwn_softc *, uint8_t *, 236291264Savos uint16_t); 237291698Savosstatic int urtwn_efuse_switch_power(struct urtwn_softc *); 238251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 239291264Savosstatic int urtwn_read_rom(struct urtwn_softc *); 240291264Savosstatic int urtwn_r88e_read_rom(struct urtwn_softc *); 241251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 242290631Savosstatic void urtwn_init_beacon(struct urtwn_softc *, 243290631Savos struct urtwn_vap *); 244290631Savosstatic int urtwn_setup_beacon(struct urtwn_softc *, 245290631Savos struct ieee80211_node *); 246290631Savosstatic void urtwn_update_beacon(struct ieee80211vap *, int); 247290631Savosstatic int urtwn_tx_beacon(struct urtwn_softc *sc, 248290631Savos struct urtwn_vap *); 249292175Savosstatic int urtwn_key_alloc(struct ieee80211vap *, 250292175Savos struct ieee80211_key *, ieee80211_keyix *, 251292175Savos ieee80211_keyix *); 252292175Savosstatic void urtwn_key_set_cb(struct urtwn_softc *, 253292175Savos union sec_param *); 254292175Savosstatic void urtwn_key_del_cb(struct urtwn_softc *, 255292175Savos union sec_param *); 256292175Savosstatic int urtwn_key_set(struct ieee80211vap *, 257292175Savos const struct ieee80211_key *); 258292175Savosstatic int urtwn_key_delete(struct ieee80211vap *, 259292175Savos const struct ieee80211_key *); 260290651Savosstatic void urtwn_tsf_task_adhoc(void *, int); 261290631Savosstatic void urtwn_tsf_sync_enable(struct urtwn_softc *, 262290631Savos struct ieee80211vap *); 263292203Savosstatic void urtwn_get_tsf(struct urtwn_softc *, uint64_t *); 264251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 265289811Savosstatic void urtwn_set_mode(struct urtwn_softc *, uint8_t); 266290651Savosstatic void urtwn_ibss_recv_mgmt(struct ieee80211_node *, 267290651Savos struct mbuf *, int, 268290651Savos const struct ieee80211_rx_stats *, int, int); 269281069Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 270251538Srpaulo enum ieee80211_state, int); 271251538Srpaulostatic void urtwn_watchdog(void *); 272251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 273251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 274264912Skevlostatic int8_t urtwn_r88e_get_rssi(struct urtwn_softc *, int, void *); 275290630Savosstatic int urtwn_tx_data(struct urtwn_softc *, 276251538Srpaulo struct ieee80211_node *, struct mbuf *, 277251538Srpaulo struct urtwn_data *); 278292221Savosstatic int urtwn_tx_raw(struct urtwn_softc *, 279292221Savos struct ieee80211_node *, struct mbuf *, 280292221Savos struct urtwn_data *, 281292221Savos const struct ieee80211_bpf_params *); 282290630Savosstatic void urtwn_tx_start(struct urtwn_softc *, struct mbuf *, 283290630Savos uint8_t, struct urtwn_data *); 284287197Sglebiusstatic int urtwn_transmit(struct ieee80211com *, struct mbuf *); 285287197Sglebiusstatic void urtwn_start(struct urtwn_softc *); 286287197Sglebiusstatic void urtwn_parent(struct ieee80211com *); 287264912Skevlostatic int urtwn_r92c_power_on(struct urtwn_softc *); 288264912Skevlostatic int urtwn_r88e_power_on(struct urtwn_softc *); 289251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 290251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 291264912Skevlostatic void urtwn_r88e_fw_reset(struct urtwn_softc *); 292281069Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 293251538Srpaulo const uint8_t *, int); 294251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 295291902Skevlostatic int urtwn_dma_init(struct urtwn_softc *); 296291698Savosstatic int urtwn_mac_init(struct urtwn_softc *); 297251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 298251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 299251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 300292175Savosstatic int urtwn_cam_write(struct urtwn_softc *, uint32_t, 301292175Savos uint32_t); 302251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 303251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 304251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 305281069Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 306251538Srpaulo uint16_t[]); 307251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 308281069Srpaulo struct ieee80211_channel *, 309251538Srpaulo struct ieee80211_channel *, uint16_t[]); 310264912Skevlostatic void urtwn_r88e_get_txpower(struct urtwn_softc *, int, 311281069Srpaulo struct ieee80211_channel *, 312264912Skevlo struct ieee80211_channel *, uint16_t[]); 313251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 314281069Srpaulo struct ieee80211_channel *, 315251538Srpaulo struct ieee80211_channel *); 316290048Savosstatic void urtwn_set_rx_bssid_all(struct urtwn_softc *, int); 317290048Savosstatic void urtwn_set_gain(struct urtwn_softc *, uint8_t); 318251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 319251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 320251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 321292014Savosstatic int urtwn_wme_update(struct ieee80211com *); 322290564Savosstatic void urtwn_set_promisc(struct urtwn_softc *); 323290564Savosstatic void urtwn_update_promisc(struct ieee80211com *); 324289066Skevlostatic void urtwn_update_mcast(struct ieee80211com *); 325292167Savosstatic struct ieee80211_node *urtwn_r88e_node_alloc(struct ieee80211vap *, 326292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]); 327292167Savosstatic void urtwn_r88e_newassoc(struct ieee80211_node *, int); 328292167Savosstatic void urtwn_r88e_node_free(struct ieee80211_node *); 329251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 330281069Srpaulo struct ieee80211_channel *, 331251538Srpaulo struct ieee80211_channel *); 332251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 333251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 334291698Savosstatic int urtwn_init(struct urtwn_softc *); 335287197Sglebiusstatic void urtwn_stop(struct urtwn_softc *); 336251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 337251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 338251538Srpaulo const struct ieee80211_bpf_params *); 339266472Shselaskystatic void urtwn_ms_delay(struct urtwn_softc *); 340251538Srpaulo 341251538Srpaulo/* Aliases. */ 342251538Srpaulo#define urtwn_bb_write urtwn_write_4 343251538Srpaulo#define urtwn_bb_read urtwn_read_4 344251538Srpaulo 345251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 346251538Srpaulo [URTWN_BULK_RX] = { 347251538Srpaulo .type = UE_BULK, 348251538Srpaulo .endpoint = UE_ADDR_ANY, 349251538Srpaulo .direction = UE_DIR_IN, 350251538Srpaulo .bufsize = URTWN_RXBUFSZ, 351251538Srpaulo .flags = { 352251538Srpaulo .pipe_bof = 1, 353251538Srpaulo .short_xfer_ok = 1 354251538Srpaulo }, 355251538Srpaulo .callback = urtwn_bulk_rx_callback, 356251538Srpaulo }, 357251538Srpaulo [URTWN_BULK_TX_BE] = { 358251538Srpaulo .type = UE_BULK, 359251538Srpaulo .endpoint = 0x03, 360251538Srpaulo .direction = UE_DIR_OUT, 361251538Srpaulo .bufsize = URTWN_TXBUFSZ, 362251538Srpaulo .flags = { 363251538Srpaulo .ext_buffer = 1, 364251538Srpaulo .pipe_bof = 1, 365251538Srpaulo .force_short_xfer = 1 366251538Srpaulo }, 367251538Srpaulo .callback = urtwn_bulk_tx_callback, 368251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 369251538Srpaulo }, 370251538Srpaulo [URTWN_BULK_TX_BK] = { 371251538Srpaulo .type = UE_BULK, 372251538Srpaulo .endpoint = 0x03, 373251538Srpaulo .direction = UE_DIR_OUT, 374251538Srpaulo .bufsize = URTWN_TXBUFSZ, 375251538Srpaulo .flags = { 376251538Srpaulo .ext_buffer = 1, 377251538Srpaulo .pipe_bof = 1, 378251538Srpaulo .force_short_xfer = 1, 379251538Srpaulo }, 380251538Srpaulo .callback = urtwn_bulk_tx_callback, 381251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 382251538Srpaulo }, 383251538Srpaulo [URTWN_BULK_TX_VI] = { 384251538Srpaulo .type = UE_BULK, 385251538Srpaulo .endpoint = 0x02, 386251538Srpaulo .direction = UE_DIR_OUT, 387251538Srpaulo .bufsize = URTWN_TXBUFSZ, 388251538Srpaulo .flags = { 389251538Srpaulo .ext_buffer = 1, 390251538Srpaulo .pipe_bof = 1, 391251538Srpaulo .force_short_xfer = 1 392251538Srpaulo }, 393251538Srpaulo .callback = urtwn_bulk_tx_callback, 394251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 395251538Srpaulo }, 396251538Srpaulo [URTWN_BULK_TX_VO] = { 397251538Srpaulo .type = UE_BULK, 398251538Srpaulo .endpoint = 0x02, 399251538Srpaulo .direction = UE_DIR_OUT, 400251538Srpaulo .bufsize = URTWN_TXBUFSZ, 401251538Srpaulo .flags = { 402251538Srpaulo .ext_buffer = 1, 403251538Srpaulo .pipe_bof = 1, 404251538Srpaulo .force_short_xfer = 1 405251538Srpaulo }, 406251538Srpaulo .callback = urtwn_bulk_tx_callback, 407251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 408251538Srpaulo }, 409251538Srpaulo}; 410251538Srpaulo 411292014Savosstatic const struct wme_to_queue { 412292014Savos uint16_t reg; 413292014Savos uint8_t qid; 414292014Savos} wme2queue[WME_NUM_AC] = { 415292014Savos { R92C_EDCA_BE_PARAM, URTWN_BULK_TX_BE}, 416292014Savos { R92C_EDCA_BK_PARAM, URTWN_BULK_TX_BK}, 417292014Savos { R92C_EDCA_VI_PARAM, URTWN_BULK_TX_VI}, 418292014Savos { R92C_EDCA_VO_PARAM, URTWN_BULK_TX_VO} 419292014Savos}; 420292014Savos 421251538Srpaulostatic int 422251538Srpaulourtwn_match(device_t self) 423251538Srpaulo{ 424251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 425251538Srpaulo 426251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 427251538Srpaulo return (ENXIO); 428251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 429251538Srpaulo return (ENXIO); 430251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 431251538Srpaulo return (ENXIO); 432251538Srpaulo 433251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 434251538Srpaulo} 435251538Srpaulo 436251538Srpaulostatic int 437251538Srpaulourtwn_attach(device_t self) 438251538Srpaulo{ 439251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 440251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 441287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 442293339Savos uint8_t bands[howmany(IEEE80211_MODE_MAX, 8)]; 443251538Srpaulo int error; 444251538Srpaulo 445251538Srpaulo device_set_usb_desc(self); 446251538Srpaulo sc->sc_udev = uaa->device; 447251538Srpaulo sc->sc_dev = self; 448264912Skevlo if (USB_GET_DRIVER_INFO(uaa) == URTWN_RTL8188E) 449264912Skevlo sc->chip |= URTWN_CHIP_88E; 450251538Srpaulo 451251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 452251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 453292174Savos URTWN_CMDQ_LOCK_INIT(sc); 454292167Savos URTWN_NT_LOCK_INIT(sc); 455251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 456287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 457251538Srpaulo 458291902Skevlo sc->sc_iface_index = URTWN_IFACE_INDEX; 459291902Skevlo error = usbd_transfer_setup(uaa->device, &sc->sc_iface_index, 460291902Skevlo sc->sc_xfer, urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 461251538Srpaulo if (error) { 462251538Srpaulo device_printf(self, "could not allocate USB transfers, " 463251538Srpaulo "err=%s\n", usbd_errstr(error)); 464251538Srpaulo goto detach; 465251538Srpaulo } 466251538Srpaulo 467251538Srpaulo URTWN_LOCK(sc); 468251538Srpaulo 469251538Srpaulo error = urtwn_read_chipid(sc); 470251538Srpaulo if (error) { 471251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 472251538Srpaulo URTWN_UNLOCK(sc); 473251538Srpaulo goto detach; 474251538Srpaulo } 475251538Srpaulo 476251538Srpaulo /* Determine number of Tx/Rx chains. */ 477251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 478251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 479251538Srpaulo sc->nrxchains = 2; 480251538Srpaulo } else { 481251538Srpaulo sc->ntxchains = 1; 482251538Srpaulo sc->nrxchains = 1; 483251538Srpaulo } 484251538Srpaulo 485264912Skevlo if (sc->chip & URTWN_CHIP_88E) 486291264Savos error = urtwn_r88e_read_rom(sc); 487264912Skevlo else 488291264Savos error = urtwn_read_rom(sc); 489291264Savos if (error != 0) { 490291264Savos device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", 491291264Savos __func__, error); 492291264Savos URTWN_UNLOCK(sc); 493291264Savos goto detach; 494291264Savos } 495264912Skevlo 496251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 497251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 498264912Skevlo (sc->chip & URTWN_CHIP_88E) ? "8188EU" : 499251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 500251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 501251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 502251538Srpaulo 503251538Srpaulo URTWN_UNLOCK(sc); 504251538Srpaulo 505283537Sglebius ic->ic_softc = sc; 506283527Sglebius ic->ic_name = device_get_nameunit(self); 507251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 508251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 509251538Srpaulo 510251538Srpaulo /* set device capabilities */ 511251538Srpaulo ic->ic_caps = 512251538Srpaulo IEEE80211_C_STA /* station mode */ 513251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 514290651Savos | IEEE80211_C_IBSS /* adhoc mode */ 515290631Savos | IEEE80211_C_HOSTAP /* hostap mode */ 516251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 517251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 518251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 519251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 520292014Savos | IEEE80211_C_WME /* 802.11e */ 521251538Srpaulo ; 522251538Srpaulo 523292175Savos ic->ic_cryptocaps = 524292175Savos IEEE80211_CRYPTO_WEP | 525292175Savos IEEE80211_CRYPTO_TKIP | 526292175Savos IEEE80211_CRYPTO_AES_CCM; 527292175Savos 528293339Savos memset(bands, 0, sizeof(bands)); 529293339Savos setbit(bands, IEEE80211_MODE_11B); 530293339Savos setbit(bands, IEEE80211_MODE_11G); 531293339Savos ieee80211_init_channels(ic, NULL, bands); 532251538Srpaulo 533287197Sglebius ieee80211_ifattach(ic); 534251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 535251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 536251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 537251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 538287197Sglebius ic->ic_transmit = urtwn_transmit; 539287197Sglebius ic->ic_parent = urtwn_parent; 540251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 541251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 542292014Savos ic->ic_wme.wme_update = urtwn_wme_update; 543290564Savos ic->ic_update_promisc = urtwn_update_promisc; 544251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 545292167Savos if (sc->chip & URTWN_CHIP_88E) { 546292167Savos ic->ic_node_alloc = urtwn_r88e_node_alloc; 547292167Savos ic->ic_newassoc = urtwn_r88e_newassoc; 548292167Savos sc->sc_node_free = ic->ic_node_free; 549292167Savos ic->ic_node_free = urtwn_r88e_node_free; 550292167Savos } 551251538Srpaulo 552281069Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 553251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 554251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 555251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 556251538Srpaulo 557292174Savos TASK_INIT(&sc->cmdq_task, 0, urtwn_cmdq_cb, sc); 558292174Savos 559251538Srpaulo if (bootverbose) 560251538Srpaulo ieee80211_announce(ic); 561251538Srpaulo 562251538Srpaulo return (0); 563251538Srpaulo 564251538Srpaulodetach: 565251538Srpaulo urtwn_detach(self); 566251538Srpaulo return (ENXIO); /* failure */ 567251538Srpaulo} 568251538Srpaulo 569251538Srpaulostatic int 570251538Srpaulourtwn_detach(device_t self) 571251538Srpaulo{ 572251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 573287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 574263153Skevlo unsigned int x; 575281069Srpaulo 576263153Skevlo /* Prevent further ioctls. */ 577263153Skevlo URTWN_LOCK(sc); 578263153Skevlo sc->sc_flags |= URTWN_DETACHED; 579263153Skevlo URTWN_UNLOCK(sc); 580251538Srpaulo 581291698Savos urtwn_stop(sc); 582291698Savos 583251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 584251538Srpaulo 585288353Sadrian /* stop all USB transfers */ 586288353Sadrian usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 587288353Sadrian 588263153Skevlo /* Prevent further allocations from RX/TX data lists. */ 589263153Skevlo URTWN_LOCK(sc); 590263153Skevlo STAILQ_INIT(&sc->sc_tx_active); 591263153Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 592263153Skevlo STAILQ_INIT(&sc->sc_tx_pending); 593263153Skevlo 594263153Skevlo STAILQ_INIT(&sc->sc_rx_active); 595263153Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 596263153Skevlo URTWN_UNLOCK(sc); 597263153Skevlo 598263153Skevlo /* drain USB transfers */ 599263153Skevlo for (x = 0; x != URTWN_N_TRANSFER; x++) 600263153Skevlo usbd_transfer_drain(sc->sc_xfer[x]); 601263153Skevlo 602263153Skevlo /* Free data buffers. */ 603263153Skevlo URTWN_LOCK(sc); 604263153Skevlo urtwn_free_tx_list(sc); 605263153Skevlo urtwn_free_rx_list(sc); 606263153Skevlo URTWN_UNLOCK(sc); 607263153Skevlo 608292174Savos if (ic->ic_softc == sc) { 609292174Savos ieee80211_draintask(ic, &sc->cmdq_task); 610292174Savos ieee80211_ifdetach(ic); 611292174Savos } 612292174Savos 613292167Savos URTWN_NT_LOCK_DESTROY(sc); 614292174Savos URTWN_CMDQ_LOCK_DESTROY(sc); 615251538Srpaulo mtx_destroy(&sc->sc_mtx); 616251538Srpaulo 617251538Srpaulo return (0); 618251538Srpaulo} 619251538Srpaulo 620251538Srpaulostatic void 621289066Skevlourtwn_drain_mbufq(struct urtwn_softc *sc) 622251538Srpaulo{ 623289066Skevlo struct mbuf *m; 624289066Skevlo struct ieee80211_node *ni; 625289066Skevlo URTWN_ASSERT_LOCKED(sc); 626289066Skevlo while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 627289066Skevlo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 628289066Skevlo m->m_pkthdr.rcvif = NULL; 629289066Skevlo ieee80211_free_node(ni); 630289066Skevlo m_freem(m); 631251538Srpaulo } 632251538Srpaulo} 633251538Srpaulo 634251538Srpaulostatic usb_error_t 635251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 636251538Srpaulo void *data) 637251538Srpaulo{ 638251538Srpaulo usb_error_t err; 639251538Srpaulo int ntries = 10; 640251538Srpaulo 641251538Srpaulo URTWN_ASSERT_LOCKED(sc); 642251538Srpaulo 643251538Srpaulo while (ntries--) { 644251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 645251538Srpaulo req, data, 0, NULL, 250 /* ms */); 646251538Srpaulo if (err == 0) 647251538Srpaulo break; 648251538Srpaulo 649251538Srpaulo DPRINTFN(1, "Control request failed, %s (retrying)\n", 650251538Srpaulo usbd_errstr(err)); 651251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 652251538Srpaulo } 653251538Srpaulo return (err); 654251538Srpaulo} 655251538Srpaulo 656251538Srpaulostatic struct ieee80211vap * 657251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 658251538Srpaulo enum ieee80211_opmode opmode, int flags, 659251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 660251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 661251538Srpaulo{ 662290631Savos struct urtwn_softc *sc = ic->ic_softc; 663251538Srpaulo struct urtwn_vap *uvp; 664251538Srpaulo struct ieee80211vap *vap; 665251538Srpaulo 666251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 667251538Srpaulo return (NULL); 668251538Srpaulo 669287197Sglebius uvp = malloc(sizeof(struct urtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); 670251538Srpaulo vap = &uvp->vap; 671251538Srpaulo /* enable s/w bmiss handling for sta mode */ 672251538Srpaulo 673281069Srpaulo if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 674287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 675257743Shselasky /* out of memory */ 676257743Shselasky free(uvp, M_80211_VAP); 677257743Shselasky return (NULL); 678257743Shselasky } 679257743Shselasky 680290651Savos if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) 681290631Savos urtwn_init_beacon(sc, uvp); 682290631Savos 683251538Srpaulo /* override state transition machine */ 684251538Srpaulo uvp->newstate = vap->iv_newstate; 685251538Srpaulo vap->iv_newstate = urtwn_newstate; 686290631Savos vap->iv_update_beacon = urtwn_update_beacon; 687292175Savos vap->iv_key_alloc = urtwn_key_alloc; 688292175Savos vap->iv_key_set = urtwn_key_set; 689292175Savos vap->iv_key_delete = urtwn_key_delete; 690290651Savos if (opmode == IEEE80211_M_IBSS) { 691290651Savos uvp->recv_mgmt = vap->iv_recv_mgmt; 692290651Savos vap->iv_recv_mgmt = urtwn_ibss_recv_mgmt; 693290651Savos TASK_INIT(&uvp->tsf_task_adhoc, 0, urtwn_tsf_task_adhoc, vap); 694290651Savos } 695251538Srpaulo 696292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 697292167Savos ieee80211_ratectl_init(vap); 698251538Srpaulo /* complete setup */ 699251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 700287197Sglebius ieee80211_media_status, mac); 701251538Srpaulo ic->ic_opmode = opmode; 702251538Srpaulo return (vap); 703251538Srpaulo} 704251538Srpaulo 705251538Srpaulostatic void 706251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 707251538Srpaulo{ 708290651Savos struct ieee80211com *ic = vap->iv_ic; 709292167Savos struct urtwn_softc *sc = ic->ic_softc; 710251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 711251538Srpaulo 712290651Savos if (uvp->bcn_mbuf != NULL) 713290651Savos m_freem(uvp->bcn_mbuf); 714290651Savos if (vap->iv_opmode == IEEE80211_M_IBSS) 715290651Savos ieee80211_draintask(ic, &uvp->tsf_task_adhoc); 716292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 717292167Savos ieee80211_ratectl_deinit(vap); 718251538Srpaulo ieee80211_vap_detach(vap); 719251538Srpaulo free(uvp, M_80211_VAP); 720251538Srpaulo} 721251538Srpaulo 722251538Srpaulostatic struct mbuf * 723292207Savosurtwn_rx_copy_to_mbuf(struct urtwn_softc *sc, struct r92c_rx_stat *stat, 724292207Savos int totlen) 725251538Srpaulo{ 726287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 727251538Srpaulo struct mbuf *m; 728292207Savos uint32_t rxdw0; 729292207Savos int pktlen; 730251538Srpaulo 731251538Srpaulo /* 732251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 733251538Srpaulo * RUNNING. 734251538Srpaulo */ 735287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) 736251538Srpaulo return (NULL); 737251538Srpaulo 738251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 739251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 740251538Srpaulo /* 741251538Srpaulo * This should not happen since we setup our Rx filter 742251538Srpaulo * to not receive these frames. 743251538Srpaulo */ 744292207Savos DPRINTFN(6, "RX flags error (%s)\n", 745292207Savos rxdw0 & R92C_RXDW0_CRCERR ? "CRC" : "ICV"); 746292207Savos goto fail; 747251538Srpaulo } 748292207Savos 749292207Savos pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 750292207Savos if (pktlen < sizeof(struct ieee80211_frame_ack)) { 751292207Savos DPRINTFN(6, "frame too short: %d\n", pktlen); 752292207Savos goto fail; 753271303Skevlo } 754251538Srpaulo 755292207Savos if (__predict_false(totlen > MCLBYTES)) { 756292207Savos /* convert to m_getjcl if this happens */ 757292207Savos device_printf(sc->sc_dev, "%s: frame too long: %d (%d)\n", 758292207Savos __func__, pktlen, totlen); 759292207Savos goto fail; 760251538Srpaulo } 761251538Srpaulo 762260463Skevlo m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 763292207Savos if (__predict_false(m == NULL)) { 764292207Savos device_printf(sc->sc_dev, "%s: could not allocate RX mbuf\n", 765292207Savos __func__); 766292207Savos goto fail; 767251538Srpaulo } 768251538Srpaulo 769251538Srpaulo /* Finalize mbuf. */ 770292207Savos memcpy(mtod(m, uint8_t *), (uint8_t *)stat, totlen); 771292207Savos m->m_pkthdr.len = m->m_len = totlen; 772292207Savos 773251538Srpaulo return (m); 774292207Savosfail: 775292207Savos counter_u64_add(ic->ic_ierrors, 1); 776292207Savos return (NULL); 777251538Srpaulo} 778251538Srpaulo 779251538Srpaulostatic struct mbuf * 780292207Savosurtwn_report_intr(struct usb_xfer *xfer, struct urtwn_data *data) 781251538Srpaulo{ 782251538Srpaulo struct urtwn_softc *sc = data->sc; 783287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 784251538Srpaulo struct r92c_rx_stat *stat; 785251538Srpaulo uint8_t *buf; 786292167Savos int len; 787251538Srpaulo 788251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 789251538Srpaulo 790251538Srpaulo if (len < sizeof(*stat)) { 791287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 792251538Srpaulo return (NULL); 793251538Srpaulo } 794251538Srpaulo 795251538Srpaulo buf = data->buf; 796292167Savos stat = (struct r92c_rx_stat *)buf; 797292167Savos 798292167Savos if (sc->chip & URTWN_CHIP_88E) { 799292167Savos int report_sel = MS(le32toh(stat->rxdw3), R88E_RXDW3_RPT); 800292167Savos 801292167Savos switch (report_sel) { 802292167Savos case R88E_RXDW3_RPT_RX: 803292207Savos return (urtwn_rxeof(sc, buf, len)); 804292167Savos case R88E_RXDW3_RPT_TX1: 805292167Savos urtwn_r88e_ratectl_tx_complete(sc, &stat[1]); 806292167Savos break; 807292167Savos default: 808292167Savos DPRINTFN(7, "case %d was not handled\n", report_sel); 809292167Savos break; 810292167Savos } 811292167Savos } else 812292207Savos return (urtwn_rxeof(sc, buf, len)); 813292167Savos 814292167Savos return (NULL); 815292167Savos} 816292167Savos 817292167Savosstatic struct mbuf * 818292207Savosurtwn_rxeof(struct urtwn_softc *sc, uint8_t *buf, int len) 819292167Savos{ 820292167Savos struct r92c_rx_stat *stat; 821292167Savos struct mbuf *m, *m0 = NULL, *prevm = NULL; 822292167Savos uint32_t rxdw0; 823292167Savos int totlen, pktlen, infosz, npkts; 824292167Savos 825251538Srpaulo /* Get the number of encapsulated frames. */ 826251538Srpaulo stat = (struct r92c_rx_stat *)buf; 827251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 828251538Srpaulo DPRINTFN(6, "Rx %d frames in one chunk\n", npkts); 829251538Srpaulo 830251538Srpaulo /* Process all of them. */ 831251538Srpaulo while (npkts-- > 0) { 832251538Srpaulo if (len < sizeof(*stat)) 833251538Srpaulo break; 834251538Srpaulo stat = (struct r92c_rx_stat *)buf; 835251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 836251538Srpaulo 837251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 838251538Srpaulo if (pktlen == 0) 839251538Srpaulo break; 840251538Srpaulo 841251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 842251538Srpaulo 843251538Srpaulo /* Make sure everything fits in xfer. */ 844251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 845251538Srpaulo if (totlen > len) 846251538Srpaulo break; 847251538Srpaulo 848292207Savos m = urtwn_rx_copy_to_mbuf(sc, stat, totlen); 849251538Srpaulo if (m0 == NULL) 850251538Srpaulo m0 = m; 851251538Srpaulo if (prevm == NULL) 852251538Srpaulo prevm = m; 853251538Srpaulo else { 854251538Srpaulo prevm->m_next = m; 855251538Srpaulo prevm = m; 856251538Srpaulo } 857251538Srpaulo 858251538Srpaulo /* Next chunk is 128-byte aligned. */ 859251538Srpaulo totlen = (totlen + 127) & ~127; 860251538Srpaulo buf += totlen; 861251538Srpaulo len -= totlen; 862251538Srpaulo } 863251538Srpaulo 864251538Srpaulo return (m0); 865251538Srpaulo} 866251538Srpaulo 867251538Srpaulostatic void 868292167Savosurtwn_r88e_ratectl_tx_complete(struct urtwn_softc *sc, void *arg) 869292167Savos{ 870292167Savos struct r88e_tx_rpt_ccx *rpt = arg; 871292167Savos struct ieee80211vap *vap; 872292167Savos struct ieee80211_node *ni; 873292167Savos uint8_t macid; 874292167Savos int ntries; 875292167Savos 876292167Savos macid = MS(rpt->rptb1, R88E_RPTB1_MACID); 877292167Savos ntries = MS(rpt->rptb2, R88E_RPTB2_RETRY_CNT); 878292167Savos 879292167Savos URTWN_NT_LOCK(sc); 880292167Savos ni = sc->node_list[macid]; 881292167Savos if (ni != NULL) { 882292167Savos vap = ni->ni_vap; 883292167Savos 884292167Savos if (rpt->rptb1 & R88E_RPTB1_PKT_OK) { 885292167Savos ieee80211_ratectl_tx_complete(vap, ni, 886292167Savos IEEE80211_RATECTL_TX_SUCCESS, &ntries, NULL); 887292167Savos } else { 888292167Savos ieee80211_ratectl_tx_complete(vap, ni, 889292167Savos IEEE80211_RATECTL_TX_FAILURE, &ntries, NULL); 890292167Savos } 891292167Savos } else 892292167Savos DPRINTFN(8, "macid %d, ni is NULL\n", macid); 893292167Savos URTWN_NT_UNLOCK(sc); 894292167Savos} 895292167Savos 896292207Savosstatic struct ieee80211_node * 897292207Savosurtwn_rx_frame(struct urtwn_softc *sc, struct mbuf *m, int8_t *rssi_p) 898292207Savos{ 899292207Savos struct ieee80211com *ic = &sc->sc_ic; 900292207Savos struct ieee80211_frame_min *wh; 901292207Savos struct r92c_rx_stat *stat; 902292207Savos uint32_t rxdw0, rxdw3; 903292207Savos uint8_t rate, cipher; 904292207Savos int8_t rssi = URTWN_NOISE_FLOOR + 1; 905292207Savos int infosz; 906292207Savos 907292207Savos stat = mtod(m, struct r92c_rx_stat *); 908292207Savos rxdw0 = le32toh(stat->rxdw0); 909292207Savos rxdw3 = le32toh(stat->rxdw3); 910292207Savos 911292207Savos rate = MS(rxdw3, R92C_RXDW3_RATE); 912292207Savos cipher = MS(rxdw0, R92C_RXDW0_CIPHER); 913292207Savos infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 914292207Savos 915292207Savos /* Get RSSI from PHY status descriptor if present. */ 916292207Savos if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 917292207Savos if (sc->chip & URTWN_CHIP_88E) 918292207Savos rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]); 919292207Savos else 920292207Savos rssi = urtwn_get_rssi(sc, rate, &stat[1]); 921292207Savos /* Update our average RSSI. */ 922292207Savos urtwn_update_avgrssi(sc, rate, rssi); 923292207Savos } 924292207Savos 925292207Savos if (ieee80211_radiotap_active(ic)) { 926292207Savos struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 927292207Savos 928292207Savos tap->wr_flags = 0; 929292207Savos 930292207Savos urtwn_get_tsf(sc, &tap->wr_tsft); 931292207Savos if (__predict_false(le32toh((uint32_t)tap->wr_tsft) < 932292207Savos le32toh(stat->rxdw5))) { 933292207Savos tap->wr_tsft = le32toh(tap->wr_tsft >> 32) - 1; 934292207Savos tap->wr_tsft = (uint64_t)htole32(tap->wr_tsft) << 32; 935292207Savos } else 936292207Savos tap->wr_tsft &= 0xffffffff00000000; 937292207Savos tap->wr_tsft += stat->rxdw5; 938292207Savos 939292207Savos /* Map HW rate index to 802.11 rate. */ 940292207Savos if (!(rxdw3 & R92C_RXDW3_HT)) { 941292207Savos tap->wr_rate = ridx2rate[rate]; 942292207Savos } else if (rate >= 12) { /* MCS0~15. */ 943292207Savos /* Bit 7 set means HT MCS instead of rate. */ 944292207Savos tap->wr_rate = 0x80 | (rate - 12); 945292207Savos } 946292207Savos tap->wr_dbm_antsignal = rssi; 947292207Savos tap->wr_dbm_antnoise = URTWN_NOISE_FLOOR; 948292207Savos } 949292207Savos 950292207Savos *rssi_p = rssi; 951292207Savos 952292207Savos /* Drop descriptor. */ 953292207Savos m_adj(m, sizeof(*stat) + infosz); 954292207Savos wh = mtod(m, struct ieee80211_frame_min *); 955292207Savos 956292207Savos if ((wh->i_fc[1] & IEEE80211_FC1_PROTECTED) && 957292207Savos cipher != R92C_CAM_ALGO_NONE) { 958292207Savos m->m_flags |= M_WEP; 959292207Savos } 960292207Savos 961292207Savos if (m->m_len >= sizeof(*wh)) 962292207Savos return (ieee80211_find_rxnode(ic, wh)); 963292207Savos 964292207Savos return (NULL); 965292207Savos} 966292207Savos 967292167Savosstatic void 968251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 969251538Srpaulo{ 970251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 971287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 972251538Srpaulo struct ieee80211_node *ni; 973251538Srpaulo struct mbuf *m = NULL, *next; 974251538Srpaulo struct urtwn_data *data; 975292207Savos int8_t nf, rssi; 976251538Srpaulo 977251538Srpaulo URTWN_ASSERT_LOCKED(sc); 978251538Srpaulo 979251538Srpaulo switch (USB_GET_STATE(xfer)) { 980251538Srpaulo case USB_ST_TRANSFERRED: 981251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 982251538Srpaulo if (data == NULL) 983251538Srpaulo goto tr_setup; 984251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 985292207Savos m = urtwn_report_intr(xfer, data); 986251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 987251538Srpaulo /* FALLTHROUGH */ 988251538Srpaulo case USB_ST_SETUP: 989251538Srpaulotr_setup: 990251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 991251538Srpaulo if (data == NULL) { 992251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 993251538Srpaulo return; 994251538Srpaulo } 995251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 996251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 997251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 998251538Srpaulo usbd_xfer_max_len(xfer)); 999251538Srpaulo usbd_transfer_submit(xfer); 1000251538Srpaulo 1001251538Srpaulo /* 1002251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 1003251538Srpaulo * ieee80211_input() because here is at the end of a USB 1004251538Srpaulo * callback and safe to unlock. 1005251538Srpaulo */ 1006251538Srpaulo while (m != NULL) { 1007251538Srpaulo next = m->m_next; 1008251538Srpaulo m->m_next = NULL; 1009292207Savos 1010292207Savos ni = urtwn_rx_frame(sc, m, &rssi); 1011292207Savos URTWN_UNLOCK(sc); 1012292207Savos 1013251538Srpaulo nf = URTWN_NOISE_FLOOR; 1014251538Srpaulo if (ni != NULL) { 1015289799Savos (void)ieee80211_input(ni, m, rssi - nf, nf); 1016251538Srpaulo ieee80211_free_node(ni); 1017289799Savos } else { 1018289799Savos (void)ieee80211_input_all(ic, m, rssi - nf, 1019289799Savos nf); 1020289799Savos } 1021292207Savos 1022292207Savos URTWN_LOCK(sc); 1023251538Srpaulo m = next; 1024251538Srpaulo } 1025251538Srpaulo break; 1026251538Srpaulo default: 1027251538Srpaulo /* needs it to the inactive queue due to a error. */ 1028251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 1029251538Srpaulo if (data != NULL) { 1030251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 1031251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 1032251538Srpaulo } 1033251538Srpaulo if (error != USB_ERR_CANCELLED) { 1034251538Srpaulo usbd_xfer_set_stall(xfer); 1035287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 1036251538Srpaulo goto tr_setup; 1037251538Srpaulo } 1038251538Srpaulo break; 1039251538Srpaulo } 1040251538Srpaulo} 1041251538Srpaulo 1042251538Srpaulostatic void 1043289891Savosurtwn_txeof(struct urtwn_softc *sc, struct urtwn_data *data, int status) 1044251538Srpaulo{ 1045251538Srpaulo 1046251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1047289891Savos 1048290631Savos if (data->ni != NULL) /* not a beacon frame */ 1049290631Savos ieee80211_tx_complete(data->ni, data->m, status); 1050289891Savos 1051287197Sglebius data->ni = NULL; 1052287197Sglebius data->m = NULL; 1053289891Savos 1054251538Srpaulo sc->sc_txtimer = 0; 1055289891Savos 1056289891Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 1057251538Srpaulo} 1058251538Srpaulo 1059289066Skevlostatic int 1060289066Skevlourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 1061289066Skevlo int ndata, int maxsz) 1062289066Skevlo{ 1063289066Skevlo int i, error; 1064289066Skevlo 1065289066Skevlo for (i = 0; i < ndata; i++) { 1066289066Skevlo struct urtwn_data *dp = &data[i]; 1067289066Skevlo dp->sc = sc; 1068289066Skevlo dp->m = NULL; 1069289066Skevlo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1070289066Skevlo if (dp->buf == NULL) { 1071289066Skevlo device_printf(sc->sc_dev, 1072289066Skevlo "could not allocate buffer\n"); 1073289066Skevlo error = ENOMEM; 1074289066Skevlo goto fail; 1075289066Skevlo } 1076289066Skevlo dp->ni = NULL; 1077289066Skevlo } 1078289066Skevlo 1079289066Skevlo return (0); 1080289066Skevlofail: 1081289066Skevlo urtwn_free_list(sc, data, ndata); 1082289066Skevlo return (error); 1083289066Skevlo} 1084289066Skevlo 1085289066Skevlostatic int 1086289066Skevlourtwn_alloc_rx_list(struct urtwn_softc *sc) 1087289066Skevlo{ 1088289066Skevlo int error, i; 1089289066Skevlo 1090289066Skevlo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 1091289066Skevlo URTWN_RXBUFSZ); 1092289066Skevlo if (error != 0) 1093289066Skevlo return (error); 1094289066Skevlo 1095289066Skevlo STAILQ_INIT(&sc->sc_rx_active); 1096289066Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 1097289066Skevlo 1098289066Skevlo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 1099289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1100289066Skevlo 1101289066Skevlo return (0); 1102289066Skevlo} 1103289066Skevlo 1104289066Skevlostatic int 1105289066Skevlourtwn_alloc_tx_list(struct urtwn_softc *sc) 1106289066Skevlo{ 1107289066Skevlo int error, i; 1108289066Skevlo 1109289066Skevlo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 1110289066Skevlo URTWN_TXBUFSZ); 1111289066Skevlo if (error != 0) 1112289066Skevlo return (error); 1113289066Skevlo 1114289066Skevlo STAILQ_INIT(&sc->sc_tx_active); 1115289066Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 1116289066Skevlo STAILQ_INIT(&sc->sc_tx_pending); 1117289066Skevlo 1118289066Skevlo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 1119289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 1120289066Skevlo 1121289066Skevlo return (0); 1122289066Skevlo} 1123289066Skevlo 1124251538Srpaulostatic void 1125289066Skevlourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 1126289066Skevlo{ 1127289066Skevlo int i; 1128289066Skevlo 1129289066Skevlo for (i = 0; i < ndata; i++) { 1130289066Skevlo struct urtwn_data *dp = &data[i]; 1131289066Skevlo 1132289066Skevlo if (dp->buf != NULL) { 1133289066Skevlo free(dp->buf, M_USBDEV); 1134289066Skevlo dp->buf = NULL; 1135289066Skevlo } 1136289066Skevlo if (dp->ni != NULL) { 1137289066Skevlo ieee80211_free_node(dp->ni); 1138289066Skevlo dp->ni = NULL; 1139289066Skevlo } 1140289066Skevlo } 1141289066Skevlo} 1142289066Skevlo 1143289066Skevlostatic void 1144289066Skevlourtwn_free_rx_list(struct urtwn_softc *sc) 1145289066Skevlo{ 1146289066Skevlo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 1147289066Skevlo} 1148289066Skevlo 1149289066Skevlostatic void 1150289066Skevlourtwn_free_tx_list(struct urtwn_softc *sc) 1151289066Skevlo{ 1152289066Skevlo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 1153289066Skevlo} 1154289066Skevlo 1155289066Skevlostatic void 1156251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 1157251538Srpaulo{ 1158251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1159251538Srpaulo struct urtwn_data *data; 1160251538Srpaulo 1161251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1162251538Srpaulo 1163251538Srpaulo switch (USB_GET_STATE(xfer)){ 1164251538Srpaulo case USB_ST_TRANSFERRED: 1165251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1166251538Srpaulo if (data == NULL) 1167251538Srpaulo goto tr_setup; 1168251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1169289891Savos urtwn_txeof(sc, data, 0); 1170251538Srpaulo /* FALLTHROUGH */ 1171251538Srpaulo case USB_ST_SETUP: 1172251538Srpaulotr_setup: 1173251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 1174251538Srpaulo if (data == NULL) { 1175251538Srpaulo DPRINTF("%s: empty pending queue\n", __func__); 1176288353Sadrian goto finish; 1177251538Srpaulo } 1178251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1179251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1180251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1181251538Srpaulo usbd_transfer_submit(xfer); 1182251538Srpaulo break; 1183251538Srpaulo default: 1184251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1185251538Srpaulo if (data == NULL) 1186251538Srpaulo goto tr_setup; 1187289891Savos STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1188289891Savos urtwn_txeof(sc, data, 1); 1189251538Srpaulo if (error != USB_ERR_CANCELLED) { 1190251538Srpaulo usbd_xfer_set_stall(xfer); 1191251538Srpaulo goto tr_setup; 1192251538Srpaulo } 1193251538Srpaulo break; 1194251538Srpaulo } 1195288353Sadrianfinish: 1196288353Sadrian /* Kick-start more transmit */ 1197288353Sadrian urtwn_start(sc); 1198251538Srpaulo} 1199251538Srpaulo 1200251538Srpaulostatic struct urtwn_data * 1201251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 1202251538Srpaulo{ 1203251538Srpaulo struct urtwn_data *bf; 1204251538Srpaulo 1205251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 1206251538Srpaulo if (bf != NULL) 1207251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 1208251538Srpaulo else 1209251538Srpaulo DPRINTF("%s: %s\n", __func__, "out of xmit buffers"); 1210251538Srpaulo return (bf); 1211251538Srpaulo} 1212251538Srpaulo 1213251538Srpaulostatic struct urtwn_data * 1214251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 1215251538Srpaulo{ 1216251538Srpaulo struct urtwn_data *bf; 1217251538Srpaulo 1218251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1219251538Srpaulo 1220251538Srpaulo bf = _urtwn_getbuf(sc); 1221287197Sglebius if (bf == NULL) 1222251538Srpaulo DPRINTF("%s: stop queue\n", __func__); 1223251538Srpaulo return (bf); 1224251538Srpaulo} 1225251538Srpaulo 1226291698Savosstatic usb_error_t 1227251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1228251538Srpaulo int len) 1229251538Srpaulo{ 1230251538Srpaulo usb_device_request_t req; 1231251538Srpaulo 1232251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1233251538Srpaulo req.bRequest = R92C_REQ_REGS; 1234251538Srpaulo USETW(req.wValue, addr); 1235251538Srpaulo USETW(req.wIndex, 0); 1236251538Srpaulo USETW(req.wLength, len); 1237251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1238251538Srpaulo} 1239251538Srpaulo 1240291698Savosstatic usb_error_t 1241251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 1242251538Srpaulo{ 1243291698Savos return (urtwn_write_region_1(sc, addr, &val, sizeof(val))); 1244251538Srpaulo} 1245251538Srpaulo 1246291698Savosstatic usb_error_t 1247251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 1248251538Srpaulo{ 1249251538Srpaulo val = htole16(val); 1250291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1251251538Srpaulo} 1252251538Srpaulo 1253291698Savosstatic usb_error_t 1254251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 1255251538Srpaulo{ 1256251538Srpaulo val = htole32(val); 1257291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1258251538Srpaulo} 1259251538Srpaulo 1260291698Savosstatic usb_error_t 1261251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1262251538Srpaulo int len) 1263251538Srpaulo{ 1264251538Srpaulo usb_device_request_t req; 1265251538Srpaulo 1266251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 1267251538Srpaulo req.bRequest = R92C_REQ_REGS; 1268251538Srpaulo USETW(req.wValue, addr); 1269251538Srpaulo USETW(req.wIndex, 0); 1270251538Srpaulo USETW(req.wLength, len); 1271251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1272251538Srpaulo} 1273251538Srpaulo 1274251538Srpaulostatic uint8_t 1275251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 1276251538Srpaulo{ 1277251538Srpaulo uint8_t val; 1278251538Srpaulo 1279251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 1280251538Srpaulo return (0xff); 1281251538Srpaulo return (val); 1282251538Srpaulo} 1283251538Srpaulo 1284251538Srpaulostatic uint16_t 1285251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 1286251538Srpaulo{ 1287251538Srpaulo uint16_t val; 1288251538Srpaulo 1289251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 1290251538Srpaulo return (0xffff); 1291251538Srpaulo return (le16toh(val)); 1292251538Srpaulo} 1293251538Srpaulo 1294251538Srpaulostatic uint32_t 1295251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 1296251538Srpaulo{ 1297251538Srpaulo uint32_t val; 1298251538Srpaulo 1299251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 1300251538Srpaulo return (0xffffffff); 1301251538Srpaulo return (le32toh(val)); 1302251538Srpaulo} 1303251538Srpaulo 1304251538Srpaulostatic int 1305251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1306251538Srpaulo{ 1307251538Srpaulo struct r92c_fw_cmd cmd; 1308291698Savos usb_error_t error; 1309251538Srpaulo int ntries; 1310251538Srpaulo 1311251538Srpaulo /* Wait for current FW box to be empty. */ 1312251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1313251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1314251538Srpaulo break; 1315266472Shselasky urtwn_ms_delay(sc); 1316251538Srpaulo } 1317251538Srpaulo if (ntries == 100) { 1318251538Srpaulo device_printf(sc->sc_dev, 1319251538Srpaulo "could not send firmware command\n"); 1320251538Srpaulo return (ETIMEDOUT); 1321251538Srpaulo } 1322251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1323251538Srpaulo cmd.id = id; 1324251538Srpaulo if (len > 3) 1325251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1326251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1327251538Srpaulo memcpy(cmd.msg, buf, len); 1328251538Srpaulo 1329251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1330291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1331251538Srpaulo (uint8_t *)&cmd + 4, 2); 1332291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1333291698Savos return (EIO); 1334291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1335251538Srpaulo (uint8_t *)&cmd + 0, 4); 1336291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1337291698Savos return (EIO); 1338251538Srpaulo 1339251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1340251538Srpaulo return (0); 1341251538Srpaulo} 1342251538Srpaulo 1343292174Savosstatic void 1344292174Savosurtwn_cmdq_cb(void *arg, int pending) 1345292174Savos{ 1346292174Savos struct urtwn_softc *sc = arg; 1347292174Savos struct urtwn_cmdq *item; 1348292174Savos 1349292174Savos /* 1350292174Savos * Device must be powered on (via urtwn_power_on()) 1351292174Savos * before any command may be sent. 1352292174Savos */ 1353292174Savos URTWN_LOCK(sc); 1354292174Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 1355292174Savos URTWN_UNLOCK(sc); 1356292174Savos return; 1357292174Savos } 1358292174Savos 1359292174Savos URTWN_CMDQ_LOCK(sc); 1360292174Savos while (sc->cmdq[sc->cmdq_first].func != NULL) { 1361292174Savos item = &sc->cmdq[sc->cmdq_first]; 1362292174Savos sc->cmdq_first = (sc->cmdq_first + 1) % URTWN_CMDQ_SIZE; 1363292174Savos URTWN_CMDQ_UNLOCK(sc); 1364292174Savos 1365292174Savos item->func(sc, &item->data); 1366292174Savos 1367292174Savos URTWN_CMDQ_LOCK(sc); 1368292174Savos memset(item, 0, sizeof (*item)); 1369292174Savos } 1370292174Savos URTWN_CMDQ_UNLOCK(sc); 1371292174Savos URTWN_UNLOCK(sc); 1372292174Savos} 1373292174Savos 1374292174Savosstatic int 1375292174Savosurtwn_cmd_sleepable(struct urtwn_softc *sc, const void *ptr, size_t len, 1376292174Savos CMD_FUNC_PROTO) 1377292174Savos{ 1378292174Savos struct ieee80211com *ic = &sc->sc_ic; 1379292174Savos 1380292174Savos KASSERT(len <= sizeof(union sec_param), ("buffer overflow")); 1381292174Savos 1382292174Savos URTWN_CMDQ_LOCK(sc); 1383292174Savos if (sc->cmdq[sc->cmdq_last].func != NULL) { 1384292174Savos device_printf(sc->sc_dev, "%s: cmdq overflow\n", __func__); 1385292174Savos URTWN_CMDQ_UNLOCK(sc); 1386292174Savos 1387292174Savos return (EAGAIN); 1388292174Savos } 1389292174Savos 1390292174Savos if (ptr != NULL) 1391292174Savos memcpy(&sc->cmdq[sc->cmdq_last].data, ptr, len); 1392292174Savos sc->cmdq[sc->cmdq_last].func = func; 1393292174Savos sc->cmdq_last = (sc->cmdq_last + 1) % URTWN_CMDQ_SIZE; 1394292174Savos URTWN_CMDQ_UNLOCK(sc); 1395292174Savos 1396292174Savos ieee80211_runtask(ic, &sc->cmdq_task); 1397292174Savos 1398292174Savos return (0); 1399292174Savos} 1400292174Savos 1401264912Skevlostatic __inline void 1402251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1403251538Srpaulo{ 1404264912Skevlo 1405264912Skevlo sc->sc_rf_write(sc, chain, addr, val); 1406264912Skevlo} 1407264912Skevlo 1408264912Skevlostatic void 1409264912Skevlourtwn_r92c_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1410264912Skevlo uint32_t val) 1411264912Skevlo{ 1412251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1413251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1414251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1415251538Srpaulo} 1416251538Srpaulo 1417264912Skevlostatic void 1418264912Skevlourtwn_r88e_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1419264912Skevlouint32_t val) 1420264912Skevlo{ 1421264912Skevlo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1422264912Skevlo SM(R88E_LSSI_PARAM_ADDR, addr) | 1423264912Skevlo SM(R92C_LSSI_PARAM_DATA, val)); 1424264912Skevlo} 1425264912Skevlo 1426251538Srpaulostatic uint32_t 1427251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1428251538Srpaulo{ 1429251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1430251538Srpaulo 1431251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1432251538Srpaulo if (chain != 0) 1433251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1434251538Srpaulo 1435251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1436251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1437266472Shselasky urtwn_ms_delay(sc); 1438251538Srpaulo 1439251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1440251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1441251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1442266472Shselasky urtwn_ms_delay(sc); 1443251538Srpaulo 1444251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1445251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1446266472Shselasky urtwn_ms_delay(sc); 1447251538Srpaulo 1448251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1449251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1450251538Srpaulo else 1451251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1452251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1453251538Srpaulo} 1454251538Srpaulo 1455251538Srpaulostatic int 1456251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1457251538Srpaulo{ 1458291698Savos usb_error_t error; 1459251538Srpaulo int ntries; 1460251538Srpaulo 1461291698Savos error = urtwn_write_4(sc, R92C_LLT_INIT, 1462251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1463251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1464251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1465291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1466291698Savos return (EIO); 1467251538Srpaulo /* Wait for write operation to complete. */ 1468251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1469251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1470251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1471251538Srpaulo return (0); 1472266472Shselasky urtwn_ms_delay(sc); 1473251538Srpaulo } 1474251538Srpaulo return (ETIMEDOUT); 1475251538Srpaulo} 1476251538Srpaulo 1477291264Savosstatic int 1478291264Savosurtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val) 1479251538Srpaulo{ 1480251538Srpaulo uint32_t reg; 1481291698Savos usb_error_t error; 1482251538Srpaulo int ntries; 1483251538Srpaulo 1484291264Savos if (sc->last_rom_addr >= URTWN_EFUSE_MAX_LEN) 1485291264Savos return (EFAULT); 1486291264Savos 1487251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1488291264Savos reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 1489251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1490291264Savos 1491291698Savos error = urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1492291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1493291698Savos return (EIO); 1494251538Srpaulo /* Wait for read operation to complete. */ 1495251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1496251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1497251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1498291264Savos break; 1499266472Shselasky urtwn_ms_delay(sc); 1500251538Srpaulo } 1501291264Savos if (ntries == 100) { 1502291264Savos device_printf(sc->sc_dev, 1503291264Savos "could not read efuse byte at address 0x%x\n", 1504291264Savos sc->last_rom_addr); 1505291264Savos return (ETIMEDOUT); 1506291264Savos } 1507291264Savos 1508291264Savos *val = MS(reg, R92C_EFUSE_CTRL_DATA); 1509291264Savos sc->last_rom_addr++; 1510291264Savos 1511291264Savos return (0); 1512251538Srpaulo} 1513251538Srpaulo 1514291264Savosstatic int 1515291264Savosurtwn_efuse_read_data(struct urtwn_softc *sc, uint8_t *rom, uint8_t off, 1516291264Savos uint8_t msk) 1517291264Savos{ 1518291264Savos uint8_t reg; 1519291264Savos int i, error; 1520291264Savos 1521291264Savos for (i = 0; i < 4; i++) { 1522291264Savos if (msk & (1 << i)) 1523291264Savos continue; 1524291264Savos error = urtwn_efuse_read_next(sc, ®); 1525291264Savos if (error != 0) 1526291264Savos return (error); 1527291264Savos DPRINTF("rom[0x%03X] == 0x%02X\n", off * 8 + i * 2, reg); 1528291264Savos rom[off * 8 + i * 2 + 0] = reg; 1529291264Savos 1530291264Savos error = urtwn_efuse_read_next(sc, ®); 1531291264Savos if (error != 0) 1532291264Savos return (error); 1533291264Savos DPRINTF("rom[0x%03X] == 0x%02X\n", off * 8 + i * 2 + 1, reg); 1534291264Savos rom[off * 8 + i * 2 + 1] = reg; 1535291264Savos } 1536291264Savos 1537291264Savos return (0); 1538291264Savos} 1539291264Savos 1540291264Savos#ifdef URTWN_DEBUG 1541251538Srpaulostatic void 1542291264Savosurtwn_dump_rom_contents(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1543251538Srpaulo{ 1544251538Srpaulo int i; 1545251538Srpaulo 1546291264Savos /* Dump ROM contents. */ 1547291264Savos device_printf(sc->sc_dev, "%s:", __func__); 1548291264Savos for (i = 0; i < size; i++) { 1549291264Savos if (i % 32 == 0) 1550291264Savos printf("\n%03X: ", i); 1551291264Savos else if (i % 4 == 0) 1552291264Savos printf(" "); 1553291264Savos 1554291264Savos printf("%02X", rom[i]); 1555291264Savos } 1556291264Savos printf("\n"); 1557291264Savos} 1558291264Savos#endif 1559291264Savos 1560291264Savosstatic int 1561291264Savosurtwn_efuse_read(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1562291264Savos{ 1563291264Savos#define URTWN_CHK(res) do { \ 1564291264Savos if ((error = res) != 0) \ 1565291264Savos goto end; \ 1566291264Savos} while(0) 1567291264Savos uint8_t msk, off, reg; 1568291264Savos int error; 1569291264Savos 1570291698Savos URTWN_CHK(urtwn_efuse_switch_power(sc)); 1571264912Skevlo 1572291264Savos /* Read full ROM image. */ 1573291264Savos sc->last_rom_addr = 0; 1574291264Savos memset(rom, 0xff, size); 1575291264Savos 1576291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1577291264Savos while (reg != 0xff) { 1578291264Savos /* check for extended header */ 1579291264Savos if ((sc->chip & URTWN_CHIP_88E) && (reg & 0x1f) == 0x0f) { 1580291264Savos off = reg >> 5; 1581291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1582291264Savos 1583291264Savos if ((reg & 0x0f) != 0x0f) 1584291264Savos off = ((reg & 0xf0) >> 1) | off; 1585291264Savos else 1586291264Savos continue; 1587291264Savos } else 1588291264Savos off = reg >> 4; 1589251538Srpaulo msk = reg & 0xf; 1590291264Savos 1591291264Savos URTWN_CHK(urtwn_efuse_read_data(sc, rom, off, msk)); 1592291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1593251538Srpaulo } 1594291264Savos 1595291264Savosend: 1596291264Savos 1597251538Srpaulo#ifdef URTWN_DEBUG 1598291264Savos if (urtwn_debug >= 2) 1599291264Savos urtwn_dump_rom_contents(sc, rom, size); 1600251538Srpaulo#endif 1601291264Savos 1602282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); 1603291264Savos 1604291264Savos if (error != 0) { 1605291264Savos device_printf(sc->sc_dev, "%s: error while reading ROM\n", 1606291264Savos __func__); 1607291264Savos } 1608291264Savos 1609291264Savos return (error); 1610291264Savos#undef URTWN_CHK 1611282623Skevlo} 1612281592Skevlo 1613291698Savosstatic int 1614264912Skevlourtwn_efuse_switch_power(struct urtwn_softc *sc) 1615264912Skevlo{ 1616291698Savos usb_error_t error; 1617264912Skevlo uint32_t reg; 1618251538Srpaulo 1619291698Savos error = urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); 1620291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1621291698Savos return (EIO); 1622281918Skevlo 1623264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1624264912Skevlo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1625291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1626264912Skevlo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1627291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1628291698Savos return (EIO); 1629264912Skevlo } 1630264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1631264912Skevlo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1632291698Savos error = urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1633264912Skevlo reg | R92C_SYS_FUNC_EN_ELDR); 1634291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1635291698Savos return (EIO); 1636264912Skevlo } 1637264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1638264912Skevlo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1639264912Skevlo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1640291698Savos error = urtwn_write_2(sc, R92C_SYS_CLKR, 1641264912Skevlo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1642291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1643291698Savos return (EIO); 1644264912Skevlo } 1645291698Savos 1646291698Savos return (0); 1647264912Skevlo} 1648264912Skevlo 1649251538Srpaulostatic int 1650251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1651251538Srpaulo{ 1652251538Srpaulo uint32_t reg; 1653251538Srpaulo 1654264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1655264912Skevlo return (0); 1656264912Skevlo 1657251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1658251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1659251538Srpaulo return (EIO); 1660251538Srpaulo 1661251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1662251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1663251538Srpaulo /* Check if it is a castrated 8192C. */ 1664251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1665251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1666251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1667251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1668251538Srpaulo } 1669251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1670251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1671251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1672251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1673251538Srpaulo } 1674251538Srpaulo return (0); 1675251538Srpaulo} 1676251538Srpaulo 1677291264Savosstatic int 1678251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1679251538Srpaulo{ 1680291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 1681291264Savos int error; 1682251538Srpaulo 1683251538Srpaulo /* Read full ROM image. */ 1684291264Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(*rom)); 1685291264Savos if (error != 0) 1686291264Savos return (error); 1687251538Srpaulo 1688251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1689291264Savos sc->last_rom_addr = 0x1fa; 1690291264Savos error = urtwn_efuse_read_next(sc, &sc->pa_setting); 1691291264Savos if (error != 0) 1692291264Savos return (error); 1693251538Srpaulo DPRINTF("PA setting=0x%x\n", sc->pa_setting); 1694251538Srpaulo 1695251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1696251538Srpaulo 1697251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1698251538Srpaulo DPRINTF("regulatory type=%d\n", sc->regulatory); 1699287197Sglebius IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1700251538Srpaulo 1701264912Skevlo sc->sc_rf_write = urtwn_r92c_rf_write; 1702264912Skevlo sc->sc_power_on = urtwn_r92c_power_on; 1703291264Savos 1704291264Savos return (0); 1705251538Srpaulo} 1706251538Srpaulo 1707291264Savosstatic int 1708264912Skevlourtwn_r88e_read_rom(struct urtwn_softc *sc) 1709264912Skevlo{ 1710294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 1711294198Savos int error; 1712264912Skevlo 1713294198Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(sc->rom.r88e_rom)); 1714291264Savos if (error != 0) 1715291264Savos return (error); 1716264912Skevlo 1717294198Savos sc->bw20_tx_pwr_diff = (rom->tx_pwr_diff >> 4); 1718264912Skevlo if (sc->bw20_tx_pwr_diff & 0x08) 1719264912Skevlo sc->bw20_tx_pwr_diff |= 0xf0; 1720294198Savos sc->ofdm_tx_pwr_diff = (rom->tx_pwr_diff & 0xf); 1721264912Skevlo if (sc->ofdm_tx_pwr_diff & 0x08) 1722264912Skevlo sc->ofdm_tx_pwr_diff |= 0xf0; 1723294198Savos sc->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY); 1724294198Savos DPRINTF("regulatory type=%d\n", sc->regulatory); 1725294198Savos IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1726264912Skevlo 1727264912Skevlo sc->sc_rf_write = urtwn_r88e_rf_write; 1728264912Skevlo sc->sc_power_on = urtwn_r88e_power_on; 1729291264Savos 1730291264Savos return (0); 1731264912Skevlo} 1732264912Skevlo 1733251538Srpaulo/* 1734251538Srpaulo * Initialize rate adaptation in firmware. 1735251538Srpaulo */ 1736251538Srpaulostatic int 1737251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 1738251538Srpaulo{ 1739287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1740251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1741251538Srpaulo struct ieee80211_node *ni; 1742251538Srpaulo struct ieee80211_rateset *rs; 1743251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 1744251538Srpaulo uint32_t rates, basicrates; 1745251538Srpaulo uint8_t mode; 1746251538Srpaulo int maxrate, maxbasicrate, error, i, j; 1747251538Srpaulo 1748251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1749251538Srpaulo rs = &ni->ni_rates; 1750251538Srpaulo 1751251538Srpaulo /* Get normal and basic rates mask. */ 1752251538Srpaulo rates = basicrates = 0; 1753251538Srpaulo maxrate = maxbasicrate = 0; 1754251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 1755251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 1756289758Savos for (j = 0; j < nitems(ridx2rate); j++) 1757289758Savos if ((rs->rs_rates[i] & IEEE80211_RATE_VAL) == 1758289758Savos ridx2rate[j]) 1759251538Srpaulo break; 1760289758Savos if (j == nitems(ridx2rate)) /* Unknown rate, skip. */ 1761251538Srpaulo continue; 1762251538Srpaulo rates |= 1 << j; 1763251538Srpaulo if (j > maxrate) 1764251538Srpaulo maxrate = j; 1765251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 1766251538Srpaulo basicrates |= 1 << j; 1767251538Srpaulo if (j > maxbasicrate) 1768251538Srpaulo maxbasicrate = j; 1769251538Srpaulo } 1770251538Srpaulo } 1771251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 1772251538Srpaulo mode = R92C_RAID_11B; 1773251538Srpaulo else 1774251538Srpaulo mode = R92C_RAID_11BG; 1775251538Srpaulo DPRINTF("mode=0x%x rates=0x%08x, basicrates=0x%08x\n", 1776251538Srpaulo mode, rates, basicrates); 1777251538Srpaulo 1778251538Srpaulo /* Set rates mask for group addressed frames. */ 1779251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 1780251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 1781251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1782251538Srpaulo if (error != 0) { 1783252401Srpaulo ieee80211_free_node(ni); 1784251538Srpaulo device_printf(sc->sc_dev, 1785251538Srpaulo "could not add broadcast station\n"); 1786251538Srpaulo return (error); 1787251538Srpaulo } 1788251538Srpaulo /* Set initial MRR rate. */ 1789251538Srpaulo DPRINTF("maxbasicrate=%d\n", maxbasicrate); 1790251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 1791251538Srpaulo maxbasicrate); 1792251538Srpaulo 1793251538Srpaulo /* Set rates mask for unicast frames. */ 1794251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 1795251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 1796251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1797251538Srpaulo if (error != 0) { 1798252401Srpaulo ieee80211_free_node(ni); 1799251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 1800251538Srpaulo return (error); 1801251538Srpaulo } 1802251538Srpaulo /* Set initial MRR rate. */ 1803251538Srpaulo DPRINTF("maxrate=%d\n", maxrate); 1804251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 1805251538Srpaulo maxrate); 1806251538Srpaulo 1807251538Srpaulo /* Indicate highest supported rate. */ 1808252403Srpaulo ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1809252401Srpaulo ieee80211_free_node(ni); 1810252401Srpaulo 1811251538Srpaulo return (0); 1812251538Srpaulo} 1813251538Srpaulo 1814290439Savosstatic void 1815290631Savosurtwn_init_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 1816251538Srpaulo{ 1817290631Savos struct r92c_tx_desc *txd = &uvp->bcn_desc; 1818290631Savos 1819290631Savos txd->txdw0 = htole32( 1820290631Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | R92C_TXDW0_BMCAST | 1821290631Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 1822290631Savos txd->txdw1 = htole32( 1823290631Savos SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) | 1824290631Savos SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 1825290631Savos 1826291858Savos if (sc->chip & URTWN_CHIP_88E) { 1827290631Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 1828291858Savos txd->txdseq |= htole16(R88E_TXDSEQ_HWSEQ_EN); 1829291858Savos } else { 1830290631Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 1831291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 1832291858Savos } 1833290631Savos 1834290631Savos txd->txdw4 = htole32(R92C_TXDW4_DRVRATE); 1835290631Savos txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE, URTWN_RIDX_CCK1)); 1836251538Srpaulo} 1837251538Srpaulo 1838290631Savosstatic int 1839290631Savosurtwn_setup_beacon(struct urtwn_softc *sc, struct ieee80211_node *ni) 1840290631Savos{ 1841290631Savos struct ieee80211vap *vap = ni->ni_vap; 1842290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1843290631Savos struct mbuf *m; 1844290631Savos int error; 1845290631Savos 1846290631Savos URTWN_ASSERT_LOCKED(sc); 1847290631Savos 1848290631Savos if (ni->ni_chan == IEEE80211_CHAN_ANYC) 1849290631Savos return (EINVAL); 1850290631Savos 1851290631Savos m = ieee80211_beacon_alloc(ni); 1852290631Savos if (m == NULL) { 1853290631Savos device_printf(sc->sc_dev, 1854290631Savos "%s: could not allocate beacon frame\n", __func__); 1855290631Savos return (ENOMEM); 1856290631Savos } 1857290631Savos 1858290631Savos if (uvp->bcn_mbuf != NULL) 1859290631Savos m_freem(uvp->bcn_mbuf); 1860290631Savos 1861290631Savos uvp->bcn_mbuf = m; 1862290631Savos 1863290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 1864290631Savos return (error); 1865290631Savos 1866290631Savos /* XXX bcnq stuck workaround */ 1867290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 1868290631Savos return (error); 1869290631Savos 1870290631Savos return (0); 1871290631Savos} 1872290631Savos 1873251538Srpaulostatic void 1874290631Savosurtwn_update_beacon(struct ieee80211vap *vap, int item) 1875290631Savos{ 1876290631Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1877290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1878290631Savos struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 1879290631Savos struct ieee80211_node *ni = vap->iv_bss; 1880290631Savos int mcast = 0; 1881290631Savos 1882290631Savos URTWN_LOCK(sc); 1883290631Savos if (uvp->bcn_mbuf == NULL) { 1884290631Savos uvp->bcn_mbuf = ieee80211_beacon_alloc(ni); 1885290631Savos if (uvp->bcn_mbuf == NULL) { 1886290631Savos device_printf(sc->sc_dev, 1887290631Savos "%s: could not allocate beacon frame\n", __func__); 1888290631Savos URTWN_UNLOCK(sc); 1889290631Savos return; 1890290631Savos } 1891290631Savos } 1892290631Savos URTWN_UNLOCK(sc); 1893290631Savos 1894290631Savos if (item == IEEE80211_BEACON_TIM) 1895290631Savos mcast = 1; /* XXX */ 1896290631Savos 1897290631Savos setbit(bo->bo_flags, item); 1898290631Savos ieee80211_beacon_update(ni, uvp->bcn_mbuf, mcast); 1899290631Savos 1900290631Savos URTWN_LOCK(sc); 1901290631Savos urtwn_tx_beacon(sc, uvp); 1902290631Savos URTWN_UNLOCK(sc); 1903290631Savos} 1904290631Savos 1905290631Savos/* 1906290631Savos * Push a beacon frame into the chip. Beacon will 1907290631Savos * be repeated by the chip every R92C_BCN_INTERVAL. 1908290631Savos */ 1909290631Savosstatic int 1910290631Savosurtwn_tx_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 1911290631Savos{ 1912290631Savos struct r92c_tx_desc *desc = &uvp->bcn_desc; 1913290631Savos struct urtwn_data *bf; 1914290631Savos 1915290631Savos URTWN_ASSERT_LOCKED(sc); 1916290631Savos 1917290631Savos bf = urtwn_getbuf(sc); 1918290631Savos if (bf == NULL) 1919290631Savos return (ENOMEM); 1920290631Savos 1921290631Savos memcpy(bf->buf, desc, sizeof(*desc)); 1922290631Savos urtwn_tx_start(sc, uvp->bcn_mbuf, IEEE80211_FC0_TYPE_MGT, bf); 1923290631Savos 1924290631Savos sc->sc_txtimer = 5; 1925290631Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 1926290631Savos 1927290631Savos return (0); 1928290631Savos} 1929290631Savos 1930292175Savosstatic int 1931292175Savosurtwn_key_alloc(struct ieee80211vap *vap, struct ieee80211_key *k, 1932292175Savos ieee80211_keyix *keyix, ieee80211_keyix *rxkeyix) 1933292175Savos{ 1934292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1935292175Savos uint8_t i; 1936292175Savos 1937292175Savos if (!(&vap->iv_nw_keys[0] <= k && 1938292175Savos k < &vap->iv_nw_keys[IEEE80211_WEP_NKID])) { 1939292175Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 1940292175Savos URTWN_LOCK(sc); 1941292175Savos /* 1942292175Savos * First 4 slots for group keys, 1943292175Savos * what is left - for pairwise. 1944292175Savos * XXX incompatible with IBSS RSN. 1945292175Savos */ 1946292175Savos for (i = IEEE80211_WEP_NKID; 1947292175Savos i < R92C_CAM_ENTRY_COUNT; i++) { 1948292175Savos if ((sc->keys_bmap & (1 << i)) == 0) { 1949292175Savos sc->keys_bmap |= 1 << i; 1950292175Savos *keyix = i; 1951292175Savos break; 1952292175Savos } 1953292175Savos } 1954292175Savos URTWN_UNLOCK(sc); 1955292175Savos if (i == R92C_CAM_ENTRY_COUNT) { 1956292175Savos device_printf(sc->sc_dev, 1957292175Savos "%s: no free space in the key table\n", 1958292175Savos __func__); 1959292175Savos return 0; 1960292175Savos } 1961292175Savos } else 1962292175Savos *keyix = 0; 1963292175Savos } else { 1964292175Savos *keyix = k - vap->iv_nw_keys; 1965292175Savos } 1966292175Savos *rxkeyix = *keyix; 1967292175Savos return 1; 1968292175Savos} 1969292175Savos 1970290631Savosstatic void 1971292175Savosurtwn_key_set_cb(struct urtwn_softc *sc, union sec_param *data) 1972292175Savos{ 1973292175Savos struct ieee80211_key *k = &data->key; 1974292175Savos uint8_t algo, keyid; 1975292175Savos int i, error; 1976292175Savos 1977292175Savos if (k->wk_keyix < IEEE80211_WEP_NKID) 1978292175Savos keyid = k->wk_keyix; 1979292175Savos else 1980292175Savos keyid = 0; 1981292175Savos 1982292175Savos /* Map net80211 cipher to HW crypto algorithm. */ 1983292175Savos switch (k->wk_cipher->ic_cipher) { 1984292175Savos case IEEE80211_CIPHER_WEP: 1985292175Savos if (k->wk_keylen < 8) 1986292175Savos algo = R92C_CAM_ALGO_WEP40; 1987292175Savos else 1988292175Savos algo = R92C_CAM_ALGO_WEP104; 1989292175Savos break; 1990292175Savos case IEEE80211_CIPHER_TKIP: 1991292175Savos algo = R92C_CAM_ALGO_TKIP; 1992292175Savos break; 1993292175Savos case IEEE80211_CIPHER_AES_CCM: 1994292175Savos algo = R92C_CAM_ALGO_AES; 1995292175Savos break; 1996292175Savos default: 1997292175Savos device_printf(sc->sc_dev, "%s: undefined cipher %d\n", 1998292175Savos __func__, k->wk_cipher->ic_cipher); 1999292175Savos return; 2000292175Savos } 2001292175Savos 2002292175Savos DPRINTFN(9, "keyix %d, keyid %d, algo %d/%d, flags %04X, len %d, " 2003292175Savos "macaddr %s\n", k->wk_keyix, keyid, k->wk_cipher->ic_cipher, algo, 2004292175Savos k->wk_flags, k->wk_keylen, ether_sprintf(k->wk_macaddr)); 2005292175Savos 2006292175Savos /* Write key. */ 2007292175Savos for (i = 0; i < 4; i++) { 2008292175Savos error = urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 2009292175Savos LE_READ_4(&k->wk_key[i * 4])); 2010292175Savos if (error != 0) 2011292175Savos goto fail; 2012292175Savos } 2013292175Savos 2014292175Savos /* Write CTL0 last since that will validate the CAM entry. */ 2015292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 2016292175Savos LE_READ_4(&k->wk_macaddr[2])); 2017292175Savos if (error != 0) 2018292175Savos goto fail; 2019292175Savos error = urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 2020292175Savos SM(R92C_CAM_ALGO, algo) | 2021292175Savos SM(R92C_CAM_KEYID, keyid) | 2022292175Savos SM(R92C_CAM_MACLO, LE_READ_2(&k->wk_macaddr[0])) | 2023292175Savos R92C_CAM_VALID); 2024292175Savos if (error != 0) 2025292175Savos goto fail; 2026292175Savos 2027292175Savos return; 2028292175Savos 2029292175Savosfail: 2030292175Savos device_printf(sc->sc_dev, "%s fails, error %d\n", __func__, error); 2031292175Savos} 2032292175Savos 2033292175Savosstatic void 2034292175Savosurtwn_key_del_cb(struct urtwn_softc *sc, union sec_param *data) 2035292175Savos{ 2036292175Savos struct ieee80211_key *k = &data->key; 2037292175Savos int i; 2038292175Savos 2039292175Savos DPRINTFN(9, "keyix %d, flags %04X, macaddr %s\n", 2040292175Savos k->wk_keyix, k->wk_flags, ether_sprintf(k->wk_macaddr)); 2041292175Savos 2042292175Savos urtwn_cam_write(sc, R92C_CAM_CTL0(k->wk_keyix), 0); 2043292175Savos urtwn_cam_write(sc, R92C_CAM_CTL1(k->wk_keyix), 0); 2044292175Savos 2045292175Savos /* Clear key. */ 2046292175Savos for (i = 0; i < 4; i++) 2047292175Savos urtwn_cam_write(sc, R92C_CAM_KEY(k->wk_keyix, i), 0); 2048292175Savos sc->keys_bmap &= ~(1 << k->wk_keyix); 2049292175Savos} 2050292175Savos 2051292175Savosstatic int 2052292175Savosurtwn_key_set(struct ieee80211vap *vap, const struct ieee80211_key *k) 2053292175Savos{ 2054292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2055292175Savos 2056292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2057292175Savos /* Not for us. */ 2058292175Savos return (1); 2059292175Savos } 2060292175Savos 2061292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_set_cb)); 2062292175Savos} 2063292175Savos 2064292175Savosstatic int 2065292175Savosurtwn_key_delete(struct ieee80211vap *vap, const struct ieee80211_key *k) 2066292175Savos{ 2067292175Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2068292175Savos 2069292175Savos if (k->wk_flags & IEEE80211_KEY_SWCRYPT) { 2070292175Savos /* Not for us. */ 2071292175Savos return (1); 2072292175Savos } 2073292175Savos 2074292175Savos return (!urtwn_cmd_sleepable(sc, k, sizeof(*k), urtwn_key_del_cb)); 2075292175Savos} 2076292175Savos 2077292175Savosstatic void 2078290651Savosurtwn_tsf_task_adhoc(void *arg, int pending) 2079290651Savos{ 2080290651Savos struct ieee80211vap *vap = arg; 2081290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2082290651Savos struct ieee80211_node *ni; 2083290651Savos uint32_t reg; 2084290651Savos 2085290651Savos URTWN_LOCK(sc); 2086290651Savos ni = ieee80211_ref_node(vap->iv_bss); 2087290651Savos reg = urtwn_read_1(sc, R92C_BCN_CTRL); 2088290651Savos 2089290651Savos /* Accept beacons with the same BSSID. */ 2090290651Savos urtwn_set_rx_bssid_all(sc, 0); 2091290651Savos 2092290651Savos /* Enable synchronization. */ 2093290651Savos reg &= ~R92C_BCN_CTRL_DIS_TSF_UDT0; 2094290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2095290651Savos 2096290651Savos /* Synchronize. */ 2097290651Savos usb_pause_mtx(&sc->sc_mtx, hz * ni->ni_intval * 5 / 1000); 2098290651Savos 2099290651Savos /* Disable synchronization. */ 2100290651Savos reg |= R92C_BCN_CTRL_DIS_TSF_UDT0; 2101290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2102290651Savos 2103290651Savos /* Remove beacon filter. */ 2104290651Savos urtwn_set_rx_bssid_all(sc, 1); 2105290651Savos 2106290651Savos /* Enable beaconing. */ 2107290651Savos urtwn_write_1(sc, R92C_MBID_NUM, 2108290651Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2109290651Savos reg |= R92C_BCN_CTRL_EN_BCN; 2110290651Savos 2111290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 2112290651Savos ieee80211_free_node(ni); 2113290651Savos URTWN_UNLOCK(sc); 2114290651Savos} 2115290651Savos 2116290651Savosstatic void 2117290631Savosurtwn_tsf_sync_enable(struct urtwn_softc *sc, struct ieee80211vap *vap) 2118290631Savos{ 2119290651Savos struct ieee80211com *ic = &sc->sc_ic; 2120290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2121290651Savos 2122290631Savos /* Reset TSF. */ 2123290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2124290631Savos 2125290631Savos switch (vap->iv_opmode) { 2126290631Savos case IEEE80211_M_STA: 2127290631Savos /* Enable TSF synchronization. */ 2128290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2129290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) & 2130290631Savos ~R92C_BCN_CTRL_DIS_TSF_UDT0); 2131290631Savos break; 2132290651Savos case IEEE80211_M_IBSS: 2133290651Savos ieee80211_runtask(ic, &uvp->tsf_task_adhoc); 2134290651Savos break; 2135290631Savos case IEEE80211_M_HOSTAP: 2136290631Savos /* Enable beaconing. */ 2137290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2138290631Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 2139290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 2140290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 2141290631Savos break; 2142290631Savos default: 2143290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2144290631Savos vap->iv_opmode); 2145290631Savos return; 2146290631Savos } 2147290631Savos} 2148290631Savos 2149290631Savosstatic void 2150292203Savosurtwn_get_tsf(struct urtwn_softc *sc, uint64_t *buf) 2151292203Savos{ 2152292203Savos urtwn_read_region_1(sc, R92C_TSFTR, (uint8_t *)buf, sizeof(*buf)); 2153292203Savos} 2154292203Savos 2155292203Savosstatic void 2156251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 2157251538Srpaulo{ 2158251538Srpaulo uint8_t reg; 2159281069Srpaulo 2160251538Srpaulo if (led == URTWN_LED_LINK) { 2161264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 2162264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 2163264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, reg | 0x60); 2164264912Skevlo if (!on) { 2165264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0x90; 2166264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, 2167264912Skevlo reg | R92C_LEDCFG0_DIS); 2168264912Skevlo urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 2169264912Skevlo urtwn_read_1(sc, R92C_MAC_PINMUX_CFG) & 2170264912Skevlo 0xfe); 2171264912Skevlo } 2172264912Skevlo } else { 2173264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 2174264912Skevlo if (!on) 2175264912Skevlo reg |= R92C_LEDCFG0_DIS; 2176264912Skevlo urtwn_write_1(sc, R92C_LEDCFG0, reg); 2177264912Skevlo } 2178264912Skevlo sc->ledlink = on; /* Save LED state. */ 2179251538Srpaulo } 2180251538Srpaulo} 2181251538Srpaulo 2182289811Savosstatic void 2183289811Savosurtwn_set_mode(struct urtwn_softc *sc, uint8_t mode) 2184289811Savos{ 2185289811Savos uint8_t reg; 2186289811Savos 2187289811Savos reg = urtwn_read_1(sc, R92C_MSR); 2188289811Savos reg = (reg & ~R92C_MSR_MASK) | mode; 2189289811Savos urtwn_write_1(sc, R92C_MSR, reg); 2190289811Savos} 2191289811Savos 2192290651Savosstatic void 2193290651Savosurtwn_ibss_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 2194290651Savos const struct ieee80211_rx_stats *rxs, 2195290651Savos int rssi, int nf) 2196290651Savos{ 2197290651Savos struct ieee80211vap *vap = ni->ni_vap; 2198290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 2199290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 2200290651Savos uint64_t ni_tstamp, curr_tstamp; 2201290651Savos 2202290651Savos uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 2203290651Savos 2204290651Savos if (vap->iv_state == IEEE80211_S_RUN && 2205290651Savos (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 2206290651Savos subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 2207290651Savos ni_tstamp = le64toh(ni->ni_tstamp.tsf); 2208290651Savos URTWN_LOCK(sc); 2209290651Savos urtwn_get_tsf(sc, &curr_tstamp); 2210290651Savos URTWN_UNLOCK(sc); 2211290651Savos curr_tstamp = le64toh(curr_tstamp); 2212290651Savos 2213290651Savos if (ni_tstamp >= curr_tstamp) 2214290651Savos (void) ieee80211_ibss_merge(ni); 2215290651Savos } 2216290651Savos} 2217290651Savos 2218251538Srpaulostatic int 2219251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 2220251538Srpaulo{ 2221251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 2222251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 2223286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2224251538Srpaulo struct ieee80211_node *ni; 2225251538Srpaulo enum ieee80211_state ostate; 2226290631Savos uint32_t reg; 2227290631Savos uint8_t mode; 2228290631Savos int error = 0; 2229251538Srpaulo 2230251538Srpaulo ostate = vap->iv_state; 2231251538Srpaulo DPRINTF("%s -> %s\n", ieee80211_state_name[ostate], 2232251538Srpaulo ieee80211_state_name[nstate]); 2233251538Srpaulo 2234251538Srpaulo IEEE80211_UNLOCK(ic); 2235251538Srpaulo URTWN_LOCK(sc); 2236251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 2237251538Srpaulo 2238251538Srpaulo if (ostate == IEEE80211_S_RUN) { 2239251538Srpaulo /* Turn link LED off. */ 2240251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2241251538Srpaulo 2242251538Srpaulo /* Set media status to 'No Link'. */ 2243289811Savos urtwn_set_mode(sc, R92C_MSR_NOLINK); 2244251538Srpaulo 2245251538Srpaulo /* Stop Rx of data frames. */ 2246251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 2247251538Srpaulo 2248251538Srpaulo /* Disable TSF synchronization. */ 2249251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 2250290631Savos (urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN) | 2251251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 2252251538Srpaulo 2253290631Savos /* Disable beaconing. */ 2254290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2255290631Savos urtwn_read_1(sc, R92C_MBID_NUM) & ~R92C_MBID_TXBCN_RPT0); 2256290631Savos 2257290631Savos /* Reset TSF. */ 2258290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2259290631Savos 2260251538Srpaulo /* Reset EDCA parameters. */ 2261251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 2262251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 2263251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 2264251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 2265251538Srpaulo } 2266251538Srpaulo 2267251538Srpaulo switch (nstate) { 2268251538Srpaulo case IEEE80211_S_INIT: 2269251538Srpaulo /* Turn link LED off. */ 2270251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2271251538Srpaulo break; 2272251538Srpaulo case IEEE80211_S_SCAN: 2273251538Srpaulo /* Pause AC Tx queues. */ 2274251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 2275293180Savos urtwn_read_1(sc, R92C_TXPAUSE) | R92C_TX_QUEUE_AC); 2276251538Srpaulo break; 2277251538Srpaulo case IEEE80211_S_AUTH: 2278251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 2279251538Srpaulo break; 2280251538Srpaulo case IEEE80211_S_RUN: 2281251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 2282251538Srpaulo /* Turn link LED on. */ 2283251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2284251538Srpaulo break; 2285251538Srpaulo } 2286251538Srpaulo 2287251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 2288290631Savos 2289290631Savos if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || 2290290631Savos ni->ni_chan == IEEE80211_CHAN_ANYC) { 2291290631Savos device_printf(sc->sc_dev, 2292290631Savos "%s: could not move to RUN state\n", __func__); 2293290631Savos error = EINVAL; 2294290631Savos goto end_run; 2295290631Savos } 2296290631Savos 2297290631Savos switch (vap->iv_opmode) { 2298290631Savos case IEEE80211_M_STA: 2299290631Savos mode = R92C_MSR_INFRA; 2300290631Savos break; 2301290651Savos case IEEE80211_M_IBSS: 2302290651Savos mode = R92C_MSR_ADHOC; 2303290651Savos break; 2304290631Savos case IEEE80211_M_HOSTAP: 2305290631Savos mode = R92C_MSR_AP; 2306290631Savos break; 2307290631Savos default: 2308290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2309290631Savos vap->iv_opmode); 2310290631Savos error = EINVAL; 2311290631Savos goto end_run; 2312290631Savos } 2313290631Savos 2314251538Srpaulo /* Set media status to 'Associated'. */ 2315290631Savos urtwn_set_mode(sc, mode); 2316251538Srpaulo 2317251538Srpaulo /* Set BSSID. */ 2318251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 0, LE_READ_4(&ni->ni_bssid[0])); 2319251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 4, LE_READ_2(&ni->ni_bssid[4])); 2320251538Srpaulo 2321251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2322251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 2323251538Srpaulo else /* 802.11b/g */ 2324251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 2325251538Srpaulo 2326251538Srpaulo /* Enable Rx of data frames. */ 2327251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 2328251538Srpaulo 2329251538Srpaulo /* Flush all AC queues. */ 2330251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 2331251538Srpaulo 2332251538Srpaulo /* Set beacon interval. */ 2333251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 2334251538Srpaulo 2335251538Srpaulo /* Allow Rx from our BSSID only. */ 2336290564Savos if (ic->ic_promisc == 0) { 2337290631Savos reg = urtwn_read_4(sc, R92C_RCR); 2338290631Savos 2339290631Savos if (vap->iv_opmode != IEEE80211_M_HOSTAP) 2340290631Savos reg |= R92C_RCR_CBSSID_DATA; 2341290651Savos if (vap->iv_opmode != IEEE80211_M_IBSS) 2342290651Savos reg |= R92C_RCR_CBSSID_BCN; 2343290631Savos 2344290631Savos urtwn_write_4(sc, R92C_RCR, reg); 2345290564Savos } 2346251538Srpaulo 2347290651Savos if (vap->iv_opmode == IEEE80211_M_HOSTAP || 2348290651Savos vap->iv_opmode == IEEE80211_M_IBSS) { 2349290631Savos error = urtwn_setup_beacon(sc, ni); 2350290631Savos if (error != 0) { 2351290631Savos device_printf(sc->sc_dev, 2352290631Savos "unable to push beacon into the chip, " 2353290631Savos "error %d\n", error); 2354290631Savos goto end_run; 2355290631Savos } 2356290631Savos } 2357290631Savos 2358251538Srpaulo /* Enable TSF synchronization. */ 2359290631Savos urtwn_tsf_sync_enable(sc, vap); 2360251538Srpaulo 2361251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 2362251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 2363251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 2364251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 2365251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 2366251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 2367251538Srpaulo 2368251538Srpaulo /* Intialize rate adaptation. */ 2369292167Savos if (!(sc->chip & URTWN_CHIP_88E)) 2370264912Skevlo urtwn_ra_init(sc); 2371251538Srpaulo /* Turn link LED on. */ 2372251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2373251538Srpaulo 2374251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 2375251538Srpaulo /* Reset temperature calibration state machine. */ 2376251538Srpaulo sc->thcal_state = 0; 2377251538Srpaulo sc->thcal_lctemp = 0; 2378290631Savos 2379290631Savosend_run: 2380251538Srpaulo ieee80211_free_node(ni); 2381251538Srpaulo break; 2382251538Srpaulo default: 2383251538Srpaulo break; 2384251538Srpaulo } 2385290631Savos 2386251538Srpaulo URTWN_UNLOCK(sc); 2387251538Srpaulo IEEE80211_LOCK(ic); 2388290631Savos return (error != 0 ? error : uvp->newstate(vap, nstate, arg)); 2389251538Srpaulo} 2390251538Srpaulo 2391251538Srpaulostatic void 2392251538Srpaulourtwn_watchdog(void *arg) 2393251538Srpaulo{ 2394251538Srpaulo struct urtwn_softc *sc = arg; 2395251538Srpaulo 2396251538Srpaulo if (sc->sc_txtimer > 0) { 2397251538Srpaulo if (--sc->sc_txtimer == 0) { 2398251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 2399287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2400251538Srpaulo return; 2401251538Srpaulo } 2402251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2403251538Srpaulo } 2404251538Srpaulo} 2405251538Srpaulo 2406251538Srpaulostatic void 2407251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 2408251538Srpaulo{ 2409251538Srpaulo int pwdb; 2410251538Srpaulo 2411251538Srpaulo /* Convert antenna signal to percentage. */ 2412251538Srpaulo if (rssi <= -100 || rssi >= 20) 2413251538Srpaulo pwdb = 0; 2414251538Srpaulo else if (rssi >= 0) 2415251538Srpaulo pwdb = 100; 2416251538Srpaulo else 2417251538Srpaulo pwdb = 100 + rssi; 2418264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2419289758Savos if (rate <= URTWN_RIDX_CCK11) { 2420264912Skevlo /* CCK gain is smaller than OFDM/MCS gain. */ 2421264912Skevlo pwdb += 6; 2422264912Skevlo if (pwdb > 100) 2423264912Skevlo pwdb = 100; 2424264912Skevlo if (pwdb <= 14) 2425264912Skevlo pwdb -= 4; 2426264912Skevlo else if (pwdb <= 26) 2427264912Skevlo pwdb -= 8; 2428264912Skevlo else if (pwdb <= 34) 2429264912Skevlo pwdb -= 6; 2430264912Skevlo else if (pwdb <= 42) 2431264912Skevlo pwdb -= 2; 2432264912Skevlo } 2433251538Srpaulo } 2434251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 2435251538Srpaulo sc->avg_pwdb = pwdb; 2436251538Srpaulo else if (sc->avg_pwdb < pwdb) 2437251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 2438251538Srpaulo else 2439251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 2440251538Srpaulo DPRINTFN(4, "PWDB=%d EMA=%d\n", pwdb, sc->avg_pwdb); 2441251538Srpaulo} 2442251538Srpaulo 2443251538Srpaulostatic int8_t 2444251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2445251538Srpaulo{ 2446251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 2447251538Srpaulo struct r92c_rx_phystat *phy; 2448251538Srpaulo struct r92c_rx_cck *cck; 2449251538Srpaulo uint8_t rpt; 2450251538Srpaulo int8_t rssi; 2451251538Srpaulo 2452289758Savos if (rate <= URTWN_RIDX_CCK11) { 2453251538Srpaulo cck = (struct r92c_rx_cck *)physt; 2454251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 2455251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 2456251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 2457251538Srpaulo } else { 2458251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 2459251538Srpaulo rssi = cck->agc_rpt & 0x3e; 2460251538Srpaulo } 2461251538Srpaulo rssi = cckoff[rpt] - rssi; 2462251538Srpaulo } else { /* OFDM/HT. */ 2463251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 2464251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2465251538Srpaulo } 2466251538Srpaulo return (rssi); 2467251538Srpaulo} 2468251538Srpaulo 2469264912Skevlostatic int8_t 2470264912Skevlourtwn_r88e_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2471264912Skevlo{ 2472264912Skevlo struct r92c_rx_phystat *phy; 2473264912Skevlo struct r88e_rx_cck *cck; 2474264912Skevlo uint8_t cck_agc_rpt, lna_idx, vga_idx; 2475264912Skevlo int8_t rssi; 2476264912Skevlo 2477264972Skevlo rssi = 0; 2478289758Savos if (rate <= URTWN_RIDX_CCK11) { 2479264912Skevlo cck = (struct r88e_rx_cck *)physt; 2480264912Skevlo cck_agc_rpt = cck->agc_rpt; 2481264912Skevlo lna_idx = (cck_agc_rpt & 0xe0) >> 5; 2482281069Srpaulo vga_idx = cck_agc_rpt & 0x1f; 2483264912Skevlo switch (lna_idx) { 2484264912Skevlo case 7: 2485264912Skevlo if (vga_idx <= 27) 2486264912Skevlo rssi = -100 + 2* (27 - vga_idx); 2487264912Skevlo else 2488264912Skevlo rssi = -100; 2489264912Skevlo break; 2490264912Skevlo case 6: 2491264912Skevlo rssi = -48 + 2 * (2 - vga_idx); 2492264912Skevlo break; 2493264912Skevlo case 5: 2494264912Skevlo rssi = -42 + 2 * (7 - vga_idx); 2495264912Skevlo break; 2496264912Skevlo case 4: 2497264912Skevlo rssi = -36 + 2 * (7 - vga_idx); 2498264912Skevlo break; 2499264912Skevlo case 3: 2500264912Skevlo rssi = -24 + 2 * (7 - vga_idx); 2501264912Skevlo break; 2502264912Skevlo case 2: 2503264912Skevlo rssi = -12 + 2 * (5 - vga_idx); 2504264912Skevlo break; 2505264912Skevlo case 1: 2506264912Skevlo rssi = 8 - (2 * vga_idx); 2507264912Skevlo break; 2508264912Skevlo case 0: 2509264912Skevlo rssi = 14 - (2 * vga_idx); 2510264912Skevlo break; 2511264912Skevlo } 2512264912Skevlo rssi += 6; 2513264912Skevlo } else { /* OFDM/HT. */ 2514264912Skevlo phy = (struct r92c_rx_phystat *)physt; 2515264912Skevlo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2516264912Skevlo } 2517264912Skevlo return (rssi); 2518264912Skevlo} 2519264912Skevlo 2520292167Savosstatic __inline uint8_t 2521292167Savosrate2ridx(uint8_t rate) 2522292167Savos{ 2523292167Savos switch (rate) { 2524292167Savos case 12: return 4; 2525292167Savos case 18: return 5; 2526292167Savos case 24: return 6; 2527292167Savos case 36: return 7; 2528292167Savos case 48: return 8; 2529292167Savos case 72: return 9; 2530292167Savos case 96: return 10; 2531292167Savos case 108: return 11; 2532292167Savos case 2: return 0; 2533292167Savos case 4: return 1; 2534292167Savos case 11: return 2; 2535292167Savos case 22: return 3; 2536292167Savos default: return 0; 2537292167Savos } 2538292167Savos} 2539292167Savos 2540251538Srpaulostatic int 2541290630Savosurtwn_tx_data(struct urtwn_softc *sc, struct ieee80211_node *ni, 2542290630Savos struct mbuf *m, struct urtwn_data *data) 2543251538Srpaulo{ 2544292167Savos const struct ieee80211_txparam *tp; 2545287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2546251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 2547292167Savos struct ieee80211_key *k = NULL; 2548292167Savos struct ieee80211_channel *chan; 2549292167Savos struct ieee80211_frame *wh; 2550251538Srpaulo struct r92c_tx_desc *txd; 2551292167Savos uint8_t macid, raid, rate, ridx, subtype, type, tid, qsel; 2552292014Savos int hasqos, ismcast; 2553251538Srpaulo 2554251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2555251538Srpaulo 2556251538Srpaulo /* 2557251538Srpaulo * Software crypto. 2558251538Srpaulo */ 2559290630Savos wh = mtod(m, struct ieee80211_frame *); 2560264912Skevlo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2561290630Savos subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2562292014Savos hasqos = IEEE80211_QOS_HAS_SEQ(wh); 2563290630Savos ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2564264912Skevlo 2565292014Savos /* Select TX ring for this frame. */ 2566292014Savos if (hasqos) { 2567292014Savos tid = ((const struct ieee80211_qosframe *)wh)->i_qos[0]; 2568292014Savos tid &= IEEE80211_QOS_TID; 2569292014Savos } else 2570292014Savos tid = 0; 2571292014Savos 2572292167Savos chan = (ni->ni_chan != IEEE80211_CHAN_ANYC) ? 2573292167Savos ni->ni_chan : ic->ic_curchan; 2574292167Savos tp = &vap->iv_txparms[ieee80211_chan2mode(chan)]; 2575292167Savos 2576292167Savos /* Choose a TX rate index. */ 2577292167Savos if (type == IEEE80211_FC0_TYPE_MGT) 2578292167Savos rate = tp->mgmtrate; 2579292167Savos else if (ismcast) 2580292167Savos rate = tp->mcastrate; 2581292167Savos else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 2582292167Savos rate = tp->ucastrate; 2583292167Savos else if (m->m_flags & M_EAPOL) 2584292167Savos rate = tp->mgmtrate; 2585292167Savos else { 2586292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) { 2587292167Savos /* XXX pass pktlen */ 2588292167Savos (void) ieee80211_ratectl_rate(ni, NULL, 0); 2589292167Savos rate = ni->ni_txrate; 2590292167Savos } else { 2591292167Savos if (ic->ic_curmode != IEEE80211_MODE_11B) 2592292167Savos rate = 108; 2593292167Savos else 2594292167Savos rate = 22; 2595292167Savos } 2596292167Savos } 2597292167Savos 2598292167Savos ridx = rate2ridx(rate); 2599292167Savos if (ic->ic_curmode != IEEE80211_MODE_11B) 2600292167Savos raid = R92C_RAID_11BG; 2601292167Savos else 2602292167Savos raid = R92C_RAID_11B; 2603292167Savos 2604260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2605290630Savos k = ieee80211_crypto_encap(ni, m); 2606251538Srpaulo if (k == NULL) { 2607251538Srpaulo device_printf(sc->sc_dev, 2608251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 2609251538Srpaulo return (ENOBUFS); 2610251538Srpaulo } 2611251538Srpaulo 2612251538Srpaulo /* in case packet header moved, reset pointer */ 2613290630Savos wh = mtod(m, struct ieee80211_frame *); 2614251538Srpaulo } 2615281069Srpaulo 2616251538Srpaulo /* Fill Tx descriptor. */ 2617251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 2618251538Srpaulo memset(txd, 0, sizeof(*txd)); 2619251538Srpaulo 2620251538Srpaulo txd->txdw0 |= htole32( 2621251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 2622251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2623290630Savos if (ismcast) 2624251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 2625290630Savos 2626290630Savos if (!ismcast) { 2627292167Savos if (sc->chip & URTWN_CHIP_88E) { 2628292167Savos struct urtwn_node *un = URTWN_NODE(ni); 2629292167Savos macid = un->id; 2630292167Savos } else 2631292167Savos macid = URTWN_MACID_BSS; 2632290630Savos 2633290630Savos if (type == IEEE80211_FC0_TYPE_DATA) { 2634292014Savos qsel = tid % URTWN_MAX_TID; 2635290630Savos 2636292167Savos if (sc->chip & URTWN_CHIP_88E) { 2637292167Savos txd->txdw2 |= htole32( 2638292167Savos R88E_TXDW2_AGGBK | 2639292167Savos R88E_TXDW2_CCX_RPT); 2640292167Savos } else 2641290630Savos txd->txdw1 |= htole32(R92C_TXDW1_AGGBK); 2642290630Savos 2643290630Savos if (ic->ic_flags & IEEE80211_F_USEPROT) { 2644290630Savos switch (ic->ic_protmode) { 2645290630Savos case IEEE80211_PROT_CTSONLY: 2646290630Savos txd->txdw4 |= htole32( 2647290630Savos R92C_TXDW4_CTS2SELF | 2648290630Savos R92C_TXDW4_HWRTSEN); 2649290630Savos break; 2650290630Savos case IEEE80211_PROT_RTSCTS: 2651290630Savos txd->txdw4 |= htole32( 2652290630Savos R92C_TXDW4_RTSEN | 2653290630Savos R92C_TXDW4_HWRTSEN); 2654290630Savos break; 2655290630Savos default: 2656290630Savos break; 2657290630Savos } 2658290630Savos } 2659290630Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 2660290630Savos URTWN_RIDX_OFDM24)); 2661290630Savos txd->txdw5 |= htole32(0x0001ff00); 2662290630Savos } else /* IEEE80211_FC0_TYPE_MGT */ 2663290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2664251538Srpaulo } else { 2665290630Savos macid = URTWN_MACID_BC; 2666290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2667290630Savos } 2668251538Srpaulo 2669290630Savos txd->txdw1 |= htole32( 2670290630Savos SM(R92C_TXDW1_QSEL, qsel) | 2671290630Savos SM(R92C_TXDW1_RAID, raid)); 2672290630Savos 2673290630Savos if (sc->chip & URTWN_CHIP_88E) 2674290630Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, macid)); 2675290630Savos else 2676290630Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, macid)); 2677290630Savos 2678290630Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 2679291858Savos /* Force this rate if needed. */ 2680292167Savos if (URTWN_CHIP_HAS_RATECTL(sc) || ismcast || 2681292167Savos (m->m_flags & M_EAPOL) || type != IEEE80211_FC0_TYPE_DATA) 2682251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 2683251538Srpaulo 2684292014Savos if (!hasqos) { 2685251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 2686291858Savos if (sc->chip & URTWN_CHIP_88E) 2687291858Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 2688291858Savos else 2689291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2690290630Savos } else { 2691290630Savos /* Set sequence number. */ 2692290630Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 2693290630Savos } 2694251538Srpaulo 2695292175Savos if (k != NULL && !(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 2696292175Savos uint8_t cipher; 2697292175Savos 2698292175Savos switch (k->wk_cipher->ic_cipher) { 2699292175Savos case IEEE80211_CIPHER_WEP: 2700292175Savos case IEEE80211_CIPHER_TKIP: 2701292175Savos cipher = R92C_TXDW1_CIPHER_RC4; 2702292175Savos break; 2703292175Savos case IEEE80211_CIPHER_AES_CCM: 2704292175Savos cipher = R92C_TXDW1_CIPHER_AES; 2705292175Savos break; 2706292175Savos default: 2707292175Savos device_printf(sc->sc_dev, "%s: unknown cipher %d\n", 2708292175Savos __func__, k->wk_cipher->ic_cipher); 2709292175Savos return (EINVAL); 2710292175Savos } 2711292175Savos 2712292175Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 2713292175Savos } 2714292175Savos 2715251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 2716251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 2717251538Srpaulo 2718251538Srpaulo tap->wt_flags = 0; 2719290630Savos if (k != NULL) 2720290630Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2721290630Savos ieee80211_radiotap_tx(vap, m); 2722251538Srpaulo } 2723251538Srpaulo 2724290630Savos data->ni = ni; 2725251538Srpaulo 2726290630Savos urtwn_tx_start(sc, m, type, data); 2727290630Savos 2728290630Savos return (0); 2729290630Savos} 2730290630Savos 2731292221Savosstatic int 2732292221Savosurtwn_tx_raw(struct urtwn_softc *sc, struct ieee80211_node *ni, 2733292221Savos struct mbuf *m, struct urtwn_data *data, 2734292221Savos const struct ieee80211_bpf_params *params) 2735292221Savos{ 2736292221Savos struct ieee80211vap *vap = ni->ni_vap; 2737292221Savos struct ieee80211_key *k = NULL; 2738292221Savos struct ieee80211_frame *wh; 2739292221Savos struct r92c_tx_desc *txd; 2740292221Savos uint8_t cipher, ridx, type; 2741292221Savos 2742292221Savos /* Encrypt the frame if need be. */ 2743292221Savos cipher = R92C_TXDW1_CIPHER_NONE; 2744292221Savos if (params->ibp_flags & IEEE80211_BPF_CRYPTO) { 2745292221Savos /* Retrieve key for TX. */ 2746292221Savos k = ieee80211_crypto_encap(ni, m); 2747292221Savos if (k == NULL) 2748292221Savos return (ENOBUFS); 2749292221Savos 2750292221Savos if (!(k->wk_flags & IEEE80211_KEY_SWCRYPT)) { 2751292221Savos switch (k->wk_cipher->ic_cipher) { 2752292221Savos case IEEE80211_CIPHER_WEP: 2753292221Savos case IEEE80211_CIPHER_TKIP: 2754292221Savos cipher = R92C_TXDW1_CIPHER_RC4; 2755292221Savos break; 2756292221Savos case IEEE80211_CIPHER_AES_CCM: 2757292221Savos cipher = R92C_TXDW1_CIPHER_AES; 2758292221Savos break; 2759292221Savos default: 2760292221Savos device_printf(sc->sc_dev, 2761292221Savos "%s: unknown cipher %d\n", 2762292221Savos __func__, k->wk_cipher->ic_cipher); 2763292221Savos return (EINVAL); 2764292221Savos } 2765292221Savos } 2766292221Savos } 2767292221Savos 2768292221Savos wh = mtod(m, struct ieee80211_frame *); 2769292221Savos type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2770292221Savos 2771292221Savos /* Fill Tx descriptor. */ 2772292221Savos txd = (struct r92c_tx_desc *)data->buf; 2773292221Savos memset(txd, 0, sizeof(*txd)); 2774292221Savos 2775292221Savos txd->txdw0 |= htole32( 2776292221Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 2777292221Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2778292221Savos if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 2779292221Savos txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 2780292221Savos 2781292221Savos if (params->ibp_flags & IEEE80211_BPF_RTS) 2782292221Savos txd->txdw4 |= htole32(R92C_TXDW4_RTSEN); 2783292221Savos if (params->ibp_flags & IEEE80211_BPF_CTS) 2784292221Savos txd->txdw4 |= htole32(R92C_TXDW4_CTS2SELF); 2785292221Savos if (txd->txdw4 & htole32(R92C_TXDW4_RTSEN | R92C_TXDW4_CTS2SELF)) { 2786292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWRTSEN); 2787292221Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 2788292221Savos URTWN_RIDX_OFDM24)); 2789292221Savos } 2790292221Savos 2791292221Savos if (sc->chip & URTWN_CHIP_88E) 2792292221Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 2793292221Savos else 2794292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 2795292221Savos 2796292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_MGNT)); 2797292221Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_CIPHER, cipher)); 2798292221Savos 2799292221Savos /* Choose a TX rate index. */ 2800292221Savos ridx = rate2ridx(params->ibp_rate0); 2801292221Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 2802292221Savos txd->txdw5 |= htole32(0x0001ff00); 2803292221Savos txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 2804292221Savos 2805292221Savos if (!IEEE80211_QOS_HAS_SEQ(wh)) { 2806292221Savos /* Use HW sequence numbering for non-QoS frames. */ 2807292221Savos if (sc->chip & URTWN_CHIP_88E) 2808292221Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 2809292221Savos else 2810292221Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2811292221Savos } else { 2812292221Savos /* Set sequence number. */ 2813292221Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 2814292221Savos } 2815292221Savos 2816292221Savos if (ieee80211_radiotap_active_vap(vap)) { 2817292221Savos struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 2818292221Savos 2819292221Savos tap->wt_flags = 0; 2820292221Savos if (k != NULL) 2821292221Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2822292221Savos ieee80211_radiotap_tx(vap, m); 2823292221Savos } 2824292221Savos 2825292221Savos data->ni = ni; 2826292221Savos 2827292221Savos urtwn_tx_start(sc, m, type, data); 2828292221Savos 2829292221Savos return (0); 2830292221Savos} 2831292221Savos 2832290630Savosstatic void 2833290630Savosurtwn_tx_start(struct urtwn_softc *sc, struct mbuf *m, uint8_t type, 2834290630Savos struct urtwn_data *data) 2835290630Savos{ 2836290630Savos struct usb_xfer *xfer; 2837290630Savos struct r92c_tx_desc *txd; 2838290630Savos uint16_t ac, sum; 2839290630Savos int i, xferlen; 2840290630Savos 2841290630Savos URTWN_ASSERT_LOCKED(sc); 2842290630Savos 2843290630Savos ac = M_WME_GETAC(m); 2844290630Savos 2845290630Savos switch (type) { 2846290630Savos case IEEE80211_FC0_TYPE_CTL: 2847290630Savos case IEEE80211_FC0_TYPE_MGT: 2848290630Savos xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 2849290630Savos break; 2850290630Savos default: 2851292014Savos xfer = sc->sc_xfer[wme2queue[ac].qid]; 2852290630Savos break; 2853290630Savos } 2854290630Savos 2855290630Savos txd = (struct r92c_tx_desc *)data->buf; 2856290630Savos txd->txdw0 |= htole32(SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len)); 2857290630Savos 2858290630Savos /* Compute Tx descriptor checksum. */ 2859290630Savos sum = 0; 2860290630Savos for (i = 0; i < sizeof(*txd) / 2; i++) 2861290630Savos sum ^= ((uint16_t *)txd)[i]; 2862290630Savos txd->txdsum = sum; /* NB: already little endian. */ 2863290630Savos 2864290630Savos xferlen = sizeof(*txd) + m->m_pkthdr.len; 2865290630Savos m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&txd[1]); 2866290630Savos 2867251538Srpaulo data->buflen = xferlen; 2868290630Savos data->m = m; 2869251538Srpaulo 2870251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 2871251538Srpaulo usbd_transfer_start(xfer); 2872251538Srpaulo} 2873251538Srpaulo 2874287197Sglebiusstatic int 2875287197Sglebiusurtwn_transmit(struct ieee80211com *ic, struct mbuf *m) 2876251538Srpaulo{ 2877287197Sglebius struct urtwn_softc *sc = ic->ic_softc; 2878287197Sglebius int error; 2879261863Srpaulo 2880261863Srpaulo URTWN_LOCK(sc); 2881287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 2882287197Sglebius URTWN_UNLOCK(sc); 2883287197Sglebius return (ENXIO); 2884287197Sglebius } 2885287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 2886287197Sglebius if (error) { 2887287197Sglebius URTWN_UNLOCK(sc); 2888287197Sglebius return (error); 2889287197Sglebius } 2890287197Sglebius urtwn_start(sc); 2891261863Srpaulo URTWN_UNLOCK(sc); 2892287197Sglebius 2893287197Sglebius return (0); 2894261863Srpaulo} 2895261863Srpaulo 2896261863Srpaulostatic void 2897287197Sglebiusurtwn_start(struct urtwn_softc *sc) 2898261863Srpaulo{ 2899251538Srpaulo struct ieee80211_node *ni; 2900251538Srpaulo struct mbuf *m; 2901251538Srpaulo struct urtwn_data *bf; 2902251538Srpaulo 2903261863Srpaulo URTWN_ASSERT_LOCKED(sc); 2904287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2905251538Srpaulo bf = urtwn_getbuf(sc); 2906251538Srpaulo if (bf == NULL) { 2907287197Sglebius mbufq_prepend(&sc->sc_snd, m); 2908251538Srpaulo break; 2909251538Srpaulo } 2910251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2911251538Srpaulo m->m_pkthdr.rcvif = NULL; 2912290630Savos if (urtwn_tx_data(sc, ni, m, bf) != 0) { 2913287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 2914287197Sglebius IFCOUNTER_OERRORS, 1); 2915251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 2916288353Sadrian m_freem(m); 2917251538Srpaulo ieee80211_free_node(ni); 2918251538Srpaulo break; 2919251538Srpaulo } 2920251538Srpaulo sc->sc_txtimer = 5; 2921251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2922251538Srpaulo } 2923251538Srpaulo} 2924251538Srpaulo 2925287197Sglebiusstatic void 2926287197Sglebiusurtwn_parent(struct ieee80211com *ic) 2927251538Srpaulo{ 2928286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2929251538Srpaulo 2930263153Skevlo URTWN_LOCK(sc); 2931287197Sglebius if (sc->sc_flags & URTWN_DETACHED) { 2932287197Sglebius URTWN_UNLOCK(sc); 2933287197Sglebius return; 2934287197Sglebius } 2935291698Savos URTWN_UNLOCK(sc); 2936291698Savos 2937287197Sglebius if (ic->ic_nrunning > 0) { 2938291698Savos if (urtwn_init(sc) != 0) { 2939291698Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2940291698Savos if (vap != NULL) 2941291698Savos ieee80211_stop(vap); 2942291698Savos } else 2943291698Savos ieee80211_start_all(ic); 2944291698Savos } else 2945287197Sglebius urtwn_stop(sc); 2946251538Srpaulo} 2947251538Srpaulo 2948264912Skevlostatic __inline int 2949251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 2950251538Srpaulo{ 2951264912Skevlo 2952264912Skevlo return sc->sc_power_on(sc); 2953264912Skevlo} 2954264912Skevlo 2955264912Skevlostatic int 2956264912Skevlourtwn_r92c_power_on(struct urtwn_softc *sc) 2957264912Skevlo{ 2958251538Srpaulo uint32_t reg; 2959291698Savos usb_error_t error; 2960251538Srpaulo int ntries; 2961251538Srpaulo 2962251538Srpaulo /* Wait for autoload done bit. */ 2963251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2964251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 2965251538Srpaulo break; 2966266472Shselasky urtwn_ms_delay(sc); 2967251538Srpaulo } 2968251538Srpaulo if (ntries == 1000) { 2969251538Srpaulo device_printf(sc->sc_dev, 2970251538Srpaulo "timeout waiting for chip autoload\n"); 2971251538Srpaulo return (ETIMEDOUT); 2972251538Srpaulo } 2973251538Srpaulo 2974251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 2975291698Savos error = urtwn_write_1(sc, R92C_RSV_CTRL, 0); 2976291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2977291698Savos return (EIO); 2978251538Srpaulo /* Move SPS into PWM mode. */ 2979291698Savos error = urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 2980291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2981291698Savos return (EIO); 2982266472Shselasky urtwn_ms_delay(sc); 2983251538Srpaulo 2984251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 2985251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 2986291698Savos error = urtwn_write_1(sc, R92C_LDOV12D_CTRL, 2987251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 2988291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2989291698Savos return (EIO); 2990266472Shselasky urtwn_ms_delay(sc); 2991291698Savos error = urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 2992251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 2993251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 2994291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2995291698Savos return (EIO); 2996251538Srpaulo } 2997251538Srpaulo 2998251538Srpaulo /* Auto enable WLAN. */ 2999291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3000251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3001291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3002291698Savos return (EIO); 3003251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3004262822Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3005262822Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3006251538Srpaulo break; 3007266472Shselasky urtwn_ms_delay(sc); 3008251538Srpaulo } 3009251538Srpaulo if (ntries == 1000) { 3010251538Srpaulo device_printf(sc->sc_dev, 3011251538Srpaulo "timeout waiting for MAC auto ON\n"); 3012251538Srpaulo return (ETIMEDOUT); 3013251538Srpaulo } 3014251538Srpaulo 3015251538Srpaulo /* Enable radio, GPIO and LED functions. */ 3016291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3017251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 3018251538Srpaulo R92C_APS_FSMCO_PDN_EN | 3019251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 3020291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3021291698Savos return (EIO); 3022251538Srpaulo /* Release RF digital isolation. */ 3023291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 3024251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 3025291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3026291698Savos return (EIO); 3027251538Srpaulo 3028251538Srpaulo /* Initialize MAC. */ 3029291698Savos error = urtwn_write_1(sc, R92C_APSD_CTRL, 3030251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 3031291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3032291698Savos return (EIO); 3033251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 3034251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 3035251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 3036251538Srpaulo break; 3037266472Shselasky urtwn_ms_delay(sc); 3038251538Srpaulo } 3039251538Srpaulo if (ntries == 200) { 3040251538Srpaulo device_printf(sc->sc_dev, 3041251538Srpaulo "timeout waiting for MAC initialization\n"); 3042251538Srpaulo return (ETIMEDOUT); 3043251538Srpaulo } 3044251538Srpaulo 3045251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3046251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 3047251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3048251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3049251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 3050251538Srpaulo R92C_CR_ENSEC; 3051291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3052291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3053291698Savos return (EIO); 3054251538Srpaulo 3055291698Savos error = urtwn_write_1(sc, 0xfe10, 0x19); 3056291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3057291698Savos return (EIO); 3058251538Srpaulo return (0); 3059251538Srpaulo} 3060251538Srpaulo 3061251538Srpaulostatic int 3062264912Skevlourtwn_r88e_power_on(struct urtwn_softc *sc) 3063264912Skevlo{ 3064264912Skevlo uint32_t reg; 3065291698Savos usb_error_t error; 3066264912Skevlo int ntries; 3067264912Skevlo 3068264912Skevlo /* Wait for power ready bit. */ 3069264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3070281918Skevlo if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST) 3071264912Skevlo break; 3072266472Shselasky urtwn_ms_delay(sc); 3073264912Skevlo } 3074264912Skevlo if (ntries == 5000) { 3075264912Skevlo device_printf(sc->sc_dev, 3076264912Skevlo "timeout waiting for chip power up\n"); 3077264912Skevlo return (ETIMEDOUT); 3078264912Skevlo } 3079264912Skevlo 3080264912Skevlo /* Reset BB. */ 3081291698Savos error = urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3082264912Skevlo urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB | 3083264912Skevlo R92C_SYS_FUNC_EN_BB_GLB_RST)); 3084291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3085291698Savos return (EIO); 3086264912Skevlo 3087291698Savos error = urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 3088281918Skevlo urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 3089291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3090291698Savos return (EIO); 3091264912Skevlo 3092264912Skevlo /* Disable HWPDN. */ 3093291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3094281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN); 3095291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3096291698Savos return (EIO); 3097264912Skevlo 3098264912Skevlo /* Disable WL suspend. */ 3099291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3100281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & 3101281918Skevlo ~(R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE)); 3102291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3103291698Savos return (EIO); 3104264912Skevlo 3105291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 3106281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 3107291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3108291698Savos return (EIO); 3109264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 3110281918Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 3111281918Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 3112264912Skevlo break; 3113266472Shselasky urtwn_ms_delay(sc); 3114264912Skevlo } 3115264912Skevlo if (ntries == 5000) 3116264912Skevlo return (ETIMEDOUT); 3117264912Skevlo 3118264912Skevlo /* Enable LDO normal mode. */ 3119291698Savos error = urtwn_write_1(sc, R92C_LPLDO_CTRL, 3120281918Skevlo urtwn_read_1(sc, R92C_LPLDO_CTRL) & ~0x10); 3121291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3122291698Savos return (EIO); 3123264912Skevlo 3124264912Skevlo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 3125291698Savos error = urtwn_write_2(sc, R92C_CR, 0); 3126291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3127291698Savos return (EIO); 3128264912Skevlo reg = urtwn_read_2(sc, R92C_CR); 3129264912Skevlo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 3130264912Skevlo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 3131264912Skevlo R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC | R92C_CR_CALTMR_EN; 3132291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 3133291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3134291698Savos return (EIO); 3135264912Skevlo 3136264912Skevlo return (0); 3137264912Skevlo} 3138264912Skevlo 3139264912Skevlostatic int 3140251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 3141251538Srpaulo{ 3142264912Skevlo int i, error, page_count, pktbuf_count; 3143251538Srpaulo 3144264912Skevlo page_count = (sc->chip & URTWN_CHIP_88E) ? 3145264912Skevlo R88E_TX_PAGE_COUNT : R92C_TX_PAGE_COUNT; 3146264912Skevlo pktbuf_count = (sc->chip & URTWN_CHIP_88E) ? 3147264912Skevlo R88E_TXPKTBUF_COUNT : R92C_TXPKTBUF_COUNT; 3148264912Skevlo 3149264912Skevlo /* Reserve pages [0; page_count]. */ 3150264912Skevlo for (i = 0; i < page_count; i++) { 3151251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3152251538Srpaulo return (error); 3153251538Srpaulo } 3154251538Srpaulo /* NB: 0xff indicates end-of-list. */ 3155251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 3156251538Srpaulo return (error); 3157251538Srpaulo /* 3158264912Skevlo * Use pages [page_count + 1; pktbuf_count - 1] 3159251538Srpaulo * as ring buffer. 3160251538Srpaulo */ 3161264912Skevlo for (++i; i < pktbuf_count - 1; i++) { 3162251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 3163251538Srpaulo return (error); 3164251538Srpaulo } 3165251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 3166264912Skevlo error = urtwn_llt_write(sc, i, page_count + 1); 3167251538Srpaulo return (error); 3168251538Srpaulo} 3169251538Srpaulo 3170251538Srpaulostatic void 3171251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 3172251538Srpaulo{ 3173251538Srpaulo uint16_t reg; 3174251538Srpaulo int ntries; 3175251538Srpaulo 3176251538Srpaulo /* Tell 8051 to reset itself. */ 3177251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 3178251538Srpaulo 3179251538Srpaulo /* Wait until 8051 resets by itself. */ 3180251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 3181251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3182251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 3183251538Srpaulo return; 3184266472Shselasky urtwn_ms_delay(sc); 3185251538Srpaulo } 3186251538Srpaulo /* Force 8051 reset. */ 3187251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3188251538Srpaulo} 3189251538Srpaulo 3190264912Skevlostatic void 3191264912Skevlourtwn_r88e_fw_reset(struct urtwn_softc *sc) 3192264912Skevlo{ 3193264912Skevlo uint16_t reg; 3194264912Skevlo 3195264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 3196264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 3197264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN); 3198264912Skevlo} 3199264912Skevlo 3200251538Srpaulostatic int 3201251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 3202251538Srpaulo{ 3203251538Srpaulo uint32_t reg; 3204291698Savos usb_error_t error = USB_ERR_NORMAL_COMPLETION; 3205291698Savos int off, mlen; 3206251538Srpaulo 3207251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3208251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 3209251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3210251538Srpaulo 3211251538Srpaulo off = R92C_FW_START_ADDR; 3212251538Srpaulo while (len > 0) { 3213251538Srpaulo if (len > 196) 3214251538Srpaulo mlen = 196; 3215251538Srpaulo else if (len > 4) 3216251538Srpaulo mlen = 4; 3217251538Srpaulo else 3218251538Srpaulo mlen = 1; 3219251538Srpaulo /* XXX fix this deconst */ 3220281069Srpaulo error = urtwn_write_region_1(sc, off, 3221251538Srpaulo __DECONST(uint8_t *, buf), mlen); 3222291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3223251538Srpaulo break; 3224251538Srpaulo off += mlen; 3225251538Srpaulo buf += mlen; 3226251538Srpaulo len -= mlen; 3227251538Srpaulo } 3228251538Srpaulo return (error); 3229251538Srpaulo} 3230251538Srpaulo 3231251538Srpaulostatic int 3232251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 3233251538Srpaulo{ 3234251538Srpaulo const struct firmware *fw; 3235251538Srpaulo const struct r92c_fw_hdr *hdr; 3236251538Srpaulo const char *imagename; 3237251538Srpaulo const u_char *ptr; 3238251538Srpaulo size_t len; 3239251538Srpaulo uint32_t reg; 3240251538Srpaulo int mlen, ntries, page, error; 3241251538Srpaulo 3242264864Skevlo URTWN_UNLOCK(sc); 3243251538Srpaulo /* Read firmware image from the filesystem. */ 3244264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3245264912Skevlo imagename = "urtwn-rtl8188eufw"; 3246264912Skevlo else if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3247264912Skevlo URTWN_CHIP_UMC_A_CUT) 3248251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 3249251538Srpaulo else 3250251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 3251251538Srpaulo 3252251538Srpaulo fw = firmware_get(imagename); 3253264864Skevlo URTWN_LOCK(sc); 3254251538Srpaulo if (fw == NULL) { 3255251538Srpaulo device_printf(sc->sc_dev, 3256251538Srpaulo "failed loadfirmware of file %s\n", imagename); 3257251538Srpaulo return (ENOENT); 3258251538Srpaulo } 3259251538Srpaulo 3260251538Srpaulo len = fw->datasize; 3261251538Srpaulo 3262251538Srpaulo if (len < sizeof(*hdr)) { 3263251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 3264251538Srpaulo error = EINVAL; 3265251538Srpaulo goto fail; 3266251538Srpaulo } 3267251538Srpaulo ptr = fw->data; 3268251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 3269251538Srpaulo /* Check if there is a valid FW header and skip it. */ 3270251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 3271264912Skevlo (le16toh(hdr->signature) >> 4) == 0x88e || 3272251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 3273251538Srpaulo DPRINTF("FW V%d.%d %02d-%02d %02d:%02d\n", 3274251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 3275251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 3276251538Srpaulo ptr += sizeof(*hdr); 3277251538Srpaulo len -= sizeof(*hdr); 3278251538Srpaulo } 3279251538Srpaulo 3280264912Skevlo if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) { 3281264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3282264912Skevlo urtwn_r88e_fw_reset(sc); 3283264912Skevlo else 3284264912Skevlo urtwn_fw_reset(sc); 3285251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 3286251538Srpaulo } 3287264912Skevlo 3288268487Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3289268487Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3290268487Skevlo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3291268487Skevlo R92C_SYS_FUNC_EN_CPUEN); 3292268487Skevlo } 3293251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3294251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 3295251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 3296251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 3297251538Srpaulo 3298263154Skevlo /* Reset the FWDL checksum. */ 3299263154Skevlo urtwn_write_1(sc, R92C_MCUFWDL, 3300263154Skevlo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 3301263154Skevlo 3302251538Srpaulo for (page = 0; len > 0; page++) { 3303251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 3304251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 3305251538Srpaulo if (error != 0) { 3306251538Srpaulo device_printf(sc->sc_dev, 3307251538Srpaulo "could not load firmware page\n"); 3308251538Srpaulo goto fail; 3309251538Srpaulo } 3310251538Srpaulo ptr += mlen; 3311251538Srpaulo len -= mlen; 3312251538Srpaulo } 3313251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 3314251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 3315251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 3316251538Srpaulo 3317251538Srpaulo /* Wait for checksum report. */ 3318251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3319251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 3320251538Srpaulo break; 3321266472Shselasky urtwn_ms_delay(sc); 3322251538Srpaulo } 3323251538Srpaulo if (ntries == 1000) { 3324251538Srpaulo device_printf(sc->sc_dev, 3325251538Srpaulo "timeout waiting for checksum report\n"); 3326251538Srpaulo error = ETIMEDOUT; 3327251538Srpaulo goto fail; 3328251538Srpaulo } 3329251538Srpaulo 3330251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 3331251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 3332251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 3333264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3334264912Skevlo urtwn_r88e_fw_reset(sc); 3335251538Srpaulo /* Wait for firmware readiness. */ 3336251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3337251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 3338251538Srpaulo break; 3339266472Shselasky urtwn_ms_delay(sc); 3340251538Srpaulo } 3341251538Srpaulo if (ntries == 1000) { 3342251538Srpaulo device_printf(sc->sc_dev, 3343251538Srpaulo "timeout waiting for firmware readiness\n"); 3344251538Srpaulo error = ETIMEDOUT; 3345251538Srpaulo goto fail; 3346251538Srpaulo } 3347251538Srpaulofail: 3348251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 3349251538Srpaulo return (error); 3350251538Srpaulo} 3351251538Srpaulo 3352291902Skevlostatic int 3353251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 3354251538Srpaulo{ 3355291902Skevlo struct usb_endpoint *ep, *ep_end; 3356291698Savos usb_error_t usb_err; 3357291902Skevlo uint32_t reg; 3358291902Skevlo int hashq, hasnq, haslq, nqueues, ntx; 3359291902Skevlo int error, pagecount, npubqpages, nqpages, nrempages, tx_boundary; 3360281069Srpaulo 3361291695Savos /* Initialize LLT table. */ 3362291695Savos error = urtwn_llt_init(sc); 3363291695Savos if (error != 0) 3364291695Savos return (error); 3365291695Savos 3366291902Skevlo /* Determine the number of bulk-out pipes. */ 3367291902Skevlo ntx = 0; 3368291902Skevlo ep = sc->sc_udev->endpoints; 3369291902Skevlo ep_end = sc->sc_udev->endpoints + sc->sc_udev->endpoints_max; 3370291902Skevlo for (; ep != ep_end; ep++) { 3371291902Skevlo if ((ep->edesc == NULL) || 3372291902Skevlo (ep->iface_index != sc->sc_iface_index)) 3373291902Skevlo continue; 3374291902Skevlo if (UE_GET_DIR(ep->edesc->bEndpointAddress) == UE_DIR_OUT) 3375291902Skevlo ntx++; 3376291902Skevlo } 3377291902Skevlo if (ntx == 0) { 3378291902Skevlo device_printf(sc->sc_dev, 3379291902Skevlo "%d: invalid number of Tx bulk pipes\n", ntx); 3380291698Savos return (EIO); 3381291902Skevlo } 3382291695Savos 3383251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 3384291902Skevlo hashq = hasnq = haslq = nqueues = 0; 3385291902Skevlo switch (ntx) { 3386291902Skevlo case 1: hashq = 1; break; 3387291902Skevlo case 2: hashq = hasnq = 1; break; 3388291902Skevlo case 3: case 4: hashq = hasnq = haslq = 1; break; 3389291902Skevlo } 3390251538Srpaulo nqueues = hashq + hasnq + haslq; 3391251538Srpaulo if (nqueues == 0) 3392251538Srpaulo return (EIO); 3393251538Srpaulo 3394291902Skevlo npubqpages = nqpages = nrempages = pagecount = 0; 3395291902Skevlo if (sc->chip & URTWN_CHIP_88E) 3396291902Skevlo tx_boundary = R88E_TX_PAGE_BOUNDARY; 3397291902Skevlo else { 3398291902Skevlo pagecount = R92C_TX_PAGE_COUNT; 3399291902Skevlo npubqpages = R92C_PUBQ_NPAGES; 3400291902Skevlo tx_boundary = R92C_TX_PAGE_BOUNDARY; 3401291902Skevlo } 3402291902Skevlo 3403251538Srpaulo /* Set number of pages for normal priority queue. */ 3404291902Skevlo if (sc->chip & URTWN_CHIP_88E) { 3405291902Skevlo usb_err = urtwn_write_2(sc, R92C_RQPN_NPQ, 0xd); 3406291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3407291902Skevlo return (EIO); 3408291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 0x808e000d); 3409291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3410291902Skevlo return (EIO); 3411291902Skevlo } else { 3412291902Skevlo /* Get the number of pages for each queue. */ 3413291902Skevlo nqpages = (pagecount - npubqpages) / nqueues; 3414291902Skevlo /* 3415291902Skevlo * The remaining pages are assigned to the high priority 3416291902Skevlo * queue. 3417291902Skevlo */ 3418291902Skevlo nrempages = (pagecount - npubqpages) % nqueues; 3419291902Skevlo usb_err = urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 3420291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3421291902Skevlo return (EIO); 3422291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 3423291902Skevlo /* Set number of pages for public queue. */ 3424291902Skevlo SM(R92C_RQPN_PUBQ, npubqpages) | 3425291902Skevlo /* Set number of pages for high priority queue. */ 3426291902Skevlo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 3427291902Skevlo /* Set number of pages for low priority queue. */ 3428291902Skevlo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 3429291902Skevlo /* Load values. */ 3430291902Skevlo R92C_RQPN_LD); 3431291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3432291902Skevlo return (EIO); 3433291902Skevlo } 3434251538Srpaulo 3435291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary); 3436291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3437291698Savos return (EIO); 3438291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary); 3439291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3440291698Savos return (EIO); 3441291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary); 3442291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3443291698Savos return (EIO); 3444291902Skevlo usb_err = urtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary); 3445291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3446291698Savos return (EIO); 3447291902Skevlo usb_err = urtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary); 3448291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3449291698Savos return (EIO); 3450251538Srpaulo 3451251538Srpaulo /* Set queue to USB pipe mapping. */ 3452251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 3453251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 3454251538Srpaulo if (nqueues == 1) { 3455251538Srpaulo if (hashq) 3456251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 3457251538Srpaulo else if (hasnq) 3458251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 3459251538Srpaulo else 3460251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 3461251538Srpaulo } else if (nqueues == 2) { 3462292056Skevlo /* 3463292056Skevlo * All 2-endpoints configs have high and normal 3464292056Skevlo * priority queues. 3465292056Skevlo */ 3466292056Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 3467251538Srpaulo } else 3468251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 3469291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 3470291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3471291698Savos return (EIO); 3472251538Srpaulo 3473251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 3474291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 3475291902Skevlo (sc->chip & URTWN_CHIP_88E) ? 0x23ff : 0x27ff); 3476291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3477291698Savos return (EIO); 3478251538Srpaulo 3479291902Skevlo /* Set Tx/Rx transfer page size. */ 3480291902Skevlo usb_err = urtwn_write_1(sc, R92C_PBP, 3481291902Skevlo SM(R92C_PBP_PSRX, R92C_PBP_128) | 3482291902Skevlo SM(R92C_PBP_PSTX, R92C_PBP_128)); 3483291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3484264912Skevlo return (EIO); 3485264912Skevlo 3486264912Skevlo return (0); 3487264912Skevlo} 3488264912Skevlo 3489291698Savosstatic int 3490251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 3491251538Srpaulo{ 3492291698Savos usb_error_t error; 3493251538Srpaulo int i; 3494251538Srpaulo 3495251538Srpaulo /* Write MAC initialization values. */ 3496264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 3497264912Skevlo for (i = 0; i < nitems(rtl8188eu_mac); i++) { 3498291698Savos error = urtwn_write_1(sc, rtl8188eu_mac[i].reg, 3499264912Skevlo rtl8188eu_mac[i].val); 3500291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3501291698Savos return (EIO); 3502264912Skevlo } 3503264912Skevlo urtwn_write_1(sc, R92C_MAX_AGGR_NUM, 0x07); 3504264912Skevlo } else { 3505264912Skevlo for (i = 0; i < nitems(rtl8192cu_mac); i++) 3506291698Savos error = urtwn_write_1(sc, rtl8192cu_mac[i].reg, 3507264912Skevlo rtl8192cu_mac[i].val); 3508291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3509291698Savos return (EIO); 3510264912Skevlo } 3511291698Savos 3512291698Savos return (0); 3513251538Srpaulo} 3514251538Srpaulo 3515251538Srpaulostatic void 3516251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 3517251538Srpaulo{ 3518251538Srpaulo const struct urtwn_bb_prog *prog; 3519251538Srpaulo uint32_t reg; 3520264912Skevlo uint8_t crystalcap; 3521251538Srpaulo int i; 3522251538Srpaulo 3523251538Srpaulo /* Enable BB and RF. */ 3524251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3525251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3526251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 3527251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 3528251538Srpaulo 3529264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 3530264912Skevlo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 3531251538Srpaulo 3532251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 3533251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 3534251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3535251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 3536251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 3537251538Srpaulo 3538264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3539264912Skevlo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 3540264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 3541264912Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 3542264912Skevlo } 3543251538Srpaulo 3544251538Srpaulo /* Select BB programming based on board type. */ 3545264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3546264912Skevlo prog = &rtl8188eu_bb_prog; 3547264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 3548251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3549251538Srpaulo prog = &rtl8188ce_bb_prog; 3550251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3551251538Srpaulo prog = &rtl8188ru_bb_prog; 3552251538Srpaulo else 3553251538Srpaulo prog = &rtl8188cu_bb_prog; 3554251538Srpaulo } else { 3555251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3556251538Srpaulo prog = &rtl8192ce_bb_prog; 3557251538Srpaulo else 3558251538Srpaulo prog = &rtl8192cu_bb_prog; 3559251538Srpaulo } 3560251538Srpaulo /* Write BB initialization values. */ 3561251538Srpaulo for (i = 0; i < prog->count; i++) { 3562251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 3563266472Shselasky urtwn_ms_delay(sc); 3564251538Srpaulo } 3565251538Srpaulo 3566251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 3567251538Srpaulo /* 8192C 1T only configuration. */ 3568251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 3569251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 3570251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 3571251538Srpaulo 3572251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 3573251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 3574251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 3575251538Srpaulo 3576251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 3577251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 3578251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 3579251538Srpaulo 3580251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 3581251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 3582251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 3583251538Srpaulo 3584251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 3585251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 3586251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 3587251538Srpaulo 3588251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 3589251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3590251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 3591251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 3592251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3593251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 3594251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 3595251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3596251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 3597251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 3598251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3599251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 3600251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 3601251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3602251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 3603251538Srpaulo } 3604251538Srpaulo 3605251538Srpaulo /* Write AGC values. */ 3606251538Srpaulo for (i = 0; i < prog->agccount; i++) { 3607251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 3608251538Srpaulo prog->agcvals[i]); 3609266472Shselasky urtwn_ms_delay(sc); 3610251538Srpaulo } 3611251538Srpaulo 3612264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 3613264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422); 3614266472Shselasky urtwn_ms_delay(sc); 3615264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420); 3616266472Shselasky urtwn_ms_delay(sc); 3617264912Skevlo 3618294198Savos crystalcap = sc->rom.r88e_rom.crystalcap; 3619264912Skevlo if (crystalcap == 0xff) 3620264912Skevlo crystalcap = 0x20; 3621264912Skevlo crystalcap &= 0x3f; 3622264912Skevlo reg = urtwn_bb_read(sc, R92C_AFE_XTAL_CTRL); 3623264912Skevlo urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL, 3624264912Skevlo RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 3625264912Skevlo crystalcap | crystalcap << 6)); 3626264912Skevlo } else { 3627264912Skevlo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 3628264912Skevlo R92C_HSSI_PARAM2_CCK_HIPWR) 3629264912Skevlo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 3630264912Skevlo } 3631251538Srpaulo} 3632251538Srpaulo 3633289066Skevlostatic void 3634251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 3635251538Srpaulo{ 3636251538Srpaulo const struct urtwn_rf_prog *prog; 3637251538Srpaulo uint32_t reg, type; 3638251538Srpaulo int i, j, idx, off; 3639251538Srpaulo 3640251538Srpaulo /* Select RF programming based on board type. */ 3641264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3642264912Skevlo prog = rtl8188eu_rf_prog; 3643264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 3644251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3645251538Srpaulo prog = rtl8188ce_rf_prog; 3646251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3647251538Srpaulo prog = rtl8188ru_rf_prog; 3648251538Srpaulo else 3649251538Srpaulo prog = rtl8188cu_rf_prog; 3650251538Srpaulo } else 3651251538Srpaulo prog = rtl8192ce_rf_prog; 3652251538Srpaulo 3653251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3654251538Srpaulo /* Save RF_ENV control type. */ 3655251538Srpaulo idx = i / 2; 3656251538Srpaulo off = (i % 2) * 16; 3657251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 3658251538Srpaulo type = (reg >> off) & 0x10; 3659251538Srpaulo 3660251538Srpaulo /* Set RF_ENV enable. */ 3661251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 3662251538Srpaulo reg |= 0x100000; 3663251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 3664266472Shselasky urtwn_ms_delay(sc); 3665251538Srpaulo /* Set RF_ENV output high. */ 3666251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 3667251538Srpaulo reg |= 0x10; 3668251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 3669266472Shselasky urtwn_ms_delay(sc); 3670251538Srpaulo /* Set address and data lengths of RF registers. */ 3671251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 3672251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 3673251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 3674266472Shselasky urtwn_ms_delay(sc); 3675251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 3676251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 3677251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 3678266472Shselasky urtwn_ms_delay(sc); 3679251538Srpaulo 3680251538Srpaulo /* Write RF initialization values for this chain. */ 3681251538Srpaulo for (j = 0; j < prog[i].count; j++) { 3682251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 3683251538Srpaulo prog[i].regs[j] <= 0xfe) { 3684251538Srpaulo /* 3685251538Srpaulo * These are fake RF registers offsets that 3686251538Srpaulo * indicate a delay is required. 3687251538Srpaulo */ 3688266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 20); /* 50ms */ 3689251538Srpaulo continue; 3690251538Srpaulo } 3691251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 3692251538Srpaulo prog[i].vals[j]); 3693266472Shselasky urtwn_ms_delay(sc); 3694251538Srpaulo } 3695251538Srpaulo 3696251538Srpaulo /* Restore RF_ENV control type. */ 3697251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 3698251538Srpaulo reg &= ~(0x10 << off) | (type << off); 3699251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 3700251538Srpaulo 3701251538Srpaulo /* Cache RF register CHNLBW. */ 3702251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 3703251538Srpaulo } 3704251538Srpaulo 3705251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3706251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 3707251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 3708251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 3709251538Srpaulo } 3710251538Srpaulo} 3711251538Srpaulo 3712251538Srpaulostatic void 3713251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 3714251538Srpaulo{ 3715251538Srpaulo /* Invalidate all CAM entries. */ 3716251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 3717251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 3718251538Srpaulo} 3719251538Srpaulo 3720292175Savosstatic int 3721292175Savosurtwn_cam_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 3722292175Savos{ 3723292175Savos usb_error_t error; 3724292175Savos 3725292175Savos error = urtwn_write_4(sc, R92C_CAMWRITE, data); 3726292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 3727292175Savos return (EIO); 3728292175Savos error = urtwn_write_4(sc, R92C_CAMCMD, 3729292175Savos R92C_CAMCMD_POLLING | R92C_CAMCMD_WRITE | 3730292175Savos SM(R92C_CAMCMD_ADDR, addr)); 3731292175Savos if (error != USB_ERR_NORMAL_COMPLETION) 3732292175Savos return (EIO); 3733292175Savos 3734292175Savos return (0); 3735292175Savos} 3736292175Savos 3737251538Srpaulostatic void 3738251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 3739251538Srpaulo{ 3740251538Srpaulo uint8_t reg; 3741251538Srpaulo int i; 3742251538Srpaulo 3743251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3744251538Srpaulo if (sc->pa_setting & (1 << i)) 3745251538Srpaulo continue; 3746251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 3747251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 3748251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 3749251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 3750251538Srpaulo } 3751251538Srpaulo if (!(sc->pa_setting & 0x10)) { 3752251538Srpaulo reg = urtwn_read_1(sc, 0x16); 3753251538Srpaulo reg = (reg & ~0xf0) | 0x90; 3754251538Srpaulo urtwn_write_1(sc, 0x16, reg); 3755251538Srpaulo } 3756251538Srpaulo} 3757251538Srpaulo 3758251538Srpaulostatic void 3759251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 3760251538Srpaulo{ 3761290564Savos struct ieee80211com *ic = &sc->sc_ic; 3762290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3763290564Savos uint32_t rcr; 3764290564Savos uint16_t filter; 3765290564Savos 3766290564Savos URTWN_ASSERT_LOCKED(sc); 3767290564Savos 3768251538Srpaulo /* Accept all multicast frames. */ 3769251538Srpaulo urtwn_write_4(sc, R92C_MAR + 0, 0xffffffff); 3770251538Srpaulo urtwn_write_4(sc, R92C_MAR + 4, 0xffffffff); 3771290564Savos 3772290564Savos /* Filter for management frames. */ 3773290564Savos filter = 0x7f3f; 3774290631Savos switch (vap->iv_opmode) { 3775290631Savos case IEEE80211_M_STA: 3776290564Savos filter &= ~( 3777290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | 3778290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | 3779290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); 3780290631Savos break; 3781290631Savos case IEEE80211_M_HOSTAP: 3782290631Savos filter &= ~( 3783290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | 3784290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP) | 3785290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_BEACON)); 3786290631Savos break; 3787290631Savos case IEEE80211_M_MONITOR: 3788290651Savos case IEEE80211_M_IBSS: 3789290631Savos break; 3790290631Savos default: 3791290631Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 3792290631Savos __func__, vap->iv_opmode); 3793290631Savos break; 3794290564Savos } 3795290564Savos urtwn_write_2(sc, R92C_RXFLTMAP0, filter); 3796290564Savos 3797251538Srpaulo /* Reject all control frames. */ 3798251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 3799290564Savos 3800290564Savos /* Reject all data frames. */ 3801290564Savos urtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); 3802290564Savos 3803290564Savos rcr = R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | 3804290564Savos R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | 3805290564Savos R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; 3806290564Savos 3807290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) { 3808290564Savos /* Accept all frames. */ 3809290564Savos rcr |= R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | 3810290564Savos R92C_RCR_AAP; 3811290564Savos } 3812290564Savos 3813290564Savos /* Set Rx filter. */ 3814290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 3815290564Savos 3816290564Savos if (ic->ic_promisc != 0) { 3817290564Savos /* Update Rx filter. */ 3818290564Savos urtwn_set_promisc(sc); 3819290564Savos } 3820251538Srpaulo} 3821251538Srpaulo 3822251538Srpaulostatic void 3823251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 3824251538Srpaulo{ 3825251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 3826251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 3827251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 3828251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 3829251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 3830251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 3831251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 3832251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 3833251538Srpaulo} 3834251538Srpaulo 3835289066Skevlostatic void 3836251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 3837251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 3838251538Srpaulo{ 3839251538Srpaulo uint32_t reg; 3840251538Srpaulo 3841251538Srpaulo /* Write per-CCK rate Tx power. */ 3842251538Srpaulo if (chain == 0) { 3843251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 3844251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 3845251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 3846251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 3847251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 3848251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 3849251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 3850251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 3851251538Srpaulo } else { 3852251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 3853251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 3854251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 3855251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 3856251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 3857251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 3858251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 3859251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 3860251538Srpaulo } 3861251538Srpaulo /* Write per-OFDM rate Tx power. */ 3862251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 3863251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 3864251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 3865251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 3866251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 3867251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 3868251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 3869251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 3870251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 3871251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 3872251538Srpaulo /* Write per-MCS Tx power. */ 3873251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 3874251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 3875251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 3876251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 3877251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 3878251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 3879251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 3880251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 3881251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 3882251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 3883251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 3884251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 3885261506Skevlo SM(R92C_TXAGC_MCS09, power[21]) | 3886251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 3887251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 3888251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 3889251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 3890251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 3891251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 3892251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 3893251538Srpaulo} 3894251538Srpaulo 3895289066Skevlostatic void 3896251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 3897251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 3898251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 3899251538Srpaulo{ 3900287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3901291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 3902251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 3903251538Srpaulo const struct urtwn_txpwr *base; 3904251538Srpaulo int ridx, chan, group; 3905251538Srpaulo 3906251538Srpaulo /* Determine channel group. */ 3907251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3908251538Srpaulo if (chan <= 3) 3909251538Srpaulo group = 0; 3910251538Srpaulo else if (chan <= 9) 3911251538Srpaulo group = 1; 3912251538Srpaulo else 3913251538Srpaulo group = 2; 3914251538Srpaulo 3915251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 3916251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 3917251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3918251538Srpaulo base = &rtl8188ru_txagc[chain]; 3919251538Srpaulo else 3920251538Srpaulo base = &rtl8192cu_txagc[chain]; 3921251538Srpaulo } else 3922251538Srpaulo base = &rtl8192cu_txagc[chain]; 3923251538Srpaulo 3924251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 3925251538Srpaulo if (sc->regulatory == 0) { 3926289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 3927251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3928251538Srpaulo } 3929289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 3930251538Srpaulo if (sc->regulatory == 3) { 3931251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3932251538Srpaulo /* Apply vendor limits. */ 3933251538Srpaulo if (extc != NULL) 3934251538Srpaulo max = rom->ht40_max_pwr[group]; 3935251538Srpaulo else 3936251538Srpaulo max = rom->ht20_max_pwr[group]; 3937251538Srpaulo max = (max >> (chain * 4)) & 0xf; 3938251538Srpaulo if (power[ridx] > max) 3939251538Srpaulo power[ridx] = max; 3940251538Srpaulo } else if (sc->regulatory == 1) { 3941251538Srpaulo if (extc == NULL) 3942251538Srpaulo power[ridx] = base->pwr[group][ridx]; 3943251538Srpaulo } else if (sc->regulatory != 2) 3944251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3945251538Srpaulo } 3946251538Srpaulo 3947251538Srpaulo /* Compute per-CCK rate Tx power. */ 3948251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 3949289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 3950251538Srpaulo power[ridx] += cckpow; 3951251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3952251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3953251538Srpaulo } 3954251538Srpaulo 3955251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 3956251538Srpaulo if (sc->ntxchains > 1) { 3957251538Srpaulo /* Apply reduction for 2 spatial streams. */ 3958251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 3959251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3960251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 3961251538Srpaulo } 3962251538Srpaulo 3963251538Srpaulo /* Compute per-OFDM rate Tx power. */ 3964251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 3965251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3966251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 3967289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 3968251538Srpaulo power[ridx] += ofdmpow; 3969251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3970251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3971251538Srpaulo } 3972251538Srpaulo 3973251538Srpaulo /* Compute per-MCS Tx power. */ 3974251538Srpaulo if (extc == NULL) { 3975251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 3976251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3977251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 3978251538Srpaulo } 3979251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 3980251538Srpaulo power[ridx] += htpow; 3981251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3982251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3983251538Srpaulo } 3984251538Srpaulo#ifdef URTWN_DEBUG 3985251538Srpaulo if (urtwn_debug >= 4) { 3986251538Srpaulo /* Dump per-rate Tx power values. */ 3987251538Srpaulo printf("Tx power for chain %d:\n", chain); 3988289758Savos for (ridx = URTWN_RIDX_CCK1; ridx < URTWN_RIDX_COUNT; ridx++) 3989251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 3990251538Srpaulo } 3991251538Srpaulo#endif 3992251538Srpaulo} 3993251538Srpaulo 3994289066Skevlostatic void 3995264912Skevlourtwn_r88e_get_txpower(struct urtwn_softc *sc, int chain, 3996264912Skevlo struct ieee80211_channel *c, struct ieee80211_channel *extc, 3997264912Skevlo uint16_t power[URTWN_RIDX_COUNT]) 3998264912Skevlo{ 3999287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4000294198Savos struct r88e_rom *rom = &sc->rom.r88e_rom; 4001264912Skevlo uint16_t cckpow, ofdmpow, bw20pow, htpow; 4002264912Skevlo const struct urtwn_r88e_txpwr *base; 4003264912Skevlo int ridx, chan, group; 4004264912Skevlo 4005264912Skevlo /* Determine channel group. */ 4006264912Skevlo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4007264912Skevlo if (chan <= 2) 4008264912Skevlo group = 0; 4009264912Skevlo else if (chan <= 5) 4010264912Skevlo group = 1; 4011264912Skevlo else if (chan <= 8) 4012264912Skevlo group = 2; 4013264912Skevlo else if (chan <= 11) 4014264912Skevlo group = 3; 4015264912Skevlo else if (chan <= 13) 4016264912Skevlo group = 4; 4017264912Skevlo else 4018264912Skevlo group = 5; 4019264912Skevlo 4020264912Skevlo /* Get original Tx power based on board type and RF chain. */ 4021264912Skevlo base = &rtl8188eu_txagc[chain]; 4022264912Skevlo 4023264912Skevlo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 4024264912Skevlo if (sc->regulatory == 0) { 4025289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 4026264912Skevlo power[ridx] = base->pwr[0][ridx]; 4027264912Skevlo } 4028289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 4029264912Skevlo if (sc->regulatory == 3) 4030264912Skevlo power[ridx] = base->pwr[0][ridx]; 4031264912Skevlo else if (sc->regulatory == 1) { 4032264912Skevlo if (extc == NULL) 4033264912Skevlo power[ridx] = base->pwr[group][ridx]; 4034264912Skevlo } else if (sc->regulatory != 2) 4035264912Skevlo power[ridx] = base->pwr[0][ridx]; 4036264912Skevlo } 4037264912Skevlo 4038264912Skevlo /* Compute per-CCK rate Tx power. */ 4039294198Savos cckpow = rom->cck_tx_pwr[group]; 4040289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 4041264912Skevlo power[ridx] += cckpow; 4042264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4043264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4044264912Skevlo } 4045264912Skevlo 4046294198Savos htpow = rom->ht40_tx_pwr[group]; 4047264912Skevlo 4048264912Skevlo /* Compute per-OFDM rate Tx power. */ 4049264912Skevlo ofdmpow = htpow + sc->ofdm_tx_pwr_diff; 4050289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 4051264912Skevlo power[ridx] += ofdmpow; 4052264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4053264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4054264912Skevlo } 4055264912Skevlo 4056264912Skevlo bw20pow = htpow + sc->bw20_tx_pwr_diff; 4057264912Skevlo for (ridx = 12; ridx <= 27; ridx++) { 4058264912Skevlo power[ridx] += bw20pow; 4059264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 4060264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 4061264912Skevlo } 4062264912Skevlo} 4063264912Skevlo 4064289066Skevlostatic void 4065251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 4066251538Srpaulo struct ieee80211_channel *extc) 4067251538Srpaulo{ 4068251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 4069251538Srpaulo int i; 4070251538Srpaulo 4071251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 4072251538Srpaulo /* Compute per-rate Tx power values. */ 4073264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4074264912Skevlo urtwn_r88e_get_txpower(sc, i, c, extc, power); 4075264912Skevlo else 4076264912Skevlo urtwn_get_txpower(sc, i, c, extc, power); 4077251538Srpaulo /* Write per-rate Tx power values to hardware. */ 4078251538Srpaulo urtwn_write_txpower(sc, i, power); 4079251538Srpaulo } 4080251538Srpaulo} 4081251538Srpaulo 4082251538Srpaulostatic void 4083290048Savosurtwn_set_rx_bssid_all(struct urtwn_softc *sc, int enable) 4084290048Savos{ 4085290048Savos uint32_t reg; 4086290048Savos 4087290048Savos reg = urtwn_read_4(sc, R92C_RCR); 4088290048Savos if (enable) 4089290048Savos reg &= ~R92C_RCR_CBSSID_BCN; 4090290048Savos else 4091290048Savos reg |= R92C_RCR_CBSSID_BCN; 4092290048Savos urtwn_write_4(sc, R92C_RCR, reg); 4093290048Savos} 4094290048Savos 4095290048Savosstatic void 4096290048Savosurtwn_set_gain(struct urtwn_softc *sc, uint8_t gain) 4097290048Savos{ 4098290048Savos uint32_t reg; 4099290048Savos 4100290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 4101290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4102290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 4103290048Savos 4104290048Savos if (!(sc->chip & URTWN_CHIP_88E)) { 4105290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 4106290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 4107290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 4108290048Savos } 4109290048Savos} 4110290048Savos 4111290048Savosstatic void 4112251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 4113251538Srpaulo{ 4114290048Savos struct urtwn_softc *sc = ic->ic_softc; 4115290048Savos 4116290048Savos URTWN_LOCK(sc); 4117290048Savos /* Receive beacons / probe responses from any BSSID. */ 4118290651Savos if (ic->ic_opmode != IEEE80211_M_IBSS) 4119290651Savos urtwn_set_rx_bssid_all(sc, 1); 4120290651Savos 4121290048Savos /* Set gain for scanning. */ 4122290048Savos urtwn_set_gain(sc, 0x20); 4123290048Savos URTWN_UNLOCK(sc); 4124251538Srpaulo} 4125251538Srpaulo 4126251538Srpaulostatic void 4127251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 4128251538Srpaulo{ 4129290048Savos struct urtwn_softc *sc = ic->ic_softc; 4130290048Savos 4131290048Savos URTWN_LOCK(sc); 4132290048Savos /* Restore limitations. */ 4133290651Savos if (ic->ic_promisc == 0 && ic->ic_opmode != IEEE80211_M_IBSS) 4134290564Savos urtwn_set_rx_bssid_all(sc, 0); 4135290651Savos 4136290048Savos /* Set gain under link. */ 4137290048Savos urtwn_set_gain(sc, 0x32); 4138290048Savos URTWN_UNLOCK(sc); 4139251538Srpaulo} 4140251538Srpaulo 4141251538Srpaulostatic void 4142251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 4143251538Srpaulo{ 4144286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4145292173Savos struct ieee80211_channel *c = ic->ic_curchan; 4146281070Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4147251538Srpaulo 4148251538Srpaulo URTWN_LOCK(sc); 4149281070Srpaulo if (vap->iv_state == IEEE80211_S_SCAN) { 4150281070Srpaulo /* Make link LED blink during scan. */ 4151281070Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 4152281070Srpaulo } 4153292173Savos urtwn_set_chan(sc, c, NULL); 4154292173Savos sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq); 4155292173Savos sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags); 4156292173Savos sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq); 4157292173Savos sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags); 4158251538Srpaulo URTWN_UNLOCK(sc); 4159251538Srpaulo} 4160251538Srpaulo 4161292014Savosstatic int 4162292014Savosurtwn_wme_update(struct ieee80211com *ic) 4163292014Savos{ 4164292014Savos const struct wmeParams *wmep = 4165292014Savos ic->ic_wme.wme_chanParams.cap_wmeParams; 4166292014Savos struct urtwn_softc *sc = ic->ic_softc; 4167292014Savos uint8_t aifs, acm, slottime; 4168292014Savos int ac; 4169292014Savos 4170292014Savos acm = 0; 4171292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 4172292014Savos 4173292014Savos URTWN_LOCK(sc); 4174292014Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 4175292014Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 4176292014Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 4177292014Savos urtwn_write_4(sc, wme2queue[ac].reg, 4178292014Savos SM(R92C_EDCA_PARAM_TXOP, wmep[ac].wmep_txopLimit) | 4179292014Savos SM(R92C_EDCA_PARAM_ECWMIN, wmep[ac].wmep_logcwmin) | 4180292014Savos SM(R92C_EDCA_PARAM_ECWMAX, wmep[ac].wmep_logcwmax) | 4181292014Savos SM(R92C_EDCA_PARAM_AIFS, aifs)); 4182292014Savos if (ac != WME_AC_BE) 4183292014Savos acm |= wmep[ac].wmep_acm << ac; 4184292014Savos } 4185292014Savos 4186292014Savos if (acm != 0) 4187292014Savos acm |= R92C_ACMHWCTRL_EN; 4188292014Savos urtwn_write_1(sc, R92C_ACMHWCTRL, 4189292014Savos (urtwn_read_1(sc, R92C_ACMHWCTRL) & ~R92C_ACMHWCTRL_ACM_MASK) | 4190292014Savos acm); 4191292014Savos 4192292014Savos URTWN_UNLOCK(sc); 4193292014Savos 4194292014Savos return 0; 4195292014Savos} 4196292014Savos 4197251538Srpaulostatic void 4198290564Savosurtwn_set_promisc(struct urtwn_softc *sc) 4199290564Savos{ 4200290564Savos struct ieee80211com *ic = &sc->sc_ic; 4201290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4202290564Savos uint32_t rcr, mask1, mask2; 4203290564Savos 4204290564Savos URTWN_ASSERT_LOCKED(sc); 4205290564Savos 4206290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) 4207290564Savos return; 4208290564Savos 4209290564Savos mask1 = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; 4210290564Savos mask2 = R92C_RCR_APM; 4211290564Savos 4212290564Savos if (vap->iv_state == IEEE80211_S_RUN) { 4213290564Savos switch (vap->iv_opmode) { 4214290564Savos case IEEE80211_M_STA: 4215290631Savos mask2 |= R92C_RCR_CBSSID_DATA; 4216290631Savos /* FALLTHROUGH */ 4217290631Savos case IEEE80211_M_HOSTAP: 4218290631Savos mask2 |= R92C_RCR_CBSSID_BCN; 4219290564Savos break; 4220290651Savos case IEEE80211_M_IBSS: 4221290651Savos mask2 |= R92C_RCR_CBSSID_DATA; 4222290651Savos break; 4223290564Savos default: 4224290564Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 4225290564Savos __func__, vap->iv_opmode); 4226290564Savos return; 4227290564Savos } 4228290564Savos } 4229290564Savos 4230290564Savos rcr = urtwn_read_4(sc, R92C_RCR); 4231290564Savos if (ic->ic_promisc == 0) 4232290564Savos rcr = (rcr & ~mask1) | mask2; 4233290564Savos else 4234290564Savos rcr = (rcr & ~mask2) | mask1; 4235290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 4236290564Savos} 4237290564Savos 4238290564Savosstatic void 4239290564Savosurtwn_update_promisc(struct ieee80211com *ic) 4240290564Savos{ 4241290564Savos struct urtwn_softc *sc = ic->ic_softc; 4242290564Savos 4243290564Savos URTWN_LOCK(sc); 4244290564Savos if (sc->sc_flags & URTWN_RUNNING) 4245290564Savos urtwn_set_promisc(sc); 4246290564Savos URTWN_UNLOCK(sc); 4247290564Savos} 4248290564Savos 4249290564Savosstatic void 4250283540Sglebiusurtwn_update_mcast(struct ieee80211com *ic) 4251251538Srpaulo{ 4252251538Srpaulo /* XXX do nothing? */ 4253251538Srpaulo} 4254251538Srpaulo 4255292167Savosstatic struct ieee80211_node * 4256292167Savosurtwn_r88e_node_alloc(struct ieee80211vap *vap, 4257292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]) 4258292167Savos{ 4259292167Savos struct urtwn_node *un; 4260292167Savos 4261292167Savos un = malloc(sizeof (struct urtwn_node), M_80211_NODE, 4262292167Savos M_NOWAIT | M_ZERO); 4263292167Savos 4264292167Savos if (un == NULL) 4265292167Savos return NULL; 4266292167Savos 4267292167Savos un->id = URTWN_MACID_UNDEFINED; 4268292167Savos 4269292167Savos return &un->ni; 4270292167Savos} 4271292167Savos 4272251538Srpaulostatic void 4273292167Savosurtwn_r88e_newassoc(struct ieee80211_node *ni, int isnew) 4274292167Savos{ 4275292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 4276292167Savos struct urtwn_node *un = URTWN_NODE(ni); 4277292167Savos uint8_t id; 4278292167Savos 4279292167Savos if (!isnew) 4280292167Savos return; 4281292167Savos 4282292167Savos URTWN_NT_LOCK(sc); 4283292167Savos for (id = 0; id <= URTWN_MACID_MAX(sc); id++) { 4284292167Savos if (id != URTWN_MACID_BC && sc->node_list[id] == NULL) { 4285292167Savos un->id = id; 4286292167Savos sc->node_list[id] = ni; 4287292167Savos break; 4288292167Savos } 4289292167Savos } 4290292167Savos URTWN_NT_UNLOCK(sc); 4291292167Savos 4292292167Savos if (id > URTWN_MACID_MAX(sc)) { 4293292167Savos device_printf(sc->sc_dev, "%s: node table is full\n", 4294292167Savos __func__); 4295292167Savos } 4296292167Savos} 4297292167Savos 4298292167Savosstatic void 4299292167Savosurtwn_r88e_node_free(struct ieee80211_node *ni) 4300292167Savos{ 4301292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 4302292167Savos struct urtwn_node *un = URTWN_NODE(ni); 4303292167Savos 4304292167Savos URTWN_NT_LOCK(sc); 4305292167Savos if (un->id != URTWN_MACID_UNDEFINED) 4306292167Savos sc->node_list[un->id] = NULL; 4307292167Savos URTWN_NT_UNLOCK(sc); 4308292167Savos 4309292167Savos sc->sc_node_free(ni); 4310292167Savos} 4311292167Savos 4312292167Savosstatic void 4313251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 4314251538Srpaulo struct ieee80211_channel *extc) 4315251538Srpaulo{ 4316287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4317251538Srpaulo uint32_t reg; 4318251538Srpaulo u_int chan; 4319251538Srpaulo int i; 4320251538Srpaulo 4321251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 4322251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 4323251538Srpaulo device_printf(sc->sc_dev, 4324251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 4325251538Srpaulo return; 4326251538Srpaulo } 4327251538Srpaulo 4328251538Srpaulo /* Set Tx power for this new channel. */ 4329251538Srpaulo urtwn_set_txpower(sc, c, extc); 4330251538Srpaulo 4331251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4332251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 4333251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 4334251538Srpaulo } 4335251538Srpaulo#ifndef IEEE80211_NO_HT 4336251538Srpaulo if (extc != NULL) { 4337251538Srpaulo /* Is secondary channel below or above primary? */ 4338251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 4339251538Srpaulo 4340251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 4341251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 4342251538Srpaulo 4343251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 4344251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 4345251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 4346251538Srpaulo 4347251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 4348251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 4349251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 4350251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 4351251538Srpaulo 4352251538Srpaulo /* Set CCK side band. */ 4353251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 4354251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 4355251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 4356251538Srpaulo 4357251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 4358251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 4359251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 4360251538Srpaulo 4361251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 4362251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 4363251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 4364251538Srpaulo 4365251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 4366251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 4367251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 4368251538Srpaulo 4369251538Srpaulo /* Select 40MHz bandwidth. */ 4370251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 4371251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 4372251538Srpaulo } else 4373251538Srpaulo#endif 4374251538Srpaulo { 4375251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 4376251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 4377251538Srpaulo 4378251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 4379251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 4380251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 4381251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 4382251538Srpaulo 4383264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4384264912Skevlo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 4385264912Skevlo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 4386264912Skevlo R92C_FPGA0_ANAPARAM2_CBW20); 4387264912Skevlo } 4388281069Srpaulo 4389251538Srpaulo /* Select 20MHz bandwidth. */ 4390251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 4391281069Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan | 4392264912Skevlo ((sc->chip & URTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 : 4393264912Skevlo R92C_RF_CHNLBW_BW20)); 4394251538Srpaulo } 4395251538Srpaulo} 4396251538Srpaulo 4397251538Srpaulostatic void 4398251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 4399251538Srpaulo{ 4400251538Srpaulo /* TODO */ 4401251538Srpaulo} 4402251538Srpaulo 4403251538Srpaulostatic void 4404251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 4405251538Srpaulo{ 4406251538Srpaulo uint32_t rf_ac[2]; 4407251538Srpaulo uint8_t txmode; 4408251538Srpaulo int i; 4409251538Srpaulo 4410251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 4411251538Srpaulo if ((txmode & 0x70) != 0) { 4412251538Srpaulo /* Disable all continuous Tx. */ 4413251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 4414251538Srpaulo 4415251538Srpaulo /* Set RF mode to standby mode. */ 4416251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4417251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 4418251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 4419251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 4420251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 4421251538Srpaulo } 4422251538Srpaulo } else { 4423251538Srpaulo /* Block all Tx queues. */ 4424293180Savos urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL); 4425251538Srpaulo } 4426251538Srpaulo /* Start calibration. */ 4427251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 4428251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 4429251538Srpaulo 4430251538Srpaulo /* Give calibration the time to complete. */ 4431266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 10); /* 100ms */ 4432251538Srpaulo 4433251538Srpaulo /* Restore configuration. */ 4434251538Srpaulo if ((txmode & 0x70) != 0) { 4435251538Srpaulo /* Restore Tx mode. */ 4436251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 4437251538Srpaulo /* Restore RF mode. */ 4438251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 4439251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 4440251538Srpaulo } else { 4441251538Srpaulo /* Unblock all Tx queues. */ 4442251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 4443251538Srpaulo } 4444251538Srpaulo} 4445251538Srpaulo 4446291698Savosstatic int 4447287197Sglebiusurtwn_init(struct urtwn_softc *sc) 4448251538Srpaulo{ 4449287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4450287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4451287197Sglebius uint8_t macaddr[IEEE80211_ADDR_LEN]; 4452251538Srpaulo uint32_t reg; 4453291698Savos usb_error_t usb_err = USB_ERR_NORMAL_COMPLETION; 4454251538Srpaulo int error; 4455251538Srpaulo 4456291698Savos URTWN_LOCK(sc); 4457291698Savos if (sc->sc_flags & URTWN_RUNNING) { 4458291698Savos URTWN_UNLOCK(sc); 4459291698Savos return (0); 4460291698Savos } 4461264864Skevlo 4462251538Srpaulo /* Init firmware commands ring. */ 4463251538Srpaulo sc->fwcur = 0; 4464251538Srpaulo 4465251538Srpaulo /* Allocate Tx/Rx buffers. */ 4466251538Srpaulo error = urtwn_alloc_rx_list(sc); 4467251538Srpaulo if (error != 0) 4468251538Srpaulo goto fail; 4469281069Srpaulo 4470251538Srpaulo error = urtwn_alloc_tx_list(sc); 4471251538Srpaulo if (error != 0) 4472251538Srpaulo goto fail; 4473251538Srpaulo 4474251538Srpaulo /* Power on adapter. */ 4475251538Srpaulo error = urtwn_power_on(sc); 4476251538Srpaulo if (error != 0) 4477251538Srpaulo goto fail; 4478251538Srpaulo 4479251538Srpaulo /* Initialize DMA. */ 4480251538Srpaulo error = urtwn_dma_init(sc); 4481251538Srpaulo if (error != 0) 4482251538Srpaulo goto fail; 4483251538Srpaulo 4484251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 4485251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 4486251538Srpaulo 4487251538Srpaulo /* Init interrupts. */ 4488264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4489291698Savos usb_err = urtwn_write_4(sc, R88E_HISR, 0xffffffff); 4490291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4491291698Savos goto fail; 4492291698Savos usb_err = urtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | 4493264912Skevlo R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); 4494291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4495291698Savos goto fail; 4496291698Savos usb_err = urtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | 4497264912Skevlo R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); 4498291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4499291698Savos goto fail; 4500291698Savos usb_err = urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 4501264912Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 4502264912Skevlo R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); 4503291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4504291698Savos goto fail; 4505264912Skevlo } else { 4506291698Savos usb_err = urtwn_write_4(sc, R92C_HISR, 0xffffffff); 4507291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4508291698Savos goto fail; 4509291698Savos usb_err = urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 4510291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4511291698Savos goto fail; 4512264912Skevlo } 4513251538Srpaulo 4514251538Srpaulo /* Set MAC address. */ 4515287197Sglebius IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 4516291698Savos usb_err = urtwn_write_region_1(sc, R92C_MACID, macaddr, IEEE80211_ADDR_LEN); 4517291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4518291698Savos goto fail; 4519251538Srpaulo 4520251538Srpaulo /* Set initial network type. */ 4521289811Savos urtwn_set_mode(sc, R92C_MSR_INFRA); 4522251538Srpaulo 4523290564Savos /* Initialize Rx filter. */ 4524251538Srpaulo urtwn_rxfilter_init(sc); 4525251538Srpaulo 4526282623Skevlo /* Set response rate. */ 4527251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 4528251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 4529251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 4530251538Srpaulo 4531251538Srpaulo /* Set short/long retry limits. */ 4532251538Srpaulo urtwn_write_2(sc, R92C_RL, 4533251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 4534251538Srpaulo 4535251538Srpaulo /* Initialize EDCA parameters. */ 4536251538Srpaulo urtwn_edca_init(sc); 4537251538Srpaulo 4538251538Srpaulo /* Setup rate fallback. */ 4539264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4540264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 4541264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 4542264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 4543264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 4544264912Skevlo } 4545251538Srpaulo 4546251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 4547251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 4548251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 4549251538Srpaulo /* Set ACK timeout. */ 4550251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 4551251538Srpaulo 4552251538Srpaulo /* Setup USB aggregation. */ 4553251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 4554251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 4555251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 4556251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 4557251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 4558251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 4559251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 4560264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4561264912Skevlo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); 4562282266Skevlo else { 4563264912Skevlo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 4564282266Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 4565282266Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 4566282266Skevlo R92C_USB_SPECIAL_OPTION_AGG_EN); 4567282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 4568282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 4569282266Skevlo } 4570251538Srpaulo 4571251538Srpaulo /* Initialize beacon parameters. */ 4572264912Skevlo urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010); 4573251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 4574251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 4575251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 4576251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 4577251538Srpaulo 4578264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4579264912Skevlo /* Setup AMPDU aggregation. */ 4580264912Skevlo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 4581264912Skevlo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 4582264912Skevlo urtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); 4583251538Srpaulo 4584264912Skevlo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 4585264912Skevlo } 4586251538Srpaulo 4587251538Srpaulo /* Load 8051 microcode. */ 4588251538Srpaulo error = urtwn_load_firmware(sc); 4589251538Srpaulo if (error != 0) 4590251538Srpaulo goto fail; 4591251538Srpaulo 4592251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 4593291698Savos error = urtwn_mac_init(sc); 4594291698Savos if (error != 0) { 4595291698Savos device_printf(sc->sc_dev, 4596291698Savos "%s: error while initializing MAC block\n", __func__); 4597291698Savos goto fail; 4598291698Savos } 4599251538Srpaulo urtwn_bb_init(sc); 4600251538Srpaulo urtwn_rf_init(sc); 4601251538Srpaulo 4602290564Savos /* Reinitialize Rx filter (D3845 is not committed yet). */ 4603290564Savos urtwn_rxfilter_init(sc); 4604290564Savos 4605264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4606264912Skevlo urtwn_write_2(sc, R92C_CR, 4607264912Skevlo urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN | 4608264912Skevlo R92C_CR_MACRXEN); 4609264912Skevlo } 4610264912Skevlo 4611251538Srpaulo /* Turn CCK and OFDM blocks on. */ 4612251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 4613251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 4614291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 4615291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4616291698Savos goto fail; 4617251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 4618251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 4619291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 4620291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4621291698Savos goto fail; 4622251538Srpaulo 4623251538Srpaulo /* Clear per-station keys table. */ 4624251538Srpaulo urtwn_cam_init(sc); 4625251538Srpaulo 4626292175Savos /* Enable decryption / encryption. */ 4627292175Savos urtwn_write_2(sc, R92C_SECCFG, 4628292175Savos R92C_SECCFG_TXUCKEY_DEF | R92C_SECCFG_RXUCKEY_DEF | 4629292175Savos R92C_SECCFG_TXENC_ENA | R92C_SECCFG_RXDEC_ENA | 4630292175Savos R92C_SECCFG_TXBCKEY_DEF | R92C_SECCFG_RXBCKEY_DEF); 4631292175Savos 4632292175Savos /* 4633292175Savos * Install static keys (if any). 4634292175Savos * Must be called after urtwn_cam_init(). 4635292175Savos */ 4636292175Savos ieee80211_runtask(ic, &sc->cmdq_task); 4637292175Savos 4638251538Srpaulo /* Enable hardware sequence numbering. */ 4639293180Savos urtwn_write_1(sc, R92C_HWSEQ_CTRL, R92C_TX_QUEUE_ALL); 4640251538Srpaulo 4641292167Savos /* Enable per-packet TX report. */ 4642292167Savos if (sc->chip & URTWN_CHIP_88E) { 4643292167Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 4644292167Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) | R88E_TX_RPT1_ENA); 4645292167Savos } 4646292167Savos 4647251538Srpaulo /* Perform LO and IQ calibrations. */ 4648251538Srpaulo urtwn_iq_calib(sc); 4649251538Srpaulo /* Perform LC calibration. */ 4650251538Srpaulo urtwn_lc_calib(sc); 4651251538Srpaulo 4652251538Srpaulo /* Fix USB interference issue. */ 4653264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4654264912Skevlo urtwn_write_1(sc, 0xfe40, 0xe0); 4655264912Skevlo urtwn_write_1(sc, 0xfe41, 0x8d); 4656264912Skevlo urtwn_write_1(sc, 0xfe42, 0x80); 4657251538Srpaulo 4658264912Skevlo urtwn_pa_bias_init(sc); 4659264912Skevlo } 4660251538Srpaulo 4661251538Srpaulo /* Initialize GPIO setting. */ 4662251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 4663251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 4664251538Srpaulo 4665251538Srpaulo /* Fix for lower temperature. */ 4666264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 4667264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 4668251538Srpaulo 4669251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 4670251538Srpaulo 4671287197Sglebius sc->sc_flags |= URTWN_RUNNING; 4672251538Srpaulo 4673251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 4674251538Srpaulofail: 4675291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4676291698Savos error = EIO; 4677291698Savos 4678291698Savos URTWN_UNLOCK(sc); 4679291698Savos 4680291698Savos return (error); 4681251538Srpaulo} 4682251538Srpaulo 4683251538Srpaulostatic void 4684287197Sglebiusurtwn_stop(struct urtwn_softc *sc) 4685251538Srpaulo{ 4686251538Srpaulo 4687291698Savos URTWN_LOCK(sc); 4688291698Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 4689291698Savos URTWN_UNLOCK(sc); 4690291698Savos return; 4691291698Savos } 4692291698Savos 4693287197Sglebius sc->sc_flags &= ~URTWN_RUNNING; 4694251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 4695251538Srpaulo urtwn_abort_xfers(sc); 4696288353Sadrian 4697288353Sadrian urtwn_drain_mbufq(sc); 4698291698Savos URTWN_UNLOCK(sc); 4699251538Srpaulo} 4700251538Srpaulo 4701251538Srpaulostatic void 4702251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 4703251538Srpaulo{ 4704251538Srpaulo int i; 4705251538Srpaulo 4706251538Srpaulo URTWN_ASSERT_LOCKED(sc); 4707251538Srpaulo 4708251538Srpaulo /* abort any pending transfers */ 4709251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 4710251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 4711251538Srpaulo} 4712251538Srpaulo 4713251538Srpaulostatic int 4714251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 4715251538Srpaulo const struct ieee80211_bpf_params *params) 4716251538Srpaulo{ 4717251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 4718286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4719251538Srpaulo struct urtwn_data *bf; 4720290630Savos int error; 4721251538Srpaulo 4722251538Srpaulo /* prevent management frames from being sent if we're not ready */ 4723290630Savos URTWN_LOCK(sc); 4724287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) { 4725290630Savos error = ENETDOWN; 4726290630Savos goto end; 4727251538Srpaulo } 4728290630Savos 4729251538Srpaulo bf = urtwn_getbuf(sc); 4730251538Srpaulo if (bf == NULL) { 4731290630Savos error = ENOBUFS; 4732290630Savos goto end; 4733251538Srpaulo } 4734251538Srpaulo 4735292221Savos if (params == NULL) { 4736292221Savos /* 4737292221Savos * Legacy path; interpret frame contents to decide 4738292221Savos * precisely how to send the frame. 4739292221Savos */ 4740292221Savos error = urtwn_tx_data(sc, ni, m, bf); 4741292221Savos } else { 4742292221Savos /* 4743292221Savos * Caller supplied explicit parameters to use in 4744292221Savos * sending the frame. 4745292221Savos */ 4746292221Savos error = urtwn_tx_raw(sc, ni, m, bf, params); 4747292221Savos } 4748292221Savos if (error != 0) { 4749251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 4750290630Savos goto end; 4751251538Srpaulo } 4752290630Savos 4753288353Sadrian sc->sc_txtimer = 5; 4754290630Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 4755290630Savos 4756290630Savosend: 4757290630Savos if (error != 0) 4758290630Savos m_freem(m); 4759290630Savos 4760251538Srpaulo URTWN_UNLOCK(sc); 4761251538Srpaulo 4762290630Savos return (error); 4763251538Srpaulo} 4764251538Srpaulo 4765266472Shselaskystatic void 4766266472Shselaskyurtwn_ms_delay(struct urtwn_softc *sc) 4767266472Shselasky{ 4768266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 1000); 4769266472Shselasky} 4770266472Shselasky 4771251538Srpaulostatic device_method_t urtwn_methods[] = { 4772251538Srpaulo /* Device interface */ 4773251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 4774251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 4775251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 4776251538Srpaulo 4777264912Skevlo DEVMETHOD_END 4778251538Srpaulo}; 4779251538Srpaulo 4780251538Srpaulostatic driver_t urtwn_driver = { 4781251538Srpaulo "urtwn", 4782251538Srpaulo urtwn_methods, 4783251538Srpaulo sizeof(struct urtwn_softc) 4784251538Srpaulo}; 4785251538Srpaulo 4786251538Srpaulostatic devclass_t urtwn_devclass; 4787251538Srpaulo 4788251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 4789251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 4790251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 4791251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 4792251538SrpauloMODULE_VERSION(urtwn, 1); 4793292080SimpUSB_PNP_HOST_INFO(urtwn_devs); 4794