if_urtwn.c revision 292174
1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5264912Skevlo * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6251538Srpaulo * 7251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 8251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 9251538Srpaulo * copyright notice and this permission notice appear in all copies. 10251538Srpaulo * 11251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18251538Srpaulo */ 19251538Srpaulo 20251538Srpaulo#include <sys/cdefs.h> 21251538Srpaulo__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtwn.c 292174 2015-12-13 21:50:38Z avos $"); 22251538Srpaulo 23251538Srpaulo/* 24264912Skevlo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU. 25251538Srpaulo */ 26251538Srpaulo 27288353Sadrian#include "opt_wlan.h" 28288353Sadrian 29251538Srpaulo#include <sys/param.h> 30251538Srpaulo#include <sys/sockio.h> 31251538Srpaulo#include <sys/sysctl.h> 32251538Srpaulo#include <sys/lock.h> 33251538Srpaulo#include <sys/mutex.h> 34291902Skevlo#include <sys/condvar.h> 35251538Srpaulo#include <sys/mbuf.h> 36251538Srpaulo#include <sys/kernel.h> 37251538Srpaulo#include <sys/socket.h> 38251538Srpaulo#include <sys/systm.h> 39251538Srpaulo#include <sys/malloc.h> 40251538Srpaulo#include <sys/module.h> 41251538Srpaulo#include <sys/bus.h> 42251538Srpaulo#include <sys/endian.h> 43251538Srpaulo#include <sys/linker.h> 44251538Srpaulo#include <sys/firmware.h> 45251538Srpaulo#include <sys/kdb.h> 46251538Srpaulo 47251538Srpaulo#include <machine/bus.h> 48251538Srpaulo#include <machine/resource.h> 49251538Srpaulo#include <sys/rman.h> 50251538Srpaulo 51251538Srpaulo#include <net/bpf.h> 52251538Srpaulo#include <net/if.h> 53257176Sglebius#include <net/if_var.h> 54251538Srpaulo#include <net/if_arp.h> 55251538Srpaulo#include <net/ethernet.h> 56251538Srpaulo#include <net/if_dl.h> 57251538Srpaulo#include <net/if_media.h> 58251538Srpaulo#include <net/if_types.h> 59251538Srpaulo 60251538Srpaulo#include <netinet/in.h> 61251538Srpaulo#include <netinet/in_systm.h> 62251538Srpaulo#include <netinet/in_var.h> 63251538Srpaulo#include <netinet/if_ether.h> 64251538Srpaulo#include <netinet/ip.h> 65251538Srpaulo 66251538Srpaulo#include <net80211/ieee80211_var.h> 67288088Sadrian#include <net80211/ieee80211_input.h> 68251538Srpaulo#include <net80211/ieee80211_regdomain.h> 69251538Srpaulo#include <net80211/ieee80211_radiotap.h> 70251538Srpaulo#include <net80211/ieee80211_ratectl.h> 71251538Srpaulo 72251538Srpaulo#include <dev/usb/usb.h> 73251538Srpaulo#include <dev/usb/usbdi.h> 74291902Skevlo#include <dev/usb/usb_device.h> 75251538Srpaulo#include "usbdevs.h" 76251538Srpaulo 77251538Srpaulo#define USB_DEBUG_VAR urtwn_debug 78251538Srpaulo#include <dev/usb/usb_debug.h> 79251538Srpaulo 80251538Srpaulo#include <dev/usb/wlan/if_urtwnreg.h> 81289167Sadrian#include <dev/usb/wlan/if_urtwnvar.h> 82251538Srpaulo 83251538Srpaulo#ifdef USB_DEBUG 84251538Srpaulostatic int urtwn_debug = 0; 85251538Srpaulo 86251538SrpauloSYSCTL_NODE(_hw_usb, OID_AUTO, urtwn, CTLFLAG_RW, 0, "USB urtwn"); 87276701ShselaskySYSCTL_INT(_hw_usb_urtwn, OID_AUTO, debug, CTLFLAG_RWTUN, &urtwn_debug, 0, 88251538Srpaulo "Debug level"); 89251538Srpaulo#endif 90251538Srpaulo 91288088Sadrian#define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 92251538Srpaulo 93251538Srpaulo/* various supported device vendors/products */ 94251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 95251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 96264912Skevlo#define URTWN_RTL8188E_DEV(v,p) \ 97264912Skevlo { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTWN_RTL8188E) } 98264912Skevlo#define URTWN_RTL8188E 1 99251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 100251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 101251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 102251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 103266721Skevlo URTWN_DEV(ASUS, USBN10NANO), 104251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 105251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 106251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 107251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 108251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 109251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 110251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 111251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 112251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 113251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 114251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 115251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 116251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 117251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 118251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 119251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 120252196Skevlo URTWN_DEV(DLINK, DWA131B), 121251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 122251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 123251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 124251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 125251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 126251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 127251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 128251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 129251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 130251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 131251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 132251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 133251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 134251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 135251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 136251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 137251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 138251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 139251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 140251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 141251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 142251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 143251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 144282119Skevlo URTWN_DEV(REALTEK, RTL8188CU_3), 145251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 146251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 147251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 148251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 149272410Shselasky URTWN_DEV(REALTEK, RTL8188RU_3), 150251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 151251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 152251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 153251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 154251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 155251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 156251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 157251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 158251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 159264912Skevlo /* URTWN_RTL8188E */ 160273589Skevlo URTWN_RTL8188E_DEV(DLINK, DWA123D1), 161270191Skevlo URTWN_RTL8188E_DEV(DLINK, DWA125D1), 162273589Skevlo URTWN_RTL8188E_DEV(ELECOM, WDC150SU2M), 163264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188ETV), 164264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188EU), 165264912Skevlo#undef URTWN_RTL8188E_DEV 166251538Srpaulo#undef URTWN_DEV 167251538Srpaulo}; 168251538Srpaulo 169251538Srpaulostatic device_probe_t urtwn_match; 170251538Srpaulostatic device_attach_t urtwn_attach; 171251538Srpaulostatic device_detach_t urtwn_detach; 172251538Srpaulo 173251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 174251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 175251538Srpaulo 176288353Sadrianstatic void urtwn_drain_mbufq(struct urtwn_softc *sc); 177287197Sglebiusstatic usb_error_t urtwn_do_request(struct urtwn_softc *, 178287197Sglebius struct usb_device_request *, void *); 179251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 180251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 181251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 182251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 183251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 184281069Srpaulostatic struct mbuf * urtwn_rx_frame(struct urtwn_softc *, uint8_t *, int, 185251538Srpaulo int *); 186292167Savosstatic struct mbuf * urtwn_report_intr(struct usb_xfer *, struct urtwn_data *, 187251538Srpaulo int *, int8_t *); 188292167Savosstatic struct mbuf * urtwn_rxeof(struct urtwn_softc *, uint8_t *, int, 189292167Savos int *, int8_t *); 190292167Savosstatic void urtwn_r88e_ratectl_tx_complete(struct urtwn_softc *, 191292167Savos void *); 192289891Savosstatic void urtwn_txeof(struct urtwn_softc *, struct urtwn_data *, 193289891Savos int); 194281069Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 195251538Srpaulo struct urtwn_data[], int, int); 196251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 197251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 198251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 199251538Srpaulo struct urtwn_data data[], int); 200289066Skevlostatic void urtwn_free_rx_list(struct urtwn_softc *); 201289066Skevlostatic void urtwn_free_tx_list(struct urtwn_softc *); 202251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 203251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 204291698Savosstatic usb_error_t urtwn_write_region_1(struct urtwn_softc *, uint16_t, 205251538Srpaulo uint8_t *, int); 206291698Savosstatic usb_error_t urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 207291698Savosstatic usb_error_t urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 208291698Savosstatic usb_error_t urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 209291698Savosstatic usb_error_t urtwn_read_region_1(struct urtwn_softc *, uint16_t, 210251538Srpaulo uint8_t *, int); 211251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 212251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 213251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 214281069Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 215251538Srpaulo const void *, int); 216292174Savosstatic void urtwn_cmdq_cb(void *, int); 217292174Savosstatic int urtwn_cmd_sleepable(struct urtwn_softc *, const void *, 218292174Savos size_t, CMD_FUNC_PROTO); 219264912Skevlostatic void urtwn_r92c_rf_write(struct urtwn_softc *, int, 220264912Skevlo uint8_t, uint32_t); 221281069Srpaulostatic void urtwn_r88e_rf_write(struct urtwn_softc *, int, 222264912Skevlo uint8_t, uint32_t); 223251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 224281069Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 225251538Srpaulo uint32_t); 226291264Savosstatic int urtwn_efuse_read_next(struct urtwn_softc *, uint8_t *); 227291264Savosstatic int urtwn_efuse_read_data(struct urtwn_softc *, uint8_t *, 228291264Savos uint8_t, uint8_t); 229291264Savos#ifdef URTWN_DEBUG 230291264Savosstatic void urtwn_dump_rom_contents(struct urtwn_softc *, 231291264Savos uint8_t *, uint16_t); 232291264Savos#endif 233291264Savosstatic int urtwn_efuse_read(struct urtwn_softc *, uint8_t *, 234291264Savos uint16_t); 235291698Savosstatic int urtwn_efuse_switch_power(struct urtwn_softc *); 236251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 237291264Savosstatic int urtwn_read_rom(struct urtwn_softc *); 238291264Savosstatic int urtwn_r88e_read_rom(struct urtwn_softc *); 239251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 240290631Savosstatic void urtwn_init_beacon(struct urtwn_softc *, 241290631Savos struct urtwn_vap *); 242290631Savosstatic int urtwn_setup_beacon(struct urtwn_softc *, 243290631Savos struct ieee80211_node *); 244290631Savosstatic void urtwn_update_beacon(struct ieee80211vap *, int); 245290631Savosstatic int urtwn_tx_beacon(struct urtwn_softc *sc, 246290631Savos struct urtwn_vap *); 247290651Savosstatic void urtwn_tsf_task_adhoc(void *, int); 248290631Savosstatic void urtwn_tsf_sync_enable(struct urtwn_softc *, 249290631Savos struct ieee80211vap *); 250251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 251289811Savosstatic void urtwn_set_mode(struct urtwn_softc *, uint8_t); 252290651Savosstatic void urtwn_ibss_recv_mgmt(struct ieee80211_node *, 253290651Savos struct mbuf *, int, 254290651Savos const struct ieee80211_rx_stats *, int, int); 255281069Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 256251538Srpaulo enum ieee80211_state, int); 257251538Srpaulostatic void urtwn_watchdog(void *); 258251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 259251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 260264912Skevlostatic int8_t urtwn_r88e_get_rssi(struct urtwn_softc *, int, void *); 261290630Savosstatic int urtwn_tx_data(struct urtwn_softc *, 262251538Srpaulo struct ieee80211_node *, struct mbuf *, 263251538Srpaulo struct urtwn_data *); 264290630Savosstatic void urtwn_tx_start(struct urtwn_softc *, struct mbuf *, 265290630Savos uint8_t, struct urtwn_data *); 266287197Sglebiusstatic int urtwn_transmit(struct ieee80211com *, struct mbuf *); 267287197Sglebiusstatic void urtwn_start(struct urtwn_softc *); 268287197Sglebiusstatic void urtwn_parent(struct ieee80211com *); 269264912Skevlostatic int urtwn_r92c_power_on(struct urtwn_softc *); 270264912Skevlostatic int urtwn_r88e_power_on(struct urtwn_softc *); 271251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 272251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 273264912Skevlostatic void urtwn_r88e_fw_reset(struct urtwn_softc *); 274281069Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 275251538Srpaulo const uint8_t *, int); 276251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 277291902Skevlostatic int urtwn_dma_init(struct urtwn_softc *); 278291698Savosstatic int urtwn_mac_init(struct urtwn_softc *); 279251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 280251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 281251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 282251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 283251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 284251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 285281069Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 286251538Srpaulo uint16_t[]); 287251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 288281069Srpaulo struct ieee80211_channel *, 289251538Srpaulo struct ieee80211_channel *, uint16_t[]); 290264912Skevlostatic void urtwn_r88e_get_txpower(struct urtwn_softc *, int, 291281069Srpaulo struct ieee80211_channel *, 292264912Skevlo struct ieee80211_channel *, uint16_t[]); 293251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 294281069Srpaulo struct ieee80211_channel *, 295251538Srpaulo struct ieee80211_channel *); 296290048Savosstatic void urtwn_set_rx_bssid_all(struct urtwn_softc *, int); 297290048Savosstatic void urtwn_set_gain(struct urtwn_softc *, uint8_t); 298251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 299251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 300251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 301292014Savosstatic int urtwn_wme_update(struct ieee80211com *); 302290564Savosstatic void urtwn_set_promisc(struct urtwn_softc *); 303290564Savosstatic void urtwn_update_promisc(struct ieee80211com *); 304289066Skevlostatic void urtwn_update_mcast(struct ieee80211com *); 305292167Savosstatic struct ieee80211_node *urtwn_r88e_node_alloc(struct ieee80211vap *, 306292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]); 307292167Savosstatic void urtwn_r88e_newassoc(struct ieee80211_node *, int); 308292167Savosstatic void urtwn_r88e_node_free(struct ieee80211_node *); 309251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 310281069Srpaulo struct ieee80211_channel *, 311251538Srpaulo struct ieee80211_channel *); 312251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 313251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 314291698Savosstatic int urtwn_init(struct urtwn_softc *); 315287197Sglebiusstatic void urtwn_stop(struct urtwn_softc *); 316251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 317251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 318251538Srpaulo const struct ieee80211_bpf_params *); 319266472Shselaskystatic void urtwn_ms_delay(struct urtwn_softc *); 320251538Srpaulo 321251538Srpaulo/* Aliases. */ 322251538Srpaulo#define urtwn_bb_write urtwn_write_4 323251538Srpaulo#define urtwn_bb_read urtwn_read_4 324251538Srpaulo 325251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 326251538Srpaulo [URTWN_BULK_RX] = { 327251538Srpaulo .type = UE_BULK, 328251538Srpaulo .endpoint = UE_ADDR_ANY, 329251538Srpaulo .direction = UE_DIR_IN, 330251538Srpaulo .bufsize = URTWN_RXBUFSZ, 331251538Srpaulo .flags = { 332251538Srpaulo .pipe_bof = 1, 333251538Srpaulo .short_xfer_ok = 1 334251538Srpaulo }, 335251538Srpaulo .callback = urtwn_bulk_rx_callback, 336251538Srpaulo }, 337251538Srpaulo [URTWN_BULK_TX_BE] = { 338251538Srpaulo .type = UE_BULK, 339251538Srpaulo .endpoint = 0x03, 340251538Srpaulo .direction = UE_DIR_OUT, 341251538Srpaulo .bufsize = URTWN_TXBUFSZ, 342251538Srpaulo .flags = { 343251538Srpaulo .ext_buffer = 1, 344251538Srpaulo .pipe_bof = 1, 345251538Srpaulo .force_short_xfer = 1 346251538Srpaulo }, 347251538Srpaulo .callback = urtwn_bulk_tx_callback, 348251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 349251538Srpaulo }, 350251538Srpaulo [URTWN_BULK_TX_BK] = { 351251538Srpaulo .type = UE_BULK, 352251538Srpaulo .endpoint = 0x03, 353251538Srpaulo .direction = UE_DIR_OUT, 354251538Srpaulo .bufsize = URTWN_TXBUFSZ, 355251538Srpaulo .flags = { 356251538Srpaulo .ext_buffer = 1, 357251538Srpaulo .pipe_bof = 1, 358251538Srpaulo .force_short_xfer = 1, 359251538Srpaulo }, 360251538Srpaulo .callback = urtwn_bulk_tx_callback, 361251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 362251538Srpaulo }, 363251538Srpaulo [URTWN_BULK_TX_VI] = { 364251538Srpaulo .type = UE_BULK, 365251538Srpaulo .endpoint = 0x02, 366251538Srpaulo .direction = UE_DIR_OUT, 367251538Srpaulo .bufsize = URTWN_TXBUFSZ, 368251538Srpaulo .flags = { 369251538Srpaulo .ext_buffer = 1, 370251538Srpaulo .pipe_bof = 1, 371251538Srpaulo .force_short_xfer = 1 372251538Srpaulo }, 373251538Srpaulo .callback = urtwn_bulk_tx_callback, 374251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 375251538Srpaulo }, 376251538Srpaulo [URTWN_BULK_TX_VO] = { 377251538Srpaulo .type = UE_BULK, 378251538Srpaulo .endpoint = 0x02, 379251538Srpaulo .direction = UE_DIR_OUT, 380251538Srpaulo .bufsize = URTWN_TXBUFSZ, 381251538Srpaulo .flags = { 382251538Srpaulo .ext_buffer = 1, 383251538Srpaulo .pipe_bof = 1, 384251538Srpaulo .force_short_xfer = 1 385251538Srpaulo }, 386251538Srpaulo .callback = urtwn_bulk_tx_callback, 387251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 388251538Srpaulo }, 389251538Srpaulo}; 390251538Srpaulo 391292014Savosstatic const struct wme_to_queue { 392292014Savos uint16_t reg; 393292014Savos uint8_t qid; 394292014Savos} wme2queue[WME_NUM_AC] = { 395292014Savos { R92C_EDCA_BE_PARAM, URTWN_BULK_TX_BE}, 396292014Savos { R92C_EDCA_BK_PARAM, URTWN_BULK_TX_BK}, 397292014Savos { R92C_EDCA_VI_PARAM, URTWN_BULK_TX_VI}, 398292014Savos { R92C_EDCA_VO_PARAM, URTWN_BULK_TX_VO} 399292014Savos}; 400292014Savos 401251538Srpaulostatic int 402251538Srpaulourtwn_match(device_t self) 403251538Srpaulo{ 404251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 405251538Srpaulo 406251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 407251538Srpaulo return (ENXIO); 408251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 409251538Srpaulo return (ENXIO); 410251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 411251538Srpaulo return (ENXIO); 412251538Srpaulo 413251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 414251538Srpaulo} 415251538Srpaulo 416251538Srpaulostatic int 417251538Srpaulourtwn_attach(device_t self) 418251538Srpaulo{ 419251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 420251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 421287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 422291902Skevlo uint8_t bands; 423251538Srpaulo int error; 424251538Srpaulo 425251538Srpaulo device_set_usb_desc(self); 426251538Srpaulo sc->sc_udev = uaa->device; 427251538Srpaulo sc->sc_dev = self; 428264912Skevlo if (USB_GET_DRIVER_INFO(uaa) == URTWN_RTL8188E) 429264912Skevlo sc->chip |= URTWN_CHIP_88E; 430251538Srpaulo 431251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 432251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 433292174Savos URTWN_CMDQ_LOCK_INIT(sc); 434292167Savos URTWN_NT_LOCK_INIT(sc); 435251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 436287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 437251538Srpaulo 438291902Skevlo sc->sc_iface_index = URTWN_IFACE_INDEX; 439291902Skevlo error = usbd_transfer_setup(uaa->device, &sc->sc_iface_index, 440291902Skevlo sc->sc_xfer, urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 441251538Srpaulo if (error) { 442251538Srpaulo device_printf(self, "could not allocate USB transfers, " 443251538Srpaulo "err=%s\n", usbd_errstr(error)); 444251538Srpaulo goto detach; 445251538Srpaulo } 446251538Srpaulo 447251538Srpaulo URTWN_LOCK(sc); 448251538Srpaulo 449251538Srpaulo error = urtwn_read_chipid(sc); 450251538Srpaulo if (error) { 451251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 452251538Srpaulo URTWN_UNLOCK(sc); 453251538Srpaulo goto detach; 454251538Srpaulo } 455251538Srpaulo 456251538Srpaulo /* Determine number of Tx/Rx chains. */ 457251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 458251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 459251538Srpaulo sc->nrxchains = 2; 460251538Srpaulo } else { 461251538Srpaulo sc->ntxchains = 1; 462251538Srpaulo sc->nrxchains = 1; 463251538Srpaulo } 464251538Srpaulo 465264912Skevlo if (sc->chip & URTWN_CHIP_88E) 466291264Savos error = urtwn_r88e_read_rom(sc); 467264912Skevlo else 468291264Savos error = urtwn_read_rom(sc); 469291264Savos if (error != 0) { 470291264Savos device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", 471291264Savos __func__, error); 472291264Savos URTWN_UNLOCK(sc); 473291264Savos goto detach; 474291264Savos } 475264912Skevlo 476251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 477251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 478264912Skevlo (sc->chip & URTWN_CHIP_88E) ? "8188EU" : 479251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 480251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 481251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 482251538Srpaulo 483251538Srpaulo URTWN_UNLOCK(sc); 484251538Srpaulo 485283537Sglebius ic->ic_softc = sc; 486283527Sglebius ic->ic_name = device_get_nameunit(self); 487251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 488251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 489251538Srpaulo 490251538Srpaulo /* set device capabilities */ 491251538Srpaulo ic->ic_caps = 492251538Srpaulo IEEE80211_C_STA /* station mode */ 493251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 494290651Savos | IEEE80211_C_IBSS /* adhoc mode */ 495290631Savos | IEEE80211_C_HOSTAP /* hostap mode */ 496251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 497251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 498251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 499251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 500292014Savos | IEEE80211_C_WME /* 802.11e */ 501251538Srpaulo ; 502251538Srpaulo 503251538Srpaulo bands = 0; 504251538Srpaulo setbit(&bands, IEEE80211_MODE_11B); 505251538Srpaulo setbit(&bands, IEEE80211_MODE_11G); 506251538Srpaulo ieee80211_init_channels(ic, NULL, &bands); 507251538Srpaulo 508287197Sglebius ieee80211_ifattach(ic); 509251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 510251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 511251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 512251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 513287197Sglebius ic->ic_transmit = urtwn_transmit; 514287197Sglebius ic->ic_parent = urtwn_parent; 515251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 516251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 517292014Savos ic->ic_wme.wme_update = urtwn_wme_update; 518290564Savos ic->ic_update_promisc = urtwn_update_promisc; 519251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 520292167Savos if (sc->chip & URTWN_CHIP_88E) { 521292167Savos ic->ic_node_alloc = urtwn_r88e_node_alloc; 522292167Savos ic->ic_newassoc = urtwn_r88e_newassoc; 523292167Savos sc->sc_node_free = ic->ic_node_free; 524292167Savos ic->ic_node_free = urtwn_r88e_node_free; 525292167Savos } 526251538Srpaulo 527281069Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 528251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 529251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 530251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 531251538Srpaulo 532292174Savos TASK_INIT(&sc->cmdq_task, 0, urtwn_cmdq_cb, sc); 533292174Savos 534251538Srpaulo if (bootverbose) 535251538Srpaulo ieee80211_announce(ic); 536251538Srpaulo 537251538Srpaulo return (0); 538251538Srpaulo 539251538Srpaulodetach: 540251538Srpaulo urtwn_detach(self); 541251538Srpaulo return (ENXIO); /* failure */ 542251538Srpaulo} 543251538Srpaulo 544251538Srpaulostatic int 545251538Srpaulourtwn_detach(device_t self) 546251538Srpaulo{ 547251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 548287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 549263153Skevlo unsigned int x; 550281069Srpaulo 551263153Skevlo /* Prevent further ioctls. */ 552263153Skevlo URTWN_LOCK(sc); 553263153Skevlo sc->sc_flags |= URTWN_DETACHED; 554263153Skevlo URTWN_UNLOCK(sc); 555251538Srpaulo 556291698Savos urtwn_stop(sc); 557291698Savos 558251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 559251538Srpaulo 560288353Sadrian /* stop all USB transfers */ 561288353Sadrian usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 562288353Sadrian 563263153Skevlo /* Prevent further allocations from RX/TX data lists. */ 564263153Skevlo URTWN_LOCK(sc); 565263153Skevlo STAILQ_INIT(&sc->sc_tx_active); 566263153Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 567263153Skevlo STAILQ_INIT(&sc->sc_tx_pending); 568263153Skevlo 569263153Skevlo STAILQ_INIT(&sc->sc_rx_active); 570263153Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 571263153Skevlo URTWN_UNLOCK(sc); 572263153Skevlo 573263153Skevlo /* drain USB transfers */ 574263153Skevlo for (x = 0; x != URTWN_N_TRANSFER; x++) 575263153Skevlo usbd_transfer_drain(sc->sc_xfer[x]); 576263153Skevlo 577263153Skevlo /* Free data buffers. */ 578263153Skevlo URTWN_LOCK(sc); 579263153Skevlo urtwn_free_tx_list(sc); 580263153Skevlo urtwn_free_rx_list(sc); 581263153Skevlo URTWN_UNLOCK(sc); 582263153Skevlo 583292174Savos if (ic->ic_softc == sc) { 584292174Savos ieee80211_draintask(ic, &sc->cmdq_task); 585292174Savos ieee80211_ifdetach(ic); 586292174Savos } 587292174Savos 588292167Savos URTWN_NT_LOCK_DESTROY(sc); 589292174Savos URTWN_CMDQ_LOCK_DESTROY(sc); 590251538Srpaulo mtx_destroy(&sc->sc_mtx); 591251538Srpaulo 592251538Srpaulo return (0); 593251538Srpaulo} 594251538Srpaulo 595251538Srpaulostatic void 596289066Skevlourtwn_drain_mbufq(struct urtwn_softc *sc) 597251538Srpaulo{ 598289066Skevlo struct mbuf *m; 599289066Skevlo struct ieee80211_node *ni; 600289066Skevlo URTWN_ASSERT_LOCKED(sc); 601289066Skevlo while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 602289066Skevlo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 603289066Skevlo m->m_pkthdr.rcvif = NULL; 604289066Skevlo ieee80211_free_node(ni); 605289066Skevlo m_freem(m); 606251538Srpaulo } 607251538Srpaulo} 608251538Srpaulo 609251538Srpaulostatic usb_error_t 610251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 611251538Srpaulo void *data) 612251538Srpaulo{ 613251538Srpaulo usb_error_t err; 614251538Srpaulo int ntries = 10; 615251538Srpaulo 616251538Srpaulo URTWN_ASSERT_LOCKED(sc); 617251538Srpaulo 618251538Srpaulo while (ntries--) { 619251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 620251538Srpaulo req, data, 0, NULL, 250 /* ms */); 621251538Srpaulo if (err == 0) 622251538Srpaulo break; 623251538Srpaulo 624251538Srpaulo DPRINTFN(1, "Control request failed, %s (retrying)\n", 625251538Srpaulo usbd_errstr(err)); 626251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 627251538Srpaulo } 628251538Srpaulo return (err); 629251538Srpaulo} 630251538Srpaulo 631251538Srpaulostatic struct ieee80211vap * 632251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 633251538Srpaulo enum ieee80211_opmode opmode, int flags, 634251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 635251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 636251538Srpaulo{ 637290631Savos struct urtwn_softc *sc = ic->ic_softc; 638251538Srpaulo struct urtwn_vap *uvp; 639251538Srpaulo struct ieee80211vap *vap; 640251538Srpaulo 641251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 642251538Srpaulo return (NULL); 643251538Srpaulo 644287197Sglebius uvp = malloc(sizeof(struct urtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); 645251538Srpaulo vap = &uvp->vap; 646251538Srpaulo /* enable s/w bmiss handling for sta mode */ 647251538Srpaulo 648281069Srpaulo if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 649287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 650257743Shselasky /* out of memory */ 651257743Shselasky free(uvp, M_80211_VAP); 652257743Shselasky return (NULL); 653257743Shselasky } 654257743Shselasky 655290651Savos if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) 656290631Savos urtwn_init_beacon(sc, uvp); 657290631Savos 658251538Srpaulo /* override state transition machine */ 659251538Srpaulo uvp->newstate = vap->iv_newstate; 660251538Srpaulo vap->iv_newstate = urtwn_newstate; 661290631Savos vap->iv_update_beacon = urtwn_update_beacon; 662290651Savos if (opmode == IEEE80211_M_IBSS) { 663290651Savos uvp->recv_mgmt = vap->iv_recv_mgmt; 664290651Savos vap->iv_recv_mgmt = urtwn_ibss_recv_mgmt; 665290651Savos TASK_INIT(&uvp->tsf_task_adhoc, 0, urtwn_tsf_task_adhoc, vap); 666290651Savos } 667251538Srpaulo 668292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 669292167Savos ieee80211_ratectl_init(vap); 670251538Srpaulo /* complete setup */ 671251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 672287197Sglebius ieee80211_media_status, mac); 673251538Srpaulo ic->ic_opmode = opmode; 674251538Srpaulo return (vap); 675251538Srpaulo} 676251538Srpaulo 677251538Srpaulostatic void 678251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 679251538Srpaulo{ 680290651Savos struct ieee80211com *ic = vap->iv_ic; 681292167Savos struct urtwn_softc *sc = ic->ic_softc; 682251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 683251538Srpaulo 684290651Savos if (uvp->bcn_mbuf != NULL) 685290651Savos m_freem(uvp->bcn_mbuf); 686290651Savos if (vap->iv_opmode == IEEE80211_M_IBSS) 687290651Savos ieee80211_draintask(ic, &uvp->tsf_task_adhoc); 688292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) 689292167Savos ieee80211_ratectl_deinit(vap); 690251538Srpaulo ieee80211_vap_detach(vap); 691251538Srpaulo free(uvp, M_80211_VAP); 692251538Srpaulo} 693251538Srpaulo 694251538Srpaulostatic struct mbuf * 695251538Srpaulourtwn_rx_frame(struct urtwn_softc *sc, uint8_t *buf, int pktlen, int *rssi_p) 696251538Srpaulo{ 697287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 698251538Srpaulo struct ieee80211_frame *wh; 699251538Srpaulo struct mbuf *m; 700251538Srpaulo struct r92c_rx_stat *stat; 701251538Srpaulo uint32_t rxdw0, rxdw3; 702251538Srpaulo uint8_t rate; 703251538Srpaulo int8_t rssi = 0; 704251538Srpaulo int infosz; 705251538Srpaulo 706251538Srpaulo /* 707251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 708251538Srpaulo * RUNNING. 709251538Srpaulo */ 710287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) 711251538Srpaulo return (NULL); 712251538Srpaulo 713251538Srpaulo stat = (struct r92c_rx_stat *)buf; 714251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 715251538Srpaulo rxdw3 = le32toh(stat->rxdw3); 716251538Srpaulo 717251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 718251538Srpaulo /* 719251538Srpaulo * This should not happen since we setup our Rx filter 720251538Srpaulo * to not receive these frames. 721251538Srpaulo */ 722287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 723251538Srpaulo return (NULL); 724251538Srpaulo } 725290022Savos if (pktlen < sizeof(struct ieee80211_frame_ack) || 726290022Savos pktlen > MCLBYTES) { 727287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 728271303Skevlo return (NULL); 729271303Skevlo } 730251538Srpaulo 731251538Srpaulo rate = MS(rxdw3, R92C_RXDW3_RATE); 732251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 733251538Srpaulo 734251538Srpaulo /* Get RSSI from PHY status descriptor if present. */ 735251538Srpaulo if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 736281069Srpaulo if (sc->chip & URTWN_CHIP_88E) 737264912Skevlo rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]); 738264912Skevlo else 739264912Skevlo rssi = urtwn_get_rssi(sc, rate, &stat[1]); 740251538Srpaulo /* Update our average RSSI. */ 741251538Srpaulo urtwn_update_avgrssi(sc, rate, rssi); 742251538Srpaulo } 743251538Srpaulo 744260463Skevlo m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 745251538Srpaulo if (m == NULL) { 746251538Srpaulo device_printf(sc->sc_dev, "could not create RX mbuf\n"); 747251538Srpaulo return (NULL); 748251538Srpaulo } 749251538Srpaulo 750251538Srpaulo /* Finalize mbuf. */ 751251538Srpaulo wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 752251538Srpaulo memcpy(mtod(m, uint8_t *), wh, pktlen); 753251538Srpaulo m->m_pkthdr.len = m->m_len = pktlen; 754251538Srpaulo 755251538Srpaulo if (ieee80211_radiotap_active(ic)) { 756251538Srpaulo struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 757251538Srpaulo 758251538Srpaulo tap->wr_flags = 0; 759251538Srpaulo /* Map HW rate index to 802.11 rate. */ 760251538Srpaulo if (!(rxdw3 & R92C_RXDW3_HT)) { 761289758Savos tap->wr_rate = ridx2rate[rate]; 762251538Srpaulo } else if (rate >= 12) { /* MCS0~15. */ 763251538Srpaulo /* Bit 7 set means HT MCS instead of rate. */ 764251538Srpaulo tap->wr_rate = 0x80 | (rate - 12); 765251538Srpaulo } 766251538Srpaulo tap->wr_dbm_antsignal = rssi; 767289816Savos tap->wr_dbm_antnoise = URTWN_NOISE_FLOOR; 768251538Srpaulo } 769251538Srpaulo 770251538Srpaulo *rssi_p = rssi; 771251538Srpaulo 772251538Srpaulo return (m); 773251538Srpaulo} 774251538Srpaulo 775251538Srpaulostatic struct mbuf * 776292167Savosurtwn_report_intr(struct usb_xfer *xfer, struct urtwn_data *data, int *rssi, 777251538Srpaulo int8_t *nf) 778251538Srpaulo{ 779251538Srpaulo struct urtwn_softc *sc = data->sc; 780287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 781251538Srpaulo struct r92c_rx_stat *stat; 782251538Srpaulo uint8_t *buf; 783292167Savos int len; 784251538Srpaulo 785251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 786251538Srpaulo 787251538Srpaulo if (len < sizeof(*stat)) { 788287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 789251538Srpaulo return (NULL); 790251538Srpaulo } 791251538Srpaulo 792251538Srpaulo buf = data->buf; 793292167Savos stat = (struct r92c_rx_stat *)buf; 794292167Savos 795292167Savos if (sc->chip & URTWN_CHIP_88E) { 796292167Savos int report_sel = MS(le32toh(stat->rxdw3), R88E_RXDW3_RPT); 797292167Savos 798292167Savos switch (report_sel) { 799292167Savos case R88E_RXDW3_RPT_RX: 800292167Savos return (urtwn_rxeof(sc, buf, len, rssi, nf)); 801292167Savos case R88E_RXDW3_RPT_TX1: 802292167Savos urtwn_r88e_ratectl_tx_complete(sc, &stat[1]); 803292167Savos break; 804292167Savos default: 805292167Savos DPRINTFN(7, "case %d was not handled\n", report_sel); 806292167Savos break; 807292167Savos } 808292167Savos } else 809292167Savos return (urtwn_rxeof(sc, buf, len, rssi, nf)); 810292167Savos 811292167Savos return (NULL); 812292167Savos} 813292167Savos 814292167Savosstatic struct mbuf * 815292167Savosurtwn_rxeof(struct urtwn_softc *sc, uint8_t *buf, int len, int *rssi, 816292167Savos int8_t *nf) 817292167Savos{ 818292167Savos struct r92c_rx_stat *stat; 819292167Savos struct mbuf *m, *m0 = NULL, *prevm = NULL; 820292167Savos uint32_t rxdw0; 821292167Savos int totlen, pktlen, infosz, npkts; 822292167Savos 823251538Srpaulo /* Get the number of encapsulated frames. */ 824251538Srpaulo stat = (struct r92c_rx_stat *)buf; 825251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 826251538Srpaulo DPRINTFN(6, "Rx %d frames in one chunk\n", npkts); 827251538Srpaulo 828251538Srpaulo /* Process all of them. */ 829251538Srpaulo while (npkts-- > 0) { 830251538Srpaulo if (len < sizeof(*stat)) 831251538Srpaulo break; 832251538Srpaulo stat = (struct r92c_rx_stat *)buf; 833251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 834251538Srpaulo 835251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 836251538Srpaulo if (pktlen == 0) 837251538Srpaulo break; 838251538Srpaulo 839251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 840251538Srpaulo 841251538Srpaulo /* Make sure everything fits in xfer. */ 842251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 843251538Srpaulo if (totlen > len) 844251538Srpaulo break; 845251538Srpaulo 846251538Srpaulo m = urtwn_rx_frame(sc, buf, pktlen, rssi); 847251538Srpaulo if (m0 == NULL) 848251538Srpaulo m0 = m; 849251538Srpaulo if (prevm == NULL) 850251538Srpaulo prevm = m; 851251538Srpaulo else { 852251538Srpaulo prevm->m_next = m; 853251538Srpaulo prevm = m; 854251538Srpaulo } 855251538Srpaulo 856251538Srpaulo /* Next chunk is 128-byte aligned. */ 857251538Srpaulo totlen = (totlen + 127) & ~127; 858251538Srpaulo buf += totlen; 859251538Srpaulo len -= totlen; 860251538Srpaulo } 861251538Srpaulo 862251538Srpaulo return (m0); 863251538Srpaulo} 864251538Srpaulo 865251538Srpaulostatic void 866292167Savosurtwn_r88e_ratectl_tx_complete(struct urtwn_softc *sc, void *arg) 867292167Savos{ 868292167Savos struct r88e_tx_rpt_ccx *rpt = arg; 869292167Savos struct ieee80211vap *vap; 870292167Savos struct ieee80211_node *ni; 871292167Savos uint8_t macid; 872292167Savos int ntries; 873292167Savos 874292167Savos macid = MS(rpt->rptb1, R88E_RPTB1_MACID); 875292167Savos ntries = MS(rpt->rptb2, R88E_RPTB2_RETRY_CNT); 876292167Savos 877292167Savos URTWN_NT_LOCK(sc); 878292167Savos ni = sc->node_list[macid]; 879292167Savos if (ni != NULL) { 880292167Savos vap = ni->ni_vap; 881292167Savos 882292167Savos if (rpt->rptb1 & R88E_RPTB1_PKT_OK) { 883292167Savos ieee80211_ratectl_tx_complete(vap, ni, 884292167Savos IEEE80211_RATECTL_TX_SUCCESS, &ntries, NULL); 885292167Savos } else { 886292167Savos ieee80211_ratectl_tx_complete(vap, ni, 887292167Savos IEEE80211_RATECTL_TX_FAILURE, &ntries, NULL); 888292167Savos } 889292167Savos } else 890292167Savos DPRINTFN(8, "macid %d, ni is NULL\n", macid); 891292167Savos URTWN_NT_UNLOCK(sc); 892292167Savos} 893292167Savos 894292167Savosstatic void 895251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 896251538Srpaulo{ 897251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 898287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 899290022Savos struct ieee80211_frame_min *wh; 900251538Srpaulo struct ieee80211_node *ni; 901251538Srpaulo struct mbuf *m = NULL, *next; 902251538Srpaulo struct urtwn_data *data; 903251538Srpaulo int8_t nf; 904251538Srpaulo int rssi = 1; 905251538Srpaulo 906251538Srpaulo URTWN_ASSERT_LOCKED(sc); 907251538Srpaulo 908251538Srpaulo switch (USB_GET_STATE(xfer)) { 909251538Srpaulo case USB_ST_TRANSFERRED: 910251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 911251538Srpaulo if (data == NULL) 912251538Srpaulo goto tr_setup; 913251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 914292167Savos m = urtwn_report_intr(xfer, data, &rssi, &nf); 915251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 916251538Srpaulo /* FALLTHROUGH */ 917251538Srpaulo case USB_ST_SETUP: 918251538Srpaulotr_setup: 919251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 920251538Srpaulo if (data == NULL) { 921251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 922251538Srpaulo return; 923251538Srpaulo } 924251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 925251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 926251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 927251538Srpaulo usbd_xfer_max_len(xfer)); 928251538Srpaulo usbd_transfer_submit(xfer); 929251538Srpaulo 930251538Srpaulo /* 931251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 932251538Srpaulo * ieee80211_input() because here is at the end of a USB 933251538Srpaulo * callback and safe to unlock. 934251538Srpaulo */ 935251538Srpaulo URTWN_UNLOCK(sc); 936251538Srpaulo while (m != NULL) { 937251538Srpaulo next = m->m_next; 938251538Srpaulo m->m_next = NULL; 939290022Savos wh = mtod(m, struct ieee80211_frame_min *); 940290022Savos if (m->m_len >= sizeof(*wh)) 941290022Savos ni = ieee80211_find_rxnode(ic, wh); 942290022Savos else 943290022Savos ni = NULL; 944251538Srpaulo nf = URTWN_NOISE_FLOOR; 945251538Srpaulo if (ni != NULL) { 946289799Savos (void)ieee80211_input(ni, m, rssi - nf, nf); 947251538Srpaulo ieee80211_free_node(ni); 948289799Savos } else { 949289799Savos (void)ieee80211_input_all(ic, m, rssi - nf, 950289799Savos nf); 951289799Savos } 952251538Srpaulo m = next; 953251538Srpaulo } 954251538Srpaulo URTWN_LOCK(sc); 955251538Srpaulo break; 956251538Srpaulo default: 957251538Srpaulo /* needs it to the inactive queue due to a error. */ 958251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 959251538Srpaulo if (data != NULL) { 960251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 961251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 962251538Srpaulo } 963251538Srpaulo if (error != USB_ERR_CANCELLED) { 964251538Srpaulo usbd_xfer_set_stall(xfer); 965287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 966251538Srpaulo goto tr_setup; 967251538Srpaulo } 968251538Srpaulo break; 969251538Srpaulo } 970251538Srpaulo} 971251538Srpaulo 972251538Srpaulostatic void 973289891Savosurtwn_txeof(struct urtwn_softc *sc, struct urtwn_data *data, int status) 974251538Srpaulo{ 975251538Srpaulo 976251538Srpaulo URTWN_ASSERT_LOCKED(sc); 977289891Savos 978290631Savos if (data->ni != NULL) /* not a beacon frame */ 979290631Savos ieee80211_tx_complete(data->ni, data->m, status); 980289891Savos 981287197Sglebius data->ni = NULL; 982287197Sglebius data->m = NULL; 983289891Savos 984251538Srpaulo sc->sc_txtimer = 0; 985289891Savos 986289891Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 987251538Srpaulo} 988251538Srpaulo 989289066Skevlostatic int 990289066Skevlourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 991289066Skevlo int ndata, int maxsz) 992289066Skevlo{ 993289066Skevlo int i, error; 994289066Skevlo 995289066Skevlo for (i = 0; i < ndata; i++) { 996289066Skevlo struct urtwn_data *dp = &data[i]; 997289066Skevlo dp->sc = sc; 998289066Skevlo dp->m = NULL; 999289066Skevlo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1000289066Skevlo if (dp->buf == NULL) { 1001289066Skevlo device_printf(sc->sc_dev, 1002289066Skevlo "could not allocate buffer\n"); 1003289066Skevlo error = ENOMEM; 1004289066Skevlo goto fail; 1005289066Skevlo } 1006289066Skevlo dp->ni = NULL; 1007289066Skevlo } 1008289066Skevlo 1009289066Skevlo return (0); 1010289066Skevlofail: 1011289066Skevlo urtwn_free_list(sc, data, ndata); 1012289066Skevlo return (error); 1013289066Skevlo} 1014289066Skevlo 1015289066Skevlostatic int 1016289066Skevlourtwn_alloc_rx_list(struct urtwn_softc *sc) 1017289066Skevlo{ 1018289066Skevlo int error, i; 1019289066Skevlo 1020289066Skevlo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 1021289066Skevlo URTWN_RXBUFSZ); 1022289066Skevlo if (error != 0) 1023289066Skevlo return (error); 1024289066Skevlo 1025289066Skevlo STAILQ_INIT(&sc->sc_rx_active); 1026289066Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 1027289066Skevlo 1028289066Skevlo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 1029289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1030289066Skevlo 1031289066Skevlo return (0); 1032289066Skevlo} 1033289066Skevlo 1034289066Skevlostatic int 1035289066Skevlourtwn_alloc_tx_list(struct urtwn_softc *sc) 1036289066Skevlo{ 1037289066Skevlo int error, i; 1038289066Skevlo 1039289066Skevlo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 1040289066Skevlo URTWN_TXBUFSZ); 1041289066Skevlo if (error != 0) 1042289066Skevlo return (error); 1043289066Skevlo 1044289066Skevlo STAILQ_INIT(&sc->sc_tx_active); 1045289066Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 1046289066Skevlo STAILQ_INIT(&sc->sc_tx_pending); 1047289066Skevlo 1048289066Skevlo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 1049289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 1050289066Skevlo 1051289066Skevlo return (0); 1052289066Skevlo} 1053289066Skevlo 1054251538Srpaulostatic void 1055289066Skevlourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 1056289066Skevlo{ 1057289066Skevlo int i; 1058289066Skevlo 1059289066Skevlo for (i = 0; i < ndata; i++) { 1060289066Skevlo struct urtwn_data *dp = &data[i]; 1061289066Skevlo 1062289066Skevlo if (dp->buf != NULL) { 1063289066Skevlo free(dp->buf, M_USBDEV); 1064289066Skevlo dp->buf = NULL; 1065289066Skevlo } 1066289066Skevlo if (dp->ni != NULL) { 1067289066Skevlo ieee80211_free_node(dp->ni); 1068289066Skevlo dp->ni = NULL; 1069289066Skevlo } 1070289066Skevlo } 1071289066Skevlo} 1072289066Skevlo 1073289066Skevlostatic void 1074289066Skevlourtwn_free_rx_list(struct urtwn_softc *sc) 1075289066Skevlo{ 1076289066Skevlo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 1077289066Skevlo} 1078289066Skevlo 1079289066Skevlostatic void 1080289066Skevlourtwn_free_tx_list(struct urtwn_softc *sc) 1081289066Skevlo{ 1082289066Skevlo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 1083289066Skevlo} 1084289066Skevlo 1085289066Skevlostatic void 1086251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 1087251538Srpaulo{ 1088251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 1089251538Srpaulo struct urtwn_data *data; 1090251538Srpaulo 1091251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1092251538Srpaulo 1093251538Srpaulo switch (USB_GET_STATE(xfer)){ 1094251538Srpaulo case USB_ST_TRANSFERRED: 1095251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1096251538Srpaulo if (data == NULL) 1097251538Srpaulo goto tr_setup; 1098251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1099289891Savos urtwn_txeof(sc, data, 0); 1100251538Srpaulo /* FALLTHROUGH */ 1101251538Srpaulo case USB_ST_SETUP: 1102251538Srpaulotr_setup: 1103251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 1104251538Srpaulo if (data == NULL) { 1105251538Srpaulo DPRINTF("%s: empty pending queue\n", __func__); 1106288353Sadrian goto finish; 1107251538Srpaulo } 1108251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1109251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1110251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1111251538Srpaulo usbd_transfer_submit(xfer); 1112251538Srpaulo break; 1113251538Srpaulo default: 1114251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1115251538Srpaulo if (data == NULL) 1116251538Srpaulo goto tr_setup; 1117289891Savos STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1118289891Savos urtwn_txeof(sc, data, 1); 1119251538Srpaulo if (error != USB_ERR_CANCELLED) { 1120251538Srpaulo usbd_xfer_set_stall(xfer); 1121251538Srpaulo goto tr_setup; 1122251538Srpaulo } 1123251538Srpaulo break; 1124251538Srpaulo } 1125288353Sadrianfinish: 1126288353Sadrian /* Kick-start more transmit */ 1127288353Sadrian urtwn_start(sc); 1128251538Srpaulo} 1129251538Srpaulo 1130251538Srpaulostatic struct urtwn_data * 1131251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 1132251538Srpaulo{ 1133251538Srpaulo struct urtwn_data *bf; 1134251538Srpaulo 1135251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 1136251538Srpaulo if (bf != NULL) 1137251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 1138251538Srpaulo else 1139251538Srpaulo DPRINTF("%s: %s\n", __func__, "out of xmit buffers"); 1140251538Srpaulo return (bf); 1141251538Srpaulo} 1142251538Srpaulo 1143251538Srpaulostatic struct urtwn_data * 1144251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 1145251538Srpaulo{ 1146251538Srpaulo struct urtwn_data *bf; 1147251538Srpaulo 1148251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1149251538Srpaulo 1150251538Srpaulo bf = _urtwn_getbuf(sc); 1151287197Sglebius if (bf == NULL) 1152251538Srpaulo DPRINTF("%s: stop queue\n", __func__); 1153251538Srpaulo return (bf); 1154251538Srpaulo} 1155251538Srpaulo 1156291698Savosstatic usb_error_t 1157251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1158251538Srpaulo int len) 1159251538Srpaulo{ 1160251538Srpaulo usb_device_request_t req; 1161251538Srpaulo 1162251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1163251538Srpaulo req.bRequest = R92C_REQ_REGS; 1164251538Srpaulo USETW(req.wValue, addr); 1165251538Srpaulo USETW(req.wIndex, 0); 1166251538Srpaulo USETW(req.wLength, len); 1167251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1168251538Srpaulo} 1169251538Srpaulo 1170291698Savosstatic usb_error_t 1171251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 1172251538Srpaulo{ 1173291698Savos return (urtwn_write_region_1(sc, addr, &val, sizeof(val))); 1174251538Srpaulo} 1175251538Srpaulo 1176291698Savosstatic usb_error_t 1177251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 1178251538Srpaulo{ 1179251538Srpaulo val = htole16(val); 1180291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1181251538Srpaulo} 1182251538Srpaulo 1183291698Savosstatic usb_error_t 1184251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 1185251538Srpaulo{ 1186251538Srpaulo val = htole32(val); 1187291698Savos return (urtwn_write_region_1(sc, addr, (uint8_t *)&val, sizeof(val))); 1188251538Srpaulo} 1189251538Srpaulo 1190291698Savosstatic usb_error_t 1191251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1192251538Srpaulo int len) 1193251538Srpaulo{ 1194251538Srpaulo usb_device_request_t req; 1195251538Srpaulo 1196251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 1197251538Srpaulo req.bRequest = R92C_REQ_REGS; 1198251538Srpaulo USETW(req.wValue, addr); 1199251538Srpaulo USETW(req.wIndex, 0); 1200251538Srpaulo USETW(req.wLength, len); 1201251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1202251538Srpaulo} 1203251538Srpaulo 1204251538Srpaulostatic uint8_t 1205251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 1206251538Srpaulo{ 1207251538Srpaulo uint8_t val; 1208251538Srpaulo 1209251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 1210251538Srpaulo return (0xff); 1211251538Srpaulo return (val); 1212251538Srpaulo} 1213251538Srpaulo 1214251538Srpaulostatic uint16_t 1215251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 1216251538Srpaulo{ 1217251538Srpaulo uint16_t val; 1218251538Srpaulo 1219251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 1220251538Srpaulo return (0xffff); 1221251538Srpaulo return (le16toh(val)); 1222251538Srpaulo} 1223251538Srpaulo 1224251538Srpaulostatic uint32_t 1225251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 1226251538Srpaulo{ 1227251538Srpaulo uint32_t val; 1228251538Srpaulo 1229251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 1230251538Srpaulo return (0xffffffff); 1231251538Srpaulo return (le32toh(val)); 1232251538Srpaulo} 1233251538Srpaulo 1234251538Srpaulostatic int 1235251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1236251538Srpaulo{ 1237251538Srpaulo struct r92c_fw_cmd cmd; 1238291698Savos usb_error_t error; 1239251538Srpaulo int ntries; 1240251538Srpaulo 1241251538Srpaulo /* Wait for current FW box to be empty. */ 1242251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1243251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1244251538Srpaulo break; 1245266472Shselasky urtwn_ms_delay(sc); 1246251538Srpaulo } 1247251538Srpaulo if (ntries == 100) { 1248251538Srpaulo device_printf(sc->sc_dev, 1249251538Srpaulo "could not send firmware command\n"); 1250251538Srpaulo return (ETIMEDOUT); 1251251538Srpaulo } 1252251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1253251538Srpaulo cmd.id = id; 1254251538Srpaulo if (len > 3) 1255251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1256251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1257251538Srpaulo memcpy(cmd.msg, buf, len); 1258251538Srpaulo 1259251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1260291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1261251538Srpaulo (uint8_t *)&cmd + 4, 2); 1262291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1263291698Savos return (EIO); 1264291698Savos error = urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1265251538Srpaulo (uint8_t *)&cmd + 0, 4); 1266291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1267291698Savos return (EIO); 1268251538Srpaulo 1269251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1270251538Srpaulo return (0); 1271251538Srpaulo} 1272251538Srpaulo 1273292174Savosstatic void 1274292174Savosurtwn_cmdq_cb(void *arg, int pending) 1275292174Savos{ 1276292174Savos struct urtwn_softc *sc = arg; 1277292174Savos struct urtwn_cmdq *item; 1278292174Savos 1279292174Savos /* 1280292174Savos * Device must be powered on (via urtwn_power_on()) 1281292174Savos * before any command may be sent. 1282292174Savos */ 1283292174Savos URTWN_LOCK(sc); 1284292174Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 1285292174Savos URTWN_UNLOCK(sc); 1286292174Savos return; 1287292174Savos } 1288292174Savos 1289292174Savos URTWN_CMDQ_LOCK(sc); 1290292174Savos while (sc->cmdq[sc->cmdq_first].func != NULL) { 1291292174Savos item = &sc->cmdq[sc->cmdq_first]; 1292292174Savos sc->cmdq_first = (sc->cmdq_first + 1) % URTWN_CMDQ_SIZE; 1293292174Savos URTWN_CMDQ_UNLOCK(sc); 1294292174Savos 1295292174Savos item->func(sc, &item->data); 1296292174Savos 1297292174Savos URTWN_CMDQ_LOCK(sc); 1298292174Savos memset(item, 0, sizeof (*item)); 1299292174Savos } 1300292174Savos URTWN_CMDQ_UNLOCK(sc); 1301292174Savos URTWN_UNLOCK(sc); 1302292174Savos} 1303292174Savos 1304292174Savosstatic int 1305292174Savosurtwn_cmd_sleepable(struct urtwn_softc *sc, const void *ptr, size_t len, 1306292174Savos CMD_FUNC_PROTO) 1307292174Savos{ 1308292174Savos struct ieee80211com *ic = &sc->sc_ic; 1309292174Savos 1310292174Savos KASSERT(len <= sizeof(union sec_param), ("buffer overflow")); 1311292174Savos 1312292174Savos URTWN_CMDQ_LOCK(sc); 1313292174Savos if (sc->cmdq[sc->cmdq_last].func != NULL) { 1314292174Savos device_printf(sc->sc_dev, "%s: cmdq overflow\n", __func__); 1315292174Savos URTWN_CMDQ_UNLOCK(sc); 1316292174Savos 1317292174Savos return (EAGAIN); 1318292174Savos } 1319292174Savos 1320292174Savos if (ptr != NULL) 1321292174Savos memcpy(&sc->cmdq[sc->cmdq_last].data, ptr, len); 1322292174Savos sc->cmdq[sc->cmdq_last].func = func; 1323292174Savos sc->cmdq_last = (sc->cmdq_last + 1) % URTWN_CMDQ_SIZE; 1324292174Savos URTWN_CMDQ_UNLOCK(sc); 1325292174Savos 1326292174Savos ieee80211_runtask(ic, &sc->cmdq_task); 1327292174Savos 1328292174Savos return (0); 1329292174Savos} 1330292174Savos 1331264912Skevlostatic __inline void 1332251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1333251538Srpaulo{ 1334264912Skevlo 1335264912Skevlo sc->sc_rf_write(sc, chain, addr, val); 1336264912Skevlo} 1337264912Skevlo 1338264912Skevlostatic void 1339264912Skevlourtwn_r92c_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1340264912Skevlo uint32_t val) 1341264912Skevlo{ 1342251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1343251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1344251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1345251538Srpaulo} 1346251538Srpaulo 1347264912Skevlostatic void 1348264912Skevlourtwn_r88e_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1349264912Skevlouint32_t val) 1350264912Skevlo{ 1351264912Skevlo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1352264912Skevlo SM(R88E_LSSI_PARAM_ADDR, addr) | 1353264912Skevlo SM(R92C_LSSI_PARAM_DATA, val)); 1354264912Skevlo} 1355264912Skevlo 1356251538Srpaulostatic uint32_t 1357251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1358251538Srpaulo{ 1359251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1360251538Srpaulo 1361251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1362251538Srpaulo if (chain != 0) 1363251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1364251538Srpaulo 1365251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1366251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1367266472Shselasky urtwn_ms_delay(sc); 1368251538Srpaulo 1369251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1370251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1371251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1372266472Shselasky urtwn_ms_delay(sc); 1373251538Srpaulo 1374251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1375251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1376266472Shselasky urtwn_ms_delay(sc); 1377251538Srpaulo 1378251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1379251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1380251538Srpaulo else 1381251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1382251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1383251538Srpaulo} 1384251538Srpaulo 1385251538Srpaulostatic int 1386251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1387251538Srpaulo{ 1388291698Savos usb_error_t error; 1389251538Srpaulo int ntries; 1390251538Srpaulo 1391291698Savos error = urtwn_write_4(sc, R92C_LLT_INIT, 1392251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1393251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1394251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1395291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1396291698Savos return (EIO); 1397251538Srpaulo /* Wait for write operation to complete. */ 1398251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1399251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1400251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1401251538Srpaulo return (0); 1402266472Shselasky urtwn_ms_delay(sc); 1403251538Srpaulo } 1404251538Srpaulo return (ETIMEDOUT); 1405251538Srpaulo} 1406251538Srpaulo 1407291264Savosstatic int 1408291264Savosurtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val) 1409251538Srpaulo{ 1410251538Srpaulo uint32_t reg; 1411291698Savos usb_error_t error; 1412251538Srpaulo int ntries; 1413251538Srpaulo 1414291264Savos if (sc->last_rom_addr >= URTWN_EFUSE_MAX_LEN) 1415291264Savos return (EFAULT); 1416291264Savos 1417251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1418291264Savos reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 1419251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1420291264Savos 1421291698Savos error = urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1422291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1423291698Savos return (EIO); 1424251538Srpaulo /* Wait for read operation to complete. */ 1425251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1426251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1427251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1428291264Savos break; 1429266472Shselasky urtwn_ms_delay(sc); 1430251538Srpaulo } 1431291264Savos if (ntries == 100) { 1432291264Savos device_printf(sc->sc_dev, 1433291264Savos "could not read efuse byte at address 0x%x\n", 1434291264Savos sc->last_rom_addr); 1435291264Savos return (ETIMEDOUT); 1436291264Savos } 1437291264Savos 1438291264Savos *val = MS(reg, R92C_EFUSE_CTRL_DATA); 1439291264Savos sc->last_rom_addr++; 1440291264Savos 1441291264Savos return (0); 1442251538Srpaulo} 1443251538Srpaulo 1444291264Savosstatic int 1445291264Savosurtwn_efuse_read_data(struct urtwn_softc *sc, uint8_t *rom, uint8_t off, 1446291264Savos uint8_t msk) 1447291264Savos{ 1448291264Savos uint8_t reg; 1449291264Savos int i, error; 1450291264Savos 1451291264Savos for (i = 0; i < 4; i++) { 1452291264Savos if (msk & (1 << i)) 1453291264Savos continue; 1454291264Savos error = urtwn_efuse_read_next(sc, ®); 1455291264Savos if (error != 0) 1456291264Savos return (error); 1457291264Savos DPRINTF("rom[0x%03X] == 0x%02X\n", off * 8 + i * 2, reg); 1458291264Savos rom[off * 8 + i * 2 + 0] = reg; 1459291264Savos 1460291264Savos error = urtwn_efuse_read_next(sc, ®); 1461291264Savos if (error != 0) 1462291264Savos return (error); 1463291264Savos DPRINTF("rom[0x%03X] == 0x%02X\n", off * 8 + i * 2 + 1, reg); 1464291264Savos rom[off * 8 + i * 2 + 1] = reg; 1465291264Savos } 1466291264Savos 1467291264Savos return (0); 1468291264Savos} 1469291264Savos 1470291264Savos#ifdef URTWN_DEBUG 1471251538Srpaulostatic void 1472291264Savosurtwn_dump_rom_contents(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1473251538Srpaulo{ 1474251538Srpaulo int i; 1475251538Srpaulo 1476291264Savos /* Dump ROM contents. */ 1477291264Savos device_printf(sc->sc_dev, "%s:", __func__); 1478291264Savos for (i = 0; i < size; i++) { 1479291264Savos if (i % 32 == 0) 1480291264Savos printf("\n%03X: ", i); 1481291264Savos else if (i % 4 == 0) 1482291264Savos printf(" "); 1483291264Savos 1484291264Savos printf("%02X", rom[i]); 1485291264Savos } 1486291264Savos printf("\n"); 1487291264Savos} 1488291264Savos#endif 1489291264Savos 1490291264Savosstatic int 1491291264Savosurtwn_efuse_read(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1492291264Savos{ 1493291264Savos#define URTWN_CHK(res) do { \ 1494291264Savos if ((error = res) != 0) \ 1495291264Savos goto end; \ 1496291264Savos} while(0) 1497291264Savos uint8_t msk, off, reg; 1498291264Savos int error; 1499291264Savos 1500291698Savos URTWN_CHK(urtwn_efuse_switch_power(sc)); 1501264912Skevlo 1502291264Savos /* Read full ROM image. */ 1503291264Savos sc->last_rom_addr = 0; 1504291264Savos memset(rom, 0xff, size); 1505291264Savos 1506291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1507291264Savos while (reg != 0xff) { 1508291264Savos /* check for extended header */ 1509291264Savos if ((sc->chip & URTWN_CHIP_88E) && (reg & 0x1f) == 0x0f) { 1510291264Savos off = reg >> 5; 1511291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1512291264Savos 1513291264Savos if ((reg & 0x0f) != 0x0f) 1514291264Savos off = ((reg & 0xf0) >> 1) | off; 1515291264Savos else 1516291264Savos continue; 1517291264Savos } else 1518291264Savos off = reg >> 4; 1519251538Srpaulo msk = reg & 0xf; 1520291264Savos 1521291264Savos URTWN_CHK(urtwn_efuse_read_data(sc, rom, off, msk)); 1522291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1523251538Srpaulo } 1524291264Savos 1525291264Savosend: 1526291264Savos 1527251538Srpaulo#ifdef URTWN_DEBUG 1528291264Savos if (urtwn_debug >= 2) 1529291264Savos urtwn_dump_rom_contents(sc, rom, size); 1530251538Srpaulo#endif 1531291264Savos 1532282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); 1533291264Savos 1534291264Savos if (error != 0) { 1535291264Savos device_printf(sc->sc_dev, "%s: error while reading ROM\n", 1536291264Savos __func__); 1537291264Savos } 1538291264Savos 1539291264Savos return (error); 1540291264Savos#undef URTWN_CHK 1541282623Skevlo} 1542281592Skevlo 1543291698Savosstatic int 1544264912Skevlourtwn_efuse_switch_power(struct urtwn_softc *sc) 1545264912Skevlo{ 1546291698Savos usb_error_t error; 1547264912Skevlo uint32_t reg; 1548251538Srpaulo 1549291698Savos error = urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); 1550291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1551291698Savos return (EIO); 1552281918Skevlo 1553264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1554264912Skevlo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1555291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1556264912Skevlo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1557291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1558291698Savos return (EIO); 1559264912Skevlo } 1560264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1561264912Skevlo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1562291698Savos error = urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1563264912Skevlo reg | R92C_SYS_FUNC_EN_ELDR); 1564291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1565291698Savos return (EIO); 1566264912Skevlo } 1567264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1568264912Skevlo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1569264912Skevlo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1570291698Savos error = urtwn_write_2(sc, R92C_SYS_CLKR, 1571264912Skevlo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1572291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 1573291698Savos return (EIO); 1574264912Skevlo } 1575291698Savos 1576291698Savos return (0); 1577264912Skevlo} 1578264912Skevlo 1579251538Srpaulostatic int 1580251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1581251538Srpaulo{ 1582251538Srpaulo uint32_t reg; 1583251538Srpaulo 1584264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1585264912Skevlo return (0); 1586264912Skevlo 1587251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1588251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1589251538Srpaulo return (EIO); 1590251538Srpaulo 1591251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1592251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1593251538Srpaulo /* Check if it is a castrated 8192C. */ 1594251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1595251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1596251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1597251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1598251538Srpaulo } 1599251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1600251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1601251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1602251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1603251538Srpaulo } 1604251538Srpaulo return (0); 1605251538Srpaulo} 1606251538Srpaulo 1607291264Savosstatic int 1608251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1609251538Srpaulo{ 1610291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 1611291264Savos int error; 1612251538Srpaulo 1613251538Srpaulo /* Read full ROM image. */ 1614291264Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(*rom)); 1615291264Savos if (error != 0) 1616291264Savos return (error); 1617251538Srpaulo 1618251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1619291264Savos sc->last_rom_addr = 0x1fa; 1620291264Savos error = urtwn_efuse_read_next(sc, &sc->pa_setting); 1621291264Savos if (error != 0) 1622291264Savos return (error); 1623251538Srpaulo DPRINTF("PA setting=0x%x\n", sc->pa_setting); 1624251538Srpaulo 1625251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1626251538Srpaulo 1627251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1628251538Srpaulo DPRINTF("regulatory type=%d\n", sc->regulatory); 1629287197Sglebius IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1630251538Srpaulo 1631264912Skevlo sc->sc_rf_write = urtwn_r92c_rf_write; 1632264912Skevlo sc->sc_power_on = urtwn_r92c_power_on; 1633291264Savos 1634291264Savos return (0); 1635251538Srpaulo} 1636251538Srpaulo 1637291264Savosstatic int 1638264912Skevlourtwn_r88e_read_rom(struct urtwn_softc *sc) 1639264912Skevlo{ 1640291264Savos uint8_t *rom = sc->rom.r88e_rom; 1641291264Savos uint16_t addr; 1642291264Savos int error, i; 1643264912Skevlo 1644291264Savos error = urtwn_efuse_read(sc, rom, sizeof(sc->rom.r88e_rom)); 1645291264Savos if (error != 0) 1646291264Savos return (error); 1647264912Skevlo 1648264912Skevlo addr = 0x10; 1649264912Skevlo for (i = 0; i < 6; i++) 1650291264Savos sc->cck_tx_pwr[i] = rom[addr++]; 1651264912Skevlo for (i = 0; i < 5; i++) 1652291264Savos sc->ht40_tx_pwr[i] = rom[addr++]; 1653291264Savos sc->bw20_tx_pwr_diff = (rom[addr] & 0xf0) >> 4; 1654264912Skevlo if (sc->bw20_tx_pwr_diff & 0x08) 1655264912Skevlo sc->bw20_tx_pwr_diff |= 0xf0; 1656291264Savos sc->ofdm_tx_pwr_diff = (rom[addr] & 0xf); 1657264912Skevlo if (sc->ofdm_tx_pwr_diff & 0x08) 1658264912Skevlo sc->ofdm_tx_pwr_diff |= 0xf0; 1659291264Savos sc->regulatory = MS(rom[0xc1], R92C_ROM_RF1_REGULATORY); 1660291264Savos IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, &rom[0xd7]); 1661264912Skevlo 1662264912Skevlo sc->sc_rf_write = urtwn_r88e_rf_write; 1663264912Skevlo sc->sc_power_on = urtwn_r88e_power_on; 1664291264Savos 1665291264Savos return (0); 1666264912Skevlo} 1667264912Skevlo 1668251538Srpaulo/* 1669251538Srpaulo * Initialize rate adaptation in firmware. 1670251538Srpaulo */ 1671251538Srpaulostatic int 1672251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 1673251538Srpaulo{ 1674287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1675251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1676251538Srpaulo struct ieee80211_node *ni; 1677251538Srpaulo struct ieee80211_rateset *rs; 1678251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 1679251538Srpaulo uint32_t rates, basicrates; 1680251538Srpaulo uint8_t mode; 1681251538Srpaulo int maxrate, maxbasicrate, error, i, j; 1682251538Srpaulo 1683251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1684251538Srpaulo rs = &ni->ni_rates; 1685251538Srpaulo 1686251538Srpaulo /* Get normal and basic rates mask. */ 1687251538Srpaulo rates = basicrates = 0; 1688251538Srpaulo maxrate = maxbasicrate = 0; 1689251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 1690251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 1691289758Savos for (j = 0; j < nitems(ridx2rate); j++) 1692289758Savos if ((rs->rs_rates[i] & IEEE80211_RATE_VAL) == 1693289758Savos ridx2rate[j]) 1694251538Srpaulo break; 1695289758Savos if (j == nitems(ridx2rate)) /* Unknown rate, skip. */ 1696251538Srpaulo continue; 1697251538Srpaulo rates |= 1 << j; 1698251538Srpaulo if (j > maxrate) 1699251538Srpaulo maxrate = j; 1700251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 1701251538Srpaulo basicrates |= 1 << j; 1702251538Srpaulo if (j > maxbasicrate) 1703251538Srpaulo maxbasicrate = j; 1704251538Srpaulo } 1705251538Srpaulo } 1706251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 1707251538Srpaulo mode = R92C_RAID_11B; 1708251538Srpaulo else 1709251538Srpaulo mode = R92C_RAID_11BG; 1710251538Srpaulo DPRINTF("mode=0x%x rates=0x%08x, basicrates=0x%08x\n", 1711251538Srpaulo mode, rates, basicrates); 1712251538Srpaulo 1713251538Srpaulo /* Set rates mask for group addressed frames. */ 1714251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 1715251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 1716251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1717251538Srpaulo if (error != 0) { 1718252401Srpaulo ieee80211_free_node(ni); 1719251538Srpaulo device_printf(sc->sc_dev, 1720251538Srpaulo "could not add broadcast station\n"); 1721251538Srpaulo return (error); 1722251538Srpaulo } 1723251538Srpaulo /* Set initial MRR rate. */ 1724251538Srpaulo DPRINTF("maxbasicrate=%d\n", maxbasicrate); 1725251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 1726251538Srpaulo maxbasicrate); 1727251538Srpaulo 1728251538Srpaulo /* Set rates mask for unicast frames. */ 1729251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 1730251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 1731251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1732251538Srpaulo if (error != 0) { 1733252401Srpaulo ieee80211_free_node(ni); 1734251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 1735251538Srpaulo return (error); 1736251538Srpaulo } 1737251538Srpaulo /* Set initial MRR rate. */ 1738251538Srpaulo DPRINTF("maxrate=%d\n", maxrate); 1739251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 1740251538Srpaulo maxrate); 1741251538Srpaulo 1742251538Srpaulo /* Indicate highest supported rate. */ 1743252403Srpaulo ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1744252401Srpaulo ieee80211_free_node(ni); 1745252401Srpaulo 1746251538Srpaulo return (0); 1747251538Srpaulo} 1748251538Srpaulo 1749290439Savosstatic void 1750290631Savosurtwn_init_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 1751251538Srpaulo{ 1752290631Savos struct r92c_tx_desc *txd = &uvp->bcn_desc; 1753290631Savos 1754290631Savos txd->txdw0 = htole32( 1755290631Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | R92C_TXDW0_BMCAST | 1756290631Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 1757290631Savos txd->txdw1 = htole32( 1758290631Savos SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) | 1759290631Savos SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 1760290631Savos 1761291858Savos if (sc->chip & URTWN_CHIP_88E) { 1762290631Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 1763291858Savos txd->txdseq |= htole16(R88E_TXDSEQ_HWSEQ_EN); 1764291858Savos } else { 1765290631Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 1766291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 1767291858Savos } 1768290631Savos 1769290631Savos txd->txdw4 = htole32(R92C_TXDW4_DRVRATE); 1770290631Savos txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE, URTWN_RIDX_CCK1)); 1771251538Srpaulo} 1772251538Srpaulo 1773290631Savosstatic int 1774290631Savosurtwn_setup_beacon(struct urtwn_softc *sc, struct ieee80211_node *ni) 1775290631Savos{ 1776290631Savos struct ieee80211vap *vap = ni->ni_vap; 1777290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1778290631Savos struct mbuf *m; 1779290631Savos int error; 1780290631Savos 1781290631Savos URTWN_ASSERT_LOCKED(sc); 1782290631Savos 1783290631Savos if (ni->ni_chan == IEEE80211_CHAN_ANYC) 1784290631Savos return (EINVAL); 1785290631Savos 1786290631Savos m = ieee80211_beacon_alloc(ni); 1787290631Savos if (m == NULL) { 1788290631Savos device_printf(sc->sc_dev, 1789290631Savos "%s: could not allocate beacon frame\n", __func__); 1790290631Savos return (ENOMEM); 1791290631Savos } 1792290631Savos 1793290631Savos if (uvp->bcn_mbuf != NULL) 1794290631Savos m_freem(uvp->bcn_mbuf); 1795290631Savos 1796290631Savos uvp->bcn_mbuf = m; 1797290631Savos 1798290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 1799290631Savos return (error); 1800290631Savos 1801290631Savos /* XXX bcnq stuck workaround */ 1802290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 1803290631Savos return (error); 1804290631Savos 1805290631Savos return (0); 1806290631Savos} 1807290631Savos 1808251538Srpaulostatic void 1809290631Savosurtwn_update_beacon(struct ieee80211vap *vap, int item) 1810290631Savos{ 1811290631Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1812290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1813290631Savos struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 1814290631Savos struct ieee80211_node *ni = vap->iv_bss; 1815290631Savos int mcast = 0; 1816290631Savos 1817290631Savos URTWN_LOCK(sc); 1818290631Savos if (uvp->bcn_mbuf == NULL) { 1819290631Savos uvp->bcn_mbuf = ieee80211_beacon_alloc(ni); 1820290631Savos if (uvp->bcn_mbuf == NULL) { 1821290631Savos device_printf(sc->sc_dev, 1822290631Savos "%s: could not allocate beacon frame\n", __func__); 1823290631Savos URTWN_UNLOCK(sc); 1824290631Savos return; 1825290631Savos } 1826290631Savos } 1827290631Savos URTWN_UNLOCK(sc); 1828290631Savos 1829290631Savos if (item == IEEE80211_BEACON_TIM) 1830290631Savos mcast = 1; /* XXX */ 1831290631Savos 1832290631Savos setbit(bo->bo_flags, item); 1833290631Savos ieee80211_beacon_update(ni, uvp->bcn_mbuf, mcast); 1834290631Savos 1835290631Savos URTWN_LOCK(sc); 1836290631Savos urtwn_tx_beacon(sc, uvp); 1837290631Savos URTWN_UNLOCK(sc); 1838290631Savos} 1839290631Savos 1840290631Savos/* 1841290631Savos * Push a beacon frame into the chip. Beacon will 1842290631Savos * be repeated by the chip every R92C_BCN_INTERVAL. 1843290631Savos */ 1844290631Savosstatic int 1845290631Savosurtwn_tx_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 1846290631Savos{ 1847290631Savos struct r92c_tx_desc *desc = &uvp->bcn_desc; 1848290631Savos struct urtwn_data *bf; 1849290631Savos 1850290631Savos URTWN_ASSERT_LOCKED(sc); 1851290631Savos 1852290631Savos bf = urtwn_getbuf(sc); 1853290631Savos if (bf == NULL) 1854290631Savos return (ENOMEM); 1855290631Savos 1856290631Savos memcpy(bf->buf, desc, sizeof(*desc)); 1857290631Savos urtwn_tx_start(sc, uvp->bcn_mbuf, IEEE80211_FC0_TYPE_MGT, bf); 1858290631Savos 1859290631Savos sc->sc_txtimer = 5; 1860290631Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 1861290631Savos 1862290631Savos return (0); 1863290631Savos} 1864290631Savos 1865290631Savosstatic void 1866290651Savosurtwn_tsf_task_adhoc(void *arg, int pending) 1867290651Savos{ 1868290651Savos struct ieee80211vap *vap = arg; 1869290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1870290651Savos struct ieee80211_node *ni; 1871290651Savos uint32_t reg; 1872290651Savos 1873290651Savos URTWN_LOCK(sc); 1874290651Savos ni = ieee80211_ref_node(vap->iv_bss); 1875290651Savos reg = urtwn_read_1(sc, R92C_BCN_CTRL); 1876290651Savos 1877290651Savos /* Accept beacons with the same BSSID. */ 1878290651Savos urtwn_set_rx_bssid_all(sc, 0); 1879290651Savos 1880290651Savos /* Enable synchronization. */ 1881290651Savos reg &= ~R92C_BCN_CTRL_DIS_TSF_UDT0; 1882290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 1883290651Savos 1884290651Savos /* Synchronize. */ 1885290651Savos usb_pause_mtx(&sc->sc_mtx, hz * ni->ni_intval * 5 / 1000); 1886290651Savos 1887290651Savos /* Disable synchronization. */ 1888290651Savos reg |= R92C_BCN_CTRL_DIS_TSF_UDT0; 1889290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 1890290651Savos 1891290651Savos /* Remove beacon filter. */ 1892290651Savos urtwn_set_rx_bssid_all(sc, 1); 1893290651Savos 1894290651Savos /* Enable beaconing. */ 1895290651Savos urtwn_write_1(sc, R92C_MBID_NUM, 1896290651Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 1897290651Savos reg |= R92C_BCN_CTRL_EN_BCN; 1898290651Savos 1899290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 1900290651Savos ieee80211_free_node(ni); 1901290651Savos URTWN_UNLOCK(sc); 1902290651Savos} 1903290651Savos 1904290651Savosstatic void 1905290631Savosurtwn_tsf_sync_enable(struct urtwn_softc *sc, struct ieee80211vap *vap) 1906290631Savos{ 1907290651Savos struct ieee80211com *ic = &sc->sc_ic; 1908290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1909290651Savos 1910290631Savos /* Reset TSF. */ 1911290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 1912290631Savos 1913290631Savos switch (vap->iv_opmode) { 1914290631Savos case IEEE80211_M_STA: 1915290631Savos /* Enable TSF synchronization. */ 1916290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 1917290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) & 1918290631Savos ~R92C_BCN_CTRL_DIS_TSF_UDT0); 1919290631Savos break; 1920290651Savos case IEEE80211_M_IBSS: 1921290651Savos ieee80211_runtask(ic, &uvp->tsf_task_adhoc); 1922290651Savos break; 1923290631Savos case IEEE80211_M_HOSTAP: 1924290631Savos /* Enable beaconing. */ 1925290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 1926290631Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 1927290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 1928290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 1929290631Savos break; 1930290631Savos default: 1931290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 1932290631Savos vap->iv_opmode); 1933290631Savos return; 1934290631Savos } 1935290631Savos} 1936290631Savos 1937290631Savosstatic void 1938251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 1939251538Srpaulo{ 1940251538Srpaulo uint8_t reg; 1941281069Srpaulo 1942251538Srpaulo if (led == URTWN_LED_LINK) { 1943264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 1944264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 1945264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, reg | 0x60); 1946264912Skevlo if (!on) { 1947264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0x90; 1948264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, 1949264912Skevlo reg | R92C_LEDCFG0_DIS); 1950264912Skevlo urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 1951264912Skevlo urtwn_read_1(sc, R92C_MAC_PINMUX_CFG) & 1952264912Skevlo 0xfe); 1953264912Skevlo } 1954264912Skevlo } else { 1955264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 1956264912Skevlo if (!on) 1957264912Skevlo reg |= R92C_LEDCFG0_DIS; 1958264912Skevlo urtwn_write_1(sc, R92C_LEDCFG0, reg); 1959264912Skevlo } 1960264912Skevlo sc->ledlink = on; /* Save LED state. */ 1961251538Srpaulo } 1962251538Srpaulo} 1963251538Srpaulo 1964289811Savosstatic void 1965289811Savosurtwn_set_mode(struct urtwn_softc *sc, uint8_t mode) 1966289811Savos{ 1967289811Savos uint8_t reg; 1968289811Savos 1969289811Savos reg = urtwn_read_1(sc, R92C_MSR); 1970289811Savos reg = (reg & ~R92C_MSR_MASK) | mode; 1971289811Savos urtwn_write_1(sc, R92C_MSR, reg); 1972289811Savos} 1973289811Savos 1974290651Savosstatic void 1975290651Savosurtwn_ibss_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 1976290651Savos const struct ieee80211_rx_stats *rxs, 1977290651Savos int rssi, int nf) 1978290651Savos{ 1979290651Savos struct ieee80211vap *vap = ni->ni_vap; 1980290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1981290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1982290651Savos uint64_t ni_tstamp, curr_tstamp; 1983290651Savos 1984290651Savos uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 1985290651Savos 1986290651Savos if (vap->iv_state == IEEE80211_S_RUN && 1987290651Savos (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 1988290651Savos subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 1989290651Savos ni_tstamp = le64toh(ni->ni_tstamp.tsf); 1990290651Savos#ifdef D3831 1991290651Savos URTWN_LOCK(sc); 1992290651Savos urtwn_get_tsf(sc, &curr_tstamp); 1993290651Savos URTWN_UNLOCK(sc); 1994290651Savos curr_tstamp = le64toh(curr_tstamp); 1995290651Savos 1996290651Savos if (ni_tstamp >= curr_tstamp) 1997290651Savos (void) ieee80211_ibss_merge(ni); 1998290651Savos#else 1999290651Savos (void) sc; 2000290651Savos (void) curr_tstamp; 2001290651Savos#endif 2002290651Savos } 2003290651Savos} 2004290651Savos 2005251538Srpaulostatic int 2006251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 2007251538Srpaulo{ 2008251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 2009251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 2010286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2011251538Srpaulo struct ieee80211_node *ni; 2012251538Srpaulo enum ieee80211_state ostate; 2013290631Savos uint32_t reg; 2014290631Savos uint8_t mode; 2015290631Savos int error = 0; 2016251538Srpaulo 2017251538Srpaulo ostate = vap->iv_state; 2018251538Srpaulo DPRINTF("%s -> %s\n", ieee80211_state_name[ostate], 2019251538Srpaulo ieee80211_state_name[nstate]); 2020251538Srpaulo 2021251538Srpaulo IEEE80211_UNLOCK(ic); 2022251538Srpaulo URTWN_LOCK(sc); 2023251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 2024251538Srpaulo 2025251538Srpaulo if (ostate == IEEE80211_S_RUN) { 2026251538Srpaulo /* Turn link LED off. */ 2027251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2028251538Srpaulo 2029251538Srpaulo /* Set media status to 'No Link'. */ 2030289811Savos urtwn_set_mode(sc, R92C_MSR_NOLINK); 2031251538Srpaulo 2032251538Srpaulo /* Stop Rx of data frames. */ 2033251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 2034251538Srpaulo 2035251538Srpaulo /* Disable TSF synchronization. */ 2036251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 2037290631Savos (urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN) | 2038251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 2039251538Srpaulo 2040290631Savos /* Disable beaconing. */ 2041290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 2042290631Savos urtwn_read_1(sc, R92C_MBID_NUM) & ~R92C_MBID_TXBCN_RPT0); 2043290631Savos 2044290631Savos /* Reset TSF. */ 2045290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 2046290631Savos 2047251538Srpaulo /* Reset EDCA parameters. */ 2048251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 2049251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 2050251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 2051251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 2052251538Srpaulo } 2053251538Srpaulo 2054251538Srpaulo switch (nstate) { 2055251538Srpaulo case IEEE80211_S_INIT: 2056251538Srpaulo /* Turn link LED off. */ 2057251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 2058251538Srpaulo break; 2059251538Srpaulo case IEEE80211_S_SCAN: 2060251538Srpaulo /* Pause AC Tx queues. */ 2061251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 2062251538Srpaulo urtwn_read_1(sc, R92C_TXPAUSE) | 0x0f); 2063251538Srpaulo break; 2064251538Srpaulo case IEEE80211_S_AUTH: 2065251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 2066251538Srpaulo break; 2067251538Srpaulo case IEEE80211_S_RUN: 2068251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 2069251538Srpaulo /* Turn link LED on. */ 2070251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2071251538Srpaulo break; 2072251538Srpaulo } 2073251538Srpaulo 2074251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 2075290631Savos 2076290631Savos if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || 2077290631Savos ni->ni_chan == IEEE80211_CHAN_ANYC) { 2078290631Savos device_printf(sc->sc_dev, 2079290631Savos "%s: could not move to RUN state\n", __func__); 2080290631Savos error = EINVAL; 2081290631Savos goto end_run; 2082290631Savos } 2083290631Savos 2084290631Savos switch (vap->iv_opmode) { 2085290631Savos case IEEE80211_M_STA: 2086290631Savos mode = R92C_MSR_INFRA; 2087290631Savos break; 2088290651Savos case IEEE80211_M_IBSS: 2089290651Savos mode = R92C_MSR_ADHOC; 2090290651Savos break; 2091290631Savos case IEEE80211_M_HOSTAP: 2092290631Savos mode = R92C_MSR_AP; 2093290631Savos break; 2094290631Savos default: 2095290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 2096290631Savos vap->iv_opmode); 2097290631Savos error = EINVAL; 2098290631Savos goto end_run; 2099290631Savos } 2100290631Savos 2101251538Srpaulo /* Set media status to 'Associated'. */ 2102290631Savos urtwn_set_mode(sc, mode); 2103251538Srpaulo 2104251538Srpaulo /* Set BSSID. */ 2105251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 0, LE_READ_4(&ni->ni_bssid[0])); 2106251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 4, LE_READ_2(&ni->ni_bssid[4])); 2107251538Srpaulo 2108251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 2109251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 2110251538Srpaulo else /* 802.11b/g */ 2111251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 2112251538Srpaulo 2113251538Srpaulo /* Enable Rx of data frames. */ 2114251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 2115251538Srpaulo 2116251538Srpaulo /* Flush all AC queues. */ 2117251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 2118251538Srpaulo 2119251538Srpaulo /* Set beacon interval. */ 2120251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 2121251538Srpaulo 2122251538Srpaulo /* Allow Rx from our BSSID only. */ 2123290564Savos if (ic->ic_promisc == 0) { 2124290631Savos reg = urtwn_read_4(sc, R92C_RCR); 2125290631Savos 2126290631Savos if (vap->iv_opmode != IEEE80211_M_HOSTAP) 2127290631Savos reg |= R92C_RCR_CBSSID_DATA; 2128290651Savos if (vap->iv_opmode != IEEE80211_M_IBSS) 2129290651Savos reg |= R92C_RCR_CBSSID_BCN; 2130290631Savos 2131290631Savos urtwn_write_4(sc, R92C_RCR, reg); 2132290564Savos } 2133251538Srpaulo 2134290651Savos if (vap->iv_opmode == IEEE80211_M_HOSTAP || 2135290651Savos vap->iv_opmode == IEEE80211_M_IBSS) { 2136290631Savos error = urtwn_setup_beacon(sc, ni); 2137290631Savos if (error != 0) { 2138290631Savos device_printf(sc->sc_dev, 2139290631Savos "unable to push beacon into the chip, " 2140290631Savos "error %d\n", error); 2141290631Savos goto end_run; 2142290631Savos } 2143290631Savos } 2144290631Savos 2145251538Srpaulo /* Enable TSF synchronization. */ 2146290631Savos urtwn_tsf_sync_enable(sc, vap); 2147251538Srpaulo 2148251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 2149251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 2150251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 2151251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 2152251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 2153251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 2154251538Srpaulo 2155251538Srpaulo /* Intialize rate adaptation. */ 2156292167Savos if (!(sc->chip & URTWN_CHIP_88E)) 2157264912Skevlo urtwn_ra_init(sc); 2158251538Srpaulo /* Turn link LED on. */ 2159251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 2160251538Srpaulo 2161251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 2162251538Srpaulo /* Reset temperature calibration state machine. */ 2163251538Srpaulo sc->thcal_state = 0; 2164251538Srpaulo sc->thcal_lctemp = 0; 2165290631Savos 2166290631Savosend_run: 2167251538Srpaulo ieee80211_free_node(ni); 2168251538Srpaulo break; 2169251538Srpaulo default: 2170251538Srpaulo break; 2171251538Srpaulo } 2172290631Savos 2173251538Srpaulo URTWN_UNLOCK(sc); 2174251538Srpaulo IEEE80211_LOCK(ic); 2175290631Savos return (error != 0 ? error : uvp->newstate(vap, nstate, arg)); 2176251538Srpaulo} 2177251538Srpaulo 2178251538Srpaulostatic void 2179251538Srpaulourtwn_watchdog(void *arg) 2180251538Srpaulo{ 2181251538Srpaulo struct urtwn_softc *sc = arg; 2182251538Srpaulo 2183251538Srpaulo if (sc->sc_txtimer > 0) { 2184251538Srpaulo if (--sc->sc_txtimer == 0) { 2185251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 2186287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2187251538Srpaulo return; 2188251538Srpaulo } 2189251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2190251538Srpaulo } 2191251538Srpaulo} 2192251538Srpaulo 2193251538Srpaulostatic void 2194251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 2195251538Srpaulo{ 2196251538Srpaulo int pwdb; 2197251538Srpaulo 2198251538Srpaulo /* Convert antenna signal to percentage. */ 2199251538Srpaulo if (rssi <= -100 || rssi >= 20) 2200251538Srpaulo pwdb = 0; 2201251538Srpaulo else if (rssi >= 0) 2202251538Srpaulo pwdb = 100; 2203251538Srpaulo else 2204251538Srpaulo pwdb = 100 + rssi; 2205264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2206289758Savos if (rate <= URTWN_RIDX_CCK11) { 2207264912Skevlo /* CCK gain is smaller than OFDM/MCS gain. */ 2208264912Skevlo pwdb += 6; 2209264912Skevlo if (pwdb > 100) 2210264912Skevlo pwdb = 100; 2211264912Skevlo if (pwdb <= 14) 2212264912Skevlo pwdb -= 4; 2213264912Skevlo else if (pwdb <= 26) 2214264912Skevlo pwdb -= 8; 2215264912Skevlo else if (pwdb <= 34) 2216264912Skevlo pwdb -= 6; 2217264912Skevlo else if (pwdb <= 42) 2218264912Skevlo pwdb -= 2; 2219264912Skevlo } 2220251538Srpaulo } 2221251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 2222251538Srpaulo sc->avg_pwdb = pwdb; 2223251538Srpaulo else if (sc->avg_pwdb < pwdb) 2224251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 2225251538Srpaulo else 2226251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 2227251538Srpaulo DPRINTFN(4, "PWDB=%d EMA=%d\n", pwdb, sc->avg_pwdb); 2228251538Srpaulo} 2229251538Srpaulo 2230251538Srpaulostatic int8_t 2231251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2232251538Srpaulo{ 2233251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 2234251538Srpaulo struct r92c_rx_phystat *phy; 2235251538Srpaulo struct r92c_rx_cck *cck; 2236251538Srpaulo uint8_t rpt; 2237251538Srpaulo int8_t rssi; 2238251538Srpaulo 2239289758Savos if (rate <= URTWN_RIDX_CCK11) { 2240251538Srpaulo cck = (struct r92c_rx_cck *)physt; 2241251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 2242251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 2243251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 2244251538Srpaulo } else { 2245251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 2246251538Srpaulo rssi = cck->agc_rpt & 0x3e; 2247251538Srpaulo } 2248251538Srpaulo rssi = cckoff[rpt] - rssi; 2249251538Srpaulo } else { /* OFDM/HT. */ 2250251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 2251251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2252251538Srpaulo } 2253251538Srpaulo return (rssi); 2254251538Srpaulo} 2255251538Srpaulo 2256264912Skevlostatic int8_t 2257264912Skevlourtwn_r88e_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2258264912Skevlo{ 2259264912Skevlo struct r92c_rx_phystat *phy; 2260264912Skevlo struct r88e_rx_cck *cck; 2261264912Skevlo uint8_t cck_agc_rpt, lna_idx, vga_idx; 2262264912Skevlo int8_t rssi; 2263264912Skevlo 2264264972Skevlo rssi = 0; 2265289758Savos if (rate <= URTWN_RIDX_CCK11) { 2266264912Skevlo cck = (struct r88e_rx_cck *)physt; 2267264912Skevlo cck_agc_rpt = cck->agc_rpt; 2268264912Skevlo lna_idx = (cck_agc_rpt & 0xe0) >> 5; 2269281069Srpaulo vga_idx = cck_agc_rpt & 0x1f; 2270264912Skevlo switch (lna_idx) { 2271264912Skevlo case 7: 2272264912Skevlo if (vga_idx <= 27) 2273264912Skevlo rssi = -100 + 2* (27 - vga_idx); 2274264912Skevlo else 2275264912Skevlo rssi = -100; 2276264912Skevlo break; 2277264912Skevlo case 6: 2278264912Skevlo rssi = -48 + 2 * (2 - vga_idx); 2279264912Skevlo break; 2280264912Skevlo case 5: 2281264912Skevlo rssi = -42 + 2 * (7 - vga_idx); 2282264912Skevlo break; 2283264912Skevlo case 4: 2284264912Skevlo rssi = -36 + 2 * (7 - vga_idx); 2285264912Skevlo break; 2286264912Skevlo case 3: 2287264912Skevlo rssi = -24 + 2 * (7 - vga_idx); 2288264912Skevlo break; 2289264912Skevlo case 2: 2290264912Skevlo rssi = -12 + 2 * (5 - vga_idx); 2291264912Skevlo break; 2292264912Skevlo case 1: 2293264912Skevlo rssi = 8 - (2 * vga_idx); 2294264912Skevlo break; 2295264912Skevlo case 0: 2296264912Skevlo rssi = 14 - (2 * vga_idx); 2297264912Skevlo break; 2298264912Skevlo } 2299264912Skevlo rssi += 6; 2300264912Skevlo } else { /* OFDM/HT. */ 2301264912Skevlo phy = (struct r92c_rx_phystat *)physt; 2302264912Skevlo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2303264912Skevlo } 2304264912Skevlo return (rssi); 2305264912Skevlo} 2306264912Skevlo 2307292167Savosstatic __inline uint8_t 2308292167Savosrate2ridx(uint8_t rate) 2309292167Savos{ 2310292167Savos switch (rate) { 2311292167Savos case 12: return 4; 2312292167Savos case 18: return 5; 2313292167Savos case 24: return 6; 2314292167Savos case 36: return 7; 2315292167Savos case 48: return 8; 2316292167Savos case 72: return 9; 2317292167Savos case 96: return 10; 2318292167Savos case 108: return 11; 2319292167Savos case 2: return 0; 2320292167Savos case 4: return 1; 2321292167Savos case 11: return 2; 2322292167Savos case 22: return 3; 2323292167Savos default: return 0; 2324292167Savos } 2325292167Savos} 2326292167Savos 2327251538Srpaulostatic int 2328290630Savosurtwn_tx_data(struct urtwn_softc *sc, struct ieee80211_node *ni, 2329290630Savos struct mbuf *m, struct urtwn_data *data) 2330251538Srpaulo{ 2331292167Savos const struct ieee80211_txparam *tp; 2332287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2333251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 2334292167Savos struct ieee80211_key *k = NULL; 2335292167Savos struct ieee80211_channel *chan; 2336292167Savos struct ieee80211_frame *wh; 2337251538Srpaulo struct r92c_tx_desc *txd; 2338292167Savos uint8_t macid, raid, rate, ridx, subtype, type, tid, qsel; 2339292014Savos int hasqos, ismcast; 2340251538Srpaulo 2341251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2342251538Srpaulo 2343251538Srpaulo /* 2344251538Srpaulo * Software crypto. 2345251538Srpaulo */ 2346290630Savos wh = mtod(m, struct ieee80211_frame *); 2347264912Skevlo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2348290630Savos subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2349292014Savos hasqos = IEEE80211_QOS_HAS_SEQ(wh); 2350290630Savos ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2351264912Skevlo 2352292014Savos /* Select TX ring for this frame. */ 2353292014Savos if (hasqos) { 2354292014Savos tid = ((const struct ieee80211_qosframe *)wh)->i_qos[0]; 2355292014Savos tid &= IEEE80211_QOS_TID; 2356292014Savos } else 2357292014Savos tid = 0; 2358292014Savos 2359292167Savos chan = (ni->ni_chan != IEEE80211_CHAN_ANYC) ? 2360292167Savos ni->ni_chan : ic->ic_curchan; 2361292167Savos tp = &vap->iv_txparms[ieee80211_chan2mode(chan)]; 2362292167Savos 2363292167Savos /* Choose a TX rate index. */ 2364292167Savos if (type == IEEE80211_FC0_TYPE_MGT) 2365292167Savos rate = tp->mgmtrate; 2366292167Savos else if (ismcast) 2367292167Savos rate = tp->mcastrate; 2368292167Savos else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 2369292167Savos rate = tp->ucastrate; 2370292167Savos else if (m->m_flags & M_EAPOL) 2371292167Savos rate = tp->mgmtrate; 2372292167Savos else { 2373292167Savos if (URTWN_CHIP_HAS_RATECTL(sc)) { 2374292167Savos /* XXX pass pktlen */ 2375292167Savos (void) ieee80211_ratectl_rate(ni, NULL, 0); 2376292167Savos rate = ni->ni_txrate; 2377292167Savos } else { 2378292167Savos if (ic->ic_curmode != IEEE80211_MODE_11B) 2379292167Savos rate = 108; 2380292167Savos else 2381292167Savos rate = 22; 2382292167Savos } 2383292167Savos } 2384292167Savos 2385292167Savos ridx = rate2ridx(rate); 2386292167Savos if (ic->ic_curmode != IEEE80211_MODE_11B) 2387292167Savos raid = R92C_RAID_11BG; 2388292167Savos else 2389292167Savos raid = R92C_RAID_11B; 2390292167Savos 2391260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2392290630Savos k = ieee80211_crypto_encap(ni, m); 2393251538Srpaulo if (k == NULL) { 2394251538Srpaulo device_printf(sc->sc_dev, 2395251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 2396251538Srpaulo return (ENOBUFS); 2397251538Srpaulo } 2398251538Srpaulo 2399251538Srpaulo /* in case packet header moved, reset pointer */ 2400290630Savos wh = mtod(m, struct ieee80211_frame *); 2401251538Srpaulo } 2402281069Srpaulo 2403251538Srpaulo /* Fill Tx descriptor. */ 2404251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 2405251538Srpaulo memset(txd, 0, sizeof(*txd)); 2406251538Srpaulo 2407251538Srpaulo txd->txdw0 |= htole32( 2408251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 2409251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2410290630Savos if (ismcast) 2411251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 2412290630Savos 2413290630Savos if (!ismcast) { 2414292167Savos if (sc->chip & URTWN_CHIP_88E) { 2415292167Savos struct urtwn_node *un = URTWN_NODE(ni); 2416292167Savos macid = un->id; 2417292167Savos } else 2418292167Savos macid = URTWN_MACID_BSS; 2419290630Savos 2420290630Savos if (type == IEEE80211_FC0_TYPE_DATA) { 2421292014Savos qsel = tid % URTWN_MAX_TID; 2422290630Savos 2423292167Savos if (sc->chip & URTWN_CHIP_88E) { 2424292167Savos txd->txdw2 |= htole32( 2425292167Savos R88E_TXDW2_AGGBK | 2426292167Savos R88E_TXDW2_CCX_RPT); 2427292167Savos } else 2428290630Savos txd->txdw1 |= htole32(R92C_TXDW1_AGGBK); 2429290630Savos 2430290630Savos if (ic->ic_flags & IEEE80211_F_USEPROT) { 2431290630Savos switch (ic->ic_protmode) { 2432290630Savos case IEEE80211_PROT_CTSONLY: 2433290630Savos txd->txdw4 |= htole32( 2434290630Savos R92C_TXDW4_CTS2SELF | 2435290630Savos R92C_TXDW4_HWRTSEN); 2436290630Savos break; 2437290630Savos case IEEE80211_PROT_RTSCTS: 2438290630Savos txd->txdw4 |= htole32( 2439290630Savos R92C_TXDW4_RTSEN | 2440290630Savos R92C_TXDW4_HWRTSEN); 2441290630Savos break; 2442290630Savos default: 2443290630Savos break; 2444290630Savos } 2445290630Savos } 2446290630Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 2447290630Savos URTWN_RIDX_OFDM24)); 2448290630Savos txd->txdw5 |= htole32(0x0001ff00); 2449290630Savos } else /* IEEE80211_FC0_TYPE_MGT */ 2450290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2451251538Srpaulo } else { 2452290630Savos macid = URTWN_MACID_BC; 2453290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2454290630Savos } 2455251538Srpaulo 2456290630Savos txd->txdw1 |= htole32( 2457290630Savos SM(R92C_TXDW1_QSEL, qsel) | 2458290630Savos SM(R92C_TXDW1_RAID, raid)); 2459290630Savos 2460290630Savos if (sc->chip & URTWN_CHIP_88E) 2461290630Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, macid)); 2462290630Savos else 2463290630Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, macid)); 2464290630Savos 2465290630Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 2466291858Savos /* Force this rate if needed. */ 2467292167Savos if (URTWN_CHIP_HAS_RATECTL(sc) || ismcast || 2468292167Savos (m->m_flags & M_EAPOL) || type != IEEE80211_FC0_TYPE_DATA) 2469251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 2470251538Srpaulo 2471292014Savos if (!hasqos) { 2472251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 2473291858Savos if (sc->chip & URTWN_CHIP_88E) 2474291858Savos txd->txdseq = htole16(R88E_TXDSEQ_HWSEQ_EN); 2475291858Savos else 2476291858Savos txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ_EN); 2477290630Savos } else { 2478290630Savos /* Set sequence number. */ 2479290630Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 2480290630Savos } 2481251538Srpaulo 2482251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 2483251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 2484251538Srpaulo 2485251538Srpaulo tap->wt_flags = 0; 2486290630Savos if (k != NULL) 2487290630Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2488290630Savos ieee80211_radiotap_tx(vap, m); 2489251538Srpaulo } 2490251538Srpaulo 2491290630Savos data->ni = ni; 2492251538Srpaulo 2493290630Savos urtwn_tx_start(sc, m, type, data); 2494290630Savos 2495290630Savos return (0); 2496290630Savos} 2497290630Savos 2498290630Savosstatic void 2499290630Savosurtwn_tx_start(struct urtwn_softc *sc, struct mbuf *m, uint8_t type, 2500290630Savos struct urtwn_data *data) 2501290630Savos{ 2502290630Savos struct usb_xfer *xfer; 2503290630Savos struct r92c_tx_desc *txd; 2504290630Savos uint16_t ac, sum; 2505290630Savos int i, xferlen; 2506290630Savos 2507290630Savos URTWN_ASSERT_LOCKED(sc); 2508290630Savos 2509290630Savos ac = M_WME_GETAC(m); 2510290630Savos 2511290630Savos switch (type) { 2512290630Savos case IEEE80211_FC0_TYPE_CTL: 2513290630Savos case IEEE80211_FC0_TYPE_MGT: 2514290630Savos xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 2515290630Savos break; 2516290630Savos default: 2517292014Savos xfer = sc->sc_xfer[wme2queue[ac].qid]; 2518290630Savos break; 2519290630Savos } 2520290630Savos 2521290630Savos txd = (struct r92c_tx_desc *)data->buf; 2522290630Savos txd->txdw0 |= htole32(SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len)); 2523290630Savos 2524290630Savos /* Compute Tx descriptor checksum. */ 2525290630Savos sum = 0; 2526290630Savos for (i = 0; i < sizeof(*txd) / 2; i++) 2527290630Savos sum ^= ((uint16_t *)txd)[i]; 2528290630Savos txd->txdsum = sum; /* NB: already little endian. */ 2529290630Savos 2530290630Savos xferlen = sizeof(*txd) + m->m_pkthdr.len; 2531290630Savos m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&txd[1]); 2532290630Savos 2533251538Srpaulo data->buflen = xferlen; 2534290630Savos data->m = m; 2535251538Srpaulo 2536251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 2537251538Srpaulo usbd_transfer_start(xfer); 2538251538Srpaulo} 2539251538Srpaulo 2540287197Sglebiusstatic int 2541287197Sglebiusurtwn_transmit(struct ieee80211com *ic, struct mbuf *m) 2542251538Srpaulo{ 2543287197Sglebius struct urtwn_softc *sc = ic->ic_softc; 2544287197Sglebius int error; 2545261863Srpaulo 2546261863Srpaulo URTWN_LOCK(sc); 2547287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 2548287197Sglebius URTWN_UNLOCK(sc); 2549287197Sglebius return (ENXIO); 2550287197Sglebius } 2551287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 2552287197Sglebius if (error) { 2553287197Sglebius URTWN_UNLOCK(sc); 2554287197Sglebius return (error); 2555287197Sglebius } 2556287197Sglebius urtwn_start(sc); 2557261863Srpaulo URTWN_UNLOCK(sc); 2558287197Sglebius 2559287197Sglebius return (0); 2560261863Srpaulo} 2561261863Srpaulo 2562261863Srpaulostatic void 2563287197Sglebiusurtwn_start(struct urtwn_softc *sc) 2564261863Srpaulo{ 2565251538Srpaulo struct ieee80211_node *ni; 2566251538Srpaulo struct mbuf *m; 2567251538Srpaulo struct urtwn_data *bf; 2568251538Srpaulo 2569261863Srpaulo URTWN_ASSERT_LOCKED(sc); 2570287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2571251538Srpaulo bf = urtwn_getbuf(sc); 2572251538Srpaulo if (bf == NULL) { 2573287197Sglebius mbufq_prepend(&sc->sc_snd, m); 2574251538Srpaulo break; 2575251538Srpaulo } 2576251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2577251538Srpaulo m->m_pkthdr.rcvif = NULL; 2578290630Savos if (urtwn_tx_data(sc, ni, m, bf) != 0) { 2579287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 2580287197Sglebius IFCOUNTER_OERRORS, 1); 2581251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 2582288353Sadrian m_freem(m); 2583251538Srpaulo ieee80211_free_node(ni); 2584251538Srpaulo break; 2585251538Srpaulo } 2586251538Srpaulo sc->sc_txtimer = 5; 2587251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2588251538Srpaulo } 2589251538Srpaulo} 2590251538Srpaulo 2591287197Sglebiusstatic void 2592287197Sglebiusurtwn_parent(struct ieee80211com *ic) 2593251538Srpaulo{ 2594286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2595251538Srpaulo 2596263153Skevlo URTWN_LOCK(sc); 2597287197Sglebius if (sc->sc_flags & URTWN_DETACHED) { 2598287197Sglebius URTWN_UNLOCK(sc); 2599287197Sglebius return; 2600287197Sglebius } 2601291698Savos URTWN_UNLOCK(sc); 2602291698Savos 2603287197Sglebius if (ic->ic_nrunning > 0) { 2604291698Savos if (urtwn_init(sc) != 0) { 2605291698Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 2606291698Savos if (vap != NULL) 2607291698Savos ieee80211_stop(vap); 2608291698Savos } else 2609291698Savos ieee80211_start_all(ic); 2610291698Savos } else 2611287197Sglebius urtwn_stop(sc); 2612251538Srpaulo} 2613251538Srpaulo 2614264912Skevlostatic __inline int 2615251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 2616251538Srpaulo{ 2617264912Skevlo 2618264912Skevlo return sc->sc_power_on(sc); 2619264912Skevlo} 2620264912Skevlo 2621264912Skevlostatic int 2622264912Skevlourtwn_r92c_power_on(struct urtwn_softc *sc) 2623264912Skevlo{ 2624251538Srpaulo uint32_t reg; 2625291698Savos usb_error_t error; 2626251538Srpaulo int ntries; 2627251538Srpaulo 2628251538Srpaulo /* Wait for autoload done bit. */ 2629251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2630251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 2631251538Srpaulo break; 2632266472Shselasky urtwn_ms_delay(sc); 2633251538Srpaulo } 2634251538Srpaulo if (ntries == 1000) { 2635251538Srpaulo device_printf(sc->sc_dev, 2636251538Srpaulo "timeout waiting for chip autoload\n"); 2637251538Srpaulo return (ETIMEDOUT); 2638251538Srpaulo } 2639251538Srpaulo 2640251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 2641291698Savos error = urtwn_write_1(sc, R92C_RSV_CTRL, 0); 2642291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2643291698Savos return (EIO); 2644251538Srpaulo /* Move SPS into PWM mode. */ 2645291698Savos error = urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 2646291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2647291698Savos return (EIO); 2648266472Shselasky urtwn_ms_delay(sc); 2649251538Srpaulo 2650251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 2651251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 2652291698Savos error = urtwn_write_1(sc, R92C_LDOV12D_CTRL, 2653251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 2654291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2655291698Savos return (EIO); 2656266472Shselasky urtwn_ms_delay(sc); 2657291698Savos error = urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 2658251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 2659251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 2660291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2661291698Savos return (EIO); 2662251538Srpaulo } 2663251538Srpaulo 2664251538Srpaulo /* Auto enable WLAN. */ 2665291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2666251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 2667291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2668291698Savos return (EIO); 2669251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2670262822Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 2671262822Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 2672251538Srpaulo break; 2673266472Shselasky urtwn_ms_delay(sc); 2674251538Srpaulo } 2675251538Srpaulo if (ntries == 1000) { 2676251538Srpaulo device_printf(sc->sc_dev, 2677251538Srpaulo "timeout waiting for MAC auto ON\n"); 2678251538Srpaulo return (ETIMEDOUT); 2679251538Srpaulo } 2680251538Srpaulo 2681251538Srpaulo /* Enable radio, GPIO and LED functions. */ 2682291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2683251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 2684251538Srpaulo R92C_APS_FSMCO_PDN_EN | 2685251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 2686291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2687291698Savos return (EIO); 2688251538Srpaulo /* Release RF digital isolation. */ 2689291698Savos error = urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 2690251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 2691291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2692291698Savos return (EIO); 2693251538Srpaulo 2694251538Srpaulo /* Initialize MAC. */ 2695291698Savos error = urtwn_write_1(sc, R92C_APSD_CTRL, 2696251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 2697291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2698291698Savos return (EIO); 2699251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 2700251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 2701251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 2702251538Srpaulo break; 2703266472Shselasky urtwn_ms_delay(sc); 2704251538Srpaulo } 2705251538Srpaulo if (ntries == 200) { 2706251538Srpaulo device_printf(sc->sc_dev, 2707251538Srpaulo "timeout waiting for MAC initialization\n"); 2708251538Srpaulo return (ETIMEDOUT); 2709251538Srpaulo } 2710251538Srpaulo 2711251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 2712251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 2713251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 2714251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 2715251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 2716251538Srpaulo R92C_CR_ENSEC; 2717291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 2718291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2719291698Savos return (EIO); 2720251538Srpaulo 2721291698Savos error = urtwn_write_1(sc, 0xfe10, 0x19); 2722291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2723291698Savos return (EIO); 2724251538Srpaulo return (0); 2725251538Srpaulo} 2726251538Srpaulo 2727251538Srpaulostatic int 2728264912Skevlourtwn_r88e_power_on(struct urtwn_softc *sc) 2729264912Skevlo{ 2730264912Skevlo uint32_t reg; 2731291698Savos usb_error_t error; 2732264912Skevlo int ntries; 2733264912Skevlo 2734264912Skevlo /* Wait for power ready bit. */ 2735264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 2736281918Skevlo if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST) 2737264912Skevlo break; 2738266472Shselasky urtwn_ms_delay(sc); 2739264912Skevlo } 2740264912Skevlo if (ntries == 5000) { 2741264912Skevlo device_printf(sc->sc_dev, 2742264912Skevlo "timeout waiting for chip power up\n"); 2743264912Skevlo return (ETIMEDOUT); 2744264912Skevlo } 2745264912Skevlo 2746264912Skevlo /* Reset BB. */ 2747291698Savos error = urtwn_write_1(sc, R92C_SYS_FUNC_EN, 2748264912Skevlo urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB | 2749264912Skevlo R92C_SYS_FUNC_EN_BB_GLB_RST)); 2750291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2751291698Savos return (EIO); 2752264912Skevlo 2753291698Savos error = urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 2754281918Skevlo urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 2755291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2756291698Savos return (EIO); 2757264912Skevlo 2758264912Skevlo /* Disable HWPDN. */ 2759291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2760281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN); 2761291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2762291698Savos return (EIO); 2763264912Skevlo 2764264912Skevlo /* Disable WL suspend. */ 2765291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2766281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & 2767281918Skevlo ~(R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE)); 2768291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2769291698Savos return (EIO); 2770264912Skevlo 2771291698Savos error = urtwn_write_2(sc, R92C_APS_FSMCO, 2772281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 2773291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2774291698Savos return (EIO); 2775264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 2776281918Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 2777281918Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 2778264912Skevlo break; 2779266472Shselasky urtwn_ms_delay(sc); 2780264912Skevlo } 2781264912Skevlo if (ntries == 5000) 2782264912Skevlo return (ETIMEDOUT); 2783264912Skevlo 2784264912Skevlo /* Enable LDO normal mode. */ 2785291698Savos error = urtwn_write_1(sc, R92C_LPLDO_CTRL, 2786281918Skevlo urtwn_read_1(sc, R92C_LPLDO_CTRL) & ~0x10); 2787291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2788291698Savos return (EIO); 2789264912Skevlo 2790264912Skevlo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 2791291698Savos error = urtwn_write_2(sc, R92C_CR, 0); 2792291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2793291698Savos return (EIO); 2794264912Skevlo reg = urtwn_read_2(sc, R92C_CR); 2795264912Skevlo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 2796264912Skevlo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 2797264912Skevlo R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC | R92C_CR_CALTMR_EN; 2798291698Savos error = urtwn_write_2(sc, R92C_CR, reg); 2799291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2800291698Savos return (EIO); 2801264912Skevlo 2802264912Skevlo return (0); 2803264912Skevlo} 2804264912Skevlo 2805264912Skevlostatic int 2806251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 2807251538Srpaulo{ 2808264912Skevlo int i, error, page_count, pktbuf_count; 2809251538Srpaulo 2810264912Skevlo page_count = (sc->chip & URTWN_CHIP_88E) ? 2811264912Skevlo R88E_TX_PAGE_COUNT : R92C_TX_PAGE_COUNT; 2812264912Skevlo pktbuf_count = (sc->chip & URTWN_CHIP_88E) ? 2813264912Skevlo R88E_TXPKTBUF_COUNT : R92C_TXPKTBUF_COUNT; 2814264912Skevlo 2815264912Skevlo /* Reserve pages [0; page_count]. */ 2816264912Skevlo for (i = 0; i < page_count; i++) { 2817251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 2818251538Srpaulo return (error); 2819251538Srpaulo } 2820251538Srpaulo /* NB: 0xff indicates end-of-list. */ 2821251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 2822251538Srpaulo return (error); 2823251538Srpaulo /* 2824264912Skevlo * Use pages [page_count + 1; pktbuf_count - 1] 2825251538Srpaulo * as ring buffer. 2826251538Srpaulo */ 2827264912Skevlo for (++i; i < pktbuf_count - 1; i++) { 2828251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 2829251538Srpaulo return (error); 2830251538Srpaulo } 2831251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 2832264912Skevlo error = urtwn_llt_write(sc, i, page_count + 1); 2833251538Srpaulo return (error); 2834251538Srpaulo} 2835251538Srpaulo 2836251538Srpaulostatic void 2837251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 2838251538Srpaulo{ 2839251538Srpaulo uint16_t reg; 2840251538Srpaulo int ntries; 2841251538Srpaulo 2842251538Srpaulo /* Tell 8051 to reset itself. */ 2843251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 2844251538Srpaulo 2845251538Srpaulo /* Wait until 8051 resets by itself. */ 2846251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 2847251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 2848251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 2849251538Srpaulo return; 2850266472Shselasky urtwn_ms_delay(sc); 2851251538Srpaulo } 2852251538Srpaulo /* Force 8051 reset. */ 2853251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 2854251538Srpaulo} 2855251538Srpaulo 2856264912Skevlostatic void 2857264912Skevlourtwn_r88e_fw_reset(struct urtwn_softc *sc) 2858264912Skevlo{ 2859264912Skevlo uint16_t reg; 2860264912Skevlo 2861264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 2862264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 2863264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN); 2864264912Skevlo} 2865264912Skevlo 2866251538Srpaulostatic int 2867251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 2868251538Srpaulo{ 2869251538Srpaulo uint32_t reg; 2870291698Savos usb_error_t error = USB_ERR_NORMAL_COMPLETION; 2871291698Savos int off, mlen; 2872251538Srpaulo 2873251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 2874251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 2875251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 2876251538Srpaulo 2877251538Srpaulo off = R92C_FW_START_ADDR; 2878251538Srpaulo while (len > 0) { 2879251538Srpaulo if (len > 196) 2880251538Srpaulo mlen = 196; 2881251538Srpaulo else if (len > 4) 2882251538Srpaulo mlen = 4; 2883251538Srpaulo else 2884251538Srpaulo mlen = 1; 2885251538Srpaulo /* XXX fix this deconst */ 2886281069Srpaulo error = urtwn_write_region_1(sc, off, 2887251538Srpaulo __DECONST(uint8_t *, buf), mlen); 2888291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 2889251538Srpaulo break; 2890251538Srpaulo off += mlen; 2891251538Srpaulo buf += mlen; 2892251538Srpaulo len -= mlen; 2893251538Srpaulo } 2894251538Srpaulo return (error); 2895251538Srpaulo} 2896251538Srpaulo 2897251538Srpaulostatic int 2898251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 2899251538Srpaulo{ 2900251538Srpaulo const struct firmware *fw; 2901251538Srpaulo const struct r92c_fw_hdr *hdr; 2902251538Srpaulo const char *imagename; 2903251538Srpaulo const u_char *ptr; 2904251538Srpaulo size_t len; 2905251538Srpaulo uint32_t reg; 2906251538Srpaulo int mlen, ntries, page, error; 2907251538Srpaulo 2908264864Skevlo URTWN_UNLOCK(sc); 2909251538Srpaulo /* Read firmware image from the filesystem. */ 2910264912Skevlo if (sc->chip & URTWN_CHIP_88E) 2911264912Skevlo imagename = "urtwn-rtl8188eufw"; 2912264912Skevlo else if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 2913264912Skevlo URTWN_CHIP_UMC_A_CUT) 2914251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 2915251538Srpaulo else 2916251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 2917251538Srpaulo 2918251538Srpaulo fw = firmware_get(imagename); 2919264864Skevlo URTWN_LOCK(sc); 2920251538Srpaulo if (fw == NULL) { 2921251538Srpaulo device_printf(sc->sc_dev, 2922251538Srpaulo "failed loadfirmware of file %s\n", imagename); 2923251538Srpaulo return (ENOENT); 2924251538Srpaulo } 2925251538Srpaulo 2926251538Srpaulo len = fw->datasize; 2927251538Srpaulo 2928251538Srpaulo if (len < sizeof(*hdr)) { 2929251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 2930251538Srpaulo error = EINVAL; 2931251538Srpaulo goto fail; 2932251538Srpaulo } 2933251538Srpaulo ptr = fw->data; 2934251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 2935251538Srpaulo /* Check if there is a valid FW header and skip it. */ 2936251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 2937264912Skevlo (le16toh(hdr->signature) >> 4) == 0x88e || 2938251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 2939251538Srpaulo DPRINTF("FW V%d.%d %02d-%02d %02d:%02d\n", 2940251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 2941251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 2942251538Srpaulo ptr += sizeof(*hdr); 2943251538Srpaulo len -= sizeof(*hdr); 2944251538Srpaulo } 2945251538Srpaulo 2946264912Skevlo if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) { 2947264912Skevlo if (sc->chip & URTWN_CHIP_88E) 2948264912Skevlo urtwn_r88e_fw_reset(sc); 2949264912Skevlo else 2950264912Skevlo urtwn_fw_reset(sc); 2951251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 2952251538Srpaulo } 2953264912Skevlo 2954268487Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2955268487Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 2956268487Skevlo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 2957268487Skevlo R92C_SYS_FUNC_EN_CPUEN); 2958268487Skevlo } 2959251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 2960251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 2961251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 2962251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 2963251538Srpaulo 2964263154Skevlo /* Reset the FWDL checksum. */ 2965263154Skevlo urtwn_write_1(sc, R92C_MCUFWDL, 2966263154Skevlo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 2967263154Skevlo 2968251538Srpaulo for (page = 0; len > 0; page++) { 2969251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 2970251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 2971251538Srpaulo if (error != 0) { 2972251538Srpaulo device_printf(sc->sc_dev, 2973251538Srpaulo "could not load firmware page\n"); 2974251538Srpaulo goto fail; 2975251538Srpaulo } 2976251538Srpaulo ptr += mlen; 2977251538Srpaulo len -= mlen; 2978251538Srpaulo } 2979251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 2980251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 2981251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 2982251538Srpaulo 2983251538Srpaulo /* Wait for checksum report. */ 2984251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2985251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 2986251538Srpaulo break; 2987266472Shselasky urtwn_ms_delay(sc); 2988251538Srpaulo } 2989251538Srpaulo if (ntries == 1000) { 2990251538Srpaulo device_printf(sc->sc_dev, 2991251538Srpaulo "timeout waiting for checksum report\n"); 2992251538Srpaulo error = ETIMEDOUT; 2993251538Srpaulo goto fail; 2994251538Srpaulo } 2995251538Srpaulo 2996251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 2997251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 2998251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 2999264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3000264912Skevlo urtwn_r88e_fw_reset(sc); 3001251538Srpaulo /* Wait for firmware readiness. */ 3002251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 3003251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 3004251538Srpaulo break; 3005266472Shselasky urtwn_ms_delay(sc); 3006251538Srpaulo } 3007251538Srpaulo if (ntries == 1000) { 3008251538Srpaulo device_printf(sc->sc_dev, 3009251538Srpaulo "timeout waiting for firmware readiness\n"); 3010251538Srpaulo error = ETIMEDOUT; 3011251538Srpaulo goto fail; 3012251538Srpaulo } 3013251538Srpaulofail: 3014251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 3015251538Srpaulo return (error); 3016251538Srpaulo} 3017251538Srpaulo 3018291902Skevlostatic int 3019251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 3020251538Srpaulo{ 3021291902Skevlo struct usb_endpoint *ep, *ep_end; 3022291698Savos usb_error_t usb_err; 3023291902Skevlo uint32_t reg; 3024291902Skevlo int hashq, hasnq, haslq, nqueues, ntx; 3025291902Skevlo int error, pagecount, npubqpages, nqpages, nrempages, tx_boundary; 3026281069Srpaulo 3027291695Savos /* Initialize LLT table. */ 3028291695Savos error = urtwn_llt_init(sc); 3029291695Savos if (error != 0) 3030291695Savos return (error); 3031291695Savos 3032291902Skevlo /* Determine the number of bulk-out pipes. */ 3033291902Skevlo ntx = 0; 3034291902Skevlo ep = sc->sc_udev->endpoints; 3035291902Skevlo ep_end = sc->sc_udev->endpoints + sc->sc_udev->endpoints_max; 3036291902Skevlo for (; ep != ep_end; ep++) { 3037291902Skevlo if ((ep->edesc == NULL) || 3038291902Skevlo (ep->iface_index != sc->sc_iface_index)) 3039291902Skevlo continue; 3040291902Skevlo if (UE_GET_DIR(ep->edesc->bEndpointAddress) == UE_DIR_OUT) 3041291902Skevlo ntx++; 3042291902Skevlo } 3043291902Skevlo if (ntx == 0) { 3044291902Skevlo device_printf(sc->sc_dev, 3045291902Skevlo "%d: invalid number of Tx bulk pipes\n", ntx); 3046291698Savos return (EIO); 3047291902Skevlo } 3048291695Savos 3049251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 3050291902Skevlo hashq = hasnq = haslq = nqueues = 0; 3051291902Skevlo switch (ntx) { 3052291902Skevlo case 1: hashq = 1; break; 3053291902Skevlo case 2: hashq = hasnq = 1; break; 3054291902Skevlo case 3: case 4: hashq = hasnq = haslq = 1; break; 3055291902Skevlo } 3056251538Srpaulo nqueues = hashq + hasnq + haslq; 3057251538Srpaulo if (nqueues == 0) 3058251538Srpaulo return (EIO); 3059251538Srpaulo 3060291902Skevlo npubqpages = nqpages = nrempages = pagecount = 0; 3061291902Skevlo if (sc->chip & URTWN_CHIP_88E) 3062291902Skevlo tx_boundary = R88E_TX_PAGE_BOUNDARY; 3063291902Skevlo else { 3064291902Skevlo pagecount = R92C_TX_PAGE_COUNT; 3065291902Skevlo npubqpages = R92C_PUBQ_NPAGES; 3066291902Skevlo tx_boundary = R92C_TX_PAGE_BOUNDARY; 3067291902Skevlo } 3068291902Skevlo 3069251538Srpaulo /* Set number of pages for normal priority queue. */ 3070291902Skevlo if (sc->chip & URTWN_CHIP_88E) { 3071291902Skevlo usb_err = urtwn_write_2(sc, R92C_RQPN_NPQ, 0xd); 3072291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3073291902Skevlo return (EIO); 3074291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 0x808e000d); 3075291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3076291902Skevlo return (EIO); 3077291902Skevlo } else { 3078291902Skevlo /* Get the number of pages for each queue. */ 3079291902Skevlo nqpages = (pagecount - npubqpages) / nqueues; 3080291902Skevlo /* 3081291902Skevlo * The remaining pages are assigned to the high priority 3082291902Skevlo * queue. 3083291902Skevlo */ 3084291902Skevlo nrempages = (pagecount - npubqpages) % nqueues; 3085291902Skevlo usb_err = urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 3086291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3087291902Skevlo return (EIO); 3088291902Skevlo usb_err = urtwn_write_4(sc, R92C_RQPN, 3089291902Skevlo /* Set number of pages for public queue. */ 3090291902Skevlo SM(R92C_RQPN_PUBQ, npubqpages) | 3091291902Skevlo /* Set number of pages for high priority queue. */ 3092291902Skevlo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 3093291902Skevlo /* Set number of pages for low priority queue. */ 3094291902Skevlo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 3095291902Skevlo /* Load values. */ 3096291902Skevlo R92C_RQPN_LD); 3097291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3098291902Skevlo return (EIO); 3099291902Skevlo } 3100251538Srpaulo 3101291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary); 3102291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3103291698Savos return (EIO); 3104291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary); 3105291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3106291698Savos return (EIO); 3107291902Skevlo usb_err = urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary); 3108291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3109291698Savos return (EIO); 3110291902Skevlo usb_err = urtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary); 3111291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3112291698Savos return (EIO); 3113291902Skevlo usb_err = urtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary); 3114291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3115291698Savos return (EIO); 3116251538Srpaulo 3117251538Srpaulo /* Set queue to USB pipe mapping. */ 3118251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 3119251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 3120251538Srpaulo if (nqueues == 1) { 3121251538Srpaulo if (hashq) 3122251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 3123251538Srpaulo else if (hasnq) 3124251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 3125251538Srpaulo else 3126251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 3127251538Srpaulo } else if (nqueues == 2) { 3128292056Skevlo /* 3129292056Skevlo * All 2-endpoints configs have high and normal 3130292056Skevlo * priority queues. 3131292056Skevlo */ 3132292056Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 3133251538Srpaulo } else 3134251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 3135291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 3136291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3137291698Savos return (EIO); 3138251538Srpaulo 3139251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 3140291902Skevlo usb_err = urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 3141291902Skevlo (sc->chip & URTWN_CHIP_88E) ? 0x23ff : 0x27ff); 3142291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3143291698Savos return (EIO); 3144251538Srpaulo 3145291902Skevlo /* Set Tx/Rx transfer page size. */ 3146291902Skevlo usb_err = urtwn_write_1(sc, R92C_PBP, 3147291902Skevlo SM(R92C_PBP_PSRX, R92C_PBP_128) | 3148291902Skevlo SM(R92C_PBP_PSTX, R92C_PBP_128)); 3149291902Skevlo if (usb_err != USB_ERR_NORMAL_COMPLETION) 3150264912Skevlo return (EIO); 3151264912Skevlo 3152264912Skevlo return (0); 3153264912Skevlo} 3154264912Skevlo 3155291698Savosstatic int 3156251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 3157251538Srpaulo{ 3158291698Savos usb_error_t error; 3159251538Srpaulo int i; 3160251538Srpaulo 3161251538Srpaulo /* Write MAC initialization values. */ 3162264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 3163264912Skevlo for (i = 0; i < nitems(rtl8188eu_mac); i++) { 3164291698Savos error = urtwn_write_1(sc, rtl8188eu_mac[i].reg, 3165264912Skevlo rtl8188eu_mac[i].val); 3166291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3167291698Savos return (EIO); 3168264912Skevlo } 3169264912Skevlo urtwn_write_1(sc, R92C_MAX_AGGR_NUM, 0x07); 3170264912Skevlo } else { 3171264912Skevlo for (i = 0; i < nitems(rtl8192cu_mac); i++) 3172291698Savos error = urtwn_write_1(sc, rtl8192cu_mac[i].reg, 3173264912Skevlo rtl8192cu_mac[i].val); 3174291698Savos if (error != USB_ERR_NORMAL_COMPLETION) 3175291698Savos return (EIO); 3176264912Skevlo } 3177291698Savos 3178291698Savos return (0); 3179251538Srpaulo} 3180251538Srpaulo 3181251538Srpaulostatic void 3182251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 3183251538Srpaulo{ 3184251538Srpaulo const struct urtwn_bb_prog *prog; 3185251538Srpaulo uint32_t reg; 3186264912Skevlo uint8_t crystalcap; 3187251538Srpaulo int i; 3188251538Srpaulo 3189251538Srpaulo /* Enable BB and RF. */ 3190251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 3191251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 3192251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 3193251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 3194251538Srpaulo 3195264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 3196264912Skevlo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 3197251538Srpaulo 3198251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 3199251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 3200251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 3201251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 3202251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 3203251538Srpaulo 3204264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3205264912Skevlo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 3206264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 3207264912Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 3208264912Skevlo } 3209251538Srpaulo 3210251538Srpaulo /* Select BB programming based on board type. */ 3211264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3212264912Skevlo prog = &rtl8188eu_bb_prog; 3213264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 3214251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3215251538Srpaulo prog = &rtl8188ce_bb_prog; 3216251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3217251538Srpaulo prog = &rtl8188ru_bb_prog; 3218251538Srpaulo else 3219251538Srpaulo prog = &rtl8188cu_bb_prog; 3220251538Srpaulo } else { 3221251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3222251538Srpaulo prog = &rtl8192ce_bb_prog; 3223251538Srpaulo else 3224251538Srpaulo prog = &rtl8192cu_bb_prog; 3225251538Srpaulo } 3226251538Srpaulo /* Write BB initialization values. */ 3227251538Srpaulo for (i = 0; i < prog->count; i++) { 3228251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 3229266472Shselasky urtwn_ms_delay(sc); 3230251538Srpaulo } 3231251538Srpaulo 3232251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 3233251538Srpaulo /* 8192C 1T only configuration. */ 3234251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 3235251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 3236251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 3237251538Srpaulo 3238251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 3239251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 3240251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 3241251538Srpaulo 3242251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 3243251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 3244251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 3245251538Srpaulo 3246251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 3247251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 3248251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 3249251538Srpaulo 3250251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 3251251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 3252251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 3253251538Srpaulo 3254251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 3255251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3256251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 3257251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 3258251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3259251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 3260251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 3261251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3262251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 3263251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 3264251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3265251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 3266251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 3267251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 3268251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 3269251538Srpaulo } 3270251538Srpaulo 3271251538Srpaulo /* Write AGC values. */ 3272251538Srpaulo for (i = 0; i < prog->agccount; i++) { 3273251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 3274251538Srpaulo prog->agcvals[i]); 3275266472Shselasky urtwn_ms_delay(sc); 3276251538Srpaulo } 3277251538Srpaulo 3278264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 3279264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422); 3280266472Shselasky urtwn_ms_delay(sc); 3281264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420); 3282266472Shselasky urtwn_ms_delay(sc); 3283264912Skevlo 3284291264Savos crystalcap = sc->rom.r88e_rom[0xb9]; 3285264912Skevlo if (crystalcap == 0xff) 3286264912Skevlo crystalcap = 0x20; 3287264912Skevlo crystalcap &= 0x3f; 3288264912Skevlo reg = urtwn_bb_read(sc, R92C_AFE_XTAL_CTRL); 3289264912Skevlo urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL, 3290264912Skevlo RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 3291264912Skevlo crystalcap | crystalcap << 6)); 3292264912Skevlo } else { 3293264912Skevlo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 3294264912Skevlo R92C_HSSI_PARAM2_CCK_HIPWR) 3295264912Skevlo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 3296264912Skevlo } 3297251538Srpaulo} 3298251538Srpaulo 3299289066Skevlostatic void 3300251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 3301251538Srpaulo{ 3302251538Srpaulo const struct urtwn_rf_prog *prog; 3303251538Srpaulo uint32_t reg, type; 3304251538Srpaulo int i, j, idx, off; 3305251538Srpaulo 3306251538Srpaulo /* Select RF programming based on board type. */ 3307264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3308264912Skevlo prog = rtl8188eu_rf_prog; 3309264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 3310251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3311251538Srpaulo prog = rtl8188ce_rf_prog; 3312251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3313251538Srpaulo prog = rtl8188ru_rf_prog; 3314251538Srpaulo else 3315251538Srpaulo prog = rtl8188cu_rf_prog; 3316251538Srpaulo } else 3317251538Srpaulo prog = rtl8192ce_rf_prog; 3318251538Srpaulo 3319251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3320251538Srpaulo /* Save RF_ENV control type. */ 3321251538Srpaulo idx = i / 2; 3322251538Srpaulo off = (i % 2) * 16; 3323251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 3324251538Srpaulo type = (reg >> off) & 0x10; 3325251538Srpaulo 3326251538Srpaulo /* Set RF_ENV enable. */ 3327251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 3328251538Srpaulo reg |= 0x100000; 3329251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 3330266472Shselasky urtwn_ms_delay(sc); 3331251538Srpaulo /* Set RF_ENV output high. */ 3332251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 3333251538Srpaulo reg |= 0x10; 3334251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 3335266472Shselasky urtwn_ms_delay(sc); 3336251538Srpaulo /* Set address and data lengths of RF registers. */ 3337251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 3338251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 3339251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 3340266472Shselasky urtwn_ms_delay(sc); 3341251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 3342251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 3343251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 3344266472Shselasky urtwn_ms_delay(sc); 3345251538Srpaulo 3346251538Srpaulo /* Write RF initialization values for this chain. */ 3347251538Srpaulo for (j = 0; j < prog[i].count; j++) { 3348251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 3349251538Srpaulo prog[i].regs[j] <= 0xfe) { 3350251538Srpaulo /* 3351251538Srpaulo * These are fake RF registers offsets that 3352251538Srpaulo * indicate a delay is required. 3353251538Srpaulo */ 3354266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 20); /* 50ms */ 3355251538Srpaulo continue; 3356251538Srpaulo } 3357251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 3358251538Srpaulo prog[i].vals[j]); 3359266472Shselasky urtwn_ms_delay(sc); 3360251538Srpaulo } 3361251538Srpaulo 3362251538Srpaulo /* Restore RF_ENV control type. */ 3363251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 3364251538Srpaulo reg &= ~(0x10 << off) | (type << off); 3365251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 3366251538Srpaulo 3367251538Srpaulo /* Cache RF register CHNLBW. */ 3368251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 3369251538Srpaulo } 3370251538Srpaulo 3371251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3372251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 3373251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 3374251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 3375251538Srpaulo } 3376251538Srpaulo} 3377251538Srpaulo 3378251538Srpaulostatic void 3379251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 3380251538Srpaulo{ 3381251538Srpaulo /* Invalidate all CAM entries. */ 3382251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 3383251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 3384251538Srpaulo} 3385251538Srpaulo 3386251538Srpaulostatic void 3387251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 3388251538Srpaulo{ 3389251538Srpaulo uint8_t reg; 3390251538Srpaulo int i; 3391251538Srpaulo 3392251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3393251538Srpaulo if (sc->pa_setting & (1 << i)) 3394251538Srpaulo continue; 3395251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 3396251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 3397251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 3398251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 3399251538Srpaulo } 3400251538Srpaulo if (!(sc->pa_setting & 0x10)) { 3401251538Srpaulo reg = urtwn_read_1(sc, 0x16); 3402251538Srpaulo reg = (reg & ~0xf0) | 0x90; 3403251538Srpaulo urtwn_write_1(sc, 0x16, reg); 3404251538Srpaulo } 3405251538Srpaulo} 3406251538Srpaulo 3407251538Srpaulostatic void 3408251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 3409251538Srpaulo{ 3410290564Savos struct ieee80211com *ic = &sc->sc_ic; 3411290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3412290564Savos uint32_t rcr; 3413290564Savos uint16_t filter; 3414290564Savos 3415290564Savos URTWN_ASSERT_LOCKED(sc); 3416290564Savos 3417251538Srpaulo /* Accept all multicast frames. */ 3418251538Srpaulo urtwn_write_4(sc, R92C_MAR + 0, 0xffffffff); 3419251538Srpaulo urtwn_write_4(sc, R92C_MAR + 4, 0xffffffff); 3420290564Savos 3421290564Savos /* Filter for management frames. */ 3422290564Savos filter = 0x7f3f; 3423290631Savos switch (vap->iv_opmode) { 3424290631Savos case IEEE80211_M_STA: 3425290564Savos filter &= ~( 3426290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | 3427290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | 3428290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); 3429290631Savos break; 3430290631Savos case IEEE80211_M_HOSTAP: 3431290631Savos filter &= ~( 3432290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | 3433290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP) | 3434290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_BEACON)); 3435290631Savos break; 3436290631Savos case IEEE80211_M_MONITOR: 3437290651Savos case IEEE80211_M_IBSS: 3438290631Savos break; 3439290631Savos default: 3440290631Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 3441290631Savos __func__, vap->iv_opmode); 3442290631Savos break; 3443290564Savos } 3444290564Savos urtwn_write_2(sc, R92C_RXFLTMAP0, filter); 3445290564Savos 3446251538Srpaulo /* Reject all control frames. */ 3447251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 3448290564Savos 3449290564Savos /* Reject all data frames. */ 3450290564Savos urtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); 3451290564Savos 3452290564Savos rcr = R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | 3453290564Savos R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | 3454290564Savos R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; 3455290564Savos 3456290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) { 3457290564Savos /* Accept all frames. */ 3458290564Savos rcr |= R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | 3459290564Savos R92C_RCR_AAP; 3460290564Savos } 3461290564Savos 3462290564Savos /* Set Rx filter. */ 3463290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 3464290564Savos 3465290564Savos if (ic->ic_promisc != 0) { 3466290564Savos /* Update Rx filter. */ 3467290564Savos urtwn_set_promisc(sc); 3468290564Savos } 3469251538Srpaulo} 3470251538Srpaulo 3471251538Srpaulostatic void 3472251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 3473251538Srpaulo{ 3474251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 3475251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 3476251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 3477251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 3478251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 3479251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 3480251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 3481251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 3482251538Srpaulo} 3483251538Srpaulo 3484289066Skevlostatic void 3485251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 3486251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 3487251538Srpaulo{ 3488251538Srpaulo uint32_t reg; 3489251538Srpaulo 3490251538Srpaulo /* Write per-CCK rate Tx power. */ 3491251538Srpaulo if (chain == 0) { 3492251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 3493251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 3494251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 3495251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 3496251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 3497251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 3498251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 3499251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 3500251538Srpaulo } else { 3501251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 3502251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 3503251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 3504251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 3505251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 3506251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 3507251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 3508251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 3509251538Srpaulo } 3510251538Srpaulo /* Write per-OFDM rate Tx power. */ 3511251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 3512251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 3513251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 3514251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 3515251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 3516251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 3517251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 3518251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 3519251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 3520251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 3521251538Srpaulo /* Write per-MCS Tx power. */ 3522251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 3523251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 3524251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 3525251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 3526251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 3527251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 3528251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 3529251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 3530251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 3531251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 3532251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 3533251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 3534261506Skevlo SM(R92C_TXAGC_MCS09, power[21]) | 3535251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 3536251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 3537251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 3538251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 3539251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 3540251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 3541251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 3542251538Srpaulo} 3543251538Srpaulo 3544289066Skevlostatic void 3545251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 3546251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 3547251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 3548251538Srpaulo{ 3549287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3550291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 3551251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 3552251538Srpaulo const struct urtwn_txpwr *base; 3553251538Srpaulo int ridx, chan, group; 3554251538Srpaulo 3555251538Srpaulo /* Determine channel group. */ 3556251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3557251538Srpaulo if (chan <= 3) 3558251538Srpaulo group = 0; 3559251538Srpaulo else if (chan <= 9) 3560251538Srpaulo group = 1; 3561251538Srpaulo else 3562251538Srpaulo group = 2; 3563251538Srpaulo 3564251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 3565251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 3566251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3567251538Srpaulo base = &rtl8188ru_txagc[chain]; 3568251538Srpaulo else 3569251538Srpaulo base = &rtl8192cu_txagc[chain]; 3570251538Srpaulo } else 3571251538Srpaulo base = &rtl8192cu_txagc[chain]; 3572251538Srpaulo 3573251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 3574251538Srpaulo if (sc->regulatory == 0) { 3575289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 3576251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3577251538Srpaulo } 3578289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 3579251538Srpaulo if (sc->regulatory == 3) { 3580251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3581251538Srpaulo /* Apply vendor limits. */ 3582251538Srpaulo if (extc != NULL) 3583251538Srpaulo max = rom->ht40_max_pwr[group]; 3584251538Srpaulo else 3585251538Srpaulo max = rom->ht20_max_pwr[group]; 3586251538Srpaulo max = (max >> (chain * 4)) & 0xf; 3587251538Srpaulo if (power[ridx] > max) 3588251538Srpaulo power[ridx] = max; 3589251538Srpaulo } else if (sc->regulatory == 1) { 3590251538Srpaulo if (extc == NULL) 3591251538Srpaulo power[ridx] = base->pwr[group][ridx]; 3592251538Srpaulo } else if (sc->regulatory != 2) 3593251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3594251538Srpaulo } 3595251538Srpaulo 3596251538Srpaulo /* Compute per-CCK rate Tx power. */ 3597251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 3598289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 3599251538Srpaulo power[ridx] += cckpow; 3600251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3601251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3602251538Srpaulo } 3603251538Srpaulo 3604251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 3605251538Srpaulo if (sc->ntxchains > 1) { 3606251538Srpaulo /* Apply reduction for 2 spatial streams. */ 3607251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 3608251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3609251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 3610251538Srpaulo } 3611251538Srpaulo 3612251538Srpaulo /* Compute per-OFDM rate Tx power. */ 3613251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 3614251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3615251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 3616289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 3617251538Srpaulo power[ridx] += ofdmpow; 3618251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3619251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3620251538Srpaulo } 3621251538Srpaulo 3622251538Srpaulo /* Compute per-MCS Tx power. */ 3623251538Srpaulo if (extc == NULL) { 3624251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 3625251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3626251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 3627251538Srpaulo } 3628251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 3629251538Srpaulo power[ridx] += htpow; 3630251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3631251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3632251538Srpaulo } 3633251538Srpaulo#ifdef URTWN_DEBUG 3634251538Srpaulo if (urtwn_debug >= 4) { 3635251538Srpaulo /* Dump per-rate Tx power values. */ 3636251538Srpaulo printf("Tx power for chain %d:\n", chain); 3637289758Savos for (ridx = URTWN_RIDX_CCK1; ridx < URTWN_RIDX_COUNT; ridx++) 3638251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 3639251538Srpaulo } 3640251538Srpaulo#endif 3641251538Srpaulo} 3642251538Srpaulo 3643289066Skevlostatic void 3644264912Skevlourtwn_r88e_get_txpower(struct urtwn_softc *sc, int chain, 3645264912Skevlo struct ieee80211_channel *c, struct ieee80211_channel *extc, 3646264912Skevlo uint16_t power[URTWN_RIDX_COUNT]) 3647264912Skevlo{ 3648287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3649264912Skevlo uint16_t cckpow, ofdmpow, bw20pow, htpow; 3650264912Skevlo const struct urtwn_r88e_txpwr *base; 3651264912Skevlo int ridx, chan, group; 3652264912Skevlo 3653264912Skevlo /* Determine channel group. */ 3654264912Skevlo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3655264912Skevlo if (chan <= 2) 3656264912Skevlo group = 0; 3657264912Skevlo else if (chan <= 5) 3658264912Skevlo group = 1; 3659264912Skevlo else if (chan <= 8) 3660264912Skevlo group = 2; 3661264912Skevlo else if (chan <= 11) 3662264912Skevlo group = 3; 3663264912Skevlo else if (chan <= 13) 3664264912Skevlo group = 4; 3665264912Skevlo else 3666264912Skevlo group = 5; 3667264912Skevlo 3668264912Skevlo /* Get original Tx power based on board type and RF chain. */ 3669264912Skevlo base = &rtl8188eu_txagc[chain]; 3670264912Skevlo 3671264912Skevlo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 3672264912Skevlo if (sc->regulatory == 0) { 3673289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 3674264912Skevlo power[ridx] = base->pwr[0][ridx]; 3675264912Skevlo } 3676289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 3677264912Skevlo if (sc->regulatory == 3) 3678264912Skevlo power[ridx] = base->pwr[0][ridx]; 3679264912Skevlo else if (sc->regulatory == 1) { 3680264912Skevlo if (extc == NULL) 3681264912Skevlo power[ridx] = base->pwr[group][ridx]; 3682264912Skevlo } else if (sc->regulatory != 2) 3683264912Skevlo power[ridx] = base->pwr[0][ridx]; 3684264912Skevlo } 3685264912Skevlo 3686264912Skevlo /* Compute per-CCK rate Tx power. */ 3687264912Skevlo cckpow = sc->cck_tx_pwr[group]; 3688289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 3689264912Skevlo power[ridx] += cckpow; 3690264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 3691264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 3692264912Skevlo } 3693264912Skevlo 3694264912Skevlo htpow = sc->ht40_tx_pwr[group]; 3695264912Skevlo 3696264912Skevlo /* Compute per-OFDM rate Tx power. */ 3697264912Skevlo ofdmpow = htpow + sc->ofdm_tx_pwr_diff; 3698289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 3699264912Skevlo power[ridx] += ofdmpow; 3700264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 3701264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 3702264912Skevlo } 3703264912Skevlo 3704264912Skevlo bw20pow = htpow + sc->bw20_tx_pwr_diff; 3705264912Skevlo for (ridx = 12; ridx <= 27; ridx++) { 3706264912Skevlo power[ridx] += bw20pow; 3707264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 3708264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 3709264912Skevlo } 3710264912Skevlo} 3711264912Skevlo 3712289066Skevlostatic void 3713251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 3714251538Srpaulo struct ieee80211_channel *extc) 3715251538Srpaulo{ 3716251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 3717251538Srpaulo int i; 3718251538Srpaulo 3719251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 3720251538Srpaulo /* Compute per-rate Tx power values. */ 3721264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3722264912Skevlo urtwn_r88e_get_txpower(sc, i, c, extc, power); 3723264912Skevlo else 3724264912Skevlo urtwn_get_txpower(sc, i, c, extc, power); 3725251538Srpaulo /* Write per-rate Tx power values to hardware. */ 3726251538Srpaulo urtwn_write_txpower(sc, i, power); 3727251538Srpaulo } 3728251538Srpaulo} 3729251538Srpaulo 3730251538Srpaulostatic void 3731290048Savosurtwn_set_rx_bssid_all(struct urtwn_softc *sc, int enable) 3732290048Savos{ 3733290048Savos uint32_t reg; 3734290048Savos 3735290048Savos reg = urtwn_read_4(sc, R92C_RCR); 3736290048Savos if (enable) 3737290048Savos reg &= ~R92C_RCR_CBSSID_BCN; 3738290048Savos else 3739290048Savos reg |= R92C_RCR_CBSSID_BCN; 3740290048Savos urtwn_write_4(sc, R92C_RCR, reg); 3741290048Savos} 3742290048Savos 3743290048Savosstatic void 3744290048Savosurtwn_set_gain(struct urtwn_softc *sc, uint8_t gain) 3745290048Savos{ 3746290048Savos uint32_t reg; 3747290048Savos 3748290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 3749290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 3750290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 3751290048Savos 3752290048Savos if (!(sc->chip & URTWN_CHIP_88E)) { 3753290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 3754290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 3755290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 3756290048Savos } 3757290048Savos} 3758290048Savos 3759290048Savosstatic void 3760251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 3761251538Srpaulo{ 3762290048Savos struct urtwn_softc *sc = ic->ic_softc; 3763290048Savos 3764290048Savos URTWN_LOCK(sc); 3765290048Savos /* Receive beacons / probe responses from any BSSID. */ 3766290651Savos if (ic->ic_opmode != IEEE80211_M_IBSS) 3767290651Savos urtwn_set_rx_bssid_all(sc, 1); 3768290651Savos 3769290048Savos /* Set gain for scanning. */ 3770290048Savos urtwn_set_gain(sc, 0x20); 3771290048Savos URTWN_UNLOCK(sc); 3772251538Srpaulo} 3773251538Srpaulo 3774251538Srpaulostatic void 3775251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 3776251538Srpaulo{ 3777290048Savos struct urtwn_softc *sc = ic->ic_softc; 3778290048Savos 3779290048Savos URTWN_LOCK(sc); 3780290048Savos /* Restore limitations. */ 3781290651Savos if (ic->ic_promisc == 0 && ic->ic_opmode != IEEE80211_M_IBSS) 3782290564Savos urtwn_set_rx_bssid_all(sc, 0); 3783290651Savos 3784290048Savos /* Set gain under link. */ 3785290048Savos urtwn_set_gain(sc, 0x32); 3786290048Savos URTWN_UNLOCK(sc); 3787251538Srpaulo} 3788251538Srpaulo 3789251538Srpaulostatic void 3790251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 3791251538Srpaulo{ 3792286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 3793292173Savos struct ieee80211_channel *c = ic->ic_curchan; 3794281070Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3795251538Srpaulo 3796251538Srpaulo URTWN_LOCK(sc); 3797281070Srpaulo if (vap->iv_state == IEEE80211_S_SCAN) { 3798281070Srpaulo /* Make link LED blink during scan. */ 3799281070Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 3800281070Srpaulo } 3801292173Savos urtwn_set_chan(sc, c, NULL); 3802292173Savos sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq); 3803292173Savos sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags); 3804292173Savos sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq); 3805292173Savos sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags); 3806251538Srpaulo URTWN_UNLOCK(sc); 3807251538Srpaulo} 3808251538Srpaulo 3809292014Savosstatic int 3810292014Savosurtwn_wme_update(struct ieee80211com *ic) 3811292014Savos{ 3812292014Savos const struct wmeParams *wmep = 3813292014Savos ic->ic_wme.wme_chanParams.cap_wmeParams; 3814292014Savos struct urtwn_softc *sc = ic->ic_softc; 3815292014Savos uint8_t aifs, acm, slottime; 3816292014Savos int ac; 3817292014Savos 3818292014Savos acm = 0; 3819292165Savos slottime = IEEE80211_GET_SLOTTIME(ic); 3820292014Savos 3821292014Savos URTWN_LOCK(sc); 3822292014Savos for (ac = WME_AC_BE; ac < WME_NUM_AC; ac++) { 3823292014Savos /* AIFS[AC] = AIFSN[AC] * aSlotTime + aSIFSTime. */ 3824292014Savos aifs = wmep[ac].wmep_aifsn * slottime + IEEE80211_DUR_SIFS; 3825292014Savos urtwn_write_4(sc, wme2queue[ac].reg, 3826292014Savos SM(R92C_EDCA_PARAM_TXOP, wmep[ac].wmep_txopLimit) | 3827292014Savos SM(R92C_EDCA_PARAM_ECWMIN, wmep[ac].wmep_logcwmin) | 3828292014Savos SM(R92C_EDCA_PARAM_ECWMAX, wmep[ac].wmep_logcwmax) | 3829292014Savos SM(R92C_EDCA_PARAM_AIFS, aifs)); 3830292014Savos if (ac != WME_AC_BE) 3831292014Savos acm |= wmep[ac].wmep_acm << ac; 3832292014Savos } 3833292014Savos 3834292014Savos if (acm != 0) 3835292014Savos acm |= R92C_ACMHWCTRL_EN; 3836292014Savos urtwn_write_1(sc, R92C_ACMHWCTRL, 3837292014Savos (urtwn_read_1(sc, R92C_ACMHWCTRL) & ~R92C_ACMHWCTRL_ACM_MASK) | 3838292014Savos acm); 3839292014Savos 3840292014Savos URTWN_UNLOCK(sc); 3841292014Savos 3842292014Savos return 0; 3843292014Savos} 3844292014Savos 3845251538Srpaulostatic void 3846290564Savosurtwn_set_promisc(struct urtwn_softc *sc) 3847290564Savos{ 3848290564Savos struct ieee80211com *ic = &sc->sc_ic; 3849290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3850290564Savos uint32_t rcr, mask1, mask2; 3851290564Savos 3852290564Savos URTWN_ASSERT_LOCKED(sc); 3853290564Savos 3854290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) 3855290564Savos return; 3856290564Savos 3857290564Savos mask1 = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; 3858290564Savos mask2 = R92C_RCR_APM; 3859290564Savos 3860290564Savos if (vap->iv_state == IEEE80211_S_RUN) { 3861290564Savos switch (vap->iv_opmode) { 3862290564Savos case IEEE80211_M_STA: 3863290631Savos mask2 |= R92C_RCR_CBSSID_DATA; 3864290631Savos /* FALLTHROUGH */ 3865290631Savos case IEEE80211_M_HOSTAP: 3866290631Savos mask2 |= R92C_RCR_CBSSID_BCN; 3867290564Savos break; 3868290651Savos case IEEE80211_M_IBSS: 3869290651Savos mask2 |= R92C_RCR_CBSSID_DATA; 3870290651Savos break; 3871290564Savos default: 3872290564Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 3873290564Savos __func__, vap->iv_opmode); 3874290564Savos return; 3875290564Savos } 3876290564Savos } 3877290564Savos 3878290564Savos rcr = urtwn_read_4(sc, R92C_RCR); 3879290564Savos if (ic->ic_promisc == 0) 3880290564Savos rcr = (rcr & ~mask1) | mask2; 3881290564Savos else 3882290564Savos rcr = (rcr & ~mask2) | mask1; 3883290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 3884290564Savos} 3885290564Savos 3886290564Savosstatic void 3887290564Savosurtwn_update_promisc(struct ieee80211com *ic) 3888290564Savos{ 3889290564Savos struct urtwn_softc *sc = ic->ic_softc; 3890290564Savos 3891290564Savos URTWN_LOCK(sc); 3892290564Savos if (sc->sc_flags & URTWN_RUNNING) 3893290564Savos urtwn_set_promisc(sc); 3894290564Savos URTWN_UNLOCK(sc); 3895290564Savos} 3896290564Savos 3897290564Savosstatic void 3898283540Sglebiusurtwn_update_mcast(struct ieee80211com *ic) 3899251538Srpaulo{ 3900251538Srpaulo /* XXX do nothing? */ 3901251538Srpaulo} 3902251538Srpaulo 3903292167Savosstatic struct ieee80211_node * 3904292167Savosurtwn_r88e_node_alloc(struct ieee80211vap *vap, 3905292167Savos const uint8_t mac[IEEE80211_ADDR_LEN]) 3906292167Savos{ 3907292167Savos struct urtwn_node *un; 3908292167Savos 3909292167Savos un = malloc(sizeof (struct urtwn_node), M_80211_NODE, 3910292167Savos M_NOWAIT | M_ZERO); 3911292167Savos 3912292167Savos if (un == NULL) 3913292167Savos return NULL; 3914292167Savos 3915292167Savos un->id = URTWN_MACID_UNDEFINED; 3916292167Savos 3917292167Savos return &un->ni; 3918292167Savos} 3919292167Savos 3920251538Srpaulostatic void 3921292167Savosurtwn_r88e_newassoc(struct ieee80211_node *ni, int isnew) 3922292167Savos{ 3923292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 3924292167Savos struct urtwn_node *un = URTWN_NODE(ni); 3925292167Savos uint8_t id; 3926292167Savos 3927292167Savos if (!isnew) 3928292167Savos return; 3929292167Savos 3930292167Savos URTWN_NT_LOCK(sc); 3931292167Savos for (id = 0; id <= URTWN_MACID_MAX(sc); id++) { 3932292167Savos if (id != URTWN_MACID_BC && sc->node_list[id] == NULL) { 3933292167Savos un->id = id; 3934292167Savos sc->node_list[id] = ni; 3935292167Savos break; 3936292167Savos } 3937292167Savos } 3938292167Savos URTWN_NT_UNLOCK(sc); 3939292167Savos 3940292167Savos if (id > URTWN_MACID_MAX(sc)) { 3941292167Savos device_printf(sc->sc_dev, "%s: node table is full\n", 3942292167Savos __func__); 3943292167Savos } 3944292167Savos} 3945292167Savos 3946292167Savosstatic void 3947292167Savosurtwn_r88e_node_free(struct ieee80211_node *ni) 3948292167Savos{ 3949292167Savos struct urtwn_softc *sc = ni->ni_ic->ic_softc; 3950292167Savos struct urtwn_node *un = URTWN_NODE(ni); 3951292167Savos 3952292167Savos URTWN_NT_LOCK(sc); 3953292167Savos if (un->id != URTWN_MACID_UNDEFINED) 3954292167Savos sc->node_list[un->id] = NULL; 3955292167Savos URTWN_NT_UNLOCK(sc); 3956292167Savos 3957292167Savos sc->sc_node_free(ni); 3958292167Savos} 3959292167Savos 3960292167Savosstatic void 3961251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 3962251538Srpaulo struct ieee80211_channel *extc) 3963251538Srpaulo{ 3964287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3965251538Srpaulo uint32_t reg; 3966251538Srpaulo u_int chan; 3967251538Srpaulo int i; 3968251538Srpaulo 3969251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3970251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 3971251538Srpaulo device_printf(sc->sc_dev, 3972251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 3973251538Srpaulo return; 3974251538Srpaulo } 3975251538Srpaulo 3976251538Srpaulo /* Set Tx power for this new channel. */ 3977251538Srpaulo urtwn_set_txpower(sc, c, extc); 3978251538Srpaulo 3979251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3980251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 3981251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 3982251538Srpaulo } 3983251538Srpaulo#ifndef IEEE80211_NO_HT 3984251538Srpaulo if (extc != NULL) { 3985251538Srpaulo /* Is secondary channel below or above primary? */ 3986251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 3987251538Srpaulo 3988251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 3989251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 3990251538Srpaulo 3991251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 3992251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 3993251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 3994251538Srpaulo 3995251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 3996251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 3997251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 3998251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 3999251538Srpaulo 4000251538Srpaulo /* Set CCK side band. */ 4001251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 4002251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 4003251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 4004251538Srpaulo 4005251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 4006251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 4007251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 4008251538Srpaulo 4009251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 4010251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 4011251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 4012251538Srpaulo 4013251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 4014251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 4015251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 4016251538Srpaulo 4017251538Srpaulo /* Select 40MHz bandwidth. */ 4018251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 4019251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 4020251538Srpaulo } else 4021251538Srpaulo#endif 4022251538Srpaulo { 4023251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 4024251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 4025251538Srpaulo 4026251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 4027251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 4028251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 4029251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 4030251538Srpaulo 4031264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4032264912Skevlo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 4033264912Skevlo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 4034264912Skevlo R92C_FPGA0_ANAPARAM2_CBW20); 4035264912Skevlo } 4036281069Srpaulo 4037251538Srpaulo /* Select 20MHz bandwidth. */ 4038251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 4039281069Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan | 4040264912Skevlo ((sc->chip & URTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 : 4041264912Skevlo R92C_RF_CHNLBW_BW20)); 4042251538Srpaulo } 4043251538Srpaulo} 4044251538Srpaulo 4045251538Srpaulostatic void 4046251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 4047251538Srpaulo{ 4048251538Srpaulo /* TODO */ 4049251538Srpaulo} 4050251538Srpaulo 4051251538Srpaulostatic void 4052251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 4053251538Srpaulo{ 4054251538Srpaulo uint32_t rf_ac[2]; 4055251538Srpaulo uint8_t txmode; 4056251538Srpaulo int i; 4057251538Srpaulo 4058251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 4059251538Srpaulo if ((txmode & 0x70) != 0) { 4060251538Srpaulo /* Disable all continuous Tx. */ 4061251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 4062251538Srpaulo 4063251538Srpaulo /* Set RF mode to standby mode. */ 4064251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 4065251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 4066251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 4067251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 4068251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 4069251538Srpaulo } 4070251538Srpaulo } else { 4071251538Srpaulo /* Block all Tx queues. */ 4072251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0xff); 4073251538Srpaulo } 4074251538Srpaulo /* Start calibration. */ 4075251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 4076251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 4077251538Srpaulo 4078251538Srpaulo /* Give calibration the time to complete. */ 4079266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 10); /* 100ms */ 4080251538Srpaulo 4081251538Srpaulo /* Restore configuration. */ 4082251538Srpaulo if ((txmode & 0x70) != 0) { 4083251538Srpaulo /* Restore Tx mode. */ 4084251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 4085251538Srpaulo /* Restore RF mode. */ 4086251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 4087251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 4088251538Srpaulo } else { 4089251538Srpaulo /* Unblock all Tx queues. */ 4090251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 4091251538Srpaulo } 4092251538Srpaulo} 4093251538Srpaulo 4094291698Savosstatic int 4095287197Sglebiusurtwn_init(struct urtwn_softc *sc) 4096251538Srpaulo{ 4097287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 4098287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 4099287197Sglebius uint8_t macaddr[IEEE80211_ADDR_LEN]; 4100251538Srpaulo uint32_t reg; 4101291698Savos usb_error_t usb_err = USB_ERR_NORMAL_COMPLETION; 4102251538Srpaulo int error; 4103251538Srpaulo 4104291698Savos URTWN_LOCK(sc); 4105291698Savos if (sc->sc_flags & URTWN_RUNNING) { 4106291698Savos URTWN_UNLOCK(sc); 4107291698Savos return (0); 4108291698Savos } 4109264864Skevlo 4110251538Srpaulo /* Init firmware commands ring. */ 4111251538Srpaulo sc->fwcur = 0; 4112251538Srpaulo 4113251538Srpaulo /* Allocate Tx/Rx buffers. */ 4114251538Srpaulo error = urtwn_alloc_rx_list(sc); 4115251538Srpaulo if (error != 0) 4116251538Srpaulo goto fail; 4117281069Srpaulo 4118251538Srpaulo error = urtwn_alloc_tx_list(sc); 4119251538Srpaulo if (error != 0) 4120251538Srpaulo goto fail; 4121251538Srpaulo 4122251538Srpaulo /* Power on adapter. */ 4123251538Srpaulo error = urtwn_power_on(sc); 4124251538Srpaulo if (error != 0) 4125251538Srpaulo goto fail; 4126251538Srpaulo 4127251538Srpaulo /* Initialize DMA. */ 4128251538Srpaulo error = urtwn_dma_init(sc); 4129251538Srpaulo if (error != 0) 4130251538Srpaulo goto fail; 4131251538Srpaulo 4132251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 4133251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 4134251538Srpaulo 4135251538Srpaulo /* Init interrupts. */ 4136264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4137291698Savos usb_err = urtwn_write_4(sc, R88E_HISR, 0xffffffff); 4138291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4139291698Savos goto fail; 4140291698Savos usb_err = urtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | 4141264912Skevlo R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); 4142291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4143291698Savos goto fail; 4144291698Savos usb_err = urtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | 4145264912Skevlo R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); 4146291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4147291698Savos goto fail; 4148291698Savos usb_err = urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 4149264912Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 4150264912Skevlo R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); 4151291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4152291698Savos goto fail; 4153264912Skevlo } else { 4154291698Savos usb_err = urtwn_write_4(sc, R92C_HISR, 0xffffffff); 4155291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4156291698Savos goto fail; 4157291698Savos usb_err = urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 4158291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4159291698Savos goto fail; 4160264912Skevlo } 4161251538Srpaulo 4162251538Srpaulo /* Set MAC address. */ 4163287197Sglebius IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 4164291698Savos usb_err = urtwn_write_region_1(sc, R92C_MACID, macaddr, IEEE80211_ADDR_LEN); 4165291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4166291698Savos goto fail; 4167251538Srpaulo 4168251538Srpaulo /* Set initial network type. */ 4169289811Savos urtwn_set_mode(sc, R92C_MSR_INFRA); 4170251538Srpaulo 4171290564Savos /* Initialize Rx filter. */ 4172251538Srpaulo urtwn_rxfilter_init(sc); 4173251538Srpaulo 4174282623Skevlo /* Set response rate. */ 4175251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 4176251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 4177251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 4178251538Srpaulo 4179251538Srpaulo /* Set short/long retry limits. */ 4180251538Srpaulo urtwn_write_2(sc, R92C_RL, 4181251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 4182251538Srpaulo 4183251538Srpaulo /* Initialize EDCA parameters. */ 4184251538Srpaulo urtwn_edca_init(sc); 4185251538Srpaulo 4186251538Srpaulo /* Setup rate fallback. */ 4187264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4188264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 4189264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 4190264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 4191264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 4192264912Skevlo } 4193251538Srpaulo 4194251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 4195251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 4196251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 4197251538Srpaulo /* Set ACK timeout. */ 4198251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 4199251538Srpaulo 4200251538Srpaulo /* Setup USB aggregation. */ 4201251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 4202251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 4203251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 4204251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 4205251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 4206251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 4207251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 4208264912Skevlo if (sc->chip & URTWN_CHIP_88E) 4209264912Skevlo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); 4210282266Skevlo else { 4211264912Skevlo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 4212282266Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 4213282266Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 4214282266Skevlo R92C_USB_SPECIAL_OPTION_AGG_EN); 4215282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 4216282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 4217282266Skevlo } 4218251538Srpaulo 4219251538Srpaulo /* Initialize beacon parameters. */ 4220264912Skevlo urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010); 4221251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 4222251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 4223251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 4224251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 4225251538Srpaulo 4226264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4227264912Skevlo /* Setup AMPDU aggregation. */ 4228264912Skevlo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 4229264912Skevlo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 4230264912Skevlo urtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); 4231251538Srpaulo 4232264912Skevlo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 4233264912Skevlo } 4234251538Srpaulo 4235251538Srpaulo /* Load 8051 microcode. */ 4236251538Srpaulo error = urtwn_load_firmware(sc); 4237251538Srpaulo if (error != 0) 4238251538Srpaulo goto fail; 4239251538Srpaulo 4240251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 4241291698Savos error = urtwn_mac_init(sc); 4242291698Savos if (error != 0) { 4243291698Savos device_printf(sc->sc_dev, 4244291698Savos "%s: error while initializing MAC block\n", __func__); 4245291698Savos goto fail; 4246291698Savos } 4247251538Srpaulo urtwn_bb_init(sc); 4248251538Srpaulo urtwn_rf_init(sc); 4249251538Srpaulo 4250290564Savos /* Reinitialize Rx filter (D3845 is not committed yet). */ 4251290564Savos urtwn_rxfilter_init(sc); 4252290564Savos 4253264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 4254264912Skevlo urtwn_write_2(sc, R92C_CR, 4255264912Skevlo urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN | 4256264912Skevlo R92C_CR_MACRXEN); 4257264912Skevlo } 4258264912Skevlo 4259251538Srpaulo /* Turn CCK and OFDM blocks on. */ 4260251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 4261251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 4262291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 4263291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4264291698Savos goto fail; 4265251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 4266251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 4267291698Savos usb_err = urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 4268291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4269291698Savos goto fail; 4270251538Srpaulo 4271251538Srpaulo /* Clear per-station keys table. */ 4272251538Srpaulo urtwn_cam_init(sc); 4273251538Srpaulo 4274251538Srpaulo /* Enable hardware sequence numbering. */ 4275251538Srpaulo urtwn_write_1(sc, R92C_HWSEQ_CTRL, 0xff); 4276251538Srpaulo 4277292167Savos /* Enable per-packet TX report. */ 4278292167Savos if (sc->chip & URTWN_CHIP_88E) { 4279292167Savos urtwn_write_1(sc, R88E_TX_RPT_CTRL, 4280292167Savos urtwn_read_1(sc, R88E_TX_RPT_CTRL) | R88E_TX_RPT1_ENA); 4281292167Savos } 4282292167Savos 4283251538Srpaulo /* Perform LO and IQ calibrations. */ 4284251538Srpaulo urtwn_iq_calib(sc); 4285251538Srpaulo /* Perform LC calibration. */ 4286251538Srpaulo urtwn_lc_calib(sc); 4287251538Srpaulo 4288251538Srpaulo /* Fix USB interference issue. */ 4289264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 4290264912Skevlo urtwn_write_1(sc, 0xfe40, 0xe0); 4291264912Skevlo urtwn_write_1(sc, 0xfe41, 0x8d); 4292264912Skevlo urtwn_write_1(sc, 0xfe42, 0x80); 4293251538Srpaulo 4294264912Skevlo urtwn_pa_bias_init(sc); 4295264912Skevlo } 4296251538Srpaulo 4297251538Srpaulo /* Initialize GPIO setting. */ 4298251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 4299251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 4300251538Srpaulo 4301251538Srpaulo /* Fix for lower temperature. */ 4302264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 4303264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 4304251538Srpaulo 4305251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 4306251538Srpaulo 4307287197Sglebius sc->sc_flags |= URTWN_RUNNING; 4308251538Srpaulo 4309251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 4310251538Srpaulofail: 4311291698Savos if (usb_err != USB_ERR_NORMAL_COMPLETION) 4312291698Savos error = EIO; 4313291698Savos 4314291698Savos URTWN_UNLOCK(sc); 4315291698Savos 4316291698Savos return (error); 4317251538Srpaulo} 4318251538Srpaulo 4319251538Srpaulostatic void 4320287197Sglebiusurtwn_stop(struct urtwn_softc *sc) 4321251538Srpaulo{ 4322251538Srpaulo 4323291698Savos URTWN_LOCK(sc); 4324291698Savos if (!(sc->sc_flags & URTWN_RUNNING)) { 4325291698Savos URTWN_UNLOCK(sc); 4326291698Savos return; 4327291698Savos } 4328291698Savos 4329287197Sglebius sc->sc_flags &= ~URTWN_RUNNING; 4330251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 4331251538Srpaulo urtwn_abort_xfers(sc); 4332288353Sadrian 4333288353Sadrian urtwn_drain_mbufq(sc); 4334291698Savos URTWN_UNLOCK(sc); 4335251538Srpaulo} 4336251538Srpaulo 4337251538Srpaulostatic void 4338251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 4339251538Srpaulo{ 4340251538Srpaulo int i; 4341251538Srpaulo 4342251538Srpaulo URTWN_ASSERT_LOCKED(sc); 4343251538Srpaulo 4344251538Srpaulo /* abort any pending transfers */ 4345251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 4346251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 4347251538Srpaulo} 4348251538Srpaulo 4349251538Srpaulostatic int 4350251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 4351251538Srpaulo const struct ieee80211_bpf_params *params) 4352251538Srpaulo{ 4353251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 4354286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 4355251538Srpaulo struct urtwn_data *bf; 4356290630Savos int error; 4357251538Srpaulo 4358251538Srpaulo /* prevent management frames from being sent if we're not ready */ 4359290630Savos URTWN_LOCK(sc); 4360287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) { 4361290630Savos error = ENETDOWN; 4362290630Savos goto end; 4363251538Srpaulo } 4364290630Savos 4365251538Srpaulo bf = urtwn_getbuf(sc); 4366251538Srpaulo if (bf == NULL) { 4367290630Savos error = ENOBUFS; 4368290630Savos goto end; 4369251538Srpaulo } 4370251538Srpaulo 4371290630Savos if ((error = urtwn_tx_data(sc, ni, m, bf)) != 0) { 4372251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 4373290630Savos goto end; 4374251538Srpaulo } 4375290630Savos 4376288353Sadrian sc->sc_txtimer = 5; 4377290630Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 4378290630Savos 4379290630Savosend: 4380290630Savos if (error != 0) 4381290630Savos m_freem(m); 4382290630Savos 4383251538Srpaulo URTWN_UNLOCK(sc); 4384251538Srpaulo 4385290630Savos return (error); 4386251538Srpaulo} 4387251538Srpaulo 4388266472Shselaskystatic void 4389266472Shselaskyurtwn_ms_delay(struct urtwn_softc *sc) 4390266472Shselasky{ 4391266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 1000); 4392266472Shselasky} 4393266472Shselasky 4394251538Srpaulostatic device_method_t urtwn_methods[] = { 4395251538Srpaulo /* Device interface */ 4396251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 4397251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 4398251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 4399251538Srpaulo 4400264912Skevlo DEVMETHOD_END 4401251538Srpaulo}; 4402251538Srpaulo 4403251538Srpaulostatic driver_t urtwn_driver = { 4404251538Srpaulo "urtwn", 4405251538Srpaulo urtwn_methods, 4406251538Srpaulo sizeof(struct urtwn_softc) 4407251538Srpaulo}; 4408251538Srpaulo 4409251538Srpaulostatic devclass_t urtwn_devclass; 4410251538Srpaulo 4411251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 4412251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 4413251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 4414251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 4415251538SrpauloMODULE_VERSION(urtwn, 1); 4416292080SimpUSB_PNP_HOST_INFO(urtwn_devs); 4417