if_urtwn.c revision 291695
1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5264912Skevlo * Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org> 6251538Srpaulo * 7251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 8251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 9251538Srpaulo * copyright notice and this permission notice appear in all copies. 10251538Srpaulo * 11251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18251538Srpaulo */ 19251538Srpaulo 20251538Srpaulo#include <sys/cdefs.h> 21251538Srpaulo__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtwn.c 291695 2015-12-03 14:17:28Z avos $"); 22251538Srpaulo 23251538Srpaulo/* 24264912Skevlo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188EU/RTL8188RU/RTL8192CU. 25251538Srpaulo */ 26251538Srpaulo 27288353Sadrian#include "opt_wlan.h" 28288353Sadrian 29251538Srpaulo#include <sys/param.h> 30251538Srpaulo#include <sys/sockio.h> 31251538Srpaulo#include <sys/sysctl.h> 32251538Srpaulo#include <sys/lock.h> 33251538Srpaulo#include <sys/mutex.h> 34251538Srpaulo#include <sys/mbuf.h> 35251538Srpaulo#include <sys/kernel.h> 36251538Srpaulo#include <sys/socket.h> 37251538Srpaulo#include <sys/systm.h> 38251538Srpaulo#include <sys/malloc.h> 39251538Srpaulo#include <sys/module.h> 40251538Srpaulo#include <sys/bus.h> 41251538Srpaulo#include <sys/endian.h> 42251538Srpaulo#include <sys/linker.h> 43251538Srpaulo#include <sys/firmware.h> 44251538Srpaulo#include <sys/kdb.h> 45251538Srpaulo 46251538Srpaulo#include <machine/bus.h> 47251538Srpaulo#include <machine/resource.h> 48251538Srpaulo#include <sys/rman.h> 49251538Srpaulo 50251538Srpaulo#include <net/bpf.h> 51251538Srpaulo#include <net/if.h> 52257176Sglebius#include <net/if_var.h> 53251538Srpaulo#include <net/if_arp.h> 54251538Srpaulo#include <net/ethernet.h> 55251538Srpaulo#include <net/if_dl.h> 56251538Srpaulo#include <net/if_media.h> 57251538Srpaulo#include <net/if_types.h> 58251538Srpaulo 59251538Srpaulo#include <netinet/in.h> 60251538Srpaulo#include <netinet/in_systm.h> 61251538Srpaulo#include <netinet/in_var.h> 62251538Srpaulo#include <netinet/if_ether.h> 63251538Srpaulo#include <netinet/ip.h> 64251538Srpaulo 65251538Srpaulo#include <net80211/ieee80211_var.h> 66288088Sadrian#include <net80211/ieee80211_input.h> 67251538Srpaulo#include <net80211/ieee80211_regdomain.h> 68251538Srpaulo#include <net80211/ieee80211_radiotap.h> 69251538Srpaulo#include <net80211/ieee80211_ratectl.h> 70251538Srpaulo 71251538Srpaulo#include <dev/usb/usb.h> 72251538Srpaulo#include <dev/usb/usbdi.h> 73251538Srpaulo#include "usbdevs.h" 74251538Srpaulo 75251538Srpaulo#define USB_DEBUG_VAR urtwn_debug 76251538Srpaulo#include <dev/usb/usb_debug.h> 77251538Srpaulo 78251538Srpaulo#include <dev/usb/wlan/if_urtwnreg.h> 79289167Sadrian#include <dev/usb/wlan/if_urtwnvar.h> 80251538Srpaulo 81251538Srpaulo#ifdef USB_DEBUG 82251538Srpaulostatic int urtwn_debug = 0; 83251538Srpaulo 84251538SrpauloSYSCTL_NODE(_hw_usb, OID_AUTO, urtwn, CTLFLAG_RW, 0, "USB urtwn"); 85276701ShselaskySYSCTL_INT(_hw_usb_urtwn, OID_AUTO, debug, CTLFLAG_RWTUN, &urtwn_debug, 0, 86251538Srpaulo "Debug level"); 87251538Srpaulo#endif 88251538Srpaulo 89288088Sadrian#define IEEE80211_HAS_ADDR4(wh) IEEE80211_IS_DSTODS(wh) 90251538Srpaulo 91251538Srpaulo/* various supported device vendors/products */ 92251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 93251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 94264912Skevlo#define URTWN_RTL8188E_DEV(v,p) \ 95264912Skevlo { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTWN_RTL8188E) } 96264912Skevlo#define URTWN_RTL8188E 1 97251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 98251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 99251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 100251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 101266721Skevlo URTWN_DEV(ASUS, USBN10NANO), 102251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 103251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 104251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 105251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 106251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 107251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 108251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 109251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 110251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 111251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 112251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 113251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 114251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 115251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 116251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 117251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 118252196Skevlo URTWN_DEV(DLINK, DWA131B), 119251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 120251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 121251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 122251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 123251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 124251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 125251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 126251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 127251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 128251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 129251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 130251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 131251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 132251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 133251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 134251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 135251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 136251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 137251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 138251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 139251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 140251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 141251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 142282119Skevlo URTWN_DEV(REALTEK, RTL8188CU_3), 143251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 144251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 145251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 146251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 147272410Shselasky URTWN_DEV(REALTEK, RTL8188RU_3), 148251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 149251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 150251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 151251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 152251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 153251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 154251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 155251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 156251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 157264912Skevlo /* URTWN_RTL8188E */ 158273589Skevlo URTWN_RTL8188E_DEV(DLINK, DWA123D1), 159270191Skevlo URTWN_RTL8188E_DEV(DLINK, DWA125D1), 160273589Skevlo URTWN_RTL8188E_DEV(ELECOM, WDC150SU2M), 161264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188ETV), 162264912Skevlo URTWN_RTL8188E_DEV(REALTEK, RTL8188EU), 163264912Skevlo#undef URTWN_RTL8188E_DEV 164251538Srpaulo#undef URTWN_DEV 165251538Srpaulo}; 166251538Srpaulo 167251538Srpaulostatic device_probe_t urtwn_match; 168251538Srpaulostatic device_attach_t urtwn_attach; 169251538Srpaulostatic device_detach_t urtwn_detach; 170251538Srpaulo 171251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 172251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 173251538Srpaulo 174288353Sadrianstatic void urtwn_drain_mbufq(struct urtwn_softc *sc); 175287197Sglebiusstatic usb_error_t urtwn_do_request(struct urtwn_softc *, 176287197Sglebius struct usb_device_request *, void *); 177251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 178251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 179251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 180251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 181251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 182281069Srpaulostatic struct mbuf * urtwn_rx_frame(struct urtwn_softc *, uint8_t *, int, 183251538Srpaulo int *); 184281069Srpaulostatic struct mbuf * urtwn_rxeof(struct usb_xfer *, struct urtwn_data *, 185251538Srpaulo int *, int8_t *); 186289891Savosstatic void urtwn_txeof(struct urtwn_softc *, struct urtwn_data *, 187289891Savos int); 188281069Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 189251538Srpaulo struct urtwn_data[], int, int); 190251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 191251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 192251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 193251538Srpaulo struct urtwn_data data[], int); 194289066Skevlostatic void urtwn_free_rx_list(struct urtwn_softc *); 195289066Skevlostatic void urtwn_free_tx_list(struct urtwn_softc *); 196251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 197251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 198281069Srpaulostatic int urtwn_write_region_1(struct urtwn_softc *, uint16_t, 199251538Srpaulo uint8_t *, int); 200251538Srpaulostatic void urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 201251538Srpaulostatic void urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 202251538Srpaulostatic void urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 203281069Srpaulostatic int urtwn_read_region_1(struct urtwn_softc *, uint16_t, 204251538Srpaulo uint8_t *, int); 205251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 206251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 207251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 208281069Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 209251538Srpaulo const void *, int); 210264912Skevlostatic void urtwn_r92c_rf_write(struct urtwn_softc *, int, 211264912Skevlo uint8_t, uint32_t); 212281069Srpaulostatic void urtwn_r88e_rf_write(struct urtwn_softc *, int, 213264912Skevlo uint8_t, uint32_t); 214251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 215281069Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 216251538Srpaulo uint32_t); 217291264Savosstatic int urtwn_efuse_read_next(struct urtwn_softc *, uint8_t *); 218291264Savosstatic int urtwn_efuse_read_data(struct urtwn_softc *, uint8_t *, 219291264Savos uint8_t, uint8_t); 220291264Savos#ifdef URTWN_DEBUG 221291264Savosstatic void urtwn_dump_rom_contents(struct urtwn_softc *, 222291264Savos uint8_t *, uint16_t); 223291264Savos#endif 224291264Savosstatic int urtwn_efuse_read(struct urtwn_softc *, uint8_t *, 225291264Savos uint16_t); 226264912Skevlostatic void urtwn_efuse_switch_power(struct urtwn_softc *); 227251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 228291264Savosstatic int urtwn_read_rom(struct urtwn_softc *); 229291264Savosstatic int urtwn_r88e_read_rom(struct urtwn_softc *); 230251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 231290631Savosstatic void urtwn_init_beacon(struct urtwn_softc *, 232290631Savos struct urtwn_vap *); 233290631Savosstatic int urtwn_setup_beacon(struct urtwn_softc *, 234290631Savos struct ieee80211_node *); 235290631Savosstatic void urtwn_update_beacon(struct ieee80211vap *, int); 236290631Savosstatic int urtwn_tx_beacon(struct urtwn_softc *sc, 237290631Savos struct urtwn_vap *); 238290651Savosstatic void urtwn_tsf_task_adhoc(void *, int); 239290631Savosstatic void urtwn_tsf_sync_enable(struct urtwn_softc *, 240290631Savos struct ieee80211vap *); 241251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 242289811Savosstatic void urtwn_set_mode(struct urtwn_softc *, uint8_t); 243290651Savosstatic void urtwn_ibss_recv_mgmt(struct ieee80211_node *, 244290651Savos struct mbuf *, int, 245290651Savos const struct ieee80211_rx_stats *, int, int); 246281069Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 247251538Srpaulo enum ieee80211_state, int); 248251538Srpaulostatic void urtwn_watchdog(void *); 249251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 250251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 251264912Skevlostatic int8_t urtwn_r88e_get_rssi(struct urtwn_softc *, int, void *); 252290630Savosstatic int urtwn_tx_data(struct urtwn_softc *, 253251538Srpaulo struct ieee80211_node *, struct mbuf *, 254251538Srpaulo struct urtwn_data *); 255290630Savosstatic void urtwn_tx_start(struct urtwn_softc *, struct mbuf *, 256290630Savos uint8_t, struct urtwn_data *); 257287197Sglebiusstatic int urtwn_transmit(struct ieee80211com *, struct mbuf *); 258287197Sglebiusstatic void urtwn_start(struct urtwn_softc *); 259287197Sglebiusstatic void urtwn_parent(struct ieee80211com *); 260264912Skevlostatic int urtwn_r92c_power_on(struct urtwn_softc *); 261264912Skevlostatic int urtwn_r88e_power_on(struct urtwn_softc *); 262251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 263251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 264264912Skevlostatic void urtwn_r88e_fw_reset(struct urtwn_softc *); 265281069Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 266251538Srpaulo const uint8_t *, int); 267251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 268264912Skevlostatic int urtwn_r92c_dma_init(struct urtwn_softc *); 269264912Skevlostatic int urtwn_r88e_dma_init(struct urtwn_softc *); 270251538Srpaulostatic void urtwn_mac_init(struct urtwn_softc *); 271251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 272251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 273251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 274251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 275251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 276251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 277281069Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 278251538Srpaulo uint16_t[]); 279251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 280281069Srpaulo struct ieee80211_channel *, 281251538Srpaulo struct ieee80211_channel *, uint16_t[]); 282264912Skevlostatic void urtwn_r88e_get_txpower(struct urtwn_softc *, int, 283281069Srpaulo struct ieee80211_channel *, 284264912Skevlo struct ieee80211_channel *, uint16_t[]); 285251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 286281069Srpaulo struct ieee80211_channel *, 287251538Srpaulo struct ieee80211_channel *); 288290048Savosstatic void urtwn_set_rx_bssid_all(struct urtwn_softc *, int); 289290048Savosstatic void urtwn_set_gain(struct urtwn_softc *, uint8_t); 290251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 291251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 292251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 293290564Savosstatic void urtwn_set_promisc(struct urtwn_softc *); 294290564Savosstatic void urtwn_update_promisc(struct ieee80211com *); 295289066Skevlostatic void urtwn_update_mcast(struct ieee80211com *); 296251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 297281069Srpaulo struct ieee80211_channel *, 298251538Srpaulo struct ieee80211_channel *); 299251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 300251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 301287197Sglebiusstatic void urtwn_init(struct urtwn_softc *); 302287197Sglebiusstatic void urtwn_stop(struct urtwn_softc *); 303251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 304251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 305251538Srpaulo const struct ieee80211_bpf_params *); 306266472Shselaskystatic void urtwn_ms_delay(struct urtwn_softc *); 307251538Srpaulo 308251538Srpaulo/* Aliases. */ 309251538Srpaulo#define urtwn_bb_write urtwn_write_4 310251538Srpaulo#define urtwn_bb_read urtwn_read_4 311251538Srpaulo 312251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 313251538Srpaulo [URTWN_BULK_RX] = { 314251538Srpaulo .type = UE_BULK, 315251538Srpaulo .endpoint = UE_ADDR_ANY, 316251538Srpaulo .direction = UE_DIR_IN, 317251538Srpaulo .bufsize = URTWN_RXBUFSZ, 318251538Srpaulo .flags = { 319251538Srpaulo .pipe_bof = 1, 320251538Srpaulo .short_xfer_ok = 1 321251538Srpaulo }, 322251538Srpaulo .callback = urtwn_bulk_rx_callback, 323251538Srpaulo }, 324251538Srpaulo [URTWN_BULK_TX_BE] = { 325251538Srpaulo .type = UE_BULK, 326251538Srpaulo .endpoint = 0x03, 327251538Srpaulo .direction = UE_DIR_OUT, 328251538Srpaulo .bufsize = URTWN_TXBUFSZ, 329251538Srpaulo .flags = { 330251538Srpaulo .ext_buffer = 1, 331251538Srpaulo .pipe_bof = 1, 332251538Srpaulo .force_short_xfer = 1 333251538Srpaulo }, 334251538Srpaulo .callback = urtwn_bulk_tx_callback, 335251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 336251538Srpaulo }, 337251538Srpaulo [URTWN_BULK_TX_BK] = { 338251538Srpaulo .type = UE_BULK, 339251538Srpaulo .endpoint = 0x03, 340251538Srpaulo .direction = UE_DIR_OUT, 341251538Srpaulo .bufsize = URTWN_TXBUFSZ, 342251538Srpaulo .flags = { 343251538Srpaulo .ext_buffer = 1, 344251538Srpaulo .pipe_bof = 1, 345251538Srpaulo .force_short_xfer = 1, 346251538Srpaulo }, 347251538Srpaulo .callback = urtwn_bulk_tx_callback, 348251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 349251538Srpaulo }, 350251538Srpaulo [URTWN_BULK_TX_VI] = { 351251538Srpaulo .type = UE_BULK, 352251538Srpaulo .endpoint = 0x02, 353251538Srpaulo .direction = UE_DIR_OUT, 354251538Srpaulo .bufsize = URTWN_TXBUFSZ, 355251538Srpaulo .flags = { 356251538Srpaulo .ext_buffer = 1, 357251538Srpaulo .pipe_bof = 1, 358251538Srpaulo .force_short_xfer = 1 359251538Srpaulo }, 360251538Srpaulo .callback = urtwn_bulk_tx_callback, 361251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 362251538Srpaulo }, 363251538Srpaulo [URTWN_BULK_TX_VO] = { 364251538Srpaulo .type = UE_BULK, 365251538Srpaulo .endpoint = 0x02, 366251538Srpaulo .direction = UE_DIR_OUT, 367251538Srpaulo .bufsize = URTWN_TXBUFSZ, 368251538Srpaulo .flags = { 369251538Srpaulo .ext_buffer = 1, 370251538Srpaulo .pipe_bof = 1, 371251538Srpaulo .force_short_xfer = 1 372251538Srpaulo }, 373251538Srpaulo .callback = urtwn_bulk_tx_callback, 374251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 375251538Srpaulo }, 376251538Srpaulo}; 377251538Srpaulo 378251538Srpaulostatic int 379251538Srpaulourtwn_match(device_t self) 380251538Srpaulo{ 381251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 382251538Srpaulo 383251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 384251538Srpaulo return (ENXIO); 385251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 386251538Srpaulo return (ENXIO); 387251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 388251538Srpaulo return (ENXIO); 389251538Srpaulo 390251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 391251538Srpaulo} 392251538Srpaulo 393251538Srpaulostatic int 394251538Srpaulourtwn_attach(device_t self) 395251538Srpaulo{ 396251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 397251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 398287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 399251538Srpaulo uint8_t iface_index, bands; 400251538Srpaulo int error; 401251538Srpaulo 402251538Srpaulo device_set_usb_desc(self); 403251538Srpaulo sc->sc_udev = uaa->device; 404251538Srpaulo sc->sc_dev = self; 405264912Skevlo if (USB_GET_DRIVER_INFO(uaa) == URTWN_RTL8188E) 406264912Skevlo sc->chip |= URTWN_CHIP_88E; 407251538Srpaulo 408251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 409251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 410251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 411287197Sglebius mbufq_init(&sc->sc_snd, ifqmaxlen); 412251538Srpaulo 413251538Srpaulo iface_index = URTWN_IFACE_INDEX; 414251538Srpaulo error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 415251538Srpaulo urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 416251538Srpaulo if (error) { 417251538Srpaulo device_printf(self, "could not allocate USB transfers, " 418251538Srpaulo "err=%s\n", usbd_errstr(error)); 419251538Srpaulo goto detach; 420251538Srpaulo } 421251538Srpaulo 422251538Srpaulo URTWN_LOCK(sc); 423251538Srpaulo 424251538Srpaulo error = urtwn_read_chipid(sc); 425251538Srpaulo if (error) { 426251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 427251538Srpaulo URTWN_UNLOCK(sc); 428251538Srpaulo goto detach; 429251538Srpaulo } 430251538Srpaulo 431251538Srpaulo /* Determine number of Tx/Rx chains. */ 432251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 433251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 434251538Srpaulo sc->nrxchains = 2; 435251538Srpaulo } else { 436251538Srpaulo sc->ntxchains = 1; 437251538Srpaulo sc->nrxchains = 1; 438251538Srpaulo } 439251538Srpaulo 440264912Skevlo if (sc->chip & URTWN_CHIP_88E) 441291264Savos error = urtwn_r88e_read_rom(sc); 442264912Skevlo else 443291264Savos error = urtwn_read_rom(sc); 444291264Savos if (error != 0) { 445291264Savos device_printf(sc->sc_dev, "%s: cannot read rom, error %d\n", 446291264Savos __func__, error); 447291264Savos URTWN_UNLOCK(sc); 448291264Savos goto detach; 449291264Savos } 450264912Skevlo 451251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 452251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 453264912Skevlo (sc->chip & URTWN_CHIP_88E) ? "8188EU" : 454251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 455251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 456251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 457251538Srpaulo 458251538Srpaulo URTWN_UNLOCK(sc); 459251538Srpaulo 460283537Sglebius ic->ic_softc = sc; 461283527Sglebius ic->ic_name = device_get_nameunit(self); 462251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 463251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 464251538Srpaulo 465251538Srpaulo /* set device capabilities */ 466251538Srpaulo ic->ic_caps = 467251538Srpaulo IEEE80211_C_STA /* station mode */ 468251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 469290651Savos | IEEE80211_C_IBSS /* adhoc mode */ 470290631Savos | IEEE80211_C_HOSTAP /* hostap mode */ 471251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 472251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 473251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 474251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 475251538Srpaulo ; 476251538Srpaulo 477251538Srpaulo bands = 0; 478251538Srpaulo setbit(&bands, IEEE80211_MODE_11B); 479251538Srpaulo setbit(&bands, IEEE80211_MODE_11G); 480251538Srpaulo ieee80211_init_channels(ic, NULL, &bands); 481251538Srpaulo 482287197Sglebius ieee80211_ifattach(ic); 483251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 484251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 485251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 486251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 487287197Sglebius ic->ic_transmit = urtwn_transmit; 488287197Sglebius ic->ic_parent = urtwn_parent; 489251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 490251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 491290564Savos ic->ic_update_promisc = urtwn_update_promisc; 492251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 493251538Srpaulo 494281069Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 495251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 496251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 497251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 498251538Srpaulo 499251538Srpaulo if (bootverbose) 500251538Srpaulo ieee80211_announce(ic); 501251538Srpaulo 502251538Srpaulo return (0); 503251538Srpaulo 504251538Srpaulodetach: 505251538Srpaulo urtwn_detach(self); 506251538Srpaulo return (ENXIO); /* failure */ 507251538Srpaulo} 508251538Srpaulo 509251538Srpaulostatic int 510251538Srpaulourtwn_detach(device_t self) 511251538Srpaulo{ 512251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 513287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 514263153Skevlo unsigned int x; 515281069Srpaulo 516263153Skevlo /* Prevent further ioctls. */ 517263153Skevlo URTWN_LOCK(sc); 518263153Skevlo sc->sc_flags |= URTWN_DETACHED; 519287197Sglebius urtwn_stop(sc); 520263153Skevlo URTWN_UNLOCK(sc); 521251538Srpaulo 522251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 523251538Srpaulo 524288353Sadrian /* stop all USB transfers */ 525288353Sadrian usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 526288353Sadrian 527263153Skevlo /* Prevent further allocations from RX/TX data lists. */ 528263153Skevlo URTWN_LOCK(sc); 529263153Skevlo STAILQ_INIT(&sc->sc_tx_active); 530263153Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 531263153Skevlo STAILQ_INIT(&sc->sc_tx_pending); 532263153Skevlo 533263153Skevlo STAILQ_INIT(&sc->sc_rx_active); 534263153Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 535263153Skevlo URTWN_UNLOCK(sc); 536263153Skevlo 537263153Skevlo /* drain USB transfers */ 538263153Skevlo for (x = 0; x != URTWN_N_TRANSFER; x++) 539263153Skevlo usbd_transfer_drain(sc->sc_xfer[x]); 540263153Skevlo 541263153Skevlo /* Free data buffers. */ 542263153Skevlo URTWN_LOCK(sc); 543263153Skevlo urtwn_free_tx_list(sc); 544263153Skevlo urtwn_free_rx_list(sc); 545263153Skevlo URTWN_UNLOCK(sc); 546263153Skevlo 547251538Srpaulo ieee80211_ifdetach(ic); 548251538Srpaulo mtx_destroy(&sc->sc_mtx); 549251538Srpaulo 550251538Srpaulo return (0); 551251538Srpaulo} 552251538Srpaulo 553251538Srpaulostatic void 554289066Skevlourtwn_drain_mbufq(struct urtwn_softc *sc) 555251538Srpaulo{ 556289066Skevlo struct mbuf *m; 557289066Skevlo struct ieee80211_node *ni; 558289066Skevlo URTWN_ASSERT_LOCKED(sc); 559289066Skevlo while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 560289066Skevlo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 561289066Skevlo m->m_pkthdr.rcvif = NULL; 562289066Skevlo ieee80211_free_node(ni); 563289066Skevlo m_freem(m); 564251538Srpaulo } 565251538Srpaulo} 566251538Srpaulo 567251538Srpaulostatic usb_error_t 568251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 569251538Srpaulo void *data) 570251538Srpaulo{ 571251538Srpaulo usb_error_t err; 572251538Srpaulo int ntries = 10; 573251538Srpaulo 574251538Srpaulo URTWN_ASSERT_LOCKED(sc); 575251538Srpaulo 576251538Srpaulo while (ntries--) { 577251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 578251538Srpaulo req, data, 0, NULL, 250 /* ms */); 579251538Srpaulo if (err == 0) 580251538Srpaulo break; 581251538Srpaulo 582251538Srpaulo DPRINTFN(1, "Control request failed, %s (retrying)\n", 583251538Srpaulo usbd_errstr(err)); 584251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 585251538Srpaulo } 586251538Srpaulo return (err); 587251538Srpaulo} 588251538Srpaulo 589251538Srpaulostatic struct ieee80211vap * 590251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 591251538Srpaulo enum ieee80211_opmode opmode, int flags, 592251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 593251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 594251538Srpaulo{ 595290631Savos struct urtwn_softc *sc = ic->ic_softc; 596251538Srpaulo struct urtwn_vap *uvp; 597251538Srpaulo struct ieee80211vap *vap; 598251538Srpaulo 599251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 600251538Srpaulo return (NULL); 601251538Srpaulo 602287197Sglebius uvp = malloc(sizeof(struct urtwn_vap), M_80211_VAP, M_WAITOK | M_ZERO); 603251538Srpaulo vap = &uvp->vap; 604251538Srpaulo /* enable s/w bmiss handling for sta mode */ 605251538Srpaulo 606281069Srpaulo if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 607287197Sglebius flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 608257743Shselasky /* out of memory */ 609257743Shselasky free(uvp, M_80211_VAP); 610257743Shselasky return (NULL); 611257743Shselasky } 612257743Shselasky 613290651Savos if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_IBSS) 614290631Savos urtwn_init_beacon(sc, uvp); 615290631Savos 616251538Srpaulo /* override state transition machine */ 617251538Srpaulo uvp->newstate = vap->iv_newstate; 618251538Srpaulo vap->iv_newstate = urtwn_newstate; 619290631Savos vap->iv_update_beacon = urtwn_update_beacon; 620290651Savos if (opmode == IEEE80211_M_IBSS) { 621290651Savos uvp->recv_mgmt = vap->iv_recv_mgmt; 622290651Savos vap->iv_recv_mgmt = urtwn_ibss_recv_mgmt; 623290651Savos TASK_INIT(&uvp->tsf_task_adhoc, 0, urtwn_tsf_task_adhoc, vap); 624290651Savos } 625251538Srpaulo 626251538Srpaulo /* complete setup */ 627251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 628287197Sglebius ieee80211_media_status, mac); 629251538Srpaulo ic->ic_opmode = opmode; 630251538Srpaulo return (vap); 631251538Srpaulo} 632251538Srpaulo 633251538Srpaulostatic void 634251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 635251538Srpaulo{ 636290651Savos struct ieee80211com *ic = vap->iv_ic; 637251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 638251538Srpaulo 639290651Savos if (uvp->bcn_mbuf != NULL) 640290651Savos m_freem(uvp->bcn_mbuf); 641290651Savos if (vap->iv_opmode == IEEE80211_M_IBSS) 642290651Savos ieee80211_draintask(ic, &uvp->tsf_task_adhoc); 643251538Srpaulo ieee80211_vap_detach(vap); 644251538Srpaulo free(uvp, M_80211_VAP); 645251538Srpaulo} 646251538Srpaulo 647251538Srpaulostatic struct mbuf * 648251538Srpaulourtwn_rx_frame(struct urtwn_softc *sc, uint8_t *buf, int pktlen, int *rssi_p) 649251538Srpaulo{ 650287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 651251538Srpaulo struct ieee80211_frame *wh; 652251538Srpaulo struct mbuf *m; 653251538Srpaulo struct r92c_rx_stat *stat; 654251538Srpaulo uint32_t rxdw0, rxdw3; 655251538Srpaulo uint8_t rate; 656251538Srpaulo int8_t rssi = 0; 657251538Srpaulo int infosz; 658251538Srpaulo 659251538Srpaulo /* 660251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 661251538Srpaulo * RUNNING. 662251538Srpaulo */ 663287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) 664251538Srpaulo return (NULL); 665251538Srpaulo 666251538Srpaulo stat = (struct r92c_rx_stat *)buf; 667251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 668251538Srpaulo rxdw3 = le32toh(stat->rxdw3); 669251538Srpaulo 670251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 671251538Srpaulo /* 672251538Srpaulo * This should not happen since we setup our Rx filter 673251538Srpaulo * to not receive these frames. 674251538Srpaulo */ 675287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 676251538Srpaulo return (NULL); 677251538Srpaulo } 678290022Savos if (pktlen < sizeof(struct ieee80211_frame_ack) || 679290022Savos pktlen > MCLBYTES) { 680287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 681271303Skevlo return (NULL); 682271303Skevlo } 683251538Srpaulo 684251538Srpaulo rate = MS(rxdw3, R92C_RXDW3_RATE); 685251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 686251538Srpaulo 687251538Srpaulo /* Get RSSI from PHY status descriptor if present. */ 688251538Srpaulo if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 689281069Srpaulo if (sc->chip & URTWN_CHIP_88E) 690264912Skevlo rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]); 691264912Skevlo else 692264912Skevlo rssi = urtwn_get_rssi(sc, rate, &stat[1]); 693251538Srpaulo /* Update our average RSSI. */ 694251538Srpaulo urtwn_update_avgrssi(sc, rate, rssi); 695251538Srpaulo } 696251538Srpaulo 697260463Skevlo m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 698251538Srpaulo if (m == NULL) { 699251538Srpaulo device_printf(sc->sc_dev, "could not create RX mbuf\n"); 700251538Srpaulo return (NULL); 701251538Srpaulo } 702251538Srpaulo 703251538Srpaulo /* Finalize mbuf. */ 704251538Srpaulo wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 705251538Srpaulo memcpy(mtod(m, uint8_t *), wh, pktlen); 706251538Srpaulo m->m_pkthdr.len = m->m_len = pktlen; 707251538Srpaulo 708251538Srpaulo if (ieee80211_radiotap_active(ic)) { 709251538Srpaulo struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 710251538Srpaulo 711251538Srpaulo tap->wr_flags = 0; 712251538Srpaulo /* Map HW rate index to 802.11 rate. */ 713251538Srpaulo if (!(rxdw3 & R92C_RXDW3_HT)) { 714289758Savos tap->wr_rate = ridx2rate[rate]; 715251538Srpaulo } else if (rate >= 12) { /* MCS0~15. */ 716251538Srpaulo /* Bit 7 set means HT MCS instead of rate. */ 717251538Srpaulo tap->wr_rate = 0x80 | (rate - 12); 718251538Srpaulo } 719251538Srpaulo tap->wr_dbm_antsignal = rssi; 720289816Savos tap->wr_dbm_antnoise = URTWN_NOISE_FLOOR; 721251538Srpaulo tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 722251538Srpaulo tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 723251538Srpaulo } 724251538Srpaulo 725251538Srpaulo *rssi_p = rssi; 726251538Srpaulo 727251538Srpaulo return (m); 728251538Srpaulo} 729251538Srpaulo 730251538Srpaulostatic struct mbuf * 731251538Srpaulourtwn_rxeof(struct usb_xfer *xfer, struct urtwn_data *data, int *rssi, 732251538Srpaulo int8_t *nf) 733251538Srpaulo{ 734251538Srpaulo struct urtwn_softc *sc = data->sc; 735287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 736251538Srpaulo struct r92c_rx_stat *stat; 737251538Srpaulo struct mbuf *m, *m0 = NULL, *prevm = NULL; 738251538Srpaulo uint32_t rxdw0; 739251538Srpaulo uint8_t *buf; 740251538Srpaulo int len, totlen, pktlen, infosz, npkts; 741251538Srpaulo 742251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 743251538Srpaulo 744251538Srpaulo if (len < sizeof(*stat)) { 745287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 746251538Srpaulo return (NULL); 747251538Srpaulo } 748251538Srpaulo 749251538Srpaulo buf = data->buf; 750251538Srpaulo /* Get the number of encapsulated frames. */ 751251538Srpaulo stat = (struct r92c_rx_stat *)buf; 752251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 753251538Srpaulo DPRINTFN(6, "Rx %d frames in one chunk\n", npkts); 754251538Srpaulo 755251538Srpaulo /* Process all of them. */ 756251538Srpaulo while (npkts-- > 0) { 757251538Srpaulo if (len < sizeof(*stat)) 758251538Srpaulo break; 759251538Srpaulo stat = (struct r92c_rx_stat *)buf; 760251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 761251538Srpaulo 762251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 763251538Srpaulo if (pktlen == 0) 764251538Srpaulo break; 765251538Srpaulo 766251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 767251538Srpaulo 768251538Srpaulo /* Make sure everything fits in xfer. */ 769251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 770251538Srpaulo if (totlen > len) 771251538Srpaulo break; 772251538Srpaulo 773251538Srpaulo m = urtwn_rx_frame(sc, buf, pktlen, rssi); 774251538Srpaulo if (m0 == NULL) 775251538Srpaulo m0 = m; 776251538Srpaulo if (prevm == NULL) 777251538Srpaulo prevm = m; 778251538Srpaulo else { 779251538Srpaulo prevm->m_next = m; 780251538Srpaulo prevm = m; 781251538Srpaulo } 782251538Srpaulo 783251538Srpaulo /* Next chunk is 128-byte aligned. */ 784251538Srpaulo totlen = (totlen + 127) & ~127; 785251538Srpaulo buf += totlen; 786251538Srpaulo len -= totlen; 787251538Srpaulo } 788251538Srpaulo 789251538Srpaulo return (m0); 790251538Srpaulo} 791251538Srpaulo 792251538Srpaulostatic void 793251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 794251538Srpaulo{ 795251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 796287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 797290022Savos struct ieee80211_frame_min *wh; 798251538Srpaulo struct ieee80211_node *ni; 799251538Srpaulo struct mbuf *m = NULL, *next; 800251538Srpaulo struct urtwn_data *data; 801251538Srpaulo int8_t nf; 802251538Srpaulo int rssi = 1; 803251538Srpaulo 804251538Srpaulo URTWN_ASSERT_LOCKED(sc); 805251538Srpaulo 806251538Srpaulo switch (USB_GET_STATE(xfer)) { 807251538Srpaulo case USB_ST_TRANSFERRED: 808251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 809251538Srpaulo if (data == NULL) 810251538Srpaulo goto tr_setup; 811251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 812251538Srpaulo m = urtwn_rxeof(xfer, data, &rssi, &nf); 813251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 814251538Srpaulo /* FALLTHROUGH */ 815251538Srpaulo case USB_ST_SETUP: 816251538Srpaulotr_setup: 817251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 818251538Srpaulo if (data == NULL) { 819251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 820251538Srpaulo return; 821251538Srpaulo } 822251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 823251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 824251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 825251538Srpaulo usbd_xfer_max_len(xfer)); 826251538Srpaulo usbd_transfer_submit(xfer); 827251538Srpaulo 828251538Srpaulo /* 829251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 830251538Srpaulo * ieee80211_input() because here is at the end of a USB 831251538Srpaulo * callback and safe to unlock. 832251538Srpaulo */ 833251538Srpaulo URTWN_UNLOCK(sc); 834251538Srpaulo while (m != NULL) { 835251538Srpaulo next = m->m_next; 836251538Srpaulo m->m_next = NULL; 837290022Savos wh = mtod(m, struct ieee80211_frame_min *); 838290022Savos if (m->m_len >= sizeof(*wh)) 839290022Savos ni = ieee80211_find_rxnode(ic, wh); 840290022Savos else 841290022Savos ni = NULL; 842251538Srpaulo nf = URTWN_NOISE_FLOOR; 843251538Srpaulo if (ni != NULL) { 844289799Savos (void)ieee80211_input(ni, m, rssi - nf, nf); 845251538Srpaulo ieee80211_free_node(ni); 846289799Savos } else { 847289799Savos (void)ieee80211_input_all(ic, m, rssi - nf, 848289799Savos nf); 849289799Savos } 850251538Srpaulo m = next; 851251538Srpaulo } 852251538Srpaulo URTWN_LOCK(sc); 853251538Srpaulo break; 854251538Srpaulo default: 855251538Srpaulo /* needs it to the inactive queue due to a error. */ 856251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 857251538Srpaulo if (data != NULL) { 858251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 859251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 860251538Srpaulo } 861251538Srpaulo if (error != USB_ERR_CANCELLED) { 862251538Srpaulo usbd_xfer_set_stall(xfer); 863287197Sglebius counter_u64_add(ic->ic_ierrors, 1); 864251538Srpaulo goto tr_setup; 865251538Srpaulo } 866251538Srpaulo break; 867251538Srpaulo } 868251538Srpaulo} 869251538Srpaulo 870251538Srpaulostatic void 871289891Savosurtwn_txeof(struct urtwn_softc *sc, struct urtwn_data *data, int status) 872251538Srpaulo{ 873251538Srpaulo 874251538Srpaulo URTWN_ASSERT_LOCKED(sc); 875289891Savos 876290631Savos if (data->ni != NULL) /* not a beacon frame */ 877290631Savos ieee80211_tx_complete(data->ni, data->m, status); 878289891Savos 879287197Sglebius data->ni = NULL; 880287197Sglebius data->m = NULL; 881289891Savos 882251538Srpaulo sc->sc_txtimer = 0; 883289891Savos 884289891Savos STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 885251538Srpaulo} 886251538Srpaulo 887289066Skevlostatic int 888289066Skevlourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 889289066Skevlo int ndata, int maxsz) 890289066Skevlo{ 891289066Skevlo int i, error; 892289066Skevlo 893289066Skevlo for (i = 0; i < ndata; i++) { 894289066Skevlo struct urtwn_data *dp = &data[i]; 895289066Skevlo dp->sc = sc; 896289066Skevlo dp->m = NULL; 897289066Skevlo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 898289066Skevlo if (dp->buf == NULL) { 899289066Skevlo device_printf(sc->sc_dev, 900289066Skevlo "could not allocate buffer\n"); 901289066Skevlo error = ENOMEM; 902289066Skevlo goto fail; 903289066Skevlo } 904289066Skevlo dp->ni = NULL; 905289066Skevlo } 906289066Skevlo 907289066Skevlo return (0); 908289066Skevlofail: 909289066Skevlo urtwn_free_list(sc, data, ndata); 910289066Skevlo return (error); 911289066Skevlo} 912289066Skevlo 913289066Skevlostatic int 914289066Skevlourtwn_alloc_rx_list(struct urtwn_softc *sc) 915289066Skevlo{ 916289066Skevlo int error, i; 917289066Skevlo 918289066Skevlo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 919289066Skevlo URTWN_RXBUFSZ); 920289066Skevlo if (error != 0) 921289066Skevlo return (error); 922289066Skevlo 923289066Skevlo STAILQ_INIT(&sc->sc_rx_active); 924289066Skevlo STAILQ_INIT(&sc->sc_rx_inactive); 925289066Skevlo 926289066Skevlo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 927289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 928289066Skevlo 929289066Skevlo return (0); 930289066Skevlo} 931289066Skevlo 932289066Skevlostatic int 933289066Skevlourtwn_alloc_tx_list(struct urtwn_softc *sc) 934289066Skevlo{ 935289066Skevlo int error, i; 936289066Skevlo 937289066Skevlo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 938289066Skevlo URTWN_TXBUFSZ); 939289066Skevlo if (error != 0) 940289066Skevlo return (error); 941289066Skevlo 942289066Skevlo STAILQ_INIT(&sc->sc_tx_active); 943289066Skevlo STAILQ_INIT(&sc->sc_tx_inactive); 944289066Skevlo STAILQ_INIT(&sc->sc_tx_pending); 945289066Skevlo 946289066Skevlo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 947289066Skevlo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 948289066Skevlo 949289066Skevlo return (0); 950289066Skevlo} 951289066Skevlo 952251538Srpaulostatic void 953289066Skevlourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 954289066Skevlo{ 955289066Skevlo int i; 956289066Skevlo 957289066Skevlo for (i = 0; i < ndata; i++) { 958289066Skevlo struct urtwn_data *dp = &data[i]; 959289066Skevlo 960289066Skevlo if (dp->buf != NULL) { 961289066Skevlo free(dp->buf, M_USBDEV); 962289066Skevlo dp->buf = NULL; 963289066Skevlo } 964289066Skevlo if (dp->ni != NULL) { 965289066Skevlo ieee80211_free_node(dp->ni); 966289066Skevlo dp->ni = NULL; 967289066Skevlo } 968289066Skevlo } 969289066Skevlo} 970289066Skevlo 971289066Skevlostatic void 972289066Skevlourtwn_free_rx_list(struct urtwn_softc *sc) 973289066Skevlo{ 974289066Skevlo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 975289066Skevlo} 976289066Skevlo 977289066Skevlostatic void 978289066Skevlourtwn_free_tx_list(struct urtwn_softc *sc) 979289066Skevlo{ 980289066Skevlo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 981289066Skevlo} 982289066Skevlo 983289066Skevlostatic void 984251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 985251538Srpaulo{ 986251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 987251538Srpaulo struct urtwn_data *data; 988251538Srpaulo 989251538Srpaulo URTWN_ASSERT_LOCKED(sc); 990251538Srpaulo 991251538Srpaulo switch (USB_GET_STATE(xfer)){ 992251538Srpaulo case USB_ST_TRANSFERRED: 993251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 994251538Srpaulo if (data == NULL) 995251538Srpaulo goto tr_setup; 996251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 997289891Savos urtwn_txeof(sc, data, 0); 998251538Srpaulo /* FALLTHROUGH */ 999251538Srpaulo case USB_ST_SETUP: 1000251538Srpaulotr_setup: 1001251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 1002251538Srpaulo if (data == NULL) { 1003251538Srpaulo DPRINTF("%s: empty pending queue\n", __func__); 1004288353Sadrian goto finish; 1005251538Srpaulo } 1006251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 1007251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 1008251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 1009251538Srpaulo usbd_transfer_submit(xfer); 1010251538Srpaulo break; 1011251538Srpaulo default: 1012251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 1013251538Srpaulo if (data == NULL) 1014251538Srpaulo goto tr_setup; 1015289891Savos STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 1016289891Savos urtwn_txeof(sc, data, 1); 1017251538Srpaulo if (error != USB_ERR_CANCELLED) { 1018251538Srpaulo usbd_xfer_set_stall(xfer); 1019251538Srpaulo goto tr_setup; 1020251538Srpaulo } 1021251538Srpaulo break; 1022251538Srpaulo } 1023288353Sadrianfinish: 1024288353Sadrian /* Kick-start more transmit */ 1025288353Sadrian urtwn_start(sc); 1026251538Srpaulo} 1027251538Srpaulo 1028251538Srpaulostatic struct urtwn_data * 1029251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 1030251538Srpaulo{ 1031251538Srpaulo struct urtwn_data *bf; 1032251538Srpaulo 1033251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 1034251538Srpaulo if (bf != NULL) 1035251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 1036251538Srpaulo else 1037251538Srpaulo DPRINTF("%s: %s\n", __func__, "out of xmit buffers"); 1038251538Srpaulo return (bf); 1039251538Srpaulo} 1040251538Srpaulo 1041251538Srpaulostatic struct urtwn_data * 1042251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 1043251538Srpaulo{ 1044251538Srpaulo struct urtwn_data *bf; 1045251538Srpaulo 1046251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1047251538Srpaulo 1048251538Srpaulo bf = _urtwn_getbuf(sc); 1049287197Sglebius if (bf == NULL) 1050251538Srpaulo DPRINTF("%s: stop queue\n", __func__); 1051251538Srpaulo return (bf); 1052251538Srpaulo} 1053251538Srpaulo 1054251538Srpaulostatic int 1055251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1056251538Srpaulo int len) 1057251538Srpaulo{ 1058251538Srpaulo usb_device_request_t req; 1059251538Srpaulo 1060251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1061251538Srpaulo req.bRequest = R92C_REQ_REGS; 1062251538Srpaulo USETW(req.wValue, addr); 1063251538Srpaulo USETW(req.wIndex, 0); 1064251538Srpaulo USETW(req.wLength, len); 1065251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1066251538Srpaulo} 1067251538Srpaulo 1068251538Srpaulostatic void 1069251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 1070251538Srpaulo{ 1071251538Srpaulo urtwn_write_region_1(sc, addr, &val, 1); 1072251538Srpaulo} 1073251538Srpaulo 1074251538Srpaulo 1075251538Srpaulostatic void 1076251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 1077251538Srpaulo{ 1078251538Srpaulo val = htole16(val); 1079251538Srpaulo urtwn_write_region_1(sc, addr, (uint8_t *)&val, 2); 1080251538Srpaulo} 1081251538Srpaulo 1082251538Srpaulostatic void 1083251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 1084251538Srpaulo{ 1085251538Srpaulo val = htole32(val); 1086251538Srpaulo urtwn_write_region_1(sc, addr, (uint8_t *)&val, 4); 1087251538Srpaulo} 1088251538Srpaulo 1089251538Srpaulostatic int 1090251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 1091251538Srpaulo int len) 1092251538Srpaulo{ 1093251538Srpaulo usb_device_request_t req; 1094251538Srpaulo 1095251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 1096251538Srpaulo req.bRequest = R92C_REQ_REGS; 1097251538Srpaulo USETW(req.wValue, addr); 1098251538Srpaulo USETW(req.wIndex, 0); 1099251538Srpaulo USETW(req.wLength, len); 1100251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 1101251538Srpaulo} 1102251538Srpaulo 1103251538Srpaulostatic uint8_t 1104251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 1105251538Srpaulo{ 1106251538Srpaulo uint8_t val; 1107251538Srpaulo 1108251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 1109251538Srpaulo return (0xff); 1110251538Srpaulo return (val); 1111251538Srpaulo} 1112251538Srpaulo 1113251538Srpaulostatic uint16_t 1114251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 1115251538Srpaulo{ 1116251538Srpaulo uint16_t val; 1117251538Srpaulo 1118251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 1119251538Srpaulo return (0xffff); 1120251538Srpaulo return (le16toh(val)); 1121251538Srpaulo} 1122251538Srpaulo 1123251538Srpaulostatic uint32_t 1124251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 1125251538Srpaulo{ 1126251538Srpaulo uint32_t val; 1127251538Srpaulo 1128251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 1129251538Srpaulo return (0xffffffff); 1130251538Srpaulo return (le32toh(val)); 1131251538Srpaulo} 1132251538Srpaulo 1133251538Srpaulostatic int 1134251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1135251538Srpaulo{ 1136251538Srpaulo struct r92c_fw_cmd cmd; 1137251538Srpaulo int ntries; 1138251538Srpaulo 1139251538Srpaulo /* Wait for current FW box to be empty. */ 1140251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1141251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1142251538Srpaulo break; 1143266472Shselasky urtwn_ms_delay(sc); 1144251538Srpaulo } 1145251538Srpaulo if (ntries == 100) { 1146251538Srpaulo device_printf(sc->sc_dev, 1147251538Srpaulo "could not send firmware command\n"); 1148251538Srpaulo return (ETIMEDOUT); 1149251538Srpaulo } 1150251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1151251538Srpaulo cmd.id = id; 1152251538Srpaulo if (len > 3) 1153251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1154251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1155251538Srpaulo memcpy(cmd.msg, buf, len); 1156251538Srpaulo 1157251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1158251538Srpaulo urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1159251538Srpaulo (uint8_t *)&cmd + 4, 2); 1160251538Srpaulo urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1161251538Srpaulo (uint8_t *)&cmd + 0, 4); 1162251538Srpaulo 1163251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1164251538Srpaulo return (0); 1165251538Srpaulo} 1166251538Srpaulo 1167264912Skevlostatic __inline void 1168251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1169251538Srpaulo{ 1170264912Skevlo 1171264912Skevlo sc->sc_rf_write(sc, chain, addr, val); 1172264912Skevlo} 1173264912Skevlo 1174264912Skevlostatic void 1175264912Skevlourtwn_r92c_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1176264912Skevlo uint32_t val) 1177264912Skevlo{ 1178251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1179251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1180251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1181251538Srpaulo} 1182251538Srpaulo 1183264912Skevlostatic void 1184264912Skevlourtwn_r88e_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, 1185264912Skevlouint32_t val) 1186264912Skevlo{ 1187264912Skevlo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1188264912Skevlo SM(R88E_LSSI_PARAM_ADDR, addr) | 1189264912Skevlo SM(R92C_LSSI_PARAM_DATA, val)); 1190264912Skevlo} 1191264912Skevlo 1192251538Srpaulostatic uint32_t 1193251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1194251538Srpaulo{ 1195251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1196251538Srpaulo 1197251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1198251538Srpaulo if (chain != 0) 1199251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1200251538Srpaulo 1201251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1202251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1203266472Shselasky urtwn_ms_delay(sc); 1204251538Srpaulo 1205251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1206251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1207251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1208266472Shselasky urtwn_ms_delay(sc); 1209251538Srpaulo 1210251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1211251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1212266472Shselasky urtwn_ms_delay(sc); 1213251538Srpaulo 1214251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1215251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1216251538Srpaulo else 1217251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1218251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1219251538Srpaulo} 1220251538Srpaulo 1221251538Srpaulostatic int 1222251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1223251538Srpaulo{ 1224251538Srpaulo int ntries; 1225251538Srpaulo 1226251538Srpaulo urtwn_write_4(sc, R92C_LLT_INIT, 1227251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1228251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1229251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1230251538Srpaulo /* Wait for write operation to complete. */ 1231251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1232251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1233251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1234251538Srpaulo return (0); 1235266472Shselasky urtwn_ms_delay(sc); 1236251538Srpaulo } 1237251538Srpaulo return (ETIMEDOUT); 1238251538Srpaulo} 1239251538Srpaulo 1240291264Savosstatic int 1241291264Savosurtwn_efuse_read_next(struct urtwn_softc *sc, uint8_t *val) 1242251538Srpaulo{ 1243251538Srpaulo uint32_t reg; 1244251538Srpaulo int ntries; 1245251538Srpaulo 1246291264Savos if (sc->last_rom_addr >= URTWN_EFUSE_MAX_LEN) 1247291264Savos return (EFAULT); 1248291264Savos 1249251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1250291264Savos reg = RW(reg, R92C_EFUSE_CTRL_ADDR, sc->last_rom_addr); 1251251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1252291264Savos 1253251538Srpaulo urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1254251538Srpaulo /* Wait for read operation to complete. */ 1255251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1256251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1257251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1258291264Savos break; 1259266472Shselasky urtwn_ms_delay(sc); 1260251538Srpaulo } 1261291264Savos if (ntries == 100) { 1262291264Savos device_printf(sc->sc_dev, 1263291264Savos "could not read efuse byte at address 0x%x\n", 1264291264Savos sc->last_rom_addr); 1265291264Savos return (ETIMEDOUT); 1266291264Savos } 1267291264Savos 1268291264Savos *val = MS(reg, R92C_EFUSE_CTRL_DATA); 1269291264Savos sc->last_rom_addr++; 1270291264Savos 1271291264Savos return (0); 1272251538Srpaulo} 1273251538Srpaulo 1274291264Savosstatic int 1275291264Savosurtwn_efuse_read_data(struct urtwn_softc *sc, uint8_t *rom, uint8_t off, 1276291264Savos uint8_t msk) 1277291264Savos{ 1278291264Savos uint8_t reg; 1279291264Savos int i, error; 1280291264Savos 1281291264Savos for (i = 0; i < 4; i++) { 1282291264Savos if (msk & (1 << i)) 1283291264Savos continue; 1284291264Savos error = urtwn_efuse_read_next(sc, ®); 1285291264Savos if (error != 0) 1286291264Savos return (error); 1287291264Savos DPRINTF("rom[0x%03X] == 0x%02X\n", off * 8 + i * 2, reg); 1288291264Savos rom[off * 8 + i * 2 + 0] = reg; 1289291264Savos 1290291264Savos error = urtwn_efuse_read_next(sc, ®); 1291291264Savos if (error != 0) 1292291264Savos return (error); 1293291264Savos DPRINTF("rom[0x%03X] == 0x%02X\n", off * 8 + i * 2 + 1, reg); 1294291264Savos rom[off * 8 + i * 2 + 1] = reg; 1295291264Savos } 1296291264Savos 1297291264Savos return (0); 1298291264Savos} 1299291264Savos 1300291264Savos#ifdef URTWN_DEBUG 1301251538Srpaulostatic void 1302291264Savosurtwn_dump_rom_contents(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1303251538Srpaulo{ 1304251538Srpaulo int i; 1305251538Srpaulo 1306291264Savos /* Dump ROM contents. */ 1307291264Savos device_printf(sc->sc_dev, "%s:", __func__); 1308291264Savos for (i = 0; i < size; i++) { 1309291264Savos if (i % 32 == 0) 1310291264Savos printf("\n%03X: ", i); 1311291264Savos else if (i % 4 == 0) 1312291264Savos printf(" "); 1313291264Savos 1314291264Savos printf("%02X", rom[i]); 1315291264Savos } 1316291264Savos printf("\n"); 1317291264Savos} 1318291264Savos#endif 1319291264Savos 1320291264Savosstatic int 1321291264Savosurtwn_efuse_read(struct urtwn_softc *sc, uint8_t *rom, uint16_t size) 1322291264Savos{ 1323291264Savos#define URTWN_CHK(res) do { \ 1324291264Savos if ((error = res) != 0) \ 1325291264Savos goto end; \ 1326291264Savos} while(0) 1327291264Savos uint8_t msk, off, reg; 1328291264Savos int error; 1329291264Savos 1330264912Skevlo urtwn_efuse_switch_power(sc); 1331264912Skevlo 1332291264Savos /* Read full ROM image. */ 1333291264Savos sc->last_rom_addr = 0; 1334291264Savos memset(rom, 0xff, size); 1335291264Savos 1336291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1337291264Savos while (reg != 0xff) { 1338291264Savos /* check for extended header */ 1339291264Savos if ((sc->chip & URTWN_CHIP_88E) && (reg & 0x1f) == 0x0f) { 1340291264Savos off = reg >> 5; 1341291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1342291264Savos 1343291264Savos if ((reg & 0x0f) != 0x0f) 1344291264Savos off = ((reg & 0xf0) >> 1) | off; 1345291264Savos else 1346291264Savos continue; 1347291264Savos } else 1348291264Savos off = reg >> 4; 1349251538Srpaulo msk = reg & 0xf; 1350291264Savos 1351291264Savos URTWN_CHK(urtwn_efuse_read_data(sc, rom, off, msk)); 1352291264Savos URTWN_CHK(urtwn_efuse_read_next(sc, ®)); 1353251538Srpaulo } 1354291264Savos 1355291264Savosend: 1356291264Savos 1357251538Srpaulo#ifdef URTWN_DEBUG 1358291264Savos if (urtwn_debug >= 2) 1359291264Savos urtwn_dump_rom_contents(sc, rom, size); 1360251538Srpaulo#endif 1361291264Savos 1362282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF); 1363291264Savos 1364291264Savos if (error != 0) { 1365291264Savos device_printf(sc->sc_dev, "%s: error while reading ROM\n", 1366291264Savos __func__); 1367291264Savos } 1368291264Savos 1369291264Savos return (error); 1370291264Savos#undef URTWN_CHK 1371282623Skevlo} 1372281592Skevlo 1373264912Skevlostatic void 1374264912Skevlourtwn_efuse_switch_power(struct urtwn_softc *sc) 1375264912Skevlo{ 1376264912Skevlo uint32_t reg; 1377251538Srpaulo 1378282623Skevlo urtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON); 1379281918Skevlo 1380264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1381264912Skevlo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1382264912Skevlo urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1383264912Skevlo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1384264912Skevlo } 1385264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1386264912Skevlo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1387264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1388264912Skevlo reg | R92C_SYS_FUNC_EN_ELDR); 1389264912Skevlo } 1390264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1391264912Skevlo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1392264912Skevlo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1393264912Skevlo urtwn_write_2(sc, R92C_SYS_CLKR, 1394264912Skevlo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1395264912Skevlo } 1396264912Skevlo} 1397264912Skevlo 1398251538Srpaulostatic int 1399251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1400251538Srpaulo{ 1401251538Srpaulo uint32_t reg; 1402251538Srpaulo 1403264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1404264912Skevlo return (0); 1405264912Skevlo 1406251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1407251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1408251538Srpaulo return (EIO); 1409251538Srpaulo 1410251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1411251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1412251538Srpaulo /* Check if it is a castrated 8192C. */ 1413251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1414251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1415251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1416251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1417251538Srpaulo } 1418251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1419251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1420251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1421251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1422251538Srpaulo } 1423251538Srpaulo return (0); 1424251538Srpaulo} 1425251538Srpaulo 1426291264Savosstatic int 1427251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1428251538Srpaulo{ 1429291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 1430291264Savos int error; 1431251538Srpaulo 1432251538Srpaulo /* Read full ROM image. */ 1433291264Savos error = urtwn_efuse_read(sc, (uint8_t *)rom, sizeof(*rom)); 1434291264Savos if (error != 0) 1435291264Savos return (error); 1436251538Srpaulo 1437251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1438291264Savos sc->last_rom_addr = 0x1fa; 1439291264Savos error = urtwn_efuse_read_next(sc, &sc->pa_setting); 1440291264Savos if (error != 0) 1441291264Savos return (error); 1442251538Srpaulo DPRINTF("PA setting=0x%x\n", sc->pa_setting); 1443251538Srpaulo 1444251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1445251538Srpaulo 1446251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1447251538Srpaulo DPRINTF("regulatory type=%d\n", sc->regulatory); 1448287197Sglebius IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr); 1449251538Srpaulo 1450264912Skevlo sc->sc_rf_write = urtwn_r92c_rf_write; 1451264912Skevlo sc->sc_power_on = urtwn_r92c_power_on; 1452264912Skevlo sc->sc_dma_init = urtwn_r92c_dma_init; 1453291264Savos 1454291264Savos return (0); 1455251538Srpaulo} 1456251538Srpaulo 1457291264Savosstatic int 1458264912Skevlourtwn_r88e_read_rom(struct urtwn_softc *sc) 1459264912Skevlo{ 1460291264Savos uint8_t *rom = sc->rom.r88e_rom; 1461291264Savos uint16_t addr; 1462291264Savos int error, i; 1463264912Skevlo 1464291264Savos error = urtwn_efuse_read(sc, rom, sizeof(sc->rom.r88e_rom)); 1465291264Savos if (error != 0) 1466291264Savos return (error); 1467264912Skevlo 1468264912Skevlo addr = 0x10; 1469264912Skevlo for (i = 0; i < 6; i++) 1470291264Savos sc->cck_tx_pwr[i] = rom[addr++]; 1471264912Skevlo for (i = 0; i < 5; i++) 1472291264Savos sc->ht40_tx_pwr[i] = rom[addr++]; 1473291264Savos sc->bw20_tx_pwr_diff = (rom[addr] & 0xf0) >> 4; 1474264912Skevlo if (sc->bw20_tx_pwr_diff & 0x08) 1475264912Skevlo sc->bw20_tx_pwr_diff |= 0xf0; 1476291264Savos sc->ofdm_tx_pwr_diff = (rom[addr] & 0xf); 1477264912Skevlo if (sc->ofdm_tx_pwr_diff & 0x08) 1478264912Skevlo sc->ofdm_tx_pwr_diff |= 0xf0; 1479291264Savos sc->regulatory = MS(rom[0xc1], R92C_ROM_RF1_REGULATORY); 1480291264Savos IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, &rom[0xd7]); 1481264912Skevlo 1482264912Skevlo sc->sc_rf_write = urtwn_r88e_rf_write; 1483264912Skevlo sc->sc_power_on = urtwn_r88e_power_on; 1484264912Skevlo sc->sc_dma_init = urtwn_r88e_dma_init; 1485291264Savos 1486291264Savos return (0); 1487264912Skevlo} 1488264912Skevlo 1489251538Srpaulo/* 1490251538Srpaulo * Initialize rate adaptation in firmware. 1491251538Srpaulo */ 1492251538Srpaulostatic int 1493251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 1494251538Srpaulo{ 1495287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 1496251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1497251538Srpaulo struct ieee80211_node *ni; 1498251538Srpaulo struct ieee80211_rateset *rs; 1499251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 1500251538Srpaulo uint32_t rates, basicrates; 1501251538Srpaulo uint8_t mode; 1502251538Srpaulo int maxrate, maxbasicrate, error, i, j; 1503251538Srpaulo 1504251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1505251538Srpaulo rs = &ni->ni_rates; 1506251538Srpaulo 1507251538Srpaulo /* Get normal and basic rates mask. */ 1508251538Srpaulo rates = basicrates = 0; 1509251538Srpaulo maxrate = maxbasicrate = 0; 1510251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 1511251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 1512289758Savos for (j = 0; j < nitems(ridx2rate); j++) 1513289758Savos if ((rs->rs_rates[i] & IEEE80211_RATE_VAL) == 1514289758Savos ridx2rate[j]) 1515251538Srpaulo break; 1516289758Savos if (j == nitems(ridx2rate)) /* Unknown rate, skip. */ 1517251538Srpaulo continue; 1518251538Srpaulo rates |= 1 << j; 1519251538Srpaulo if (j > maxrate) 1520251538Srpaulo maxrate = j; 1521251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 1522251538Srpaulo basicrates |= 1 << j; 1523251538Srpaulo if (j > maxbasicrate) 1524251538Srpaulo maxbasicrate = j; 1525251538Srpaulo } 1526251538Srpaulo } 1527251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 1528251538Srpaulo mode = R92C_RAID_11B; 1529251538Srpaulo else 1530251538Srpaulo mode = R92C_RAID_11BG; 1531251538Srpaulo DPRINTF("mode=0x%x rates=0x%08x, basicrates=0x%08x\n", 1532251538Srpaulo mode, rates, basicrates); 1533251538Srpaulo 1534251538Srpaulo /* Set rates mask for group addressed frames. */ 1535251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 1536251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 1537251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1538251538Srpaulo if (error != 0) { 1539252401Srpaulo ieee80211_free_node(ni); 1540251538Srpaulo device_printf(sc->sc_dev, 1541251538Srpaulo "could not add broadcast station\n"); 1542251538Srpaulo return (error); 1543251538Srpaulo } 1544251538Srpaulo /* Set initial MRR rate. */ 1545251538Srpaulo DPRINTF("maxbasicrate=%d\n", maxbasicrate); 1546251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 1547251538Srpaulo maxbasicrate); 1548251538Srpaulo 1549251538Srpaulo /* Set rates mask for unicast frames. */ 1550251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 1551251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 1552251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1553251538Srpaulo if (error != 0) { 1554252401Srpaulo ieee80211_free_node(ni); 1555251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 1556251538Srpaulo return (error); 1557251538Srpaulo } 1558251538Srpaulo /* Set initial MRR rate. */ 1559251538Srpaulo DPRINTF("maxrate=%d\n", maxrate); 1560251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 1561251538Srpaulo maxrate); 1562251538Srpaulo 1563251538Srpaulo /* Indicate highest supported rate. */ 1564252403Srpaulo ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1565252401Srpaulo ieee80211_free_node(ni); 1566252401Srpaulo 1567251538Srpaulo return (0); 1568251538Srpaulo} 1569251538Srpaulo 1570290439Savosstatic void 1571290631Savosurtwn_init_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 1572251538Srpaulo{ 1573290631Savos struct r92c_tx_desc *txd = &uvp->bcn_desc; 1574290631Savos 1575290631Savos txd->txdw0 = htole32( 1576290631Savos SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | R92C_TXDW0_BMCAST | 1577290631Savos R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 1578290631Savos txd->txdw1 = htole32( 1579290631Savos SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BEACON) | 1580290631Savos SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 1581290631Savos 1582290631Savos if (sc->chip & URTWN_CHIP_88E) 1583290631Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, URTWN_MACID_BC)); 1584290631Savos else 1585290631Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, URTWN_MACID_BC)); 1586290631Savos 1587290631Savos txd->txdw4 = htole32(R92C_TXDW4_DRVRATE); 1588290631Savos txd->txdw5 = htole32(SM(R92C_TXDW5_DATARATE, URTWN_RIDX_CCK1)); 1589290631Savos txd->txdseq = htole16(R92C_TXDSEQ_HWSEQ_EN); 1590251538Srpaulo} 1591251538Srpaulo 1592290631Savosstatic int 1593290631Savosurtwn_setup_beacon(struct urtwn_softc *sc, struct ieee80211_node *ni) 1594290631Savos{ 1595290631Savos struct ieee80211vap *vap = ni->ni_vap; 1596290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1597290631Savos struct mbuf *m; 1598290631Savos int error; 1599290631Savos 1600290631Savos URTWN_ASSERT_LOCKED(sc); 1601290631Savos 1602290631Savos if (ni->ni_chan == IEEE80211_CHAN_ANYC) 1603290631Savos return (EINVAL); 1604290631Savos 1605290631Savos m = ieee80211_beacon_alloc(ni); 1606290631Savos if (m == NULL) { 1607290631Savos device_printf(sc->sc_dev, 1608290631Savos "%s: could not allocate beacon frame\n", __func__); 1609290631Savos return (ENOMEM); 1610290631Savos } 1611290631Savos 1612290631Savos if (uvp->bcn_mbuf != NULL) 1613290631Savos m_freem(uvp->bcn_mbuf); 1614290631Savos 1615290631Savos uvp->bcn_mbuf = m; 1616290631Savos 1617290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 1618290631Savos return (error); 1619290631Savos 1620290631Savos /* XXX bcnq stuck workaround */ 1621290631Savos if ((error = urtwn_tx_beacon(sc, uvp)) != 0) 1622290631Savos return (error); 1623290631Savos 1624290631Savos return (0); 1625290631Savos} 1626290631Savos 1627251538Srpaulostatic void 1628290631Savosurtwn_update_beacon(struct ieee80211vap *vap, int item) 1629290631Savos{ 1630290631Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1631290631Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1632290631Savos struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off; 1633290631Savos struct ieee80211_node *ni = vap->iv_bss; 1634290631Savos int mcast = 0; 1635290631Savos 1636290631Savos URTWN_LOCK(sc); 1637290631Savos if (uvp->bcn_mbuf == NULL) { 1638290631Savos uvp->bcn_mbuf = ieee80211_beacon_alloc(ni); 1639290631Savos if (uvp->bcn_mbuf == NULL) { 1640290631Savos device_printf(sc->sc_dev, 1641290631Savos "%s: could not allocate beacon frame\n", __func__); 1642290631Savos URTWN_UNLOCK(sc); 1643290631Savos return; 1644290631Savos } 1645290631Savos } 1646290631Savos URTWN_UNLOCK(sc); 1647290631Savos 1648290631Savos if (item == IEEE80211_BEACON_TIM) 1649290631Savos mcast = 1; /* XXX */ 1650290631Savos 1651290631Savos setbit(bo->bo_flags, item); 1652290631Savos ieee80211_beacon_update(ni, uvp->bcn_mbuf, mcast); 1653290631Savos 1654290631Savos URTWN_LOCK(sc); 1655290631Savos urtwn_tx_beacon(sc, uvp); 1656290631Savos URTWN_UNLOCK(sc); 1657290631Savos} 1658290631Savos 1659290631Savos/* 1660290631Savos * Push a beacon frame into the chip. Beacon will 1661290631Savos * be repeated by the chip every R92C_BCN_INTERVAL. 1662290631Savos */ 1663290631Savosstatic int 1664290631Savosurtwn_tx_beacon(struct urtwn_softc *sc, struct urtwn_vap *uvp) 1665290631Savos{ 1666290631Savos struct r92c_tx_desc *desc = &uvp->bcn_desc; 1667290631Savos struct urtwn_data *bf; 1668290631Savos 1669290631Savos URTWN_ASSERT_LOCKED(sc); 1670290631Savos 1671290631Savos bf = urtwn_getbuf(sc); 1672290631Savos if (bf == NULL) 1673290631Savos return (ENOMEM); 1674290631Savos 1675290631Savos memcpy(bf->buf, desc, sizeof(*desc)); 1676290631Savos urtwn_tx_start(sc, uvp->bcn_mbuf, IEEE80211_FC0_TYPE_MGT, bf); 1677290631Savos 1678290631Savos sc->sc_txtimer = 5; 1679290631Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 1680290631Savos 1681290631Savos return (0); 1682290631Savos} 1683290631Savos 1684290631Savosstatic void 1685290651Savosurtwn_tsf_task_adhoc(void *arg, int pending) 1686290651Savos{ 1687290651Savos struct ieee80211vap *vap = arg; 1688290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1689290651Savos struct ieee80211_node *ni; 1690290651Savos uint32_t reg; 1691290651Savos 1692290651Savos URTWN_LOCK(sc); 1693290651Savos ni = ieee80211_ref_node(vap->iv_bss); 1694290651Savos reg = urtwn_read_1(sc, R92C_BCN_CTRL); 1695290651Savos 1696290651Savos /* Accept beacons with the same BSSID. */ 1697290651Savos urtwn_set_rx_bssid_all(sc, 0); 1698290651Savos 1699290651Savos /* Enable synchronization. */ 1700290651Savos reg &= ~R92C_BCN_CTRL_DIS_TSF_UDT0; 1701290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 1702290651Savos 1703290651Savos /* Synchronize. */ 1704290651Savos usb_pause_mtx(&sc->sc_mtx, hz * ni->ni_intval * 5 / 1000); 1705290651Savos 1706290651Savos /* Disable synchronization. */ 1707290651Savos reg |= R92C_BCN_CTRL_DIS_TSF_UDT0; 1708290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 1709290651Savos 1710290651Savos /* Remove beacon filter. */ 1711290651Savos urtwn_set_rx_bssid_all(sc, 1); 1712290651Savos 1713290651Savos /* Enable beaconing. */ 1714290651Savos urtwn_write_1(sc, R92C_MBID_NUM, 1715290651Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 1716290651Savos reg |= R92C_BCN_CTRL_EN_BCN; 1717290651Savos 1718290651Savos urtwn_write_1(sc, R92C_BCN_CTRL, reg); 1719290651Savos ieee80211_free_node(ni); 1720290651Savos URTWN_UNLOCK(sc); 1721290651Savos} 1722290651Savos 1723290651Savosstatic void 1724290631Savosurtwn_tsf_sync_enable(struct urtwn_softc *sc, struct ieee80211vap *vap) 1725290631Savos{ 1726290651Savos struct ieee80211com *ic = &sc->sc_ic; 1727290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1728290651Savos 1729290631Savos /* Reset TSF. */ 1730290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 1731290631Savos 1732290631Savos switch (vap->iv_opmode) { 1733290631Savos case IEEE80211_M_STA: 1734290631Savos /* Enable TSF synchronization. */ 1735290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 1736290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) & 1737290631Savos ~R92C_BCN_CTRL_DIS_TSF_UDT0); 1738290631Savos break; 1739290651Savos case IEEE80211_M_IBSS: 1740290651Savos ieee80211_runtask(ic, &uvp->tsf_task_adhoc); 1741290651Savos break; 1742290631Savos case IEEE80211_M_HOSTAP: 1743290631Savos /* Enable beaconing. */ 1744290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 1745290631Savos urtwn_read_1(sc, R92C_MBID_NUM) | R92C_MBID_TXBCN_RPT0); 1746290631Savos urtwn_write_1(sc, R92C_BCN_CTRL, 1747290631Savos urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 1748290631Savos break; 1749290631Savos default: 1750290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 1751290631Savos vap->iv_opmode); 1752290631Savos return; 1753290631Savos } 1754290631Savos} 1755290631Savos 1756290631Savosstatic void 1757251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 1758251538Srpaulo{ 1759251538Srpaulo uint8_t reg; 1760281069Srpaulo 1761251538Srpaulo if (led == URTWN_LED_LINK) { 1762264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 1763264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0xf0; 1764264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, reg | 0x60); 1765264912Skevlo if (!on) { 1766264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG2) & 0x90; 1767264912Skevlo urtwn_write_1(sc, R92C_LEDCFG2, 1768264912Skevlo reg | R92C_LEDCFG0_DIS); 1769264912Skevlo urtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 1770264912Skevlo urtwn_read_1(sc, R92C_MAC_PINMUX_CFG) & 1771264912Skevlo 0xfe); 1772264912Skevlo } 1773264912Skevlo } else { 1774264912Skevlo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 1775264912Skevlo if (!on) 1776264912Skevlo reg |= R92C_LEDCFG0_DIS; 1777264912Skevlo urtwn_write_1(sc, R92C_LEDCFG0, reg); 1778264912Skevlo } 1779264912Skevlo sc->ledlink = on; /* Save LED state. */ 1780251538Srpaulo } 1781251538Srpaulo} 1782251538Srpaulo 1783289811Savosstatic void 1784289811Savosurtwn_set_mode(struct urtwn_softc *sc, uint8_t mode) 1785289811Savos{ 1786289811Savos uint8_t reg; 1787289811Savos 1788289811Savos reg = urtwn_read_1(sc, R92C_MSR); 1789289811Savos reg = (reg & ~R92C_MSR_MASK) | mode; 1790289811Savos urtwn_write_1(sc, R92C_MSR, reg); 1791289811Savos} 1792289811Savos 1793290651Savosstatic void 1794290651Savosurtwn_ibss_recv_mgmt(struct ieee80211_node *ni, struct mbuf *m, int subtype, 1795290651Savos const struct ieee80211_rx_stats *rxs, 1796290651Savos int rssi, int nf) 1797290651Savos{ 1798290651Savos struct ieee80211vap *vap = ni->ni_vap; 1799290651Savos struct urtwn_softc *sc = vap->iv_ic->ic_softc; 1800290651Savos struct urtwn_vap *uvp = URTWN_VAP(vap); 1801290651Savos uint64_t ni_tstamp, curr_tstamp; 1802290651Savos 1803290651Savos uvp->recv_mgmt(ni, m, subtype, rxs, rssi, nf); 1804290651Savos 1805290651Savos if (vap->iv_state == IEEE80211_S_RUN && 1806290651Savos (subtype == IEEE80211_FC0_SUBTYPE_BEACON || 1807290651Savos subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)) { 1808290651Savos ni_tstamp = le64toh(ni->ni_tstamp.tsf); 1809290651Savos#ifdef D3831 1810290651Savos URTWN_LOCK(sc); 1811290651Savos urtwn_get_tsf(sc, &curr_tstamp); 1812290651Savos URTWN_UNLOCK(sc); 1813290651Savos curr_tstamp = le64toh(curr_tstamp); 1814290651Savos 1815290651Savos if (ni_tstamp >= curr_tstamp) 1816290651Savos (void) ieee80211_ibss_merge(ni); 1817290651Savos#else 1818290651Savos (void) sc; 1819290651Savos (void) curr_tstamp; 1820290651Savos#endif 1821290651Savos } 1822290651Savos} 1823290651Savos 1824251538Srpaulostatic int 1825251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1826251538Srpaulo{ 1827251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 1828251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 1829286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 1830251538Srpaulo struct ieee80211_node *ni; 1831251538Srpaulo enum ieee80211_state ostate; 1832290631Savos uint32_t reg; 1833290631Savos uint8_t mode; 1834290631Savos int error = 0; 1835251538Srpaulo 1836251538Srpaulo ostate = vap->iv_state; 1837251538Srpaulo DPRINTF("%s -> %s\n", ieee80211_state_name[ostate], 1838251538Srpaulo ieee80211_state_name[nstate]); 1839251538Srpaulo 1840251538Srpaulo IEEE80211_UNLOCK(ic); 1841251538Srpaulo URTWN_LOCK(sc); 1842251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 1843251538Srpaulo 1844251538Srpaulo if (ostate == IEEE80211_S_RUN) { 1845251538Srpaulo /* Turn link LED off. */ 1846251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 1847251538Srpaulo 1848251538Srpaulo /* Set media status to 'No Link'. */ 1849289811Savos urtwn_set_mode(sc, R92C_MSR_NOLINK); 1850251538Srpaulo 1851251538Srpaulo /* Stop Rx of data frames. */ 1852251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 1853251538Srpaulo 1854251538Srpaulo /* Disable TSF synchronization. */ 1855251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 1856290631Savos (urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN) | 1857251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 1858251538Srpaulo 1859290631Savos /* Disable beaconing. */ 1860290631Savos urtwn_write_1(sc, R92C_MBID_NUM, 1861290631Savos urtwn_read_1(sc, R92C_MBID_NUM) & ~R92C_MBID_TXBCN_RPT0); 1862290631Savos 1863290631Savos /* Reset TSF. */ 1864290631Savos urtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RST0); 1865290631Savos 1866251538Srpaulo /* Reset EDCA parameters. */ 1867251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 1868251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 1869251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 1870251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 1871251538Srpaulo } 1872251538Srpaulo 1873251538Srpaulo switch (nstate) { 1874251538Srpaulo case IEEE80211_S_INIT: 1875251538Srpaulo /* Turn link LED off. */ 1876251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 1877251538Srpaulo break; 1878251538Srpaulo case IEEE80211_S_SCAN: 1879251538Srpaulo /* Pause AC Tx queues. */ 1880251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 1881251538Srpaulo urtwn_read_1(sc, R92C_TXPAUSE) | 0x0f); 1882251538Srpaulo break; 1883251538Srpaulo case IEEE80211_S_AUTH: 1884251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 1885251538Srpaulo break; 1886251538Srpaulo case IEEE80211_S_RUN: 1887251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 1888251538Srpaulo /* Turn link LED on. */ 1889251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 1890251538Srpaulo break; 1891251538Srpaulo } 1892251538Srpaulo 1893251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1894290631Savos 1895290631Savos if (ic->ic_bsschan == IEEE80211_CHAN_ANYC || 1896290631Savos ni->ni_chan == IEEE80211_CHAN_ANYC) { 1897290631Savos device_printf(sc->sc_dev, 1898290631Savos "%s: could not move to RUN state\n", __func__); 1899290631Savos error = EINVAL; 1900290631Savos goto end_run; 1901290631Savos } 1902290631Savos 1903290631Savos switch (vap->iv_opmode) { 1904290631Savos case IEEE80211_M_STA: 1905290631Savos mode = R92C_MSR_INFRA; 1906290631Savos break; 1907290651Savos case IEEE80211_M_IBSS: 1908290651Savos mode = R92C_MSR_ADHOC; 1909290651Savos break; 1910290631Savos case IEEE80211_M_HOSTAP: 1911290631Savos mode = R92C_MSR_AP; 1912290631Savos break; 1913290631Savos default: 1914290631Savos device_printf(sc->sc_dev, "undefined opmode %d\n", 1915290631Savos vap->iv_opmode); 1916290631Savos error = EINVAL; 1917290631Savos goto end_run; 1918290631Savos } 1919290631Savos 1920251538Srpaulo /* Set media status to 'Associated'. */ 1921290631Savos urtwn_set_mode(sc, mode); 1922251538Srpaulo 1923251538Srpaulo /* Set BSSID. */ 1924251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 0, LE_READ_4(&ni->ni_bssid[0])); 1925251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 4, LE_READ_2(&ni->ni_bssid[4])); 1926251538Srpaulo 1927251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 1928251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 1929251538Srpaulo else /* 802.11b/g */ 1930251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 1931251538Srpaulo 1932251538Srpaulo /* Enable Rx of data frames. */ 1933251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 1934251538Srpaulo 1935251538Srpaulo /* Flush all AC queues. */ 1936251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 1937251538Srpaulo 1938251538Srpaulo /* Set beacon interval. */ 1939251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 1940251538Srpaulo 1941251538Srpaulo /* Allow Rx from our BSSID only. */ 1942290564Savos if (ic->ic_promisc == 0) { 1943290631Savos reg = urtwn_read_4(sc, R92C_RCR); 1944290631Savos 1945290631Savos if (vap->iv_opmode != IEEE80211_M_HOSTAP) 1946290631Savos reg |= R92C_RCR_CBSSID_DATA; 1947290651Savos if (vap->iv_opmode != IEEE80211_M_IBSS) 1948290651Savos reg |= R92C_RCR_CBSSID_BCN; 1949290631Savos 1950290631Savos urtwn_write_4(sc, R92C_RCR, reg); 1951290564Savos } 1952251538Srpaulo 1953290651Savos if (vap->iv_opmode == IEEE80211_M_HOSTAP || 1954290651Savos vap->iv_opmode == IEEE80211_M_IBSS) { 1955290631Savos error = urtwn_setup_beacon(sc, ni); 1956290631Savos if (error != 0) { 1957290631Savos device_printf(sc->sc_dev, 1958290631Savos "unable to push beacon into the chip, " 1959290631Savos "error %d\n", error); 1960290631Savos goto end_run; 1961290631Savos } 1962290631Savos } 1963290631Savos 1964251538Srpaulo /* Enable TSF synchronization. */ 1965290631Savos urtwn_tsf_sync_enable(sc, vap); 1966251538Srpaulo 1967251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 1968251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 1969251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 1970251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 1971251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 1972251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 1973251538Srpaulo 1974251538Srpaulo /* Intialize rate adaptation. */ 1975264912Skevlo if (sc->chip & URTWN_CHIP_88E) 1976264912Skevlo ni->ni_txrate = 1977264912Skevlo ni->ni_rates.rs_rates[ni->ni_rates.rs_nrates-1]; 1978281069Srpaulo else 1979264912Skevlo urtwn_ra_init(sc); 1980251538Srpaulo /* Turn link LED on. */ 1981251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 1982251538Srpaulo 1983251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 1984251538Srpaulo /* Reset temperature calibration state machine. */ 1985251538Srpaulo sc->thcal_state = 0; 1986251538Srpaulo sc->thcal_lctemp = 0; 1987290631Savos 1988290631Savosend_run: 1989251538Srpaulo ieee80211_free_node(ni); 1990251538Srpaulo break; 1991251538Srpaulo default: 1992251538Srpaulo break; 1993251538Srpaulo } 1994290631Savos 1995251538Srpaulo URTWN_UNLOCK(sc); 1996251538Srpaulo IEEE80211_LOCK(ic); 1997290631Savos return (error != 0 ? error : uvp->newstate(vap, nstate, arg)); 1998251538Srpaulo} 1999251538Srpaulo 2000251538Srpaulostatic void 2001251538Srpaulourtwn_watchdog(void *arg) 2002251538Srpaulo{ 2003251538Srpaulo struct urtwn_softc *sc = arg; 2004251538Srpaulo 2005251538Srpaulo if (sc->sc_txtimer > 0) { 2006251538Srpaulo if (--sc->sc_txtimer == 0) { 2007251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 2008287197Sglebius counter_u64_add(sc->sc_ic.ic_oerrors, 1); 2009251538Srpaulo return; 2010251538Srpaulo } 2011251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2012251538Srpaulo } 2013251538Srpaulo} 2014251538Srpaulo 2015251538Srpaulostatic void 2016251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 2017251538Srpaulo{ 2018251538Srpaulo int pwdb; 2019251538Srpaulo 2020251538Srpaulo /* Convert antenna signal to percentage. */ 2021251538Srpaulo if (rssi <= -100 || rssi >= 20) 2022251538Srpaulo pwdb = 0; 2023251538Srpaulo else if (rssi >= 0) 2024251538Srpaulo pwdb = 100; 2025251538Srpaulo else 2026251538Srpaulo pwdb = 100 + rssi; 2027264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2028289758Savos if (rate <= URTWN_RIDX_CCK11) { 2029264912Skevlo /* CCK gain is smaller than OFDM/MCS gain. */ 2030264912Skevlo pwdb += 6; 2031264912Skevlo if (pwdb > 100) 2032264912Skevlo pwdb = 100; 2033264912Skevlo if (pwdb <= 14) 2034264912Skevlo pwdb -= 4; 2035264912Skevlo else if (pwdb <= 26) 2036264912Skevlo pwdb -= 8; 2037264912Skevlo else if (pwdb <= 34) 2038264912Skevlo pwdb -= 6; 2039264912Skevlo else if (pwdb <= 42) 2040264912Skevlo pwdb -= 2; 2041264912Skevlo } 2042251538Srpaulo } 2043251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 2044251538Srpaulo sc->avg_pwdb = pwdb; 2045251538Srpaulo else if (sc->avg_pwdb < pwdb) 2046251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 2047251538Srpaulo else 2048251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 2049251538Srpaulo DPRINTFN(4, "PWDB=%d EMA=%d\n", pwdb, sc->avg_pwdb); 2050251538Srpaulo} 2051251538Srpaulo 2052251538Srpaulostatic int8_t 2053251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2054251538Srpaulo{ 2055251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 2056251538Srpaulo struct r92c_rx_phystat *phy; 2057251538Srpaulo struct r92c_rx_cck *cck; 2058251538Srpaulo uint8_t rpt; 2059251538Srpaulo int8_t rssi; 2060251538Srpaulo 2061289758Savos if (rate <= URTWN_RIDX_CCK11) { 2062251538Srpaulo cck = (struct r92c_rx_cck *)physt; 2063251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 2064251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 2065251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 2066251538Srpaulo } else { 2067251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 2068251538Srpaulo rssi = cck->agc_rpt & 0x3e; 2069251538Srpaulo } 2070251538Srpaulo rssi = cckoff[rpt] - rssi; 2071251538Srpaulo } else { /* OFDM/HT. */ 2072251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 2073251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2074251538Srpaulo } 2075251538Srpaulo return (rssi); 2076251538Srpaulo} 2077251538Srpaulo 2078264912Skevlostatic int8_t 2079264912Skevlourtwn_r88e_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 2080264912Skevlo{ 2081264912Skevlo struct r92c_rx_phystat *phy; 2082264912Skevlo struct r88e_rx_cck *cck; 2083264912Skevlo uint8_t cck_agc_rpt, lna_idx, vga_idx; 2084264912Skevlo int8_t rssi; 2085264912Skevlo 2086264972Skevlo rssi = 0; 2087289758Savos if (rate <= URTWN_RIDX_CCK11) { 2088264912Skevlo cck = (struct r88e_rx_cck *)physt; 2089264912Skevlo cck_agc_rpt = cck->agc_rpt; 2090264912Skevlo lna_idx = (cck_agc_rpt & 0xe0) >> 5; 2091281069Srpaulo vga_idx = cck_agc_rpt & 0x1f; 2092264912Skevlo switch (lna_idx) { 2093264912Skevlo case 7: 2094264912Skevlo if (vga_idx <= 27) 2095264912Skevlo rssi = -100 + 2* (27 - vga_idx); 2096264912Skevlo else 2097264912Skevlo rssi = -100; 2098264912Skevlo break; 2099264912Skevlo case 6: 2100264912Skevlo rssi = -48 + 2 * (2 - vga_idx); 2101264912Skevlo break; 2102264912Skevlo case 5: 2103264912Skevlo rssi = -42 + 2 * (7 - vga_idx); 2104264912Skevlo break; 2105264912Skevlo case 4: 2106264912Skevlo rssi = -36 + 2 * (7 - vga_idx); 2107264912Skevlo break; 2108264912Skevlo case 3: 2109264912Skevlo rssi = -24 + 2 * (7 - vga_idx); 2110264912Skevlo break; 2111264912Skevlo case 2: 2112264912Skevlo rssi = -12 + 2 * (5 - vga_idx); 2113264912Skevlo break; 2114264912Skevlo case 1: 2115264912Skevlo rssi = 8 - (2 * vga_idx); 2116264912Skevlo break; 2117264912Skevlo case 0: 2118264912Skevlo rssi = 14 - (2 * vga_idx); 2119264912Skevlo break; 2120264912Skevlo } 2121264912Skevlo rssi += 6; 2122264912Skevlo } else { /* OFDM/HT. */ 2123264912Skevlo phy = (struct r92c_rx_phystat *)physt; 2124264912Skevlo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 2125264912Skevlo } 2126264912Skevlo return (rssi); 2127264912Skevlo} 2128264912Skevlo 2129251538Srpaulostatic int 2130290630Savosurtwn_tx_data(struct urtwn_softc *sc, struct ieee80211_node *ni, 2131290630Savos struct mbuf *m, struct urtwn_data *data) 2132251538Srpaulo{ 2133251538Srpaulo struct ieee80211_frame *wh; 2134290630Savos struct ieee80211_key *k = NULL; 2135287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 2136251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 2137251538Srpaulo struct r92c_tx_desc *txd; 2138290630Savos uint8_t macid, raid, ridx, subtype, type, qsel; 2139290630Savos int ismcast; 2140251538Srpaulo 2141251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2142251538Srpaulo 2143251538Srpaulo /* 2144251538Srpaulo * Software crypto. 2145251538Srpaulo */ 2146290630Savos wh = mtod(m, struct ieee80211_frame *); 2147264912Skevlo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2148290630Savos subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2149290630Savos ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2150264912Skevlo 2151260444Skevlo if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 2152290630Savos k = ieee80211_crypto_encap(ni, m); 2153251538Srpaulo if (k == NULL) { 2154251538Srpaulo device_printf(sc->sc_dev, 2155251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 2156251538Srpaulo return (ENOBUFS); 2157251538Srpaulo } 2158251538Srpaulo 2159251538Srpaulo /* in case packet header moved, reset pointer */ 2160290630Savos wh = mtod(m, struct ieee80211_frame *); 2161251538Srpaulo } 2162281069Srpaulo 2163251538Srpaulo /* Fill Tx descriptor. */ 2164251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 2165251538Srpaulo memset(txd, 0, sizeof(*txd)); 2166251538Srpaulo 2167251538Srpaulo txd->txdw0 |= htole32( 2168251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 2169251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 2170290630Savos if (ismcast) 2171251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 2172290630Savos 2173290630Savos raid = R92C_RAID_11B; /* by default */ 2174290630Savos ridx = URTWN_RIDX_CCK1; 2175290630Savos if (!ismcast) { 2176290630Savos macid = URTWN_MACID_BSS; 2177290630Savos 2178290630Savos if (type == IEEE80211_FC0_TYPE_DATA) { 2179290630Savos qsel = R92C_TXDW1_QSEL_BE; 2180290630Savos 2181290630Savos if (!(m->m_flags & M_EAPOL)) { 2182290630Savos if (ic->ic_curmode != IEEE80211_MODE_11B) { 2183290630Savos raid = R92C_RAID_11BG; 2184290630Savos ridx = URTWN_RIDX_OFDM54; 2185290630Savos } else 2186290630Savos ridx = URTWN_RIDX_CCK11; 2187251538Srpaulo } 2188290630Savos 2189290630Savos if (sc->chip & URTWN_CHIP_88E) 2190290630Savos txd->txdw2 |= htole32(R88E_TXDW2_AGGBK); 2191290630Savos else 2192290630Savos txd->txdw1 |= htole32(R92C_TXDW1_AGGBK); 2193290630Savos 2194290630Savos if (ic->ic_flags & IEEE80211_F_USEPROT) { 2195290630Savos switch (ic->ic_protmode) { 2196290630Savos case IEEE80211_PROT_CTSONLY: 2197290630Savos txd->txdw4 |= htole32( 2198290630Savos R92C_TXDW4_CTS2SELF | 2199290630Savos R92C_TXDW4_HWRTSEN); 2200290630Savos break; 2201290630Savos case IEEE80211_PROT_RTSCTS: 2202290630Savos txd->txdw4 |= htole32( 2203290630Savos R92C_TXDW4_RTSEN | 2204290630Savos R92C_TXDW4_HWRTSEN); 2205290630Savos break; 2206290630Savos default: 2207290630Savos break; 2208290630Savos } 2209290630Savos } 2210290630Savos txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 2211290630Savos URTWN_RIDX_OFDM24)); 2212290630Savos txd->txdw5 |= htole32(0x0001ff00); 2213290630Savos } else /* IEEE80211_FC0_TYPE_MGT */ 2214290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2215251538Srpaulo } else { 2216290630Savos macid = URTWN_MACID_BC; 2217290630Savos qsel = R92C_TXDW1_QSEL_MGNT; 2218290630Savos } 2219251538Srpaulo 2220290630Savos txd->txdw1 |= htole32( 2221290630Savos SM(R92C_TXDW1_QSEL, qsel) | 2222290630Savos SM(R92C_TXDW1_RAID, raid)); 2223290630Savos 2224290630Savos if (sc->chip & URTWN_CHIP_88E) 2225290630Savos txd->txdw1 |= htole32(SM(R88E_TXDW1_MACID, macid)); 2226290630Savos else 2227290630Savos txd->txdw1 |= htole32(SM(R92C_TXDW1_MACID, macid)); 2228290630Savos 2229290630Savos txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, ridx)); 2230290630Savos /* not sure here */ 2231290630Savos if (ridx <= URTWN_RIDX_CCK11) 2232251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 2233251538Srpaulo 2234288534Sadrian if (!IEEE80211_QOS_HAS_SEQ(wh)) { 2235251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 2236290630Savos txd->txdseq = htole16(R92C_TXDSEQ_HWSEQ_EN); 2237290630Savos } else { 2238290630Savos /* Set sequence number. */ 2239290630Savos txd->txdseq = htole16(M_SEQNO_GET(m) % IEEE80211_SEQ_RANGE); 2240290630Savos } 2241251538Srpaulo 2242251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 2243251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 2244251538Srpaulo 2245251538Srpaulo tap->wt_flags = 0; 2246251538Srpaulo tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 2247251538Srpaulo tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 2248290630Savos if (k != NULL) 2249290630Savos tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2250290630Savos ieee80211_radiotap_tx(vap, m); 2251251538Srpaulo } 2252251538Srpaulo 2253290630Savos data->ni = ni; 2254251538Srpaulo 2255290630Savos urtwn_tx_start(sc, m, type, data); 2256290630Savos 2257290630Savos return (0); 2258290630Savos} 2259290630Savos 2260290630Savosstatic void 2261290630Savosurtwn_tx_start(struct urtwn_softc *sc, struct mbuf *m, uint8_t type, 2262290630Savos struct urtwn_data *data) 2263290630Savos{ 2264290630Savos struct usb_xfer *xfer; 2265290630Savos struct r92c_tx_desc *txd; 2266290630Savos uint16_t ac, sum; 2267290630Savos int i, xferlen; 2268290630Savos struct usb_xfer *urtwn_pipes[WME_NUM_AC] = { 2269290630Savos sc->sc_xfer[URTWN_BULK_TX_BE], 2270290630Savos sc->sc_xfer[URTWN_BULK_TX_BK], 2271290630Savos sc->sc_xfer[URTWN_BULK_TX_VI], 2272290630Savos sc->sc_xfer[URTWN_BULK_TX_VO] 2273290630Savos }; 2274290630Savos 2275290630Savos URTWN_ASSERT_LOCKED(sc); 2276290630Savos 2277290630Savos ac = M_WME_GETAC(m); 2278290630Savos 2279290630Savos switch (type) { 2280290630Savos case IEEE80211_FC0_TYPE_CTL: 2281290630Savos case IEEE80211_FC0_TYPE_MGT: 2282290630Savos xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 2283290630Savos break; 2284290630Savos default: 2285290630Savos xfer = urtwn_pipes[ac]; 2286290630Savos break; 2287290630Savos } 2288290630Savos 2289290630Savos txd = (struct r92c_tx_desc *)data->buf; 2290290630Savos txd->txdw0 |= htole32(SM(R92C_TXDW0_PKTLEN, m->m_pkthdr.len)); 2291290630Savos 2292290630Savos /* Compute Tx descriptor checksum. */ 2293290630Savos sum = 0; 2294290630Savos for (i = 0; i < sizeof(*txd) / 2; i++) 2295290630Savos sum ^= ((uint16_t *)txd)[i]; 2296290630Savos txd->txdsum = sum; /* NB: already little endian. */ 2297290630Savos 2298290630Savos xferlen = sizeof(*txd) + m->m_pkthdr.len; 2299290630Savos m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&txd[1]); 2300290630Savos 2301251538Srpaulo data->buflen = xferlen; 2302290630Savos data->m = m; 2303251538Srpaulo 2304251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 2305251538Srpaulo usbd_transfer_start(xfer); 2306251538Srpaulo} 2307251538Srpaulo 2308287197Sglebiusstatic int 2309287197Sglebiusurtwn_transmit(struct ieee80211com *ic, struct mbuf *m) 2310251538Srpaulo{ 2311287197Sglebius struct urtwn_softc *sc = ic->ic_softc; 2312287197Sglebius int error; 2313261863Srpaulo 2314261863Srpaulo URTWN_LOCK(sc); 2315287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 2316287197Sglebius URTWN_UNLOCK(sc); 2317287197Sglebius return (ENXIO); 2318287197Sglebius } 2319287197Sglebius error = mbufq_enqueue(&sc->sc_snd, m); 2320287197Sglebius if (error) { 2321287197Sglebius URTWN_UNLOCK(sc); 2322287197Sglebius return (error); 2323287197Sglebius } 2324287197Sglebius urtwn_start(sc); 2325261863Srpaulo URTWN_UNLOCK(sc); 2326287197Sglebius 2327287197Sglebius return (0); 2328261863Srpaulo} 2329261863Srpaulo 2330261863Srpaulostatic void 2331287197Sglebiusurtwn_start(struct urtwn_softc *sc) 2332261863Srpaulo{ 2333251538Srpaulo struct ieee80211_node *ni; 2334251538Srpaulo struct mbuf *m; 2335251538Srpaulo struct urtwn_data *bf; 2336251538Srpaulo 2337261863Srpaulo URTWN_ASSERT_LOCKED(sc); 2338287197Sglebius while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 2339251538Srpaulo bf = urtwn_getbuf(sc); 2340251538Srpaulo if (bf == NULL) { 2341287197Sglebius mbufq_prepend(&sc->sc_snd, m); 2342251538Srpaulo break; 2343251538Srpaulo } 2344251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 2345251538Srpaulo m->m_pkthdr.rcvif = NULL; 2346290630Savos if (urtwn_tx_data(sc, ni, m, bf) != 0) { 2347287197Sglebius if_inc_counter(ni->ni_vap->iv_ifp, 2348287197Sglebius IFCOUNTER_OERRORS, 1); 2349251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 2350288353Sadrian m_freem(m); 2351251538Srpaulo ieee80211_free_node(ni); 2352251538Srpaulo break; 2353251538Srpaulo } 2354251538Srpaulo sc->sc_txtimer = 5; 2355251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2356251538Srpaulo } 2357251538Srpaulo} 2358251538Srpaulo 2359287197Sglebiusstatic void 2360287197Sglebiusurtwn_parent(struct ieee80211com *ic) 2361251538Srpaulo{ 2362286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 2363287197Sglebius int startall = 0; 2364251538Srpaulo 2365263153Skevlo URTWN_LOCK(sc); 2366287197Sglebius if (sc->sc_flags & URTWN_DETACHED) { 2367287197Sglebius URTWN_UNLOCK(sc); 2368287197Sglebius return; 2369287197Sglebius } 2370287197Sglebius if (ic->ic_nrunning > 0) { 2371287197Sglebius if ((sc->sc_flags & URTWN_RUNNING) == 0) { 2372287197Sglebius urtwn_init(sc); 2373287197Sglebius startall = 1; 2374287197Sglebius } 2375287197Sglebius } else if (sc->sc_flags & URTWN_RUNNING) 2376287197Sglebius urtwn_stop(sc); 2377263153Skevlo URTWN_UNLOCK(sc); 2378263153Skevlo 2379287197Sglebius if (startall) 2380287197Sglebius ieee80211_start_all(ic); 2381251538Srpaulo} 2382251538Srpaulo 2383264912Skevlostatic __inline int 2384251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 2385251538Srpaulo{ 2386264912Skevlo 2387264912Skevlo return sc->sc_power_on(sc); 2388264912Skevlo} 2389264912Skevlo 2390264912Skevlostatic int 2391264912Skevlourtwn_r92c_power_on(struct urtwn_softc *sc) 2392264912Skevlo{ 2393251538Srpaulo uint32_t reg; 2394251538Srpaulo int ntries; 2395251538Srpaulo 2396251538Srpaulo /* Wait for autoload done bit. */ 2397251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2398251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 2399251538Srpaulo break; 2400266472Shselasky urtwn_ms_delay(sc); 2401251538Srpaulo } 2402251538Srpaulo if (ntries == 1000) { 2403251538Srpaulo device_printf(sc->sc_dev, 2404251538Srpaulo "timeout waiting for chip autoload\n"); 2405251538Srpaulo return (ETIMEDOUT); 2406251538Srpaulo } 2407251538Srpaulo 2408251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 2409251538Srpaulo urtwn_write_1(sc, R92C_RSV_CTRL, 0); 2410251538Srpaulo /* Move SPS into PWM mode. */ 2411251538Srpaulo urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 2412266472Shselasky urtwn_ms_delay(sc); 2413251538Srpaulo 2414251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 2415251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 2416251538Srpaulo urtwn_write_1(sc, R92C_LDOV12D_CTRL, 2417251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 2418266472Shselasky urtwn_ms_delay(sc); 2419251538Srpaulo urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 2420251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 2421251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 2422251538Srpaulo } 2423251538Srpaulo 2424251538Srpaulo /* Auto enable WLAN. */ 2425251538Srpaulo urtwn_write_2(sc, R92C_APS_FSMCO, 2426251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 2427251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2428262822Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 2429262822Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 2430251538Srpaulo break; 2431266472Shselasky urtwn_ms_delay(sc); 2432251538Srpaulo } 2433251538Srpaulo if (ntries == 1000) { 2434251538Srpaulo device_printf(sc->sc_dev, 2435251538Srpaulo "timeout waiting for MAC auto ON\n"); 2436251538Srpaulo return (ETIMEDOUT); 2437251538Srpaulo } 2438251538Srpaulo 2439251538Srpaulo /* Enable radio, GPIO and LED functions. */ 2440251538Srpaulo urtwn_write_2(sc, R92C_APS_FSMCO, 2441251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 2442251538Srpaulo R92C_APS_FSMCO_PDN_EN | 2443251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 2444251538Srpaulo /* Release RF digital isolation. */ 2445251538Srpaulo urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 2446251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 2447251538Srpaulo 2448251538Srpaulo /* Initialize MAC. */ 2449251538Srpaulo urtwn_write_1(sc, R92C_APSD_CTRL, 2450251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 2451251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 2452251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 2453251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 2454251538Srpaulo break; 2455266472Shselasky urtwn_ms_delay(sc); 2456251538Srpaulo } 2457251538Srpaulo if (ntries == 200) { 2458251538Srpaulo device_printf(sc->sc_dev, 2459251538Srpaulo "timeout waiting for MAC initialization\n"); 2460251538Srpaulo return (ETIMEDOUT); 2461251538Srpaulo } 2462251538Srpaulo 2463251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 2464251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 2465251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 2466251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 2467251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 2468251538Srpaulo R92C_CR_ENSEC; 2469251538Srpaulo urtwn_write_2(sc, R92C_CR, reg); 2470251538Srpaulo 2471251538Srpaulo urtwn_write_1(sc, 0xfe10, 0x19); 2472251538Srpaulo return (0); 2473251538Srpaulo} 2474251538Srpaulo 2475251538Srpaulostatic int 2476264912Skevlourtwn_r88e_power_on(struct urtwn_softc *sc) 2477264912Skevlo{ 2478264912Skevlo uint32_t reg; 2479264912Skevlo int ntries; 2480264912Skevlo 2481264912Skevlo /* Wait for power ready bit. */ 2482264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 2483281918Skevlo if (urtwn_read_4(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_SUS_HOST) 2484264912Skevlo break; 2485266472Shselasky urtwn_ms_delay(sc); 2486264912Skevlo } 2487264912Skevlo if (ntries == 5000) { 2488264912Skevlo device_printf(sc->sc_dev, 2489264912Skevlo "timeout waiting for chip power up\n"); 2490264912Skevlo return (ETIMEDOUT); 2491264912Skevlo } 2492264912Skevlo 2493264912Skevlo /* Reset BB. */ 2494264912Skevlo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 2495264912Skevlo urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB | 2496264912Skevlo R92C_SYS_FUNC_EN_BB_GLB_RST)); 2497264912Skevlo 2498281918Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, 2499281918Skevlo urtwn_read_1(sc, R92C_AFE_XTAL_CTRL + 2) | 0x80); 2500264912Skevlo 2501264912Skevlo /* Disable HWPDN. */ 2502281918Skevlo urtwn_write_2(sc, R92C_APS_FSMCO, 2503281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN); 2504264912Skevlo 2505264912Skevlo /* Disable WL suspend. */ 2506281918Skevlo urtwn_write_2(sc, R92C_APS_FSMCO, 2507281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) & 2508281918Skevlo ~(R92C_APS_FSMCO_AFSM_HSUS | R92C_APS_FSMCO_AFSM_PCIE)); 2509264912Skevlo 2510281918Skevlo urtwn_write_2(sc, R92C_APS_FSMCO, 2511281918Skevlo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 2512264912Skevlo for (ntries = 0; ntries < 5000; ntries++) { 2513281918Skevlo if (!(urtwn_read_2(sc, R92C_APS_FSMCO) & 2514281918Skevlo R92C_APS_FSMCO_APFM_ONMAC)) 2515264912Skevlo break; 2516266472Shselasky urtwn_ms_delay(sc); 2517264912Skevlo } 2518264912Skevlo if (ntries == 5000) 2519264912Skevlo return (ETIMEDOUT); 2520264912Skevlo 2521264912Skevlo /* Enable LDO normal mode. */ 2522281918Skevlo urtwn_write_1(sc, R92C_LPLDO_CTRL, 2523281918Skevlo urtwn_read_1(sc, R92C_LPLDO_CTRL) & ~0x10); 2524264912Skevlo 2525264912Skevlo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 2526264912Skevlo urtwn_write_2(sc, R92C_CR, 0); 2527264912Skevlo reg = urtwn_read_2(sc, R92C_CR); 2528264912Skevlo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 2529264912Skevlo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 2530264912Skevlo R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC | R92C_CR_CALTMR_EN; 2531264912Skevlo urtwn_write_2(sc, R92C_CR, reg); 2532264912Skevlo 2533264912Skevlo return (0); 2534264912Skevlo} 2535264912Skevlo 2536264912Skevlostatic int 2537251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 2538251538Srpaulo{ 2539264912Skevlo int i, error, page_count, pktbuf_count; 2540251538Srpaulo 2541264912Skevlo page_count = (sc->chip & URTWN_CHIP_88E) ? 2542264912Skevlo R88E_TX_PAGE_COUNT : R92C_TX_PAGE_COUNT; 2543264912Skevlo pktbuf_count = (sc->chip & URTWN_CHIP_88E) ? 2544264912Skevlo R88E_TXPKTBUF_COUNT : R92C_TXPKTBUF_COUNT; 2545264912Skevlo 2546264912Skevlo /* Reserve pages [0; page_count]. */ 2547264912Skevlo for (i = 0; i < page_count; i++) { 2548251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 2549251538Srpaulo return (error); 2550251538Srpaulo } 2551251538Srpaulo /* NB: 0xff indicates end-of-list. */ 2552251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 2553251538Srpaulo return (error); 2554251538Srpaulo /* 2555264912Skevlo * Use pages [page_count + 1; pktbuf_count - 1] 2556251538Srpaulo * as ring buffer. 2557251538Srpaulo */ 2558264912Skevlo for (++i; i < pktbuf_count - 1; i++) { 2559251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 2560251538Srpaulo return (error); 2561251538Srpaulo } 2562251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 2563264912Skevlo error = urtwn_llt_write(sc, i, page_count + 1); 2564251538Srpaulo return (error); 2565251538Srpaulo} 2566251538Srpaulo 2567251538Srpaulostatic void 2568251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 2569251538Srpaulo{ 2570251538Srpaulo uint16_t reg; 2571251538Srpaulo int ntries; 2572251538Srpaulo 2573251538Srpaulo /* Tell 8051 to reset itself. */ 2574251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 2575251538Srpaulo 2576251538Srpaulo /* Wait until 8051 resets by itself. */ 2577251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 2578251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 2579251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 2580251538Srpaulo return; 2581266472Shselasky urtwn_ms_delay(sc); 2582251538Srpaulo } 2583251538Srpaulo /* Force 8051 reset. */ 2584251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 2585251538Srpaulo} 2586251538Srpaulo 2587264912Skevlostatic void 2588264912Skevlourtwn_r88e_fw_reset(struct urtwn_softc *sc) 2589264912Skevlo{ 2590264912Skevlo uint16_t reg; 2591264912Skevlo 2592264912Skevlo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 2593264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 2594264912Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN); 2595264912Skevlo} 2596264912Skevlo 2597251538Srpaulostatic int 2598251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 2599251538Srpaulo{ 2600251538Srpaulo uint32_t reg; 2601251538Srpaulo int off, mlen, error = 0; 2602251538Srpaulo 2603251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 2604251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 2605251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 2606251538Srpaulo 2607251538Srpaulo off = R92C_FW_START_ADDR; 2608251538Srpaulo while (len > 0) { 2609251538Srpaulo if (len > 196) 2610251538Srpaulo mlen = 196; 2611251538Srpaulo else if (len > 4) 2612251538Srpaulo mlen = 4; 2613251538Srpaulo else 2614251538Srpaulo mlen = 1; 2615251538Srpaulo /* XXX fix this deconst */ 2616281069Srpaulo error = urtwn_write_region_1(sc, off, 2617251538Srpaulo __DECONST(uint8_t *, buf), mlen); 2618251538Srpaulo if (error != 0) 2619251538Srpaulo break; 2620251538Srpaulo off += mlen; 2621251538Srpaulo buf += mlen; 2622251538Srpaulo len -= mlen; 2623251538Srpaulo } 2624251538Srpaulo return (error); 2625251538Srpaulo} 2626251538Srpaulo 2627251538Srpaulostatic int 2628251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 2629251538Srpaulo{ 2630251538Srpaulo const struct firmware *fw; 2631251538Srpaulo const struct r92c_fw_hdr *hdr; 2632251538Srpaulo const char *imagename; 2633251538Srpaulo const u_char *ptr; 2634251538Srpaulo size_t len; 2635251538Srpaulo uint32_t reg; 2636251538Srpaulo int mlen, ntries, page, error; 2637251538Srpaulo 2638264864Skevlo URTWN_UNLOCK(sc); 2639251538Srpaulo /* Read firmware image from the filesystem. */ 2640264912Skevlo if (sc->chip & URTWN_CHIP_88E) 2641264912Skevlo imagename = "urtwn-rtl8188eufw"; 2642264912Skevlo else if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 2643264912Skevlo URTWN_CHIP_UMC_A_CUT) 2644251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 2645251538Srpaulo else 2646251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 2647251538Srpaulo 2648251538Srpaulo fw = firmware_get(imagename); 2649264864Skevlo URTWN_LOCK(sc); 2650251538Srpaulo if (fw == NULL) { 2651251538Srpaulo device_printf(sc->sc_dev, 2652251538Srpaulo "failed loadfirmware of file %s\n", imagename); 2653251538Srpaulo return (ENOENT); 2654251538Srpaulo } 2655251538Srpaulo 2656251538Srpaulo len = fw->datasize; 2657251538Srpaulo 2658251538Srpaulo if (len < sizeof(*hdr)) { 2659251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 2660251538Srpaulo error = EINVAL; 2661251538Srpaulo goto fail; 2662251538Srpaulo } 2663251538Srpaulo ptr = fw->data; 2664251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 2665251538Srpaulo /* Check if there is a valid FW header and skip it. */ 2666251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 2667264912Skevlo (le16toh(hdr->signature) >> 4) == 0x88e || 2668251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 2669251538Srpaulo DPRINTF("FW V%d.%d %02d-%02d %02d:%02d\n", 2670251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 2671251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 2672251538Srpaulo ptr += sizeof(*hdr); 2673251538Srpaulo len -= sizeof(*hdr); 2674251538Srpaulo } 2675251538Srpaulo 2676264912Skevlo if (urtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL) { 2677264912Skevlo if (sc->chip & URTWN_CHIP_88E) 2678264912Skevlo urtwn_r88e_fw_reset(sc); 2679264912Skevlo else 2680264912Skevlo urtwn_fw_reset(sc); 2681251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 2682251538Srpaulo } 2683264912Skevlo 2684268487Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2685268487Skevlo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 2686268487Skevlo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 2687268487Skevlo R92C_SYS_FUNC_EN_CPUEN); 2688268487Skevlo } 2689251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 2690251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 2691251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 2692251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 2693251538Srpaulo 2694263154Skevlo /* Reset the FWDL checksum. */ 2695263154Skevlo urtwn_write_1(sc, R92C_MCUFWDL, 2696263154Skevlo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT); 2697263154Skevlo 2698251538Srpaulo for (page = 0; len > 0; page++) { 2699251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 2700251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 2701251538Srpaulo if (error != 0) { 2702251538Srpaulo device_printf(sc->sc_dev, 2703251538Srpaulo "could not load firmware page\n"); 2704251538Srpaulo goto fail; 2705251538Srpaulo } 2706251538Srpaulo ptr += mlen; 2707251538Srpaulo len -= mlen; 2708251538Srpaulo } 2709251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 2710251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 2711251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 2712251538Srpaulo 2713251538Srpaulo /* Wait for checksum report. */ 2714251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2715251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 2716251538Srpaulo break; 2717266472Shselasky urtwn_ms_delay(sc); 2718251538Srpaulo } 2719251538Srpaulo if (ntries == 1000) { 2720251538Srpaulo device_printf(sc->sc_dev, 2721251538Srpaulo "timeout waiting for checksum report\n"); 2722251538Srpaulo error = ETIMEDOUT; 2723251538Srpaulo goto fail; 2724251538Srpaulo } 2725251538Srpaulo 2726251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 2727251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 2728251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 2729264912Skevlo if (sc->chip & URTWN_CHIP_88E) 2730264912Skevlo urtwn_r88e_fw_reset(sc); 2731251538Srpaulo /* Wait for firmware readiness. */ 2732251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2733251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 2734251538Srpaulo break; 2735266472Shselasky urtwn_ms_delay(sc); 2736251538Srpaulo } 2737251538Srpaulo if (ntries == 1000) { 2738251538Srpaulo device_printf(sc->sc_dev, 2739251538Srpaulo "timeout waiting for firmware readiness\n"); 2740251538Srpaulo error = ETIMEDOUT; 2741251538Srpaulo goto fail; 2742251538Srpaulo } 2743251538Srpaulofail: 2744251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 2745251538Srpaulo return (error); 2746251538Srpaulo} 2747251538Srpaulo 2748264912Skevlostatic __inline int 2749251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 2750251538Srpaulo{ 2751291695Savos int error; 2752281069Srpaulo 2753291695Savos /* Initialize LLT table. */ 2754291695Savos error = urtwn_llt_init(sc); 2755291695Savos if (error != 0) 2756291695Savos return (error); 2757291695Savos 2758291695Savos error = sc->sc_dma_init(sc); 2759291695Savos if (error != 0) 2760291695Savos return (error); 2761291695Savos 2762291695Savos /* Set Tx/Rx transfer page size. */ 2763291695Savos urtwn_write_1(sc, R92C_PBP, 2764291695Savos SM(R92C_PBP_PSRX, R92C_PBP_128) | 2765291695Savos SM(R92C_PBP_PSTX, R92C_PBP_128)); 2766291695Savos 2767291695Savos return (0); 2768264912Skevlo} 2769264912Skevlo 2770264912Skevlostatic int 2771264912Skevlourtwn_r92c_dma_init(struct urtwn_softc *sc) 2772264912Skevlo{ 2773251538Srpaulo int hashq, hasnq, haslq, nqueues, nqpages, nrempages; 2774251538Srpaulo uint32_t reg; 2775251538Srpaulo 2776251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 2777251538Srpaulo hashq = hasnq = haslq = 0; 2778251538Srpaulo reg = urtwn_read_2(sc, R92C_USB_EP + 1); 2779251538Srpaulo DPRINTFN(2, "USB endpoints mapping 0x%x\n", reg); 2780251538Srpaulo if (MS(reg, R92C_USB_EP_HQ) != 0) 2781251538Srpaulo hashq = 1; 2782251538Srpaulo if (MS(reg, R92C_USB_EP_NQ) != 0) 2783251538Srpaulo hasnq = 1; 2784251538Srpaulo if (MS(reg, R92C_USB_EP_LQ) != 0) 2785251538Srpaulo haslq = 1; 2786251538Srpaulo nqueues = hashq + hasnq + haslq; 2787251538Srpaulo if (nqueues == 0) 2788251538Srpaulo return (EIO); 2789251538Srpaulo /* Get the number of pages for each queue. */ 2790251538Srpaulo nqpages = (R92C_TX_PAGE_COUNT - R92C_PUBQ_NPAGES) / nqueues; 2791251538Srpaulo /* The remaining pages are assigned to the high priority queue. */ 2792251538Srpaulo nrempages = (R92C_TX_PAGE_COUNT - R92C_PUBQ_NPAGES) % nqueues; 2793251538Srpaulo 2794251538Srpaulo /* Set number of pages for normal priority queue. */ 2795251538Srpaulo urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 2796251538Srpaulo urtwn_write_4(sc, R92C_RQPN, 2797251538Srpaulo /* Set number of pages for public queue. */ 2798251538Srpaulo SM(R92C_RQPN_PUBQ, R92C_PUBQ_NPAGES) | 2799251538Srpaulo /* Set number of pages for high priority queue. */ 2800251538Srpaulo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 2801251538Srpaulo /* Set number of pages for low priority queue. */ 2802251538Srpaulo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 2803251538Srpaulo /* Load values. */ 2804251538Srpaulo R92C_RQPN_LD); 2805251538Srpaulo 2806251538Srpaulo urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, R92C_TX_PAGE_BOUNDARY); 2807251538Srpaulo urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, R92C_TX_PAGE_BOUNDARY); 2808251538Srpaulo urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, R92C_TX_PAGE_BOUNDARY); 2809251538Srpaulo urtwn_write_1(sc, R92C_TRXFF_BNDY, R92C_TX_PAGE_BOUNDARY); 2810251538Srpaulo urtwn_write_1(sc, R92C_TDECTRL + 1, R92C_TX_PAGE_BOUNDARY); 2811251538Srpaulo 2812251538Srpaulo /* Set queue to USB pipe mapping. */ 2813251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 2814251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 2815251538Srpaulo if (nqueues == 1) { 2816251538Srpaulo if (hashq) 2817251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 2818251538Srpaulo else if (hasnq) 2819251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 2820251538Srpaulo else 2821251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 2822251538Srpaulo } else if (nqueues == 2) { 2823251538Srpaulo /* All 2-endpoints configs have a high priority queue. */ 2824251538Srpaulo if (!hashq) 2825251538Srpaulo return (EIO); 2826251538Srpaulo if (hasnq) 2827251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 2828251538Srpaulo else 2829251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_LQ; 2830251538Srpaulo } else 2831251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 2832251538Srpaulo urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 2833251538Srpaulo 2834251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 2835251538Srpaulo urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 0x27ff); 2836251538Srpaulo 2837251538Srpaulo return (0); 2838251538Srpaulo} 2839251538Srpaulo 2840264912Skevlostatic int 2841264912Skevlourtwn_r88e_dma_init(struct urtwn_softc *sc) 2842264912Skevlo{ 2843264912Skevlo struct usb_interface *iface; 2844264912Skevlo uint32_t reg; 2845264912Skevlo int nqueues; 2846264912Skevlo 2847264912Skevlo /* Get Tx queues to USB endpoints mapping. */ 2848264912Skevlo iface = usbd_get_iface(sc->sc_udev, 0); 2849264912Skevlo nqueues = iface->idesc->bNumEndpoints - 1; 2850264912Skevlo if (nqueues == 0) 2851264912Skevlo return (EIO); 2852264912Skevlo 2853264912Skevlo /* Set number of pages for normal priority queue. */ 2854264912Skevlo urtwn_write_2(sc, R92C_RQPN_NPQ, 0x000d); 2855264912Skevlo urtwn_write_4(sc, R92C_RQPN, 0x808e000d); 2856264912Skevlo 2857264912Skevlo urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, R88E_TX_PAGE_BOUNDARY); 2858264912Skevlo urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, R88E_TX_PAGE_BOUNDARY); 2859264912Skevlo urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, R88E_TX_PAGE_BOUNDARY); 2860264912Skevlo urtwn_write_1(sc, R92C_TRXFF_BNDY, R88E_TX_PAGE_BOUNDARY); 2861264912Skevlo urtwn_write_1(sc, R92C_TDECTRL + 1, R88E_TX_PAGE_BOUNDARY); 2862264912Skevlo 2863264912Skevlo /* Set queue to USB pipe mapping. */ 2864264912Skevlo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 2865264912Skevlo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 2866264912Skevlo if (nqueues == 1) 2867264912Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 2868264912Skevlo else if (nqueues == 2) 2869264912Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 2870264912Skevlo else 2871264912Skevlo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 2872264912Skevlo urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 2873264912Skevlo 2874264912Skevlo /* Set Tx/Rx transfer page boundary. */ 2875264912Skevlo urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 0x23ff); 2876264912Skevlo 2877264912Skevlo return (0); 2878264912Skevlo} 2879264912Skevlo 2880251538Srpaulostatic void 2881251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 2882251538Srpaulo{ 2883251538Srpaulo int i; 2884251538Srpaulo 2885251538Srpaulo /* Write MAC initialization values. */ 2886264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 2887264912Skevlo for (i = 0; i < nitems(rtl8188eu_mac); i++) { 2888264912Skevlo urtwn_write_1(sc, rtl8188eu_mac[i].reg, 2889264912Skevlo rtl8188eu_mac[i].val); 2890264912Skevlo } 2891264912Skevlo urtwn_write_1(sc, R92C_MAX_AGGR_NUM, 0x07); 2892264912Skevlo } else { 2893264912Skevlo for (i = 0; i < nitems(rtl8192cu_mac); i++) 2894264912Skevlo urtwn_write_1(sc, rtl8192cu_mac[i].reg, 2895264912Skevlo rtl8192cu_mac[i].val); 2896264912Skevlo } 2897251538Srpaulo} 2898251538Srpaulo 2899251538Srpaulostatic void 2900251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 2901251538Srpaulo{ 2902251538Srpaulo const struct urtwn_bb_prog *prog; 2903251538Srpaulo uint32_t reg; 2904264912Skevlo uint8_t crystalcap; 2905251538Srpaulo int i; 2906251538Srpaulo 2907251538Srpaulo /* Enable BB and RF. */ 2908251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 2909251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 2910251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 2911251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 2912251538Srpaulo 2913264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 2914264912Skevlo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 2915251538Srpaulo 2916251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 2917251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 2918251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 2919251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 2920251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 2921251538Srpaulo 2922264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 2923264912Skevlo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 2924264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 2925264912Skevlo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 2926264912Skevlo } 2927251538Srpaulo 2928251538Srpaulo /* Select BB programming based on board type. */ 2929264912Skevlo if (sc->chip & URTWN_CHIP_88E) 2930264912Skevlo prog = &rtl8188eu_bb_prog; 2931264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 2932251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 2933251538Srpaulo prog = &rtl8188ce_bb_prog; 2934251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 2935251538Srpaulo prog = &rtl8188ru_bb_prog; 2936251538Srpaulo else 2937251538Srpaulo prog = &rtl8188cu_bb_prog; 2938251538Srpaulo } else { 2939251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 2940251538Srpaulo prog = &rtl8192ce_bb_prog; 2941251538Srpaulo else 2942251538Srpaulo prog = &rtl8192cu_bb_prog; 2943251538Srpaulo } 2944251538Srpaulo /* Write BB initialization values. */ 2945251538Srpaulo for (i = 0; i < prog->count; i++) { 2946251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 2947266472Shselasky urtwn_ms_delay(sc); 2948251538Srpaulo } 2949251538Srpaulo 2950251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 2951251538Srpaulo /* 8192C 1T only configuration. */ 2952251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 2953251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 2954251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 2955251538Srpaulo 2956251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 2957251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 2958251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 2959251538Srpaulo 2960251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 2961251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 2962251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 2963251538Srpaulo 2964251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 2965251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 2966251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 2967251538Srpaulo 2968251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 2969251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 2970251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 2971251538Srpaulo 2972251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 2973251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 2974251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 2975251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 2976251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 2977251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 2978251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 2979251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 2980251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 2981251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 2982251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 2983251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 2984251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 2985251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 2986251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 2987251538Srpaulo } 2988251538Srpaulo 2989251538Srpaulo /* Write AGC values. */ 2990251538Srpaulo for (i = 0; i < prog->agccount; i++) { 2991251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 2992251538Srpaulo prog->agcvals[i]); 2993266472Shselasky urtwn_ms_delay(sc); 2994251538Srpaulo } 2995251538Srpaulo 2996264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 2997264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422); 2998266472Shselasky urtwn_ms_delay(sc); 2999264912Skevlo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420); 3000266472Shselasky urtwn_ms_delay(sc); 3001264912Skevlo 3002291264Savos crystalcap = sc->rom.r88e_rom[0xb9]; 3003264912Skevlo if (crystalcap == 0xff) 3004264912Skevlo crystalcap = 0x20; 3005264912Skevlo crystalcap &= 0x3f; 3006264912Skevlo reg = urtwn_bb_read(sc, R92C_AFE_XTAL_CTRL); 3007264912Skevlo urtwn_bb_write(sc, R92C_AFE_XTAL_CTRL, 3008264912Skevlo RW(reg, R92C_AFE_XTAL_CTRL_ADDR, 3009264912Skevlo crystalcap | crystalcap << 6)); 3010264912Skevlo } else { 3011264912Skevlo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 3012264912Skevlo R92C_HSSI_PARAM2_CCK_HIPWR) 3013264912Skevlo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 3014264912Skevlo } 3015251538Srpaulo} 3016251538Srpaulo 3017289066Skevlostatic void 3018251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 3019251538Srpaulo{ 3020251538Srpaulo const struct urtwn_rf_prog *prog; 3021251538Srpaulo uint32_t reg, type; 3022251538Srpaulo int i, j, idx, off; 3023251538Srpaulo 3024251538Srpaulo /* Select RF programming based on board type. */ 3025264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3026264912Skevlo prog = rtl8188eu_rf_prog; 3027264912Skevlo else if (!(sc->chip & URTWN_CHIP_92C)) { 3028251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 3029251538Srpaulo prog = rtl8188ce_rf_prog; 3030251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3031251538Srpaulo prog = rtl8188ru_rf_prog; 3032251538Srpaulo else 3033251538Srpaulo prog = rtl8188cu_rf_prog; 3034251538Srpaulo } else 3035251538Srpaulo prog = rtl8192ce_rf_prog; 3036251538Srpaulo 3037251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3038251538Srpaulo /* Save RF_ENV control type. */ 3039251538Srpaulo idx = i / 2; 3040251538Srpaulo off = (i % 2) * 16; 3041251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 3042251538Srpaulo type = (reg >> off) & 0x10; 3043251538Srpaulo 3044251538Srpaulo /* Set RF_ENV enable. */ 3045251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 3046251538Srpaulo reg |= 0x100000; 3047251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 3048266472Shselasky urtwn_ms_delay(sc); 3049251538Srpaulo /* Set RF_ENV output high. */ 3050251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 3051251538Srpaulo reg |= 0x10; 3052251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 3053266472Shselasky urtwn_ms_delay(sc); 3054251538Srpaulo /* Set address and data lengths of RF registers. */ 3055251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 3056251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 3057251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 3058266472Shselasky urtwn_ms_delay(sc); 3059251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 3060251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 3061251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 3062266472Shselasky urtwn_ms_delay(sc); 3063251538Srpaulo 3064251538Srpaulo /* Write RF initialization values for this chain. */ 3065251538Srpaulo for (j = 0; j < prog[i].count; j++) { 3066251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 3067251538Srpaulo prog[i].regs[j] <= 0xfe) { 3068251538Srpaulo /* 3069251538Srpaulo * These are fake RF registers offsets that 3070251538Srpaulo * indicate a delay is required. 3071251538Srpaulo */ 3072266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 20); /* 50ms */ 3073251538Srpaulo continue; 3074251538Srpaulo } 3075251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 3076251538Srpaulo prog[i].vals[j]); 3077266472Shselasky urtwn_ms_delay(sc); 3078251538Srpaulo } 3079251538Srpaulo 3080251538Srpaulo /* Restore RF_ENV control type. */ 3081251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 3082251538Srpaulo reg &= ~(0x10 << off) | (type << off); 3083251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 3084251538Srpaulo 3085251538Srpaulo /* Cache RF register CHNLBW. */ 3086251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 3087251538Srpaulo } 3088251538Srpaulo 3089251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 3090251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 3091251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 3092251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 3093251538Srpaulo } 3094251538Srpaulo} 3095251538Srpaulo 3096251538Srpaulostatic void 3097251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 3098251538Srpaulo{ 3099251538Srpaulo /* Invalidate all CAM entries. */ 3100251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 3101251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 3102251538Srpaulo} 3103251538Srpaulo 3104251538Srpaulostatic void 3105251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 3106251538Srpaulo{ 3107251538Srpaulo uint8_t reg; 3108251538Srpaulo int i; 3109251538Srpaulo 3110251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3111251538Srpaulo if (sc->pa_setting & (1 << i)) 3112251538Srpaulo continue; 3113251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 3114251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 3115251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 3116251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 3117251538Srpaulo } 3118251538Srpaulo if (!(sc->pa_setting & 0x10)) { 3119251538Srpaulo reg = urtwn_read_1(sc, 0x16); 3120251538Srpaulo reg = (reg & ~0xf0) | 0x90; 3121251538Srpaulo urtwn_write_1(sc, 0x16, reg); 3122251538Srpaulo } 3123251538Srpaulo} 3124251538Srpaulo 3125251538Srpaulostatic void 3126251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 3127251538Srpaulo{ 3128290564Savos struct ieee80211com *ic = &sc->sc_ic; 3129290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3130290564Savos uint32_t rcr; 3131290564Savos uint16_t filter; 3132290564Savos 3133290564Savos URTWN_ASSERT_LOCKED(sc); 3134290564Savos 3135251538Srpaulo /* Accept all multicast frames. */ 3136251538Srpaulo urtwn_write_4(sc, R92C_MAR + 0, 0xffffffff); 3137251538Srpaulo urtwn_write_4(sc, R92C_MAR + 4, 0xffffffff); 3138290564Savos 3139290564Savos /* Filter for management frames. */ 3140290564Savos filter = 0x7f3f; 3141290631Savos switch (vap->iv_opmode) { 3142290631Savos case IEEE80211_M_STA: 3143290564Savos filter &= ~( 3144290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_REQ) | 3145290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_REQ) | 3146290564Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_PROBE_REQ)); 3147290631Savos break; 3148290631Savos case IEEE80211_M_HOSTAP: 3149290631Savos filter &= ~( 3150290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_ASSOC_RESP) | 3151290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_REASSOC_RESP) | 3152290631Savos R92C_RXFLTMAP_SUBTYPE(IEEE80211_FC0_SUBTYPE_BEACON)); 3153290631Savos break; 3154290631Savos case IEEE80211_M_MONITOR: 3155290651Savos case IEEE80211_M_IBSS: 3156290631Savos break; 3157290631Savos default: 3158290631Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 3159290631Savos __func__, vap->iv_opmode); 3160290631Savos break; 3161290564Savos } 3162290564Savos urtwn_write_2(sc, R92C_RXFLTMAP0, filter); 3163290564Savos 3164251538Srpaulo /* Reject all control frames. */ 3165251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 3166290564Savos 3167290564Savos /* Reject all data frames. */ 3168290564Savos urtwn_write_2(sc, R92C_RXFLTMAP2, 0x0000); 3169290564Savos 3170290564Savos rcr = R92C_RCR_AM | R92C_RCR_AB | R92C_RCR_APM | 3171290564Savos R92C_RCR_HTC_LOC_CTRL | R92C_RCR_APP_PHYSTS | 3172290564Savos R92C_RCR_APP_ICV | R92C_RCR_APP_MIC; 3173290564Savos 3174290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) { 3175290564Savos /* Accept all frames. */ 3176290564Savos rcr |= R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | 3177290564Savos R92C_RCR_AAP; 3178290564Savos } 3179290564Savos 3180290564Savos /* Set Rx filter. */ 3181290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 3182290564Savos 3183290564Savos if (ic->ic_promisc != 0) { 3184290564Savos /* Update Rx filter. */ 3185290564Savos urtwn_set_promisc(sc); 3186290564Savos } 3187251538Srpaulo} 3188251538Srpaulo 3189251538Srpaulostatic void 3190251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 3191251538Srpaulo{ 3192251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 3193251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 3194251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 3195251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 3196251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 3197251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 3198251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 3199251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 3200251538Srpaulo} 3201251538Srpaulo 3202289066Skevlostatic void 3203251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 3204251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 3205251538Srpaulo{ 3206251538Srpaulo uint32_t reg; 3207251538Srpaulo 3208251538Srpaulo /* Write per-CCK rate Tx power. */ 3209251538Srpaulo if (chain == 0) { 3210251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 3211251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 3212251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 3213251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 3214251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 3215251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 3216251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 3217251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 3218251538Srpaulo } else { 3219251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 3220251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 3221251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 3222251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 3223251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 3224251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 3225251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 3226251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 3227251538Srpaulo } 3228251538Srpaulo /* Write per-OFDM rate Tx power. */ 3229251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 3230251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 3231251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 3232251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 3233251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 3234251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 3235251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 3236251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 3237251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 3238251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 3239251538Srpaulo /* Write per-MCS Tx power. */ 3240251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 3241251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 3242251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 3243251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 3244251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 3245251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 3246251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 3247251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 3248251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 3249251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 3250251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 3251251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 3252261506Skevlo SM(R92C_TXAGC_MCS09, power[21]) | 3253251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 3254251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 3255251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 3256251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 3257251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 3258251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 3259251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 3260251538Srpaulo} 3261251538Srpaulo 3262289066Skevlostatic void 3263251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 3264251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 3265251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 3266251538Srpaulo{ 3267287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3268291264Savos struct r92c_rom *rom = &sc->rom.r92c_rom; 3269251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 3270251538Srpaulo const struct urtwn_txpwr *base; 3271251538Srpaulo int ridx, chan, group; 3272251538Srpaulo 3273251538Srpaulo /* Determine channel group. */ 3274251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3275251538Srpaulo if (chan <= 3) 3276251538Srpaulo group = 0; 3277251538Srpaulo else if (chan <= 9) 3278251538Srpaulo group = 1; 3279251538Srpaulo else 3280251538Srpaulo group = 2; 3281251538Srpaulo 3282251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 3283251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 3284251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 3285251538Srpaulo base = &rtl8188ru_txagc[chain]; 3286251538Srpaulo else 3287251538Srpaulo base = &rtl8192cu_txagc[chain]; 3288251538Srpaulo } else 3289251538Srpaulo base = &rtl8192cu_txagc[chain]; 3290251538Srpaulo 3291251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 3292251538Srpaulo if (sc->regulatory == 0) { 3293289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 3294251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3295251538Srpaulo } 3296289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 3297251538Srpaulo if (sc->regulatory == 3) { 3298251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3299251538Srpaulo /* Apply vendor limits. */ 3300251538Srpaulo if (extc != NULL) 3301251538Srpaulo max = rom->ht40_max_pwr[group]; 3302251538Srpaulo else 3303251538Srpaulo max = rom->ht20_max_pwr[group]; 3304251538Srpaulo max = (max >> (chain * 4)) & 0xf; 3305251538Srpaulo if (power[ridx] > max) 3306251538Srpaulo power[ridx] = max; 3307251538Srpaulo } else if (sc->regulatory == 1) { 3308251538Srpaulo if (extc == NULL) 3309251538Srpaulo power[ridx] = base->pwr[group][ridx]; 3310251538Srpaulo } else if (sc->regulatory != 2) 3311251538Srpaulo power[ridx] = base->pwr[0][ridx]; 3312251538Srpaulo } 3313251538Srpaulo 3314251538Srpaulo /* Compute per-CCK rate Tx power. */ 3315251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 3316289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 3317251538Srpaulo power[ridx] += cckpow; 3318251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3319251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3320251538Srpaulo } 3321251538Srpaulo 3322251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 3323251538Srpaulo if (sc->ntxchains > 1) { 3324251538Srpaulo /* Apply reduction for 2 spatial streams. */ 3325251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 3326251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3327251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 3328251538Srpaulo } 3329251538Srpaulo 3330251538Srpaulo /* Compute per-OFDM rate Tx power. */ 3331251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 3332251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3333251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 3334289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 3335251538Srpaulo power[ridx] += ofdmpow; 3336251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3337251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3338251538Srpaulo } 3339251538Srpaulo 3340251538Srpaulo /* Compute per-MCS Tx power. */ 3341251538Srpaulo if (extc == NULL) { 3342251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 3343251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 3344251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 3345251538Srpaulo } 3346251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 3347251538Srpaulo power[ridx] += htpow; 3348251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 3349251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 3350251538Srpaulo } 3351251538Srpaulo#ifdef URTWN_DEBUG 3352251538Srpaulo if (urtwn_debug >= 4) { 3353251538Srpaulo /* Dump per-rate Tx power values. */ 3354251538Srpaulo printf("Tx power for chain %d:\n", chain); 3355289758Savos for (ridx = URTWN_RIDX_CCK1; ridx < URTWN_RIDX_COUNT; ridx++) 3356251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 3357251538Srpaulo } 3358251538Srpaulo#endif 3359251538Srpaulo} 3360251538Srpaulo 3361289066Skevlostatic void 3362264912Skevlourtwn_r88e_get_txpower(struct urtwn_softc *sc, int chain, 3363264912Skevlo struct ieee80211_channel *c, struct ieee80211_channel *extc, 3364264912Skevlo uint16_t power[URTWN_RIDX_COUNT]) 3365264912Skevlo{ 3366287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3367264912Skevlo uint16_t cckpow, ofdmpow, bw20pow, htpow; 3368264912Skevlo const struct urtwn_r88e_txpwr *base; 3369264912Skevlo int ridx, chan, group; 3370264912Skevlo 3371264912Skevlo /* Determine channel group. */ 3372264912Skevlo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3373264912Skevlo if (chan <= 2) 3374264912Skevlo group = 0; 3375264912Skevlo else if (chan <= 5) 3376264912Skevlo group = 1; 3377264912Skevlo else if (chan <= 8) 3378264912Skevlo group = 2; 3379264912Skevlo else if (chan <= 11) 3380264912Skevlo group = 3; 3381264912Skevlo else if (chan <= 13) 3382264912Skevlo group = 4; 3383264912Skevlo else 3384264912Skevlo group = 5; 3385264912Skevlo 3386264912Skevlo /* Get original Tx power based on board type and RF chain. */ 3387264912Skevlo base = &rtl8188eu_txagc[chain]; 3388264912Skevlo 3389264912Skevlo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 3390264912Skevlo if (sc->regulatory == 0) { 3391289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) 3392264912Skevlo power[ridx] = base->pwr[0][ridx]; 3393264912Skevlo } 3394289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx < URTWN_RIDX_COUNT; ridx++) { 3395264912Skevlo if (sc->regulatory == 3) 3396264912Skevlo power[ridx] = base->pwr[0][ridx]; 3397264912Skevlo else if (sc->regulatory == 1) { 3398264912Skevlo if (extc == NULL) 3399264912Skevlo power[ridx] = base->pwr[group][ridx]; 3400264912Skevlo } else if (sc->regulatory != 2) 3401264912Skevlo power[ridx] = base->pwr[0][ridx]; 3402264912Skevlo } 3403264912Skevlo 3404264912Skevlo /* Compute per-CCK rate Tx power. */ 3405264912Skevlo cckpow = sc->cck_tx_pwr[group]; 3406289758Savos for (ridx = URTWN_RIDX_CCK1; ridx <= URTWN_RIDX_CCK11; ridx++) { 3407264912Skevlo power[ridx] += cckpow; 3408264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 3409264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 3410264912Skevlo } 3411264912Skevlo 3412264912Skevlo htpow = sc->ht40_tx_pwr[group]; 3413264912Skevlo 3414264912Skevlo /* Compute per-OFDM rate Tx power. */ 3415264912Skevlo ofdmpow = htpow + sc->ofdm_tx_pwr_diff; 3416289758Savos for (ridx = URTWN_RIDX_OFDM6; ridx <= URTWN_RIDX_OFDM54; ridx++) { 3417264912Skevlo power[ridx] += ofdmpow; 3418264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 3419264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 3420264912Skevlo } 3421264912Skevlo 3422264912Skevlo bw20pow = htpow + sc->bw20_tx_pwr_diff; 3423264912Skevlo for (ridx = 12; ridx <= 27; ridx++) { 3424264912Skevlo power[ridx] += bw20pow; 3425264912Skevlo if (power[ridx] > R92C_MAX_TX_PWR) 3426264912Skevlo power[ridx] = R92C_MAX_TX_PWR; 3427264912Skevlo } 3428264912Skevlo} 3429264912Skevlo 3430289066Skevlostatic void 3431251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 3432251538Srpaulo struct ieee80211_channel *extc) 3433251538Srpaulo{ 3434251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 3435251538Srpaulo int i; 3436251538Srpaulo 3437251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 3438251538Srpaulo /* Compute per-rate Tx power values. */ 3439264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3440264912Skevlo urtwn_r88e_get_txpower(sc, i, c, extc, power); 3441264912Skevlo else 3442264912Skevlo urtwn_get_txpower(sc, i, c, extc, power); 3443251538Srpaulo /* Write per-rate Tx power values to hardware. */ 3444251538Srpaulo urtwn_write_txpower(sc, i, power); 3445251538Srpaulo } 3446251538Srpaulo} 3447251538Srpaulo 3448251538Srpaulostatic void 3449290048Savosurtwn_set_rx_bssid_all(struct urtwn_softc *sc, int enable) 3450290048Savos{ 3451290048Savos uint32_t reg; 3452290048Savos 3453290048Savos reg = urtwn_read_4(sc, R92C_RCR); 3454290048Savos if (enable) 3455290048Savos reg &= ~R92C_RCR_CBSSID_BCN; 3456290048Savos else 3457290048Savos reg |= R92C_RCR_CBSSID_BCN; 3458290048Savos urtwn_write_4(sc, R92C_RCR, reg); 3459290048Savos} 3460290048Savos 3461290048Savosstatic void 3462290048Savosurtwn_set_gain(struct urtwn_softc *sc, uint8_t gain) 3463290048Savos{ 3464290048Savos uint32_t reg; 3465290048Savos 3466290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 3467290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 3468290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 3469290048Savos 3470290048Savos if (!(sc->chip & URTWN_CHIP_88E)) { 3471290048Savos reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 3472290048Savos reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, gain); 3473290048Savos urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 3474290048Savos } 3475290048Savos} 3476290048Savos 3477290048Savosstatic void 3478251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 3479251538Srpaulo{ 3480290048Savos struct urtwn_softc *sc = ic->ic_softc; 3481290048Savos 3482290048Savos URTWN_LOCK(sc); 3483290048Savos /* Receive beacons / probe responses from any BSSID. */ 3484290651Savos if (ic->ic_opmode != IEEE80211_M_IBSS) 3485290651Savos urtwn_set_rx_bssid_all(sc, 1); 3486290651Savos 3487290048Savos /* Set gain for scanning. */ 3488290048Savos urtwn_set_gain(sc, 0x20); 3489290048Savos URTWN_UNLOCK(sc); 3490251538Srpaulo} 3491251538Srpaulo 3492251538Srpaulostatic void 3493251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 3494251538Srpaulo{ 3495290048Savos struct urtwn_softc *sc = ic->ic_softc; 3496290048Savos 3497290048Savos URTWN_LOCK(sc); 3498290048Savos /* Restore limitations. */ 3499290651Savos if (ic->ic_promisc == 0 && ic->ic_opmode != IEEE80211_M_IBSS) 3500290564Savos urtwn_set_rx_bssid_all(sc, 0); 3501290651Savos 3502290048Savos /* Set gain under link. */ 3503290048Savos urtwn_set_gain(sc, 0x32); 3504290048Savos URTWN_UNLOCK(sc); 3505251538Srpaulo} 3506251538Srpaulo 3507251538Srpaulostatic void 3508251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 3509251538Srpaulo{ 3510286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 3511281070Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3512251538Srpaulo 3513251538Srpaulo URTWN_LOCK(sc); 3514281070Srpaulo if (vap->iv_state == IEEE80211_S_SCAN) { 3515281070Srpaulo /* Make link LED blink during scan. */ 3516281070Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 3517281070Srpaulo } 3518251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 3519251538Srpaulo URTWN_UNLOCK(sc); 3520251538Srpaulo} 3521251538Srpaulo 3522251538Srpaulostatic void 3523290564Savosurtwn_set_promisc(struct urtwn_softc *sc) 3524290564Savos{ 3525290564Savos struct ieee80211com *ic = &sc->sc_ic; 3526290564Savos struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3527290564Savos uint32_t rcr, mask1, mask2; 3528290564Savos 3529290564Savos URTWN_ASSERT_LOCKED(sc); 3530290564Savos 3531290564Savos if (vap->iv_opmode == IEEE80211_M_MONITOR) 3532290564Savos return; 3533290564Savos 3534290564Savos mask1 = R92C_RCR_ACF | R92C_RCR_ADF | R92C_RCR_AMF | R92C_RCR_AAP; 3535290564Savos mask2 = R92C_RCR_APM; 3536290564Savos 3537290564Savos if (vap->iv_state == IEEE80211_S_RUN) { 3538290564Savos switch (vap->iv_opmode) { 3539290564Savos case IEEE80211_M_STA: 3540290631Savos mask2 |= R92C_RCR_CBSSID_DATA; 3541290631Savos /* FALLTHROUGH */ 3542290631Savos case IEEE80211_M_HOSTAP: 3543290631Savos mask2 |= R92C_RCR_CBSSID_BCN; 3544290564Savos break; 3545290651Savos case IEEE80211_M_IBSS: 3546290651Savos mask2 |= R92C_RCR_CBSSID_DATA; 3547290651Savos break; 3548290564Savos default: 3549290564Savos device_printf(sc->sc_dev, "%s: undefined opmode %d\n", 3550290564Savos __func__, vap->iv_opmode); 3551290564Savos return; 3552290564Savos } 3553290564Savos } 3554290564Savos 3555290564Savos rcr = urtwn_read_4(sc, R92C_RCR); 3556290564Savos if (ic->ic_promisc == 0) 3557290564Savos rcr = (rcr & ~mask1) | mask2; 3558290564Savos else 3559290564Savos rcr = (rcr & ~mask2) | mask1; 3560290564Savos urtwn_write_4(sc, R92C_RCR, rcr); 3561290564Savos} 3562290564Savos 3563290564Savosstatic void 3564290564Savosurtwn_update_promisc(struct ieee80211com *ic) 3565290564Savos{ 3566290564Savos struct urtwn_softc *sc = ic->ic_softc; 3567290564Savos 3568290564Savos URTWN_LOCK(sc); 3569290564Savos if (sc->sc_flags & URTWN_RUNNING) 3570290564Savos urtwn_set_promisc(sc); 3571290564Savos URTWN_UNLOCK(sc); 3572290564Savos} 3573290564Savos 3574290564Savosstatic void 3575283540Sglebiusurtwn_update_mcast(struct ieee80211com *ic) 3576251538Srpaulo{ 3577251538Srpaulo /* XXX do nothing? */ 3578251538Srpaulo} 3579251538Srpaulo 3580251538Srpaulostatic void 3581251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 3582251538Srpaulo struct ieee80211_channel *extc) 3583251538Srpaulo{ 3584287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3585251538Srpaulo uint32_t reg; 3586251538Srpaulo u_int chan; 3587251538Srpaulo int i; 3588251538Srpaulo 3589251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 3590251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 3591251538Srpaulo device_printf(sc->sc_dev, 3592251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 3593251538Srpaulo return; 3594251538Srpaulo } 3595251538Srpaulo 3596251538Srpaulo /* Set Tx power for this new channel. */ 3597251538Srpaulo urtwn_set_txpower(sc, c, extc); 3598251538Srpaulo 3599251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3600251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 3601251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 3602251538Srpaulo } 3603251538Srpaulo#ifndef IEEE80211_NO_HT 3604251538Srpaulo if (extc != NULL) { 3605251538Srpaulo /* Is secondary channel below or above primary? */ 3606251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 3607251538Srpaulo 3608251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 3609251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 3610251538Srpaulo 3611251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 3612251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 3613251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 3614251538Srpaulo 3615251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 3616251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 3617251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 3618251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 3619251538Srpaulo 3620251538Srpaulo /* Set CCK side band. */ 3621251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 3622251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 3623251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 3624251538Srpaulo 3625251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 3626251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 3627251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 3628251538Srpaulo 3629251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 3630251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 3631251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 3632251538Srpaulo 3633251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 3634251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 3635251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 3636251538Srpaulo 3637251538Srpaulo /* Select 40MHz bandwidth. */ 3638251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 3639251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 3640251538Srpaulo } else 3641251538Srpaulo#endif 3642251538Srpaulo { 3643251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 3644251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 3645251538Srpaulo 3646251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 3647251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 3648251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 3649251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 3650251538Srpaulo 3651264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3652264912Skevlo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 3653264912Skevlo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 3654264912Skevlo R92C_FPGA0_ANAPARAM2_CBW20); 3655264912Skevlo } 3656281069Srpaulo 3657251538Srpaulo /* Select 20MHz bandwidth. */ 3658251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 3659281069Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan | 3660264912Skevlo ((sc->chip & URTWN_CHIP_88E) ? R88E_RF_CHNLBW_BW20 : 3661264912Skevlo R92C_RF_CHNLBW_BW20)); 3662251538Srpaulo } 3663251538Srpaulo} 3664251538Srpaulo 3665251538Srpaulostatic void 3666251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 3667251538Srpaulo{ 3668251538Srpaulo /* TODO */ 3669251538Srpaulo} 3670251538Srpaulo 3671251538Srpaulostatic void 3672251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 3673251538Srpaulo{ 3674251538Srpaulo uint32_t rf_ac[2]; 3675251538Srpaulo uint8_t txmode; 3676251538Srpaulo int i; 3677251538Srpaulo 3678251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 3679251538Srpaulo if ((txmode & 0x70) != 0) { 3680251538Srpaulo /* Disable all continuous Tx. */ 3681251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 3682251538Srpaulo 3683251538Srpaulo /* Set RF mode to standby mode. */ 3684251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 3685251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 3686251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 3687251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 3688251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 3689251538Srpaulo } 3690251538Srpaulo } else { 3691251538Srpaulo /* Block all Tx queues. */ 3692251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0xff); 3693251538Srpaulo } 3694251538Srpaulo /* Start calibration. */ 3695251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 3696251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 3697251538Srpaulo 3698251538Srpaulo /* Give calibration the time to complete. */ 3699266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 10); /* 100ms */ 3700251538Srpaulo 3701251538Srpaulo /* Restore configuration. */ 3702251538Srpaulo if ((txmode & 0x70) != 0) { 3703251538Srpaulo /* Restore Tx mode. */ 3704251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 3705251538Srpaulo /* Restore RF mode. */ 3706251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 3707251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 3708251538Srpaulo } else { 3709251538Srpaulo /* Unblock all Tx queues. */ 3710251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 3711251538Srpaulo } 3712251538Srpaulo} 3713251538Srpaulo 3714251538Srpaulostatic void 3715287197Sglebiusurtwn_init(struct urtwn_softc *sc) 3716251538Srpaulo{ 3717287197Sglebius struct ieee80211com *ic = &sc->sc_ic; 3718287197Sglebius struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3719287197Sglebius uint8_t macaddr[IEEE80211_ADDR_LEN]; 3720251538Srpaulo uint32_t reg; 3721251538Srpaulo int error; 3722251538Srpaulo 3723264864Skevlo URTWN_ASSERT_LOCKED(sc); 3724264864Skevlo 3725287197Sglebius if (sc->sc_flags & URTWN_RUNNING) 3726287197Sglebius urtwn_stop(sc); 3727251538Srpaulo 3728251538Srpaulo /* Init firmware commands ring. */ 3729251538Srpaulo sc->fwcur = 0; 3730251538Srpaulo 3731251538Srpaulo /* Allocate Tx/Rx buffers. */ 3732251538Srpaulo error = urtwn_alloc_rx_list(sc); 3733251538Srpaulo if (error != 0) 3734251538Srpaulo goto fail; 3735281069Srpaulo 3736251538Srpaulo error = urtwn_alloc_tx_list(sc); 3737251538Srpaulo if (error != 0) 3738251538Srpaulo goto fail; 3739251538Srpaulo 3740251538Srpaulo /* Power on adapter. */ 3741251538Srpaulo error = urtwn_power_on(sc); 3742251538Srpaulo if (error != 0) 3743251538Srpaulo goto fail; 3744251538Srpaulo 3745251538Srpaulo /* Initialize DMA. */ 3746251538Srpaulo error = urtwn_dma_init(sc); 3747251538Srpaulo if (error != 0) 3748251538Srpaulo goto fail; 3749251538Srpaulo 3750251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 3751251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 3752251538Srpaulo 3753251538Srpaulo /* Init interrupts. */ 3754264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 3755264912Skevlo urtwn_write_4(sc, R88E_HISR, 0xffffffff); 3756264912Skevlo urtwn_write_4(sc, R88E_HIMR, R88E_HIMR_CPWM | R88E_HIMR_CPWM2 | 3757264912Skevlo R88E_HIMR_TBDER | R88E_HIMR_PSTIMEOUT); 3758264912Skevlo urtwn_write_4(sc, R88E_HIMRE, R88E_HIMRE_RXFOVW | 3759264912Skevlo R88E_HIMRE_TXFOVW | R88E_HIMRE_RXERR | R88E_HIMRE_TXERR); 3760264912Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 3761264912Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 3762264912Skevlo R92C_USB_SPECIAL_OPTION_INT_BULK_SEL); 3763264912Skevlo } else { 3764264912Skevlo urtwn_write_4(sc, R92C_HISR, 0xffffffff); 3765264912Skevlo urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 3766264912Skevlo } 3767251538Srpaulo 3768251538Srpaulo /* Set MAC address. */ 3769287197Sglebius IEEE80211_ADDR_COPY(macaddr, vap ? vap->iv_myaddr : ic->ic_macaddr); 3770287197Sglebius urtwn_write_region_1(sc, R92C_MACID, macaddr, IEEE80211_ADDR_LEN); 3771251538Srpaulo 3772251538Srpaulo /* Set initial network type. */ 3773289811Savos urtwn_set_mode(sc, R92C_MSR_INFRA); 3774251538Srpaulo 3775290564Savos /* Initialize Rx filter. */ 3776251538Srpaulo urtwn_rxfilter_init(sc); 3777251538Srpaulo 3778282623Skevlo /* Set response rate. */ 3779251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 3780251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 3781251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 3782251538Srpaulo 3783251538Srpaulo /* Set short/long retry limits. */ 3784251538Srpaulo urtwn_write_2(sc, R92C_RL, 3785251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 3786251538Srpaulo 3787251538Srpaulo /* Initialize EDCA parameters. */ 3788251538Srpaulo urtwn_edca_init(sc); 3789251538Srpaulo 3790251538Srpaulo /* Setup rate fallback. */ 3791264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3792264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 3793264912Skevlo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 3794264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 3795264912Skevlo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 3796264912Skevlo } 3797251538Srpaulo 3798251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 3799251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 3800251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 3801251538Srpaulo /* Set ACK timeout. */ 3802251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 3803251538Srpaulo 3804251538Srpaulo /* Setup USB aggregation. */ 3805251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 3806251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 3807251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 3808251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 3809251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 3810251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 3811251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 3812264912Skevlo if (sc->chip & URTWN_CHIP_88E) 3813264912Skevlo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4); 3814282266Skevlo else { 3815264912Skevlo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 3816282266Skevlo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 3817282266Skevlo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 3818282266Skevlo R92C_USB_SPECIAL_OPTION_AGG_EN); 3819282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 3820282266Skevlo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 3821282266Skevlo } 3822251538Srpaulo 3823251538Srpaulo /* Initialize beacon parameters. */ 3824264912Skevlo urtwn_write_2(sc, R92C_BCN_CTRL, 0x1010); 3825251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 3826251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 3827251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 3828251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 3829251538Srpaulo 3830264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3831264912Skevlo /* Setup AMPDU aggregation. */ 3832264912Skevlo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 3833264912Skevlo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 3834264912Skevlo urtwn_write_2(sc, R92C_MAX_AGGR_NUM, 0x0708); 3835251538Srpaulo 3836264912Skevlo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 3837264912Skevlo } 3838251538Srpaulo 3839251538Srpaulo /* Load 8051 microcode. */ 3840251538Srpaulo error = urtwn_load_firmware(sc); 3841251538Srpaulo if (error != 0) 3842251538Srpaulo goto fail; 3843251538Srpaulo 3844251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 3845251538Srpaulo urtwn_mac_init(sc); 3846251538Srpaulo urtwn_bb_init(sc); 3847251538Srpaulo urtwn_rf_init(sc); 3848251538Srpaulo 3849290564Savos /* Reinitialize Rx filter (D3845 is not committed yet). */ 3850290564Savos urtwn_rxfilter_init(sc); 3851290564Savos 3852264912Skevlo if (sc->chip & URTWN_CHIP_88E) { 3853264912Skevlo urtwn_write_2(sc, R92C_CR, 3854264912Skevlo urtwn_read_2(sc, R92C_CR) | R92C_CR_MACTXEN | 3855264912Skevlo R92C_CR_MACRXEN); 3856264912Skevlo } 3857264912Skevlo 3858251538Srpaulo /* Turn CCK and OFDM blocks on. */ 3859251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 3860251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 3861251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 3862251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 3863251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 3864251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 3865251538Srpaulo 3866251538Srpaulo /* Clear per-station keys table. */ 3867251538Srpaulo urtwn_cam_init(sc); 3868251538Srpaulo 3869251538Srpaulo /* Enable hardware sequence numbering. */ 3870251538Srpaulo urtwn_write_1(sc, R92C_HWSEQ_CTRL, 0xff); 3871251538Srpaulo 3872251538Srpaulo /* Perform LO and IQ calibrations. */ 3873251538Srpaulo urtwn_iq_calib(sc); 3874251538Srpaulo /* Perform LC calibration. */ 3875251538Srpaulo urtwn_lc_calib(sc); 3876251538Srpaulo 3877251538Srpaulo /* Fix USB interference issue. */ 3878264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) { 3879264912Skevlo urtwn_write_1(sc, 0xfe40, 0xe0); 3880264912Skevlo urtwn_write_1(sc, 0xfe41, 0x8d); 3881264912Skevlo urtwn_write_1(sc, 0xfe42, 0x80); 3882251538Srpaulo 3883264912Skevlo urtwn_pa_bias_init(sc); 3884264912Skevlo } 3885251538Srpaulo 3886251538Srpaulo /* Initialize GPIO setting. */ 3887251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 3888251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 3889251538Srpaulo 3890251538Srpaulo /* Fix for lower temperature. */ 3891264912Skevlo if (!(sc->chip & URTWN_CHIP_88E)) 3892264912Skevlo urtwn_write_1(sc, 0x15, 0xe9); 3893251538Srpaulo 3894251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 3895251538Srpaulo 3896287197Sglebius sc->sc_flags |= URTWN_RUNNING; 3897251538Srpaulo 3898251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 3899251538Srpaulofail: 3900251538Srpaulo return; 3901251538Srpaulo} 3902251538Srpaulo 3903251538Srpaulostatic void 3904287197Sglebiusurtwn_stop(struct urtwn_softc *sc) 3905251538Srpaulo{ 3906251538Srpaulo 3907264864Skevlo URTWN_ASSERT_LOCKED(sc); 3908287197Sglebius sc->sc_flags &= ~URTWN_RUNNING; 3909251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 3910251538Srpaulo urtwn_abort_xfers(sc); 3911288353Sadrian 3912288353Sadrian urtwn_drain_mbufq(sc); 3913251538Srpaulo} 3914251538Srpaulo 3915251538Srpaulostatic void 3916251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 3917251538Srpaulo{ 3918251538Srpaulo int i; 3919251538Srpaulo 3920251538Srpaulo URTWN_ASSERT_LOCKED(sc); 3921251538Srpaulo 3922251538Srpaulo /* abort any pending transfers */ 3923251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 3924251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 3925251538Srpaulo} 3926251538Srpaulo 3927251538Srpaulostatic int 3928251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 3929251538Srpaulo const struct ieee80211_bpf_params *params) 3930251538Srpaulo{ 3931251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 3932286949Sadrian struct urtwn_softc *sc = ic->ic_softc; 3933251538Srpaulo struct urtwn_data *bf; 3934290630Savos int error; 3935251538Srpaulo 3936251538Srpaulo /* prevent management frames from being sent if we're not ready */ 3937290630Savos URTWN_LOCK(sc); 3938287197Sglebius if (!(sc->sc_flags & URTWN_RUNNING)) { 3939290630Savos error = ENETDOWN; 3940290630Savos goto end; 3941251538Srpaulo } 3942290630Savos 3943251538Srpaulo bf = urtwn_getbuf(sc); 3944251538Srpaulo if (bf == NULL) { 3945290630Savos error = ENOBUFS; 3946290630Savos goto end; 3947251538Srpaulo } 3948251538Srpaulo 3949290630Savos if ((error = urtwn_tx_data(sc, ni, m, bf)) != 0) { 3950251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 3951290630Savos goto end; 3952251538Srpaulo } 3953290630Savos 3954288353Sadrian sc->sc_txtimer = 5; 3955290630Savos callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 3956290630Savos 3957290630Savosend: 3958290630Savos if (error != 0) 3959290630Savos m_freem(m); 3960290630Savos 3961251538Srpaulo URTWN_UNLOCK(sc); 3962251538Srpaulo 3963290630Savos return (error); 3964251538Srpaulo} 3965251538Srpaulo 3966266472Shselaskystatic void 3967266472Shselaskyurtwn_ms_delay(struct urtwn_softc *sc) 3968266472Shselasky{ 3969266472Shselasky usb_pause_mtx(&sc->sc_mtx, hz / 1000); 3970266472Shselasky} 3971266472Shselasky 3972251538Srpaulostatic device_method_t urtwn_methods[] = { 3973251538Srpaulo /* Device interface */ 3974251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 3975251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 3976251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 3977251538Srpaulo 3978264912Skevlo DEVMETHOD_END 3979251538Srpaulo}; 3980251538Srpaulo 3981251538Srpaulostatic driver_t urtwn_driver = { 3982251538Srpaulo "urtwn", 3983251538Srpaulo urtwn_methods, 3984251538Srpaulo sizeof(struct urtwn_softc) 3985251538Srpaulo}; 3986251538Srpaulo 3987251538Srpaulostatic devclass_t urtwn_devclass; 3988251538Srpaulo 3989251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 3990251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 3991251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 3992251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 3993251538SrpauloMODULE_VERSION(urtwn, 1); 3994