if_urtwn.c revision 257176
1251538Srpaulo/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */ 2251538Srpaulo 3251538Srpaulo/*- 4251538Srpaulo * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> 5251538Srpaulo * 6251538Srpaulo * Permission to use, copy, modify, and distribute this software for any 7251538Srpaulo * purpose with or without fee is hereby granted, provided that the above 8251538Srpaulo * copyright notice and this permission notice appear in all copies. 9251538Srpaulo * 10251538Srpaulo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11251538Srpaulo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12251538Srpaulo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13251538Srpaulo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14251538Srpaulo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15251538Srpaulo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16251538Srpaulo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17251538Srpaulo */ 18251538Srpaulo 19251538Srpaulo#include <sys/cdefs.h> 20251538Srpaulo__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtwn.c 257176 2013-10-26 17:58:36Z glebius $"); 21251538Srpaulo 22251538Srpaulo/* 23251538Srpaulo * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188RU/RTL8192CU. 24251538Srpaulo */ 25251538Srpaulo 26251538Srpaulo#include <sys/param.h> 27251538Srpaulo#include <sys/sockio.h> 28251538Srpaulo#include <sys/sysctl.h> 29251538Srpaulo#include <sys/lock.h> 30251538Srpaulo#include <sys/mutex.h> 31251538Srpaulo#include <sys/mbuf.h> 32251538Srpaulo#include <sys/kernel.h> 33251538Srpaulo#include <sys/socket.h> 34251538Srpaulo#include <sys/systm.h> 35251538Srpaulo#include <sys/malloc.h> 36251538Srpaulo#include <sys/module.h> 37251538Srpaulo#include <sys/bus.h> 38251538Srpaulo#include <sys/endian.h> 39251538Srpaulo#include <sys/linker.h> 40251538Srpaulo#include <sys/firmware.h> 41251538Srpaulo#include <sys/kdb.h> 42251538Srpaulo 43251538Srpaulo#include <machine/bus.h> 44251538Srpaulo#include <machine/resource.h> 45251538Srpaulo#include <sys/rman.h> 46251538Srpaulo 47251538Srpaulo#include <net/bpf.h> 48251538Srpaulo#include <net/if.h> 49257176Sglebius#include <net/if_var.h> 50251538Srpaulo#include <net/if_arp.h> 51251538Srpaulo#include <net/ethernet.h> 52251538Srpaulo#include <net/if_dl.h> 53251538Srpaulo#include <net/if_media.h> 54251538Srpaulo#include <net/if_types.h> 55251538Srpaulo 56251538Srpaulo#include <netinet/in.h> 57251538Srpaulo#include <netinet/in_systm.h> 58251538Srpaulo#include <netinet/in_var.h> 59251538Srpaulo#include <netinet/if_ether.h> 60251538Srpaulo#include <netinet/ip.h> 61251538Srpaulo 62251538Srpaulo#include <net80211/ieee80211_var.h> 63251538Srpaulo#include <net80211/ieee80211_regdomain.h> 64251538Srpaulo#include <net80211/ieee80211_radiotap.h> 65251538Srpaulo#include <net80211/ieee80211_ratectl.h> 66251538Srpaulo 67251538Srpaulo#include <dev/usb/usb.h> 68251538Srpaulo#include <dev/usb/usbdi.h> 69251538Srpaulo#include "usbdevs.h" 70251538Srpaulo 71251538Srpaulo#define USB_DEBUG_VAR urtwn_debug 72251538Srpaulo#include <dev/usb/usb_debug.h> 73251538Srpaulo 74251538Srpaulo#include <dev/usb/wlan/if_urtwnreg.h> 75251538Srpaulo 76251538Srpaulo#ifdef USB_DEBUG 77251538Srpaulostatic int urtwn_debug = 0; 78251538Srpaulo 79251538SrpauloSYSCTL_NODE(_hw_usb, OID_AUTO, urtwn, CTLFLAG_RW, 0, "USB urtwn"); 80251538SrpauloSYSCTL_INT(_hw_usb_urtwn, OID_AUTO, debug, CTLFLAG_RW, &urtwn_debug, 0, 81251538Srpaulo "Debug level"); 82251538Srpaulo#endif 83251538Srpaulo 84252406Srpaulo#define URTWN_RSSI(r) (r) - 110 85251538Srpaulo#define IEEE80211_HAS_ADDR4(wh) \ 86251538Srpaulo (((wh)->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 87251538Srpaulo 88251538Srpaulo/* various supported device vendors/products */ 89251596Srpaulostatic const STRUCT_USB_HOST_ID urtwn_devs[] = { 90251538Srpaulo#define URTWN_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) } 91251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_1), 92251538Srpaulo URTWN_DEV(ABOCOM, RTL8188CU_2), 93251538Srpaulo URTWN_DEV(ABOCOM, RTL8192CU), 94251538Srpaulo URTWN_DEV(ASUS, RTL8192CU), 95251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_1), 96251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CE_2), 97251538Srpaulo URTWN_DEV(AZUREWAVE, RTL8188CU), 98251538Srpaulo URTWN_DEV(BELKIN, F7D2102), 99251538Srpaulo URTWN_DEV(BELKIN, RTL8188CU), 100251538Srpaulo URTWN_DEV(BELKIN, RTL8192CU), 101251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_1), 102251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_2), 103251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_3), 104251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_4), 105251538Srpaulo URTWN_DEV(CHICONY, RTL8188CUS_5), 106251538Srpaulo URTWN_DEV(COREGA, RTL8192CU), 107251538Srpaulo URTWN_DEV(DLINK, RTL8188CU), 108251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_1), 109251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_2), 110251538Srpaulo URTWN_DEV(DLINK, RTL8192CU_3), 111252196Skevlo URTWN_DEV(DLINK, DWA131B), 112251538Srpaulo URTWN_DEV(EDIMAX, EW7811UN), 113251538Srpaulo URTWN_DEV(EDIMAX, RTL8192CU), 114251538Srpaulo URTWN_DEV(FEIXUN, RTL8188CU), 115251538Srpaulo URTWN_DEV(FEIXUN, RTL8192CU), 116251538Srpaulo URTWN_DEV(GUILLEMOT, HWNUP150), 117251538Srpaulo URTWN_DEV(HAWKING, RTL8192CU), 118251538Srpaulo URTWN_DEV(HP3, RTL8188CU), 119251538Srpaulo URTWN_DEV(NETGEAR, WNA1000M), 120251538Srpaulo URTWN_DEV(NETGEAR, RTL8192CU), 121251538Srpaulo URTWN_DEV(NETGEAR4, RTL8188CU), 122251538Srpaulo URTWN_DEV(NOVATECH, RTL8188CU), 123251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_1), 124251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_2), 125251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_3), 126251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CU_4), 127251538Srpaulo URTWN_DEV(PLANEX2, RTL8188CUS), 128251538Srpaulo URTWN_DEV(PLANEX2, RTL8192CU), 129251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_0), 130251538Srpaulo URTWN_DEV(REALTEK, RTL8188CE_1), 131251538Srpaulo URTWN_DEV(REALTEK, RTL8188CTV), 132251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_0), 133251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_1), 134251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_2), 135251538Srpaulo URTWN_DEV(REALTEK, RTL8188CU_COMBO), 136251538Srpaulo URTWN_DEV(REALTEK, RTL8188CUS), 137251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_1), 138251538Srpaulo URTWN_DEV(REALTEK, RTL8188RU_2), 139251538Srpaulo URTWN_DEV(REALTEK, RTL8191CU), 140251538Srpaulo URTWN_DEV(REALTEK, RTL8192CE), 141251538Srpaulo URTWN_DEV(REALTEK, RTL8192CU), 142251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_1), 143251538Srpaulo URTWN_DEV(SITECOMEU, RTL8188CU_2), 144251538Srpaulo URTWN_DEV(SITECOMEU, RTL8192CU), 145251538Srpaulo URTWN_DEV(TRENDNET, RTL8188CU), 146251538Srpaulo URTWN_DEV(TRENDNET, RTL8192CU), 147251538Srpaulo URTWN_DEV(ZYXEL, RTL8192CU), 148251538Srpaulo#undef URTWN_DEV 149251538Srpaulo}; 150251538Srpaulo 151251538Srpaulostatic device_probe_t urtwn_match; 152251538Srpaulostatic device_attach_t urtwn_attach; 153251538Srpaulostatic device_detach_t urtwn_detach; 154251538Srpaulo 155251538Srpaulostatic usb_callback_t urtwn_bulk_tx_callback; 156251538Srpaulostatic usb_callback_t urtwn_bulk_rx_callback; 157251538Srpaulo 158251538Srpaulostatic usb_error_t urtwn_do_request(struct urtwn_softc *sc, 159251538Srpaulo struct usb_device_request *req, void *data); 160251538Srpaulostatic struct ieee80211vap *urtwn_vap_create(struct ieee80211com *, 161251538Srpaulo const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 162251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN], 163251538Srpaulo const uint8_t [IEEE80211_ADDR_LEN]); 164251538Srpaulostatic void urtwn_vap_delete(struct ieee80211vap *); 165251538Srpaulostatic struct mbuf * urtwn_rx_frame(struct urtwn_softc *, uint8_t *, int, 166251538Srpaulo int *); 167251538Srpaulostatic struct mbuf * urtwn_rxeof(struct usb_xfer *, struct urtwn_data *, 168251538Srpaulo int *, int8_t *); 169251538Srpaulostatic void urtwn_txeof(struct usb_xfer *, struct urtwn_data *); 170251538Srpaulostatic int urtwn_alloc_list(struct urtwn_softc *, 171251538Srpaulo struct urtwn_data[], int, int); 172251538Srpaulostatic int urtwn_alloc_rx_list(struct urtwn_softc *); 173251538Srpaulostatic int urtwn_alloc_tx_list(struct urtwn_softc *); 174251538Srpaulostatic void urtwn_free_tx_list(struct urtwn_softc *); 175251538Srpaulostatic void urtwn_free_rx_list(struct urtwn_softc *); 176251538Srpaulostatic void urtwn_free_list(struct urtwn_softc *, 177251538Srpaulo struct urtwn_data data[], int); 178251538Srpaulostatic struct urtwn_data * _urtwn_getbuf(struct urtwn_softc *); 179251538Srpaulostatic struct urtwn_data * urtwn_getbuf(struct urtwn_softc *); 180251538Srpaulostatic int urtwn_write_region_1(struct urtwn_softc *, uint16_t, 181251538Srpaulo uint8_t *, int); 182251538Srpaulostatic void urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t); 183251538Srpaulostatic void urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t); 184251538Srpaulostatic void urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t); 185251538Srpaulostatic int urtwn_read_region_1(struct urtwn_softc *, uint16_t, 186251538Srpaulo uint8_t *, int); 187251538Srpaulostatic uint8_t urtwn_read_1(struct urtwn_softc *, uint16_t); 188251538Srpaulostatic uint16_t urtwn_read_2(struct urtwn_softc *, uint16_t); 189251538Srpaulostatic uint32_t urtwn_read_4(struct urtwn_softc *, uint16_t); 190251538Srpaulostatic int urtwn_fw_cmd(struct urtwn_softc *, uint8_t, 191251538Srpaulo const void *, int); 192251538Srpaulostatic void urtwn_rf_write(struct urtwn_softc *, int, uint8_t, 193251538Srpaulo uint32_t); 194251538Srpaulostatic uint32_t urtwn_rf_read(struct urtwn_softc *, int, uint8_t); 195251538Srpaulostatic int urtwn_llt_write(struct urtwn_softc *, uint32_t, 196251538Srpaulo uint32_t); 197251538Srpaulostatic uint8_t urtwn_efuse_read_1(struct urtwn_softc *, uint16_t); 198251538Srpaulostatic void urtwn_efuse_read(struct urtwn_softc *); 199251538Srpaulostatic int urtwn_read_chipid(struct urtwn_softc *); 200251538Srpaulostatic void urtwn_read_rom(struct urtwn_softc *); 201251538Srpaulostatic int urtwn_ra_init(struct urtwn_softc *); 202251538Srpaulostatic void urtwn_tsf_sync_enable(struct urtwn_softc *); 203251538Srpaulostatic void urtwn_set_led(struct urtwn_softc *, int, int); 204251538Srpaulostatic int urtwn_newstate(struct ieee80211vap *, 205251538Srpaulo enum ieee80211_state, int); 206251538Srpaulostatic void urtwn_watchdog(void *); 207251538Srpaulostatic void urtwn_update_avgrssi(struct urtwn_softc *, int, int8_t); 208251538Srpaulostatic int8_t urtwn_get_rssi(struct urtwn_softc *, int, void *); 209251538Srpaulostatic int urtwn_tx_start(struct urtwn_softc *, 210251538Srpaulo struct ieee80211_node *, struct mbuf *, 211251538Srpaulo struct urtwn_data *); 212251538Srpaulostatic void urtwn_start(struct ifnet *); 213251538Srpaulostatic int urtwn_ioctl(struct ifnet *, u_long, caddr_t); 214251538Srpaulostatic int urtwn_power_on(struct urtwn_softc *); 215251538Srpaulostatic int urtwn_llt_init(struct urtwn_softc *); 216251538Srpaulostatic void urtwn_fw_reset(struct urtwn_softc *); 217251538Srpaulostatic int urtwn_fw_loadpage(struct urtwn_softc *, int, 218251538Srpaulo const uint8_t *, int); 219251538Srpaulostatic int urtwn_load_firmware(struct urtwn_softc *); 220251538Srpaulostatic int urtwn_dma_init(struct urtwn_softc *); 221251538Srpaulostatic void urtwn_mac_init(struct urtwn_softc *); 222251538Srpaulostatic void urtwn_bb_init(struct urtwn_softc *); 223251538Srpaulostatic void urtwn_rf_init(struct urtwn_softc *); 224251538Srpaulostatic void urtwn_cam_init(struct urtwn_softc *); 225251538Srpaulostatic void urtwn_pa_bias_init(struct urtwn_softc *); 226251538Srpaulostatic void urtwn_rxfilter_init(struct urtwn_softc *); 227251538Srpaulostatic void urtwn_edca_init(struct urtwn_softc *); 228251538Srpaulostatic void urtwn_write_txpower(struct urtwn_softc *, int, 229251538Srpaulo uint16_t[]); 230251538Srpaulostatic void urtwn_get_txpower(struct urtwn_softc *, int, 231251538Srpaulo struct ieee80211_channel *, 232251538Srpaulo struct ieee80211_channel *, uint16_t[]); 233251538Srpaulostatic void urtwn_set_txpower(struct urtwn_softc *, 234251538Srpaulo struct ieee80211_channel *, 235251538Srpaulo struct ieee80211_channel *); 236251538Srpaulostatic void urtwn_scan_start(struct ieee80211com *); 237251538Srpaulostatic void urtwn_scan_end(struct ieee80211com *); 238251538Srpaulostatic void urtwn_set_channel(struct ieee80211com *); 239251538Srpaulostatic void urtwn_set_chan(struct urtwn_softc *, 240251538Srpaulo struct ieee80211_channel *, 241251538Srpaulo struct ieee80211_channel *); 242251538Srpaulostatic void urtwn_update_mcast(struct ifnet *); 243251538Srpaulostatic void urtwn_iq_calib(struct urtwn_softc *); 244251538Srpaulostatic void urtwn_lc_calib(struct urtwn_softc *); 245251538Srpaulostatic void urtwn_init(void *); 246251538Srpaulostatic void urtwn_init_locked(void *); 247251538Srpaulostatic void urtwn_stop(struct ifnet *, int); 248251538Srpaulostatic void urtwn_stop_locked(struct ifnet *, int); 249251538Srpaulostatic void urtwn_abort_xfers(struct urtwn_softc *); 250251538Srpaulostatic int urtwn_raw_xmit(struct ieee80211_node *, struct mbuf *, 251251538Srpaulo const struct ieee80211_bpf_params *); 252251538Srpaulo 253251538Srpaulo/* Aliases. */ 254251538Srpaulo#define urtwn_bb_write urtwn_write_4 255251538Srpaulo#define urtwn_bb_read urtwn_read_4 256251538Srpaulo 257251538Srpaulostatic const struct usb_config urtwn_config[URTWN_N_TRANSFER] = { 258251538Srpaulo [URTWN_BULK_RX] = { 259251538Srpaulo .type = UE_BULK, 260251538Srpaulo .endpoint = UE_ADDR_ANY, 261251538Srpaulo .direction = UE_DIR_IN, 262251538Srpaulo .bufsize = URTWN_RXBUFSZ, 263251538Srpaulo .flags = { 264251538Srpaulo .pipe_bof = 1, 265251538Srpaulo .short_xfer_ok = 1 266251538Srpaulo }, 267251538Srpaulo .callback = urtwn_bulk_rx_callback, 268251538Srpaulo }, 269251538Srpaulo [URTWN_BULK_TX_BE] = { 270251538Srpaulo .type = UE_BULK, 271251538Srpaulo .endpoint = 0x03, 272251538Srpaulo .direction = UE_DIR_OUT, 273251538Srpaulo .bufsize = URTWN_TXBUFSZ, 274251538Srpaulo .flags = { 275251538Srpaulo .ext_buffer = 1, 276251538Srpaulo .pipe_bof = 1, 277251538Srpaulo .force_short_xfer = 1 278251538Srpaulo }, 279251538Srpaulo .callback = urtwn_bulk_tx_callback, 280251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 281251538Srpaulo }, 282251538Srpaulo [URTWN_BULK_TX_BK] = { 283251538Srpaulo .type = UE_BULK, 284251538Srpaulo .endpoint = 0x03, 285251538Srpaulo .direction = UE_DIR_OUT, 286251538Srpaulo .bufsize = URTWN_TXBUFSZ, 287251538Srpaulo .flags = { 288251538Srpaulo .ext_buffer = 1, 289251538Srpaulo .pipe_bof = 1, 290251538Srpaulo .force_short_xfer = 1, 291251538Srpaulo }, 292251538Srpaulo .callback = urtwn_bulk_tx_callback, 293251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 294251538Srpaulo }, 295251538Srpaulo [URTWN_BULK_TX_VI] = { 296251538Srpaulo .type = UE_BULK, 297251538Srpaulo .endpoint = 0x02, 298251538Srpaulo .direction = UE_DIR_OUT, 299251538Srpaulo .bufsize = URTWN_TXBUFSZ, 300251538Srpaulo .flags = { 301251538Srpaulo .ext_buffer = 1, 302251538Srpaulo .pipe_bof = 1, 303251538Srpaulo .force_short_xfer = 1 304251538Srpaulo }, 305251538Srpaulo .callback = urtwn_bulk_tx_callback, 306251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 307251538Srpaulo }, 308251538Srpaulo [URTWN_BULK_TX_VO] = { 309251538Srpaulo .type = UE_BULK, 310251538Srpaulo .endpoint = 0x02, 311251538Srpaulo .direction = UE_DIR_OUT, 312251538Srpaulo .bufsize = URTWN_TXBUFSZ, 313251538Srpaulo .flags = { 314251538Srpaulo .ext_buffer = 1, 315251538Srpaulo .pipe_bof = 1, 316251538Srpaulo .force_short_xfer = 1 317251538Srpaulo }, 318251538Srpaulo .callback = urtwn_bulk_tx_callback, 319251538Srpaulo .timeout = URTWN_TX_TIMEOUT, /* ms */ 320251538Srpaulo }, 321251538Srpaulo}; 322251538Srpaulo 323251538Srpaulostatic int 324251538Srpaulourtwn_match(device_t self) 325251538Srpaulo{ 326251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 327251538Srpaulo 328251538Srpaulo if (uaa->usb_mode != USB_MODE_HOST) 329251538Srpaulo return (ENXIO); 330251538Srpaulo if (uaa->info.bConfigIndex != URTWN_CONFIG_INDEX) 331251538Srpaulo return (ENXIO); 332251538Srpaulo if (uaa->info.bIfaceIndex != URTWN_IFACE_INDEX) 333251538Srpaulo return (ENXIO); 334251538Srpaulo 335251538Srpaulo return (usbd_lookup_id_by_uaa(urtwn_devs, sizeof(urtwn_devs), uaa)); 336251538Srpaulo} 337251538Srpaulo 338251538Srpaulostatic int 339251538Srpaulourtwn_attach(device_t self) 340251538Srpaulo{ 341251538Srpaulo struct usb_attach_arg *uaa = device_get_ivars(self); 342251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 343251538Srpaulo struct ifnet *ifp; 344251538Srpaulo struct ieee80211com *ic; 345251538Srpaulo uint8_t iface_index, bands; 346251538Srpaulo int error; 347251538Srpaulo 348251538Srpaulo device_set_usb_desc(self); 349251538Srpaulo sc->sc_udev = uaa->device; 350251538Srpaulo sc->sc_dev = self; 351251538Srpaulo 352251538Srpaulo mtx_init(&sc->sc_mtx, device_get_nameunit(self), 353251538Srpaulo MTX_NETWORK_LOCK, MTX_DEF); 354251538Srpaulo callout_init(&sc->sc_watchdog_ch, 0); 355251538Srpaulo 356251538Srpaulo iface_index = URTWN_IFACE_INDEX; 357251538Srpaulo error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 358251538Srpaulo urtwn_config, URTWN_N_TRANSFER, sc, &sc->sc_mtx); 359251538Srpaulo if (error) { 360251538Srpaulo device_printf(self, "could not allocate USB transfers, " 361251538Srpaulo "err=%s\n", usbd_errstr(error)); 362251538Srpaulo goto detach; 363251538Srpaulo } 364251538Srpaulo 365251538Srpaulo URTWN_LOCK(sc); 366251538Srpaulo 367251538Srpaulo error = urtwn_read_chipid(sc); 368251538Srpaulo if (error) { 369251538Srpaulo device_printf(sc->sc_dev, "unsupported test chip\n"); 370251538Srpaulo URTWN_UNLOCK(sc); 371251538Srpaulo goto detach; 372251538Srpaulo } 373251538Srpaulo 374251538Srpaulo /* Determine number of Tx/Rx chains. */ 375251538Srpaulo if (sc->chip & URTWN_CHIP_92C) { 376251538Srpaulo sc->ntxchains = (sc->chip & URTWN_CHIP_92C_1T2R) ? 1 : 2; 377251538Srpaulo sc->nrxchains = 2; 378251538Srpaulo } else { 379251538Srpaulo sc->ntxchains = 1; 380251538Srpaulo sc->nrxchains = 1; 381251538Srpaulo } 382251538Srpaulo urtwn_read_rom(sc); 383251538Srpaulo 384251538Srpaulo device_printf(sc->sc_dev, "MAC/BB RTL%s, RF 6052 %dT%dR\n", 385251538Srpaulo (sc->chip & URTWN_CHIP_92C) ? "8192CU" : 386251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_HIGHPA) ? "8188RU" : 387251538Srpaulo (sc->board_type == R92C_BOARD_TYPE_MINICARD) ? "8188CE-VAU" : 388251538Srpaulo "8188CUS", sc->ntxchains, sc->nrxchains); 389251538Srpaulo 390251538Srpaulo URTWN_UNLOCK(sc); 391251538Srpaulo 392251538Srpaulo ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 393251538Srpaulo if (ifp == NULL) { 394251538Srpaulo device_printf(sc->sc_dev, "can not if_alloc()\n"); 395251538Srpaulo goto detach; 396251538Srpaulo } 397251538Srpaulo ic = ifp->if_l2com; 398251538Srpaulo 399251538Srpaulo ifp->if_softc = sc; 400251538Srpaulo if_initname(ifp, "urtwn", device_get_unit(sc->sc_dev)); 401251538Srpaulo ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 402251538Srpaulo ifp->if_init = urtwn_init; 403251538Srpaulo ifp->if_ioctl = urtwn_ioctl; 404251538Srpaulo ifp->if_start = urtwn_start; 405251538Srpaulo IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 406251538Srpaulo ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 407251538Srpaulo IFQ_SET_READY(&ifp->if_snd); 408251538Srpaulo 409251538Srpaulo ic->ic_ifp = ifp; 410251538Srpaulo ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 411251538Srpaulo ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 412251538Srpaulo 413251538Srpaulo /* set device capabilities */ 414251538Srpaulo ic->ic_caps = 415251538Srpaulo IEEE80211_C_STA /* station mode */ 416251538Srpaulo | IEEE80211_C_MONITOR /* monitor mode */ 417251538Srpaulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 418251538Srpaulo | IEEE80211_C_SHSLOT /* short slot time supported */ 419251538Srpaulo | IEEE80211_C_BGSCAN /* capable of bg scanning */ 420251538Srpaulo | IEEE80211_C_WPA /* 802.11i */ 421251538Srpaulo ; 422251538Srpaulo 423251538Srpaulo bands = 0; 424251538Srpaulo setbit(&bands, IEEE80211_MODE_11B); 425251538Srpaulo setbit(&bands, IEEE80211_MODE_11G); 426251538Srpaulo ieee80211_init_channels(ic, NULL, &bands); 427251538Srpaulo 428251538Srpaulo ieee80211_ifattach(ic, sc->sc_bssid); 429251538Srpaulo ic->ic_raw_xmit = urtwn_raw_xmit; 430251538Srpaulo ic->ic_scan_start = urtwn_scan_start; 431251538Srpaulo ic->ic_scan_end = urtwn_scan_end; 432251538Srpaulo ic->ic_set_channel = urtwn_set_channel; 433251538Srpaulo 434251538Srpaulo ic->ic_vap_create = urtwn_vap_create; 435251538Srpaulo ic->ic_vap_delete = urtwn_vap_delete; 436251538Srpaulo ic->ic_update_mcast = urtwn_update_mcast; 437251538Srpaulo 438251538Srpaulo ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr, 439251538Srpaulo sizeof(sc->sc_txtap), URTWN_TX_RADIOTAP_PRESENT, 440251538Srpaulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 441251538Srpaulo URTWN_RX_RADIOTAP_PRESENT); 442251538Srpaulo 443251538Srpaulo if (bootverbose) 444251538Srpaulo ieee80211_announce(ic); 445251538Srpaulo 446251538Srpaulo return (0); 447251538Srpaulo 448251538Srpaulodetach: 449251538Srpaulo urtwn_detach(self); 450251538Srpaulo return (ENXIO); /* failure */ 451251538Srpaulo} 452251538Srpaulo 453251538Srpaulostatic int 454251538Srpaulourtwn_detach(device_t self) 455251538Srpaulo{ 456251538Srpaulo struct urtwn_softc *sc = device_get_softc(self); 457251538Srpaulo struct ifnet *ifp = sc->sc_ifp; 458251538Srpaulo struct ieee80211com *ic = ifp->if_l2com; 459251538Srpaulo 460251538Srpaulo if (!device_is_attached(self)) 461251538Srpaulo return (0); 462251538Srpaulo 463251538Srpaulo urtwn_stop(ifp, 1); 464251538Srpaulo 465251538Srpaulo callout_drain(&sc->sc_watchdog_ch); 466251538Srpaulo 467251538Srpaulo /* stop all USB transfers */ 468251538Srpaulo usbd_transfer_unsetup(sc->sc_xfer, URTWN_N_TRANSFER); 469251538Srpaulo ieee80211_ifdetach(ic); 470251538Srpaulo 471251538Srpaulo urtwn_free_tx_list(sc); 472251538Srpaulo urtwn_free_rx_list(sc); 473251538Srpaulo 474251538Srpaulo if_free(ifp); 475251538Srpaulo mtx_destroy(&sc->sc_mtx); 476251538Srpaulo 477251538Srpaulo return (0); 478251538Srpaulo} 479251538Srpaulo 480251538Srpaulostatic void 481251538Srpaulourtwn_free_tx_list(struct urtwn_softc *sc) 482251538Srpaulo{ 483251538Srpaulo urtwn_free_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT); 484251538Srpaulo} 485251538Srpaulo 486251538Srpaulostatic void 487251538Srpaulourtwn_free_rx_list(struct urtwn_softc *sc) 488251538Srpaulo{ 489251538Srpaulo urtwn_free_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT); 490251538Srpaulo} 491251538Srpaulo 492251538Srpaulostatic void 493251538Srpaulourtwn_free_list(struct urtwn_softc *sc, struct urtwn_data data[], int ndata) 494251538Srpaulo{ 495251538Srpaulo int i; 496251538Srpaulo 497251538Srpaulo for (i = 0; i < ndata; i++) { 498251538Srpaulo struct urtwn_data *dp = &data[i]; 499251538Srpaulo 500251538Srpaulo if (dp->buf != NULL) { 501251538Srpaulo free(dp->buf, M_USBDEV); 502251538Srpaulo dp->buf = NULL; 503251538Srpaulo } 504251538Srpaulo if (dp->ni != NULL) { 505251538Srpaulo ieee80211_free_node(dp->ni); 506251538Srpaulo dp->ni = NULL; 507251538Srpaulo } 508251538Srpaulo } 509251538Srpaulo} 510251538Srpaulo 511251538Srpaulostatic usb_error_t 512251538Srpaulourtwn_do_request(struct urtwn_softc *sc, struct usb_device_request *req, 513251538Srpaulo void *data) 514251538Srpaulo{ 515251538Srpaulo usb_error_t err; 516251538Srpaulo int ntries = 10; 517251538Srpaulo 518251538Srpaulo URTWN_ASSERT_LOCKED(sc); 519251538Srpaulo 520251538Srpaulo while (ntries--) { 521251538Srpaulo err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 522251538Srpaulo req, data, 0, NULL, 250 /* ms */); 523251538Srpaulo if (err == 0) 524251538Srpaulo break; 525251538Srpaulo 526251538Srpaulo DPRINTFN(1, "Control request failed, %s (retrying)\n", 527251538Srpaulo usbd_errstr(err)); 528251538Srpaulo usb_pause_mtx(&sc->sc_mtx, hz / 100); 529251538Srpaulo } 530251538Srpaulo return (err); 531251538Srpaulo} 532251538Srpaulo 533251538Srpaulostatic struct ieee80211vap * 534251538Srpaulourtwn_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 535251538Srpaulo enum ieee80211_opmode opmode, int flags, 536251538Srpaulo const uint8_t bssid[IEEE80211_ADDR_LEN], 537251538Srpaulo const uint8_t mac[IEEE80211_ADDR_LEN]) 538251538Srpaulo{ 539251538Srpaulo struct urtwn_vap *uvp; 540251538Srpaulo struct ieee80211vap *vap; 541251538Srpaulo 542251538Srpaulo if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 543251538Srpaulo return (NULL); 544251538Srpaulo 545251538Srpaulo uvp = (struct urtwn_vap *) malloc(sizeof(struct urtwn_vap), 546251538Srpaulo M_80211_VAP, M_NOWAIT | M_ZERO); 547251538Srpaulo if (uvp == NULL) 548251538Srpaulo return (NULL); 549251538Srpaulo vap = &uvp->vap; 550251538Srpaulo /* enable s/w bmiss handling for sta mode */ 551251538Srpaulo ieee80211_vap_setup(ic, vap, name, unit, opmode, 552251538Srpaulo flags | IEEE80211_CLONE_NOBEACONS, bssid, mac); 553251538Srpaulo 554251538Srpaulo /* override state transition machine */ 555251538Srpaulo uvp->newstate = vap->iv_newstate; 556251538Srpaulo vap->iv_newstate = urtwn_newstate; 557251538Srpaulo 558251538Srpaulo /* complete setup */ 559251538Srpaulo ieee80211_vap_attach(vap, ieee80211_media_change, 560251538Srpaulo ieee80211_media_status); 561251538Srpaulo ic->ic_opmode = opmode; 562251538Srpaulo return (vap); 563251538Srpaulo} 564251538Srpaulo 565251538Srpaulostatic void 566251538Srpaulourtwn_vap_delete(struct ieee80211vap *vap) 567251538Srpaulo{ 568251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 569251538Srpaulo 570251538Srpaulo ieee80211_vap_detach(vap); 571251538Srpaulo free(uvp, M_80211_VAP); 572251538Srpaulo} 573251538Srpaulo 574251538Srpaulostatic struct mbuf * 575251538Srpaulourtwn_rx_frame(struct urtwn_softc *sc, uint8_t *buf, int pktlen, int *rssi_p) 576251538Srpaulo{ 577251538Srpaulo struct ifnet *ifp = sc->sc_ifp; 578251538Srpaulo struct ieee80211com *ic = ifp->if_l2com; 579251538Srpaulo struct ieee80211_frame *wh; 580251538Srpaulo struct mbuf *m; 581251538Srpaulo struct r92c_rx_stat *stat; 582251538Srpaulo uint32_t rxdw0, rxdw3; 583251538Srpaulo uint8_t rate; 584251538Srpaulo int8_t rssi = 0; 585251538Srpaulo int infosz; 586251538Srpaulo 587251538Srpaulo /* 588251538Srpaulo * don't pass packets to the ieee80211 framework if the driver isn't 589251538Srpaulo * RUNNING. 590251538Srpaulo */ 591251538Srpaulo if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 592251538Srpaulo return (NULL); 593251538Srpaulo 594251538Srpaulo stat = (struct r92c_rx_stat *)buf; 595251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 596251538Srpaulo rxdw3 = le32toh(stat->rxdw3); 597251538Srpaulo 598251538Srpaulo if (rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR)) { 599251538Srpaulo /* 600251538Srpaulo * This should not happen since we setup our Rx filter 601251538Srpaulo * to not receive these frames. 602251538Srpaulo */ 603251538Srpaulo ifp->if_ierrors++; 604251538Srpaulo return (NULL); 605251538Srpaulo } 606251538Srpaulo 607251538Srpaulo rate = MS(rxdw3, R92C_RXDW3_RATE); 608251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 609251538Srpaulo 610251538Srpaulo /* Get RSSI from PHY status descriptor if present. */ 611251538Srpaulo if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) { 612251538Srpaulo rssi = urtwn_get_rssi(sc, rate, &stat[1]); 613251538Srpaulo /* Update our average RSSI. */ 614251538Srpaulo urtwn_update_avgrssi(sc, rate, rssi); 615252405Srpaulo /* 616252405Srpaulo * Convert the RSSI to a range that will be accepted 617252405Srpaulo * by net80211. 618252405Srpaulo */ 619252405Srpaulo rssi = URTWN_RSSI(rssi); 620251538Srpaulo } 621251538Srpaulo 622251538Srpaulo m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 623251538Srpaulo if (m == NULL) { 624251538Srpaulo device_printf(sc->sc_dev, "could not create RX mbuf\n"); 625251538Srpaulo return (NULL); 626251538Srpaulo } 627251538Srpaulo 628251538Srpaulo /* Finalize mbuf. */ 629251538Srpaulo m->m_pkthdr.rcvif = ifp; 630251538Srpaulo wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz); 631251538Srpaulo memcpy(mtod(m, uint8_t *), wh, pktlen); 632251538Srpaulo m->m_pkthdr.len = m->m_len = pktlen; 633251538Srpaulo 634251538Srpaulo if (ieee80211_radiotap_active(ic)) { 635251538Srpaulo struct urtwn_rx_radiotap_header *tap = &sc->sc_rxtap; 636251538Srpaulo 637251538Srpaulo tap->wr_flags = 0; 638251538Srpaulo /* Map HW rate index to 802.11 rate. */ 639251538Srpaulo if (!(rxdw3 & R92C_RXDW3_HT)) { 640251538Srpaulo switch (rate) { 641251538Srpaulo /* CCK. */ 642251538Srpaulo case 0: tap->wr_rate = 2; break; 643251538Srpaulo case 1: tap->wr_rate = 4; break; 644251538Srpaulo case 2: tap->wr_rate = 11; break; 645251538Srpaulo case 3: tap->wr_rate = 22; break; 646251538Srpaulo /* OFDM. */ 647251538Srpaulo case 4: tap->wr_rate = 12; break; 648251538Srpaulo case 5: tap->wr_rate = 18; break; 649251538Srpaulo case 6: tap->wr_rate = 24; break; 650251538Srpaulo case 7: tap->wr_rate = 36; break; 651251538Srpaulo case 8: tap->wr_rate = 48; break; 652251538Srpaulo case 9: tap->wr_rate = 72; break; 653251538Srpaulo case 10: tap->wr_rate = 96; break; 654251538Srpaulo case 11: tap->wr_rate = 108; break; 655251538Srpaulo } 656251538Srpaulo } else if (rate >= 12) { /* MCS0~15. */ 657251538Srpaulo /* Bit 7 set means HT MCS instead of rate. */ 658251538Srpaulo tap->wr_rate = 0x80 | (rate - 12); 659251538Srpaulo } 660251538Srpaulo tap->wr_dbm_antsignal = rssi; 661251538Srpaulo tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 662251538Srpaulo tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 663251538Srpaulo } 664251538Srpaulo 665251538Srpaulo *rssi_p = rssi; 666251538Srpaulo 667251538Srpaulo return (m); 668251538Srpaulo} 669251538Srpaulo 670251538Srpaulostatic struct mbuf * 671251538Srpaulourtwn_rxeof(struct usb_xfer *xfer, struct urtwn_data *data, int *rssi, 672251538Srpaulo int8_t *nf) 673251538Srpaulo{ 674251538Srpaulo struct urtwn_softc *sc = data->sc; 675251538Srpaulo struct ifnet *ifp = sc->sc_ifp; 676251538Srpaulo struct r92c_rx_stat *stat; 677251538Srpaulo struct mbuf *m, *m0 = NULL, *prevm = NULL; 678251538Srpaulo uint32_t rxdw0; 679251538Srpaulo uint8_t *buf; 680251538Srpaulo int len, totlen, pktlen, infosz, npkts; 681251538Srpaulo 682251538Srpaulo usbd_xfer_status(xfer, &len, NULL, NULL, NULL); 683251538Srpaulo 684251538Srpaulo if (len < sizeof(*stat)) { 685251538Srpaulo ifp->if_ierrors++; 686251538Srpaulo return (NULL); 687251538Srpaulo } 688251538Srpaulo 689251538Srpaulo buf = data->buf; 690251538Srpaulo /* Get the number of encapsulated frames. */ 691251538Srpaulo stat = (struct r92c_rx_stat *)buf; 692251538Srpaulo npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT); 693251538Srpaulo DPRINTFN(6, "Rx %d frames in one chunk\n", npkts); 694251538Srpaulo 695251538Srpaulo /* Process all of them. */ 696251538Srpaulo while (npkts-- > 0) { 697251538Srpaulo if (len < sizeof(*stat)) 698251538Srpaulo break; 699251538Srpaulo stat = (struct r92c_rx_stat *)buf; 700251538Srpaulo rxdw0 = le32toh(stat->rxdw0); 701251538Srpaulo 702251538Srpaulo pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN); 703251538Srpaulo if (pktlen == 0) 704251538Srpaulo break; 705251538Srpaulo 706251538Srpaulo infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8; 707251538Srpaulo 708251538Srpaulo /* Make sure everything fits in xfer. */ 709251538Srpaulo totlen = sizeof(*stat) + infosz + pktlen; 710251538Srpaulo if (totlen > len) 711251538Srpaulo break; 712251538Srpaulo 713251538Srpaulo m = urtwn_rx_frame(sc, buf, pktlen, rssi); 714251538Srpaulo if (m0 == NULL) 715251538Srpaulo m0 = m; 716251538Srpaulo if (prevm == NULL) 717251538Srpaulo prevm = m; 718251538Srpaulo else { 719251538Srpaulo prevm->m_next = m; 720251538Srpaulo prevm = m; 721251538Srpaulo } 722251538Srpaulo 723251538Srpaulo /* Next chunk is 128-byte aligned. */ 724251538Srpaulo totlen = (totlen + 127) & ~127; 725251538Srpaulo buf += totlen; 726251538Srpaulo len -= totlen; 727251538Srpaulo } 728251538Srpaulo 729251538Srpaulo return (m0); 730251538Srpaulo} 731251538Srpaulo 732251538Srpaulostatic void 733251538Srpaulourtwn_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 734251538Srpaulo{ 735251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 736251538Srpaulo struct ifnet *ifp = sc->sc_ifp; 737251538Srpaulo struct ieee80211com *ic = ifp->if_l2com; 738251538Srpaulo struct ieee80211_frame *wh; 739251538Srpaulo struct ieee80211_node *ni; 740251538Srpaulo struct mbuf *m = NULL, *next; 741251538Srpaulo struct urtwn_data *data; 742251538Srpaulo int8_t nf; 743251538Srpaulo int rssi = 1; 744251538Srpaulo 745251538Srpaulo URTWN_ASSERT_LOCKED(sc); 746251538Srpaulo 747251538Srpaulo switch (USB_GET_STATE(xfer)) { 748251538Srpaulo case USB_ST_TRANSFERRED: 749251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 750251538Srpaulo if (data == NULL) 751251538Srpaulo goto tr_setup; 752251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 753251538Srpaulo m = urtwn_rxeof(xfer, data, &rssi, &nf); 754251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 755251538Srpaulo /* FALLTHROUGH */ 756251538Srpaulo case USB_ST_SETUP: 757251538Srpaulotr_setup: 758251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_inactive); 759251538Srpaulo if (data == NULL) { 760251538Srpaulo KASSERT(m == NULL, ("mbuf isn't NULL")); 761251538Srpaulo return; 762251538Srpaulo } 763251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 764251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 765251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, 766251538Srpaulo usbd_xfer_max_len(xfer)); 767251538Srpaulo usbd_transfer_submit(xfer); 768251538Srpaulo 769251538Srpaulo /* 770251538Srpaulo * To avoid LOR we should unlock our private mutex here to call 771251538Srpaulo * ieee80211_input() because here is at the end of a USB 772251538Srpaulo * callback and safe to unlock. 773251538Srpaulo */ 774251538Srpaulo URTWN_UNLOCK(sc); 775251538Srpaulo while (m != NULL) { 776251538Srpaulo next = m->m_next; 777251538Srpaulo m->m_next = NULL; 778251538Srpaulo wh = mtod(m, struct ieee80211_frame *); 779251538Srpaulo ni = ieee80211_find_rxnode(ic, 780251538Srpaulo (struct ieee80211_frame_min *)wh); 781251538Srpaulo nf = URTWN_NOISE_FLOOR; 782251538Srpaulo if (ni != NULL) { 783251538Srpaulo (void)ieee80211_input(ni, m, rssi, nf); 784251538Srpaulo ieee80211_free_node(ni); 785251538Srpaulo } else 786251538Srpaulo (void)ieee80211_input_all(ic, m, rssi, nf); 787251538Srpaulo m = next; 788251538Srpaulo } 789251538Srpaulo URTWN_LOCK(sc); 790251538Srpaulo break; 791251538Srpaulo default: 792251538Srpaulo /* needs it to the inactive queue due to a error. */ 793251538Srpaulo data = STAILQ_FIRST(&sc->sc_rx_active); 794251538Srpaulo if (data != NULL) { 795251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 796251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 797251538Srpaulo } 798251538Srpaulo if (error != USB_ERR_CANCELLED) { 799251538Srpaulo usbd_xfer_set_stall(xfer); 800251538Srpaulo ifp->if_ierrors++; 801251538Srpaulo goto tr_setup; 802251538Srpaulo } 803251538Srpaulo break; 804251538Srpaulo } 805251538Srpaulo} 806251538Srpaulo 807251538Srpaulostatic void 808251538Srpaulourtwn_txeof(struct usb_xfer *xfer, struct urtwn_data *data) 809251538Srpaulo{ 810251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 811251538Srpaulo struct ifnet *ifp = sc->sc_ifp; 812251538Srpaulo struct mbuf *m; 813251538Srpaulo 814251538Srpaulo URTWN_ASSERT_LOCKED(sc); 815251538Srpaulo 816251538Srpaulo /* 817251538Srpaulo * Do any tx complete callback. Note this must be done before releasing 818251538Srpaulo * the node reference. 819251538Srpaulo */ 820251538Srpaulo if (data->m) { 821251538Srpaulo m = data->m; 822251538Srpaulo if (m->m_flags & M_TXCB) { 823251538Srpaulo /* XXX status? */ 824251538Srpaulo ieee80211_process_callback(data->ni, m, 0); 825251538Srpaulo } 826251538Srpaulo m_freem(m); 827251538Srpaulo data->m = NULL; 828251538Srpaulo } 829251538Srpaulo if (data->ni) { 830251538Srpaulo ieee80211_free_node(data->ni); 831251538Srpaulo data->ni = NULL; 832251538Srpaulo } 833251538Srpaulo sc->sc_txtimer = 0; 834251538Srpaulo ifp->if_opackets++; 835251538Srpaulo ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 836251538Srpaulo} 837251538Srpaulo 838251538Srpaulostatic void 839251538Srpaulourtwn_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 840251538Srpaulo{ 841251538Srpaulo struct urtwn_softc *sc = usbd_xfer_softc(xfer); 842251538Srpaulo struct ifnet *ifp = sc->sc_ifp; 843251538Srpaulo struct urtwn_data *data; 844251538Srpaulo 845251538Srpaulo URTWN_ASSERT_LOCKED(sc); 846251538Srpaulo 847251538Srpaulo switch (USB_GET_STATE(xfer)){ 848251538Srpaulo case USB_ST_TRANSFERRED: 849251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 850251538Srpaulo if (data == NULL) 851251538Srpaulo goto tr_setup; 852251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 853251538Srpaulo urtwn_txeof(xfer, data); 854251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 855251538Srpaulo /* FALLTHROUGH */ 856251538Srpaulo case USB_ST_SETUP: 857251538Srpaulotr_setup: 858251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_pending); 859251538Srpaulo if (data == NULL) { 860251538Srpaulo DPRINTF("%s: empty pending queue\n", __func__); 861251538Srpaulo return; 862251538Srpaulo } 863251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 864251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 865251538Srpaulo 866251538Srpaulo usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 867251538Srpaulo usbd_transfer_submit(xfer); 868251538Srpaulo 869251538Srpaulo URTWN_UNLOCK(sc); 870251538Srpaulo urtwn_start(ifp); 871251538Srpaulo URTWN_LOCK(sc); 872251538Srpaulo break; 873251538Srpaulo default: 874251538Srpaulo data = STAILQ_FIRST(&sc->sc_tx_active); 875251538Srpaulo if (data == NULL) 876251538Srpaulo goto tr_setup; 877251538Srpaulo if (data->ni != NULL) { 878251538Srpaulo ieee80211_free_node(data->ni); 879251538Srpaulo data->ni = NULL; 880251538Srpaulo ifp->if_oerrors++; 881251538Srpaulo } 882251538Srpaulo if (error != USB_ERR_CANCELLED) { 883251538Srpaulo usbd_xfer_set_stall(xfer); 884251538Srpaulo goto tr_setup; 885251538Srpaulo } 886251538Srpaulo break; 887251538Srpaulo } 888251538Srpaulo} 889251538Srpaulo 890251538Srpaulostatic struct urtwn_data * 891251538Srpaulo_urtwn_getbuf(struct urtwn_softc *sc) 892251538Srpaulo{ 893251538Srpaulo struct urtwn_data *bf; 894251538Srpaulo 895251538Srpaulo bf = STAILQ_FIRST(&sc->sc_tx_inactive); 896251538Srpaulo if (bf != NULL) 897251538Srpaulo STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 898251538Srpaulo else 899251538Srpaulo bf = NULL; 900251538Srpaulo if (bf == NULL) 901251538Srpaulo DPRINTF("%s: %s\n", __func__, "out of xmit buffers"); 902251538Srpaulo return (bf); 903251538Srpaulo} 904251538Srpaulo 905251538Srpaulostatic struct urtwn_data * 906251538Srpaulourtwn_getbuf(struct urtwn_softc *sc) 907251538Srpaulo{ 908251538Srpaulo struct urtwn_data *bf; 909251538Srpaulo 910251538Srpaulo URTWN_ASSERT_LOCKED(sc); 911251538Srpaulo 912251538Srpaulo bf = _urtwn_getbuf(sc); 913251538Srpaulo if (bf == NULL) { 914251538Srpaulo struct ifnet *ifp = sc->sc_ifp; 915251538Srpaulo DPRINTF("%s: stop queue\n", __func__); 916251538Srpaulo ifp->if_drv_flags |= IFF_DRV_OACTIVE; 917251538Srpaulo } 918251538Srpaulo return (bf); 919251538Srpaulo} 920251538Srpaulo 921251538Srpaulostatic int 922251538Srpaulourtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 923251538Srpaulo int len) 924251538Srpaulo{ 925251538Srpaulo usb_device_request_t req; 926251538Srpaulo 927251538Srpaulo req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 928251538Srpaulo req.bRequest = R92C_REQ_REGS; 929251538Srpaulo USETW(req.wValue, addr); 930251538Srpaulo USETW(req.wIndex, 0); 931251538Srpaulo USETW(req.wLength, len); 932251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 933251538Srpaulo} 934251538Srpaulo 935251538Srpaulostatic void 936251538Srpaulourtwn_write_1(struct urtwn_softc *sc, uint16_t addr, uint8_t val) 937251538Srpaulo{ 938251538Srpaulo urtwn_write_region_1(sc, addr, &val, 1); 939251538Srpaulo} 940251538Srpaulo 941251538Srpaulo 942251538Srpaulostatic void 943251538Srpaulourtwn_write_2(struct urtwn_softc *sc, uint16_t addr, uint16_t val) 944251538Srpaulo{ 945251538Srpaulo val = htole16(val); 946251538Srpaulo urtwn_write_region_1(sc, addr, (uint8_t *)&val, 2); 947251538Srpaulo} 948251538Srpaulo 949251538Srpaulostatic void 950251538Srpaulourtwn_write_4(struct urtwn_softc *sc, uint16_t addr, uint32_t val) 951251538Srpaulo{ 952251538Srpaulo val = htole32(val); 953251538Srpaulo urtwn_write_region_1(sc, addr, (uint8_t *)&val, 4); 954251538Srpaulo} 955251538Srpaulo 956251538Srpaulostatic int 957251538Srpaulourtwn_read_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf, 958251538Srpaulo int len) 959251538Srpaulo{ 960251538Srpaulo usb_device_request_t req; 961251538Srpaulo 962251538Srpaulo req.bmRequestType = UT_READ_VENDOR_DEVICE; 963251538Srpaulo req.bRequest = R92C_REQ_REGS; 964251538Srpaulo USETW(req.wValue, addr); 965251538Srpaulo USETW(req.wIndex, 0); 966251538Srpaulo USETW(req.wLength, len); 967251538Srpaulo return (urtwn_do_request(sc, &req, buf)); 968251538Srpaulo} 969251538Srpaulo 970251538Srpaulostatic uint8_t 971251538Srpaulourtwn_read_1(struct urtwn_softc *sc, uint16_t addr) 972251538Srpaulo{ 973251538Srpaulo uint8_t val; 974251538Srpaulo 975251538Srpaulo if (urtwn_read_region_1(sc, addr, &val, 1) != 0) 976251538Srpaulo return (0xff); 977251538Srpaulo return (val); 978251538Srpaulo} 979251538Srpaulo 980251538Srpaulostatic uint16_t 981251538Srpaulourtwn_read_2(struct urtwn_softc *sc, uint16_t addr) 982251538Srpaulo{ 983251538Srpaulo uint16_t val; 984251538Srpaulo 985251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 2) != 0) 986251538Srpaulo return (0xffff); 987251538Srpaulo return (le16toh(val)); 988251538Srpaulo} 989251538Srpaulo 990251538Srpaulostatic uint32_t 991251538Srpaulourtwn_read_4(struct urtwn_softc *sc, uint16_t addr) 992251538Srpaulo{ 993251538Srpaulo uint32_t val; 994251538Srpaulo 995251538Srpaulo if (urtwn_read_region_1(sc, addr, (uint8_t *)&val, 4) != 0) 996251538Srpaulo return (0xffffffff); 997251538Srpaulo return (le32toh(val)); 998251538Srpaulo} 999251538Srpaulo 1000251538Srpaulostatic int 1001251538Srpaulourtwn_fw_cmd(struct urtwn_softc *sc, uint8_t id, const void *buf, int len) 1002251538Srpaulo{ 1003251538Srpaulo struct r92c_fw_cmd cmd; 1004251538Srpaulo int ntries; 1005251538Srpaulo 1006251538Srpaulo /* Wait for current FW box to be empty. */ 1007251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1008251538Srpaulo if (!(urtwn_read_1(sc, R92C_HMETFR) & (1 << sc->fwcur))) 1009251538Srpaulo break; 1010251538Srpaulo DELAY(1); 1011251538Srpaulo } 1012251538Srpaulo if (ntries == 100) { 1013251538Srpaulo device_printf(sc->sc_dev, 1014251538Srpaulo "could not send firmware command\n"); 1015251538Srpaulo return (ETIMEDOUT); 1016251538Srpaulo } 1017251538Srpaulo memset(&cmd, 0, sizeof(cmd)); 1018251538Srpaulo cmd.id = id; 1019251538Srpaulo if (len > 3) 1020251538Srpaulo cmd.id |= R92C_CMD_FLAG_EXT; 1021251538Srpaulo KASSERT(len <= sizeof(cmd.msg), ("urtwn_fw_cmd\n")); 1022251538Srpaulo memcpy(cmd.msg, buf, len); 1023251538Srpaulo 1024251538Srpaulo /* Write the first word last since that will trigger the FW. */ 1025251538Srpaulo urtwn_write_region_1(sc, R92C_HMEBOX_EXT(sc->fwcur), 1026251538Srpaulo (uint8_t *)&cmd + 4, 2); 1027251538Srpaulo urtwn_write_region_1(sc, R92C_HMEBOX(sc->fwcur), 1028251538Srpaulo (uint8_t *)&cmd + 0, 4); 1029251538Srpaulo 1030251538Srpaulo sc->fwcur = (sc->fwcur + 1) % R92C_H2C_NBOX; 1031251538Srpaulo return (0); 1032251538Srpaulo} 1033251538Srpaulo 1034251538Srpaulostatic void 1035251538Srpaulourtwn_rf_write(struct urtwn_softc *sc, int chain, uint8_t addr, uint32_t val) 1036251538Srpaulo{ 1037251538Srpaulo urtwn_bb_write(sc, R92C_LSSI_PARAM(chain), 1038251538Srpaulo SM(R92C_LSSI_PARAM_ADDR, addr) | 1039251538Srpaulo SM(R92C_LSSI_PARAM_DATA, val)); 1040251538Srpaulo} 1041251538Srpaulo 1042251538Srpaulostatic uint32_t 1043251538Srpaulourtwn_rf_read(struct urtwn_softc *sc, int chain, uint8_t addr) 1044251538Srpaulo{ 1045251538Srpaulo uint32_t reg[R92C_MAX_CHAINS], val; 1046251538Srpaulo 1047251538Srpaulo reg[0] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)); 1048251538Srpaulo if (chain != 0) 1049251538Srpaulo reg[chain] = urtwn_bb_read(sc, R92C_HSSI_PARAM2(chain)); 1050251538Srpaulo 1051251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1052251538Srpaulo reg[0] & ~R92C_HSSI_PARAM2_READ_EDGE); 1053251538Srpaulo DELAY(1000); 1054251538Srpaulo 1055251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(chain), 1056251538Srpaulo RW(reg[chain], R92C_HSSI_PARAM2_READ_ADDR, addr) | 1057251538Srpaulo R92C_HSSI_PARAM2_READ_EDGE); 1058251538Srpaulo DELAY(1000); 1059251538Srpaulo 1060251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(0), 1061251538Srpaulo reg[0] | R92C_HSSI_PARAM2_READ_EDGE); 1062251538Srpaulo DELAY(1000); 1063251538Srpaulo 1064251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM1(chain)) & R92C_HSSI_PARAM1_PI) 1065251538Srpaulo val = urtwn_bb_read(sc, R92C_HSPI_READBACK(chain)); 1066251538Srpaulo else 1067251538Srpaulo val = urtwn_bb_read(sc, R92C_LSSI_READBACK(chain)); 1068251538Srpaulo return (MS(val, R92C_LSSI_READBACK_DATA)); 1069251538Srpaulo} 1070251538Srpaulo 1071251538Srpaulostatic int 1072251538Srpaulourtwn_llt_write(struct urtwn_softc *sc, uint32_t addr, uint32_t data) 1073251538Srpaulo{ 1074251538Srpaulo int ntries; 1075251538Srpaulo 1076251538Srpaulo urtwn_write_4(sc, R92C_LLT_INIT, 1077251538Srpaulo SM(R92C_LLT_INIT_OP, R92C_LLT_INIT_OP_WRITE) | 1078251538Srpaulo SM(R92C_LLT_INIT_ADDR, addr) | 1079251538Srpaulo SM(R92C_LLT_INIT_DATA, data)); 1080251538Srpaulo /* Wait for write operation to complete. */ 1081251538Srpaulo for (ntries = 0; ntries < 20; ntries++) { 1082251538Srpaulo if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) == 1083251538Srpaulo R92C_LLT_INIT_OP_NO_ACTIVE) 1084251538Srpaulo return (0); 1085251538Srpaulo DELAY(5); 1086251538Srpaulo } 1087251538Srpaulo return (ETIMEDOUT); 1088251538Srpaulo} 1089251538Srpaulo 1090251538Srpaulostatic uint8_t 1091251538Srpaulourtwn_efuse_read_1(struct urtwn_softc *sc, uint16_t addr) 1092251538Srpaulo{ 1093251538Srpaulo uint32_t reg; 1094251538Srpaulo int ntries; 1095251538Srpaulo 1096251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1097251538Srpaulo reg = RW(reg, R92C_EFUSE_CTRL_ADDR, addr); 1098251538Srpaulo reg &= ~R92C_EFUSE_CTRL_VALID; 1099251538Srpaulo urtwn_write_4(sc, R92C_EFUSE_CTRL, reg); 1100251538Srpaulo /* Wait for read operation to complete. */ 1101251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1102251538Srpaulo reg = urtwn_read_4(sc, R92C_EFUSE_CTRL); 1103251538Srpaulo if (reg & R92C_EFUSE_CTRL_VALID) 1104251538Srpaulo return (MS(reg, R92C_EFUSE_CTRL_DATA)); 1105251538Srpaulo DELAY(5); 1106251538Srpaulo } 1107251538Srpaulo device_printf(sc->sc_dev, 1108251538Srpaulo "could not read efuse byte at address 0x%x\n", addr); 1109251538Srpaulo return (0xff); 1110251538Srpaulo} 1111251538Srpaulo 1112251538Srpaulostatic void 1113251538Srpaulourtwn_efuse_read(struct urtwn_softc *sc) 1114251538Srpaulo{ 1115251538Srpaulo uint8_t *rom = (uint8_t *)&sc->rom; 1116251538Srpaulo uint16_t addr = 0; 1117251538Srpaulo uint32_t reg; 1118251538Srpaulo uint8_t off, msk; 1119251538Srpaulo int i; 1120251538Srpaulo 1121251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_ISO_CTRL); 1122251538Srpaulo if (!(reg & R92C_SYS_ISO_CTRL_PWC_EV12V)) { 1123251538Srpaulo urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1124251538Srpaulo reg | R92C_SYS_ISO_CTRL_PWC_EV12V); 1125251538Srpaulo } 1126251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1127251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_ELDR)) { 1128251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 1129251538Srpaulo reg | R92C_SYS_FUNC_EN_ELDR); 1130251538Srpaulo } 1131251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_CLKR); 1132251538Srpaulo if ((reg & (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) != 1133251538Srpaulo (R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M)) { 1134251538Srpaulo urtwn_write_2(sc, R92C_SYS_CLKR, 1135251538Srpaulo reg | R92C_SYS_CLKR_LOADER_EN | R92C_SYS_CLKR_ANA8M); 1136251538Srpaulo } 1137251538Srpaulo memset(&sc->rom, 0xff, sizeof(sc->rom)); 1138251538Srpaulo while (addr < 512) { 1139251538Srpaulo reg = urtwn_efuse_read_1(sc, addr); 1140251538Srpaulo if (reg == 0xff) 1141251538Srpaulo break; 1142251538Srpaulo addr++; 1143251538Srpaulo off = reg >> 4; 1144251538Srpaulo msk = reg & 0xf; 1145251538Srpaulo for (i = 0; i < 4; i++) { 1146251538Srpaulo if (msk & (1 << i)) 1147251538Srpaulo continue; 1148251538Srpaulo rom[off * 8 + i * 2 + 0] = 1149251538Srpaulo urtwn_efuse_read_1(sc, addr); 1150251538Srpaulo addr++; 1151251538Srpaulo rom[off * 8 + i * 2 + 1] = 1152251538Srpaulo urtwn_efuse_read_1(sc, addr); 1153251538Srpaulo addr++; 1154251538Srpaulo } 1155251538Srpaulo } 1156251538Srpaulo#ifdef URTWN_DEBUG 1157251538Srpaulo if (urtwn_debug >= 2) { 1158251538Srpaulo /* Dump ROM content. */ 1159251538Srpaulo printf("\n"); 1160251538Srpaulo for (i = 0; i < sizeof(sc->rom); i++) 1161251538Srpaulo printf("%02x:", rom[i]); 1162251538Srpaulo printf("\n"); 1163251538Srpaulo } 1164251538Srpaulo#endif 1165251538Srpaulo} 1166251538Srpaulo 1167251538Srpaulostatic int 1168251538Srpaulourtwn_read_chipid(struct urtwn_softc *sc) 1169251538Srpaulo{ 1170251538Srpaulo uint32_t reg; 1171251538Srpaulo 1172251538Srpaulo reg = urtwn_read_4(sc, R92C_SYS_CFG); 1173251538Srpaulo if (reg & R92C_SYS_CFG_TRP_VAUX_EN) 1174251538Srpaulo return (EIO); 1175251538Srpaulo 1176251538Srpaulo if (reg & R92C_SYS_CFG_TYPE_92C) { 1177251538Srpaulo sc->chip |= URTWN_CHIP_92C; 1178251538Srpaulo /* Check if it is a castrated 8192C. */ 1179251538Srpaulo if (MS(urtwn_read_4(sc, R92C_HPON_FSM), 1180251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID) == 1181251538Srpaulo R92C_HPON_FSM_CHIP_BONDING_ID_92C_1T2R) 1182251538Srpaulo sc->chip |= URTWN_CHIP_92C_1T2R; 1183251538Srpaulo } 1184251538Srpaulo if (reg & R92C_SYS_CFG_VENDOR_UMC) { 1185251538Srpaulo sc->chip |= URTWN_CHIP_UMC; 1186251538Srpaulo if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) 1187251538Srpaulo sc->chip |= URTWN_CHIP_UMC_A_CUT; 1188251538Srpaulo } 1189251538Srpaulo return (0); 1190251538Srpaulo} 1191251538Srpaulo 1192251538Srpaulostatic void 1193251538Srpaulourtwn_read_rom(struct urtwn_softc *sc) 1194251538Srpaulo{ 1195251538Srpaulo struct r92c_rom *rom = &sc->rom; 1196251538Srpaulo 1197251538Srpaulo /* Read full ROM image. */ 1198251538Srpaulo urtwn_efuse_read(sc); 1199251538Srpaulo 1200251538Srpaulo /* XXX Weird but this is what the vendor driver does. */ 1201251538Srpaulo sc->pa_setting = urtwn_efuse_read_1(sc, 0x1fa); 1202251538Srpaulo DPRINTF("PA setting=0x%x\n", sc->pa_setting); 1203251538Srpaulo 1204251538Srpaulo sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE); 1205251538Srpaulo 1206251538Srpaulo sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY); 1207251538Srpaulo DPRINTF("regulatory type=%d\n", sc->regulatory); 1208251538Srpaulo 1209251538Srpaulo IEEE80211_ADDR_COPY(sc->sc_bssid, rom->macaddr); 1210251538Srpaulo} 1211251538Srpaulo 1212251538Srpaulo/* 1213251538Srpaulo * Initialize rate adaptation in firmware. 1214251538Srpaulo */ 1215251538Srpaulostatic int 1216251538Srpaulourtwn_ra_init(struct urtwn_softc *sc) 1217251538Srpaulo{ 1218251538Srpaulo static const uint8_t map[] = 1219251538Srpaulo { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 }; 1220251538Srpaulo struct ieee80211com *ic = sc->sc_ifp->if_l2com; 1221251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1222251538Srpaulo struct ieee80211_node *ni; 1223251538Srpaulo struct ieee80211_rateset *rs; 1224251538Srpaulo struct r92c_fw_cmd_macid_cfg cmd; 1225251538Srpaulo uint32_t rates, basicrates; 1226251538Srpaulo uint8_t mode; 1227251538Srpaulo int maxrate, maxbasicrate, error, i, j; 1228251538Srpaulo 1229251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1230251538Srpaulo rs = &ni->ni_rates; 1231251538Srpaulo 1232251538Srpaulo /* Get normal and basic rates mask. */ 1233251538Srpaulo rates = basicrates = 0; 1234251538Srpaulo maxrate = maxbasicrate = 0; 1235251538Srpaulo for (i = 0; i < rs->rs_nrates; i++) { 1236251538Srpaulo /* Convert 802.11 rate to HW rate index. */ 1237251538Srpaulo for (j = 0; j < nitems(map); j++) 1238251538Srpaulo if ((rs->rs_rates[i] & IEEE80211_RATE_VAL) == map[j]) 1239251538Srpaulo break; 1240251538Srpaulo if (j == nitems(map)) /* Unknown rate, skip. */ 1241251538Srpaulo continue; 1242251538Srpaulo rates |= 1 << j; 1243251538Srpaulo if (j > maxrate) 1244251538Srpaulo maxrate = j; 1245251538Srpaulo if (rs->rs_rates[i] & IEEE80211_RATE_BASIC) { 1246251538Srpaulo basicrates |= 1 << j; 1247251538Srpaulo if (j > maxbasicrate) 1248251538Srpaulo maxbasicrate = j; 1249251538Srpaulo } 1250251538Srpaulo } 1251251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 1252251538Srpaulo mode = R92C_RAID_11B; 1253251538Srpaulo else 1254251538Srpaulo mode = R92C_RAID_11BG; 1255251538Srpaulo DPRINTF("mode=0x%x rates=0x%08x, basicrates=0x%08x\n", 1256251538Srpaulo mode, rates, basicrates); 1257251538Srpaulo 1258251538Srpaulo /* Set rates mask for group addressed frames. */ 1259251538Srpaulo cmd.macid = URTWN_MACID_BC | URTWN_MACID_VALID; 1260251538Srpaulo cmd.mask = htole32(mode << 28 | basicrates); 1261251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1262251538Srpaulo if (error != 0) { 1263252401Srpaulo ieee80211_free_node(ni); 1264251538Srpaulo device_printf(sc->sc_dev, 1265251538Srpaulo "could not add broadcast station\n"); 1266251538Srpaulo return (error); 1267251538Srpaulo } 1268251538Srpaulo /* Set initial MRR rate. */ 1269251538Srpaulo DPRINTF("maxbasicrate=%d\n", maxbasicrate); 1270251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BC), 1271251538Srpaulo maxbasicrate); 1272251538Srpaulo 1273251538Srpaulo /* Set rates mask for unicast frames. */ 1274251538Srpaulo cmd.macid = URTWN_MACID_BSS | URTWN_MACID_VALID; 1275251538Srpaulo cmd.mask = htole32(mode << 28 | rates); 1276251538Srpaulo error = urtwn_fw_cmd(sc, R92C_CMD_MACID_CONFIG, &cmd, sizeof(cmd)); 1277251538Srpaulo if (error != 0) { 1278252401Srpaulo ieee80211_free_node(ni); 1279251538Srpaulo device_printf(sc->sc_dev, "could not add BSS station\n"); 1280251538Srpaulo return (error); 1281251538Srpaulo } 1282251538Srpaulo /* Set initial MRR rate. */ 1283251538Srpaulo DPRINTF("maxrate=%d\n", maxrate); 1284251538Srpaulo urtwn_write_1(sc, R92C_INIDATA_RATE_SEL(URTWN_MACID_BSS), 1285251538Srpaulo maxrate); 1286251538Srpaulo 1287251538Srpaulo /* Indicate highest supported rate. */ 1288252403Srpaulo ni->ni_txrate = rs->rs_rates[rs->rs_nrates - 1]; 1289252401Srpaulo ieee80211_free_node(ni); 1290252401Srpaulo 1291251538Srpaulo return (0); 1292251538Srpaulo} 1293251538Srpaulo 1294251538Srpaulovoid 1295251538Srpaulourtwn_tsf_sync_enable(struct urtwn_softc *sc) 1296251538Srpaulo{ 1297251538Srpaulo struct ifnet *ifp = sc->sc_ifp; 1298251538Srpaulo struct ieee80211com *ic = ifp->if_l2com; 1299251538Srpaulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1300251538Srpaulo struct ieee80211_node *ni = vap->iv_bss; 1301251538Srpaulo 1302251538Srpaulo uint64_t tsf; 1303251538Srpaulo 1304251538Srpaulo /* Enable TSF synchronization. */ 1305251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 1306251538Srpaulo urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_DIS_TSF_UDT0); 1307251538Srpaulo 1308251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 1309251538Srpaulo urtwn_read_1(sc, R92C_BCN_CTRL) & ~R92C_BCN_CTRL_EN_BCN); 1310251538Srpaulo 1311251538Srpaulo /* Set initial TSF. */ 1312251538Srpaulo memcpy(&tsf, ni->ni_tstamp.data, 8); 1313251538Srpaulo tsf = le64toh(tsf); 1314251538Srpaulo tsf = tsf - (tsf % (vap->iv_bss->ni_intval * IEEE80211_DUR_TU)); 1315251538Srpaulo tsf -= IEEE80211_DUR_TU; 1316251538Srpaulo urtwn_write_4(sc, R92C_TSFTR + 0, tsf); 1317251538Srpaulo urtwn_write_4(sc, R92C_TSFTR + 4, tsf >> 32); 1318251538Srpaulo 1319251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 1320251538Srpaulo urtwn_read_1(sc, R92C_BCN_CTRL) | R92C_BCN_CTRL_EN_BCN); 1321251538Srpaulo} 1322251538Srpaulo 1323251538Srpaulostatic void 1324251538Srpaulourtwn_set_led(struct urtwn_softc *sc, int led, int on) 1325251538Srpaulo{ 1326251538Srpaulo uint8_t reg; 1327251538Srpaulo 1328251538Srpaulo if (led == URTWN_LED_LINK) { 1329251538Srpaulo reg = urtwn_read_1(sc, R92C_LEDCFG0) & 0x70; 1330251538Srpaulo if (!on) 1331251538Srpaulo reg |= R92C_LEDCFG0_DIS; 1332251538Srpaulo urtwn_write_1(sc, R92C_LEDCFG0, reg); 1333251538Srpaulo sc->ledlink = on; /* Save LED state. */ 1334251538Srpaulo } 1335251538Srpaulo} 1336251538Srpaulo 1337251538Srpaulostatic int 1338251538Srpaulourtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1339251538Srpaulo{ 1340251538Srpaulo struct urtwn_vap *uvp = URTWN_VAP(vap); 1341251538Srpaulo struct ieee80211com *ic = vap->iv_ic; 1342251538Srpaulo struct urtwn_softc *sc = ic->ic_ifp->if_softc; 1343251538Srpaulo struct ieee80211_node *ni; 1344251538Srpaulo enum ieee80211_state ostate; 1345251538Srpaulo uint32_t reg; 1346251538Srpaulo 1347251538Srpaulo ostate = vap->iv_state; 1348251538Srpaulo DPRINTF("%s -> %s\n", ieee80211_state_name[ostate], 1349251538Srpaulo ieee80211_state_name[nstate]); 1350251538Srpaulo 1351251538Srpaulo IEEE80211_UNLOCK(ic); 1352251538Srpaulo URTWN_LOCK(sc); 1353251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 1354251538Srpaulo 1355251538Srpaulo if (ostate == IEEE80211_S_RUN) { 1356251538Srpaulo /* Turn link LED off. */ 1357251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 1358251538Srpaulo 1359251538Srpaulo /* Set media status to 'No Link'. */ 1360251538Srpaulo reg = urtwn_read_4(sc, R92C_CR); 1361251538Srpaulo reg = RW(reg, R92C_CR_NETTYPE, R92C_CR_NETTYPE_NOLINK); 1362251538Srpaulo urtwn_write_4(sc, R92C_CR, reg); 1363251538Srpaulo 1364251538Srpaulo /* Stop Rx of data frames. */ 1365251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0); 1366251538Srpaulo 1367251538Srpaulo /* Rest TSF. */ 1368251538Srpaulo urtwn_write_1(sc, R92C_DUAL_TSF_RST, 0x03); 1369251538Srpaulo 1370251538Srpaulo /* Disable TSF synchronization. */ 1371251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, 1372251538Srpaulo urtwn_read_1(sc, R92C_BCN_CTRL) | 1373251538Srpaulo R92C_BCN_CTRL_DIS_TSF_UDT0); 1374251538Srpaulo 1375251538Srpaulo /* Reset EDCA parameters. */ 1376251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); 1377251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); 1378251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x00105320); 1379251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a444); 1380251538Srpaulo } 1381251538Srpaulo 1382251538Srpaulo switch (nstate) { 1383251538Srpaulo case IEEE80211_S_INIT: 1384251538Srpaulo /* Turn link LED off. */ 1385251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 0); 1386251538Srpaulo break; 1387251538Srpaulo case IEEE80211_S_SCAN: 1388251538Srpaulo if (ostate != IEEE80211_S_SCAN) { 1389251538Srpaulo /* Allow Rx from any BSSID. */ 1390251538Srpaulo urtwn_write_4(sc, R92C_RCR, 1391251538Srpaulo urtwn_read_4(sc, R92C_RCR) & 1392251538Srpaulo ~(R92C_RCR_CBSSID_DATA | R92C_RCR_CBSSID_BCN)); 1393251538Srpaulo 1394251538Srpaulo /* Set gain for scanning. */ 1395251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 1396251538Srpaulo reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, 0x20); 1397251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 1398251538Srpaulo 1399251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 1400251538Srpaulo reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, 0x20); 1401251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 1402251538Srpaulo } 1403251538Srpaulo 1404251538Srpaulo /* Make link LED blink during scan. */ 1405251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, !sc->ledlink); 1406251538Srpaulo 1407251538Srpaulo /* Pause AC Tx queues. */ 1408251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 1409251538Srpaulo urtwn_read_1(sc, R92C_TXPAUSE) | 0x0f); 1410251538Srpaulo 1411251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 1412251538Srpaulo break; 1413251538Srpaulo case IEEE80211_S_AUTH: 1414251538Srpaulo /* Set initial gain under link. */ 1415251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(0)); 1416251538Srpaulo reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, 0x32); 1417251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), reg); 1418251538Srpaulo 1419251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCCORE1(1)); 1420251538Srpaulo reg = RW(reg, R92C_OFDM0_AGCCORE1_GAIN, 0x32); 1421251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(1), reg); 1422251538Srpaulo 1423251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 1424251538Srpaulo break; 1425251538Srpaulo case IEEE80211_S_RUN: 1426251538Srpaulo if (vap->iv_opmode == IEEE80211_M_MONITOR) { 1427251538Srpaulo /* Enable Rx of data frames. */ 1428251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 1429251538Srpaulo 1430251538Srpaulo /* Turn link LED on. */ 1431251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 1432251538Srpaulo break; 1433251538Srpaulo } 1434251538Srpaulo 1435251538Srpaulo ni = ieee80211_ref_node(vap->iv_bss); 1436251538Srpaulo /* Set media status to 'Associated'. */ 1437251538Srpaulo reg = urtwn_read_4(sc, R92C_CR); 1438251538Srpaulo reg = RW(reg, R92C_CR_NETTYPE, R92C_CR_NETTYPE_INFRA); 1439251538Srpaulo urtwn_write_4(sc, R92C_CR, reg); 1440251538Srpaulo 1441251538Srpaulo /* Set BSSID. */ 1442251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 0, LE_READ_4(&ni->ni_bssid[0])); 1443251538Srpaulo urtwn_write_4(sc, R92C_BSSID + 4, LE_READ_2(&ni->ni_bssid[4])); 1444251538Srpaulo 1445251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 1446251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 0); 1447251538Srpaulo else /* 802.11b/g */ 1448251538Srpaulo urtwn_write_1(sc, R92C_INIRTS_RATE_SEL, 3); 1449251538Srpaulo 1450251538Srpaulo /* Enable Rx of data frames. */ 1451251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 1452251538Srpaulo 1453251538Srpaulo /* Flush all AC queues. */ 1454251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0); 1455251538Srpaulo 1456251538Srpaulo /* Set beacon interval. */ 1457251538Srpaulo urtwn_write_2(sc, R92C_BCN_INTERVAL, ni->ni_intval); 1458251538Srpaulo 1459251538Srpaulo /* Allow Rx from our BSSID only. */ 1460251538Srpaulo urtwn_write_4(sc, R92C_RCR, 1461251538Srpaulo urtwn_read_4(sc, R92C_RCR) | 1462251538Srpaulo R92C_RCR_CBSSID_DATA | R92C_RCR_CBSSID_BCN); 1463251538Srpaulo 1464251538Srpaulo /* Enable TSF synchronization. */ 1465251538Srpaulo urtwn_tsf_sync_enable(sc); 1466251538Srpaulo 1467251538Srpaulo urtwn_write_1(sc, R92C_SIFS_CCK + 1, 10); 1468251538Srpaulo urtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10); 1469251538Srpaulo urtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10); 1470251538Srpaulo urtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10); 1471251538Srpaulo urtwn_write_1(sc, R92C_R2T_SIFS + 1, 10); 1472251538Srpaulo urtwn_write_1(sc, R92C_T2T_SIFS + 1, 10); 1473251538Srpaulo 1474251538Srpaulo /* Intialize rate adaptation. */ 1475251538Srpaulo urtwn_ra_init(sc); 1476251538Srpaulo /* Turn link LED on. */ 1477251538Srpaulo urtwn_set_led(sc, URTWN_LED_LINK, 1); 1478251538Srpaulo 1479251538Srpaulo sc->avg_pwdb = -1; /* Reset average RSSI. */ 1480251538Srpaulo /* Reset temperature calibration state machine. */ 1481251538Srpaulo sc->thcal_state = 0; 1482251538Srpaulo sc->thcal_lctemp = 0; 1483251538Srpaulo ieee80211_free_node(ni); 1484251538Srpaulo break; 1485251538Srpaulo default: 1486251538Srpaulo break; 1487251538Srpaulo } 1488251538Srpaulo URTWN_UNLOCK(sc); 1489251538Srpaulo IEEE80211_LOCK(ic); 1490251538Srpaulo return(uvp->newstate(vap, nstate, arg)); 1491251538Srpaulo} 1492251538Srpaulo 1493251538Srpaulostatic void 1494251538Srpaulourtwn_watchdog(void *arg) 1495251538Srpaulo{ 1496251538Srpaulo struct urtwn_softc *sc = arg; 1497251538Srpaulo struct ifnet *ifp = sc->sc_ifp; 1498251538Srpaulo 1499251538Srpaulo if (sc->sc_txtimer > 0) { 1500251538Srpaulo if (--sc->sc_txtimer == 0) { 1501251538Srpaulo device_printf(sc->sc_dev, "device timeout\n"); 1502251538Srpaulo ifp->if_oerrors++; 1503251538Srpaulo return; 1504251538Srpaulo } 1505251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 1506251538Srpaulo } 1507251538Srpaulo} 1508251538Srpaulo 1509251538Srpaulostatic void 1510251538Srpaulourtwn_update_avgrssi(struct urtwn_softc *sc, int rate, int8_t rssi) 1511251538Srpaulo{ 1512251538Srpaulo int pwdb; 1513251538Srpaulo 1514251538Srpaulo /* Convert antenna signal to percentage. */ 1515251538Srpaulo if (rssi <= -100 || rssi >= 20) 1516251538Srpaulo pwdb = 0; 1517251538Srpaulo else if (rssi >= 0) 1518251538Srpaulo pwdb = 100; 1519251538Srpaulo else 1520251538Srpaulo pwdb = 100 + rssi; 1521251538Srpaulo if (rate <= 3) { 1522251538Srpaulo /* CCK gain is smaller than OFDM/MCS gain. */ 1523251538Srpaulo pwdb += 6; 1524251538Srpaulo if (pwdb > 100) 1525251538Srpaulo pwdb = 100; 1526251538Srpaulo if (pwdb <= 14) 1527251538Srpaulo pwdb -= 4; 1528251538Srpaulo else if (pwdb <= 26) 1529251538Srpaulo pwdb -= 8; 1530251538Srpaulo else if (pwdb <= 34) 1531251538Srpaulo pwdb -= 6; 1532251538Srpaulo else if (pwdb <= 42) 1533251538Srpaulo pwdb -= 2; 1534251538Srpaulo } 1535251538Srpaulo if (sc->avg_pwdb == -1) /* Init. */ 1536251538Srpaulo sc->avg_pwdb = pwdb; 1537251538Srpaulo else if (sc->avg_pwdb < pwdb) 1538251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20) + 1; 1539251538Srpaulo else 1540251538Srpaulo sc->avg_pwdb = ((sc->avg_pwdb * 19 + pwdb) / 20); 1541251538Srpaulo DPRINTFN(4, "PWDB=%d EMA=%d\n", pwdb, sc->avg_pwdb); 1542251538Srpaulo} 1543251538Srpaulo 1544251538Srpaulostatic int8_t 1545251538Srpaulourtwn_get_rssi(struct urtwn_softc *sc, int rate, void *physt) 1546251538Srpaulo{ 1547251538Srpaulo static const int8_t cckoff[] = { 16, -12, -26, -46 }; 1548251538Srpaulo struct r92c_rx_phystat *phy; 1549251538Srpaulo struct r92c_rx_cck *cck; 1550251538Srpaulo uint8_t rpt; 1551251538Srpaulo int8_t rssi; 1552251538Srpaulo 1553251538Srpaulo if (rate <= 3) { 1554251538Srpaulo cck = (struct r92c_rx_cck *)physt; 1555251538Srpaulo if (sc->sc_flags & URTWN_FLAG_CCK_HIPWR) { 1556251538Srpaulo rpt = (cck->agc_rpt >> 5) & 0x3; 1557251538Srpaulo rssi = (cck->agc_rpt & 0x1f) << 1; 1558251538Srpaulo } else { 1559251538Srpaulo rpt = (cck->agc_rpt >> 6) & 0x3; 1560251538Srpaulo rssi = cck->agc_rpt & 0x3e; 1561251538Srpaulo } 1562251538Srpaulo rssi = cckoff[rpt] - rssi; 1563251538Srpaulo } else { /* OFDM/HT. */ 1564251538Srpaulo phy = (struct r92c_rx_phystat *)physt; 1565251538Srpaulo rssi = ((le32toh(phy->phydw1) >> 1) & 0x7f) - 110; 1566251538Srpaulo } 1567251538Srpaulo return (rssi); 1568251538Srpaulo} 1569251538Srpaulo 1570251538Srpaulostatic int 1571251538Srpaulourtwn_tx_start(struct urtwn_softc *sc, struct ieee80211_node *ni, 1572251538Srpaulo struct mbuf *m0, struct urtwn_data *data) 1573251538Srpaulo{ 1574251538Srpaulo struct ifnet *ifp = sc->sc_ifp; 1575251538Srpaulo struct ieee80211_frame *wh; 1576251538Srpaulo struct ieee80211_key *k; 1577251538Srpaulo struct ieee80211com *ic = ifp->if_l2com; 1578251538Srpaulo struct ieee80211vap *vap = ni->ni_vap; 1579251538Srpaulo struct usb_xfer *xfer; 1580251538Srpaulo struct r92c_tx_desc *txd; 1581251538Srpaulo uint8_t raid, type; 1582251538Srpaulo uint16_t sum; 1583251538Srpaulo int i, hasqos, xferlen; 1584251538Srpaulo struct usb_xfer *urtwn_pipes[4] = { 1585251538Srpaulo sc->sc_xfer[URTWN_BULK_TX_BE], 1586251538Srpaulo sc->sc_xfer[URTWN_BULK_TX_BK], 1587251538Srpaulo sc->sc_xfer[URTWN_BULK_TX_VI], 1588251538Srpaulo sc->sc_xfer[URTWN_BULK_TX_VO] 1589251538Srpaulo }; 1590251538Srpaulo 1591251538Srpaulo URTWN_ASSERT_LOCKED(sc); 1592251538Srpaulo 1593251538Srpaulo /* 1594251538Srpaulo * Software crypto. 1595251538Srpaulo */ 1596251538Srpaulo wh = mtod(m0, struct ieee80211_frame *); 1597251538Srpaulo if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1598251538Srpaulo k = ieee80211_crypto_encap(ni, m0); 1599251538Srpaulo if (k == NULL) { 1600251538Srpaulo device_printf(sc->sc_dev, 1601251538Srpaulo "ieee80211_crypto_encap returns NULL.\n"); 1602251538Srpaulo /* XXX we don't expect the fragmented frames */ 1603251538Srpaulo m_freem(m0); 1604251538Srpaulo return (ENOBUFS); 1605251538Srpaulo } 1606251538Srpaulo 1607251538Srpaulo /* in case packet header moved, reset pointer */ 1608251538Srpaulo wh = mtod(m0, struct ieee80211_frame *); 1609251538Srpaulo } 1610251538Srpaulo 1611251538Srpaulo switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1612251538Srpaulo case IEEE80211_FC0_TYPE_CTL: 1613251538Srpaulo case IEEE80211_FC0_TYPE_MGT: 1614251538Srpaulo xfer = sc->sc_xfer[URTWN_BULK_TX_VO]; 1615251538Srpaulo break; 1616251538Srpaulo default: 1617251538Srpaulo KASSERT(M_WME_GETAC(m0) < 4, 1618251538Srpaulo ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1619251538Srpaulo xfer = urtwn_pipes[M_WME_GETAC(m0)]; 1620251538Srpaulo break; 1621251538Srpaulo } 1622251538Srpaulo 1623251538Srpaulo hasqos = 0; 1624251538Srpaulo 1625251538Srpaulo /* Fill Tx descriptor. */ 1626251538Srpaulo txd = (struct r92c_tx_desc *)data->buf; 1627251538Srpaulo memset(txd, 0, sizeof(*txd)); 1628251538Srpaulo 1629251538Srpaulo txd->txdw0 |= htole32( 1630251538Srpaulo SM(R92C_TXDW0_PKTLEN, m0->m_pkthdr.len) | 1631251538Srpaulo SM(R92C_TXDW0_OFFSET, sizeof(*txd)) | 1632251538Srpaulo R92C_TXDW0_OWN | R92C_TXDW0_FSG | R92C_TXDW0_LSG); 1633251538Srpaulo if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1634251538Srpaulo txd->txdw0 |= htole32(R92C_TXDW0_BMCAST); 1635251538Srpaulo 1636251538Srpaulo type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1637251538Srpaulo if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1638251538Srpaulo type == IEEE80211_FC0_TYPE_DATA) { 1639251538Srpaulo if (ic->ic_curmode == IEEE80211_MODE_11B) 1640251538Srpaulo raid = R92C_RAID_11B; 1641251538Srpaulo else 1642251538Srpaulo raid = R92C_RAID_11BG; 1643251538Srpaulo txd->txdw1 |= htole32( 1644251538Srpaulo SM(R92C_TXDW1_MACID, URTWN_MACID_BSS) | 1645251538Srpaulo SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_BE) | 1646251538Srpaulo SM(R92C_TXDW1_RAID, raid) | 1647251538Srpaulo R92C_TXDW1_AGGBK); 1648251538Srpaulo 1649251538Srpaulo if (ic->ic_flags & IEEE80211_F_USEPROT) { 1650251538Srpaulo if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) { 1651251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_CTS2SELF | 1652251538Srpaulo R92C_TXDW4_HWRTSEN); 1653251538Srpaulo } else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) { 1654251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_RTSEN | 1655251538Srpaulo R92C_TXDW4_HWRTSEN); 1656251538Srpaulo } 1657251538Srpaulo } 1658251538Srpaulo /* Send RTS at OFDM24. */ 1659251538Srpaulo txd->txdw4 |= htole32(SM(R92C_TXDW4_RTSRATE, 8)); 1660251538Srpaulo txd->txdw5 |= htole32(0x0001ff00); 1661251538Srpaulo /* Send data at OFDM54. */ 1662251538Srpaulo txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, 11)); 1663251538Srpaulo } else { 1664251538Srpaulo txd->txdw1 |= htole32( 1665251538Srpaulo SM(R92C_TXDW1_MACID, 0) | 1666251538Srpaulo SM(R92C_TXDW1_QSEL, R92C_TXDW1_QSEL_MGNT) | 1667251538Srpaulo SM(R92C_TXDW1_RAID, R92C_RAID_11B)); 1668251538Srpaulo 1669251538Srpaulo /* Force CCK1. */ 1670251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_DRVRATE); 1671251538Srpaulo txd->txdw5 |= htole32(SM(R92C_TXDW5_DATARATE, 0)); 1672251538Srpaulo } 1673251538Srpaulo /* Set sequence number (already little endian). */ 1674251538Srpaulo txd->txdseq |= *(uint16_t *)wh->i_seq; 1675251538Srpaulo 1676251538Srpaulo if (!hasqos) { 1677251538Srpaulo /* Use HW sequence numbering for non-QoS frames. */ 1678251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_HWSEQ); 1679251538Srpaulo txd->txdseq |= htole16(0x8000); 1680251538Srpaulo } else 1681251538Srpaulo txd->txdw4 |= htole32(R92C_TXDW4_QOS); 1682251538Srpaulo 1683251538Srpaulo /* Compute Tx descriptor checksum. */ 1684251538Srpaulo sum = 0; 1685251538Srpaulo for (i = 0; i < sizeof(*txd) / 2; i++) 1686251538Srpaulo sum ^= ((uint16_t *)txd)[i]; 1687251538Srpaulo txd->txdsum = sum; /* NB: already little endian. */ 1688251538Srpaulo 1689251538Srpaulo if (ieee80211_radiotap_active_vap(vap)) { 1690251538Srpaulo struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; 1691251538Srpaulo 1692251538Srpaulo tap->wt_flags = 0; 1693251538Srpaulo tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1694251538Srpaulo tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1695251538Srpaulo ieee80211_radiotap_tx(vap, m0); 1696251538Srpaulo } 1697251538Srpaulo 1698251538Srpaulo xferlen = sizeof(*txd) + m0->m_pkthdr.len; 1699251538Srpaulo m_copydata(m0, 0, m0->m_pkthdr.len, (caddr_t)&txd[1]); 1700251538Srpaulo 1701251538Srpaulo data->buflen = xferlen; 1702251538Srpaulo data->ni = ni; 1703251538Srpaulo data->m = m0; 1704251538Srpaulo 1705251538Srpaulo STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1706251538Srpaulo usbd_transfer_start(xfer); 1707251538Srpaulo return (0); 1708251538Srpaulo} 1709251538Srpaulo 1710251538Srpaulostatic void 1711251538Srpaulourtwn_start(struct ifnet *ifp) 1712251538Srpaulo{ 1713251538Srpaulo struct urtwn_softc *sc = ifp->if_softc; 1714251538Srpaulo struct ieee80211_node *ni; 1715251538Srpaulo struct mbuf *m; 1716251538Srpaulo struct urtwn_data *bf; 1717251538Srpaulo 1718251538Srpaulo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1719251538Srpaulo return; 1720251538Srpaulo 1721251538Srpaulo URTWN_LOCK(sc); 1722251538Srpaulo for (;;) { 1723251538Srpaulo IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1724251538Srpaulo if (m == NULL) 1725251538Srpaulo break; 1726251538Srpaulo bf = urtwn_getbuf(sc); 1727251538Srpaulo if (bf == NULL) { 1728251538Srpaulo IFQ_DRV_PREPEND(&ifp->if_snd, m); 1729251538Srpaulo break; 1730251538Srpaulo } 1731251538Srpaulo ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1732251538Srpaulo m->m_pkthdr.rcvif = NULL; 1733251538Srpaulo 1734251538Srpaulo if (urtwn_tx_start(sc, ni, m, bf) != 0) { 1735251538Srpaulo ifp->if_oerrors++; 1736251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1737251538Srpaulo ieee80211_free_node(ni); 1738251538Srpaulo break; 1739251538Srpaulo } 1740251538Srpaulo 1741251538Srpaulo sc->sc_txtimer = 5; 1742251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 1743251538Srpaulo } 1744251538Srpaulo URTWN_UNLOCK(sc); 1745251538Srpaulo} 1746251538Srpaulo 1747251538Srpaulostatic int 1748251538Srpaulourtwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1749251538Srpaulo{ 1750251538Srpaulo struct ieee80211com *ic = ifp->if_l2com; 1751251538Srpaulo struct ifreq *ifr = (struct ifreq *) data; 1752251538Srpaulo int error = 0, startall = 0; 1753251538Srpaulo 1754251538Srpaulo switch (cmd) { 1755251538Srpaulo case SIOCSIFFLAGS: 1756251538Srpaulo if (ifp->if_flags & IFF_UP) { 1757251538Srpaulo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 1758251538Srpaulo urtwn_init(ifp->if_softc); 1759251538Srpaulo startall = 1; 1760251538Srpaulo } 1761251538Srpaulo } else { 1762251538Srpaulo if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1763251538Srpaulo urtwn_stop(ifp, 1); 1764251538Srpaulo } 1765251538Srpaulo if (startall) 1766251538Srpaulo ieee80211_start_all(ic); 1767251538Srpaulo break; 1768251538Srpaulo case SIOCGIFMEDIA: 1769251538Srpaulo error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1770251538Srpaulo break; 1771251538Srpaulo case SIOCGIFADDR: 1772251538Srpaulo error = ether_ioctl(ifp, cmd, data); 1773251538Srpaulo break; 1774251538Srpaulo default: 1775251538Srpaulo error = EINVAL; 1776251538Srpaulo break; 1777251538Srpaulo } 1778251538Srpaulo return (error); 1779251538Srpaulo} 1780251538Srpaulo 1781251538Srpaulostatic int 1782251538Srpaulourtwn_alloc_list(struct urtwn_softc *sc, struct urtwn_data data[], 1783251538Srpaulo int ndata, int maxsz) 1784251538Srpaulo{ 1785251538Srpaulo int i, error; 1786251538Srpaulo 1787251538Srpaulo for (i = 0; i < ndata; i++) { 1788251538Srpaulo struct urtwn_data *dp = &data[i]; 1789251538Srpaulo dp->sc = sc; 1790251538Srpaulo dp->m = NULL; 1791251538Srpaulo dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1792251538Srpaulo if (dp->buf == NULL) { 1793251538Srpaulo device_printf(sc->sc_dev, 1794251538Srpaulo "could not allocate buffer\n"); 1795251538Srpaulo error = ENOMEM; 1796251538Srpaulo goto fail; 1797251538Srpaulo } 1798251538Srpaulo dp->ni = NULL; 1799251538Srpaulo } 1800251538Srpaulo 1801251538Srpaulo return (0); 1802251538Srpaulofail: 1803251538Srpaulo urtwn_free_list(sc, data, ndata); 1804251538Srpaulo return (error); 1805251538Srpaulo} 1806251538Srpaulo 1807251538Srpaulostatic int 1808251538Srpaulourtwn_alloc_rx_list(struct urtwn_softc *sc) 1809251538Srpaulo{ 1810251538Srpaulo int error, i; 1811251538Srpaulo 1812251538Srpaulo error = urtwn_alloc_list(sc, sc->sc_rx, URTWN_RX_LIST_COUNT, 1813251538Srpaulo URTWN_RXBUFSZ); 1814251538Srpaulo if (error != 0) 1815251538Srpaulo return (error); 1816251538Srpaulo 1817251538Srpaulo STAILQ_INIT(&sc->sc_rx_active); 1818251538Srpaulo STAILQ_INIT(&sc->sc_rx_inactive); 1819251538Srpaulo 1820251538Srpaulo for (i = 0; i < URTWN_RX_LIST_COUNT; i++) 1821251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1822251538Srpaulo 1823251538Srpaulo return (0); 1824251538Srpaulo} 1825251538Srpaulo 1826251538Srpaulostatic int 1827251538Srpaulourtwn_alloc_tx_list(struct urtwn_softc *sc) 1828251538Srpaulo{ 1829251538Srpaulo int error, i; 1830251538Srpaulo 1831251538Srpaulo error = urtwn_alloc_list(sc, sc->sc_tx, URTWN_TX_LIST_COUNT, 1832251538Srpaulo URTWN_TXBUFSZ); 1833251538Srpaulo if (error != 0) 1834251538Srpaulo return (error); 1835251538Srpaulo 1836251538Srpaulo STAILQ_INIT(&sc->sc_tx_active); 1837251538Srpaulo STAILQ_INIT(&sc->sc_tx_inactive); 1838251538Srpaulo STAILQ_INIT(&sc->sc_tx_pending); 1839251538Srpaulo 1840251538Srpaulo for (i = 0; i < URTWN_TX_LIST_COUNT; i++) 1841251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next); 1842251538Srpaulo 1843251538Srpaulo return (0); 1844251538Srpaulo} 1845251538Srpaulo 1846251538Srpaulostatic int 1847251538Srpaulourtwn_power_on(struct urtwn_softc *sc) 1848251538Srpaulo{ 1849251538Srpaulo uint32_t reg; 1850251538Srpaulo int ntries; 1851251538Srpaulo 1852251538Srpaulo /* Wait for autoload done bit. */ 1853251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 1854251538Srpaulo if (urtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN) 1855251538Srpaulo break; 1856251538Srpaulo DELAY(5); 1857251538Srpaulo } 1858251538Srpaulo if (ntries == 1000) { 1859251538Srpaulo device_printf(sc->sc_dev, 1860251538Srpaulo "timeout waiting for chip autoload\n"); 1861251538Srpaulo return (ETIMEDOUT); 1862251538Srpaulo } 1863251538Srpaulo 1864251538Srpaulo /* Unlock ISO/CLK/Power control register. */ 1865251538Srpaulo urtwn_write_1(sc, R92C_RSV_CTRL, 0); 1866251538Srpaulo /* Move SPS into PWM mode. */ 1867251538Srpaulo urtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b); 1868251538Srpaulo DELAY(100); 1869251538Srpaulo 1870251538Srpaulo reg = urtwn_read_1(sc, R92C_LDOV12D_CTRL); 1871251538Srpaulo if (!(reg & R92C_LDOV12D_CTRL_LDV12_EN)) { 1872251538Srpaulo urtwn_write_1(sc, R92C_LDOV12D_CTRL, 1873251538Srpaulo reg | R92C_LDOV12D_CTRL_LDV12_EN); 1874251538Srpaulo DELAY(100); 1875251538Srpaulo urtwn_write_1(sc, R92C_SYS_ISO_CTRL, 1876251538Srpaulo urtwn_read_1(sc, R92C_SYS_ISO_CTRL) & 1877251538Srpaulo ~R92C_SYS_ISO_CTRL_MD2PP); 1878251538Srpaulo } 1879251538Srpaulo 1880251538Srpaulo /* Auto enable WLAN. */ 1881251538Srpaulo urtwn_write_2(sc, R92C_APS_FSMCO, 1882251538Srpaulo urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC); 1883251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 1884251538Srpaulo if (urtwn_read_2(sc, R92C_APS_FSMCO) & 1885251538Srpaulo R92C_APS_FSMCO_APFM_ONMAC) 1886251538Srpaulo break; 1887251538Srpaulo DELAY(5); 1888251538Srpaulo } 1889251538Srpaulo if (ntries == 1000) { 1890251538Srpaulo device_printf(sc->sc_dev, 1891251538Srpaulo "timeout waiting for MAC auto ON\n"); 1892251538Srpaulo return (ETIMEDOUT); 1893251538Srpaulo } 1894251538Srpaulo 1895251538Srpaulo /* Enable radio, GPIO and LED functions. */ 1896251538Srpaulo urtwn_write_2(sc, R92C_APS_FSMCO, 1897251538Srpaulo R92C_APS_FSMCO_AFSM_HSUS | 1898251538Srpaulo R92C_APS_FSMCO_PDN_EN | 1899251538Srpaulo R92C_APS_FSMCO_PFM_ALDN); 1900251538Srpaulo /* Release RF digital isolation. */ 1901251538Srpaulo urtwn_write_2(sc, R92C_SYS_ISO_CTRL, 1902251538Srpaulo urtwn_read_2(sc, R92C_SYS_ISO_CTRL) & ~R92C_SYS_ISO_CTRL_DIOR); 1903251538Srpaulo 1904251538Srpaulo /* Initialize MAC. */ 1905251538Srpaulo urtwn_write_1(sc, R92C_APSD_CTRL, 1906251538Srpaulo urtwn_read_1(sc, R92C_APSD_CTRL) & ~R92C_APSD_CTRL_OFF); 1907251538Srpaulo for (ntries = 0; ntries < 200; ntries++) { 1908251538Srpaulo if (!(urtwn_read_1(sc, R92C_APSD_CTRL) & 1909251538Srpaulo R92C_APSD_CTRL_OFF_STATUS)) 1910251538Srpaulo break; 1911251538Srpaulo DELAY(5); 1912251538Srpaulo } 1913251538Srpaulo if (ntries == 200) { 1914251538Srpaulo device_printf(sc->sc_dev, 1915251538Srpaulo "timeout waiting for MAC initialization\n"); 1916251538Srpaulo return (ETIMEDOUT); 1917251538Srpaulo } 1918251538Srpaulo 1919251538Srpaulo /* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */ 1920251538Srpaulo reg = urtwn_read_2(sc, R92C_CR); 1921251538Srpaulo reg |= R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN | 1922251538Srpaulo R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN | 1923251538Srpaulo R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN | 1924251538Srpaulo R92C_CR_ENSEC; 1925251538Srpaulo urtwn_write_2(sc, R92C_CR, reg); 1926251538Srpaulo 1927251538Srpaulo urtwn_write_1(sc, 0xfe10, 0x19); 1928251538Srpaulo return (0); 1929251538Srpaulo} 1930251538Srpaulo 1931251538Srpaulostatic int 1932251538Srpaulourtwn_llt_init(struct urtwn_softc *sc) 1933251538Srpaulo{ 1934251538Srpaulo int i, error; 1935251538Srpaulo 1936251538Srpaulo /* Reserve pages [0; R92C_TX_PAGE_COUNT]. */ 1937251538Srpaulo for (i = 0; i < R92C_TX_PAGE_COUNT; i++) { 1938251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 1939251538Srpaulo return (error); 1940251538Srpaulo } 1941251538Srpaulo /* NB: 0xff indicates end-of-list. */ 1942251538Srpaulo if ((error = urtwn_llt_write(sc, i, 0xff)) != 0) 1943251538Srpaulo return (error); 1944251538Srpaulo /* 1945251538Srpaulo * Use pages [R92C_TX_PAGE_COUNT + 1; R92C_TXPKTBUF_COUNT - 1] 1946251538Srpaulo * as ring buffer. 1947251538Srpaulo */ 1948251538Srpaulo for (++i; i < R92C_TXPKTBUF_COUNT - 1; i++) { 1949251538Srpaulo if ((error = urtwn_llt_write(sc, i, i + 1)) != 0) 1950251538Srpaulo return (error); 1951251538Srpaulo } 1952251538Srpaulo /* Make the last page point to the beginning of the ring buffer. */ 1953251538Srpaulo error = urtwn_llt_write(sc, i, R92C_TX_PAGE_COUNT + 1); 1954251538Srpaulo return (error); 1955251538Srpaulo} 1956251538Srpaulo 1957251538Srpaulostatic void 1958251538Srpaulourtwn_fw_reset(struct urtwn_softc *sc) 1959251538Srpaulo{ 1960251538Srpaulo uint16_t reg; 1961251538Srpaulo int ntries; 1962251538Srpaulo 1963251538Srpaulo /* Tell 8051 to reset itself. */ 1964251538Srpaulo urtwn_write_1(sc, R92C_HMETFR + 3, 0x20); 1965251538Srpaulo 1966251538Srpaulo /* Wait until 8051 resets by itself. */ 1967251538Srpaulo for (ntries = 0; ntries < 100; ntries++) { 1968251538Srpaulo reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN); 1969251538Srpaulo if (!(reg & R92C_SYS_FUNC_EN_CPUEN)) 1970251538Srpaulo return; 1971251538Srpaulo DELAY(50); 1972251538Srpaulo } 1973251538Srpaulo /* Force 8051 reset. */ 1974251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN); 1975251538Srpaulo} 1976251538Srpaulo 1977251538Srpaulostatic int 1978251538Srpaulourtwn_fw_loadpage(struct urtwn_softc *sc, int page, const uint8_t *buf, int len) 1979251538Srpaulo{ 1980251538Srpaulo uint32_t reg; 1981251538Srpaulo int off, mlen, error = 0; 1982251538Srpaulo 1983251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 1984251538Srpaulo reg = RW(reg, R92C_MCUFWDL_PAGE, page); 1985251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 1986251538Srpaulo 1987251538Srpaulo off = R92C_FW_START_ADDR; 1988251538Srpaulo while (len > 0) { 1989251538Srpaulo if (len > 196) 1990251538Srpaulo mlen = 196; 1991251538Srpaulo else if (len > 4) 1992251538Srpaulo mlen = 4; 1993251538Srpaulo else 1994251538Srpaulo mlen = 1; 1995251538Srpaulo /* XXX fix this deconst */ 1996251538Srpaulo error = urtwn_write_region_1(sc, off, 1997251538Srpaulo __DECONST(uint8_t *, buf), mlen); 1998251538Srpaulo if (error != 0) 1999251538Srpaulo break; 2000251538Srpaulo off += mlen; 2001251538Srpaulo buf += mlen; 2002251538Srpaulo len -= mlen; 2003251538Srpaulo } 2004251538Srpaulo return (error); 2005251538Srpaulo} 2006251538Srpaulo 2007251538Srpaulostatic int 2008251538Srpaulourtwn_load_firmware(struct urtwn_softc *sc) 2009251538Srpaulo{ 2010251538Srpaulo const struct firmware *fw; 2011251538Srpaulo const struct r92c_fw_hdr *hdr; 2012251538Srpaulo const char *imagename; 2013251538Srpaulo const u_char *ptr; 2014251538Srpaulo size_t len; 2015251538Srpaulo uint32_t reg; 2016251538Srpaulo int mlen, ntries, page, error; 2017251538Srpaulo 2018251538Srpaulo /* Read firmware image from the filesystem. */ 2019251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 2020251538Srpaulo URTWN_CHIP_UMC_A_CUT) 2021251538Srpaulo imagename = "urtwn-rtl8192cfwU"; 2022251538Srpaulo else 2023251538Srpaulo imagename = "urtwn-rtl8192cfwT"; 2024251538Srpaulo 2025251538Srpaulo fw = firmware_get(imagename); 2026251538Srpaulo if (fw == NULL) { 2027251538Srpaulo device_printf(sc->sc_dev, 2028251538Srpaulo "failed loadfirmware of file %s\n", imagename); 2029251538Srpaulo return (ENOENT); 2030251538Srpaulo } 2031251538Srpaulo 2032251538Srpaulo len = fw->datasize; 2033251538Srpaulo 2034251538Srpaulo if (len < sizeof(*hdr)) { 2035251538Srpaulo device_printf(sc->sc_dev, "firmware too short\n"); 2036251538Srpaulo error = EINVAL; 2037251538Srpaulo goto fail; 2038251538Srpaulo } 2039251538Srpaulo ptr = fw->data; 2040251538Srpaulo hdr = (const struct r92c_fw_hdr *)ptr; 2041251538Srpaulo /* Check if there is a valid FW header and skip it. */ 2042251538Srpaulo if ((le16toh(hdr->signature) >> 4) == 0x88c || 2043251538Srpaulo (le16toh(hdr->signature) >> 4) == 0x92c) { 2044251538Srpaulo DPRINTF("FW V%d.%d %02d-%02d %02d:%02d\n", 2045251538Srpaulo le16toh(hdr->version), le16toh(hdr->subversion), 2046251538Srpaulo hdr->month, hdr->date, hdr->hour, hdr->minute); 2047251538Srpaulo ptr += sizeof(*hdr); 2048251538Srpaulo len -= sizeof(*hdr); 2049251538Srpaulo } 2050251538Srpaulo 2051251538Srpaulo if (urtwn_read_1(sc, R92C_MCUFWDL) & 0x80) { 2052251538Srpaulo urtwn_fw_reset(sc); 2053251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 0); 2054251538Srpaulo } 2055251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 2056251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 2057251538Srpaulo R92C_SYS_FUNC_EN_CPUEN); 2058251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 2059251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_EN); 2060251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 2, 2061251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL + 2) & ~0x08); 2062251538Srpaulo 2063251538Srpaulo for (page = 0; len > 0; page++) { 2064251538Srpaulo mlen = min(len, R92C_FW_PAGE_SIZE); 2065251538Srpaulo error = urtwn_fw_loadpage(sc, page, ptr, mlen); 2066251538Srpaulo if (error != 0) { 2067251538Srpaulo device_printf(sc->sc_dev, 2068251538Srpaulo "could not load firmware page\n"); 2069251538Srpaulo goto fail; 2070251538Srpaulo } 2071251538Srpaulo ptr += mlen; 2072251538Srpaulo len -= mlen; 2073251538Srpaulo } 2074251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL, 2075251538Srpaulo urtwn_read_1(sc, R92C_MCUFWDL) & ~R92C_MCUFWDL_EN); 2076251538Srpaulo urtwn_write_1(sc, R92C_MCUFWDL + 1, 0); 2077251538Srpaulo 2078251538Srpaulo /* Wait for checksum report. */ 2079251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2080251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_CHKSUM_RPT) 2081251538Srpaulo break; 2082251538Srpaulo DELAY(5); 2083251538Srpaulo } 2084251538Srpaulo if (ntries == 1000) { 2085251538Srpaulo device_printf(sc->sc_dev, 2086251538Srpaulo "timeout waiting for checksum report\n"); 2087251538Srpaulo error = ETIMEDOUT; 2088251538Srpaulo goto fail; 2089251538Srpaulo } 2090251538Srpaulo 2091251538Srpaulo reg = urtwn_read_4(sc, R92C_MCUFWDL); 2092251538Srpaulo reg = (reg & ~R92C_MCUFWDL_WINTINI_RDY) | R92C_MCUFWDL_RDY; 2093251538Srpaulo urtwn_write_4(sc, R92C_MCUFWDL, reg); 2094251538Srpaulo /* Wait for firmware readiness. */ 2095251538Srpaulo for (ntries = 0; ntries < 1000; ntries++) { 2096251538Srpaulo if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY) 2097251538Srpaulo break; 2098251538Srpaulo DELAY(5); 2099251538Srpaulo } 2100251538Srpaulo if (ntries == 1000) { 2101251538Srpaulo device_printf(sc->sc_dev, 2102251538Srpaulo "timeout waiting for firmware readiness\n"); 2103251538Srpaulo error = ETIMEDOUT; 2104251538Srpaulo goto fail; 2105251538Srpaulo } 2106251538Srpaulofail: 2107251538Srpaulo firmware_put(fw, FIRMWARE_UNLOAD); 2108251538Srpaulo return (error); 2109251538Srpaulo} 2110251538Srpaulo 2111251538Srpaulostatic int 2112251538Srpaulourtwn_dma_init(struct urtwn_softc *sc) 2113251538Srpaulo{ 2114251538Srpaulo int hashq, hasnq, haslq, nqueues, nqpages, nrempages; 2115251538Srpaulo uint32_t reg; 2116251538Srpaulo int error; 2117251538Srpaulo 2118251538Srpaulo /* Initialize LLT table. */ 2119251538Srpaulo error = urtwn_llt_init(sc); 2120251538Srpaulo if (error != 0) 2121251538Srpaulo return (error); 2122251538Srpaulo 2123251538Srpaulo /* Get Tx queues to USB endpoints mapping. */ 2124251538Srpaulo hashq = hasnq = haslq = 0; 2125251538Srpaulo reg = urtwn_read_2(sc, R92C_USB_EP + 1); 2126251538Srpaulo DPRINTFN(2, "USB endpoints mapping 0x%x\n", reg); 2127251538Srpaulo if (MS(reg, R92C_USB_EP_HQ) != 0) 2128251538Srpaulo hashq = 1; 2129251538Srpaulo if (MS(reg, R92C_USB_EP_NQ) != 0) 2130251538Srpaulo hasnq = 1; 2131251538Srpaulo if (MS(reg, R92C_USB_EP_LQ) != 0) 2132251538Srpaulo haslq = 1; 2133251538Srpaulo nqueues = hashq + hasnq + haslq; 2134251538Srpaulo if (nqueues == 0) 2135251538Srpaulo return (EIO); 2136251538Srpaulo /* Get the number of pages for each queue. */ 2137251538Srpaulo nqpages = (R92C_TX_PAGE_COUNT - R92C_PUBQ_NPAGES) / nqueues; 2138251538Srpaulo /* The remaining pages are assigned to the high priority queue. */ 2139251538Srpaulo nrempages = (R92C_TX_PAGE_COUNT - R92C_PUBQ_NPAGES) % nqueues; 2140251538Srpaulo 2141251538Srpaulo /* Set number of pages for normal priority queue. */ 2142251538Srpaulo urtwn_write_1(sc, R92C_RQPN_NPQ, hasnq ? nqpages : 0); 2143251538Srpaulo urtwn_write_4(sc, R92C_RQPN, 2144251538Srpaulo /* Set number of pages for public queue. */ 2145251538Srpaulo SM(R92C_RQPN_PUBQ, R92C_PUBQ_NPAGES) | 2146251538Srpaulo /* Set number of pages for high priority queue. */ 2147251538Srpaulo SM(R92C_RQPN_HPQ, hashq ? nqpages + nrempages : 0) | 2148251538Srpaulo /* Set number of pages for low priority queue. */ 2149251538Srpaulo SM(R92C_RQPN_LPQ, haslq ? nqpages : 0) | 2150251538Srpaulo /* Load values. */ 2151251538Srpaulo R92C_RQPN_LD); 2152251538Srpaulo 2153251538Srpaulo urtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, R92C_TX_PAGE_BOUNDARY); 2154251538Srpaulo urtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, R92C_TX_PAGE_BOUNDARY); 2155251538Srpaulo urtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, R92C_TX_PAGE_BOUNDARY); 2156251538Srpaulo urtwn_write_1(sc, R92C_TRXFF_BNDY, R92C_TX_PAGE_BOUNDARY); 2157251538Srpaulo urtwn_write_1(sc, R92C_TDECTRL + 1, R92C_TX_PAGE_BOUNDARY); 2158251538Srpaulo 2159251538Srpaulo /* Set queue to USB pipe mapping. */ 2160251538Srpaulo reg = urtwn_read_2(sc, R92C_TRXDMA_CTRL); 2161251538Srpaulo reg &= ~R92C_TRXDMA_CTRL_QMAP_M; 2162251538Srpaulo if (nqueues == 1) { 2163251538Srpaulo if (hashq) 2164251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ; 2165251538Srpaulo else if (hasnq) 2166251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_NQ; 2167251538Srpaulo else 2168251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_LQ; 2169251538Srpaulo } else if (nqueues == 2) { 2170251538Srpaulo /* All 2-endpoints configs have a high priority queue. */ 2171251538Srpaulo if (!hashq) 2172251538Srpaulo return (EIO); 2173251538Srpaulo if (hasnq) 2174251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_NQ; 2175251538Srpaulo else 2176251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_HQ_LQ; 2177251538Srpaulo } else 2178251538Srpaulo reg |= R92C_TRXDMA_CTRL_QMAP_3EP; 2179251538Srpaulo urtwn_write_2(sc, R92C_TRXDMA_CTRL, reg); 2180251538Srpaulo 2181251538Srpaulo /* Set Tx/Rx transfer page boundary. */ 2182251538Srpaulo urtwn_write_2(sc, R92C_TRXFF_BNDY + 2, 0x27ff); 2183251538Srpaulo 2184251538Srpaulo /* Set Tx/Rx transfer page size. */ 2185251538Srpaulo urtwn_write_1(sc, R92C_PBP, 2186251538Srpaulo SM(R92C_PBP_PSRX, R92C_PBP_128) | 2187251538Srpaulo SM(R92C_PBP_PSTX, R92C_PBP_128)); 2188251538Srpaulo return (0); 2189251538Srpaulo} 2190251538Srpaulo 2191251538Srpaulostatic void 2192251538Srpaulourtwn_mac_init(struct urtwn_softc *sc) 2193251538Srpaulo{ 2194251538Srpaulo int i; 2195251538Srpaulo 2196251538Srpaulo /* Write MAC initialization values. */ 2197251538Srpaulo for (i = 0; i < nitems(rtl8192cu_mac); i++) 2198251538Srpaulo urtwn_write_1(sc, rtl8192cu_mac[i].reg, rtl8192cu_mac[i].val); 2199251538Srpaulo} 2200251538Srpaulo 2201251538Srpaulostatic void 2202251538Srpaulourtwn_bb_init(struct urtwn_softc *sc) 2203251538Srpaulo{ 2204251538Srpaulo const struct urtwn_bb_prog *prog; 2205251538Srpaulo uint32_t reg; 2206251538Srpaulo int i; 2207251538Srpaulo 2208251538Srpaulo /* Enable BB and RF. */ 2209251538Srpaulo urtwn_write_2(sc, R92C_SYS_FUNC_EN, 2210251538Srpaulo urtwn_read_2(sc, R92C_SYS_FUNC_EN) | 2211251538Srpaulo R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST | 2212251538Srpaulo R92C_SYS_FUNC_EN_DIO_RF); 2213251538Srpaulo 2214251538Srpaulo urtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83); 2215251538Srpaulo 2216251538Srpaulo urtwn_write_1(sc, R92C_RF_CTRL, 2217251538Srpaulo R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB); 2218251538Srpaulo urtwn_write_1(sc, R92C_SYS_FUNC_EN, 2219251538Srpaulo R92C_SYS_FUNC_EN_USBA | R92C_SYS_FUNC_EN_USBD | 2220251538Srpaulo R92C_SYS_FUNC_EN_BB_GLB_RST | R92C_SYS_FUNC_EN_BBRSTB); 2221251538Srpaulo 2222251538Srpaulo urtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f); 2223251538Srpaulo urtwn_write_1(sc, 0x15, 0xe9); 2224251538Srpaulo urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80); 2225251538Srpaulo 2226251538Srpaulo /* Select BB programming based on board type. */ 2227251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 2228251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 2229251538Srpaulo prog = &rtl8188ce_bb_prog; 2230251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 2231251538Srpaulo prog = &rtl8188ru_bb_prog; 2232251538Srpaulo else 2233251538Srpaulo prog = &rtl8188cu_bb_prog; 2234251538Srpaulo } else { 2235251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 2236251538Srpaulo prog = &rtl8192ce_bb_prog; 2237251538Srpaulo else 2238251538Srpaulo prog = &rtl8192cu_bb_prog; 2239251538Srpaulo } 2240251538Srpaulo /* Write BB initialization values. */ 2241251538Srpaulo for (i = 0; i < prog->count; i++) { 2242251538Srpaulo urtwn_bb_write(sc, prog->regs[i], prog->vals[i]); 2243251538Srpaulo DELAY(1); 2244251538Srpaulo } 2245251538Srpaulo 2246251538Srpaulo if (sc->chip & URTWN_CHIP_92C_1T2R) { 2247251538Srpaulo /* 8192C 1T only configuration. */ 2248251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_TXINFO); 2249251538Srpaulo reg = (reg & ~0x00000003) | 0x2; 2250251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_TXINFO, reg); 2251251538Srpaulo 2252251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA1_TXINFO); 2253251538Srpaulo reg = (reg & ~0x00300033) | 0x00200022; 2254251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_TXINFO, reg); 2255251538Srpaulo 2256251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_AFESETTING); 2257251538Srpaulo reg = (reg & ~0xff000000) | 0x45 << 24; 2258251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_AFESETTING, reg); 2259251538Srpaulo 2260251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_TRXPATHENA); 2261251538Srpaulo reg = (reg & ~0x000000ff) | 0x23; 2262251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_TRXPATHENA, reg); 2263251538Srpaulo 2264251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM0_AGCPARAM1); 2265251538Srpaulo reg = (reg & ~0x00000030) | 1 << 4; 2266251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCPARAM1, reg); 2267251538Srpaulo 2268251538Srpaulo reg = urtwn_bb_read(sc, 0xe74); 2269251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 2270251538Srpaulo urtwn_bb_write(sc, 0xe74, reg); 2271251538Srpaulo reg = urtwn_bb_read(sc, 0xe78); 2272251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 2273251538Srpaulo urtwn_bb_write(sc, 0xe78, reg); 2274251538Srpaulo reg = urtwn_bb_read(sc, 0xe7c); 2275251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 2276251538Srpaulo urtwn_bb_write(sc, 0xe7c, reg); 2277251538Srpaulo reg = urtwn_bb_read(sc, 0xe80); 2278251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 2279251538Srpaulo urtwn_bb_write(sc, 0xe80, reg); 2280251538Srpaulo reg = urtwn_bb_read(sc, 0xe88); 2281251538Srpaulo reg = (reg & ~0x0c000000) | 2 << 26; 2282251538Srpaulo urtwn_bb_write(sc, 0xe88, reg); 2283251538Srpaulo } 2284251538Srpaulo 2285251538Srpaulo /* Write AGC values. */ 2286251538Srpaulo for (i = 0; i < prog->agccount; i++) { 2287251538Srpaulo urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, 2288251538Srpaulo prog->agcvals[i]); 2289251538Srpaulo DELAY(1); 2290251538Srpaulo } 2291251538Srpaulo 2292251538Srpaulo if (urtwn_bb_read(sc, R92C_HSSI_PARAM2(0)) & 2293251538Srpaulo R92C_HSSI_PARAM2_CCK_HIPWR) 2294251538Srpaulo sc->sc_flags |= URTWN_FLAG_CCK_HIPWR; 2295251538Srpaulo} 2296251538Srpaulo 2297251538Srpaulovoid 2298251538Srpaulourtwn_rf_init(struct urtwn_softc *sc) 2299251538Srpaulo{ 2300251538Srpaulo const struct urtwn_rf_prog *prog; 2301251538Srpaulo uint32_t reg, type; 2302251538Srpaulo int i, j, idx, off; 2303251538Srpaulo 2304251538Srpaulo /* Select RF programming based on board type. */ 2305251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 2306251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_MINICARD) 2307251538Srpaulo prog = rtl8188ce_rf_prog; 2308251538Srpaulo else if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 2309251538Srpaulo prog = rtl8188ru_rf_prog; 2310251538Srpaulo else 2311251538Srpaulo prog = rtl8188cu_rf_prog; 2312251538Srpaulo } else 2313251538Srpaulo prog = rtl8192ce_rf_prog; 2314251538Srpaulo 2315251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 2316251538Srpaulo /* Save RF_ENV control type. */ 2317251538Srpaulo idx = i / 2; 2318251538Srpaulo off = (i % 2) * 16; 2319251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 2320251538Srpaulo type = (reg >> off) & 0x10; 2321251538Srpaulo 2322251538Srpaulo /* Set RF_ENV enable. */ 2323251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 2324251538Srpaulo reg |= 0x100000; 2325251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 2326251538Srpaulo DELAY(1); 2327251538Srpaulo /* Set RF_ENV output high. */ 2328251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACEOE(i)); 2329251538Srpaulo reg |= 0x10; 2330251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACEOE(i), reg); 2331251538Srpaulo DELAY(1); 2332251538Srpaulo /* Set address and data lengths of RF registers. */ 2333251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 2334251538Srpaulo reg &= ~R92C_HSSI_PARAM2_ADDR_LENGTH; 2335251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 2336251538Srpaulo DELAY(1); 2337251538Srpaulo reg = urtwn_bb_read(sc, R92C_HSSI_PARAM2(i)); 2338251538Srpaulo reg &= ~R92C_HSSI_PARAM2_DATA_LENGTH; 2339251538Srpaulo urtwn_bb_write(sc, R92C_HSSI_PARAM2(i), reg); 2340251538Srpaulo DELAY(1); 2341251538Srpaulo 2342251538Srpaulo /* Write RF initialization values for this chain. */ 2343251538Srpaulo for (j = 0; j < prog[i].count; j++) { 2344251538Srpaulo if (prog[i].regs[j] >= 0xf9 && 2345251538Srpaulo prog[i].regs[j] <= 0xfe) { 2346251538Srpaulo /* 2347251538Srpaulo * These are fake RF registers offsets that 2348251538Srpaulo * indicate a delay is required. 2349251538Srpaulo */ 2350251538Srpaulo usb_pause_mtx(&sc->sc_mtx, 50); 2351251538Srpaulo continue; 2352251538Srpaulo } 2353251538Srpaulo urtwn_rf_write(sc, i, prog[i].regs[j], 2354251538Srpaulo prog[i].vals[j]); 2355251538Srpaulo DELAY(1); 2356251538Srpaulo } 2357251538Srpaulo 2358251538Srpaulo /* Restore RF_ENV control type. */ 2359251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)); 2360251538Srpaulo reg &= ~(0x10 << off) | (type << off); 2361251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg); 2362251538Srpaulo 2363251538Srpaulo /* Cache RF register CHNLBW. */ 2364251538Srpaulo sc->rf_chnlbw[i] = urtwn_rf_read(sc, i, R92C_RF_CHNLBW); 2365251538Srpaulo } 2366251538Srpaulo 2367251538Srpaulo if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) == 2368251538Srpaulo URTWN_CHIP_UMC_A_CUT) { 2369251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G1, 0x30255); 2370251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_RX_G2, 0x50a00); 2371251538Srpaulo } 2372251538Srpaulo} 2373251538Srpaulo 2374251538Srpaulostatic void 2375251538Srpaulourtwn_cam_init(struct urtwn_softc *sc) 2376251538Srpaulo{ 2377251538Srpaulo /* Invalidate all CAM entries. */ 2378251538Srpaulo urtwn_write_4(sc, R92C_CAMCMD, 2379251538Srpaulo R92C_CAMCMD_POLLING | R92C_CAMCMD_CLR); 2380251538Srpaulo} 2381251538Srpaulo 2382251538Srpaulostatic void 2383251538Srpaulourtwn_pa_bias_init(struct urtwn_softc *sc) 2384251538Srpaulo{ 2385251538Srpaulo uint8_t reg; 2386251538Srpaulo int i; 2387251538Srpaulo 2388251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 2389251538Srpaulo if (sc->pa_setting & (1 << i)) 2390251538Srpaulo continue; 2391251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x0f406); 2392251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x4f406); 2393251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0x8f406); 2394251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_IPA, 0xcf406); 2395251538Srpaulo } 2396251538Srpaulo if (!(sc->pa_setting & 0x10)) { 2397251538Srpaulo reg = urtwn_read_1(sc, 0x16); 2398251538Srpaulo reg = (reg & ~0xf0) | 0x90; 2399251538Srpaulo urtwn_write_1(sc, 0x16, reg); 2400251538Srpaulo } 2401251538Srpaulo} 2402251538Srpaulo 2403251538Srpaulostatic void 2404251538Srpaulourtwn_rxfilter_init(struct urtwn_softc *sc) 2405251538Srpaulo{ 2406251538Srpaulo /* Initialize Rx filter. */ 2407251538Srpaulo /* TODO: use better filter for monitor mode. */ 2408251538Srpaulo urtwn_write_4(sc, R92C_RCR, 2409251538Srpaulo R92C_RCR_AAP | R92C_RCR_APM | R92C_RCR_AM | R92C_RCR_AB | 2410251538Srpaulo R92C_RCR_APP_ICV | R92C_RCR_AMF | R92C_RCR_HTC_LOC_CTRL | 2411251538Srpaulo R92C_RCR_APP_MIC | R92C_RCR_APP_PHYSTS); 2412251538Srpaulo /* Accept all multicast frames. */ 2413251538Srpaulo urtwn_write_4(sc, R92C_MAR + 0, 0xffffffff); 2414251538Srpaulo urtwn_write_4(sc, R92C_MAR + 4, 0xffffffff); 2415251538Srpaulo /* Accept all management frames. */ 2416251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP0, 0xffff); 2417251538Srpaulo /* Reject all control frames. */ 2418251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP1, 0x0000); 2419251538Srpaulo /* Accept all data frames. */ 2420251538Srpaulo urtwn_write_2(sc, R92C_RXFLTMAP2, 0xffff); 2421251538Srpaulo} 2422251538Srpaulo 2423251538Srpaulostatic void 2424251538Srpaulourtwn_edca_init(struct urtwn_softc *sc) 2425251538Srpaulo{ 2426251538Srpaulo urtwn_write_2(sc, R92C_SPEC_SIFS, 0x100a); 2427251538Srpaulo urtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x100a); 2428251538Srpaulo urtwn_write_2(sc, R92C_SIFS_CCK, 0x100a); 2429251538Srpaulo urtwn_write_2(sc, R92C_SIFS_OFDM, 0x100a); 2430251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b); 2431251538Srpaulo urtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f); 2432251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005ea324); 2433251538Srpaulo urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002fa226); 2434251538Srpaulo} 2435251538Srpaulo 2436251538Srpaulovoid 2437251538Srpaulourtwn_write_txpower(struct urtwn_softc *sc, int chain, 2438251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 2439251538Srpaulo{ 2440251538Srpaulo uint32_t reg; 2441251538Srpaulo 2442251538Srpaulo /* Write per-CCK rate Tx power. */ 2443251538Srpaulo if (chain == 0) { 2444251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32); 2445251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK1, power[0]); 2446251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg); 2447251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 2448251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK2, power[1]); 2449251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK55, power[2]); 2450251538Srpaulo reg = RW(reg, R92C_TXAGC_A_CCK11, power[3]); 2451251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 2452251538Srpaulo } else { 2453251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32); 2454251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK1, power[0]); 2455251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK2, power[1]); 2456251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK55, power[2]); 2457251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg); 2458251538Srpaulo reg = urtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11); 2459251538Srpaulo reg = RW(reg, R92C_TXAGC_B_CCK11, power[3]); 2460251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg); 2461251538Srpaulo } 2462251538Srpaulo /* Write per-OFDM rate Tx power. */ 2463251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE18_06(chain), 2464251538Srpaulo SM(R92C_TXAGC_RATE06, power[ 4]) | 2465251538Srpaulo SM(R92C_TXAGC_RATE09, power[ 5]) | 2466251538Srpaulo SM(R92C_TXAGC_RATE12, power[ 6]) | 2467251538Srpaulo SM(R92C_TXAGC_RATE18, power[ 7])); 2468251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_RATE54_24(chain), 2469251538Srpaulo SM(R92C_TXAGC_RATE24, power[ 8]) | 2470251538Srpaulo SM(R92C_TXAGC_RATE36, power[ 9]) | 2471251538Srpaulo SM(R92C_TXAGC_RATE48, power[10]) | 2472251538Srpaulo SM(R92C_TXAGC_RATE54, power[11])); 2473251538Srpaulo /* Write per-MCS Tx power. */ 2474251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS03_MCS00(chain), 2475251538Srpaulo SM(R92C_TXAGC_MCS00, power[12]) | 2476251538Srpaulo SM(R92C_TXAGC_MCS01, power[13]) | 2477251538Srpaulo SM(R92C_TXAGC_MCS02, power[14]) | 2478251538Srpaulo SM(R92C_TXAGC_MCS03, power[15])); 2479251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS07_MCS04(chain), 2480251538Srpaulo SM(R92C_TXAGC_MCS04, power[16]) | 2481251538Srpaulo SM(R92C_TXAGC_MCS05, power[17]) | 2482251538Srpaulo SM(R92C_TXAGC_MCS06, power[18]) | 2483251538Srpaulo SM(R92C_TXAGC_MCS07, power[19])); 2484251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS11_MCS08(chain), 2485251538Srpaulo SM(R92C_TXAGC_MCS08, power[20]) | 2486251538Srpaulo SM(R92C_TXAGC_MCS08, power[21]) | 2487251538Srpaulo SM(R92C_TXAGC_MCS10, power[22]) | 2488251538Srpaulo SM(R92C_TXAGC_MCS11, power[23])); 2489251538Srpaulo urtwn_bb_write(sc, R92C_TXAGC_MCS15_MCS12(chain), 2490251538Srpaulo SM(R92C_TXAGC_MCS12, power[24]) | 2491251538Srpaulo SM(R92C_TXAGC_MCS13, power[25]) | 2492251538Srpaulo SM(R92C_TXAGC_MCS14, power[26]) | 2493251538Srpaulo SM(R92C_TXAGC_MCS15, power[27])); 2494251538Srpaulo} 2495251538Srpaulo 2496251538Srpaulovoid 2497251538Srpaulourtwn_get_txpower(struct urtwn_softc *sc, int chain, 2498251538Srpaulo struct ieee80211_channel *c, struct ieee80211_channel *extc, 2499251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]) 2500251538Srpaulo{ 2501251538Srpaulo struct ieee80211com *ic = sc->sc_ifp->if_l2com; 2502251538Srpaulo struct r92c_rom *rom = &sc->rom; 2503251538Srpaulo uint16_t cckpow, ofdmpow, htpow, diff, max; 2504251538Srpaulo const struct urtwn_txpwr *base; 2505251538Srpaulo int ridx, chan, group; 2506251538Srpaulo 2507251538Srpaulo /* Determine channel group. */ 2508251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 2509251538Srpaulo if (chan <= 3) 2510251538Srpaulo group = 0; 2511251538Srpaulo else if (chan <= 9) 2512251538Srpaulo group = 1; 2513251538Srpaulo else 2514251538Srpaulo group = 2; 2515251538Srpaulo 2516251538Srpaulo /* Get original Tx power based on board type and RF chain. */ 2517251538Srpaulo if (!(sc->chip & URTWN_CHIP_92C)) { 2518251538Srpaulo if (sc->board_type == R92C_BOARD_TYPE_HIGHPA) 2519251538Srpaulo base = &rtl8188ru_txagc[chain]; 2520251538Srpaulo else 2521251538Srpaulo base = &rtl8192cu_txagc[chain]; 2522251538Srpaulo } else 2523251538Srpaulo base = &rtl8192cu_txagc[chain]; 2524251538Srpaulo 2525251538Srpaulo memset(power, 0, URTWN_RIDX_COUNT * sizeof(power[0])); 2526251538Srpaulo if (sc->regulatory == 0) { 2527251538Srpaulo for (ridx = 0; ridx <= 3; ridx++) 2528251538Srpaulo power[ridx] = base->pwr[0][ridx]; 2529251538Srpaulo } 2530251538Srpaulo for (ridx = 4; ridx < URTWN_RIDX_COUNT; ridx++) { 2531251538Srpaulo if (sc->regulatory == 3) { 2532251538Srpaulo power[ridx] = base->pwr[0][ridx]; 2533251538Srpaulo /* Apply vendor limits. */ 2534251538Srpaulo if (extc != NULL) 2535251538Srpaulo max = rom->ht40_max_pwr[group]; 2536251538Srpaulo else 2537251538Srpaulo max = rom->ht20_max_pwr[group]; 2538251538Srpaulo max = (max >> (chain * 4)) & 0xf; 2539251538Srpaulo if (power[ridx] > max) 2540251538Srpaulo power[ridx] = max; 2541251538Srpaulo } else if (sc->regulatory == 1) { 2542251538Srpaulo if (extc == NULL) 2543251538Srpaulo power[ridx] = base->pwr[group][ridx]; 2544251538Srpaulo } else if (sc->regulatory != 2) 2545251538Srpaulo power[ridx] = base->pwr[0][ridx]; 2546251538Srpaulo } 2547251538Srpaulo 2548251538Srpaulo /* Compute per-CCK rate Tx power. */ 2549251538Srpaulo cckpow = rom->cck_tx_pwr[chain][group]; 2550251538Srpaulo for (ridx = 0; ridx <= 3; ridx++) { 2551251538Srpaulo power[ridx] += cckpow; 2552251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 2553251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 2554251538Srpaulo } 2555251538Srpaulo 2556251538Srpaulo htpow = rom->ht40_1s_tx_pwr[chain][group]; 2557251538Srpaulo if (sc->ntxchains > 1) { 2558251538Srpaulo /* Apply reduction for 2 spatial streams. */ 2559251538Srpaulo diff = rom->ht40_2s_tx_pwr_diff[group]; 2560251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 2561251538Srpaulo htpow = (htpow > diff) ? htpow - diff : 0; 2562251538Srpaulo } 2563251538Srpaulo 2564251538Srpaulo /* Compute per-OFDM rate Tx power. */ 2565251538Srpaulo diff = rom->ofdm_tx_pwr_diff[group]; 2566251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 2567251538Srpaulo ofdmpow = htpow + diff; /* HT->OFDM correction. */ 2568251538Srpaulo for (ridx = 4; ridx <= 11; ridx++) { 2569251538Srpaulo power[ridx] += ofdmpow; 2570251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 2571251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 2572251538Srpaulo } 2573251538Srpaulo 2574251538Srpaulo /* Compute per-MCS Tx power. */ 2575251538Srpaulo if (extc == NULL) { 2576251538Srpaulo diff = rom->ht20_tx_pwr_diff[group]; 2577251538Srpaulo diff = (diff >> (chain * 4)) & 0xf; 2578251538Srpaulo htpow += diff; /* HT40->HT20 correction. */ 2579251538Srpaulo } 2580251538Srpaulo for (ridx = 12; ridx <= 27; ridx++) { 2581251538Srpaulo power[ridx] += htpow; 2582251538Srpaulo if (power[ridx] > R92C_MAX_TX_PWR) 2583251538Srpaulo power[ridx] = R92C_MAX_TX_PWR; 2584251538Srpaulo } 2585251538Srpaulo#ifdef URTWN_DEBUG 2586251538Srpaulo if (urtwn_debug >= 4) { 2587251538Srpaulo /* Dump per-rate Tx power values. */ 2588251538Srpaulo printf("Tx power for chain %d:\n", chain); 2589251538Srpaulo for (ridx = 0; ridx < URTWN_RIDX_COUNT; ridx++) 2590251538Srpaulo printf("Rate %d = %u\n", ridx, power[ridx]); 2591251538Srpaulo } 2592251538Srpaulo#endif 2593251538Srpaulo} 2594251538Srpaulo 2595251538Srpaulovoid 2596251538Srpaulourtwn_set_txpower(struct urtwn_softc *sc, struct ieee80211_channel *c, 2597251538Srpaulo struct ieee80211_channel *extc) 2598251538Srpaulo{ 2599251538Srpaulo uint16_t power[URTWN_RIDX_COUNT]; 2600251538Srpaulo int i; 2601251538Srpaulo 2602251538Srpaulo for (i = 0; i < sc->ntxchains; i++) { 2603251538Srpaulo /* Compute per-rate Tx power values. */ 2604251538Srpaulo urtwn_get_txpower(sc, i, c, extc, power); 2605251538Srpaulo /* Write per-rate Tx power values to hardware. */ 2606251538Srpaulo urtwn_write_txpower(sc, i, power); 2607251538Srpaulo } 2608251538Srpaulo} 2609251538Srpaulo 2610251538Srpaulostatic void 2611251538Srpaulourtwn_scan_start(struct ieee80211com *ic) 2612251538Srpaulo{ 2613251538Srpaulo /* XXX do nothing? */ 2614251538Srpaulo} 2615251538Srpaulo 2616251538Srpaulostatic void 2617251538Srpaulourtwn_scan_end(struct ieee80211com *ic) 2618251538Srpaulo{ 2619251538Srpaulo /* XXX do nothing? */ 2620251538Srpaulo} 2621251538Srpaulo 2622251538Srpaulostatic void 2623251538Srpaulourtwn_set_channel(struct ieee80211com *ic) 2624251538Srpaulo{ 2625251538Srpaulo struct urtwn_softc *sc = ic->ic_ifp->if_softc; 2626251538Srpaulo 2627251538Srpaulo URTWN_LOCK(sc); 2628251538Srpaulo urtwn_set_chan(sc, ic->ic_curchan, NULL); 2629251538Srpaulo URTWN_UNLOCK(sc); 2630251538Srpaulo} 2631251538Srpaulo 2632251538Srpaulostatic void 2633251538Srpaulourtwn_update_mcast(struct ifnet *ifp) 2634251538Srpaulo{ 2635251538Srpaulo /* XXX do nothing? */ 2636251538Srpaulo} 2637251538Srpaulo 2638251538Srpaulostatic void 2639251538Srpaulourtwn_set_chan(struct urtwn_softc *sc, struct ieee80211_channel *c, 2640251538Srpaulo struct ieee80211_channel *extc) 2641251538Srpaulo{ 2642251538Srpaulo struct ieee80211com *ic = sc->sc_ifp->if_l2com; 2643251538Srpaulo uint32_t reg; 2644251538Srpaulo u_int chan; 2645251538Srpaulo int i; 2646251538Srpaulo 2647251538Srpaulo chan = ieee80211_chan2ieee(ic, c); /* XXX center freq! */ 2648251538Srpaulo if (chan == 0 || chan == IEEE80211_CHAN_ANY) { 2649251538Srpaulo device_printf(sc->sc_dev, 2650251538Srpaulo "%s: invalid channel %x\n", __func__, chan); 2651251538Srpaulo return; 2652251538Srpaulo } 2653251538Srpaulo 2654251538Srpaulo /* Set Tx power for this new channel. */ 2655251538Srpaulo urtwn_set_txpower(sc, c, extc); 2656251538Srpaulo 2657251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 2658251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_CHNLBW, 2659251538Srpaulo RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan)); 2660251538Srpaulo } 2661251538Srpaulo#ifndef IEEE80211_NO_HT 2662251538Srpaulo if (extc != NULL) { 2663251538Srpaulo /* Is secondary channel below or above primary? */ 2664251538Srpaulo int prichlo = c->ic_freq < extc->ic_freq; 2665251538Srpaulo 2666251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 2667251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) & ~R92C_BWOPMODE_20MHZ); 2668251538Srpaulo 2669251538Srpaulo reg = urtwn_read_1(sc, R92C_RRSR + 2); 2670251538Srpaulo reg = (reg & ~0x6f) | (prichlo ? 1 : 2) << 5; 2671251538Srpaulo urtwn_write_1(sc, R92C_RRSR + 2, reg); 2672251538Srpaulo 2673251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 2674251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) | R92C_RFMOD_40MHZ); 2675251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 2676251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) | R92C_RFMOD_40MHZ); 2677251538Srpaulo 2678251538Srpaulo /* Set CCK side band. */ 2679251538Srpaulo reg = urtwn_bb_read(sc, R92C_CCK0_SYSTEM); 2680251538Srpaulo reg = (reg & ~0x00000010) | (prichlo ? 0 : 1) << 4; 2681251538Srpaulo urtwn_bb_write(sc, R92C_CCK0_SYSTEM, reg); 2682251538Srpaulo 2683251538Srpaulo reg = urtwn_bb_read(sc, R92C_OFDM1_LSTF); 2684251538Srpaulo reg = (reg & ~0x00000c00) | (prichlo ? 1 : 2) << 10; 2685251538Srpaulo urtwn_bb_write(sc, R92C_OFDM1_LSTF, reg); 2686251538Srpaulo 2687251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 2688251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) & 2689251538Srpaulo ~R92C_FPGA0_ANAPARAM2_CBW20); 2690251538Srpaulo 2691251538Srpaulo reg = urtwn_bb_read(sc, 0x818); 2692251538Srpaulo reg = (reg & ~0x0c000000) | (prichlo ? 2 : 1) << 26; 2693251538Srpaulo urtwn_bb_write(sc, 0x818, reg); 2694251538Srpaulo 2695251538Srpaulo /* Select 40MHz bandwidth. */ 2696251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 2697251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | chan); 2698251538Srpaulo } else 2699251538Srpaulo#endif 2700251538Srpaulo { 2701251538Srpaulo urtwn_write_1(sc, R92C_BWOPMODE, 2702251538Srpaulo urtwn_read_1(sc, R92C_BWOPMODE) | R92C_BWOPMODE_20MHZ); 2703251538Srpaulo 2704251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, 2705251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_RFMOD) & ~R92C_RFMOD_40MHZ); 2706251538Srpaulo urtwn_bb_write(sc, R92C_FPGA1_RFMOD, 2707251538Srpaulo urtwn_bb_read(sc, R92C_FPGA1_RFMOD) & ~R92C_RFMOD_40MHZ); 2708251538Srpaulo 2709251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_ANAPARAM2, 2710251538Srpaulo urtwn_bb_read(sc, R92C_FPGA0_ANAPARAM2) | 2711251538Srpaulo R92C_FPGA0_ANAPARAM2_CBW20); 2712251538Srpaulo 2713251538Srpaulo /* Select 20MHz bandwidth. */ 2714251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 2715251538Srpaulo (sc->rf_chnlbw[0] & ~0xfff) | R92C_RF_CHNLBW_BW20 | chan); 2716251538Srpaulo } 2717251538Srpaulo} 2718251538Srpaulo 2719251538Srpaulostatic void 2720251538Srpaulourtwn_iq_calib(struct urtwn_softc *sc) 2721251538Srpaulo{ 2722251538Srpaulo /* TODO */ 2723251538Srpaulo} 2724251538Srpaulo 2725251538Srpaulostatic void 2726251538Srpaulourtwn_lc_calib(struct urtwn_softc *sc) 2727251538Srpaulo{ 2728251538Srpaulo uint32_t rf_ac[2]; 2729251538Srpaulo uint8_t txmode; 2730251538Srpaulo int i; 2731251538Srpaulo 2732251538Srpaulo txmode = urtwn_read_1(sc, R92C_OFDM1_LSTF + 3); 2733251538Srpaulo if ((txmode & 0x70) != 0) { 2734251538Srpaulo /* Disable all continuous Tx. */ 2735251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70); 2736251538Srpaulo 2737251538Srpaulo /* Set RF mode to standby mode. */ 2738251538Srpaulo for (i = 0; i < sc->nrxchains; i++) { 2739251538Srpaulo rf_ac[i] = urtwn_rf_read(sc, i, R92C_RF_AC); 2740251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, 2741251538Srpaulo RW(rf_ac[i], R92C_RF_AC_MODE, 2742251538Srpaulo R92C_RF_AC_MODE_STANDBY)); 2743251538Srpaulo } 2744251538Srpaulo } else { 2745251538Srpaulo /* Block all Tx queues. */ 2746251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0xff); 2747251538Srpaulo } 2748251538Srpaulo /* Start calibration. */ 2749251538Srpaulo urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, 2750251538Srpaulo urtwn_rf_read(sc, 0, R92C_RF_CHNLBW) | R92C_RF_CHNLBW_LCSTART); 2751251538Srpaulo 2752251538Srpaulo /* Give calibration the time to complete. */ 2753251538Srpaulo usb_pause_mtx(&sc->sc_mtx, 100); 2754251538Srpaulo 2755251538Srpaulo /* Restore configuration. */ 2756251538Srpaulo if ((txmode & 0x70) != 0) { 2757251538Srpaulo /* Restore Tx mode. */ 2758251538Srpaulo urtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode); 2759251538Srpaulo /* Restore RF mode. */ 2760251538Srpaulo for (i = 0; i < sc->nrxchains; i++) 2761251538Srpaulo urtwn_rf_write(sc, i, R92C_RF_AC, rf_ac[i]); 2762251538Srpaulo } else { 2763251538Srpaulo /* Unblock all Tx queues. */ 2764251538Srpaulo urtwn_write_1(sc, R92C_TXPAUSE, 0x00); 2765251538Srpaulo } 2766251538Srpaulo} 2767251538Srpaulo 2768251538Srpaulostatic void 2769251538Srpaulourtwn_init_locked(void *arg) 2770251538Srpaulo{ 2771251538Srpaulo struct urtwn_softc *sc = arg; 2772251538Srpaulo struct ifnet *ifp = sc->sc_ifp; 2773251538Srpaulo uint32_t reg; 2774251538Srpaulo int error; 2775251538Srpaulo 2776251538Srpaulo if (ifp->if_drv_flags & IFF_DRV_RUNNING) 2777251538Srpaulo urtwn_stop_locked(ifp, 0); 2778251538Srpaulo 2779251538Srpaulo /* Init firmware commands ring. */ 2780251538Srpaulo sc->fwcur = 0; 2781251538Srpaulo 2782251538Srpaulo /* Allocate Tx/Rx buffers. */ 2783251538Srpaulo error = urtwn_alloc_rx_list(sc); 2784251538Srpaulo if (error != 0) 2785251538Srpaulo goto fail; 2786251538Srpaulo 2787251538Srpaulo error = urtwn_alloc_tx_list(sc); 2788251538Srpaulo if (error != 0) 2789251538Srpaulo goto fail; 2790251538Srpaulo 2791251538Srpaulo /* Power on adapter. */ 2792251538Srpaulo error = urtwn_power_on(sc); 2793251538Srpaulo if (error != 0) 2794251538Srpaulo goto fail; 2795251538Srpaulo 2796251538Srpaulo /* Initialize DMA. */ 2797251538Srpaulo error = urtwn_dma_init(sc); 2798251538Srpaulo if (error != 0) 2799251538Srpaulo goto fail; 2800251538Srpaulo 2801251538Srpaulo /* Set info size in Rx descriptors (in 64-bit words). */ 2802251538Srpaulo urtwn_write_1(sc, R92C_RX_DRVINFO_SZ, 4); 2803251538Srpaulo 2804251538Srpaulo /* Init interrupts. */ 2805251538Srpaulo urtwn_write_4(sc, R92C_HISR, 0xffffffff); 2806251538Srpaulo urtwn_write_4(sc, R92C_HIMR, 0xffffffff); 2807251538Srpaulo 2808251538Srpaulo /* Set MAC address. */ 2809251538Srpaulo urtwn_write_region_1(sc, R92C_MACID, IF_LLADDR(ifp), 2810251538Srpaulo IEEE80211_ADDR_LEN); 2811251538Srpaulo 2812251538Srpaulo /* Set initial network type. */ 2813251538Srpaulo reg = urtwn_read_4(sc, R92C_CR); 2814251538Srpaulo reg = RW(reg, R92C_CR_NETTYPE, R92C_CR_NETTYPE_INFRA); 2815251538Srpaulo urtwn_write_4(sc, R92C_CR, reg); 2816251538Srpaulo 2817251538Srpaulo urtwn_rxfilter_init(sc); 2818251538Srpaulo 2819251538Srpaulo reg = urtwn_read_4(sc, R92C_RRSR); 2820251538Srpaulo reg = RW(reg, R92C_RRSR_RATE_BITMAP, R92C_RRSR_RATE_CCK_ONLY_1M); 2821251538Srpaulo urtwn_write_4(sc, R92C_RRSR, reg); 2822251538Srpaulo 2823251538Srpaulo /* Set short/long retry limits. */ 2824251538Srpaulo urtwn_write_2(sc, R92C_RL, 2825251538Srpaulo SM(R92C_RL_SRL, 0x30) | SM(R92C_RL_LRL, 0x30)); 2826251538Srpaulo 2827251538Srpaulo /* Initialize EDCA parameters. */ 2828251538Srpaulo urtwn_edca_init(sc); 2829251538Srpaulo 2830251538Srpaulo /* Setup rate fallback. */ 2831251538Srpaulo urtwn_write_4(sc, R92C_DARFRC + 0, 0x00000000); 2832251538Srpaulo urtwn_write_4(sc, R92C_DARFRC + 4, 0x10080404); 2833251538Srpaulo urtwn_write_4(sc, R92C_RARFRC + 0, 0x04030201); 2834251538Srpaulo urtwn_write_4(sc, R92C_RARFRC + 4, 0x08070605); 2835251538Srpaulo 2836251538Srpaulo urtwn_write_1(sc, R92C_FWHW_TXQ_CTRL, 2837251538Srpaulo urtwn_read_1(sc, R92C_FWHW_TXQ_CTRL) | 2838251538Srpaulo R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW); 2839251538Srpaulo /* Set ACK timeout. */ 2840251538Srpaulo urtwn_write_1(sc, R92C_ACKTO, 0x40); 2841251538Srpaulo 2842251538Srpaulo /* Setup USB aggregation. */ 2843251538Srpaulo reg = urtwn_read_4(sc, R92C_TDECTRL); 2844251538Srpaulo reg = RW(reg, R92C_TDECTRL_BLK_DESC_NUM, 6); 2845251538Srpaulo urtwn_write_4(sc, R92C_TDECTRL, reg); 2846251538Srpaulo urtwn_write_1(sc, R92C_TRXDMA_CTRL, 2847251538Srpaulo urtwn_read_1(sc, R92C_TRXDMA_CTRL) | 2848251538Srpaulo R92C_TRXDMA_CTRL_RXDMA_AGG_EN); 2849251538Srpaulo urtwn_write_1(sc, R92C_USB_SPECIAL_OPTION, 2850251538Srpaulo urtwn_read_1(sc, R92C_USB_SPECIAL_OPTION) | 2851251538Srpaulo R92C_USB_SPECIAL_OPTION_AGG_EN); 2852251538Srpaulo urtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48); 2853251538Srpaulo urtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4); 2854251538Srpaulo urtwn_write_1(sc, R92C_USB_AGG_TH, 8); 2855251538Srpaulo urtwn_write_1(sc, R92C_USB_AGG_TO, 6); 2856251538Srpaulo 2857251538Srpaulo /* Initialize beacon parameters. */ 2858251538Srpaulo urtwn_write_2(sc, R92C_TBTT_PROHIBIT, 0x6404); 2859251538Srpaulo urtwn_write_1(sc, R92C_DRVERLYINT, 0x05); 2860251538Srpaulo urtwn_write_1(sc, R92C_BCNDMATIM, 0x02); 2861251538Srpaulo urtwn_write_2(sc, R92C_BCNTCFG, 0x660f); 2862251538Srpaulo 2863251538Srpaulo /* Setup AMPDU aggregation. */ 2864251538Srpaulo urtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */ 2865251538Srpaulo urtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16); 2866251538Srpaulo urtwn_write_2(sc, 0x4ca, 0x0708); 2867251538Srpaulo 2868251538Srpaulo urtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff); 2869251538Srpaulo urtwn_write_1(sc, R92C_BCN_CTRL, R92C_BCN_CTRL_DIS_TSF_UDT0); 2870251538Srpaulo 2871251538Srpaulo /* Load 8051 microcode. */ 2872251538Srpaulo error = urtwn_load_firmware(sc); 2873251538Srpaulo if (error != 0) 2874251538Srpaulo goto fail; 2875251538Srpaulo 2876251538Srpaulo /* Initialize MAC/BB/RF blocks. */ 2877251538Srpaulo urtwn_mac_init(sc); 2878251538Srpaulo urtwn_bb_init(sc); 2879251538Srpaulo urtwn_rf_init(sc); 2880251538Srpaulo 2881251538Srpaulo /* Turn CCK and OFDM blocks on. */ 2882251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 2883251538Srpaulo reg |= R92C_RFMOD_CCK_EN; 2884251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 2885251538Srpaulo reg = urtwn_bb_read(sc, R92C_FPGA0_RFMOD); 2886251538Srpaulo reg |= R92C_RFMOD_OFDM_EN; 2887251538Srpaulo urtwn_bb_write(sc, R92C_FPGA0_RFMOD, reg); 2888251538Srpaulo 2889251538Srpaulo /* Clear per-station keys table. */ 2890251538Srpaulo urtwn_cam_init(sc); 2891251538Srpaulo 2892251538Srpaulo /* Enable hardware sequence numbering. */ 2893251538Srpaulo urtwn_write_1(sc, R92C_HWSEQ_CTRL, 0xff); 2894251538Srpaulo 2895251538Srpaulo /* Perform LO and IQ calibrations. */ 2896251538Srpaulo urtwn_iq_calib(sc); 2897251538Srpaulo /* Perform LC calibration. */ 2898251538Srpaulo urtwn_lc_calib(sc); 2899251538Srpaulo 2900251538Srpaulo /* Fix USB interference issue. */ 2901251538Srpaulo urtwn_write_1(sc, 0xfe40, 0xe0); 2902251538Srpaulo urtwn_write_1(sc, 0xfe41, 0x8d); 2903251538Srpaulo urtwn_write_1(sc, 0xfe42, 0x80); 2904251538Srpaulo 2905251538Srpaulo urtwn_pa_bias_init(sc); 2906251538Srpaulo 2907251538Srpaulo /* Initialize GPIO setting. */ 2908251538Srpaulo urtwn_write_1(sc, R92C_GPIO_MUXCFG, 2909251538Srpaulo urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); 2910251538Srpaulo 2911251538Srpaulo /* Fix for lower temperature. */ 2912251538Srpaulo urtwn_write_1(sc, 0x15, 0xe9); 2913251538Srpaulo 2914251538Srpaulo usbd_transfer_start(sc->sc_xfer[URTWN_BULK_RX]); 2915251538Srpaulo 2916251538Srpaulo ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2917251538Srpaulo ifp->if_drv_flags |= IFF_DRV_RUNNING; 2918251538Srpaulo 2919251538Srpaulo callout_reset(&sc->sc_watchdog_ch, hz, urtwn_watchdog, sc); 2920251538Srpaulofail: 2921251538Srpaulo return; 2922251538Srpaulo} 2923251538Srpaulo 2924251538Srpaulostatic void 2925251538Srpaulourtwn_init(void *arg) 2926251538Srpaulo{ 2927251538Srpaulo struct urtwn_softc *sc = arg; 2928251538Srpaulo 2929251538Srpaulo URTWN_LOCK(sc); 2930251538Srpaulo urtwn_init_locked(arg); 2931251538Srpaulo URTWN_UNLOCK(sc); 2932251538Srpaulo} 2933251538Srpaulo 2934251538Srpaulostatic void 2935251538Srpaulourtwn_stop_locked(struct ifnet *ifp, int disable) 2936251538Srpaulo{ 2937251538Srpaulo struct urtwn_softc *sc = ifp->if_softc; 2938251538Srpaulo 2939251538Srpaulo (void)disable; 2940251538Srpaulo ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 2941251538Srpaulo 2942251538Srpaulo callout_stop(&sc->sc_watchdog_ch); 2943251538Srpaulo urtwn_abort_xfers(sc); 2944251538Srpaulo} 2945251538Srpaulo 2946251538Srpaulostatic void 2947251538Srpaulourtwn_stop(struct ifnet *ifp, int disable) 2948251538Srpaulo{ 2949251538Srpaulo struct urtwn_softc *sc = ifp->if_softc; 2950251538Srpaulo 2951251538Srpaulo URTWN_LOCK(sc); 2952251538Srpaulo urtwn_stop_locked(ifp, disable); 2953251538Srpaulo URTWN_UNLOCK(sc); 2954251538Srpaulo} 2955251538Srpaulo 2956251538Srpaulostatic void 2957251538Srpaulourtwn_abort_xfers(struct urtwn_softc *sc) 2958251538Srpaulo{ 2959251538Srpaulo int i; 2960251538Srpaulo 2961251538Srpaulo URTWN_ASSERT_LOCKED(sc); 2962251538Srpaulo 2963251538Srpaulo /* abort any pending transfers */ 2964251538Srpaulo for (i = 0; i < URTWN_N_TRANSFER; i++) 2965251538Srpaulo usbd_transfer_stop(sc->sc_xfer[i]); 2966251538Srpaulo} 2967251538Srpaulo 2968251538Srpaulostatic int 2969251538Srpaulourtwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2970251538Srpaulo const struct ieee80211_bpf_params *params) 2971251538Srpaulo{ 2972251538Srpaulo struct ieee80211com *ic = ni->ni_ic; 2973251538Srpaulo struct ifnet *ifp = ic->ic_ifp; 2974251538Srpaulo struct urtwn_softc *sc = ifp->if_softc; 2975251538Srpaulo struct urtwn_data *bf; 2976251538Srpaulo 2977251538Srpaulo /* prevent management frames from being sent if we're not ready */ 2978251538Srpaulo if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 2979251538Srpaulo m_freem(m); 2980251538Srpaulo ieee80211_free_node(ni); 2981251538Srpaulo return (ENETDOWN); 2982251538Srpaulo } 2983251538Srpaulo URTWN_LOCK(sc); 2984251538Srpaulo bf = urtwn_getbuf(sc); 2985251538Srpaulo if (bf == NULL) { 2986251538Srpaulo ieee80211_free_node(ni); 2987251538Srpaulo m_freem(m); 2988251538Srpaulo URTWN_UNLOCK(sc); 2989251538Srpaulo return (ENOBUFS); 2990251538Srpaulo } 2991251538Srpaulo 2992251538Srpaulo ifp->if_opackets++; 2993251538Srpaulo if (urtwn_tx_start(sc, ni, m, bf) != 0) { 2994251538Srpaulo ieee80211_free_node(ni); 2995251538Srpaulo ifp->if_oerrors++; 2996251538Srpaulo STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 2997251538Srpaulo URTWN_UNLOCK(sc); 2998251538Srpaulo return (EIO); 2999251538Srpaulo } 3000251538Srpaulo URTWN_UNLOCK(sc); 3001251538Srpaulo 3002251538Srpaulo sc->sc_txtimer = 5; 3003251538Srpaulo return (0); 3004251538Srpaulo} 3005251538Srpaulo 3006251538Srpaulostatic device_method_t urtwn_methods[] = { 3007251538Srpaulo /* Device interface */ 3008251538Srpaulo DEVMETHOD(device_probe, urtwn_match), 3009251538Srpaulo DEVMETHOD(device_attach, urtwn_attach), 3010251538Srpaulo DEVMETHOD(device_detach, urtwn_detach), 3011251538Srpaulo 3012251538Srpaulo { 0, 0 } 3013251538Srpaulo}; 3014251538Srpaulo 3015251538Srpaulostatic driver_t urtwn_driver = { 3016251538Srpaulo "urtwn", 3017251538Srpaulo urtwn_methods, 3018251538Srpaulo sizeof(struct urtwn_softc) 3019251538Srpaulo}; 3020251538Srpaulo 3021251538Srpaulostatic devclass_t urtwn_devclass; 3022251538Srpaulo 3023251538SrpauloDRIVER_MODULE(urtwn, uhub, urtwn_driver, urtwn_devclass, NULL, NULL); 3024251538SrpauloMODULE_DEPEND(urtwn, usb, 1, 1, 1); 3025251538SrpauloMODULE_DEPEND(urtwn, wlan, 1, 1, 1); 3026251538SrpauloMODULE_DEPEND(urtwn, firmware, 1, 1, 1); 3027251538SrpauloMODULE_VERSION(urtwn, 1); 3028