if_txp.c revision 189688
1/* $OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $ */ 2 3/*- 4 * Copyright (c) 2001 5 * Jason L. Wright <jason@thought.net>, Theo de Raadt, and 6 * Aaron Campbell <aaron@monkey.org>. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Jason L. Wright, 19 * Theo de Raadt and Aaron Campbell. 20 * 4. Neither the name of the author nor the names of any co-contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37#include <sys/cdefs.h> 38__FBSDID("$FreeBSD: head/sys/dev/txp/if_txp.c 189688 2009-03-11 08:49:17Z yongari $"); 39 40/* 41 * Driver for 3c990 (Typhoon) Ethernet ASIC 42 */ 43#include <sys/param.h> 44#include <sys/systm.h> 45#include <sys/sockio.h> 46#include <sys/mbuf.h> 47#include <sys/malloc.h> 48#include <sys/kernel.h> 49#include <sys/module.h> 50#include <sys/socket.h> 51 52#include <net/if.h> 53#include <net/if_arp.h> 54#include <net/ethernet.h> 55#include <net/if_dl.h> 56#include <net/if_types.h> 57#include <net/if_vlan_var.h> 58 59#include <netinet/in.h> 60#include <netinet/in_systm.h> 61#include <netinet/in_var.h> 62#include <netinet/ip.h> 63#include <netinet/if_ether.h> 64#include <machine/in_cksum.h> 65 66#include <net/if_media.h> 67 68#include <net/bpf.h> 69 70#include <vm/vm.h> /* for vtophys */ 71#include <vm/pmap.h> /* for vtophys */ 72#include <machine/bus.h> 73#include <machine/resource.h> 74#include <sys/bus.h> 75#include <sys/rman.h> 76 77#include <dev/mii/mii.h> 78#include <dev/mii/miivar.h> 79#include <dev/pci/pcireg.h> 80#include <dev/pci/pcivar.h> 81 82#define TXP_USEIOSPACE 83#define __STRICT_ALIGNMENT 84 85#include <dev/txp/if_txpreg.h> 86#include <dev/txp/3c990img.h> 87 88#ifndef lint 89static const char rcsid[] = 90 "$FreeBSD: head/sys/dev/txp/if_txp.c 189688 2009-03-11 08:49:17Z yongari $"; 91#endif 92 93/* 94 * Various supported device vendors/types and their names. 95 */ 96static struct txp_type txp_devs[] = { 97 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_95, 98 "3Com 3cR990-TX-95 Etherlink with 3XP Processor" }, 99 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_97, 100 "3Com 3cR990-TX-97 Etherlink with 3XP Processor" }, 101 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_TXM, 102 "3Com 3cR990B-TXM Etherlink with 3XP Processor" }, 103 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_95, 104 "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" }, 105 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_97, 106 "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" }, 107 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_SRV, 108 "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" }, 109 { 0, 0, NULL } 110}; 111 112static int txp_probe(device_t); 113static int txp_attach(device_t); 114static int txp_detach(device_t); 115static void txp_intr(void *); 116static void txp_tick(void *); 117static int txp_shutdown(device_t); 118static int txp_ioctl(struct ifnet *, u_long, caddr_t); 119static void txp_start(struct ifnet *); 120static void txp_start_locked(struct ifnet *); 121static void txp_stop(struct txp_softc *); 122static void txp_init(void *); 123static void txp_init_locked(struct txp_softc *); 124static void txp_watchdog(struct ifnet *); 125 126static void txp_release_resources(struct txp_softc *); 127static int txp_chip_init(struct txp_softc *); 128static int txp_reset_adapter(struct txp_softc *); 129static int txp_download_fw(struct txp_softc *); 130static int txp_download_fw_wait(struct txp_softc *); 131static int txp_download_fw_section(struct txp_softc *, 132 struct txp_fw_section_header *, int); 133static int txp_alloc_rings(struct txp_softc *); 134static int txp_rxring_fill(struct txp_softc *); 135static void txp_rxring_empty(struct txp_softc *); 136static void txp_set_filter(struct txp_softc *); 137 138static int txp_cmd_desc_numfree(struct txp_softc *); 139static int txp_command(struct txp_softc *, u_int16_t, u_int16_t, u_int32_t, 140 u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int); 141static int txp_command2(struct txp_softc *, u_int16_t, u_int16_t, 142 u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t, 143 struct txp_rsp_desc **, int); 144static int txp_response(struct txp_softc *, u_int32_t, u_int16_t, u_int16_t, 145 struct txp_rsp_desc **); 146static void txp_rsp_fixup(struct txp_softc *, struct txp_rsp_desc *, 147 struct txp_rsp_desc *); 148static void txp_capabilities(struct txp_softc *); 149 150static void txp_ifmedia_sts(struct ifnet *, struct ifmediareq *); 151static int txp_ifmedia_upd(struct ifnet *); 152#ifdef TXP_DEBUG 153static void txp_show_descriptor(void *); 154#endif 155static void txp_tx_reclaim(struct txp_softc *, struct txp_tx_ring *); 156static void txp_rxbuf_reclaim(struct txp_softc *); 157static void txp_rx_reclaim(struct txp_softc *, struct txp_rx_ring *); 158 159#ifdef TXP_USEIOSPACE 160#define TXP_RES SYS_RES_IOPORT 161#define TXP_RID TXP_PCI_LOIO 162#else 163#define TXP_RES SYS_RES_MEMORY 164#define TXP_RID TXP_PCI_LOMEM 165#endif 166 167static device_method_t txp_methods[] = { 168 /* Device interface */ 169 DEVMETHOD(device_probe, txp_probe), 170 DEVMETHOD(device_attach, txp_attach), 171 DEVMETHOD(device_detach, txp_detach), 172 DEVMETHOD(device_shutdown, txp_shutdown), 173 { 0, 0 } 174}; 175 176static driver_t txp_driver = { 177 "txp", 178 txp_methods, 179 sizeof(struct txp_softc) 180}; 181 182static devclass_t txp_devclass; 183 184DRIVER_MODULE(txp, pci, txp_driver, txp_devclass, 0, 0); 185MODULE_DEPEND(txp, pci, 1, 1, 1); 186MODULE_DEPEND(txp, ether, 1, 1, 1); 187 188static int 189txp_probe(device_t dev) 190{ 191 struct txp_type *t; 192 193 t = txp_devs; 194 195 while (t->txp_name != NULL) { 196 if ((pci_get_vendor(dev) == t->txp_vid) && 197 (pci_get_device(dev) == t->txp_did)) { 198 device_set_desc(dev, t->txp_name); 199 return (BUS_PROBE_DEFAULT); 200 } 201 t++; 202 } 203 204 return (ENXIO); 205} 206 207static int 208txp_attach(device_t dev) 209{ 210 struct txp_softc *sc; 211 struct ifnet *ifp; 212 u_int16_t p1; 213 u_int32_t p2; 214 int error = 0, rid; 215 u_char eaddr[6]; 216 217 sc = device_get_softc(dev); 218 sc->sc_dev = dev; 219 sc->sc_cold = 1; 220 221 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 222 MTX_DEF); 223 callout_init_mtx(&sc->sc_tick, &sc->sc_mtx, 0); 224 225 /* 226 * Map control/status registers. 227 */ 228 pci_enable_busmaster(dev); 229 230 rid = TXP_RID; 231 sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid, 232 RF_ACTIVE); 233 234 if (sc->sc_res == NULL) { 235 device_printf(dev, "couldn't map ports/memory\n"); 236 error = ENXIO; 237 goto fail; 238 } 239 240 sc->sc_bt = rman_get_bustag(sc->sc_res); 241 sc->sc_bh = rman_get_bushandle(sc->sc_res); 242 243 /* Allocate interrupt */ 244 rid = 0; 245 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 246 RF_SHAREABLE | RF_ACTIVE); 247 248 if (sc->sc_irq == NULL) { 249 device_printf(dev, "couldn't map interrupt\n"); 250 error = ENXIO; 251 goto fail; 252 } 253 254 if (txp_chip_init(sc)) { 255 error = ENXIO; 256 goto fail; 257 } 258 259 sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF, 260 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 261 if (sc->sc_fwbuf == NULL) { 262 device_printf(dev, "no memory for firmware\n"); 263 error = ENXIO; 264 goto fail; 265 } 266 error = txp_download_fw(sc); 267 contigfree(sc->sc_fwbuf, 32768, M_DEVBUF); 268 sc->sc_fwbuf = NULL; 269 270 if (error) 271 goto fail; 272 273 sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF, 274 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 275 if (sc->sc_ldata == NULL) { 276 device_printf(dev, "no memory for descriptor ring\n"); 277 error = ENXIO; 278 goto fail; 279 } 280 bzero(sc->sc_ldata, sizeof(struct txp_ldata)); 281 282 if (txp_alloc_rings(sc)) { 283 error = ENXIO; 284 goto fail; 285 } 286 287 if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 288 NULL, NULL, NULL, 1)) { 289 error = ENXIO; 290 goto fail; 291 } 292 293 if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0, 294 &p1, &p2, NULL, 1)) { 295 error = ENXIO; 296 goto fail; 297 } 298 299 eaddr[0] = ((u_int8_t *)&p1)[1]; 300 eaddr[1] = ((u_int8_t *)&p1)[0]; 301 eaddr[2] = ((u_int8_t *)&p2)[3]; 302 eaddr[3] = ((u_int8_t *)&p2)[2]; 303 eaddr[4] = ((u_int8_t *)&p2)[1]; 304 eaddr[5] = ((u_int8_t *)&p2)[0]; 305 306 sc->sc_cold = 0; 307 308 ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts); 309 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 310 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 311 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 312 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); 313 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL); 314 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); 315 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); 316 317 sc->sc_xcvr = TXP_XCVR_AUTO; 318 txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0, 319 NULL, NULL, NULL, 0); 320 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO); 321 322 ifp = sc->sc_ifp = if_alloc(IFT_ETHER); 323 if (ifp == NULL) { 324 device_printf(dev, "can not if_alloc()\n"); 325 error = ENOSPC; 326 goto fail; 327 } 328 ifp->if_softc = sc; 329 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 330 ifp->if_mtu = ETHERMTU; 331 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 332 ifp->if_ioctl = txp_ioctl; 333 ifp->if_start = txp_start; 334 ifp->if_watchdog = txp_watchdog; 335 ifp->if_init = txp_init; 336 ifp->if_baudrate = 100000000; 337 ifp->if_snd.ifq_maxlen = TX_ENTRIES; 338 ifp->if_hwassist = 0; 339 txp_capabilities(sc); 340 341 /* 342 * Attach us everywhere 343 */ 344 ether_ifattach(ifp, eaddr); 345 346 error = bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE, 347 NULL, txp_intr, sc, &sc->sc_intrhand); 348 349 if (error) { 350 ether_ifdetach(ifp); 351 device_printf(dev, "couldn't set up irq\n"); 352 goto fail; 353 } 354 355 return (0); 356 357fail: 358 txp_release_resources(sc); 359 mtx_destroy(&sc->sc_mtx); 360 return (error); 361} 362 363static int 364txp_detach(device_t dev) 365{ 366 struct txp_softc *sc; 367 struct ifnet *ifp; 368 int i; 369 370 sc = device_get_softc(dev); 371 ifp = sc->sc_ifp; 372 373 TXP_LOCK(sc); 374 txp_stop(sc); 375 TXP_UNLOCK(sc); 376 txp_shutdown(dev); 377 callout_drain(&sc->sc_tick); 378 379 ifmedia_removeall(&sc->sc_ifmedia); 380 ether_ifdetach(ifp); 381 382 for (i = 0; i < RXBUF_ENTRIES; i++) 383 free(sc->sc_rxbufs[i].rb_sd, M_DEVBUF); 384 385 txp_release_resources(sc); 386 387 mtx_destroy(&sc->sc_mtx); 388 return (0); 389} 390 391static void 392txp_release_resources(struct txp_softc *sc) 393{ 394 device_t dev; 395 396 dev = sc->sc_dev; 397 398 if (sc->sc_intrhand != NULL) 399 bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand); 400 401 if (sc->sc_irq != NULL) 402 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq); 403 404 if (sc->sc_res != NULL) 405 bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res); 406 407 if (sc->sc_ldata != NULL) 408 contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF); 409 410 if (sc->sc_ifp) 411 if_free(sc->sc_ifp); 412} 413 414static int 415txp_chip_init(struct txp_softc *sc) 416{ 417 /* disable interrupts */ 418 WRITE_REG(sc, TXP_IER, 0); 419 WRITE_REG(sc, TXP_IMR, 420 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 421 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 422 TXP_INT_LATCH); 423 424 /* ack all interrupts */ 425 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 426 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 427 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 428 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 429 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 430 431 if (txp_reset_adapter(sc)) 432 return (-1); 433 434 /* disable interrupts */ 435 WRITE_REG(sc, TXP_IER, 0); 436 WRITE_REG(sc, TXP_IMR, 437 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 438 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 439 TXP_INT_LATCH); 440 441 /* ack all interrupts */ 442 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 443 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 444 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 445 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 446 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 447 448 return (0); 449} 450 451static int 452txp_reset_adapter(struct txp_softc *sc) 453{ 454 u_int32_t r; 455 int i; 456 457 r = 0; 458 WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL); 459 DELAY(1000); 460 WRITE_REG(sc, TXP_SRR, 0); 461 462 /* Should wait max 6 seconds */ 463 for (i = 0; i < 6000; i++) { 464 r = READ_REG(sc, TXP_A2H_0); 465 if (r == STAT_WAITING_FOR_HOST_REQUEST) 466 break; 467 DELAY(1000); 468 } 469 470 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 471 device_printf(sc->sc_dev, "reset hung\n"); 472 return (-1); 473 } 474 475 return (0); 476} 477 478static int 479txp_download_fw(struct txp_softc *sc) 480{ 481 struct txp_fw_file_header *fileheader; 482 struct txp_fw_section_header *secthead; 483 int error, sect; 484 u_int32_t r, i, ier, imr; 485 486 r = 0; 487 error = 0; 488 ier = READ_REG(sc, TXP_IER); 489 WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0); 490 491 imr = READ_REG(sc, TXP_IMR); 492 WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0); 493 494 for (i = 0; i < 10000; i++) { 495 r = READ_REG(sc, TXP_A2H_0); 496 if (r == STAT_WAITING_FOR_HOST_REQUEST) 497 break; 498 DELAY(50); 499 } 500 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 501 device_printf(sc->sc_dev, "not waiting for host request\n"); 502 error = -1; 503 goto fail; 504 } 505 506 /* Ack the status */ 507 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 508 509 fileheader = (struct txp_fw_file_header *)tc990image; 510 if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) { 511 device_printf(sc->sc_dev, "fw invalid magic\n"); 512 error = -1; 513 goto fail; 514 } 515 516 /* Tell boot firmware to get ready for image */ 517 WRITE_REG(sc, TXP_H2A_1, fileheader->addr); 518 WRITE_REG(sc, TXP_H2A_2, fileheader->hmac[0]); 519 WRITE_REG(sc, TXP_H2A_3, fileheader->hmac[1]); 520 WRITE_REG(sc, TXP_H2A_4, fileheader->hmac[2]); 521 WRITE_REG(sc, TXP_H2A_5, fileheader->hmac[3]); 522 WRITE_REG(sc, TXP_H2A_6, fileheader->hmac[4]); 523 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE); 524 525 if (txp_download_fw_wait(sc)) { 526 device_printf(sc->sc_dev, "fw wait failed, initial\n"); 527 error = -1; 528 goto fail; 529 } 530 531 secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) + 532 sizeof(struct txp_fw_file_header)); 533 534 for (sect = 0; sect < fileheader->nsections; sect++) { 535 536 if (txp_download_fw_section(sc, secthead, sect)) { 537 error = -1; 538 goto fail; 539 } 540 secthead = (struct txp_fw_section_header *) 541 (((u_int8_t *)secthead) + secthead->nbytes + 542 sizeof(*secthead)); 543 } 544 545 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE); 546 547 for (i = 0; i < 10000; i++) { 548 r = READ_REG(sc, TXP_A2H_0); 549 if (r == STAT_WAITING_FOR_BOOT) 550 break; 551 DELAY(50); 552 } 553 if (r != STAT_WAITING_FOR_BOOT) { 554 device_printf(sc->sc_dev, "not waiting for boot\n"); 555 error = -1; 556 goto fail; 557 } 558 559fail: 560 WRITE_REG(sc, TXP_IER, ier); 561 WRITE_REG(sc, TXP_IMR, imr); 562 563 return (error); 564} 565 566static int 567txp_download_fw_wait(struct txp_softc *sc) 568{ 569 u_int32_t i, r; 570 571 r = 0; 572 for (i = 0; i < 10000; i++) { 573 r = READ_REG(sc, TXP_ISR); 574 if (r & TXP_INT_A2H_0) 575 break; 576 DELAY(50); 577 } 578 579 if (!(r & TXP_INT_A2H_0)) { 580 device_printf(sc->sc_dev, "fw wait failed comm0\n"); 581 return (-1); 582 } 583 584 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 585 586 r = READ_REG(sc, TXP_A2H_0); 587 if (r != STAT_WAITING_FOR_SEGMENT) { 588 device_printf(sc->sc_dev, "fw not waiting for segment\n"); 589 return (-1); 590 } 591 return (0); 592} 593 594static int 595txp_download_fw_section(struct txp_softc *sc, 596 struct txp_fw_section_header *sect, int sectnum) 597{ 598 vm_offset_t dma; 599 int rseg, err = 0; 600 struct mbuf m; 601 u_int16_t csum; 602 603 /* Skip zero length sections */ 604 if (sect->nbytes == 0) 605 return (0); 606 607 /* Make sure we aren't past the end of the image */ 608 rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image); 609 if (rseg >= sizeof(tc990image)) { 610 device_printf(sc->sc_dev, "fw invalid section address, " 611 "section %d\n", sectnum); 612 return (-1); 613 } 614 615 /* Make sure this section doesn't go past the end */ 616 rseg += sect->nbytes; 617 if (rseg >= sizeof(tc990image)) { 618 device_printf(sc->sc_dev, "fw truncated section %d\n", 619 sectnum); 620 return (-1); 621 } 622 623 bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes); 624 dma = vtophys(sc->sc_fwbuf); 625 626 /* 627 * dummy up mbuf and verify section checksum 628 */ 629 m.m_type = MT_DATA; 630 m.m_next = m.m_nextpkt = NULL; 631 m.m_len = sect->nbytes; 632 m.m_data = sc->sc_fwbuf; 633 m.m_flags = 0; 634 csum = in_cksum(&m, sect->nbytes); 635 if (csum != sect->cksum) { 636 device_printf(sc->sc_dev, "fw section %d, bad " 637 "cksum (expected 0x%x got 0x%x)\n", 638 sectnum, sect->cksum, csum); 639 err = -1; 640 goto bail; 641 } 642 643 WRITE_REG(sc, TXP_H2A_1, sect->nbytes); 644 WRITE_REG(sc, TXP_H2A_2, sect->cksum); 645 WRITE_REG(sc, TXP_H2A_3, sect->addr); 646 WRITE_REG(sc, TXP_H2A_4, 0); 647 WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff); 648 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE); 649 650 if (txp_download_fw_wait(sc)) { 651 device_printf(sc->sc_dev, "fw wait failed, " 652 "section %d\n", sectnum); 653 err = -1; 654 } 655 656bail: 657 return (err); 658} 659 660static void 661txp_intr(void *vsc) 662{ 663 struct txp_softc *sc = vsc; 664 struct txp_hostvar *hv = sc->sc_hostvar; 665 u_int32_t isr; 666 667 /* mask all interrupts */ 668 TXP_LOCK(sc); 669 WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF | 670 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 671 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 672 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 673 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 674 675 isr = READ_REG(sc, TXP_ISR); 676 while (isr) { 677 WRITE_REG(sc, TXP_ISR, isr); 678 679 if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff)) 680 txp_rx_reclaim(sc, &sc->sc_rxhir); 681 if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff)) 682 txp_rx_reclaim(sc, &sc->sc_rxlor); 683 684 if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx) 685 txp_rxbuf_reclaim(sc); 686 687 if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons != 688 TXP_OFFSET2IDX(*(sc->sc_txhir.r_off)))) 689 txp_tx_reclaim(sc, &sc->sc_txhir); 690 691 if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons != 692 TXP_OFFSET2IDX(*(sc->sc_txlor.r_off)))) 693 txp_tx_reclaim(sc, &sc->sc_txlor); 694 695 isr = READ_REG(sc, TXP_ISR); 696 } 697 698 /* unmask all interrupts */ 699 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 700 701 txp_start_locked(sc->sc_ifp); 702 TXP_UNLOCK(sc); 703} 704 705static void 706txp_rx_reclaim(struct txp_softc *sc, struct txp_rx_ring *r) 707{ 708 struct ifnet *ifp = sc->sc_ifp; 709 struct txp_rx_desc *rxd; 710 struct mbuf *m; 711 struct txp_swdesc *sd = NULL; 712 u_int32_t roff, woff; 713 714 TXP_LOCK_ASSERT(sc); 715 roff = *r->r_roff; 716 woff = *r->r_woff; 717 rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc)); 718 719 while (roff != woff) { 720 721 if (rxd->rx_flags & RX_FLAGS_ERROR) { 722 device_printf(sc->sc_dev, "error 0x%x\n", 723 rxd->rx_stat); 724 ifp->if_ierrors++; 725 goto next; 726 } 727 728 /* retrieve stashed pointer */ 729 sd = rxd->rx_sd; 730 731 m = sd->sd_mbuf; 732 sd->sd_mbuf = NULL; 733 734 m->m_pkthdr.len = m->m_len = rxd->rx_len; 735 736#ifdef __STRICT_ALIGNMENT 737 { 738 /* 739 * XXX Nice chip, except it won't accept "off by 2" 740 * buffers, so we're force to copy. Supposedly 741 * this will be fixed in a newer firmware rev 742 * and this will be temporary. 743 */ 744 struct mbuf *mnew; 745 746 mnew = m_devget(mtod(m, caddr_t), rxd->rx_len, 747 ETHER_ALIGN, ifp, NULL); 748 m_freem(m); 749 if (mnew == NULL) { 750 ifp->if_ierrors++; 751 goto next; 752 } 753 m = mnew; 754 } 755#endif 756 757 if (rxd->rx_stat & RX_STAT_IPCKSUMBAD) 758 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; 759 else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD) 760 m->m_pkthdr.csum_flags |= 761 CSUM_IP_CHECKED|CSUM_IP_VALID; 762 763 if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) || 764 (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) { 765 m->m_pkthdr.csum_flags |= 766 CSUM_DATA_VALID|CSUM_PSEUDO_HDR; 767 m->m_pkthdr.csum_data = 0xffff; 768 } 769 770 if (rxd->rx_stat & RX_STAT_VLAN) { 771 m->m_pkthdr.ether_vtag = htons(rxd->rx_vlan >> 16); 772 m->m_flags |= M_VLANTAG; 773 } 774 775 TXP_UNLOCK(sc); 776 (*ifp->if_input)(ifp, m); 777 TXP_LOCK(sc); 778 779next: 780 781 roff += sizeof(struct txp_rx_desc); 782 if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) { 783 roff = 0; 784 rxd = r->r_desc; 785 } else 786 rxd++; 787 woff = *r->r_woff; 788 } 789 790 *r->r_roff = woff; 791} 792 793static void 794txp_rxbuf_reclaim(struct txp_softc *sc) 795{ 796 struct ifnet *ifp = sc->sc_ifp; 797 struct txp_hostvar *hv = sc->sc_hostvar; 798 struct txp_rxbuf_desc *rbd; 799 struct txp_swdesc *sd; 800 u_int32_t i; 801 802 TXP_LOCK_ASSERT(sc); 803 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 804 return; 805 806 i = sc->sc_rxbufprod; 807 rbd = sc->sc_rxbufs + i; 808 809 while (1) { 810 sd = rbd->rb_sd; 811 if (sd->sd_mbuf != NULL) 812 break; 813 814 sd->sd_mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 815 if (sd->sd_mbuf == NULL) 816 return; 817 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 818 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 819 820 rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t)) 821 & 0xffffffff; 822 rbd->rb_paddrhi = 0; 823 824 hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i); 825 826 if (++i == RXBUF_ENTRIES) { 827 i = 0; 828 rbd = sc->sc_rxbufs; 829 } else 830 rbd++; 831 } 832 833 sc->sc_rxbufprod = i; 834} 835 836/* 837 * Reclaim mbufs and entries from a transmit ring. 838 */ 839static void 840txp_tx_reclaim(struct txp_softc *sc, struct txp_tx_ring *r) 841{ 842 struct ifnet *ifp = sc->sc_ifp; 843 u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off)); 844 u_int32_t cons = r->r_cons, cnt = r->r_cnt; 845 struct txp_tx_desc *txd = r->r_desc + cons; 846 struct txp_swdesc *sd = sc->sc_txd + cons; 847 struct mbuf *m; 848 849 TXP_LOCK_ASSERT(sc); 850 while (cons != idx) { 851 if (cnt == 0) 852 break; 853 854 if ((txd->tx_flags & TX_FLAGS_TYPE_M) == 855 TX_FLAGS_TYPE_DATA) { 856 m = sd->sd_mbuf; 857 if (m != NULL) { 858 m_freem(m); 859 txd->tx_addrlo = 0; 860 txd->tx_addrhi = 0; 861 ifp->if_opackets++; 862 } 863 } 864 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 865 866 if (++cons == TX_ENTRIES) { 867 txd = r->r_desc; 868 cons = 0; 869 sd = sc->sc_txd; 870 } else { 871 txd++; 872 sd++; 873 } 874 875 cnt--; 876 } 877 878 r->r_cons = cons; 879 r->r_cnt = cnt; 880 if (cnt == 0) 881 ifp->if_timer = 0; 882} 883 884static int 885txp_shutdown(device_t dev) 886{ 887 struct txp_softc *sc; 888 889 sc = device_get_softc(dev); 890 891 TXP_LOCK(sc); 892 893 /* mask all interrupts */ 894 WRITE_REG(sc, TXP_IMR, 895 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 896 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 897 TXP_INT_LATCH); 898 899 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 900 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 901 txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0); 902 TXP_UNLOCK(sc); 903 904 return (0); 905} 906 907static int 908txp_alloc_rings(struct txp_softc *sc) 909{ 910 struct txp_boot_record *boot; 911 struct txp_ldata *ld; 912 u_int32_t r; 913 int i; 914 915 r = 0; 916 ld = sc->sc_ldata; 917 boot = &ld->txp_boot; 918 919 /* boot record */ 920 sc->sc_boot = boot; 921 922 /* host variables */ 923 bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar)); 924 boot->br_hostvar_lo = vtophys(&ld->txp_hostvar); 925 boot->br_hostvar_hi = 0; 926 sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar; 927 928 /* hi priority tx ring */ 929 boot->br_txhipri_lo = vtophys(&ld->txp_txhiring);; 930 boot->br_txhipri_hi = 0; 931 boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 932 sc->sc_txhir.r_reg = TXP_H2A_1; 933 sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring; 934 sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0; 935 sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx; 936 937 /* lo priority tx ring */ 938 boot->br_txlopri_lo = vtophys(&ld->txp_txloring); 939 boot->br_txlopri_hi = 0; 940 boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 941 sc->sc_txlor.r_reg = TXP_H2A_3; 942 sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring; 943 sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0; 944 sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx; 945 946 /* high priority rx ring */ 947 boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring); 948 boot->br_rxhipri_hi = 0; 949 boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 950 sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring; 951 sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx; 952 sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx; 953 954 /* low priority rx ring */ 955 boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring); 956 boot->br_rxlopri_hi = 0; 957 boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 958 sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring; 959 sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx; 960 sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx; 961 962 /* command ring */ 963 bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES); 964 boot->br_cmd_lo = vtophys(&ld->txp_cmdring); 965 boot->br_cmd_hi = 0; 966 boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 967 sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring; 968 sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 969 sc->sc_cmdring.lastwrite = 0; 970 971 /* response ring */ 972 bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES); 973 boot->br_resp_lo = vtophys(&ld->txp_rspring); 974 boot->br_resp_hi = 0; 975 boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc); 976 sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring; 977 sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc); 978 sc->sc_rspring.lastwrite = 0; 979 980 /* receive buffer ring */ 981 boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs); 982 boot->br_rxbuf_hi = 0; 983 boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc); 984 sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs; 985 986 for (i = 0; i < RXBUF_ENTRIES; i++) { 987 struct txp_swdesc *sd; 988 if (sc->sc_rxbufs[i].rb_sd != NULL) 989 continue; 990 sc->sc_rxbufs[i].rb_sd = malloc(sizeof(struct txp_swdesc), 991 M_DEVBUF, M_NOWAIT); 992 if (sc->sc_rxbufs[i].rb_sd == NULL) 993 return (ENOBUFS); 994 sd = sc->sc_rxbufs[i].rb_sd; 995 sd->sd_mbuf = NULL; 996 } 997 sc->sc_rxbufprod = 0; 998 999 /* zero dma */ 1000 bzero(&ld->txp_zero, sizeof(u_int32_t)); 1001 boot->br_zero_lo = vtophys(&ld->txp_zero); 1002 boot->br_zero_hi = 0; 1003 1004 /* See if it's waiting for boot, and try to boot it */ 1005 for (i = 0; i < 10000; i++) { 1006 r = READ_REG(sc, TXP_A2H_0); 1007 if (r == STAT_WAITING_FOR_BOOT) 1008 break; 1009 DELAY(50); 1010 } 1011 1012 if (r != STAT_WAITING_FOR_BOOT) { 1013 device_printf(sc->sc_dev, "not waiting for boot\n"); 1014 return (ENXIO); 1015 } 1016 1017 WRITE_REG(sc, TXP_H2A_2, 0); 1018 WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot)); 1019 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD); 1020 1021 /* See if it booted */ 1022 for (i = 0; i < 10000; i++) { 1023 r = READ_REG(sc, TXP_A2H_0); 1024 if (r == STAT_RUNNING) 1025 break; 1026 DELAY(50); 1027 } 1028 if (r != STAT_RUNNING) { 1029 device_printf(sc->sc_dev, "fw not running\n"); 1030 return (ENXIO); 1031 } 1032 1033 /* Clear TX and CMD ring write registers */ 1034 WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL); 1035 WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL); 1036 WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL); 1037 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL); 1038 1039 return (0); 1040} 1041 1042static int 1043txp_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 1044{ 1045 struct txp_softc *sc = ifp->if_softc; 1046 struct ifreq *ifr = (struct ifreq *)data; 1047 int error = 0; 1048 1049 switch (command) { 1050 case SIOCSIFFLAGS: 1051 TXP_LOCK(sc); 1052 if (ifp->if_flags & IFF_UP) { 1053 txp_init_locked(sc); 1054 } else { 1055 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1056 txp_stop(sc); 1057 } 1058 TXP_UNLOCK(sc); 1059 break; 1060 case SIOCADDMULTI: 1061 case SIOCDELMULTI: 1062 /* 1063 * Multicast list has changed; set the hardware 1064 * filter accordingly. 1065 */ 1066 TXP_LOCK(sc); 1067 txp_set_filter(sc); 1068 TXP_UNLOCK(sc); 1069 error = 0; 1070 break; 1071 case SIOCGIFMEDIA: 1072 case SIOCSIFMEDIA: 1073 error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command); 1074 break; 1075 default: 1076 error = ether_ioctl(ifp, command, data); 1077 break; 1078 } 1079 1080 return (error); 1081} 1082 1083static int 1084txp_rxring_fill(struct txp_softc *sc) 1085{ 1086 int i; 1087 struct ifnet *ifp; 1088 struct txp_swdesc *sd; 1089 1090 TXP_LOCK_ASSERT(sc); 1091 ifp = sc->sc_ifp; 1092 1093 for (i = 0; i < RXBUF_ENTRIES; i++) { 1094 sd = sc->sc_rxbufs[i].rb_sd; 1095 sd->sd_mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1096 if (sd->sd_mbuf == NULL) 1097 return (ENOBUFS); 1098 1099 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 1100 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 1101 1102 sc->sc_rxbufs[i].rb_paddrlo = 1103 vtophys(mtod(sd->sd_mbuf, vm_offset_t)); 1104 sc->sc_rxbufs[i].rb_paddrhi = 0; 1105 } 1106 1107 sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) * 1108 sizeof(struct txp_rxbuf_desc); 1109 1110 return (0); 1111} 1112 1113static void 1114txp_rxring_empty(struct txp_softc *sc) 1115{ 1116 int i; 1117 struct txp_swdesc *sd; 1118 1119 TXP_LOCK_ASSERT(sc); 1120 if (sc->sc_rxbufs == NULL) 1121 return; 1122 1123 for (i = 0; i < RXBUF_ENTRIES; i++) { 1124 if (&sc->sc_rxbufs[i] == NULL) 1125 continue; 1126 sd = sc->sc_rxbufs[i].rb_sd; 1127 if (sd == NULL) 1128 continue; 1129 if (sd->sd_mbuf != NULL) { 1130 m_freem(sd->sd_mbuf); 1131 sd->sd_mbuf = NULL; 1132 } 1133 } 1134} 1135 1136static void 1137txp_init(void *xsc) 1138{ 1139 struct txp_softc *sc; 1140 1141 sc = xsc; 1142 TXP_LOCK(sc); 1143 txp_init_locked(sc); 1144 TXP_UNLOCK(sc); 1145} 1146 1147static void 1148txp_init_locked(struct txp_softc *sc) 1149{ 1150 struct ifnet *ifp; 1151 u_int16_t p1; 1152 u_int32_t p2; 1153 1154 TXP_LOCK_ASSERT(sc); 1155 ifp = sc->sc_ifp; 1156 1157 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1158 return; 1159 1160 txp_stop(sc); 1161 1162 txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 1163 NULL, NULL, NULL, 1); 1164 1165 /* Set station address. */ 1166 ((u_int8_t *)&p1)[1] = IF_LLADDR(sc->sc_ifp)[0]; 1167 ((u_int8_t *)&p1)[0] = IF_LLADDR(sc->sc_ifp)[1]; 1168 ((u_int8_t *)&p2)[3] = IF_LLADDR(sc->sc_ifp)[2]; 1169 ((u_int8_t *)&p2)[2] = IF_LLADDR(sc->sc_ifp)[3]; 1170 ((u_int8_t *)&p2)[1] = IF_LLADDR(sc->sc_ifp)[4]; 1171 ((u_int8_t *)&p2)[0] = IF_LLADDR(sc->sc_ifp)[5]; 1172 txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0, 1173 NULL, NULL, NULL, 1); 1174 1175 txp_set_filter(sc); 1176 1177 txp_rxring_fill(sc); 1178 1179 txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1180 txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1181 1182 WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF | 1183 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 1184 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 1185 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 1186 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 1187 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 1188 1189 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1190 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1191 ifp->if_timer = 0; 1192 1193 callout_reset(&sc->sc_tick, hz, txp_tick, sc); 1194} 1195 1196static void 1197txp_tick(void *vsc) 1198{ 1199 struct txp_softc *sc = vsc; 1200 struct ifnet *ifp = sc->sc_ifp; 1201 struct txp_rsp_desc *rsp = NULL; 1202 struct txp_ext_desc *ext; 1203 1204 TXP_LOCK_ASSERT(sc); 1205 txp_rxbuf_reclaim(sc); 1206 1207 if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0, 1208 &rsp, 1)) 1209 goto out; 1210 if (rsp->rsp_numdesc != 6) 1211 goto out; 1212 if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0, 1213 NULL, NULL, NULL, 1)) 1214 goto out; 1215 ext = (struct txp_ext_desc *)(rsp + 1); 1216 1217 ifp->if_ierrors += ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 + 1218 ext[4].ext_1 + ext[4].ext_4; 1219 ifp->if_oerrors += ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 + 1220 ext[2].ext_1; 1221 ifp->if_collisions += ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 + 1222 ext[1].ext_3; 1223 ifp->if_opackets += rsp->rsp_par2; 1224 ifp->if_ipackets += ext[2].ext_3; 1225 1226out: 1227 if (rsp != NULL) 1228 free(rsp, M_DEVBUF); 1229 1230 callout_reset(&sc->sc_tick, hz, txp_tick, sc); 1231} 1232 1233static void 1234txp_start(struct ifnet *ifp) 1235{ 1236 struct txp_softc *sc; 1237 1238 sc = ifp->if_softc; 1239 TXP_LOCK(sc); 1240 txp_start_locked(ifp); 1241 TXP_UNLOCK(sc); 1242} 1243 1244static void 1245txp_start_locked(struct ifnet *ifp) 1246{ 1247 struct txp_softc *sc = ifp->if_softc; 1248 struct txp_tx_ring *r = &sc->sc_txhir; 1249 struct txp_tx_desc *txd; 1250 struct txp_frag_desc *fxd; 1251 struct mbuf *m, *m0; 1252 struct txp_swdesc *sd; 1253 u_int32_t firstprod, firstcnt, prod, cnt; 1254 1255 TXP_LOCK_ASSERT(sc); 1256 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1257 IFF_DRV_RUNNING) 1258 return; 1259 1260 prod = r->r_prod; 1261 cnt = r->r_cnt; 1262 1263 while (1) { 1264 IF_DEQUEUE(&ifp->if_snd, m); 1265 if (m == NULL) 1266 break; 1267 1268 firstprod = prod; 1269 firstcnt = cnt; 1270 1271 sd = sc->sc_txd + prod; 1272 sd->sd_mbuf = m; 1273 1274 if ((TX_ENTRIES - cnt) < 4) 1275 goto oactive; 1276 1277 txd = r->r_desc + prod; 1278 1279 txd->tx_flags = TX_FLAGS_TYPE_DATA; 1280 txd->tx_numdesc = 0; 1281 txd->tx_addrlo = 0; 1282 txd->tx_addrhi = 0; 1283 txd->tx_totlen = 0; 1284 txd->tx_pflags = 0; 1285 1286 if (++prod == TX_ENTRIES) 1287 prod = 0; 1288 1289 if (++cnt >= (TX_ENTRIES - 4)) 1290 goto oactive; 1291 1292 if (m->m_flags & M_VLANTAG) { 1293 txd->tx_pflags = TX_PFLAGS_VLAN | 1294 (htons(m->m_pkthdr.ether_vtag) << TX_PFLAGS_VLANTAG_S); 1295 } 1296 1297 if (m->m_pkthdr.csum_flags & CSUM_IP) 1298 txd->tx_pflags |= TX_PFLAGS_IPCKSUM; 1299 1300#if 0 1301 if (m->m_pkthdr.csum_flags & CSUM_TCP) 1302 txd->tx_pflags |= TX_PFLAGS_TCPCKSUM; 1303 if (m->m_pkthdr.csum_flags & CSUM_UDP) 1304 txd->tx_pflags |= TX_PFLAGS_UDPCKSUM; 1305#endif 1306 1307 fxd = (struct txp_frag_desc *)(r->r_desc + prod); 1308 for (m0 = m; m0 != NULL; m0 = m0->m_next) { 1309 if (m0->m_len == 0) 1310 continue; 1311 if (++cnt >= (TX_ENTRIES - 4)) 1312 goto oactive; 1313 1314 txd->tx_numdesc++; 1315 1316 fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG; 1317 fxd->frag_rsvd1 = 0; 1318 fxd->frag_len = m0->m_len; 1319 fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t)); 1320 fxd->frag_addrhi = 0; 1321 fxd->frag_rsvd2 = 0; 1322 1323 if (++prod == TX_ENTRIES) { 1324 fxd = (struct txp_frag_desc *)r->r_desc; 1325 prod = 0; 1326 } else 1327 fxd++; 1328 1329 } 1330 1331 ifp->if_timer = 5; 1332 1333 ETHER_BPF_MTAP(ifp, m); 1334 WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod)); 1335 } 1336 1337 r->r_prod = prod; 1338 r->r_cnt = cnt; 1339 return; 1340 1341oactive: 1342 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1343 r->r_prod = firstprod; 1344 r->r_cnt = firstcnt; 1345 IF_PREPEND(&ifp->if_snd, m); 1346} 1347 1348/* 1349 * Handle simple commands sent to the typhoon 1350 */ 1351static int 1352txp_command(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2, 1353 u_int32_t in3, u_int16_t *out1, u_int32_t *out2, u_int32_t *out3, int wait) 1354{ 1355 struct txp_rsp_desc *rsp = NULL; 1356 1357 if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait)) 1358 return (-1); 1359 1360 if (!wait) 1361 return (0); 1362 1363 if (out1 != NULL) 1364 *out1 = rsp->rsp_par1; 1365 if (out2 != NULL) 1366 *out2 = rsp->rsp_par2; 1367 if (out3 != NULL) 1368 *out3 = rsp->rsp_par3; 1369 free(rsp, M_DEVBUF); 1370 return (0); 1371} 1372 1373static int 1374txp_command2(struct txp_softc *sc, u_int16_t id, u_int16_t in1, u_int32_t in2, 1375 u_int32_t in3, struct txp_ext_desc *in_extp, u_int8_t in_extn, 1376 struct txp_rsp_desc **rspp, int wait) 1377{ 1378 struct txp_hostvar *hv = sc->sc_hostvar; 1379 struct txp_cmd_desc *cmd; 1380 struct txp_ext_desc *ext; 1381 u_int32_t idx, i; 1382 u_int16_t seq; 1383 1384 if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) { 1385 device_printf(sc->sc_dev, "no free cmd descriptors\n"); 1386 return (-1); 1387 } 1388 1389 idx = sc->sc_cmdring.lastwrite; 1390 cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1391 bzero(cmd, sizeof(*cmd)); 1392 1393 cmd->cmd_numdesc = in_extn; 1394 cmd->cmd_seq = seq = sc->sc_seq++; 1395 cmd->cmd_id = id; 1396 cmd->cmd_par1 = in1; 1397 cmd->cmd_par2 = in2; 1398 cmd->cmd_par3 = in3; 1399 cmd->cmd_flags = CMD_FLAGS_TYPE_CMD | 1400 (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID; 1401 1402 idx += sizeof(struct txp_cmd_desc); 1403 if (idx == sc->sc_cmdring.size) 1404 idx = 0; 1405 1406 for (i = 0; i < in_extn; i++) { 1407 ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1408 bcopy(in_extp, ext, sizeof(struct txp_ext_desc)); 1409 in_extp++; 1410 idx += sizeof(struct txp_cmd_desc); 1411 if (idx == sc->sc_cmdring.size) 1412 idx = 0; 1413 } 1414 1415 sc->sc_cmdring.lastwrite = idx; 1416 1417 WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite); 1418 1419 if (!wait) 1420 return (0); 1421 1422 for (i = 0; i < 10000; i++) { 1423 idx = hv->hv_resp_read_idx; 1424 if (idx != hv->hv_resp_write_idx) { 1425 *rspp = NULL; 1426 if (txp_response(sc, idx, id, seq, rspp)) 1427 return (-1); 1428 if (*rspp != NULL) 1429 break; 1430 } 1431 DELAY(50); 1432 } 1433 if (i == 1000 || (*rspp) == NULL) { 1434 device_printf(sc->sc_dev, "0x%x command failed\n", id); 1435 return (-1); 1436 } 1437 1438 return (0); 1439} 1440 1441static int 1442txp_response(struct txp_softc *sc, u_int32_t ridx, u_int16_t id, u_int16_t seq, 1443 struct txp_rsp_desc **rspp) 1444{ 1445 struct txp_hostvar *hv = sc->sc_hostvar; 1446 struct txp_rsp_desc *rsp; 1447 1448 while (ridx != hv->hv_resp_write_idx) { 1449 rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx); 1450 1451 if (id == rsp->rsp_id && rsp->rsp_seq == seq) { 1452 *rspp = (struct txp_rsp_desc *)malloc( 1453 sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1), 1454 M_DEVBUF, M_NOWAIT); 1455 if ((*rspp) == NULL) 1456 return (-1); 1457 txp_rsp_fixup(sc, rsp, *rspp); 1458 return (0); 1459 } 1460 1461 if (rsp->rsp_flags & RSP_FLAGS_ERROR) { 1462 device_printf(sc->sc_dev, "response error!\n"); 1463 txp_rsp_fixup(sc, rsp, NULL); 1464 ridx = hv->hv_resp_read_idx; 1465 continue; 1466 } 1467 1468 switch (rsp->rsp_id) { 1469 case TXP_CMD_CYCLE_STATISTICS: 1470 case TXP_CMD_MEDIA_STATUS_READ: 1471 break; 1472 case TXP_CMD_HELLO_RESPONSE: 1473 device_printf(sc->sc_dev, "hello\n"); 1474 break; 1475 default: 1476 device_printf(sc->sc_dev, "unknown id(0x%x)\n", 1477 rsp->rsp_id); 1478 } 1479 1480 txp_rsp_fixup(sc, rsp, NULL); 1481 ridx = hv->hv_resp_read_idx; 1482 hv->hv_resp_read_idx = ridx; 1483 } 1484 1485 return (0); 1486} 1487 1488static void 1489txp_rsp_fixup(struct txp_softc *sc, struct txp_rsp_desc *rsp, 1490 struct txp_rsp_desc *dst) 1491{ 1492 struct txp_rsp_desc *src = rsp; 1493 struct txp_hostvar *hv = sc->sc_hostvar; 1494 u_int32_t i, ridx; 1495 1496 ridx = hv->hv_resp_read_idx; 1497 1498 for (i = 0; i < rsp->rsp_numdesc + 1; i++) { 1499 if (dst != NULL) 1500 bcopy(src, dst++, sizeof(struct txp_rsp_desc)); 1501 ridx += sizeof(struct txp_rsp_desc); 1502 if (ridx == sc->sc_rspring.size) { 1503 src = sc->sc_rspring.base; 1504 ridx = 0; 1505 } else 1506 src++; 1507 sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx; 1508 } 1509 1510 hv->hv_resp_read_idx = ridx; 1511} 1512 1513static int 1514txp_cmd_desc_numfree(struct txp_softc *sc) 1515{ 1516 struct txp_hostvar *hv = sc->sc_hostvar; 1517 struct txp_boot_record *br = sc->sc_boot; 1518 u_int32_t widx, ridx, nfree; 1519 1520 widx = sc->sc_cmdring.lastwrite; 1521 ridx = hv->hv_cmd_read_idx; 1522 1523 if (widx == ridx) { 1524 /* Ring is completely free */ 1525 nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc); 1526 } else { 1527 if (widx > ridx) 1528 nfree = br->br_cmd_siz - 1529 (widx - ridx + sizeof(struct txp_cmd_desc)); 1530 else 1531 nfree = ridx - widx - sizeof(struct txp_cmd_desc); 1532 } 1533 1534 return (nfree / sizeof(struct txp_cmd_desc)); 1535} 1536 1537static void 1538txp_stop(struct txp_softc *sc) 1539{ 1540 struct ifnet *ifp; 1541 1542 TXP_LOCK_ASSERT(sc); 1543 ifp = sc->sc_ifp; 1544 1545 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1546 1547 callout_stop(&sc->sc_tick); 1548 1549 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1550 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1551 1552 txp_rxring_empty(sc); 1553} 1554 1555static void 1556txp_watchdog(struct ifnet *ifp) 1557{ 1558 1559} 1560 1561static int 1562txp_ifmedia_upd(struct ifnet *ifp) 1563{ 1564 struct txp_softc *sc = ifp->if_softc; 1565 struct ifmedia *ifm = &sc->sc_ifmedia; 1566 u_int16_t new_xcvr; 1567 1568 TXP_LOCK(sc); 1569 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) { 1570 TXP_UNLOCK(sc); 1571 return (EINVAL); 1572 } 1573 1574 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) { 1575 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1576 new_xcvr = TXP_XCVR_10_FDX; 1577 else 1578 new_xcvr = TXP_XCVR_10_HDX; 1579 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) { 1580 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1581 new_xcvr = TXP_XCVR_100_FDX; 1582 else 1583 new_xcvr = TXP_XCVR_100_HDX; 1584 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { 1585 new_xcvr = TXP_XCVR_AUTO; 1586 } else { 1587 TXP_UNLOCK(sc); 1588 return (EINVAL); 1589 } 1590 1591 /* nothing to do */ 1592 if (sc->sc_xcvr == new_xcvr) { 1593 TXP_UNLOCK(sc); 1594 return (0); 1595 } 1596 1597 txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0, 1598 NULL, NULL, NULL, 0); 1599 sc->sc_xcvr = new_xcvr; 1600 TXP_UNLOCK(sc); 1601 1602 return (0); 1603} 1604 1605static void 1606txp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1607{ 1608 struct txp_softc *sc = ifp->if_softc; 1609 struct ifmedia *ifm = &sc->sc_ifmedia; 1610 u_int16_t bmsr, bmcr, anar, anlpar; 1611 1612 ifmr->ifm_status = IFM_AVALID; 1613 ifmr->ifm_active = IFM_ETHER; 1614 1615 TXP_LOCK(sc); 1616 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1617 &bmsr, NULL, NULL, 1)) 1618 goto bail; 1619 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1620 &bmsr, NULL, NULL, 1)) 1621 goto bail; 1622 1623 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0, 1624 &bmcr, NULL, NULL, 1)) 1625 goto bail; 1626 1627 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0, 1628 &anlpar, NULL, NULL, 1)) 1629 goto bail; 1630 1631 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANAR, 0, 1632 &anar, NULL, NULL, 1)) 1633 goto bail; 1634 TXP_UNLOCK(sc); 1635 1636 if (bmsr & BMSR_LINK) 1637 ifmr->ifm_status |= IFM_ACTIVE; 1638 1639 if (bmcr & BMCR_ISO) { 1640 ifmr->ifm_active |= IFM_NONE; 1641 ifmr->ifm_status = 0; 1642 return; 1643 } 1644 1645 if (bmcr & BMCR_LOOP) 1646 ifmr->ifm_active |= IFM_LOOP; 1647 1648 if (bmcr & BMCR_AUTOEN) { 1649 if ((bmsr & BMSR_ACOMP) == 0) { 1650 ifmr->ifm_active |= IFM_NONE; 1651 return; 1652 } 1653 1654 anlpar &= anar; 1655 if (anlpar & ANLPAR_TX_FD) 1656 ifmr->ifm_active |= IFM_100_TX|IFM_FDX; 1657 else if (anlpar & ANLPAR_T4) 1658 ifmr->ifm_active |= IFM_100_T4; 1659 else if (anlpar & ANLPAR_TX) 1660 ifmr->ifm_active |= IFM_100_TX; 1661 else if (anlpar & ANLPAR_10_FD) 1662 ifmr->ifm_active |= IFM_10_T|IFM_FDX; 1663 else if (anlpar & ANLPAR_10) 1664 ifmr->ifm_active |= IFM_10_T; 1665 else 1666 ifmr->ifm_active |= IFM_NONE; 1667 } else 1668 ifmr->ifm_active = ifm->ifm_cur->ifm_media; 1669 return; 1670 1671bail: 1672 TXP_UNLOCK(sc); 1673 ifmr->ifm_active |= IFM_NONE; 1674 ifmr->ifm_status &= ~IFM_AVALID; 1675} 1676 1677#ifdef TXP_DEBUG 1678static void 1679txp_show_descriptor(void *d) 1680{ 1681 struct txp_cmd_desc *cmd = d; 1682 struct txp_rsp_desc *rsp = d; 1683 struct txp_tx_desc *txd = d; 1684 struct txp_frag_desc *frgd = d; 1685 1686 switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) { 1687 case CMD_FLAGS_TYPE_CMD: 1688 /* command descriptor */ 1689 printf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1690 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1691 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1692 break; 1693 case CMD_FLAGS_TYPE_RESP: 1694 /* response descriptor */ 1695 printf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1696 rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq, 1697 rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3); 1698 break; 1699 case CMD_FLAGS_TYPE_DATA: 1700 /* data header (assuming tx for now) */ 1701 printf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]", 1702 txd->tx_flags, txd->tx_numdesc, txd->tx_totlen, 1703 txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags); 1704 break; 1705 case CMD_FLAGS_TYPE_FRAG: 1706 /* fragment descriptor */ 1707 printf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]", 1708 frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len, 1709 frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2); 1710 break; 1711 default: 1712 printf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1713 cmd->cmd_flags & CMD_FLAGS_TYPE_M, 1714 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1715 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1716 break; 1717 } 1718} 1719#endif 1720 1721static void 1722txp_set_filter(struct txp_softc *sc) 1723{ 1724 struct ifnet *ifp = sc->sc_ifp; 1725 u_int32_t crc, carry, hashbit, hash[2]; 1726 u_int16_t filter; 1727 u_int8_t octet; 1728 int i, j, mcnt = 0; 1729 struct ifmultiaddr *ifma; 1730 char *enm; 1731 1732 if (ifp->if_flags & IFF_PROMISC) { 1733 filter = TXP_RXFILT_PROMISC; 1734 goto setit; 1735 } 1736 1737 filter = TXP_RXFILT_DIRECT; 1738 1739 if (ifp->if_flags & IFF_BROADCAST) 1740 filter |= TXP_RXFILT_BROADCAST; 1741 1742 if (ifp->if_flags & IFF_ALLMULTI) 1743 filter |= TXP_RXFILT_ALLMULTI; 1744 else { 1745 hash[0] = hash[1] = 0; 1746 1747 IF_ADDR_LOCK(ifp); 1748 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1749 if (ifma->ifma_addr->sa_family != AF_LINK) 1750 continue; 1751 1752 enm = LLADDR((struct sockaddr_dl *)ifma->ifma_addr); 1753 mcnt++; 1754 crc = 0xffffffff; 1755 1756 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1757 octet = enm[i]; 1758 for (j = 0; j < 8; j++) { 1759 carry = ((crc & 0x80000000) ? 1 : 0) ^ 1760 (octet & 1); 1761 crc <<= 1; 1762 octet >>= 1; 1763 if (carry) 1764 crc = (crc ^ TXP_POLYNOMIAL) | 1765 carry; 1766 } 1767 } 1768 hashbit = (u_int16_t)(crc & (64 - 1)); 1769 hash[hashbit / 32] |= (1 << hashbit % 32); 1770 } 1771 IF_ADDR_UNLOCK(ifp); 1772 1773 if (mcnt > 0) { 1774 filter |= TXP_RXFILT_HASHMULTI; 1775 txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE, 1776 2, hash[0], hash[1], NULL, NULL, NULL, 0); 1777 } 1778 } 1779 1780setit: 1781 1782 txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0, 1783 NULL, NULL, NULL, 1); 1784} 1785 1786static void 1787txp_capabilities(struct txp_softc *sc) 1788{ 1789 struct ifnet *ifp = sc->sc_ifp; 1790 struct txp_rsp_desc *rsp = NULL; 1791 struct txp_ext_desc *ext; 1792 1793 if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1)) 1794 goto out; 1795 1796 if (rsp->rsp_numdesc != 1) 1797 goto out; 1798 ext = (struct txp_ext_desc *)(rsp + 1); 1799 1800 sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK; 1801 sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK; 1802 ifp->if_capabilities = 0; 1803 1804 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) { 1805 sc->sc_tx_capability |= OFFLOAD_VLAN; 1806 sc->sc_rx_capability |= OFFLOAD_VLAN; 1807 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 1808 } 1809 1810#if 0 1811 /* not ready yet */ 1812 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) { 1813 sc->sc_tx_capability |= OFFLOAD_IPSEC; 1814 sc->sc_rx_capability |= OFFLOAD_IPSEC; 1815 ifp->if_capabilities |= IFCAP_IPSEC; 1816 } 1817#endif 1818 1819 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) { 1820 sc->sc_tx_capability |= OFFLOAD_IPCKSUM; 1821 sc->sc_rx_capability |= OFFLOAD_IPCKSUM; 1822 ifp->if_capabilities |= IFCAP_HWCSUM; 1823 ifp->if_hwassist |= CSUM_IP; 1824 } 1825 1826 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) { 1827#if 0 1828 sc->sc_tx_capability |= OFFLOAD_TCPCKSUM; 1829#endif 1830 sc->sc_rx_capability |= OFFLOAD_TCPCKSUM; 1831 ifp->if_capabilities |= IFCAP_HWCSUM; 1832 } 1833 1834 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) { 1835#if 0 1836 sc->sc_tx_capability |= OFFLOAD_UDPCKSUM; 1837#endif 1838 sc->sc_rx_capability |= OFFLOAD_UDPCKSUM; 1839 ifp->if_capabilities |= IFCAP_HWCSUM; 1840 } 1841 ifp->if_capenable = ifp->if_capabilities; 1842 1843 if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0, 1844 sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1)) 1845 goto out; 1846 1847out: 1848 if (rsp != NULL) 1849 free(rsp, M_DEVBUF); 1850} 1851