if_txp.c revision 162375
1/* $OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $ */ 2 3/*- 4 * Copyright (c) 2001 5 * Jason L. Wright <jason@thought.net>, Theo de Raadt, and 6 * Aaron Campbell <aaron@monkey.org>. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Jason L. Wright, 19 * Theo de Raadt and Aaron Campbell. 20 * 4. Neither the name of the author nor the names of any co-contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37#include <sys/cdefs.h> 38__FBSDID("$FreeBSD: head/sys/dev/txp/if_txp.c 162375 2006-09-17 13:33:30Z andre $"); 39 40/* 41 * Driver for 3c990 (Typhoon) Ethernet ASIC 42 */ 43 44#include <sys/cdefs.h> 45__FBSDID("$FreeBSD: head/sys/dev/txp/if_txp.c 162375 2006-09-17 13:33:30Z andre $"); 46 47#include <sys/param.h> 48#include <sys/systm.h> 49#include <sys/sockio.h> 50#include <sys/mbuf.h> 51#include <sys/malloc.h> 52#include <sys/kernel.h> 53#include <sys/module.h> 54#include <sys/socket.h> 55 56#include <net/if.h> 57#include <net/if_arp.h> 58#include <net/ethernet.h> 59#include <net/if_dl.h> 60#include <net/if_types.h> 61#include <net/if_vlan_var.h> 62 63#include <netinet/in.h> 64#include <netinet/in_systm.h> 65#include <netinet/in_var.h> 66#include <netinet/ip.h> 67#include <netinet/if_ether.h> 68#include <machine/in_cksum.h> 69 70#include <net/if_media.h> 71 72#include <net/bpf.h> 73 74#include <vm/vm.h> /* for vtophys */ 75#include <vm/pmap.h> /* for vtophys */ 76#include <machine/bus.h> 77#include <machine/resource.h> 78#include <sys/bus.h> 79#include <sys/rman.h> 80 81#include <dev/mii/mii.h> 82#include <dev/mii/miivar.h> 83#include <dev/pci/pcireg.h> 84#include <dev/pci/pcivar.h> 85 86#define TXP_USEIOSPACE 87#define __STRICT_ALIGNMENT 88 89#include <dev/txp/if_txpreg.h> 90#include <dev/txp/3c990img.h> 91 92#ifndef lint 93static const char rcsid[] = 94 "$FreeBSD: head/sys/dev/txp/if_txp.c 162375 2006-09-17 13:33:30Z andre $"; 95#endif 96 97/* 98 * Various supported device vendors/types and their names. 99 */ 100static struct txp_type txp_devs[] = { 101 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_95, 102 "3Com 3cR990-TX-95 Etherlink with 3XP Processor" }, 103 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_97, 104 "3Com 3cR990-TX-97 Etherlink with 3XP Processor" }, 105 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_TXM, 106 "3Com 3cR990B-TXM Etherlink with 3XP Processor" }, 107 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_95, 108 "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" }, 109 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_97, 110 "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" }, 111 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_SRV, 112 "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" }, 113 { 0, 0, NULL } 114}; 115 116static int txp_probe(device_t); 117static int txp_attach(device_t); 118static int txp_detach(device_t); 119static void txp_intr(void *); 120static void txp_tick(void *); 121static int txp_shutdown(device_t); 122static int txp_ioctl(struct ifnet *, u_long, caddr_t); 123static void txp_start(struct ifnet *); 124static void txp_start_locked(struct ifnet *); 125static void txp_stop(struct txp_softc *); 126static void txp_init(void *); 127static void txp_init_locked(struct txp_softc *); 128static void txp_watchdog(struct ifnet *); 129 130static void txp_release_resources(struct txp_softc *); 131static int txp_chip_init(struct txp_softc *); 132static int txp_reset_adapter(struct txp_softc *); 133static int txp_download_fw(struct txp_softc *); 134static int txp_download_fw_wait(struct txp_softc *); 135static int txp_download_fw_section(struct txp_softc *, 136 struct txp_fw_section_header *, int); 137static int txp_alloc_rings(struct txp_softc *); 138static int txp_rxring_fill(struct txp_softc *); 139static void txp_rxring_empty(struct txp_softc *); 140static void txp_set_filter(struct txp_softc *); 141 142static int txp_cmd_desc_numfree(struct txp_softc *); 143static int txp_command(struct txp_softc *, u_int16_t, u_int16_t, u_int32_t, 144 u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int); 145static int txp_command2(struct txp_softc *, u_int16_t, u_int16_t, 146 u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t, 147 struct txp_rsp_desc **, int); 148static int txp_response(struct txp_softc *, u_int32_t, u_int16_t, u_int16_t, 149 struct txp_rsp_desc **); 150static void txp_rsp_fixup(struct txp_softc *, struct txp_rsp_desc *, 151 struct txp_rsp_desc *); 152static void txp_capabilities(struct txp_softc *); 153 154static void txp_ifmedia_sts(struct ifnet *, struct ifmediareq *); 155static int txp_ifmedia_upd(struct ifnet *); 156#ifdef TXP_DEBUG 157static void txp_show_descriptor(void *); 158#endif 159static void txp_tx_reclaim(struct txp_softc *, struct txp_tx_ring *); 160static void txp_rxbuf_reclaim(struct txp_softc *); 161static void txp_rx_reclaim(struct txp_softc *, struct txp_rx_ring *); 162 163#ifdef TXP_USEIOSPACE 164#define TXP_RES SYS_RES_IOPORT 165#define TXP_RID TXP_PCI_LOIO 166#else 167#define TXP_RES SYS_RES_MEMORY 168#define TXP_RID TXP_PCI_LOMEM 169#endif 170 171static device_method_t txp_methods[] = { 172 /* Device interface */ 173 DEVMETHOD(device_probe, txp_probe), 174 DEVMETHOD(device_attach, txp_attach), 175 DEVMETHOD(device_detach, txp_detach), 176 DEVMETHOD(device_shutdown, txp_shutdown), 177 { 0, 0 } 178}; 179 180static driver_t txp_driver = { 181 "txp", 182 txp_methods, 183 sizeof(struct txp_softc) 184}; 185 186static devclass_t txp_devclass; 187 188DRIVER_MODULE(txp, pci, txp_driver, txp_devclass, 0, 0); 189MODULE_DEPEND(txp, pci, 1, 1, 1); 190MODULE_DEPEND(txp, ether, 1, 1, 1); 191 192static int 193txp_probe(dev) 194 device_t dev; 195{ 196 struct txp_type *t; 197 198 t = txp_devs; 199 200 while(t->txp_name != NULL) { 201 if ((pci_get_vendor(dev) == t->txp_vid) && 202 (pci_get_device(dev) == t->txp_did)) { 203 device_set_desc(dev, t->txp_name); 204 return(BUS_PROBE_DEFAULT); 205 } 206 t++; 207 } 208 209 return(ENXIO); 210} 211 212static int 213txp_attach(dev) 214 device_t dev; 215{ 216 struct txp_softc *sc; 217 struct ifnet *ifp; 218 u_int16_t p1; 219 u_int32_t p2; 220 int error = 0, rid; 221 u_char eaddr[6]; 222 223 sc = device_get_softc(dev); 224 sc->sc_dev = dev; 225 sc->sc_cold = 1; 226 227 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 228 MTX_DEF); 229 callout_init_mtx(&sc->sc_tick, &sc->sc_mtx, 0); 230 231 /* 232 * Map control/status registers. 233 */ 234 pci_enable_busmaster(dev); 235 236 rid = TXP_RID; 237 sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid, 238 RF_ACTIVE); 239 240 if (sc->sc_res == NULL) { 241 device_printf(dev, "couldn't map ports/memory\n"); 242 error = ENXIO; 243 goto fail; 244 } 245 246 sc->sc_bt = rman_get_bustag(sc->sc_res); 247 sc->sc_bh = rman_get_bushandle(sc->sc_res); 248 249 /* Allocate interrupt */ 250 rid = 0; 251 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 252 RF_SHAREABLE | RF_ACTIVE); 253 254 if (sc->sc_irq == NULL) { 255 device_printf(dev, "couldn't map interrupt\n"); 256 error = ENXIO; 257 goto fail; 258 } 259 260 if (txp_chip_init(sc)) { 261 error = ENXIO; 262 goto fail; 263 } 264 265 sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF, 266 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 267 error = txp_download_fw(sc); 268 contigfree(sc->sc_fwbuf, 32768, M_DEVBUF); 269 sc->sc_fwbuf = NULL; 270 271 if (error) 272 goto fail; 273 274 sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF, 275 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 276 bzero(sc->sc_ldata, sizeof(struct txp_ldata)); 277 278 if (txp_alloc_rings(sc)) { 279 error = ENXIO; 280 goto fail; 281 } 282 283 if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 284 NULL, NULL, NULL, 1)) { 285 error = ENXIO; 286 goto fail; 287 } 288 289 if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0, 290 &p1, &p2, NULL, 1)) { 291 error = ENXIO; 292 goto fail; 293 } 294 295 eaddr[0] = ((u_int8_t *)&p1)[1]; 296 eaddr[1] = ((u_int8_t *)&p1)[0]; 297 eaddr[2] = ((u_int8_t *)&p2)[3]; 298 eaddr[3] = ((u_int8_t *)&p2)[2]; 299 eaddr[4] = ((u_int8_t *)&p2)[1]; 300 eaddr[5] = ((u_int8_t *)&p2)[0]; 301 302 sc->sc_cold = 0; 303 304 ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts); 305 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 306 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 307 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 308 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); 309 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL); 310 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); 311 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); 312 313 sc->sc_xcvr = TXP_XCVR_AUTO; 314 txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0, 315 NULL, NULL, NULL, 0); 316 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO); 317 318 ifp = sc->sc_ifp = if_alloc(IFT_ETHER); 319 if (ifp == NULL) { 320 device_printf(dev, "can not if_alloc()\n"); 321 error = ENOSPC; 322 goto fail; 323 } 324 ifp->if_softc = sc; 325 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 326 ifp->if_mtu = ETHERMTU; 327 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 328 ifp->if_ioctl = txp_ioctl; 329 ifp->if_start = txp_start; 330 ifp->if_watchdog = txp_watchdog; 331 ifp->if_init = txp_init; 332 ifp->if_baudrate = 100000000; 333 ifp->if_snd.ifq_maxlen = TX_ENTRIES; 334 ifp->if_hwassist = 0; 335 txp_capabilities(sc); 336 337 /* 338 * Attach us everywhere 339 */ 340 ether_ifattach(ifp, eaddr); 341 342 error = bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE, 343 txp_intr, sc, &sc->sc_intrhand); 344 345 if (error) { 346 ether_ifdetach(ifp); 347 device_printf(dev, "couldn't set up irq\n"); 348 goto fail; 349 } 350 351 return(0); 352 353fail: 354 txp_release_resources(sc); 355 mtx_destroy(&sc->sc_mtx); 356 return(error); 357} 358 359static int 360txp_detach(dev) 361 device_t dev; 362{ 363 struct txp_softc *sc; 364 struct ifnet *ifp; 365 int i; 366 367 sc = device_get_softc(dev); 368 ifp = sc->sc_ifp; 369 370 TXP_LOCK(sc); 371 txp_stop(sc); 372 TXP_UNLOCK(sc); 373 txp_shutdown(dev); 374 callout_drain(&sc->sc_tick); 375 376 ifmedia_removeall(&sc->sc_ifmedia); 377 ether_ifdetach(ifp); 378 379 for (i = 0; i < RXBUF_ENTRIES; i++) 380 free(sc->sc_rxbufs[i].rb_sd, M_DEVBUF); 381 382 txp_release_resources(sc); 383 384 mtx_destroy(&sc->sc_mtx); 385 return(0); 386} 387 388static void 389txp_release_resources(sc) 390 struct txp_softc *sc; 391{ 392 device_t dev; 393 394 dev = sc->sc_dev; 395 396 if (sc->sc_intrhand != NULL) 397 bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand); 398 399 if (sc->sc_irq != NULL) 400 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq); 401 402 if (sc->sc_res != NULL) 403 bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res); 404 405 if (sc->sc_ldata != NULL) 406 contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF); 407 408 if (sc->sc_ifp) 409 if_free(sc->sc_ifp); 410 411 return; 412} 413 414static int 415txp_chip_init(sc) 416 struct txp_softc *sc; 417{ 418 /* disable interrupts */ 419 WRITE_REG(sc, TXP_IER, 0); 420 WRITE_REG(sc, TXP_IMR, 421 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 422 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 423 TXP_INT_LATCH); 424 425 /* ack all interrupts */ 426 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 427 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 428 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 429 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 430 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 431 432 if (txp_reset_adapter(sc)) 433 return (-1); 434 435 /* disable interrupts */ 436 WRITE_REG(sc, TXP_IER, 0); 437 WRITE_REG(sc, TXP_IMR, 438 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 439 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 440 TXP_INT_LATCH); 441 442 /* ack all interrupts */ 443 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 444 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 445 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 446 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 447 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 448 449 return (0); 450} 451 452static int 453txp_reset_adapter(sc) 454 struct txp_softc *sc; 455{ 456 u_int32_t r; 457 int i; 458 459 r = 0; 460 WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL); 461 DELAY(1000); 462 WRITE_REG(sc, TXP_SRR, 0); 463 464 /* Should wait max 6 seconds */ 465 for (i = 0; i < 6000; i++) { 466 r = READ_REG(sc, TXP_A2H_0); 467 if (r == STAT_WAITING_FOR_HOST_REQUEST) 468 break; 469 DELAY(1000); 470 } 471 472 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 473 device_printf(sc->sc_dev, "reset hung\n"); 474 return (-1); 475 } 476 477 return (0); 478} 479 480static int 481txp_download_fw(sc) 482 struct txp_softc *sc; 483{ 484 struct txp_fw_file_header *fileheader; 485 struct txp_fw_section_header *secthead; 486 int sect; 487 u_int32_t r, i, ier, imr; 488 489 r = 0; 490 ier = READ_REG(sc, TXP_IER); 491 WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0); 492 493 imr = READ_REG(sc, TXP_IMR); 494 WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0); 495 496 for (i = 0; i < 10000; i++) { 497 r = READ_REG(sc, TXP_A2H_0); 498 if (r == STAT_WAITING_FOR_HOST_REQUEST) 499 break; 500 DELAY(50); 501 } 502 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 503 device_printf(sc->sc_dev, "not waiting for host request\n"); 504 return (-1); 505 } 506 507 /* Ack the status */ 508 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 509 510 fileheader = (struct txp_fw_file_header *)tc990image; 511 if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) { 512 device_printf(sc->sc_dev, "fw invalid magic\n"); 513 return (-1); 514 } 515 516 /* Tell boot firmware to get ready for image */ 517 WRITE_REG(sc, TXP_H2A_1, fileheader->addr); 518 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE); 519 520 if (txp_download_fw_wait(sc)) { 521 device_printf(sc->sc_dev, "fw wait failed, initial\n"); 522 return (-1); 523 } 524 525 secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) + 526 sizeof(struct txp_fw_file_header)); 527 528 for (sect = 0; sect < fileheader->nsections; sect++) { 529 if (txp_download_fw_section(sc, secthead, sect)) 530 return (-1); 531 secthead = (struct txp_fw_section_header *) 532 (((u_int8_t *)secthead) + secthead->nbytes + 533 sizeof(*secthead)); 534 } 535 536 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE); 537 538 for (i = 0; i < 10000; i++) { 539 r = READ_REG(sc, TXP_A2H_0); 540 if (r == STAT_WAITING_FOR_BOOT) 541 break; 542 DELAY(50); 543 } 544 if (r != STAT_WAITING_FOR_BOOT) { 545 device_printf(sc->sc_dev, "not waiting for boot\n"); 546 return (-1); 547 } 548 549 WRITE_REG(sc, TXP_IER, ier); 550 WRITE_REG(sc, TXP_IMR, imr); 551 552 return (0); 553} 554 555static int 556txp_download_fw_wait(sc) 557 struct txp_softc *sc; 558{ 559 u_int32_t i, r; 560 561 r = 0; 562 for (i = 0; i < 10000; i++) { 563 r = READ_REG(sc, TXP_ISR); 564 if (r & TXP_INT_A2H_0) 565 break; 566 DELAY(50); 567 } 568 569 if (!(r & TXP_INT_A2H_0)) { 570 device_printf(sc->sc_dev, "fw wait failed comm0\n"); 571 return (-1); 572 } 573 574 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 575 576 r = READ_REG(sc, TXP_A2H_0); 577 if (r != STAT_WAITING_FOR_SEGMENT) { 578 device_printf(sc->sc_dev, "fw not waiting for segment\n"); 579 return (-1); 580 } 581 return (0); 582} 583 584static int 585txp_download_fw_section(sc, sect, sectnum) 586 struct txp_softc *sc; 587 struct txp_fw_section_header *sect; 588 int sectnum; 589{ 590 vm_offset_t dma; 591 int rseg, err = 0; 592 struct mbuf m; 593 u_int16_t csum; 594 595 /* Skip zero length sections */ 596 if (sect->nbytes == 0) 597 return (0); 598 599 /* Make sure we aren't past the end of the image */ 600 rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image); 601 if (rseg >= sizeof(tc990image)) { 602 device_printf(sc->sc_dev, "fw invalid section address, " 603 "section %d\n", sectnum); 604 return (-1); 605 } 606 607 /* Make sure this section doesn't go past the end */ 608 rseg += sect->nbytes; 609 if (rseg >= sizeof(tc990image)) { 610 device_printf(sc->sc_dev, "fw truncated section %d\n", 611 sectnum); 612 return (-1); 613 } 614 615 bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes); 616 dma = vtophys(sc->sc_fwbuf); 617 618 /* 619 * dummy up mbuf and verify section checksum 620 */ 621 m.m_type = MT_DATA; 622 m.m_next = m.m_nextpkt = NULL; 623 m.m_len = sect->nbytes; 624 m.m_data = sc->sc_fwbuf; 625 m.m_flags = 0; 626 csum = in_cksum(&m, sect->nbytes); 627 if (csum != sect->cksum) { 628 device_printf(sc->sc_dev, "fw section %d, bad " 629 "cksum (expected 0x%x got 0x%x)\n", 630 sectnum, sect->cksum, csum); 631 err = -1; 632 goto bail; 633 } 634 635 WRITE_REG(sc, TXP_H2A_1, sect->nbytes); 636 WRITE_REG(sc, TXP_H2A_2, sect->cksum); 637 WRITE_REG(sc, TXP_H2A_3, sect->addr); 638 WRITE_REG(sc, TXP_H2A_4, 0); 639 WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff); 640 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE); 641 642 if (txp_download_fw_wait(sc)) { 643 device_printf(sc->sc_dev, "fw wait failed, " 644 "section %d\n", sectnum); 645 err = -1; 646 } 647 648bail: 649 return (err); 650} 651 652static void 653txp_intr(vsc) 654 void *vsc; 655{ 656 struct txp_softc *sc = vsc; 657 struct txp_hostvar *hv = sc->sc_hostvar; 658 u_int32_t isr; 659 660 /* mask all interrupts */ 661 TXP_LOCK(sc); 662 WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF | 663 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 664 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 665 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 666 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 667 668 isr = READ_REG(sc, TXP_ISR); 669 while (isr) { 670 WRITE_REG(sc, TXP_ISR, isr); 671 672 if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff)) 673 txp_rx_reclaim(sc, &sc->sc_rxhir); 674 if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff)) 675 txp_rx_reclaim(sc, &sc->sc_rxlor); 676 677 if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx) 678 txp_rxbuf_reclaim(sc); 679 680 if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons != 681 TXP_OFFSET2IDX(*(sc->sc_txhir.r_off)))) 682 txp_tx_reclaim(sc, &sc->sc_txhir); 683 684 if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons != 685 TXP_OFFSET2IDX(*(sc->sc_txlor.r_off)))) 686 txp_tx_reclaim(sc, &sc->sc_txlor); 687 688 isr = READ_REG(sc, TXP_ISR); 689 } 690 691 /* unmask all interrupts */ 692 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 693 694 txp_start_locked(sc->sc_ifp); 695 TXP_UNLOCK(sc); 696 697 return; 698} 699 700static void 701txp_rx_reclaim(sc, r) 702 struct txp_softc *sc; 703 struct txp_rx_ring *r; 704{ 705 struct ifnet *ifp = sc->sc_ifp; 706 struct txp_rx_desc *rxd; 707 struct mbuf *m; 708 struct txp_swdesc *sd = NULL; 709 u_int32_t roff, woff; 710 711 TXP_LOCK_ASSERT(sc); 712 roff = *r->r_roff; 713 woff = *r->r_woff; 714 rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc)); 715 716 while (roff != woff) { 717 718 if (rxd->rx_flags & RX_FLAGS_ERROR) { 719 device_printf(sc->sc_dev, "error 0x%x\n", 720 rxd->rx_stat); 721 ifp->if_ierrors++; 722 goto next; 723 } 724 725 /* retrieve stashed pointer */ 726 sd = rxd->rx_sd; 727 728 m = sd->sd_mbuf; 729 sd->sd_mbuf = NULL; 730 731 m->m_pkthdr.len = m->m_len = rxd->rx_len; 732 733#ifdef __STRICT_ALIGNMENT 734 { 735 /* 736 * XXX Nice chip, except it won't accept "off by 2" 737 * buffers, so we're force to copy. Supposedly 738 * this will be fixed in a newer firmware rev 739 * and this will be temporary. 740 */ 741 struct mbuf *mnew; 742 743 mnew = m_devget(mtod(m, caddr_t), rxd->rx_len, 744 ETHER_ALIGN, ifp, NULL); 745 m_freem(m); 746 if (mnew == NULL) { 747 ifp->if_ierrors++; 748 goto next; 749 } 750 m = mnew; 751 } 752#endif 753 754 if (rxd->rx_stat & RX_STAT_IPCKSUMBAD) 755 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; 756 else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD) 757 m->m_pkthdr.csum_flags |= 758 CSUM_IP_CHECKED|CSUM_IP_VALID; 759 760 if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) || 761 (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) { 762 m->m_pkthdr.csum_flags |= 763 CSUM_DATA_VALID|CSUM_PSEUDO_HDR; 764 m->m_pkthdr.csum_data = 0xffff; 765 } 766 767 if (rxd->rx_stat & RX_STAT_VLAN) { 768 m->m_pkthdr.ether_vtag = htons(rxd->rx_vlan >> 16); 769 m->m_flags |= M_VLANTAG; 770 } 771 772 TXP_UNLOCK(sc); 773 (*ifp->if_input)(ifp, m); 774 TXP_LOCK(sc); 775 776next: 777 778 roff += sizeof(struct txp_rx_desc); 779 if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) { 780 roff = 0; 781 rxd = r->r_desc; 782 } else 783 rxd++; 784 woff = *r->r_woff; 785 } 786 787 *r->r_roff = woff; 788 789 return; 790} 791 792static void 793txp_rxbuf_reclaim(sc) 794 struct txp_softc *sc; 795{ 796 struct ifnet *ifp = sc->sc_ifp; 797 struct txp_hostvar *hv = sc->sc_hostvar; 798 struct txp_rxbuf_desc *rbd; 799 struct txp_swdesc *sd; 800 u_int32_t i; 801 802 TXP_LOCK_ASSERT(sc); 803 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 804 return; 805 806 i = sc->sc_rxbufprod; 807 rbd = sc->sc_rxbufs + i; 808 809 while (1) { 810 sd = rbd->rb_sd; 811 if (sd->sd_mbuf != NULL) 812 break; 813 814 sd->sd_mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 815 if (sd->sd_mbuf == NULL) 816 return; 817 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 818 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 819 820 rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t)) 821 & 0xffffffff; 822 rbd->rb_paddrhi = 0; 823 824 hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i); 825 826 if (++i == RXBUF_ENTRIES) { 827 i = 0; 828 rbd = sc->sc_rxbufs; 829 } else 830 rbd++; 831 } 832 833 sc->sc_rxbufprod = i; 834 835 return; 836} 837 838/* 839 * Reclaim mbufs and entries from a transmit ring. 840 */ 841static void 842txp_tx_reclaim(sc, r) 843 struct txp_softc *sc; 844 struct txp_tx_ring *r; 845{ 846 struct ifnet *ifp = sc->sc_ifp; 847 u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off)); 848 u_int32_t cons = r->r_cons, cnt = r->r_cnt; 849 struct txp_tx_desc *txd = r->r_desc + cons; 850 struct txp_swdesc *sd = sc->sc_txd + cons; 851 struct mbuf *m; 852 853 TXP_LOCK_ASSERT(sc); 854 while (cons != idx) { 855 if (cnt == 0) 856 break; 857 858 if ((txd->tx_flags & TX_FLAGS_TYPE_M) == 859 TX_FLAGS_TYPE_DATA) { 860 m = sd->sd_mbuf; 861 if (m != NULL) { 862 m_freem(m); 863 txd->tx_addrlo = 0; 864 txd->tx_addrhi = 0; 865 ifp->if_opackets++; 866 } 867 } 868 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 869 870 if (++cons == TX_ENTRIES) { 871 txd = r->r_desc; 872 cons = 0; 873 sd = sc->sc_txd; 874 } else { 875 txd++; 876 sd++; 877 } 878 879 cnt--; 880 } 881 882 r->r_cons = cons; 883 r->r_cnt = cnt; 884 if (cnt == 0) 885 ifp->if_timer = 0; 886} 887 888static int 889txp_shutdown(dev) 890 device_t dev; 891{ 892 struct txp_softc *sc; 893 894 sc = device_get_softc(dev); 895 896 TXP_LOCK(sc); 897 898 /* mask all interrupts */ 899 WRITE_REG(sc, TXP_IMR, 900 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 901 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 902 TXP_INT_LATCH); 903 904 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 905 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 906 txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0); 907 TXP_UNLOCK(sc); 908 909 return(0); 910} 911 912static int 913txp_alloc_rings(sc) 914 struct txp_softc *sc; 915{ 916 struct txp_boot_record *boot; 917 struct txp_ldata *ld; 918 u_int32_t r; 919 int i; 920 921 r = 0; 922 ld = sc->sc_ldata; 923 boot = &ld->txp_boot; 924 925 /* boot record */ 926 sc->sc_boot = boot; 927 928 /* host variables */ 929 bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar)); 930 boot->br_hostvar_lo = vtophys(&ld->txp_hostvar); 931 boot->br_hostvar_hi = 0; 932 sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar; 933 934 /* hi priority tx ring */ 935 boot->br_txhipri_lo = vtophys(&ld->txp_txhiring);; 936 boot->br_txhipri_hi = 0; 937 boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 938 sc->sc_txhir.r_reg = TXP_H2A_1; 939 sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring; 940 sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0; 941 sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx; 942 943 /* lo priority tx ring */ 944 boot->br_txlopri_lo = vtophys(&ld->txp_txloring); 945 boot->br_txlopri_hi = 0; 946 boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 947 sc->sc_txlor.r_reg = TXP_H2A_3; 948 sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring; 949 sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0; 950 sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx; 951 952 /* high priority rx ring */ 953 boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring); 954 boot->br_rxhipri_hi = 0; 955 boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 956 sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring; 957 sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx; 958 sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx; 959 960 /* low priority rx ring */ 961 boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring); 962 boot->br_rxlopri_hi = 0; 963 boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 964 sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring; 965 sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx; 966 sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx; 967 968 /* command ring */ 969 bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES); 970 boot->br_cmd_lo = vtophys(&ld->txp_cmdring); 971 boot->br_cmd_hi = 0; 972 boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 973 sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring; 974 sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 975 sc->sc_cmdring.lastwrite = 0; 976 977 /* response ring */ 978 bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES); 979 boot->br_resp_lo = vtophys(&ld->txp_rspring); 980 boot->br_resp_hi = 0; 981 boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc); 982 sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring; 983 sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc); 984 sc->sc_rspring.lastwrite = 0; 985 986 /* receive buffer ring */ 987 boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs); 988 boot->br_rxbuf_hi = 0; 989 boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc); 990 sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs; 991 992 for (i = 0; i < RXBUF_ENTRIES; i++) { 993 struct txp_swdesc *sd; 994 if (sc->sc_rxbufs[i].rb_sd != NULL) 995 continue; 996 sc->sc_rxbufs[i].rb_sd = malloc(sizeof(struct txp_swdesc), 997 M_DEVBUF, M_NOWAIT); 998 if (sc->sc_rxbufs[i].rb_sd == NULL) 999 return(ENOBUFS); 1000 sd = sc->sc_rxbufs[i].rb_sd; 1001 sd->sd_mbuf = NULL; 1002 } 1003 sc->sc_rxbufprod = 0; 1004 1005 /* zero dma */ 1006 bzero(&ld->txp_zero, sizeof(u_int32_t)); 1007 boot->br_zero_lo = vtophys(&ld->txp_zero); 1008 boot->br_zero_hi = 0; 1009 1010 /* See if it's waiting for boot, and try to boot it */ 1011 for (i = 0; i < 10000; i++) { 1012 r = READ_REG(sc, TXP_A2H_0); 1013 if (r == STAT_WAITING_FOR_BOOT) 1014 break; 1015 DELAY(50); 1016 } 1017 1018 if (r != STAT_WAITING_FOR_BOOT) { 1019 device_printf(sc->sc_dev, "not waiting for boot\n"); 1020 return(ENXIO); 1021 } 1022 1023 WRITE_REG(sc, TXP_H2A_2, 0); 1024 WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot)); 1025 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD); 1026 1027 /* See if it booted */ 1028 for (i = 0; i < 10000; i++) { 1029 r = READ_REG(sc, TXP_A2H_0); 1030 if (r == STAT_RUNNING) 1031 break; 1032 DELAY(50); 1033 } 1034 if (r != STAT_RUNNING) { 1035 device_printf(sc->sc_dev, "fw not running\n"); 1036 return(ENXIO); 1037 } 1038 1039 /* Clear TX and CMD ring write registers */ 1040 WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL); 1041 WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL); 1042 WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL); 1043 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL); 1044 1045 return (0); 1046} 1047 1048static int 1049txp_ioctl(ifp, command, data) 1050 struct ifnet *ifp; 1051 u_long command; 1052 caddr_t data; 1053{ 1054 struct txp_softc *sc = ifp->if_softc; 1055 struct ifreq *ifr = (struct ifreq *)data; 1056 int error = 0; 1057 1058 switch(command) { 1059 case SIOCSIFFLAGS: 1060 TXP_LOCK(sc); 1061 if (ifp->if_flags & IFF_UP) { 1062 txp_init_locked(sc); 1063 } else { 1064 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1065 txp_stop(sc); 1066 } 1067 TXP_UNLOCK(sc); 1068 break; 1069 case SIOCADDMULTI: 1070 case SIOCDELMULTI: 1071 /* 1072 * Multicast list has changed; set the hardware 1073 * filter accordingly. 1074 */ 1075 TXP_LOCK(sc); 1076 txp_set_filter(sc); 1077 TXP_UNLOCK(sc); 1078 error = 0; 1079 break; 1080 case SIOCGIFMEDIA: 1081 case SIOCSIFMEDIA: 1082 error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command); 1083 break; 1084 default: 1085 error = ether_ioctl(ifp, command, data); 1086 break; 1087 } 1088 1089 return(error); 1090} 1091 1092static int 1093txp_rxring_fill(sc) 1094 struct txp_softc *sc; 1095{ 1096 int i; 1097 struct ifnet *ifp; 1098 struct txp_swdesc *sd; 1099 1100 TXP_LOCK_ASSERT(sc); 1101 ifp = sc->sc_ifp; 1102 1103 for (i = 0; i < RXBUF_ENTRIES; i++) { 1104 sd = sc->sc_rxbufs[i].rb_sd; 1105 sd->sd_mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1106 if (sd->sd_mbuf == NULL) 1107 return(ENOBUFS); 1108 1109 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 1110 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 1111 1112 sc->sc_rxbufs[i].rb_paddrlo = 1113 vtophys(mtod(sd->sd_mbuf, vm_offset_t)); 1114 sc->sc_rxbufs[i].rb_paddrhi = 0; 1115 } 1116 1117 sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) * 1118 sizeof(struct txp_rxbuf_desc); 1119 1120 return(0); 1121} 1122 1123static void 1124txp_rxring_empty(sc) 1125 struct txp_softc *sc; 1126{ 1127 int i; 1128 struct txp_swdesc *sd; 1129 1130 TXP_LOCK_ASSERT(sc); 1131 if (sc->sc_rxbufs == NULL) 1132 return; 1133 1134 for (i = 0; i < RXBUF_ENTRIES; i++) { 1135 if (&sc->sc_rxbufs[i] == NULL) 1136 continue; 1137 sd = sc->sc_rxbufs[i].rb_sd; 1138 if (sd == NULL) 1139 continue; 1140 if (sd->sd_mbuf != NULL) { 1141 m_freem(sd->sd_mbuf); 1142 sd->sd_mbuf = NULL; 1143 } 1144 } 1145 1146 return; 1147} 1148 1149static void 1150txp_init(xsc) 1151 void *xsc; 1152{ 1153 struct txp_softc *sc; 1154 1155 sc = xsc; 1156 TXP_LOCK(sc); 1157 txp_init_locked(sc); 1158 TXP_UNLOCK(sc); 1159} 1160 1161static void 1162txp_init_locked(sc) 1163 struct txp_softc *sc; 1164{ 1165 struct ifnet *ifp; 1166 u_int16_t p1; 1167 u_int32_t p2; 1168 1169 TXP_LOCK_ASSERT(sc); 1170 ifp = sc->sc_ifp; 1171 1172 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1173 return; 1174 1175 txp_stop(sc); 1176 1177 txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 1178 NULL, NULL, NULL, 1); 1179 1180 /* Set station address. */ 1181 ((u_int8_t *)&p1)[1] = IF_LLADDR(sc->sc_ifp)[0]; 1182 ((u_int8_t *)&p1)[0] = IF_LLADDR(sc->sc_ifp)[1]; 1183 ((u_int8_t *)&p2)[3] = IF_LLADDR(sc->sc_ifp)[2]; 1184 ((u_int8_t *)&p2)[2] = IF_LLADDR(sc->sc_ifp)[3]; 1185 ((u_int8_t *)&p2)[1] = IF_LLADDR(sc->sc_ifp)[4]; 1186 ((u_int8_t *)&p2)[0] = IF_LLADDR(sc->sc_ifp)[5]; 1187 txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0, 1188 NULL, NULL, NULL, 1); 1189 1190 txp_set_filter(sc); 1191 1192 txp_rxring_fill(sc); 1193 1194 txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1195 txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1196 1197 WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF | 1198 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 1199 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 1200 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 1201 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 1202 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 1203 1204 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1205 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1206 ifp->if_timer = 0; 1207 1208 callout_reset(&sc->sc_tick, hz, txp_tick, sc); 1209} 1210 1211static void 1212txp_tick(vsc) 1213 void *vsc; 1214{ 1215 struct txp_softc *sc = vsc; 1216 struct ifnet *ifp = sc->sc_ifp; 1217 struct txp_rsp_desc *rsp = NULL; 1218 struct txp_ext_desc *ext; 1219 1220 TXP_LOCK_ASSERT(sc); 1221 txp_rxbuf_reclaim(sc); 1222 1223 if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0, 1224 &rsp, 1)) 1225 goto out; 1226 if (rsp->rsp_numdesc != 6) 1227 goto out; 1228 if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0, 1229 NULL, NULL, NULL, 1)) 1230 goto out; 1231 ext = (struct txp_ext_desc *)(rsp + 1); 1232 1233 ifp->if_ierrors += ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 + 1234 ext[4].ext_1 + ext[4].ext_4; 1235 ifp->if_oerrors += ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 + 1236 ext[2].ext_1; 1237 ifp->if_collisions += ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 + 1238 ext[1].ext_3; 1239 ifp->if_opackets += rsp->rsp_par2; 1240 ifp->if_ipackets += ext[2].ext_3; 1241 1242out: 1243 if (rsp != NULL) 1244 free(rsp, M_DEVBUF); 1245 1246 callout_reset(&sc->sc_tick, hz, txp_tick, sc); 1247 1248 return; 1249} 1250 1251static void 1252txp_start(ifp) 1253 struct ifnet *ifp; 1254{ 1255 struct txp_softc *sc; 1256 1257 sc = ifp->if_softc; 1258 TXP_LOCK(sc); 1259 txp_start_locked(ifp); 1260 TXP_UNLOCK(sc); 1261} 1262 1263static void 1264txp_start_locked(ifp) 1265 struct ifnet *ifp; 1266{ 1267 struct txp_softc *sc = ifp->if_softc; 1268 struct txp_tx_ring *r = &sc->sc_txhir; 1269 struct txp_tx_desc *txd; 1270 struct txp_frag_desc *fxd; 1271 struct mbuf *m, *m0; 1272 struct txp_swdesc *sd; 1273 u_int32_t firstprod, firstcnt, prod, cnt; 1274 1275 TXP_LOCK_ASSERT(sc); 1276 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1277 IFF_DRV_RUNNING) 1278 return; 1279 1280 prod = r->r_prod; 1281 cnt = r->r_cnt; 1282 1283 while (1) { 1284 IF_DEQUEUE(&ifp->if_snd, m); 1285 if (m == NULL) 1286 break; 1287 1288 firstprod = prod; 1289 firstcnt = cnt; 1290 1291 sd = sc->sc_txd + prod; 1292 sd->sd_mbuf = m; 1293 1294 if ((TX_ENTRIES - cnt) < 4) 1295 goto oactive; 1296 1297 txd = r->r_desc + prod; 1298 1299 txd->tx_flags = TX_FLAGS_TYPE_DATA; 1300 txd->tx_numdesc = 0; 1301 txd->tx_addrlo = 0; 1302 txd->tx_addrhi = 0; 1303 txd->tx_totlen = 0; 1304 txd->tx_pflags = 0; 1305 1306 if (++prod == TX_ENTRIES) 1307 prod = 0; 1308 1309 if (++cnt >= (TX_ENTRIES - 4)) 1310 goto oactive; 1311 1312 if (m->m_flags & M_VLANTAG) { 1313 txd->tx_pflags = TX_PFLAGS_VLAN | 1314 (htons(m->m_pkthdr.ether_vtag) << TX_PFLAGS_VLANTAG_S); 1315 } 1316 1317 if (m->m_pkthdr.csum_flags & CSUM_IP) 1318 txd->tx_pflags |= TX_PFLAGS_IPCKSUM; 1319 1320#if 0 1321 if (m->m_pkthdr.csum_flags & CSUM_TCP) 1322 txd->tx_pflags |= TX_PFLAGS_TCPCKSUM; 1323 if (m->m_pkthdr.csum_flags & CSUM_UDP) 1324 txd->tx_pflags |= TX_PFLAGS_UDPCKSUM; 1325#endif 1326 1327 fxd = (struct txp_frag_desc *)(r->r_desc + prod); 1328 for (m0 = m; m0 != NULL; m0 = m0->m_next) { 1329 if (m0->m_len == 0) 1330 continue; 1331 if (++cnt >= (TX_ENTRIES - 4)) 1332 goto oactive; 1333 1334 txd->tx_numdesc++; 1335 1336 fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG; 1337 fxd->frag_rsvd1 = 0; 1338 fxd->frag_len = m0->m_len; 1339 fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t)); 1340 fxd->frag_addrhi = 0; 1341 fxd->frag_rsvd2 = 0; 1342 1343 if (++prod == TX_ENTRIES) { 1344 fxd = (struct txp_frag_desc *)r->r_desc; 1345 prod = 0; 1346 } else 1347 fxd++; 1348 1349 } 1350 1351 ifp->if_timer = 5; 1352 1353 BPF_MTAP(ifp, m); 1354 WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod)); 1355 } 1356 1357 r->r_prod = prod; 1358 r->r_cnt = cnt; 1359 return; 1360 1361oactive: 1362 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1363 r->r_prod = firstprod; 1364 r->r_cnt = firstcnt; 1365 IF_PREPEND(&ifp->if_snd, m); 1366 return; 1367} 1368 1369/* 1370 * Handle simple commands sent to the typhoon 1371 */ 1372static int 1373txp_command(sc, id, in1, in2, in3, out1, out2, out3, wait) 1374 struct txp_softc *sc; 1375 u_int16_t id, in1, *out1; 1376 u_int32_t in2, in3, *out2, *out3; 1377 int wait; 1378{ 1379 struct txp_rsp_desc *rsp = NULL; 1380 1381 if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait)) 1382 return (-1); 1383 1384 if (!wait) 1385 return (0); 1386 1387 if (out1 != NULL) 1388 *out1 = rsp->rsp_par1; 1389 if (out2 != NULL) 1390 *out2 = rsp->rsp_par2; 1391 if (out3 != NULL) 1392 *out3 = rsp->rsp_par3; 1393 free(rsp, M_DEVBUF); 1394 return (0); 1395} 1396 1397static int 1398txp_command2(sc, id, in1, in2, in3, in_extp, in_extn, rspp, wait) 1399 struct txp_softc *sc; 1400 u_int16_t id, in1; 1401 u_int32_t in2, in3; 1402 struct txp_ext_desc *in_extp; 1403 u_int8_t in_extn; 1404 struct txp_rsp_desc **rspp; 1405 int wait; 1406{ 1407 struct txp_hostvar *hv = sc->sc_hostvar; 1408 struct txp_cmd_desc *cmd; 1409 struct txp_ext_desc *ext; 1410 u_int32_t idx, i; 1411 u_int16_t seq; 1412 1413 if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) { 1414 device_printf(sc->sc_dev, "no free cmd descriptors\n"); 1415 return (-1); 1416 } 1417 1418 idx = sc->sc_cmdring.lastwrite; 1419 cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1420 bzero(cmd, sizeof(*cmd)); 1421 1422 cmd->cmd_numdesc = in_extn; 1423 cmd->cmd_seq = seq = sc->sc_seq++; 1424 cmd->cmd_id = id; 1425 cmd->cmd_par1 = in1; 1426 cmd->cmd_par2 = in2; 1427 cmd->cmd_par3 = in3; 1428 cmd->cmd_flags = CMD_FLAGS_TYPE_CMD | 1429 (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID; 1430 1431 idx += sizeof(struct txp_cmd_desc); 1432 if (idx == sc->sc_cmdring.size) 1433 idx = 0; 1434 1435 for (i = 0; i < in_extn; i++) { 1436 ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1437 bcopy(in_extp, ext, sizeof(struct txp_ext_desc)); 1438 in_extp++; 1439 idx += sizeof(struct txp_cmd_desc); 1440 if (idx == sc->sc_cmdring.size) 1441 idx = 0; 1442 } 1443 1444 sc->sc_cmdring.lastwrite = idx; 1445 1446 WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite); 1447 1448 if (!wait) 1449 return (0); 1450 1451 for (i = 0; i < 10000; i++) { 1452 idx = hv->hv_resp_read_idx; 1453 if (idx != hv->hv_resp_write_idx) { 1454 *rspp = NULL; 1455 if (txp_response(sc, idx, id, seq, rspp)) 1456 return (-1); 1457 if (*rspp != NULL) 1458 break; 1459 } 1460 DELAY(50); 1461 } 1462 if (i == 1000 || (*rspp) == NULL) { 1463 device_printf(sc->sc_dev, "0x%x command failed\n", id); 1464 return (-1); 1465 } 1466 1467 return (0); 1468} 1469 1470static int 1471txp_response(sc, ridx, id, seq, rspp) 1472 struct txp_softc *sc; 1473 u_int32_t ridx; 1474 u_int16_t id; 1475 u_int16_t seq; 1476 struct txp_rsp_desc **rspp; 1477{ 1478 struct txp_hostvar *hv = sc->sc_hostvar; 1479 struct txp_rsp_desc *rsp; 1480 1481 while (ridx != hv->hv_resp_write_idx) { 1482 rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx); 1483 1484 if (id == rsp->rsp_id && rsp->rsp_seq == seq) { 1485 *rspp = (struct txp_rsp_desc *)malloc( 1486 sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1), 1487 M_DEVBUF, M_NOWAIT); 1488 if ((*rspp) == NULL) 1489 return (-1); 1490 txp_rsp_fixup(sc, rsp, *rspp); 1491 return (0); 1492 } 1493 1494 if (rsp->rsp_flags & RSP_FLAGS_ERROR) { 1495 device_printf(sc->sc_dev, "response error!\n"); 1496 txp_rsp_fixup(sc, rsp, NULL); 1497 ridx = hv->hv_resp_read_idx; 1498 continue; 1499 } 1500 1501 switch (rsp->rsp_id) { 1502 case TXP_CMD_CYCLE_STATISTICS: 1503 case TXP_CMD_MEDIA_STATUS_READ: 1504 break; 1505 case TXP_CMD_HELLO_RESPONSE: 1506 device_printf(sc->sc_dev, "hello\n"); 1507 break; 1508 default: 1509 device_printf(sc->sc_dev, "unknown id(0x%x)\n", 1510 rsp->rsp_id); 1511 } 1512 1513 txp_rsp_fixup(sc, rsp, NULL); 1514 ridx = hv->hv_resp_read_idx; 1515 hv->hv_resp_read_idx = ridx; 1516 } 1517 1518 return (0); 1519} 1520 1521static void 1522txp_rsp_fixup(sc, rsp, dst) 1523 struct txp_softc *sc; 1524 struct txp_rsp_desc *rsp, *dst; 1525{ 1526 struct txp_rsp_desc *src = rsp; 1527 struct txp_hostvar *hv = sc->sc_hostvar; 1528 u_int32_t i, ridx; 1529 1530 ridx = hv->hv_resp_read_idx; 1531 1532 for (i = 0; i < rsp->rsp_numdesc + 1; i++) { 1533 if (dst != NULL) 1534 bcopy(src, dst++, sizeof(struct txp_rsp_desc)); 1535 ridx += sizeof(struct txp_rsp_desc); 1536 if (ridx == sc->sc_rspring.size) { 1537 src = sc->sc_rspring.base; 1538 ridx = 0; 1539 } else 1540 src++; 1541 sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx; 1542 } 1543 1544 hv->hv_resp_read_idx = ridx; 1545} 1546 1547static int 1548txp_cmd_desc_numfree(sc) 1549 struct txp_softc *sc; 1550{ 1551 struct txp_hostvar *hv = sc->sc_hostvar; 1552 struct txp_boot_record *br = sc->sc_boot; 1553 u_int32_t widx, ridx, nfree; 1554 1555 widx = sc->sc_cmdring.lastwrite; 1556 ridx = hv->hv_cmd_read_idx; 1557 1558 if (widx == ridx) { 1559 /* Ring is completely free */ 1560 nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc); 1561 } else { 1562 if (widx > ridx) 1563 nfree = br->br_cmd_siz - 1564 (widx - ridx + sizeof(struct txp_cmd_desc)); 1565 else 1566 nfree = ridx - widx - sizeof(struct txp_cmd_desc); 1567 } 1568 1569 return (nfree / sizeof(struct txp_cmd_desc)); 1570} 1571 1572static void 1573txp_stop(sc) 1574 struct txp_softc *sc; 1575{ 1576 struct ifnet *ifp; 1577 1578 TXP_LOCK_ASSERT(sc); 1579 ifp = sc->sc_ifp; 1580 1581 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1582 1583 callout_stop(&sc->sc_tick); 1584 1585 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1586 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1587 1588 txp_rxring_empty(sc); 1589 1590 return; 1591} 1592 1593static void 1594txp_watchdog(ifp) 1595 struct ifnet *ifp; 1596{ 1597 return; 1598} 1599 1600static int 1601txp_ifmedia_upd(ifp) 1602 struct ifnet *ifp; 1603{ 1604 struct txp_softc *sc = ifp->if_softc; 1605 struct ifmedia *ifm = &sc->sc_ifmedia; 1606 u_int16_t new_xcvr; 1607 1608 TXP_LOCK(sc); 1609 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) { 1610 TXP_UNLOCK(sc); 1611 return (EINVAL); 1612 } 1613 1614 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) { 1615 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1616 new_xcvr = TXP_XCVR_10_FDX; 1617 else 1618 new_xcvr = TXP_XCVR_10_HDX; 1619 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) { 1620 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1621 new_xcvr = TXP_XCVR_100_FDX; 1622 else 1623 new_xcvr = TXP_XCVR_100_HDX; 1624 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { 1625 new_xcvr = TXP_XCVR_AUTO; 1626 } else { 1627 TXP_UNLOCK(sc); 1628 return (EINVAL); 1629 } 1630 1631 /* nothing to do */ 1632 if (sc->sc_xcvr == new_xcvr) { 1633 TXP_UNLOCK(sc); 1634 return (0); 1635 } 1636 1637 txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0, 1638 NULL, NULL, NULL, 0); 1639 sc->sc_xcvr = new_xcvr; 1640 TXP_UNLOCK(sc); 1641 1642 return (0); 1643} 1644 1645static void 1646txp_ifmedia_sts(ifp, ifmr) 1647 struct ifnet *ifp; 1648 struct ifmediareq *ifmr; 1649{ 1650 struct txp_softc *sc = ifp->if_softc; 1651 struct ifmedia *ifm = &sc->sc_ifmedia; 1652 u_int16_t bmsr, bmcr, anlpar; 1653 1654 ifmr->ifm_status = IFM_AVALID; 1655 ifmr->ifm_active = IFM_ETHER; 1656 1657 TXP_LOCK(sc); 1658 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1659 &bmsr, NULL, NULL, 1)) 1660 goto bail; 1661 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1662 &bmsr, NULL, NULL, 1)) 1663 goto bail; 1664 1665 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0, 1666 &bmcr, NULL, NULL, 1)) 1667 goto bail; 1668 1669 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0, 1670 &anlpar, NULL, NULL, 1)) 1671 goto bail; 1672 TXP_UNLOCK(sc); 1673 1674 if (bmsr & BMSR_LINK) 1675 ifmr->ifm_status |= IFM_ACTIVE; 1676 1677 if (bmcr & BMCR_ISO) { 1678 ifmr->ifm_active |= IFM_NONE; 1679 ifmr->ifm_status = 0; 1680 return; 1681 } 1682 1683 if (bmcr & BMCR_LOOP) 1684 ifmr->ifm_active |= IFM_LOOP; 1685 1686 if (bmcr & BMCR_AUTOEN) { 1687 if ((bmsr & BMSR_ACOMP) == 0) { 1688 ifmr->ifm_active |= IFM_NONE; 1689 return; 1690 } 1691 1692 if (anlpar & ANLPAR_T4) 1693 ifmr->ifm_active |= IFM_100_T4; 1694 else if (anlpar & ANLPAR_TX_FD) 1695 ifmr->ifm_active |= IFM_100_TX|IFM_FDX; 1696 else if (anlpar & ANLPAR_TX) 1697 ifmr->ifm_active |= IFM_100_TX; 1698 else if (anlpar & ANLPAR_10_FD) 1699 ifmr->ifm_active |= IFM_10_T|IFM_FDX; 1700 else if (anlpar & ANLPAR_10) 1701 ifmr->ifm_active |= IFM_10_T; 1702 else 1703 ifmr->ifm_active |= IFM_NONE; 1704 } else 1705 ifmr->ifm_active = ifm->ifm_cur->ifm_media; 1706 return; 1707 1708bail: 1709 TXP_UNLOCK(sc); 1710 ifmr->ifm_active |= IFM_NONE; 1711 ifmr->ifm_status &= ~IFM_AVALID; 1712} 1713 1714#ifdef TXP_DEBUG 1715static void 1716txp_show_descriptor(d) 1717 void *d; 1718{ 1719 struct txp_cmd_desc *cmd = d; 1720 struct txp_rsp_desc *rsp = d; 1721 struct txp_tx_desc *txd = d; 1722 struct txp_frag_desc *frgd = d; 1723 1724 switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) { 1725 case CMD_FLAGS_TYPE_CMD: 1726 /* command descriptor */ 1727 printf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1728 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1729 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1730 break; 1731 case CMD_FLAGS_TYPE_RESP: 1732 /* response descriptor */ 1733 printf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1734 rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq, 1735 rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3); 1736 break; 1737 case CMD_FLAGS_TYPE_DATA: 1738 /* data header (assuming tx for now) */ 1739 printf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]", 1740 txd->tx_flags, txd->tx_numdesc, txd->tx_totlen, 1741 txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags); 1742 break; 1743 case CMD_FLAGS_TYPE_FRAG: 1744 /* fragment descriptor */ 1745 printf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]", 1746 frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len, 1747 frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2); 1748 break; 1749 default: 1750 printf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1751 cmd->cmd_flags & CMD_FLAGS_TYPE_M, 1752 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1753 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1754 break; 1755 } 1756} 1757#endif 1758 1759static void 1760txp_set_filter(sc) 1761 struct txp_softc *sc; 1762{ 1763 struct ifnet *ifp = sc->sc_ifp; 1764 u_int32_t crc, carry, hashbit, hash[2]; 1765 u_int16_t filter; 1766 u_int8_t octet; 1767 int i, j, mcnt = 0; 1768 struct ifmultiaddr *ifma; 1769 char *enm; 1770 1771 if (ifp->if_flags & IFF_PROMISC) { 1772 filter = TXP_RXFILT_PROMISC; 1773 goto setit; 1774 } 1775 1776 filter = TXP_RXFILT_DIRECT; 1777 1778 if (ifp->if_flags & IFF_BROADCAST) 1779 filter |= TXP_RXFILT_BROADCAST; 1780 1781 if (ifp->if_flags & IFF_ALLMULTI) 1782 filter |= TXP_RXFILT_ALLMULTI; 1783 else { 1784 hash[0] = hash[1] = 0; 1785 1786 IF_ADDR_LOCK(ifp); 1787 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1788 if (ifma->ifma_addr->sa_family != AF_LINK) 1789 continue; 1790 1791 enm = LLADDR((struct sockaddr_dl *)ifma->ifma_addr); 1792 mcnt++; 1793 crc = 0xffffffff; 1794 1795 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1796 octet = enm[i]; 1797 for (j = 0; j < 8; j++) { 1798 carry = ((crc & 0x80000000) ? 1 : 0) ^ 1799 (octet & 1); 1800 crc <<= 1; 1801 octet >>= 1; 1802 if (carry) 1803 crc = (crc ^ TXP_POLYNOMIAL) | 1804 carry; 1805 } 1806 } 1807 hashbit = (u_int16_t)(crc & (64 - 1)); 1808 hash[hashbit / 32] |= (1 << hashbit % 32); 1809 } 1810 IF_ADDR_UNLOCK(ifp); 1811 1812 if (mcnt > 0) { 1813 filter |= TXP_RXFILT_HASHMULTI; 1814 txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE, 1815 2, hash[0], hash[1], NULL, NULL, NULL, 0); 1816 } 1817 } 1818 1819setit: 1820 1821 txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0, 1822 NULL, NULL, NULL, 1); 1823 1824 return; 1825} 1826 1827static void 1828txp_capabilities(sc) 1829 struct txp_softc *sc; 1830{ 1831 struct ifnet *ifp = sc->sc_ifp; 1832 struct txp_rsp_desc *rsp = NULL; 1833 struct txp_ext_desc *ext; 1834 1835 if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1)) 1836 goto out; 1837 1838 if (rsp->rsp_numdesc != 1) 1839 goto out; 1840 ext = (struct txp_ext_desc *)(rsp + 1); 1841 1842 sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK; 1843 sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK; 1844 ifp->if_capabilities = 0; 1845 1846 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) { 1847 sc->sc_tx_capability |= OFFLOAD_VLAN; 1848 sc->sc_rx_capability |= OFFLOAD_VLAN; 1849 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 1850 } 1851 1852#if 0 1853 /* not ready yet */ 1854 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) { 1855 sc->sc_tx_capability |= OFFLOAD_IPSEC; 1856 sc->sc_rx_capability |= OFFLOAD_IPSEC; 1857 ifp->if_capabilities |= IFCAP_IPSEC; 1858 } 1859#endif 1860 1861 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) { 1862 sc->sc_tx_capability |= OFFLOAD_IPCKSUM; 1863 sc->sc_rx_capability |= OFFLOAD_IPCKSUM; 1864 ifp->if_capabilities |= IFCAP_HWCSUM; 1865 ifp->if_hwassist |= CSUM_IP; 1866 } 1867 1868 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) { 1869#if 0 1870 sc->sc_tx_capability |= OFFLOAD_TCPCKSUM; 1871#endif 1872 sc->sc_rx_capability |= OFFLOAD_TCPCKSUM; 1873 ifp->if_capabilities |= IFCAP_HWCSUM; 1874 } 1875 1876 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) { 1877#if 0 1878 sc->sc_tx_capability |= OFFLOAD_UDPCKSUM; 1879#endif 1880 sc->sc_rx_capability |= OFFLOAD_UDPCKSUM; 1881 ifp->if_capabilities |= IFCAP_HWCSUM; 1882 } 1883 ifp->if_capenable = ifp->if_capabilities; 1884 1885 if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0, 1886 sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1)) 1887 goto out; 1888 1889out: 1890 if (rsp != NULL) 1891 free(rsp, M_DEVBUF); 1892 1893 return; 1894} 1895