if_txp.c revision 153512
1/*	$OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $	*/
2
3/*-
4 * Copyright (c) 2001
5 *	Jason L. Wright <jason@thought.net>, Theo de Raadt, and
6 *	Aaron Campbell <aaron@monkey.org>.  All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 *    must display the following acknowledgement:
18 *	This product includes software developed by Jason L. Wright,
19 *	Theo de Raadt and Aaron Campbell.
20 * 4. Neither the name of the author nor the names of any co-contributors
21 *    may be used to endorse or promote products derived from this software
22 *    without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 * THE POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <sys/cdefs.h>
38__FBSDID("$FreeBSD: head/sys/dev/txp/if_txp.c 153512 2005-12-18 18:24:27Z glebius $");
39
40/*
41 * Driver for 3c990 (Typhoon) Ethernet ASIC
42 */
43
44#include <sys/cdefs.h>
45__FBSDID("$FreeBSD: head/sys/dev/txp/if_txp.c 153512 2005-12-18 18:24:27Z glebius $");
46
47#include <sys/param.h>
48#include <sys/systm.h>
49#include <sys/sockio.h>
50#include <sys/mbuf.h>
51#include <sys/malloc.h>
52#include <sys/kernel.h>
53#include <sys/module.h>
54#include <sys/socket.h>
55
56#include <net/if.h>
57#include <net/if_arp.h>
58#include <net/ethernet.h>
59#include <net/if_dl.h>
60#include <net/if_types.h>
61#include <net/if_vlan_var.h>
62
63#include <netinet/in.h>
64#include <netinet/in_systm.h>
65#include <netinet/in_var.h>
66#include <netinet/ip.h>
67#include <netinet/if_ether.h>
68#include <machine/in_cksum.h>
69
70#include <net/if_media.h>
71
72#include <net/bpf.h>
73
74#include <vm/vm.h>              /* for vtophys */
75#include <vm/pmap.h>            /* for vtophys */
76#include <machine/clock.h>	/* for DELAY */
77#include <machine/bus.h>
78#include <machine/resource.h>
79#include <sys/bus.h>
80#include <sys/rman.h>
81
82#include <dev/mii/mii.h>
83#include <dev/mii/miivar.h>
84#include <dev/pci/pcireg.h>
85#include <dev/pci/pcivar.h>
86
87#define TXP_USEIOSPACE
88#define __STRICT_ALIGNMENT
89
90#include <dev/txp/if_txpreg.h>
91#include <dev/txp/3c990img.h>
92
93#ifndef lint
94static const char rcsid[] =
95  "$FreeBSD: head/sys/dev/txp/if_txp.c 153512 2005-12-18 18:24:27Z glebius $";
96#endif
97
98/*
99 * Various supported device vendors/types and their names.
100 */
101static struct txp_type txp_devs[] = {
102	{ TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_95,
103	    "3Com 3cR990-TX-95 Etherlink with 3XP Processor" },
104	{ TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_97,
105	    "3Com 3cR990-TX-97 Etherlink with 3XP Processor" },
106	{ TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_TXM,
107	    "3Com 3cR990B-TXM Etherlink with 3XP Processor" },
108	{ TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_95,
109	    "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" },
110	{ TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_97,
111	    "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" },
112	{ TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_SRV,
113	    "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" },
114	{ 0, 0, NULL }
115};
116
117static int txp_probe(device_t);
118static int txp_attach(device_t);
119static int txp_detach(device_t);
120static void txp_intr(void *);
121static void txp_tick(void *);
122static int txp_shutdown(device_t);
123static int txp_ioctl(struct ifnet *, u_long, caddr_t);
124static void txp_start(struct ifnet *);
125static void txp_start_locked(struct ifnet *);
126static void txp_stop(struct txp_softc *);
127static void txp_init(void *);
128static void txp_init_locked(struct txp_softc *);
129static void txp_watchdog(struct ifnet *);
130
131static void txp_release_resources(struct txp_softc *);
132static int txp_chip_init(struct txp_softc *);
133static int txp_reset_adapter(struct txp_softc *);
134static int txp_download_fw(struct txp_softc *);
135static int txp_download_fw_wait(struct txp_softc *);
136static int txp_download_fw_section(struct txp_softc *,
137    struct txp_fw_section_header *, int);
138static int txp_alloc_rings(struct txp_softc *);
139static int txp_rxring_fill(struct txp_softc *);
140static void txp_rxring_empty(struct txp_softc *);
141static void txp_set_filter(struct txp_softc *);
142
143static int txp_cmd_desc_numfree(struct txp_softc *);
144static int txp_command(struct txp_softc *, u_int16_t, u_int16_t, u_int32_t,
145    u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int);
146static int txp_command2(struct txp_softc *, u_int16_t, u_int16_t,
147    u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t,
148    struct txp_rsp_desc **, int);
149static int txp_response(struct txp_softc *, u_int32_t, u_int16_t, u_int16_t,
150    struct txp_rsp_desc **);
151static void txp_rsp_fixup(struct txp_softc *, struct txp_rsp_desc *,
152    struct txp_rsp_desc *);
153static void txp_capabilities(struct txp_softc *);
154
155static void txp_ifmedia_sts(struct ifnet *, struct ifmediareq *);
156static int txp_ifmedia_upd(struct ifnet *);
157#ifdef TXP_DEBUG
158static void txp_show_descriptor(void *);
159#endif
160static void txp_tx_reclaim(struct txp_softc *, struct txp_tx_ring *);
161static void txp_rxbuf_reclaim(struct txp_softc *);
162static void txp_rx_reclaim(struct txp_softc *, struct txp_rx_ring *);
163
164#ifdef TXP_USEIOSPACE
165#define TXP_RES			SYS_RES_IOPORT
166#define TXP_RID			TXP_PCI_LOIO
167#else
168#define TXP_RES			SYS_RES_MEMORY
169#define TXP_RID			TXP_PCI_LOMEM
170#endif
171
172static device_method_t txp_methods[] = {
173        /* Device interface */
174	DEVMETHOD(device_probe,		txp_probe),
175	DEVMETHOD(device_attach,	txp_attach),
176	DEVMETHOD(device_detach,	txp_detach),
177	DEVMETHOD(device_shutdown,	txp_shutdown),
178	{ 0, 0 }
179};
180
181static driver_t txp_driver = {
182	"txp",
183	txp_methods,
184	sizeof(struct txp_softc)
185};
186
187static devclass_t txp_devclass;
188
189DRIVER_MODULE(txp, pci, txp_driver, txp_devclass, 0, 0);
190MODULE_DEPEND(txp, pci, 1, 1, 1);
191MODULE_DEPEND(txp, ether, 1, 1, 1);
192
193static int
194txp_probe(dev)
195	device_t dev;
196{
197	struct txp_type *t;
198
199	t = txp_devs;
200
201	while(t->txp_name != NULL) {
202		if ((pci_get_vendor(dev) == t->txp_vid) &&
203		    (pci_get_device(dev) == t->txp_did)) {
204			device_set_desc(dev, t->txp_name);
205			return(BUS_PROBE_DEFAULT);
206		}
207		t++;
208	}
209
210	return(ENXIO);
211}
212
213static int
214txp_attach(dev)
215	device_t dev;
216{
217	struct txp_softc *sc;
218	struct ifnet *ifp;
219	u_int16_t p1;
220	u_int32_t p2;
221	int error = 0, rid;
222	u_char eaddr[6];
223
224	sc = device_get_softc(dev);
225	sc->sc_dev = dev;
226	sc->sc_cold = 1;
227
228	mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
229	    MTX_DEF);
230	callout_init_mtx(&sc->sc_tick, &sc->sc_mtx, 0);
231
232	/*
233	 * Map control/status registers.
234	 */
235	pci_enable_busmaster(dev);
236
237	rid = TXP_RID;
238	sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid,
239	    RF_ACTIVE);
240
241	if (sc->sc_res == NULL) {
242		device_printf(dev, "couldn't map ports/memory\n");
243		error = ENXIO;
244		goto fail;
245	}
246
247	sc->sc_bt = rman_get_bustag(sc->sc_res);
248	sc->sc_bh = rman_get_bushandle(sc->sc_res);
249
250	/* Allocate interrupt */
251	rid = 0;
252	sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
253	    RF_SHAREABLE | RF_ACTIVE);
254
255	if (sc->sc_irq == NULL) {
256		device_printf(dev, "couldn't map interrupt\n");
257		error = ENXIO;
258		goto fail;
259	}
260
261	if (txp_chip_init(sc)) {
262		error = ENXIO;
263		goto fail;
264	}
265
266	sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF,
267	    M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
268	error = txp_download_fw(sc);
269	contigfree(sc->sc_fwbuf, 32768, M_DEVBUF);
270	sc->sc_fwbuf = NULL;
271
272	if (error)
273		goto fail;
274
275	sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF,
276	    M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
277	bzero(sc->sc_ldata, sizeof(struct txp_ldata));
278
279	if (txp_alloc_rings(sc)) {
280		error = ENXIO;
281		goto fail;
282	}
283
284	if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
285	    NULL, NULL, NULL, 1)) {
286		error = ENXIO;
287		goto fail;
288	}
289
290	if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0,
291	    &p1, &p2, NULL, 1)) {
292		error = ENXIO;
293		goto fail;
294	}
295
296	eaddr[0] = ((u_int8_t *)&p1)[1];
297	eaddr[1] = ((u_int8_t *)&p1)[0];
298	eaddr[2] = ((u_int8_t *)&p2)[3];
299	eaddr[3] = ((u_int8_t *)&p2)[2];
300	eaddr[4] = ((u_int8_t *)&p2)[1];
301	eaddr[5] = ((u_int8_t *)&p2)[0];
302
303	sc->sc_cold = 0;
304
305	ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts);
306	ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
307	ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
308	ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
309	ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL);
310	ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL);
311	ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL);
312	ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
313
314	sc->sc_xcvr = TXP_XCVR_AUTO;
315	txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0,
316	    NULL, NULL, NULL, 0);
317	ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO);
318
319	ifp = sc->sc_ifp = if_alloc(IFT_ETHER);
320	if (ifp == NULL) {
321		device_printf(dev, "can not if_alloc()\n");
322		error = ENOSPC;
323		goto fail;
324	}
325	ifp->if_softc = sc;
326	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
327	ifp->if_mtu = ETHERMTU;
328	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
329	ifp->if_ioctl = txp_ioctl;
330	ifp->if_start = txp_start;
331	ifp->if_watchdog = txp_watchdog;
332	ifp->if_init = txp_init;
333	ifp->if_baudrate = 100000000;
334	ifp->if_snd.ifq_maxlen = TX_ENTRIES;
335	ifp->if_hwassist = 0;
336	txp_capabilities(sc);
337
338	/*
339	 * Attach us everywhere
340	 */
341	ether_ifattach(ifp, eaddr);
342
343	error = bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET | INTR_MPSAFE,
344	    txp_intr, sc, &sc->sc_intrhand);
345
346	if (error) {
347		ether_ifdetach(ifp);
348		device_printf(dev, "couldn't set up irq\n");
349		goto fail;
350	}
351
352	return(0);
353
354fail:
355	txp_release_resources(sc);
356	mtx_destroy(&sc->sc_mtx);
357	return(error);
358}
359
360static int
361txp_detach(dev)
362	device_t dev;
363{
364	struct txp_softc *sc;
365	struct ifnet *ifp;
366	int i;
367
368	sc = device_get_softc(dev);
369	ifp = sc->sc_ifp;
370
371	TXP_LOCK(sc);
372	txp_stop(sc);
373	TXP_UNLOCK(sc);
374	txp_shutdown(dev);
375	callout_drain(&sc->sc_tick);
376
377	ifmedia_removeall(&sc->sc_ifmedia);
378	ether_ifdetach(ifp);
379
380	for (i = 0; i < RXBUF_ENTRIES; i++)
381		free(sc->sc_rxbufs[i].rb_sd, M_DEVBUF);
382
383	txp_release_resources(sc);
384
385	mtx_destroy(&sc->sc_mtx);
386	return(0);
387}
388
389static void
390txp_release_resources(sc)
391	struct txp_softc *sc;
392{
393	device_t dev;
394
395	dev = sc->sc_dev;
396
397	if (sc->sc_intrhand != NULL)
398		bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand);
399
400	if (sc->sc_irq != NULL)
401		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq);
402
403	if (sc->sc_res != NULL)
404		bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res);
405
406	if (sc->sc_ldata != NULL)
407		contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF);
408
409	if (sc->sc_ifp)
410		if_free(sc->sc_ifp);
411
412	return;
413}
414
415static int
416txp_chip_init(sc)
417	struct txp_softc *sc;
418{
419	/* disable interrupts */
420	WRITE_REG(sc, TXP_IER, 0);
421	WRITE_REG(sc, TXP_IMR,
422	    TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
423	    TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
424	    TXP_INT_LATCH);
425
426	/* ack all interrupts */
427	WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
428	    TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
429	    TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
430	    TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
431	    TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0);
432
433	if (txp_reset_adapter(sc))
434		return (-1);
435
436	/* disable interrupts */
437	WRITE_REG(sc, TXP_IER, 0);
438	WRITE_REG(sc, TXP_IMR,
439	    TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
440	    TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
441	    TXP_INT_LATCH);
442
443	/* ack all interrupts */
444	WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
445	    TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
446	    TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
447	    TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
448	    TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0);
449
450	return (0);
451}
452
453static int
454txp_reset_adapter(sc)
455	struct txp_softc *sc;
456{
457	u_int32_t r;
458	int i;
459
460	r = 0;
461	WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL);
462	DELAY(1000);
463	WRITE_REG(sc, TXP_SRR, 0);
464
465	/* Should wait max 6 seconds */
466	for (i = 0; i < 6000; i++) {
467		r = READ_REG(sc, TXP_A2H_0);
468		if (r == STAT_WAITING_FOR_HOST_REQUEST)
469			break;
470		DELAY(1000);
471	}
472
473	if (r != STAT_WAITING_FOR_HOST_REQUEST) {
474		device_printf(sc->sc_dev, "reset hung\n");
475		return (-1);
476	}
477
478	return (0);
479}
480
481static int
482txp_download_fw(sc)
483	struct txp_softc *sc;
484{
485	struct txp_fw_file_header *fileheader;
486	struct txp_fw_section_header *secthead;
487	int sect;
488	u_int32_t r, i, ier, imr;
489
490	r = 0;
491	ier = READ_REG(sc, TXP_IER);
492	WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0);
493
494	imr = READ_REG(sc, TXP_IMR);
495	WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0);
496
497	for (i = 0; i < 10000; i++) {
498		r = READ_REG(sc, TXP_A2H_0);
499		if (r == STAT_WAITING_FOR_HOST_REQUEST)
500			break;
501		DELAY(50);
502	}
503	if (r != STAT_WAITING_FOR_HOST_REQUEST) {
504		device_printf(sc->sc_dev, "not waiting for host request\n");
505		return (-1);
506	}
507
508	/* Ack the status */
509	WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
510
511	fileheader = (struct txp_fw_file_header *)tc990image;
512	if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) {
513		device_printf(sc->sc_dev, "fw invalid magic\n");
514		return (-1);
515	}
516
517	/* Tell boot firmware to get ready for image */
518	WRITE_REG(sc, TXP_H2A_1, fileheader->addr);
519	WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE);
520
521	if (txp_download_fw_wait(sc)) {
522		device_printf(sc->sc_dev, "fw wait failed, initial\n");
523		return (-1);
524	}
525
526	secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) +
527	    sizeof(struct txp_fw_file_header));
528
529	for (sect = 0; sect < fileheader->nsections; sect++) {
530		if (txp_download_fw_section(sc, secthead, sect))
531			return (-1);
532		secthead = (struct txp_fw_section_header *)
533		    (((u_int8_t *)secthead) + secthead->nbytes +
534		    sizeof(*secthead));
535	}
536
537	WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE);
538
539	for (i = 0; i < 10000; i++) {
540		r = READ_REG(sc, TXP_A2H_0);
541		if (r == STAT_WAITING_FOR_BOOT)
542			break;
543		DELAY(50);
544	}
545	if (r != STAT_WAITING_FOR_BOOT) {
546		device_printf(sc->sc_dev, "not waiting for boot\n");
547		return (-1);
548	}
549
550	WRITE_REG(sc, TXP_IER, ier);
551	WRITE_REG(sc, TXP_IMR, imr);
552
553	return (0);
554}
555
556static int
557txp_download_fw_wait(sc)
558	struct txp_softc *sc;
559{
560	u_int32_t i, r;
561
562	r = 0;
563	for (i = 0; i < 10000; i++) {
564		r = READ_REG(sc, TXP_ISR);
565		if (r & TXP_INT_A2H_0)
566			break;
567		DELAY(50);
568	}
569
570	if (!(r & TXP_INT_A2H_0)) {
571		device_printf(sc->sc_dev, "fw wait failed comm0\n");
572		return (-1);
573	}
574
575	WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
576
577	r = READ_REG(sc, TXP_A2H_0);
578	if (r != STAT_WAITING_FOR_SEGMENT) {
579		device_printf(sc->sc_dev, "fw not waiting for segment\n");
580		return (-1);
581	}
582	return (0);
583}
584
585static int
586txp_download_fw_section(sc, sect, sectnum)
587	struct txp_softc *sc;
588	struct txp_fw_section_header *sect;
589	int sectnum;
590{
591	vm_offset_t dma;
592	int rseg, err = 0;
593	struct mbuf m;
594	u_int16_t csum;
595
596	/* Skip zero length sections */
597	if (sect->nbytes == 0)
598		return (0);
599
600	/* Make sure we aren't past the end of the image */
601	rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image);
602	if (rseg >= sizeof(tc990image)) {
603		device_printf(sc->sc_dev, "fw invalid section address, "
604		    "section %d\n", sectnum);
605		return (-1);
606	}
607
608	/* Make sure this section doesn't go past the end */
609	rseg += sect->nbytes;
610	if (rseg >= sizeof(tc990image)) {
611		device_printf(sc->sc_dev, "fw truncated section %d\n",
612		    sectnum);
613		return (-1);
614	}
615
616	bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes);
617	dma = vtophys(sc->sc_fwbuf);
618
619	/*
620	 * dummy up mbuf and verify section checksum
621	 */
622	m.m_type = MT_DATA;
623	m.m_next = m.m_nextpkt = NULL;
624	m.m_len = sect->nbytes;
625	m.m_data = sc->sc_fwbuf;
626	m.m_flags = 0;
627	csum = in_cksum(&m, sect->nbytes);
628	if (csum != sect->cksum) {
629		device_printf(sc->sc_dev, "fw section %d, bad "
630		    "cksum (expected 0x%x got 0x%x)\n",
631		    sectnum, sect->cksum, csum);
632		err = -1;
633		goto bail;
634	}
635
636	WRITE_REG(sc, TXP_H2A_1, sect->nbytes);
637	WRITE_REG(sc, TXP_H2A_2, sect->cksum);
638	WRITE_REG(sc, TXP_H2A_3, sect->addr);
639	WRITE_REG(sc, TXP_H2A_4, 0);
640	WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff);
641	WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE);
642
643	if (txp_download_fw_wait(sc)) {
644		device_printf(sc->sc_dev, "fw wait failed, "
645		    "section %d\n", sectnum);
646		err = -1;
647	}
648
649bail:
650	return (err);
651}
652
653static void
654txp_intr(vsc)
655	void *vsc;
656{
657	struct txp_softc *sc = vsc;
658	struct txp_hostvar *hv = sc->sc_hostvar;
659	u_int32_t isr;
660
661	/* mask all interrupts */
662	TXP_LOCK(sc);
663	WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF |
664	    TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
665	    TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 |
666	    TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
667	    TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |  TXP_INT_LATCH);
668
669	isr = READ_REG(sc, TXP_ISR);
670	while (isr) {
671		WRITE_REG(sc, TXP_ISR, isr);
672
673		if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff))
674			txp_rx_reclaim(sc, &sc->sc_rxhir);
675		if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff))
676			txp_rx_reclaim(sc, &sc->sc_rxlor);
677
678		if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx)
679			txp_rxbuf_reclaim(sc);
680
681		if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons !=
682		    TXP_OFFSET2IDX(*(sc->sc_txhir.r_off))))
683			txp_tx_reclaim(sc, &sc->sc_txhir);
684
685		if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons !=
686		    TXP_OFFSET2IDX(*(sc->sc_txlor.r_off))))
687			txp_tx_reclaim(sc, &sc->sc_txlor);
688
689		isr = READ_REG(sc, TXP_ISR);
690	}
691
692	/* unmask all interrupts */
693	WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
694
695	txp_start_locked(sc->sc_ifp);
696	TXP_UNLOCK(sc);
697
698	return;
699}
700
701static void
702txp_rx_reclaim(sc, r)
703	struct txp_softc *sc;
704	struct txp_rx_ring *r;
705{
706	struct ifnet *ifp = sc->sc_ifp;
707	struct txp_rx_desc *rxd;
708	struct mbuf *m;
709	struct txp_swdesc *sd = NULL;
710	u_int32_t roff, woff;
711
712	TXP_LOCK_ASSERT(sc);
713	roff = *r->r_roff;
714	woff = *r->r_woff;
715	rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc));
716
717	while (roff != woff) {
718
719		if (rxd->rx_flags & RX_FLAGS_ERROR) {
720			device_printf(sc->sc_dev, "error 0x%x\n",
721			    rxd->rx_stat);
722			ifp->if_ierrors++;
723			goto next;
724		}
725
726		/* retrieve stashed pointer */
727		sd = rxd->rx_sd;
728
729		m = sd->sd_mbuf;
730		sd->sd_mbuf = NULL;
731
732		m->m_pkthdr.len = m->m_len = rxd->rx_len;
733
734#ifdef __STRICT_ALIGNMENT
735		{
736			/*
737			 * XXX Nice chip, except it won't accept "off by 2"
738			 * buffers, so we're force to copy.  Supposedly
739			 * this will be fixed in a newer firmware rev
740			 * and this will be temporary.
741			 */
742			struct mbuf *mnew;
743
744			mnew = m_devget(mtod(m, caddr_t), rxd->rx_len,
745			    ETHER_ALIGN, ifp, NULL);
746			m_freem(m);
747			if (mnew == NULL) {
748				ifp->if_ierrors++;
749				goto next;
750			}
751			m = mnew;
752		}
753#endif
754
755		if (rxd->rx_stat & RX_STAT_IPCKSUMBAD)
756			m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
757		else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD)
758		 	m->m_pkthdr.csum_flags |=
759			    CSUM_IP_CHECKED|CSUM_IP_VALID;
760
761		if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) ||
762		    (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) {
763			m->m_pkthdr.csum_flags |=
764			    CSUM_DATA_VALID|CSUM_PSEUDO_HDR;
765			m->m_pkthdr.csum_data = 0xffff;
766		}
767
768		if (rxd->rx_stat & RX_STAT_VLAN) {
769			VLAN_INPUT_TAG(ifp, m, htons(rxd->rx_vlan >> 16));
770			if (m == NULL)
771				goto next;
772		}
773
774		TXP_UNLOCK(sc);
775		(*ifp->if_input)(ifp, m);
776		TXP_LOCK(sc);
777
778next:
779
780		roff += sizeof(struct txp_rx_desc);
781		if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) {
782			roff = 0;
783			rxd = r->r_desc;
784		} else
785			rxd++;
786		woff = *r->r_woff;
787	}
788
789	*r->r_roff = woff;
790
791	return;
792}
793
794static void
795txp_rxbuf_reclaim(sc)
796	struct txp_softc *sc;
797{
798	struct ifnet *ifp = sc->sc_ifp;
799	struct txp_hostvar *hv = sc->sc_hostvar;
800	struct txp_rxbuf_desc *rbd;
801	struct txp_swdesc *sd;
802	u_int32_t i;
803
804	TXP_LOCK_ASSERT(sc);
805	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
806		return;
807
808	i = sc->sc_rxbufprod;
809	rbd = sc->sc_rxbufs + i;
810
811	while (1) {
812		sd = rbd->rb_sd;
813		if (sd->sd_mbuf != NULL)
814			break;
815
816		sd->sd_mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
817		if (sd->sd_mbuf == NULL)
818			return;
819		sd->sd_mbuf->m_pkthdr.rcvif = ifp;
820		sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES;
821
822		rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t))
823		    & 0xffffffff;
824		rbd->rb_paddrhi = 0;
825
826		hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i);
827
828		if (++i == RXBUF_ENTRIES) {
829			i = 0;
830			rbd = sc->sc_rxbufs;
831		} else
832			rbd++;
833	}
834
835	sc->sc_rxbufprod = i;
836
837	return;
838}
839
840/*
841 * Reclaim mbufs and entries from a transmit ring.
842 */
843static void
844txp_tx_reclaim(sc, r)
845	struct txp_softc *sc;
846	struct txp_tx_ring *r;
847{
848	struct ifnet *ifp = sc->sc_ifp;
849	u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off));
850	u_int32_t cons = r->r_cons, cnt = r->r_cnt;
851	struct txp_tx_desc *txd = r->r_desc + cons;
852	struct txp_swdesc *sd = sc->sc_txd + cons;
853	struct mbuf *m;
854
855	TXP_LOCK_ASSERT(sc);
856	while (cons != idx) {
857		if (cnt == 0)
858			break;
859
860		if ((txd->tx_flags & TX_FLAGS_TYPE_M) ==
861		    TX_FLAGS_TYPE_DATA) {
862			m = sd->sd_mbuf;
863			if (m != NULL) {
864				m_freem(m);
865				txd->tx_addrlo = 0;
866				txd->tx_addrhi = 0;
867				ifp->if_opackets++;
868			}
869		}
870		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
871
872		if (++cons == TX_ENTRIES) {
873			txd = r->r_desc;
874			cons = 0;
875			sd = sc->sc_txd;
876		} else {
877			txd++;
878			sd++;
879		}
880
881		cnt--;
882	}
883
884	r->r_cons = cons;
885	r->r_cnt = cnt;
886	if (cnt == 0)
887		ifp->if_timer = 0;
888}
889
890static int
891txp_shutdown(dev)
892	device_t dev;
893{
894	struct txp_softc *sc;
895
896	sc = device_get_softc(dev);
897
898	TXP_LOCK(sc);
899
900	/* mask all interrupts */
901	WRITE_REG(sc, TXP_IMR,
902	    TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |
903	    TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
904	    TXP_INT_LATCH);
905
906	txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
907	txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
908	txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0);
909	TXP_UNLOCK(sc);
910
911	return(0);
912}
913
914static int
915txp_alloc_rings(sc)
916	struct txp_softc *sc;
917{
918	struct txp_boot_record *boot;
919	struct txp_ldata *ld;
920	u_int32_t r;
921	int i;
922
923	r = 0;
924	ld = sc->sc_ldata;
925	boot = &ld->txp_boot;
926
927	/* boot record */
928	sc->sc_boot = boot;
929
930	/* host variables */
931	bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar));
932	boot->br_hostvar_lo = vtophys(&ld->txp_hostvar);
933	boot->br_hostvar_hi = 0;
934	sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar;
935
936	/* hi priority tx ring */
937	boot->br_txhipri_lo = vtophys(&ld->txp_txhiring);;
938	boot->br_txhipri_hi = 0;
939	boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc);
940	sc->sc_txhir.r_reg = TXP_H2A_1;
941	sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring;
942	sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0;
943	sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx;
944
945	/* lo priority tx ring */
946	boot->br_txlopri_lo = vtophys(&ld->txp_txloring);
947	boot->br_txlopri_hi = 0;
948	boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc);
949	sc->sc_txlor.r_reg = TXP_H2A_3;
950	sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring;
951	sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0;
952	sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx;
953
954	/* high priority rx ring */
955	boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring);
956	boot->br_rxhipri_hi = 0;
957	boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc);
958	sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring;
959	sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx;
960	sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx;
961
962	/* low priority rx ring */
963	boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring);
964	boot->br_rxlopri_hi = 0;
965	boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc);
966	sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring;
967	sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx;
968	sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx;
969
970	/* command ring */
971	bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES);
972	boot->br_cmd_lo = vtophys(&ld->txp_cmdring);
973	boot->br_cmd_hi = 0;
974	boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
975	sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring;
976	sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
977	sc->sc_cmdring.lastwrite = 0;
978
979	/* response ring */
980	bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES);
981	boot->br_resp_lo = vtophys(&ld->txp_rspring);
982	boot->br_resp_hi = 0;
983	boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc);
984	sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring;
985	sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc);
986	sc->sc_rspring.lastwrite = 0;
987
988	/* receive buffer ring */
989	boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs);
990	boot->br_rxbuf_hi = 0;
991	boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc);
992	sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs;
993
994	for (i = 0; i < RXBUF_ENTRIES; i++) {
995		struct txp_swdesc *sd;
996		if (sc->sc_rxbufs[i].rb_sd != NULL)
997			continue;
998		sc->sc_rxbufs[i].rb_sd = malloc(sizeof(struct txp_swdesc),
999		    M_DEVBUF, M_NOWAIT);
1000		if (sc->sc_rxbufs[i].rb_sd == NULL)
1001			return(ENOBUFS);
1002		sd = sc->sc_rxbufs[i].rb_sd;
1003		sd->sd_mbuf = NULL;
1004	}
1005	sc->sc_rxbufprod = 0;
1006
1007	/* zero dma */
1008	bzero(&ld->txp_zero, sizeof(u_int32_t));
1009	boot->br_zero_lo = vtophys(&ld->txp_zero);
1010	boot->br_zero_hi = 0;
1011
1012	/* See if it's waiting for boot, and try to boot it */
1013	for (i = 0; i < 10000; i++) {
1014		r = READ_REG(sc, TXP_A2H_0);
1015		if (r == STAT_WAITING_FOR_BOOT)
1016			break;
1017		DELAY(50);
1018	}
1019
1020	if (r != STAT_WAITING_FOR_BOOT) {
1021		device_printf(sc->sc_dev, "not waiting for boot\n");
1022		return(ENXIO);
1023	}
1024
1025	WRITE_REG(sc, TXP_H2A_2, 0);
1026	WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot));
1027	WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD);
1028
1029	/* See if it booted */
1030	for (i = 0; i < 10000; i++) {
1031		r = READ_REG(sc, TXP_A2H_0);
1032		if (r == STAT_RUNNING)
1033			break;
1034		DELAY(50);
1035	}
1036	if (r != STAT_RUNNING) {
1037		device_printf(sc->sc_dev, "fw not running\n");
1038		return(ENXIO);
1039	}
1040
1041	/* Clear TX and CMD ring write registers */
1042	WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL);
1043	WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL);
1044	WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL);
1045	WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL);
1046
1047	return (0);
1048}
1049
1050static int
1051txp_ioctl(ifp, command, data)
1052	struct ifnet *ifp;
1053	u_long command;
1054	caddr_t data;
1055{
1056	struct txp_softc *sc = ifp->if_softc;
1057	struct ifreq *ifr = (struct ifreq *)data;
1058	int error = 0;
1059
1060	switch(command) {
1061	case SIOCSIFFLAGS:
1062		TXP_LOCK(sc);
1063		if (ifp->if_flags & IFF_UP) {
1064			txp_init_locked(sc);
1065		} else {
1066			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1067				txp_stop(sc);
1068		}
1069		TXP_UNLOCK(sc);
1070		break;
1071	case SIOCADDMULTI:
1072	case SIOCDELMULTI:
1073		/*
1074		 * Multicast list has changed; set the hardware
1075		 * filter accordingly.
1076		 */
1077		TXP_LOCK(sc);
1078		txp_set_filter(sc);
1079		TXP_UNLOCK(sc);
1080		error = 0;
1081		break;
1082	case SIOCGIFMEDIA:
1083	case SIOCSIFMEDIA:
1084		error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command);
1085		break;
1086	default:
1087		error = ether_ioctl(ifp, command, data);
1088		break;
1089	}
1090
1091	return(error);
1092}
1093
1094static int
1095txp_rxring_fill(sc)
1096	struct txp_softc *sc;
1097{
1098	int i;
1099	struct ifnet *ifp;
1100	struct txp_swdesc *sd;
1101
1102	TXP_LOCK_ASSERT(sc);
1103	ifp = sc->sc_ifp;
1104
1105	for (i = 0; i < RXBUF_ENTRIES; i++) {
1106		sd = sc->sc_rxbufs[i].rb_sd;
1107		sd->sd_mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1108		if (sd->sd_mbuf == NULL)
1109			return(ENOBUFS);
1110
1111		sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES;
1112		sd->sd_mbuf->m_pkthdr.rcvif = ifp;
1113
1114		sc->sc_rxbufs[i].rb_paddrlo =
1115		    vtophys(mtod(sd->sd_mbuf, vm_offset_t));
1116		sc->sc_rxbufs[i].rb_paddrhi = 0;
1117	}
1118
1119	sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) *
1120	    sizeof(struct txp_rxbuf_desc);
1121
1122	return(0);
1123}
1124
1125static void
1126txp_rxring_empty(sc)
1127	struct txp_softc *sc;
1128{
1129	int i;
1130	struct txp_swdesc *sd;
1131
1132	TXP_LOCK_ASSERT(sc);
1133	if (sc->sc_rxbufs == NULL)
1134		return;
1135
1136	for (i = 0; i < RXBUF_ENTRIES; i++) {
1137		if (&sc->sc_rxbufs[i] == NULL)
1138			continue;
1139		sd = sc->sc_rxbufs[i].rb_sd;
1140		if (sd == NULL)
1141			continue;
1142		if (sd->sd_mbuf != NULL) {
1143			m_freem(sd->sd_mbuf);
1144			sd->sd_mbuf = NULL;
1145		}
1146	}
1147
1148	return;
1149}
1150
1151static void
1152txp_init(xsc)
1153	void *xsc;
1154{
1155	struct txp_softc *sc;
1156
1157	sc = xsc;
1158	TXP_LOCK(sc);
1159	txp_init_locked(sc);
1160	TXP_UNLOCK(sc);
1161}
1162
1163static void
1164txp_init_locked(sc)
1165	struct txp_softc *sc;
1166{
1167	struct ifnet *ifp;
1168	u_int16_t p1;
1169	u_int32_t p2;
1170
1171	TXP_LOCK_ASSERT(sc);
1172	ifp = sc->sc_ifp;
1173
1174	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1175		return;
1176
1177	txp_stop(sc);
1178
1179	txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
1180	    NULL, NULL, NULL, 1);
1181
1182	/* Set station address. */
1183	((u_int8_t *)&p1)[1] = IF_LLADDR(sc->sc_ifp)[0];
1184	((u_int8_t *)&p1)[0] = IF_LLADDR(sc->sc_ifp)[1];
1185	((u_int8_t *)&p2)[3] = IF_LLADDR(sc->sc_ifp)[2];
1186	((u_int8_t *)&p2)[2] = IF_LLADDR(sc->sc_ifp)[3];
1187	((u_int8_t *)&p2)[1] = IF_LLADDR(sc->sc_ifp)[4];
1188	((u_int8_t *)&p2)[0] = IF_LLADDR(sc->sc_ifp)[5];
1189	txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0,
1190	    NULL, NULL, NULL, 1);
1191
1192	txp_set_filter(sc);
1193
1194	txp_rxring_fill(sc);
1195
1196	txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1197	txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1198
1199	WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF |
1200	    TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 |
1201	    TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 |
1202	    TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 |
1203	    TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT |  TXP_INT_LATCH);
1204	WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
1205
1206	ifp->if_drv_flags |= IFF_DRV_RUNNING;
1207	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1208	ifp->if_timer = 0;
1209
1210	callout_reset(&sc->sc_tick, hz, txp_tick, sc);
1211}
1212
1213static void
1214txp_tick(vsc)
1215	void *vsc;
1216{
1217	struct txp_softc *sc = vsc;
1218	struct ifnet *ifp = sc->sc_ifp;
1219	struct txp_rsp_desc *rsp = NULL;
1220	struct txp_ext_desc *ext;
1221
1222	TXP_LOCK_ASSERT(sc);
1223	txp_rxbuf_reclaim(sc);
1224
1225	if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0,
1226	    &rsp, 1))
1227		goto out;
1228	if (rsp->rsp_numdesc != 6)
1229		goto out;
1230	if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0,
1231	    NULL, NULL, NULL, 1))
1232		goto out;
1233	ext = (struct txp_ext_desc *)(rsp + 1);
1234
1235	ifp->if_ierrors += ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 +
1236	    ext[4].ext_1 + ext[4].ext_4;
1237	ifp->if_oerrors += ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 +
1238	    ext[2].ext_1;
1239	ifp->if_collisions += ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 +
1240	    ext[1].ext_3;
1241	ifp->if_opackets += rsp->rsp_par2;
1242	ifp->if_ipackets += ext[2].ext_3;
1243
1244out:
1245	if (rsp != NULL)
1246		free(rsp, M_DEVBUF);
1247
1248	callout_reset(&sc->sc_tick, hz, txp_tick, sc);
1249
1250	return;
1251}
1252
1253static void
1254txp_start(ifp)
1255	struct ifnet *ifp;
1256{
1257	struct txp_softc *sc;
1258
1259	sc = ifp->if_softc;
1260	TXP_LOCK(sc);
1261	txp_start_locked(ifp);
1262	TXP_UNLOCK(sc);
1263}
1264
1265static void
1266txp_start_locked(ifp)
1267	struct ifnet *ifp;
1268{
1269	struct txp_softc *sc = ifp->if_softc;
1270	struct txp_tx_ring *r = &sc->sc_txhir;
1271	struct txp_tx_desc *txd;
1272	struct txp_frag_desc *fxd;
1273	struct mbuf *m, *m0;
1274	struct txp_swdesc *sd;
1275	u_int32_t firstprod, firstcnt, prod, cnt;
1276	struct m_tag *mtag;
1277
1278	TXP_LOCK_ASSERT(sc);
1279	if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
1280	   IFF_DRV_RUNNING)
1281		return;
1282
1283	prod = r->r_prod;
1284	cnt = r->r_cnt;
1285
1286	while (1) {
1287		IF_DEQUEUE(&ifp->if_snd, m);
1288		if (m == NULL)
1289			break;
1290
1291		firstprod = prod;
1292		firstcnt = cnt;
1293
1294		sd = sc->sc_txd + prod;
1295		sd->sd_mbuf = m;
1296
1297		if ((TX_ENTRIES - cnt) < 4)
1298			goto oactive;
1299
1300		txd = r->r_desc + prod;
1301
1302		txd->tx_flags = TX_FLAGS_TYPE_DATA;
1303		txd->tx_numdesc = 0;
1304		txd->tx_addrlo = 0;
1305		txd->tx_addrhi = 0;
1306		txd->tx_totlen = 0;
1307		txd->tx_pflags = 0;
1308
1309		if (++prod == TX_ENTRIES)
1310			prod = 0;
1311
1312		if (++cnt >= (TX_ENTRIES - 4))
1313			goto oactive;
1314
1315		mtag = VLAN_OUTPUT_TAG(ifp, m);
1316		if (mtag != NULL) {
1317			txd->tx_pflags = TX_PFLAGS_VLAN |
1318			    (htons(VLAN_TAG_VALUE(mtag)) << TX_PFLAGS_VLANTAG_S);
1319		}
1320
1321		if (m->m_pkthdr.csum_flags & CSUM_IP)
1322			txd->tx_pflags |= TX_PFLAGS_IPCKSUM;
1323
1324#if 0
1325		if (m->m_pkthdr.csum_flags & CSUM_TCP)
1326			txd->tx_pflags |= TX_PFLAGS_TCPCKSUM;
1327		if (m->m_pkthdr.csum_flags & CSUM_UDP)
1328			txd->tx_pflags |= TX_PFLAGS_UDPCKSUM;
1329#endif
1330
1331		fxd = (struct txp_frag_desc *)(r->r_desc + prod);
1332		for (m0 = m; m0 != NULL; m0 = m0->m_next) {
1333			if (m0->m_len == 0)
1334				continue;
1335			if (++cnt >= (TX_ENTRIES - 4))
1336				goto oactive;
1337
1338			txd->tx_numdesc++;
1339
1340			fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG;
1341			fxd->frag_rsvd1 = 0;
1342			fxd->frag_len = m0->m_len;
1343			fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t));
1344			fxd->frag_addrhi = 0;
1345			fxd->frag_rsvd2 = 0;
1346
1347			if (++prod == TX_ENTRIES) {
1348				fxd = (struct txp_frag_desc *)r->r_desc;
1349				prod = 0;
1350			} else
1351				fxd++;
1352
1353		}
1354
1355		ifp->if_timer = 5;
1356
1357		BPF_MTAP(ifp, m);
1358		WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod));
1359	}
1360
1361	r->r_prod = prod;
1362	r->r_cnt = cnt;
1363	return;
1364
1365oactive:
1366	ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1367	r->r_prod = firstprod;
1368	r->r_cnt = firstcnt;
1369	IF_PREPEND(&ifp->if_snd, m);
1370	return;
1371}
1372
1373/*
1374 * Handle simple commands sent to the typhoon
1375 */
1376static int
1377txp_command(sc, id, in1, in2, in3, out1, out2, out3, wait)
1378	struct txp_softc *sc;
1379	u_int16_t id, in1, *out1;
1380	u_int32_t in2, in3, *out2, *out3;
1381	int wait;
1382{
1383	struct txp_rsp_desc *rsp = NULL;
1384
1385	if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait))
1386		return (-1);
1387
1388	if (!wait)
1389		return (0);
1390
1391	if (out1 != NULL)
1392		*out1 = rsp->rsp_par1;
1393	if (out2 != NULL)
1394		*out2 = rsp->rsp_par2;
1395	if (out3 != NULL)
1396		*out3 = rsp->rsp_par3;
1397	free(rsp, M_DEVBUF);
1398	return (0);
1399}
1400
1401static int
1402txp_command2(sc, id, in1, in2, in3, in_extp, in_extn, rspp, wait)
1403	struct txp_softc *sc;
1404	u_int16_t id, in1;
1405	u_int32_t in2, in3;
1406	struct txp_ext_desc *in_extp;
1407	u_int8_t in_extn;
1408	struct txp_rsp_desc **rspp;
1409	int wait;
1410{
1411	struct txp_hostvar *hv = sc->sc_hostvar;
1412	struct txp_cmd_desc *cmd;
1413	struct txp_ext_desc *ext;
1414	u_int32_t idx, i;
1415	u_int16_t seq;
1416
1417	if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) {
1418		device_printf(sc->sc_dev, "no free cmd descriptors\n");
1419		return (-1);
1420	}
1421
1422	idx = sc->sc_cmdring.lastwrite;
1423	cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
1424	bzero(cmd, sizeof(*cmd));
1425
1426	cmd->cmd_numdesc = in_extn;
1427	cmd->cmd_seq = seq = sc->sc_seq++;
1428	cmd->cmd_id = id;
1429	cmd->cmd_par1 = in1;
1430	cmd->cmd_par2 = in2;
1431	cmd->cmd_par3 = in3;
1432	cmd->cmd_flags = CMD_FLAGS_TYPE_CMD |
1433	    (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID;
1434
1435	idx += sizeof(struct txp_cmd_desc);
1436	if (idx == sc->sc_cmdring.size)
1437		idx = 0;
1438
1439	for (i = 0; i < in_extn; i++) {
1440		ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
1441		bcopy(in_extp, ext, sizeof(struct txp_ext_desc));
1442		in_extp++;
1443		idx += sizeof(struct txp_cmd_desc);
1444		if (idx == sc->sc_cmdring.size)
1445			idx = 0;
1446	}
1447
1448	sc->sc_cmdring.lastwrite = idx;
1449
1450	WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite);
1451
1452	if (!wait)
1453		return (0);
1454
1455	for (i = 0; i < 10000; i++) {
1456		idx = hv->hv_resp_read_idx;
1457		if (idx != hv->hv_resp_write_idx) {
1458			*rspp = NULL;
1459			if (txp_response(sc, idx, id, seq, rspp))
1460				return (-1);
1461			if (*rspp != NULL)
1462				break;
1463		}
1464		DELAY(50);
1465	}
1466	if (i == 1000 || (*rspp) == NULL) {
1467		device_printf(sc->sc_dev, "0x%x command failed\n", id);
1468		return (-1);
1469	}
1470
1471	return (0);
1472}
1473
1474static int
1475txp_response(sc, ridx, id, seq, rspp)
1476	struct txp_softc *sc;
1477	u_int32_t ridx;
1478	u_int16_t id;
1479	u_int16_t seq;
1480	struct txp_rsp_desc **rspp;
1481{
1482	struct txp_hostvar *hv = sc->sc_hostvar;
1483	struct txp_rsp_desc *rsp;
1484
1485	while (ridx != hv->hv_resp_write_idx) {
1486		rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx);
1487
1488		if (id == rsp->rsp_id && rsp->rsp_seq == seq) {
1489			*rspp = (struct txp_rsp_desc *)malloc(
1490			    sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1),
1491			    M_DEVBUF, M_NOWAIT);
1492			if ((*rspp) == NULL)
1493				return (-1);
1494			txp_rsp_fixup(sc, rsp, *rspp);
1495			return (0);
1496		}
1497
1498		if (rsp->rsp_flags & RSP_FLAGS_ERROR) {
1499			device_printf(sc->sc_dev, "response error!\n");
1500			txp_rsp_fixup(sc, rsp, NULL);
1501			ridx = hv->hv_resp_read_idx;
1502			continue;
1503		}
1504
1505		switch (rsp->rsp_id) {
1506		case TXP_CMD_CYCLE_STATISTICS:
1507		case TXP_CMD_MEDIA_STATUS_READ:
1508			break;
1509		case TXP_CMD_HELLO_RESPONSE:
1510			device_printf(sc->sc_dev, "hello\n");
1511			break;
1512		default:
1513			device_printf(sc->sc_dev, "unknown id(0x%x)\n",
1514			    rsp->rsp_id);
1515		}
1516
1517		txp_rsp_fixup(sc, rsp, NULL);
1518		ridx = hv->hv_resp_read_idx;
1519		hv->hv_resp_read_idx = ridx;
1520	}
1521
1522	return (0);
1523}
1524
1525static void
1526txp_rsp_fixup(sc, rsp, dst)
1527	struct txp_softc *sc;
1528	struct txp_rsp_desc *rsp, *dst;
1529{
1530	struct txp_rsp_desc *src = rsp;
1531	struct txp_hostvar *hv = sc->sc_hostvar;
1532	u_int32_t i, ridx;
1533
1534	ridx = hv->hv_resp_read_idx;
1535
1536	for (i = 0; i < rsp->rsp_numdesc + 1; i++) {
1537		if (dst != NULL)
1538			bcopy(src, dst++, sizeof(struct txp_rsp_desc));
1539		ridx += sizeof(struct txp_rsp_desc);
1540		if (ridx == sc->sc_rspring.size) {
1541			src = sc->sc_rspring.base;
1542			ridx = 0;
1543		} else
1544			src++;
1545		sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx;
1546	}
1547
1548	hv->hv_resp_read_idx = ridx;
1549}
1550
1551static int
1552txp_cmd_desc_numfree(sc)
1553	struct txp_softc *sc;
1554{
1555	struct txp_hostvar *hv = sc->sc_hostvar;
1556	struct txp_boot_record *br = sc->sc_boot;
1557	u_int32_t widx, ridx, nfree;
1558
1559	widx = sc->sc_cmdring.lastwrite;
1560	ridx = hv->hv_cmd_read_idx;
1561
1562	if (widx == ridx) {
1563		/* Ring is completely free */
1564		nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc);
1565	} else {
1566		if (widx > ridx)
1567			nfree = br->br_cmd_siz -
1568			    (widx - ridx + sizeof(struct txp_cmd_desc));
1569		else
1570			nfree = ridx - widx - sizeof(struct txp_cmd_desc);
1571	}
1572
1573	return (nfree / sizeof(struct txp_cmd_desc));
1574}
1575
1576static void
1577txp_stop(sc)
1578	struct txp_softc *sc;
1579{
1580	struct ifnet *ifp;
1581
1582	TXP_LOCK_ASSERT(sc);
1583	ifp = sc->sc_ifp;
1584
1585	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1586
1587	callout_stop(&sc->sc_tick);
1588
1589	txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1590	txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
1591
1592	txp_rxring_empty(sc);
1593
1594	return;
1595}
1596
1597static void
1598txp_watchdog(ifp)
1599	struct ifnet *ifp;
1600{
1601	return;
1602}
1603
1604static int
1605txp_ifmedia_upd(ifp)
1606	struct ifnet *ifp;
1607{
1608	struct txp_softc *sc = ifp->if_softc;
1609	struct ifmedia *ifm = &sc->sc_ifmedia;
1610	u_int16_t new_xcvr;
1611
1612	TXP_LOCK(sc);
1613	if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) {
1614		TXP_UNLOCK(sc);
1615		return (EINVAL);
1616	}
1617
1618	if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) {
1619		if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1620			new_xcvr = TXP_XCVR_10_FDX;
1621		else
1622			new_xcvr = TXP_XCVR_10_HDX;
1623	} else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) {
1624		if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1625			new_xcvr = TXP_XCVR_100_FDX;
1626		else
1627			new_xcvr = TXP_XCVR_100_HDX;
1628	} else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) {
1629		new_xcvr = TXP_XCVR_AUTO;
1630	} else {
1631		TXP_UNLOCK(sc);
1632		return (EINVAL);
1633	}
1634
1635	/* nothing to do */
1636	if (sc->sc_xcvr == new_xcvr) {
1637		TXP_UNLOCK(sc);
1638		return (0);
1639	}
1640
1641	txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0,
1642	    NULL, NULL, NULL, 0);
1643	sc->sc_xcvr = new_xcvr;
1644	TXP_UNLOCK(sc);
1645
1646	return (0);
1647}
1648
1649static void
1650txp_ifmedia_sts(ifp, ifmr)
1651	struct ifnet *ifp;
1652	struct ifmediareq *ifmr;
1653{
1654	struct txp_softc *sc = ifp->if_softc;
1655	struct ifmedia *ifm = &sc->sc_ifmedia;
1656	u_int16_t bmsr, bmcr, anlpar;
1657
1658	ifmr->ifm_status = IFM_AVALID;
1659	ifmr->ifm_active = IFM_ETHER;
1660
1661	TXP_LOCK(sc);
1662	if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
1663	    &bmsr, NULL, NULL, 1))
1664		goto bail;
1665	if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
1666	    &bmsr, NULL, NULL, 1))
1667		goto bail;
1668
1669	if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0,
1670	    &bmcr, NULL, NULL, 1))
1671		goto bail;
1672
1673	if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0,
1674	    &anlpar, NULL, NULL, 1))
1675		goto bail;
1676	TXP_UNLOCK(sc);
1677
1678	if (bmsr & BMSR_LINK)
1679		ifmr->ifm_status |= IFM_ACTIVE;
1680
1681	if (bmcr & BMCR_ISO) {
1682		ifmr->ifm_active |= IFM_NONE;
1683		ifmr->ifm_status = 0;
1684		return;
1685	}
1686
1687	if (bmcr & BMCR_LOOP)
1688		ifmr->ifm_active |= IFM_LOOP;
1689
1690	if (bmcr & BMCR_AUTOEN) {
1691		if ((bmsr & BMSR_ACOMP) == 0) {
1692			ifmr->ifm_active |= IFM_NONE;
1693			return;
1694		}
1695
1696		if (anlpar & ANLPAR_T4)
1697			ifmr->ifm_active |= IFM_100_T4;
1698		else if (anlpar & ANLPAR_TX_FD)
1699			ifmr->ifm_active |= IFM_100_TX|IFM_FDX;
1700		else if (anlpar & ANLPAR_TX)
1701			ifmr->ifm_active |= IFM_100_TX;
1702		else if (anlpar & ANLPAR_10_FD)
1703			ifmr->ifm_active |= IFM_10_T|IFM_FDX;
1704		else if (anlpar & ANLPAR_10)
1705			ifmr->ifm_active |= IFM_10_T;
1706		else
1707			ifmr->ifm_active |= IFM_NONE;
1708	} else
1709		ifmr->ifm_active = ifm->ifm_cur->ifm_media;
1710	return;
1711
1712bail:
1713	TXP_UNLOCK(sc);
1714	ifmr->ifm_active |= IFM_NONE;
1715	ifmr->ifm_status &= ~IFM_AVALID;
1716}
1717
1718#ifdef TXP_DEBUG
1719static void
1720txp_show_descriptor(d)
1721	void *d;
1722{
1723	struct txp_cmd_desc *cmd = d;
1724	struct txp_rsp_desc *rsp = d;
1725	struct txp_tx_desc *txd = d;
1726	struct txp_frag_desc *frgd = d;
1727
1728	switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) {
1729	case CMD_FLAGS_TYPE_CMD:
1730		/* command descriptor */
1731		printf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1732		    cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq,
1733		    cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3);
1734		break;
1735	case CMD_FLAGS_TYPE_RESP:
1736		/* response descriptor */
1737		printf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1738		    rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq,
1739		    rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3);
1740		break;
1741	case CMD_FLAGS_TYPE_DATA:
1742		/* data header (assuming tx for now) */
1743		printf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]",
1744		    txd->tx_flags, txd->tx_numdesc, txd->tx_totlen,
1745		    txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags);
1746		break;
1747	case CMD_FLAGS_TYPE_FRAG:
1748		/* fragment descriptor */
1749		printf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]",
1750		    frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len,
1751		    frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2);
1752		break;
1753	default:
1754		printf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n",
1755		    cmd->cmd_flags & CMD_FLAGS_TYPE_M,
1756		    cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq,
1757		    cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3);
1758		break;
1759	}
1760}
1761#endif
1762
1763static void
1764txp_set_filter(sc)
1765	struct txp_softc *sc;
1766{
1767	struct ifnet *ifp = sc->sc_ifp;
1768	u_int32_t crc, carry, hashbit, hash[2];
1769	u_int16_t filter;
1770	u_int8_t octet;
1771	int i, j, mcnt = 0;
1772	struct ifmultiaddr *ifma;
1773	char *enm;
1774
1775	if (ifp->if_flags & IFF_PROMISC) {
1776		filter = TXP_RXFILT_PROMISC;
1777		goto setit;
1778	}
1779
1780	filter = TXP_RXFILT_DIRECT;
1781
1782	if (ifp->if_flags & IFF_BROADCAST)
1783		filter |= TXP_RXFILT_BROADCAST;
1784
1785	if (ifp->if_flags & IFF_ALLMULTI)
1786		filter |= TXP_RXFILT_ALLMULTI;
1787	else {
1788		hash[0] = hash[1] = 0;
1789
1790		IF_ADDR_LOCK(ifp);
1791		TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1792			if (ifma->ifma_addr->sa_family != AF_LINK)
1793				continue;
1794
1795			enm = LLADDR((struct sockaddr_dl *)ifma->ifma_addr);
1796			mcnt++;
1797			crc = 0xffffffff;
1798
1799			for (i = 0; i < ETHER_ADDR_LEN; i++) {
1800				octet = enm[i];
1801				for (j = 0; j < 8; j++) {
1802					carry = ((crc & 0x80000000) ? 1 : 0) ^
1803					    (octet & 1);
1804					crc <<= 1;
1805					octet >>= 1;
1806					if (carry)
1807						crc = (crc ^ TXP_POLYNOMIAL) |
1808						    carry;
1809				}
1810			}
1811			hashbit = (u_int16_t)(crc & (64 - 1));
1812			hash[hashbit / 32] |= (1 << hashbit % 32);
1813		}
1814		IF_ADDR_UNLOCK(ifp);
1815
1816		if (mcnt > 0) {
1817			filter |= TXP_RXFILT_HASHMULTI;
1818			txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE,
1819			    2, hash[0], hash[1], NULL, NULL, NULL, 0);
1820		}
1821	}
1822
1823setit:
1824
1825	txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0,
1826	    NULL, NULL, NULL, 1);
1827
1828	return;
1829}
1830
1831static void
1832txp_capabilities(sc)
1833	struct txp_softc *sc;
1834{
1835	struct ifnet *ifp = sc->sc_ifp;
1836	struct txp_rsp_desc *rsp = NULL;
1837	struct txp_ext_desc *ext;
1838
1839	if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1))
1840		goto out;
1841
1842	if (rsp->rsp_numdesc != 1)
1843		goto out;
1844	ext = (struct txp_ext_desc *)(rsp + 1);
1845
1846	sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK;
1847	sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK;
1848	ifp->if_capabilities = 0;
1849
1850	if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) {
1851		sc->sc_tx_capability |= OFFLOAD_VLAN;
1852		sc->sc_rx_capability |= OFFLOAD_VLAN;
1853		ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
1854	}
1855
1856#if 0
1857	/* not ready yet */
1858	if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) {
1859		sc->sc_tx_capability |= OFFLOAD_IPSEC;
1860		sc->sc_rx_capability |= OFFLOAD_IPSEC;
1861		ifp->if_capabilities |= IFCAP_IPSEC;
1862	}
1863#endif
1864
1865	if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) {
1866		sc->sc_tx_capability |= OFFLOAD_IPCKSUM;
1867		sc->sc_rx_capability |= OFFLOAD_IPCKSUM;
1868		ifp->if_capabilities |= IFCAP_HWCSUM;
1869		ifp->if_hwassist |= CSUM_IP;
1870	}
1871
1872	if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) {
1873#if 0
1874		sc->sc_tx_capability |= OFFLOAD_TCPCKSUM;
1875#endif
1876		sc->sc_rx_capability |= OFFLOAD_TCPCKSUM;
1877		ifp->if_capabilities |= IFCAP_HWCSUM;
1878	}
1879
1880	if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) {
1881#if 0
1882		sc->sc_tx_capability |= OFFLOAD_UDPCKSUM;
1883#endif
1884		sc->sc_rx_capability |= OFFLOAD_UDPCKSUM;
1885		ifp->if_capabilities |= IFCAP_HWCSUM;
1886	}
1887	ifp->if_capenable = ifp->if_capabilities;
1888
1889	if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0,
1890	    sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1))
1891		goto out;
1892
1893out:
1894	if (rsp != NULL)
1895		free(rsp, M_DEVBUF);
1896
1897	return;
1898}
1899