if_txp.c revision 150306
1/* $OpenBSD: if_txp.c,v 1.48 2001/06/27 06:34:50 kjc Exp $ */ 2 3/*- 4 * Copyright (c) 2001 5 * Jason L. Wright <jason@thought.net>, Theo de Raadt, and 6 * Aaron Campbell <aaron@monkey.org>. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Jason L. Wright, 19 * Theo de Raadt and Aaron Campbell. 20 * 4. Neither the name of the author nor the names of any co-contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37#include <sys/cdefs.h> 38__FBSDID("$FreeBSD: head/sys/dev/txp/if_txp.c 150306 2005-09-19 03:10:21Z imp $"); 39 40/* 41 * Driver for 3c990 (Typhoon) Ethernet ASIC 42 */ 43 44#include <sys/cdefs.h> 45__FBSDID("$FreeBSD: head/sys/dev/txp/if_txp.c 150306 2005-09-19 03:10:21Z imp $"); 46 47#include <sys/param.h> 48#include <sys/systm.h> 49#include <sys/sockio.h> 50#include <sys/mbuf.h> 51#include <sys/malloc.h> 52#include <sys/kernel.h> 53#include <sys/module.h> 54#include <sys/socket.h> 55 56#include <net/if.h> 57#include <net/if_arp.h> 58#include <net/ethernet.h> 59#include <net/if_dl.h> 60#include <net/if_types.h> 61#include <net/if_vlan_var.h> 62 63#include <netinet/in.h> 64#include <netinet/in_systm.h> 65#include <netinet/in_var.h> 66#include <netinet/ip.h> 67#include <netinet/if_ether.h> 68#include <machine/in_cksum.h> 69 70#include <net/if_media.h> 71 72#include <net/bpf.h> 73 74#include <vm/vm.h> /* for vtophys */ 75#include <vm/pmap.h> /* for vtophys */ 76#include <machine/clock.h> /* for DELAY */ 77#include <machine/bus.h> 78#include <machine/resource.h> 79#include <sys/bus.h> 80#include <sys/rman.h> 81 82#include <dev/mii/mii.h> 83#include <dev/mii/miivar.h> 84#include <dev/pci/pcireg.h> 85#include <dev/pci/pcivar.h> 86 87#define TXP_USEIOSPACE 88#define __STRICT_ALIGNMENT 89 90#include <dev/txp/if_txpreg.h> 91#include <dev/txp/3c990img.h> 92 93#ifndef lint 94static const char rcsid[] = 95 "$FreeBSD: head/sys/dev/txp/if_txp.c 150306 2005-09-19 03:10:21Z imp $"; 96#endif 97 98/* 99 * Various supported device vendors/types and their names. 100 */ 101static struct txp_type txp_devs[] = { 102 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_95, 103 "3Com 3cR990-TX-95 Etherlink with 3XP Processor" }, 104 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_TX_97, 105 "3Com 3cR990-TX-97 Etherlink with 3XP Processor" }, 106 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_TXM, 107 "3Com 3cR990B-TXM Etherlink with 3XP Processor" }, 108 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_95, 109 "3Com 3cR990-SRV-95 Etherlink Server with 3XP Processor" }, 110 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990_SRV_97, 111 "3Com 3cR990-SRV-97 Etherlink Server with 3XP Processor" }, 112 { TXP_VENDORID_3COM, TXP_DEVICEID_3CR990B_SRV, 113 "3Com 3cR990B-SRV Etherlink Server with 3XP Processor" }, 114 { 0, 0, NULL } 115}; 116 117static int txp_probe(device_t); 118static int txp_attach(device_t); 119static int txp_detach(device_t); 120static void txp_intr(void *); 121static void txp_tick(void *); 122static int txp_shutdown(device_t); 123static int txp_ioctl(struct ifnet *, u_long, caddr_t); 124static void txp_start(struct ifnet *); 125static void txp_stop(struct txp_softc *); 126static void txp_init(void *); 127static void txp_watchdog(struct ifnet *); 128 129static void txp_release_resources(struct txp_softc *); 130static int txp_chip_init(struct txp_softc *); 131static int txp_reset_adapter(struct txp_softc *); 132static int txp_download_fw(struct txp_softc *); 133static int txp_download_fw_wait(struct txp_softc *); 134static int txp_download_fw_section(struct txp_softc *, 135 struct txp_fw_section_header *, int); 136static int txp_alloc_rings(struct txp_softc *); 137static int txp_rxring_fill(struct txp_softc *); 138static void txp_rxring_empty(struct txp_softc *); 139static void txp_set_filter(struct txp_softc *); 140 141static int txp_cmd_desc_numfree(struct txp_softc *); 142static int txp_command(struct txp_softc *, u_int16_t, u_int16_t, u_int32_t, 143 u_int32_t, u_int16_t *, u_int32_t *, u_int32_t *, int); 144static int txp_command2(struct txp_softc *, u_int16_t, u_int16_t, 145 u_int32_t, u_int32_t, struct txp_ext_desc *, u_int8_t, 146 struct txp_rsp_desc **, int); 147static int txp_response(struct txp_softc *, u_int32_t, u_int16_t, u_int16_t, 148 struct txp_rsp_desc **); 149static void txp_rsp_fixup(struct txp_softc *, struct txp_rsp_desc *, 150 struct txp_rsp_desc *); 151static void txp_capabilities(struct txp_softc *); 152 153static void txp_ifmedia_sts(struct ifnet *, struct ifmediareq *); 154static int txp_ifmedia_upd(struct ifnet *); 155#ifdef TXP_DEBUG 156static void txp_show_descriptor(void *); 157#endif 158static void txp_tx_reclaim(struct txp_softc *, struct txp_tx_ring *); 159static void txp_rxbuf_reclaim(struct txp_softc *); 160static void txp_rx_reclaim(struct txp_softc *, struct txp_rx_ring *); 161 162#ifdef TXP_USEIOSPACE 163#define TXP_RES SYS_RES_IOPORT 164#define TXP_RID TXP_PCI_LOIO 165#else 166#define TXP_RES SYS_RES_MEMORY 167#define TXP_RID TXP_PCI_LOMEM 168#endif 169 170static device_method_t txp_methods[] = { 171 /* Device interface */ 172 DEVMETHOD(device_probe, txp_probe), 173 DEVMETHOD(device_attach, txp_attach), 174 DEVMETHOD(device_detach, txp_detach), 175 DEVMETHOD(device_shutdown, txp_shutdown), 176 { 0, 0 } 177}; 178 179static driver_t txp_driver = { 180 "txp", 181 txp_methods, 182 sizeof(struct txp_softc) 183}; 184 185static devclass_t txp_devclass; 186 187DRIVER_MODULE(txp, pci, txp_driver, txp_devclass, 0, 0); 188MODULE_DEPEND(txp, pci, 1, 1, 1); 189MODULE_DEPEND(txp, ether, 1, 1, 1); 190 191static int 192txp_probe(dev) 193 device_t dev; 194{ 195 struct txp_type *t; 196 197 t = txp_devs; 198 199 while(t->txp_name != NULL) { 200 if ((pci_get_vendor(dev) == t->txp_vid) && 201 (pci_get_device(dev) == t->txp_did)) { 202 device_set_desc(dev, t->txp_name); 203 return(BUS_PROBE_DEFAULT); 204 } 205 t++; 206 } 207 208 return(ENXIO); 209} 210 211static int 212txp_attach(dev) 213 device_t dev; 214{ 215 struct txp_softc *sc; 216 struct ifnet *ifp; 217 u_int16_t p1; 218 u_int32_t p2; 219 int unit, error = 0, rid; 220 u_char eaddr[6]; 221 222 sc = device_get_softc(dev); 223 unit = device_get_unit(dev); 224 sc->sc_dev = dev; 225 sc->sc_cold = 1; 226 227 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 228 MTX_DEF | MTX_RECURSE); 229 /* 230 * Map control/status registers. 231 */ 232 pci_enable_busmaster(dev); 233 234 rid = TXP_RID; 235 sc->sc_res = bus_alloc_resource_any(dev, TXP_RES, &rid, 236 RF_ACTIVE); 237 238 if (sc->sc_res == NULL) { 239 device_printf(dev, "couldn't map ports/memory\n"); 240 error = ENXIO; 241 goto fail; 242 } 243 244 sc->sc_bt = rman_get_bustag(sc->sc_res); 245 sc->sc_bh = rman_get_bushandle(sc->sc_res); 246 247 /* Allocate interrupt */ 248 rid = 0; 249 sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 250 RF_SHAREABLE | RF_ACTIVE); 251 252 if (sc->sc_irq == NULL) { 253 device_printf(dev, "couldn't map interrupt\n"); 254 error = ENXIO; 255 goto fail; 256 } 257 258 if (txp_chip_init(sc)) { 259 error = ENXIO; 260 goto fail; 261 } 262 263 sc->sc_fwbuf = contigmalloc(32768, M_DEVBUF, 264 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 265 error = txp_download_fw(sc); 266 contigfree(sc->sc_fwbuf, 32768, M_DEVBUF); 267 sc->sc_fwbuf = NULL; 268 269 if (error) 270 goto fail; 271 272 sc->sc_ldata = contigmalloc(sizeof(struct txp_ldata), M_DEVBUF, 273 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0); 274 bzero(sc->sc_ldata, sizeof(struct txp_ldata)); 275 276 if (txp_alloc_rings(sc)) { 277 error = ENXIO; 278 goto fail; 279 } 280 281 if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 282 NULL, NULL, NULL, 1)) { 283 error = ENXIO; 284 goto fail; 285 } 286 287 if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0, 288 &p1, &p2, NULL, 1)) { 289 error = ENXIO; 290 goto fail; 291 } 292 293 txp_set_filter(sc); 294 295 eaddr[0] = ((u_int8_t *)&p1)[1]; 296 eaddr[1] = ((u_int8_t *)&p1)[0]; 297 eaddr[2] = ((u_int8_t *)&p2)[3]; 298 eaddr[3] = ((u_int8_t *)&p2)[2]; 299 eaddr[4] = ((u_int8_t *)&p2)[1]; 300 eaddr[5] = ((u_int8_t *)&p2)[0]; 301 302 sc->sc_cold = 0; 303 304 ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts); 305 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 306 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); 307 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); 308 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); 309 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL); 310 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); 311 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); 312 313 sc->sc_xcvr = TXP_XCVR_AUTO; 314 txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0, 315 NULL, NULL, NULL, 0); 316 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO); 317 318 ifp = sc->sc_ifp = if_alloc(IFT_ETHER); 319 if (ifp == NULL) { 320 device_printf(dev, "can not if_alloc()\n"); 321 error = ENOSPC; 322 goto fail; 323 } 324 ifp->if_softc = sc; 325 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 326 ifp->if_mtu = ETHERMTU; 327 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | 328 IFF_NEEDSGIANT; 329 ifp->if_ioctl = txp_ioctl; 330 ifp->if_start = txp_start; 331 ifp->if_watchdog = txp_watchdog; 332 ifp->if_init = txp_init; 333 ifp->if_baudrate = 100000000; 334 ifp->if_snd.ifq_maxlen = TX_ENTRIES; 335 ifp->if_hwassist = 0; 336 txp_capabilities(sc); 337 338 /* 339 * Attach us everywhere 340 */ 341 ether_ifattach(ifp, eaddr); 342 callout_handle_init(&sc->sc_tick); 343 344 error = bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_NET, 345 txp_intr, sc, &sc->sc_intrhand); 346 347 if (error) { 348 ether_ifdetach(ifp); 349 device_printf(dev, "couldn't set up irq\n"); 350 goto fail; 351 } 352 353 return(0); 354 355fail: 356 txp_release_resources(sc); 357 mtx_destroy(&sc->sc_mtx); 358 return(error); 359} 360 361static int 362txp_detach(dev) 363 device_t dev; 364{ 365 struct txp_softc *sc; 366 struct ifnet *ifp; 367 int i; 368 369 sc = device_get_softc(dev); 370 ifp = sc->sc_ifp; 371 372 txp_stop(sc); 373 txp_shutdown(dev); 374 375 ifmedia_removeall(&sc->sc_ifmedia); 376 ether_ifdetach(ifp); 377 378 for (i = 0; i < RXBUF_ENTRIES; i++) 379 free(sc->sc_rxbufs[i].rb_sd, M_DEVBUF); 380 381 txp_release_resources(sc); 382 383 mtx_destroy(&sc->sc_mtx); 384 return(0); 385} 386 387static void 388txp_release_resources(sc) 389 struct txp_softc *sc; 390{ 391 device_t dev; 392 393 dev = sc->sc_dev; 394 395 if (sc->sc_intrhand != NULL) 396 bus_teardown_intr(dev, sc->sc_irq, sc->sc_intrhand); 397 398 if (sc->sc_irq != NULL) 399 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq); 400 401 if (sc->sc_res != NULL) 402 bus_release_resource(dev, TXP_RES, TXP_RID, sc->sc_res); 403 404 if (sc->sc_ldata != NULL) 405 contigfree(sc->sc_ldata, sizeof(struct txp_ldata), M_DEVBUF); 406 407 if (sc->sc_ifp) 408 if_free(sc->sc_ifp); 409 410 return; 411} 412 413static int 414txp_chip_init(sc) 415 struct txp_softc *sc; 416{ 417 /* disable interrupts */ 418 WRITE_REG(sc, TXP_IER, 0); 419 WRITE_REG(sc, TXP_IMR, 420 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 421 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 422 TXP_INT_LATCH); 423 424 /* ack all interrupts */ 425 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 426 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 427 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 428 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 429 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 430 431 if (txp_reset_adapter(sc)) 432 return (-1); 433 434 /* disable interrupts */ 435 WRITE_REG(sc, TXP_IER, 0); 436 WRITE_REG(sc, TXP_IMR, 437 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 438 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 439 TXP_INT_LATCH); 440 441 /* ack all interrupts */ 442 WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH | 443 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 444 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 445 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 446 TXP_INT_A2H_3 | TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0); 447 448 return (0); 449} 450 451static int 452txp_reset_adapter(sc) 453 struct txp_softc *sc; 454{ 455 u_int32_t r; 456 int i; 457 458 r = 0; 459 WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL); 460 DELAY(1000); 461 WRITE_REG(sc, TXP_SRR, 0); 462 463 /* Should wait max 6 seconds */ 464 for (i = 0; i < 6000; i++) { 465 r = READ_REG(sc, TXP_A2H_0); 466 if (r == STAT_WAITING_FOR_HOST_REQUEST) 467 break; 468 DELAY(1000); 469 } 470 471 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 472 device_printf(sc->sc_dev, "reset hung\n"); 473 return (-1); 474 } 475 476 return (0); 477} 478 479static int 480txp_download_fw(sc) 481 struct txp_softc *sc; 482{ 483 struct txp_fw_file_header *fileheader; 484 struct txp_fw_section_header *secthead; 485 int sect; 486 u_int32_t r, i, ier, imr; 487 488 r = 0; 489 ier = READ_REG(sc, TXP_IER); 490 WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0); 491 492 imr = READ_REG(sc, TXP_IMR); 493 WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0); 494 495 for (i = 0; i < 10000; i++) { 496 r = READ_REG(sc, TXP_A2H_0); 497 if (r == STAT_WAITING_FOR_HOST_REQUEST) 498 break; 499 DELAY(50); 500 } 501 if (r != STAT_WAITING_FOR_HOST_REQUEST) { 502 device_printf(sc->sc_dev, "not waiting for host request\n"); 503 return (-1); 504 } 505 506 /* Ack the status */ 507 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 508 509 fileheader = (struct txp_fw_file_header *)tc990image; 510 if (bcmp("TYPHOON", fileheader->magicid, sizeof(fileheader->magicid))) { 511 device_printf(sc->sc_dev, "fw invalid magic\n"); 512 return (-1); 513 } 514 515 /* Tell boot firmware to get ready for image */ 516 WRITE_REG(sc, TXP_H2A_1, fileheader->addr); 517 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE); 518 519 if (txp_download_fw_wait(sc)) { 520 device_printf(sc->sc_dev, "fw wait failed, initial\n"); 521 return (-1); 522 } 523 524 secthead = (struct txp_fw_section_header *)(((u_int8_t *)tc990image) + 525 sizeof(struct txp_fw_file_header)); 526 527 for (sect = 0; sect < fileheader->nsections; sect++) { 528 if (txp_download_fw_section(sc, secthead, sect)) 529 return (-1); 530 secthead = (struct txp_fw_section_header *) 531 (((u_int8_t *)secthead) + secthead->nbytes + 532 sizeof(*secthead)); 533 } 534 535 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE); 536 537 for (i = 0; i < 10000; i++) { 538 r = READ_REG(sc, TXP_A2H_0); 539 if (r == STAT_WAITING_FOR_BOOT) 540 break; 541 DELAY(50); 542 } 543 if (r != STAT_WAITING_FOR_BOOT) { 544 device_printf(sc->sc_dev, "not waiting for boot\n"); 545 return (-1); 546 } 547 548 WRITE_REG(sc, TXP_IER, ier); 549 WRITE_REG(sc, TXP_IMR, imr); 550 551 return (0); 552} 553 554static int 555txp_download_fw_wait(sc) 556 struct txp_softc *sc; 557{ 558 u_int32_t i, r; 559 560 r = 0; 561 for (i = 0; i < 10000; i++) { 562 r = READ_REG(sc, TXP_ISR); 563 if (r & TXP_INT_A2H_0) 564 break; 565 DELAY(50); 566 } 567 568 if (!(r & TXP_INT_A2H_0)) { 569 device_printf(sc->sc_dev, "fw wait failed comm0\n"); 570 return (-1); 571 } 572 573 WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0); 574 575 r = READ_REG(sc, TXP_A2H_0); 576 if (r != STAT_WAITING_FOR_SEGMENT) { 577 device_printf(sc->sc_dev, "fw not waiting for segment\n"); 578 return (-1); 579 } 580 return (0); 581} 582 583static int 584txp_download_fw_section(sc, sect, sectnum) 585 struct txp_softc *sc; 586 struct txp_fw_section_header *sect; 587 int sectnum; 588{ 589 vm_offset_t dma; 590 int rseg, err = 0; 591 struct mbuf m; 592 u_int16_t csum; 593 594 /* Skip zero length sections */ 595 if (sect->nbytes == 0) 596 return (0); 597 598 /* Make sure we aren't past the end of the image */ 599 rseg = ((u_int8_t *)sect) - ((u_int8_t *)tc990image); 600 if (rseg >= sizeof(tc990image)) { 601 device_printf(sc->sc_dev, "fw invalid section address, " 602 "section %d\n", sectnum); 603 return (-1); 604 } 605 606 /* Make sure this section doesn't go past the end */ 607 rseg += sect->nbytes; 608 if (rseg >= sizeof(tc990image)) { 609 device_printf(sc->sc_dev, "fw truncated section %d\n", 610 sectnum); 611 return (-1); 612 } 613 614 bcopy(((u_int8_t *)sect) + sizeof(*sect), sc->sc_fwbuf, sect->nbytes); 615 dma = vtophys(sc->sc_fwbuf); 616 617 /* 618 * dummy up mbuf and verify section checksum 619 */ 620 m.m_type = MT_DATA; 621 m.m_next = m.m_nextpkt = NULL; 622 m.m_len = sect->nbytes; 623 m.m_data = sc->sc_fwbuf; 624 m.m_flags = 0; 625 csum = in_cksum(&m, sect->nbytes); 626 if (csum != sect->cksum) { 627 device_printf(sc->sc_dev, "fw section %d, bad " 628 "cksum (expected 0x%x got 0x%x)\n", 629 sectnum, sect->cksum, csum); 630 err = -1; 631 goto bail; 632 } 633 634 WRITE_REG(sc, TXP_H2A_1, sect->nbytes); 635 WRITE_REG(sc, TXP_H2A_2, sect->cksum); 636 WRITE_REG(sc, TXP_H2A_3, sect->addr); 637 WRITE_REG(sc, TXP_H2A_4, 0); 638 WRITE_REG(sc, TXP_H2A_5, dma & 0xffffffff); 639 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE); 640 641 if (txp_download_fw_wait(sc)) { 642 device_printf(sc->sc_dev, "fw wait failed, " 643 "section %d\n", sectnum); 644 err = -1; 645 } 646 647bail: 648 return (err); 649} 650 651static void 652txp_intr(vsc) 653 void *vsc; 654{ 655 struct txp_softc *sc = vsc; 656 struct txp_hostvar *hv = sc->sc_hostvar; 657 u_int32_t isr; 658 659 /* mask all interrupts */ 660 WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF | 661 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 662 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 663 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 664 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 665 666 isr = READ_REG(sc, TXP_ISR); 667 while (isr) { 668 WRITE_REG(sc, TXP_ISR, isr); 669 670 if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff)) 671 txp_rx_reclaim(sc, &sc->sc_rxhir); 672 if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff)) 673 txp_rx_reclaim(sc, &sc->sc_rxlor); 674 675 if (hv->hv_rx_buf_write_idx == hv->hv_rx_buf_read_idx) 676 txp_rxbuf_reclaim(sc); 677 678 if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons != 679 TXP_OFFSET2IDX(*(sc->sc_txhir.r_off)))) 680 txp_tx_reclaim(sc, &sc->sc_txhir); 681 682 if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons != 683 TXP_OFFSET2IDX(*(sc->sc_txlor.r_off)))) 684 txp_tx_reclaim(sc, &sc->sc_txlor); 685 686 isr = READ_REG(sc, TXP_ISR); 687 } 688 689 /* unmask all interrupts */ 690 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 691 692 txp_start(sc->sc_ifp); 693 694 return; 695} 696 697static void 698txp_rx_reclaim(sc, r) 699 struct txp_softc *sc; 700 struct txp_rx_ring *r; 701{ 702 struct ifnet *ifp = sc->sc_ifp; 703 struct txp_rx_desc *rxd; 704 struct mbuf *m; 705 struct txp_swdesc *sd = NULL; 706 u_int32_t roff, woff; 707 708 roff = *r->r_roff; 709 woff = *r->r_woff; 710 rxd = r->r_desc + (roff / sizeof(struct txp_rx_desc)); 711 712 while (roff != woff) { 713 714 if (rxd->rx_flags & RX_FLAGS_ERROR) { 715 device_printf(sc->sc_dev, "error 0x%x\n", 716 rxd->rx_stat); 717 ifp->if_ierrors++; 718 goto next; 719 } 720 721 /* retrieve stashed pointer */ 722 sd = rxd->rx_sd; 723 724 m = sd->sd_mbuf; 725 sd->sd_mbuf = NULL; 726 727 m->m_pkthdr.len = m->m_len = rxd->rx_len; 728 729#ifdef __STRICT_ALIGNMENT 730 { 731 /* 732 * XXX Nice chip, except it won't accept "off by 2" 733 * buffers, so we're force to copy. Supposedly 734 * this will be fixed in a newer firmware rev 735 * and this will be temporary. 736 */ 737 struct mbuf *mnew; 738 739 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 740 if (mnew == NULL) { 741 m_freem(m); 742 goto next; 743 } 744 if (m->m_len > (MHLEN - 2)) { 745 MCLGET(mnew, M_DONTWAIT); 746 if (!(mnew->m_flags & M_EXT)) { 747 m_freem(mnew); 748 m_freem(m); 749 goto next; 750 } 751 } 752 mnew->m_pkthdr.rcvif = ifp; 753 m_adj(mnew, 2); 754 mnew->m_pkthdr.len = mnew->m_len = m->m_len; 755 m_copydata(m, 0, m->m_pkthdr.len, mtod(mnew, caddr_t)); 756 m_freem(m); 757 m = mnew; 758 } 759#endif 760 761 if (rxd->rx_stat & RX_STAT_IPCKSUMBAD) 762 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; 763 else if (rxd->rx_stat & RX_STAT_IPCKSUMGOOD) 764 m->m_pkthdr.csum_flags |= 765 CSUM_IP_CHECKED|CSUM_IP_VALID; 766 767 if ((rxd->rx_stat & RX_STAT_TCPCKSUMGOOD) || 768 (rxd->rx_stat & RX_STAT_UDPCKSUMGOOD)) { 769 m->m_pkthdr.csum_flags |= 770 CSUM_DATA_VALID|CSUM_PSEUDO_HDR; 771 m->m_pkthdr.csum_data = 0xffff; 772 } 773 774 if (rxd->rx_stat & RX_STAT_VLAN) { 775 VLAN_INPUT_TAG(ifp, 776 m, htons(rxd->rx_vlan >> 16), goto next); 777 } 778 779 (*ifp->if_input)(ifp, m); 780 781next: 782 783 roff += sizeof(struct txp_rx_desc); 784 if (roff == (RX_ENTRIES * sizeof(struct txp_rx_desc))) { 785 roff = 0; 786 rxd = r->r_desc; 787 } else 788 rxd++; 789 woff = *r->r_woff; 790 } 791 792 *r->r_roff = woff; 793 794 return; 795} 796 797static void 798txp_rxbuf_reclaim(sc) 799 struct txp_softc *sc; 800{ 801 struct ifnet *ifp = sc->sc_ifp; 802 struct txp_hostvar *hv = sc->sc_hostvar; 803 struct txp_rxbuf_desc *rbd; 804 struct txp_swdesc *sd; 805 u_int32_t i; 806 807 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 808 return; 809 810 i = sc->sc_rxbufprod; 811 rbd = sc->sc_rxbufs + i; 812 813 while (1) { 814 sd = rbd->rb_sd; 815 if (sd->sd_mbuf != NULL) 816 break; 817 818 MGETHDR(sd->sd_mbuf, M_DONTWAIT, MT_DATA); 819 if (sd->sd_mbuf == NULL) 820 goto err_sd; 821 822 MCLGET(sd->sd_mbuf, M_DONTWAIT); 823 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) 824 goto err_mbuf; 825 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 826 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 827 828 rbd->rb_paddrlo = vtophys(mtod(sd->sd_mbuf, vm_offset_t)) 829 & 0xffffffff; 830 rbd->rb_paddrhi = 0; 831 832 hv->hv_rx_buf_write_idx = TXP_IDX2OFFSET(i); 833 834 if (++i == RXBUF_ENTRIES) { 835 i = 0; 836 rbd = sc->sc_rxbufs; 837 } else 838 rbd++; 839 } 840 841 sc->sc_rxbufprod = i; 842 843 return; 844 845err_mbuf: 846 m_freem(sd->sd_mbuf); 847err_sd: 848 free(sd, M_DEVBUF); 849} 850 851/* 852 * Reclaim mbufs and entries from a transmit ring. 853 */ 854static void 855txp_tx_reclaim(sc, r) 856 struct txp_softc *sc; 857 struct txp_tx_ring *r; 858{ 859 struct ifnet *ifp = sc->sc_ifp; 860 u_int32_t idx = TXP_OFFSET2IDX(*(r->r_off)); 861 u_int32_t cons = r->r_cons, cnt = r->r_cnt; 862 struct txp_tx_desc *txd = r->r_desc + cons; 863 struct txp_swdesc *sd = sc->sc_txd + cons; 864 struct mbuf *m; 865 866 while (cons != idx) { 867 if (cnt == 0) 868 break; 869 870 if ((txd->tx_flags & TX_FLAGS_TYPE_M) == 871 TX_FLAGS_TYPE_DATA) { 872 m = sd->sd_mbuf; 873 if (m != NULL) { 874 m_freem(m); 875 txd->tx_addrlo = 0; 876 txd->tx_addrhi = 0; 877 ifp->if_opackets++; 878 } 879 } 880 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 881 882 if (++cons == TX_ENTRIES) { 883 txd = r->r_desc; 884 cons = 0; 885 sd = sc->sc_txd; 886 } else { 887 txd++; 888 sd++; 889 } 890 891 cnt--; 892 } 893 894 r->r_cons = cons; 895 r->r_cnt = cnt; 896 if (cnt == 0) 897 ifp->if_timer = 0; 898} 899 900static int 901txp_shutdown(dev) 902 device_t dev; 903{ 904 struct txp_softc *sc; 905 906 sc = device_get_softc(dev); 907 908 /* mask all interrupts */ 909 WRITE_REG(sc, TXP_IMR, 910 TXP_INT_SELF | TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | 911 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 912 TXP_INT_LATCH); 913 914 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 915 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0); 916 txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0); 917 918 return(0); 919} 920 921static int 922txp_alloc_rings(sc) 923 struct txp_softc *sc; 924{ 925 struct txp_boot_record *boot; 926 struct txp_ldata *ld; 927 u_int32_t r; 928 int i; 929 930 r = 0; 931 ld = sc->sc_ldata; 932 boot = &ld->txp_boot; 933 934 /* boot record */ 935 sc->sc_boot = boot; 936 937 /* host variables */ 938 bzero(&ld->txp_hostvar, sizeof(struct txp_hostvar)); 939 boot->br_hostvar_lo = vtophys(&ld->txp_hostvar); 940 boot->br_hostvar_hi = 0; 941 sc->sc_hostvar = (struct txp_hostvar *)&ld->txp_hostvar; 942 943 /* hi priority tx ring */ 944 boot->br_txhipri_lo = vtophys(&ld->txp_txhiring);; 945 boot->br_txhipri_hi = 0; 946 boot->br_txhipri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 947 sc->sc_txhir.r_reg = TXP_H2A_1; 948 sc->sc_txhir.r_desc = (struct txp_tx_desc *)&ld->txp_txhiring; 949 sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0; 950 sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx; 951 952 /* lo priority tx ring */ 953 boot->br_txlopri_lo = vtophys(&ld->txp_txloring); 954 boot->br_txlopri_hi = 0; 955 boot->br_txlopri_siz = TX_ENTRIES * sizeof(struct txp_tx_desc); 956 sc->sc_txlor.r_reg = TXP_H2A_3; 957 sc->sc_txlor.r_desc = (struct txp_tx_desc *)&ld->txp_txloring; 958 sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0; 959 sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx; 960 961 /* high priority rx ring */ 962 boot->br_rxhipri_lo = vtophys(&ld->txp_rxhiring); 963 boot->br_rxhipri_hi = 0; 964 boot->br_rxhipri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 965 sc->sc_rxhir.r_desc = (struct txp_rx_desc *)&ld->txp_rxhiring; 966 sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx; 967 sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx; 968 969 /* low priority rx ring */ 970 boot->br_rxlopri_lo = vtophys(&ld->txp_rxloring); 971 boot->br_rxlopri_hi = 0; 972 boot->br_rxlopri_siz = RX_ENTRIES * sizeof(struct txp_rx_desc); 973 sc->sc_rxlor.r_desc = (struct txp_rx_desc *)&ld->txp_rxloring; 974 sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx; 975 sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx; 976 977 /* command ring */ 978 bzero(&ld->txp_cmdring, sizeof(struct txp_cmd_desc) * CMD_ENTRIES); 979 boot->br_cmd_lo = vtophys(&ld->txp_cmdring); 980 boot->br_cmd_hi = 0; 981 boot->br_cmd_siz = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 982 sc->sc_cmdring.base = (struct txp_cmd_desc *)&ld->txp_cmdring; 983 sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc); 984 sc->sc_cmdring.lastwrite = 0; 985 986 /* response ring */ 987 bzero(&ld->txp_rspring, sizeof(struct txp_rsp_desc) * RSP_ENTRIES); 988 boot->br_resp_lo = vtophys(&ld->txp_rspring); 989 boot->br_resp_hi = 0; 990 boot->br_resp_siz = CMD_ENTRIES * sizeof(struct txp_rsp_desc); 991 sc->sc_rspring.base = (struct txp_rsp_desc *)&ld->txp_rspring; 992 sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc); 993 sc->sc_rspring.lastwrite = 0; 994 995 /* receive buffer ring */ 996 boot->br_rxbuf_lo = vtophys(&ld->txp_rxbufs); 997 boot->br_rxbuf_hi = 0; 998 boot->br_rxbuf_siz = RXBUF_ENTRIES * sizeof(struct txp_rxbuf_desc); 999 sc->sc_rxbufs = (struct txp_rxbuf_desc *)&ld->txp_rxbufs; 1000 1001 for (i = 0; i < RXBUF_ENTRIES; i++) { 1002 struct txp_swdesc *sd; 1003 if (sc->sc_rxbufs[i].rb_sd != NULL) 1004 continue; 1005 sc->sc_rxbufs[i].rb_sd = malloc(sizeof(struct txp_swdesc), 1006 M_DEVBUF, M_NOWAIT); 1007 if (sc->sc_rxbufs[i].rb_sd == NULL) 1008 return(ENOBUFS); 1009 sd = sc->sc_rxbufs[i].rb_sd; 1010 sd->sd_mbuf = NULL; 1011 } 1012 sc->sc_rxbufprod = 0; 1013 1014 /* zero dma */ 1015 bzero(&ld->txp_zero, sizeof(u_int32_t)); 1016 boot->br_zero_lo = vtophys(&ld->txp_zero); 1017 boot->br_zero_hi = 0; 1018 1019 /* See if it's waiting for boot, and try to boot it */ 1020 for (i = 0; i < 10000; i++) { 1021 r = READ_REG(sc, TXP_A2H_0); 1022 if (r == STAT_WAITING_FOR_BOOT) 1023 break; 1024 DELAY(50); 1025 } 1026 1027 if (r != STAT_WAITING_FOR_BOOT) { 1028 device_printf(sc->sc_dev, "not waiting for boot\n"); 1029 return(ENXIO); 1030 } 1031 1032 WRITE_REG(sc, TXP_H2A_2, 0); 1033 WRITE_REG(sc, TXP_H2A_1, vtophys(sc->sc_boot)); 1034 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD); 1035 1036 /* See if it booted */ 1037 for (i = 0; i < 10000; i++) { 1038 r = READ_REG(sc, TXP_A2H_0); 1039 if (r == STAT_RUNNING) 1040 break; 1041 DELAY(50); 1042 } 1043 if (r != STAT_RUNNING) { 1044 device_printf(sc->sc_dev, "fw not running\n"); 1045 return(ENXIO); 1046 } 1047 1048 /* Clear TX and CMD ring write registers */ 1049 WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL); 1050 WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL); 1051 WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL); 1052 WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL); 1053 1054 return (0); 1055} 1056 1057static int 1058txp_ioctl(ifp, command, data) 1059 struct ifnet *ifp; 1060 u_long command; 1061 caddr_t data; 1062{ 1063 struct txp_softc *sc = ifp->if_softc; 1064 struct ifreq *ifr = (struct ifreq *)data; 1065 int s, error = 0; 1066 1067 s = splnet(); 1068 1069 switch(command) { 1070 case SIOCSIFFLAGS: 1071 if (ifp->if_flags & IFF_UP) { 1072 txp_init(sc); 1073 } else { 1074 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1075 txp_stop(sc); 1076 } 1077 break; 1078 case SIOCADDMULTI: 1079 case SIOCDELMULTI: 1080 /* 1081 * Multicast list has changed; set the hardware 1082 * filter accordingly. 1083 */ 1084 txp_set_filter(sc); 1085 error = 0; 1086 break; 1087 case SIOCGIFMEDIA: 1088 case SIOCSIFMEDIA: 1089 error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command); 1090 break; 1091 default: 1092 error = ether_ioctl(ifp, command, data); 1093 break; 1094 } 1095 1096 (void)splx(s); 1097 1098 return(error); 1099} 1100 1101static int 1102txp_rxring_fill(sc) 1103 struct txp_softc *sc; 1104{ 1105 int i; 1106 struct ifnet *ifp; 1107 struct txp_swdesc *sd; 1108 1109 ifp = sc->sc_ifp; 1110 1111 for (i = 0; i < RXBUF_ENTRIES; i++) { 1112 sd = sc->sc_rxbufs[i].rb_sd; 1113 MGETHDR(sd->sd_mbuf, M_DONTWAIT, MT_DATA); 1114 if (sd->sd_mbuf == NULL) 1115 return(ENOBUFS); 1116 1117 MCLGET(sd->sd_mbuf, M_DONTWAIT); 1118 if ((sd->sd_mbuf->m_flags & M_EXT) == 0) { 1119 m_freem(sd->sd_mbuf); 1120 return(ENOBUFS); 1121 } 1122 sd->sd_mbuf->m_pkthdr.len = sd->sd_mbuf->m_len = MCLBYTES; 1123 sd->sd_mbuf->m_pkthdr.rcvif = ifp; 1124 1125 sc->sc_rxbufs[i].rb_paddrlo = 1126 vtophys(mtod(sd->sd_mbuf, vm_offset_t)); 1127 sc->sc_rxbufs[i].rb_paddrhi = 0; 1128 } 1129 1130 sc->sc_hostvar->hv_rx_buf_write_idx = (RXBUF_ENTRIES - 1) * 1131 sizeof(struct txp_rxbuf_desc); 1132 1133 return(0); 1134} 1135 1136static void 1137txp_rxring_empty(sc) 1138 struct txp_softc *sc; 1139{ 1140 int i; 1141 struct txp_swdesc *sd; 1142 1143 if (sc->sc_rxbufs == NULL) 1144 return; 1145 1146 for (i = 0; i < RXBUF_ENTRIES; i++) { 1147 if (&sc->sc_rxbufs[i] == NULL) 1148 continue; 1149 sd = sc->sc_rxbufs[i].rb_sd; 1150 if (sd == NULL) 1151 continue; 1152 if (sd->sd_mbuf != NULL) { 1153 m_freem(sd->sd_mbuf); 1154 sd->sd_mbuf = NULL; 1155 } 1156 } 1157 1158 return; 1159} 1160 1161static void 1162txp_init(xsc) 1163 void *xsc; 1164{ 1165 struct txp_softc *sc; 1166 struct ifnet *ifp; 1167 u_int16_t p1; 1168 u_int32_t p2; 1169 int s; 1170 1171 sc = xsc; 1172 ifp = sc->sc_ifp; 1173 1174 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1175 return; 1176 1177 txp_stop(sc); 1178 1179 s = splnet(); 1180 1181 txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0, 1182 NULL, NULL, NULL, 1); 1183 1184 /* Set station address. */ 1185 ((u_int8_t *)&p1)[1] = IFP2ENADDR(sc->sc_ifp)[0]; 1186 ((u_int8_t *)&p1)[0] = IFP2ENADDR(sc->sc_ifp)[1]; 1187 ((u_int8_t *)&p2)[3] = IFP2ENADDR(sc->sc_ifp)[2]; 1188 ((u_int8_t *)&p2)[2] = IFP2ENADDR(sc->sc_ifp)[3]; 1189 ((u_int8_t *)&p2)[1] = IFP2ENADDR(sc->sc_ifp)[4]; 1190 ((u_int8_t *)&p2)[0] = IFP2ENADDR(sc->sc_ifp)[5]; 1191 txp_command(sc, TXP_CMD_STATION_ADDRESS_WRITE, p1, p2, 0, 1192 NULL, NULL, NULL, 1); 1193 1194 txp_set_filter(sc); 1195 1196 txp_rxring_fill(sc); 1197 1198 txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1199 txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1200 1201 WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF | 1202 TXP_INT_A2H_7 | TXP_INT_A2H_6 | TXP_INT_A2H_5 | TXP_INT_A2H_4 | 1203 TXP_INT_A2H_2 | TXP_INT_A2H_1 | TXP_INT_A2H_0 | 1204 TXP_INT_DMA3 | TXP_INT_DMA2 | TXP_INT_DMA1 | TXP_INT_DMA0 | 1205 TXP_INT_PCI_TABORT | TXP_INT_PCI_MABORT | TXP_INT_LATCH); 1206 WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3); 1207 1208 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1209 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1210 ifp->if_timer = 0; 1211 1212 sc->sc_tick = timeout(txp_tick, sc, hz); 1213 1214 splx(s); 1215} 1216 1217static void 1218txp_tick(vsc) 1219 void *vsc; 1220{ 1221 struct txp_softc *sc = vsc; 1222 struct ifnet *ifp = sc->sc_ifp; 1223 struct txp_rsp_desc *rsp = NULL; 1224 struct txp_ext_desc *ext; 1225 int s; 1226 1227 s = splnet(); 1228 txp_rxbuf_reclaim(sc); 1229 1230 if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0, 1231 &rsp, 1)) 1232 goto out; 1233 if (rsp->rsp_numdesc != 6) 1234 goto out; 1235 if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0, 1236 NULL, NULL, NULL, 1)) 1237 goto out; 1238 ext = (struct txp_ext_desc *)(rsp + 1); 1239 1240 ifp->if_ierrors += ext[3].ext_2 + ext[3].ext_3 + ext[3].ext_4 + 1241 ext[4].ext_1 + ext[4].ext_4; 1242 ifp->if_oerrors += ext[0].ext_1 + ext[1].ext_1 + ext[1].ext_4 + 1243 ext[2].ext_1; 1244 ifp->if_collisions += ext[0].ext_2 + ext[0].ext_3 + ext[1].ext_2 + 1245 ext[1].ext_3; 1246 ifp->if_opackets += rsp->rsp_par2; 1247 ifp->if_ipackets += ext[2].ext_3; 1248 1249out: 1250 if (rsp != NULL) 1251 free(rsp, M_DEVBUF); 1252 1253 splx(s); 1254 sc->sc_tick = timeout(txp_tick, sc, hz); 1255 1256 return; 1257} 1258 1259static void 1260txp_start(ifp) 1261 struct ifnet *ifp; 1262{ 1263 struct txp_softc *sc = ifp->if_softc; 1264 struct txp_tx_ring *r = &sc->sc_txhir; 1265 struct txp_tx_desc *txd; 1266 struct txp_frag_desc *fxd; 1267 struct mbuf *m, *m0; 1268 struct txp_swdesc *sd; 1269 u_int32_t firstprod, firstcnt, prod, cnt; 1270 struct m_tag *mtag; 1271 1272 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1273 IFF_DRV_RUNNING) 1274 return; 1275 1276 prod = r->r_prod; 1277 cnt = r->r_cnt; 1278 1279 while (1) { 1280 IF_DEQUEUE(&ifp->if_snd, m); 1281 if (m == NULL) 1282 break; 1283 1284 firstprod = prod; 1285 firstcnt = cnt; 1286 1287 sd = sc->sc_txd + prod; 1288 sd->sd_mbuf = m; 1289 1290 if ((TX_ENTRIES - cnt) < 4) 1291 goto oactive; 1292 1293 txd = r->r_desc + prod; 1294 1295 txd->tx_flags = TX_FLAGS_TYPE_DATA; 1296 txd->tx_numdesc = 0; 1297 txd->tx_addrlo = 0; 1298 txd->tx_addrhi = 0; 1299 txd->tx_totlen = 0; 1300 txd->tx_pflags = 0; 1301 1302 if (++prod == TX_ENTRIES) 1303 prod = 0; 1304 1305 if (++cnt >= (TX_ENTRIES - 4)) 1306 goto oactive; 1307 1308 mtag = VLAN_OUTPUT_TAG(ifp, m); 1309 if (mtag != NULL) { 1310 txd->tx_pflags = TX_PFLAGS_VLAN | 1311 (htons(VLAN_TAG_VALUE(mtag)) << TX_PFLAGS_VLANTAG_S); 1312 } 1313 1314 if (m->m_pkthdr.csum_flags & CSUM_IP) 1315 txd->tx_pflags |= TX_PFLAGS_IPCKSUM; 1316 1317#if 0 1318 if (m->m_pkthdr.csum_flags & CSUM_TCP) 1319 txd->tx_pflags |= TX_PFLAGS_TCPCKSUM; 1320 if (m->m_pkthdr.csum_flags & CSUM_UDP) 1321 txd->tx_pflags |= TX_PFLAGS_UDPCKSUM; 1322#endif 1323 1324 fxd = (struct txp_frag_desc *)(r->r_desc + prod); 1325 for (m0 = m; m0 != NULL; m0 = m0->m_next) { 1326 if (m0->m_len == 0) 1327 continue; 1328 if (++cnt >= (TX_ENTRIES - 4)) 1329 goto oactive; 1330 1331 txd->tx_numdesc++; 1332 1333 fxd->frag_flags = FRAG_FLAGS_TYPE_FRAG; 1334 fxd->frag_rsvd1 = 0; 1335 fxd->frag_len = m0->m_len; 1336 fxd->frag_addrlo = vtophys(mtod(m0, vm_offset_t)); 1337 fxd->frag_addrhi = 0; 1338 fxd->frag_rsvd2 = 0; 1339 1340 if (++prod == TX_ENTRIES) { 1341 fxd = (struct txp_frag_desc *)r->r_desc; 1342 prod = 0; 1343 } else 1344 fxd++; 1345 1346 } 1347 1348 ifp->if_timer = 5; 1349 1350 BPF_MTAP(ifp, m); 1351 WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod)); 1352 } 1353 1354 r->r_prod = prod; 1355 r->r_cnt = cnt; 1356 return; 1357 1358oactive: 1359 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1360 r->r_prod = firstprod; 1361 r->r_cnt = firstcnt; 1362 IF_PREPEND(&ifp->if_snd, m); 1363 return; 1364} 1365 1366/* 1367 * Handle simple commands sent to the typhoon 1368 */ 1369static int 1370txp_command(sc, id, in1, in2, in3, out1, out2, out3, wait) 1371 struct txp_softc *sc; 1372 u_int16_t id, in1, *out1; 1373 u_int32_t in2, in3, *out2, *out3; 1374 int wait; 1375{ 1376 struct txp_rsp_desc *rsp = NULL; 1377 1378 if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait)) 1379 return (-1); 1380 1381 if (!wait) 1382 return (0); 1383 1384 if (out1 != NULL) 1385 *out1 = rsp->rsp_par1; 1386 if (out2 != NULL) 1387 *out2 = rsp->rsp_par2; 1388 if (out3 != NULL) 1389 *out3 = rsp->rsp_par3; 1390 free(rsp, M_DEVBUF); 1391 return (0); 1392} 1393 1394static int 1395txp_command2(sc, id, in1, in2, in3, in_extp, in_extn, rspp, wait) 1396 struct txp_softc *sc; 1397 u_int16_t id, in1; 1398 u_int32_t in2, in3; 1399 struct txp_ext_desc *in_extp; 1400 u_int8_t in_extn; 1401 struct txp_rsp_desc **rspp; 1402 int wait; 1403{ 1404 struct txp_hostvar *hv = sc->sc_hostvar; 1405 struct txp_cmd_desc *cmd; 1406 struct txp_ext_desc *ext; 1407 u_int32_t idx, i; 1408 u_int16_t seq; 1409 1410 if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) { 1411 device_printf(sc->sc_dev, "no free cmd descriptors\n"); 1412 return (-1); 1413 } 1414 1415 idx = sc->sc_cmdring.lastwrite; 1416 cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1417 bzero(cmd, sizeof(*cmd)); 1418 1419 cmd->cmd_numdesc = in_extn; 1420 cmd->cmd_seq = seq = sc->sc_seq++; 1421 cmd->cmd_id = id; 1422 cmd->cmd_par1 = in1; 1423 cmd->cmd_par2 = in2; 1424 cmd->cmd_par3 = in3; 1425 cmd->cmd_flags = CMD_FLAGS_TYPE_CMD | 1426 (wait ? CMD_FLAGS_RESP : 0) | CMD_FLAGS_VALID; 1427 1428 idx += sizeof(struct txp_cmd_desc); 1429 if (idx == sc->sc_cmdring.size) 1430 idx = 0; 1431 1432 for (i = 0; i < in_extn; i++) { 1433 ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx); 1434 bcopy(in_extp, ext, sizeof(struct txp_ext_desc)); 1435 in_extp++; 1436 idx += sizeof(struct txp_cmd_desc); 1437 if (idx == sc->sc_cmdring.size) 1438 idx = 0; 1439 } 1440 1441 sc->sc_cmdring.lastwrite = idx; 1442 1443 WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite); 1444 1445 if (!wait) 1446 return (0); 1447 1448 for (i = 0; i < 10000; i++) { 1449 idx = hv->hv_resp_read_idx; 1450 if (idx != hv->hv_resp_write_idx) { 1451 *rspp = NULL; 1452 if (txp_response(sc, idx, id, seq, rspp)) 1453 return (-1); 1454 if (*rspp != NULL) 1455 break; 1456 } 1457 DELAY(50); 1458 } 1459 if (i == 1000 || (*rspp) == NULL) { 1460 device_printf(sc->sc_dev, "0x%x command failed\n", id); 1461 return (-1); 1462 } 1463 1464 return (0); 1465} 1466 1467static int 1468txp_response(sc, ridx, id, seq, rspp) 1469 struct txp_softc *sc; 1470 u_int32_t ridx; 1471 u_int16_t id; 1472 u_int16_t seq; 1473 struct txp_rsp_desc **rspp; 1474{ 1475 struct txp_hostvar *hv = sc->sc_hostvar; 1476 struct txp_rsp_desc *rsp; 1477 1478 while (ridx != hv->hv_resp_write_idx) { 1479 rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx); 1480 1481 if (id == rsp->rsp_id && rsp->rsp_seq == seq) { 1482 *rspp = (struct txp_rsp_desc *)malloc( 1483 sizeof(struct txp_rsp_desc) * (rsp->rsp_numdesc + 1), 1484 M_DEVBUF, M_NOWAIT); 1485 if ((*rspp) == NULL) 1486 return (-1); 1487 txp_rsp_fixup(sc, rsp, *rspp); 1488 return (0); 1489 } 1490 1491 if (rsp->rsp_flags & RSP_FLAGS_ERROR) { 1492 device_printf(sc->sc_dev, "response error!\n"); 1493 txp_rsp_fixup(sc, rsp, NULL); 1494 ridx = hv->hv_resp_read_idx; 1495 continue; 1496 } 1497 1498 switch (rsp->rsp_id) { 1499 case TXP_CMD_CYCLE_STATISTICS: 1500 case TXP_CMD_MEDIA_STATUS_READ: 1501 break; 1502 case TXP_CMD_HELLO_RESPONSE: 1503 device_printf(sc->sc_dev, "hello\n"); 1504 break; 1505 default: 1506 device_printf(sc->sc_dev, "unknown id(0x%x)\n", 1507 rsp->rsp_id); 1508 } 1509 1510 txp_rsp_fixup(sc, rsp, NULL); 1511 ridx = hv->hv_resp_read_idx; 1512 hv->hv_resp_read_idx = ridx; 1513 } 1514 1515 return (0); 1516} 1517 1518static void 1519txp_rsp_fixup(sc, rsp, dst) 1520 struct txp_softc *sc; 1521 struct txp_rsp_desc *rsp, *dst; 1522{ 1523 struct txp_rsp_desc *src = rsp; 1524 struct txp_hostvar *hv = sc->sc_hostvar; 1525 u_int32_t i, ridx; 1526 1527 ridx = hv->hv_resp_read_idx; 1528 1529 for (i = 0; i < rsp->rsp_numdesc + 1; i++) { 1530 if (dst != NULL) 1531 bcopy(src, dst++, sizeof(struct txp_rsp_desc)); 1532 ridx += sizeof(struct txp_rsp_desc); 1533 if (ridx == sc->sc_rspring.size) { 1534 src = sc->sc_rspring.base; 1535 ridx = 0; 1536 } else 1537 src++; 1538 sc->sc_rspring.lastwrite = hv->hv_resp_read_idx = ridx; 1539 } 1540 1541 hv->hv_resp_read_idx = ridx; 1542} 1543 1544static int 1545txp_cmd_desc_numfree(sc) 1546 struct txp_softc *sc; 1547{ 1548 struct txp_hostvar *hv = sc->sc_hostvar; 1549 struct txp_boot_record *br = sc->sc_boot; 1550 u_int32_t widx, ridx, nfree; 1551 1552 widx = sc->sc_cmdring.lastwrite; 1553 ridx = hv->hv_cmd_read_idx; 1554 1555 if (widx == ridx) { 1556 /* Ring is completely free */ 1557 nfree = br->br_cmd_siz - sizeof(struct txp_cmd_desc); 1558 } else { 1559 if (widx > ridx) 1560 nfree = br->br_cmd_siz - 1561 (widx - ridx + sizeof(struct txp_cmd_desc)); 1562 else 1563 nfree = ridx - widx - sizeof(struct txp_cmd_desc); 1564 } 1565 1566 return (nfree / sizeof(struct txp_cmd_desc)); 1567} 1568 1569static void 1570txp_stop(sc) 1571 struct txp_softc *sc; 1572{ 1573 struct ifnet *ifp; 1574 1575 ifp = sc->sc_ifp; 1576 1577 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1578 1579 untimeout(txp_tick, sc, sc->sc_tick); 1580 1581 txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1582 txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1); 1583 1584 txp_rxring_empty(sc); 1585 1586 return; 1587} 1588 1589static void 1590txp_watchdog(ifp) 1591 struct ifnet *ifp; 1592{ 1593 return; 1594} 1595 1596static int 1597txp_ifmedia_upd(ifp) 1598 struct ifnet *ifp; 1599{ 1600 struct txp_softc *sc = ifp->if_softc; 1601 struct ifmedia *ifm = &sc->sc_ifmedia; 1602 u_int16_t new_xcvr; 1603 1604 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1605 return (EINVAL); 1606 1607 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_10_T) { 1608 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1609 new_xcvr = TXP_XCVR_10_FDX; 1610 else 1611 new_xcvr = TXP_XCVR_10_HDX; 1612 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_100_TX) { 1613 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) 1614 new_xcvr = TXP_XCVR_100_FDX; 1615 else 1616 new_xcvr = TXP_XCVR_100_HDX; 1617 } else if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) { 1618 new_xcvr = TXP_XCVR_AUTO; 1619 } else 1620 return (EINVAL); 1621 1622 /* nothing to do */ 1623 if (sc->sc_xcvr == new_xcvr) 1624 return (0); 1625 1626 txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0, 1627 NULL, NULL, NULL, 0); 1628 sc->sc_xcvr = new_xcvr; 1629 1630 return (0); 1631} 1632 1633static void 1634txp_ifmedia_sts(ifp, ifmr) 1635 struct ifnet *ifp; 1636 struct ifmediareq *ifmr; 1637{ 1638 struct txp_softc *sc = ifp->if_softc; 1639 struct ifmedia *ifm = &sc->sc_ifmedia; 1640 u_int16_t bmsr, bmcr, anlpar; 1641 1642 ifmr->ifm_status = IFM_AVALID; 1643 ifmr->ifm_active = IFM_ETHER; 1644 1645 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1646 &bmsr, NULL, NULL, 1)) 1647 goto bail; 1648 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0, 1649 &bmsr, NULL, NULL, 1)) 1650 goto bail; 1651 1652 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0, 1653 &bmcr, NULL, NULL, 1)) 1654 goto bail; 1655 1656 if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0, 1657 &anlpar, NULL, NULL, 1)) 1658 goto bail; 1659 1660 if (bmsr & BMSR_LINK) 1661 ifmr->ifm_status |= IFM_ACTIVE; 1662 1663 if (bmcr & BMCR_ISO) { 1664 ifmr->ifm_active |= IFM_NONE; 1665 ifmr->ifm_status = 0; 1666 return; 1667 } 1668 1669 if (bmcr & BMCR_LOOP) 1670 ifmr->ifm_active |= IFM_LOOP; 1671 1672 if (bmcr & BMCR_AUTOEN) { 1673 if ((bmsr & BMSR_ACOMP) == 0) { 1674 ifmr->ifm_active |= IFM_NONE; 1675 return; 1676 } 1677 1678 if (anlpar & ANLPAR_T4) 1679 ifmr->ifm_active |= IFM_100_T4; 1680 else if (anlpar & ANLPAR_TX_FD) 1681 ifmr->ifm_active |= IFM_100_TX|IFM_FDX; 1682 else if (anlpar & ANLPAR_TX) 1683 ifmr->ifm_active |= IFM_100_TX; 1684 else if (anlpar & ANLPAR_10_FD) 1685 ifmr->ifm_active |= IFM_10_T|IFM_FDX; 1686 else if (anlpar & ANLPAR_10) 1687 ifmr->ifm_active |= IFM_10_T; 1688 else 1689 ifmr->ifm_active |= IFM_NONE; 1690 } else 1691 ifmr->ifm_active = ifm->ifm_cur->ifm_media; 1692 return; 1693 1694bail: 1695 ifmr->ifm_active |= IFM_NONE; 1696 ifmr->ifm_status &= ~IFM_AVALID; 1697} 1698 1699#ifdef TXP_DEBUG 1700static void 1701txp_show_descriptor(d) 1702 void *d; 1703{ 1704 struct txp_cmd_desc *cmd = d; 1705 struct txp_rsp_desc *rsp = d; 1706 struct txp_tx_desc *txd = d; 1707 struct txp_frag_desc *frgd = d; 1708 1709 switch (cmd->cmd_flags & CMD_FLAGS_TYPE_M) { 1710 case CMD_FLAGS_TYPE_CMD: 1711 /* command descriptor */ 1712 printf("[cmd flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1713 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1714 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1715 break; 1716 case CMD_FLAGS_TYPE_RESP: 1717 /* response descriptor */ 1718 printf("[rsp flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1719 rsp->rsp_flags, rsp->rsp_numdesc, rsp->rsp_id, rsp->rsp_seq, 1720 rsp->rsp_par1, rsp->rsp_par2, rsp->rsp_par3); 1721 break; 1722 case CMD_FLAGS_TYPE_DATA: 1723 /* data header (assuming tx for now) */ 1724 printf("[data flags 0x%x num %d totlen %d addr 0x%x/0x%x pflags 0x%x]", 1725 txd->tx_flags, txd->tx_numdesc, txd->tx_totlen, 1726 txd->tx_addrlo, txd->tx_addrhi, txd->tx_pflags); 1727 break; 1728 case CMD_FLAGS_TYPE_FRAG: 1729 /* fragment descriptor */ 1730 printf("[frag flags 0x%x rsvd1 0x%x len %d addr 0x%x/0x%x rsvd2 0x%x]", 1731 frgd->frag_flags, frgd->frag_rsvd1, frgd->frag_len, 1732 frgd->frag_addrlo, frgd->frag_addrhi, frgd->frag_rsvd2); 1733 break; 1734 default: 1735 printf("[unknown(%x) flags 0x%x num %d id %d seq %d par1 0x%x par2 0x%x par3 0x%x]\n", 1736 cmd->cmd_flags & CMD_FLAGS_TYPE_M, 1737 cmd->cmd_flags, cmd->cmd_numdesc, cmd->cmd_id, cmd->cmd_seq, 1738 cmd->cmd_par1, cmd->cmd_par2, cmd->cmd_par3); 1739 break; 1740 } 1741} 1742#endif 1743 1744static void 1745txp_set_filter(sc) 1746 struct txp_softc *sc; 1747{ 1748 struct ifnet *ifp = sc->sc_ifp; 1749 u_int32_t crc, carry, hashbit, hash[2]; 1750 u_int16_t filter; 1751 u_int8_t octet; 1752 int i, j, mcnt = 0; 1753 struct ifmultiaddr *ifma; 1754 char *enm; 1755 1756 if (ifp->if_flags & IFF_PROMISC) { 1757 filter = TXP_RXFILT_PROMISC; 1758 goto setit; 1759 } 1760 1761 filter = TXP_RXFILT_DIRECT; 1762 1763 if (ifp->if_flags & IFF_BROADCAST) 1764 filter |= TXP_RXFILT_BROADCAST; 1765 1766 if (ifp->if_flags & IFF_ALLMULTI) 1767 filter |= TXP_RXFILT_ALLMULTI; 1768 else { 1769 hash[0] = hash[1] = 0; 1770 1771 IF_ADDR_LOCK(ifp); 1772 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1773 if (ifma->ifma_addr->sa_family != AF_LINK) 1774 continue; 1775 1776 enm = LLADDR((struct sockaddr_dl *)ifma->ifma_addr); 1777 mcnt++; 1778 crc = 0xffffffff; 1779 1780 for (i = 0; i < ETHER_ADDR_LEN; i++) { 1781 octet = enm[i]; 1782 for (j = 0; j < 8; j++) { 1783 carry = ((crc & 0x80000000) ? 1 : 0) ^ 1784 (octet & 1); 1785 crc <<= 1; 1786 octet >>= 1; 1787 if (carry) 1788 crc = (crc ^ TXP_POLYNOMIAL) | 1789 carry; 1790 } 1791 } 1792 hashbit = (u_int16_t)(crc & (64 - 1)); 1793 hash[hashbit / 32] |= (1 << hashbit % 32); 1794 } 1795 IF_ADDR_UNLOCK(ifp); 1796 1797 if (mcnt > 0) { 1798 filter |= TXP_RXFILT_HASHMULTI; 1799 txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE, 1800 2, hash[0], hash[1], NULL, NULL, NULL, 0); 1801 } 1802 } 1803 1804setit: 1805 1806 txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0, 1807 NULL, NULL, NULL, 1); 1808 1809 return; 1810} 1811 1812static void 1813txp_capabilities(sc) 1814 struct txp_softc *sc; 1815{ 1816 struct ifnet *ifp = sc->sc_ifp; 1817 struct txp_rsp_desc *rsp = NULL; 1818 struct txp_ext_desc *ext; 1819 1820 if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1)) 1821 goto out; 1822 1823 if (rsp->rsp_numdesc != 1) 1824 goto out; 1825 ext = (struct txp_ext_desc *)(rsp + 1); 1826 1827 sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK; 1828 sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK; 1829 ifp->if_capabilities = 0; 1830 1831 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_VLAN) { 1832 sc->sc_tx_capability |= OFFLOAD_VLAN; 1833 sc->sc_rx_capability |= OFFLOAD_VLAN; 1834 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 1835 } 1836 1837#if 0 1838 /* not ready yet */ 1839 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPSEC) { 1840 sc->sc_tx_capability |= OFFLOAD_IPSEC; 1841 sc->sc_rx_capability |= OFFLOAD_IPSEC; 1842 ifp->if_capabilities |= IFCAP_IPSEC; 1843 } 1844#endif 1845 1846 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_IPCKSUM) { 1847 sc->sc_tx_capability |= OFFLOAD_IPCKSUM; 1848 sc->sc_rx_capability |= OFFLOAD_IPCKSUM; 1849 ifp->if_capabilities |= IFCAP_HWCSUM; 1850 ifp->if_hwassist |= CSUM_IP; 1851 } 1852 1853 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_TCPCKSUM) { 1854#if 0 1855 sc->sc_tx_capability |= OFFLOAD_TCPCKSUM; 1856#endif 1857 sc->sc_rx_capability |= OFFLOAD_TCPCKSUM; 1858 ifp->if_capabilities |= IFCAP_HWCSUM; 1859 } 1860 1861 if (rsp->rsp_par2 & rsp->rsp_par3 & OFFLOAD_UDPCKSUM) { 1862#if 0 1863 sc->sc_tx_capability |= OFFLOAD_UDPCKSUM; 1864#endif 1865 sc->sc_rx_capability |= OFFLOAD_UDPCKSUM; 1866 ifp->if_capabilities |= IFCAP_HWCSUM; 1867 } 1868 ifp->if_capenable = ifp->if_capabilities; 1869 1870 if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0, 1871 sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1)) 1872 goto out; 1873 1874out: 1875 if (rsp != NULL) 1876 free(rsp, M_DEVBUF); 1877 1878 return; 1879} 1880