twe.c revision 60894
1/*- 2 * Copyright (c) 2000 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: head/sys/dev/twe/twe.c 60894 2000-05-24 23:35:23Z msmith $ 28 */ 29 30/* 31 * Driver for the 3ware Escalade family of IDE RAID controllers. 32 */ 33 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/malloc.h> 37#include <sys/kernel.h> 38 39#if __FreeBSD_version < 500000 40# include <dev/twe/twe_compat.h> 41#else 42# include <sys/bio.h> 43#endif 44#include <sys/bus.h> 45#include <sys/conf.h> 46#include <sys/devicestat.h> 47#include <sys/disk.h> 48#include <sys/stat.h> 49 50#include <machine/bus_pio.h> 51#include <machine/bus.h> 52#include <machine/clock.h> 53#include <machine/resource.h> 54#include <sys/rman.h> 55 56#include <pci/pcireg.h> 57#include <pci/pcivar.h> 58 59#include <dev/twe/twereg.h> 60#include <dev/twe/twevar.h> 61 62/* 63 * Initialisation, bus interface. 64 */ 65static int twe_probe(device_t dev); 66static int twe_attach(device_t dev); 67static void twe_free(struct twe_softc *sc); 68static void twe_startup(void *arg); 69static int twe_detach(device_t dev); 70static int twe_shutdown(device_t dev); 71static int twe_suspend(device_t dev); 72static int twe_resume(device_t dev); 73static void twe_intr(void *arg); 74 75/* 76 * Control device. 77 */ 78static d_open_t twe_open; 79static d_close_t twe_close; 80static d_ioctl_t twe_ioctl; 81 82/* 83 * Command submission. 84 */ 85static void *twe_get_param(struct twe_softc *sc, int table_id, int parameter_id, size_t size, 86 void (* func)(struct twe_request *tr)); 87static int twe_init_connection(struct twe_softc *sc); 88/*static int twe_wait_request(struct twe_request *tr);*/ 89static int twe_immediate_request(struct twe_request *tr); 90static void twe_startio(struct twe_softc *sc); 91static void twe_completeio(struct twe_request *tr); 92 93/* 94 * Command I/O to controller. 95 */ 96static int twe_start(struct twe_request *tr); 97static void twe_done(struct twe_softc *sc); 98static void twe_complete(struct twe_softc *sc); 99static int twe_wait_status(struct twe_softc *sc, u_int32_t status, int timeout); 100static int twe_drain_response_queue(struct twe_softc *sc); 101static int twe_check_bits(struct twe_softc *sc, u_int32_t status_reg); 102 103/* 104 * Interrupt handling. 105 */ 106static void twe_host_intr(struct twe_softc *sc); 107static void twe_attention_intr(struct twe_softc *sc); 108static void twe_command_intr(struct twe_softc *sc); 109static void twe_enable_interrupts(struct twe_softc *sc); 110static void twe_disable_interrupts(struct twe_softc *sc); 111 112/* 113 * Asynchronous event handling. 114 */ 115static int twe_fetch_aen(struct twe_softc *sc); 116static void twe_handle_aen(struct twe_request *tr); 117static void twe_enqueue_aen(struct twe_softc *sc, u_int16_t aen); 118/*static int twe_dequeue_aen(struct twe_softc *sc);*/ 119static int twe_drain_aen_queue(struct twe_softc *sc); 120static int twe_find_aen(struct twe_softc *sc, u_int16_t aen); 121 122/* 123 * Command buffer management. 124 */ 125static struct twe_request *twe_get_request(struct twe_softc *sc); 126static void twe_release_request(struct twe_request *tr); 127static void twe_free_request(struct twe_request *tr); 128static int twe_get_requestid(struct twe_request *tr); 129static void twe_release_requestid(struct twe_request *tr); 130static void twe_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 131static void twe_setup_request_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 132static void twe_map_request(struct twe_request *tr); 133static void twe_unmap_request(struct twe_request *tr); 134 135/* 136 * Debugging. 137 */ 138static char *twe_name_aen(u_int16_t aen); 139#if 0 140static void twe_print_request(struct twe_request *tr); 141void twe_report(void); 142#endif 143 144/******************************************************************************** 145 ******************************************************************************** 146 Public Interfaces 147 ******************************************************************************** 148 ********************************************************************************/ 149 150devclass_t twe_devclass; 151 152static device_method_t twe_methods[] = { 153 /* Device interface */ 154 DEVMETHOD(device_probe, twe_probe), 155 DEVMETHOD(device_attach, twe_attach), 156 DEVMETHOD(device_detach, twe_detach), 157 DEVMETHOD(device_shutdown, twe_shutdown), 158 DEVMETHOD(device_suspend, twe_suspend), 159 DEVMETHOD(device_resume, twe_resume), 160 161 DEVMETHOD(bus_print_child, bus_generic_print_child), 162 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 163 { 0, 0 } 164}; 165 166static driver_t twe_pci_driver = { 167 "twe", 168 twe_methods, 169 sizeof(struct twe_softc) 170}; 171 172DRIVER_MODULE(tw, pci, twe_pci_driver, twe_devclass, 0, 0); 173 174#define TWE_CDEV_MAJOR 146 175 176static struct cdevsw twe_cdevsw = { 177 /* open */ twe_open, 178 /* close */ twe_close, 179 /* read */ noread, 180 /* write */ nowrite, 181 /* ioctl */ twe_ioctl, 182 /* poll */ nopoll, 183 /* mmap */ nommap, 184 /* strategy */ nostrategy, 185 /* name */ "twe", 186 /* maj */ TWE_CDEV_MAJOR, 187 /* dump */ nodump, 188 /* psize */ nopsize, 189 /* flags */ 0, 190 /* bmaj */ -1 191}; 192 193/******************************************************************************** 194 * Match a 3ware Escalade ATA RAID controller. 195 */ 196static int 197twe_probe(device_t dev) 198{ 199 200 debug_called(4); 201 202 if ((pci_get_vendor(dev) == TWE_VENDOR_ID) && 203 (pci_get_device(dev) == TWE_DEVICE_ID)) { 204 device_set_desc(dev, TWE_DEVICE_NAME); 205 return(0); 206 } 207 return(ENXIO); 208} 209 210/******************************************************************************** 211 * Free all of the resources associated with (sc). 212 * 213 * Should not be called if the controller is active. 214 */ 215static void 216twe_free(struct twe_softc *sc) 217{ 218 struct twe_request *tr; 219 220 debug_called(4); 221 222 /* throw away any command buffers */ 223 while ((tr = TAILQ_FIRST(&sc->twe_freecmds)) != NULL) { 224 TAILQ_REMOVE(&sc->twe_freecmds, tr, tr_link); 225 twe_free_request(tr); 226 } 227 228 /* destroy the data-transfer DMA tag */ 229 if (sc->twe_buffer_dmat) 230 bus_dma_tag_destroy(sc->twe_buffer_dmat); 231 232 /* disconnect the interrupt handler */ 233 if (sc->twe_intr) 234 bus_teardown_intr(sc->twe_dev, sc->twe_irq, sc->twe_intr); 235 if (sc->twe_irq != NULL) 236 bus_release_resource(sc->twe_dev, SYS_RES_IRQ, 0, sc->twe_irq); 237 238 /* destroy the parent DMA tag */ 239 if (sc->twe_parent_dmat) 240 bus_dma_tag_destroy(sc->twe_parent_dmat); 241 242 /* release the register window mapping */ 243 if (sc->twe_io != NULL) 244 bus_release_resource(sc->twe_dev, SYS_RES_IOPORT, TWE_IO_CONFIG_REG, sc->twe_io); 245 246 /* destroy control device */ 247 if (sc->twe_dev_t != (dev_t)NULL) 248 destroy_dev(sc->twe_dev_t); 249} 250 251/******************************************************************************** 252 * Allocate resources, initialise the controller. 253 */ 254static int 255twe_attach(device_t dev) 256{ 257 struct twe_softc *sc; 258 int rid, error; 259 u_int32_t command; 260 261 debug_called(4); 262 263 /* 264 * Make sure we are going to be able to talk to this board. 265 */ 266 command = pci_read_config(dev, PCIR_COMMAND, 2); 267 if ((command & PCIM_CMD_PORTEN) == 0) { 268 device_printf(dev, "register window not available\n"); 269 return(ENXIO); 270 } 271 /* 272 * Force the busmaster enable bit on, in case the BIOS forgot. 273 */ 274 command |= PCIM_CMD_BUSMASTEREN; 275 pci_write_config(dev, PCIR_COMMAND, command, 2); 276 277 /* 278 * Initialise the softc structure. 279 */ 280 sc = device_get_softc(dev); 281 bzero(sc, sizeof(*sc)); 282 sc->twe_dev = dev; 283 TAILQ_INIT(&sc->twe_work); 284 TAILQ_INIT(&sc->twe_freecmds); 285 bioq_init(&sc->twe_bioq); 286 sc->twe_wait_aen = -1; 287 288 /* 289 * Allocate the PCI register window. 290 */ 291 rid = TWE_IO_CONFIG_REG; 292 sc->twe_io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE); 293 if (sc->twe_io == NULL) { 294 device_printf(sc->twe_dev, "can't allocate register window\n"); 295 twe_free(sc); 296 return(ENXIO); 297 } 298 sc->twe_btag = rman_get_bustag(sc->twe_io); 299 sc->twe_bhandle = rman_get_bushandle(sc->twe_io); 300 301 /* 302 * Allocate the parent bus DMA tag appropriate for PCI. 303 */ 304 error = bus_dma_tag_create(NULL, /* parent */ 305 1, 0, /* alignment, boundary */ 306 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 307 BUS_SPACE_MAXADDR, /* highaddr */ 308 NULL, NULL, /* filter, filterarg */ 309 MAXBSIZE, TWE_MAX_SGL_LENGTH, /* maxsize, nsegments */ 310 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 311 BUS_DMA_ALLOCNOW, /* flags */ 312 &sc->twe_parent_dmat); 313 if (error != 0) { 314 device_printf(dev, "can't allocate parent DMA tag\n"); 315 twe_free(sc); 316 return(ENOMEM); 317 } 318 319 /* 320 * Allocate and connect our interrupt. 321 */ 322 rid = 0; 323 sc->twe_irq = bus_alloc_resource(sc->twe_dev, SYS_RES_IRQ, &rid, 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE); 324 if (sc->twe_irq == NULL) { 325 device_printf(sc->twe_dev, "can't allocate interrupt\n"); 326 twe_free(sc); 327 return(ENXIO); 328 } 329 error = bus_setup_intr(sc->twe_dev, sc->twe_irq, INTR_TYPE_BIO, twe_intr, sc, &sc->twe_intr); 330 if (error) { 331 device_printf(sc->twe_dev, "can't set up interrupt\n"); 332 twe_free(sc); 333 return(ENXIO); 334 } 335 336 /* 337 * Create DMA tag for mapping objects into controller-addressable space. 338 */ 339 error = bus_dma_tag_create(sc->twe_parent_dmat, /* parent */ 340 1, 0, /* alignment, boundary */ 341 BUS_SPACE_MAXADDR, /* lowaddr */ 342 BUS_SPACE_MAXADDR, /* highaddr */ 343 NULL, NULL, /* filter, filterarg */ 344 MAXBSIZE, TWE_MAX_SGL_LENGTH, /* maxsize, nsegments */ 345 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 346 0, /* flags */ 347 &sc->twe_buffer_dmat); 348 if (error != 0) { 349 device_printf(sc->twe_dev, "can't allocate data buffer DMA tag\n"); 350 twe_free(sc); 351 return(ENOMEM); 352 } 353 354 /* 355 * Create the control device. 356 */ 357 sc->twe_dev_t = make_dev(&twe_cdevsw, device_get_unit(sc->twe_dev), UID_ROOT, GID_OPERATOR, 358 S_IRUSR | S_IWUSR, "twe%d", device_get_unit(sc->twe_dev)); 359 360 /* 361 * Schedule ourselves to bring the controller up once interrupts are available. 362 * This isn't strictly necessary, since we disable interrupts while probing the 363 * controller, but it is more in keeping with common practice for other disk 364 * devices. 365 */ 366 bzero(&sc->twe_ich, sizeof(struct intr_config_hook)); 367 sc->twe_ich.ich_func = twe_startup; 368 sc->twe_ich.ich_arg = sc; 369 if (config_intrhook_establish(&sc->twe_ich) != 0) { 370 device_printf(sc->twe_dev, "can't establish configuration hook\n"); 371 twe_free(sc); 372 return(ENXIO); 373 } 374 375 return(0); 376} 377 378/******************************************************************************** 379 * Initialise the controller, locate disk devices and attach children to them. 380 */ 381static void 382twe_startup(void *arg) 383{ 384 struct twe_softc *sc = (struct twe_softc *)arg; 385 struct twe_drive *dr; 386 int i, error; 387 u_int32_t status_reg; 388 TWE_Param *drives, *capacity; 389 390 debug_called(4); 391 392 /* pull ourselves off the intrhook chain */ 393 config_intrhook_disestablish(&sc->twe_ich); 394 395 /* 396 * Wait for the controller to come ready. 397 */ 398 if (twe_wait_status(sc, TWE_STATUS_MICROCONTROLLER_READY, 60)) { 399 device_printf(sc->twe_dev, "microcontroller not ready\n"); 400 return; 401 } 402 403 /* 404 * Disable interrupts from the card while we're getting it into a safe state. 405 */ 406 twe_disable_interrupts(sc); 407 408 /* 409 * Soft reset the controller, look for the AEN acknowledging the reset, 410 * check for errors, drain the response queue. 411 */ 412 for (i = 0; i < TWE_MAX_RESET_TRIES; i++) { 413 414 if (i > 0) 415 device_printf(sc->twe_dev, "reset %d failed, trying again\n", i); 416 417 TWE_SOFT_RESET(sc); 418 419 if (twe_wait_status(sc, TWE_STATUS_ATTENTION_INTERRUPT, 15)) { 420 device_printf(sc->twe_dev, "no attention interrupt"); 421 continue; 422 } 423 if (twe_drain_aen_queue(sc)) { 424 device_printf(sc->twe_dev, "can't drain AEN queue\n"); 425 continue; 426 } 427 if (twe_find_aen(sc, TWE_AEN_SOFT_RESET)) { 428 device_printf(sc->twe_dev, "reset not reported\n"); 429 continue; 430 } 431 status_reg = TWE_STATUS(sc); 432 if (TWE_STATUS_ERRORS(status_reg) || twe_check_bits(sc, status_reg)) { 433 device_printf(sc->twe_dev, "controller errors detected\n"); 434 continue; 435 } 436 if (twe_drain_response_queue(sc)) { 437 device_printf(sc->twe_dev, "can't drain response queue\n"); 438 continue; 439 } 440 break; /* reset process complete */ 441 } 442 /* did we give up? */ 443 if (i >= TWE_MAX_RESET_TRIES) { 444 device_printf(sc->twe_dev, "can't initialise controller, giving up\n"); 445 return; 446 } 447 448 /* 449 * The controller is in a safe state, so try to find drives attached to it. 450 * XXX ick, magic numbers 451 */ 452 if ((drives = twe_get_param(sc, 3, 3, TWE_MAX_UNITS, NULL)) == NULL) { 453 device_printf(sc->twe_dev, "can't detect attached units\n"); 454 return; 455 } 456 457 /* 458 * For each detected unit, create a child device. 459 */ 460 for (i = 0, dr = &sc->twe_drive[0]; i < TWE_MAX_UNITS; i++, dr++) { 461 462 if (drives->data[i] == 0) /* unit not present */ 463 continue; 464 465 if ((capacity = twe_get_param(sc, TWE_UNIT_INFORMATION_TABLE_BASE + i, 4, 4, NULL)) == NULL) { 466 device_printf(sc->twe_dev, "error fetching capacity for unit %d\n", i); 467 continue; 468 } 469 dr->td_size = *(u_int32_t *)capacity->data; 470 free(capacity, M_DEVBUF); 471 472 /* build synthetic geometry as per controller internal rules */ 473 if (dr->td_size > 0x200000) { 474 dr->td_heads = 255; 475 dr->td_sectors = 63; 476 } else { 477 dr->td_heads = 64; 478 dr->td_sectors = 32; 479 } 480 dr->td_cylinders = dr->td_size / (dr->td_heads * dr->td_sectors); 481 482 dr->td_unit = i; 483 dr->td_state = TWE_DRIVE_UNKNOWN; /* XXX how do we find out what the real state is? */ 484 dr->td_raidlevel = TWE_DRIVE_UNKNOWN; /* XXX how do we find out what the real raidlevel is? */ 485 486 dr->td_disk = device_add_child(sc->twe_dev, NULL, -1); 487 if (dr->td_disk == 0) 488 device_printf(sc->twe_dev, "device_add_child failed\n"); 489 device_set_ivars(dr->td_disk, dr); 490 } 491 free(drives, M_DEVBUF); 492 493 if ((error = bus_generic_attach(sc->twe_dev)) != 0) 494 device_printf(sc->twe_dev, "bus_generic_attach returned %d\n", error); 495 496 /* 497 * Initialise connection with controller. 498 */ 499 twe_init_connection(sc); 500 501 /* 502 * Mark controller up and ready to run. 503 */ 504 sc->twe_state &= ~TWE_STATE_SHUTDOWN; 505 506 /* 507 * Finally enable interrupts . 508 */ 509 twe_enable_interrupts(sc); 510} 511 512/******************************************************************************** 513 * Disconnect from the controller completely, in preparation for unload. 514 */ 515static int 516twe_detach(device_t dev) 517{ 518 struct twe_softc *sc = device_get_softc(dev); 519 int s, error; 520 521 debug_called(4); 522 523 error = EBUSY; 524 s = splbio(); 525 if (sc->twe_state & TWE_STATE_OPEN) 526 goto out; 527 528 /* 529 * Shut the controller down. 530 */ 531 if ((error = twe_shutdown(dev))) 532 goto out; 533 534 twe_free(sc); 535 536 error = 0; 537 out: 538 splx(s); 539 return(error); 540} 541 542/******************************************************************************** 543 * Bring the controller down to a dormant state and detach all child devices. 544 * 545 * Note that we can assume that the bioq on the controller is empty, as we won't 546 * allow shutdown if any device is open. 547 */ 548static int 549twe_shutdown(device_t dev) 550{ 551 struct twe_softc *sc = device_get_softc(dev); 552 int i, s, error; 553 554 debug_called(4); 555 556 s = splbio(); 557 error = 0; 558 559 /* 560 * Mark the controller as shutting down, and disable any further interrupts. 561 */ 562 sc->twe_state |= TWE_STATE_SHUTDOWN; 563 twe_disable_interrupts(sc); 564 565 /* 566 * Delete all our child devices. 567 */ 568 for (i = 0; i < TWE_MAX_UNITS; i++) { 569 if (sc->twe_drive[i].td_disk != 0) { 570 if ((error = device_delete_child(sc->twe_dev, sc->twe_drive[i].td_disk)) != 0) 571 goto out; 572 sc->twe_drive[i].td_disk = 0; 573 } 574 } 575 576 out: 577 splx(s); 578 return(error); 579} 580 581/******************************************************************************** 582 * Bring the controller to a quiescent state, ready for system suspend. 583 * 584 * XXX this isn't really very well implemented. 585 */ 586static int 587twe_suspend(device_t dev) 588{ 589 struct twe_softc *sc = device_get_softc(dev); 590 int s; 591 592 debug_called(4); 593 594 s = splbio(); 595 sc->twe_state |= TWE_STATE_SUSPEND; 596 597 twe_disable_interrupts(sc); 598 splx(s); 599 600 return(0); 601} 602 603/******************************************************************************** 604 * Bring the controller back to a state ready for operation. 605 */ 606static int 607twe_resume(device_t dev) 608{ 609 struct twe_softc *sc = device_get_softc(dev); 610 611 debug_called(4); 612 613 sc->twe_state &= ~TWE_STATE_SUSPEND; 614 twe_enable_interrupts(sc); 615 616 return(0); 617} 618 619/******************************************************************************* 620 * Take an interrupt, or be poked by other code to look for interrupt-worthy 621 * status. 622 */ 623static void 624twe_intr(void *arg) 625{ 626 struct twe_softc *sc = (struct twe_softc *)arg; 627 u_int32_t status_reg; 628 629 debug_called(4); 630 631 /* 632 * Collect current interrupt status. 633 */ 634 status_reg = TWE_STATUS(sc); 635 twe_check_bits(sc, status_reg); 636 637 /* 638 * Dispatch based on interrupt status 639 */ 640 if (status_reg & TWE_STATUS_HOST_INTERRUPT) 641 twe_host_intr(sc); 642 if (status_reg & TWE_STATUS_ATTENTION_INTERRUPT) 643 twe_attention_intr(sc); 644 if (status_reg & TWE_STATUS_COMMAND_INTERRUPT) 645 twe_command_intr(sc); 646 if (status_reg * TWE_STATUS_RESPONSE_INTERRUPT) 647 twe_done(sc); 648}; 649 650/******************************************************************************** 651 ******************************************************************************** 652 Control Device 653 ******************************************************************************** 654 ********************************************************************************/ 655 656/******************************************************************************** 657 * Accept an open operation on the control device. 658 */ 659static int 660twe_open(dev_t dev, int flags, int fmt, struct proc *p) 661{ 662 int unit = minor(dev); 663 struct twe_softc *sc = devclass_get_softc(twe_devclass, unit); 664 665 sc->twe_state |= TWE_STATE_OPEN; 666 return(0); 667} 668 669/******************************************************************************** 670 * Accept the last close on the control device. 671 */ 672static int 673twe_close(dev_t dev, int flags, int fmt, struct proc *p) 674{ 675 int unit = minor(dev); 676 struct twe_softc *sc = devclass_get_softc(twe_devclass, unit); 677 678 sc->twe_state &= ~TWE_STATE_OPEN; 679 return (0); 680} 681 682/******************************************************************************** 683 * Handle controller-specific control operations. 684 */ 685static int 686twe_ioctl(dev_t dev, u_long cmd, caddr_t addr, int32_t flag, struct proc *p) 687{ 688 689 switch(cmd) { 690 default: 691 return(ENOTTY); 692 } 693} 694 695/******************************************************************************** 696 ******************************************************************************** 697 Command Submission 698 ******************************************************************************** 699 ********************************************************************************/ 700 701/******************************************************************************* 702 * Receive a bio structure from a child device and queue it on a particular 703 * controller, then poke the controller to start as much work as it can. 704 */ 705int 706twe_submit_buf(struct twe_softc *sc, struct bio *bp) 707{ 708 int s; 709 710 debug_called(4); 711 712 s = splbio(); 713 bioq_insert_tail(&sc->twe_bioq, bp); 714 splx(s); 715 716 twe_startio(sc); 717 return(0); 718} 719 720/******************************************************************************** 721 * Perform a TWE_OP_GET_PARAM command. If a callback function is provided, it 722 * will be called with the command when it's completed. If no callback is 723 * provided, we will wait for the command to complete and then return just the data. 724 * The caller is responsible for freeing the data when done with it. 725 */ 726static void * 727twe_get_param(struct twe_softc *sc, int table_id, int parameter_id, size_t size, void (* func)(struct twe_request *tr)) 728{ 729 struct twe_request *tr; 730 TWE_Command *cmd; 731 TWE_Param *param; 732 int error; 733 734 debug_called(4); 735 736 tr = NULL; 737 param = NULL; 738 739 /* get a command */ 740 if ((tr = twe_get_request(sc)) == NULL) 741 goto err; 742 743 /* get a buffer */ 744 if ((param = (TWE_Param *)malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 745 goto err; 746 tr->tr_data = param; 747 tr->tr_length = TWE_SECTOR_SIZE; 748 tr->tr_flags = TWE_CMD_DATAIN | TWE_CMD_DATAOUT; 749 tr->tr_complete = NULL; 750 tr->tr_private = NULL; 751 752 /* build the command for the controller */ 753 cmd = &tr->tr_command; 754 cmd->opcode = TWE_OP_GET_PARAM; 755 cmd->sgl_offset = 2; 756 cmd->size = 2; 757 cmd->unit = 0; 758 cmd->count = 1; 759 760 /* map the command/data into controller-visible space */ 761 twe_map_request(tr); 762 763 /* fill in the outbound parameter data */ 764 param->table_id = table_id; 765 param->parameter_id = parameter_id; 766 param->parameter_size_bytes = size; 767 768 /* submit the command and either wait or let the callback handle it */ 769 if (func == NULL) { 770 /* XXX could use twe_wait_request here if interrupts were enabled? */ 771 error = twe_immediate_request(tr); 772 if (error == 0) { 773 if (tr->tr_command.status != 0) { 774 debug(2, "command failed - 0x%x", tr->tr_command.status); 775 goto err; 776 } 777 twe_release_request(tr); 778 return(param); 779 } 780 } else { 781 tr->tr_complete = func; 782 error = twe_start(tr); 783 if (error == 0) 784 return(func); 785 } 786 787 /* something failed */ 788err: 789 debug(1, "failed"); 790 if (tr != NULL) 791 twe_release_request(tr); 792 if (param != NULL) 793 free(param, M_DEVBUF); 794 return(NULL); 795} 796 797/******************************************************************************** 798 * Perform a TWE_OP_INIT_CONNECTION command, returns nonzero on error. 799 * 800 * Typically called with interrupts disabled. 801 */ 802static int 803twe_init_connection(struct twe_softc *sc) 804{ 805 struct twe_request *tr; 806 TWE_Command *cmd; 807 int error; 808 809 debug_called(4); 810 811 /* get a command */ 812 if ((tr = twe_get_request(sc)) == NULL) 813 return(NULL); 814 815 /* build the command */ 816 cmd = &tr->tr_command; 817 cmd->opcode = TWE_OP_INIT_CONNECTION; 818 cmd->sgl_offset = 0; 819 cmd->size = 3; 820 cmd->unit = 0; 821 cmd->count = TWE_INIT_MESSAGE_CREDITS; 822 cmd->args.init_connection.response_queue_pointer = 0; 823 824 /* map the command into controller-visible space */ 825 twe_map_request(tr); 826 827 /* submit the command */ 828 error = twe_immediate_request(tr); 829 /* XXX check command result? */ 830 twe_unmap_request(tr); 831 twe_release_request(tr); 832 833 return(error); 834} 835 836#if 0 837/******************************************************************************** 838 * Start the command (tr) and sleep waiting for it to complete. 839 * 840 * Successfully completed commands are dequeued. 841 */ 842static int 843twe_wait_request(struct twe_request *tr) 844{ 845 int error, s; 846 847 debug_called(4); 848 849 error = 0; 850 tr->tr_private = tr; /* our wait channel */ 851 s = splbio(); 852 if ((error = twe_start(tr)) != 0) 853 goto out; 854 tsleep(tr->tr_private, PUSER, "twwcmd", hz); /* XXX more sensible timeout than 1s? */ 855 splx(s); 856 857out: 858 return(error); 859} 860#endif 861 862/******************************************************************************** 863 * Start the command (tr) and busy-wait for it to complete. 864 * This should only be used when interrupts are actually disabled (although it 865 * will work if they are not). 866 */ 867static int 868twe_immediate_request(struct twe_request *tr) 869{ 870 int error; 871 872 debug_called(4); 873 874 error = 0; 875 876 if ((error = twe_start(tr)) != 0) 877 return(error); 878 while (tr->tr_status == TWE_CMD_BUSY){ 879 twe_done(tr->tr_sc); 880 } 881 return(tr->tr_status != TWE_CMD_COMPLETE); 882} 883 884/******************************************************************************** 885 * Pull as much work off the softc's work queue as possible and give it to the 886 * controller. 887 */ 888static void 889twe_startio(struct twe_softc *sc) 890{ 891 struct twe_request *tr; 892 TWE_Command *cmd; 893 struct bio *bp; 894 int s, error; 895 896 debug_called(4); 897 898 /* spin until something prevents us from doing any work */ 899 s = splbio(); 900 for (;;) { 901 902 if (sc->twe_deferred == NULL) { 903 /* see if there's work to be done */ 904 if ((bp = bioq_first(&sc->twe_bioq)) == NULL) 905 break; 906 /* get a command */ 907 if ((tr = twe_get_request(sc)) == NULL) 908 break; 909 910 /* get the bio containing our work */ 911 bioq_remove(&sc->twe_bioq, bp); 912 splx(s); 913 914 /* connect the bio to the command */ 915 tr->tr_complete = twe_completeio; 916 tr->tr_private = bp; 917 tr->tr_data = bp->bio_data; 918 tr->tr_length = bp->bio_bcount; 919 cmd = &tr->tr_command; 920#ifdef FREEBSD_4 921 if (bp->bio_flags & B_READ) 922#else 923 if (bp->bio_cmd == BIO_READ) 924#endif 925 { 926 tr->tr_flags |= TWE_CMD_DATAIN; 927 cmd->opcode = TWE_OP_READ; 928 } else { 929 tr->tr_flags |= TWE_CMD_DATAOUT; 930 cmd->opcode = TWE_OP_WRITE; 931 } 932 933 /* build a suitable I/O command (assumes 512-byte rounded transfers) */ 934 cmd->sgl_offset = 3; 935 cmd->size = 3; 936 cmd->unit = ((struct twed_softc *)bp->bio_dev->si_drv1)->twed_drive->td_unit; 937 cmd->args.io.lba = bp->bio_pblkno; 938 cmd->count = (bp->bio_bcount + TWE_BLOCK_SIZE - 1) / TWE_BLOCK_SIZE; 939 940 /* map the command so the controller can work with it */ 941 twe_map_request(tr); 942 } else { 943 944 /* we previously deferred a command, try to submit it again */ 945 tr = sc->twe_deferred; 946 sc->twe_deferred = NULL; 947 } 948 949 /* try to give command to controller */ 950 error = twe_start(tr); 951 952 if (error != 0) { 953 if (error == EBUSY) { 954 sc->twe_deferred = tr; /* try it again later */ 955 break; /* don't try anything more for now */ 956 } 957 /* otherwise, fail the command */ 958 tr->tr_status = TWE_CMD_FAILED; 959 twe_completeio(tr); 960 } 961 s = splbio(); 962 } 963 splx(s); 964} 965 966/******************************************************************************** 967 * Handle completion of an I/O command. 968 */ 969static void 970twe_completeio(struct twe_request *tr) 971{ 972 TWE_Command *cmd; 973 struct twe_softc *sc = tr->tr_sc; 974 struct bio *bp = (struct bio *)tr->tr_private; 975 struct twed_softc *twed = (struct twed_softc *)bp->bio_dev->si_drv1; 976 977 debug_called(4); 978 979 if (tr->tr_status == TWE_CMD_COMPLETE) { 980 cmd = &tr->tr_command; 981 if (cmd->status != 0) { 982 bp->bio_error = EIO; 983 bp->bio_flags |= BIO_ERROR; 984 device_printf(twed->twed_dev, "command failed - 0x%x\n", cmd->status); 985 } 986 } else if (tr->tr_status == TWE_CMD_FAILED) { /* could be more verbose here? */ 987 bp->bio_error = EIO; 988 bp->bio_flags |= BIO_ERROR; 989 device_printf(sc->twe_dev, "command failed submission - controller wedged\n"); 990 } 991 twe_release_request(tr); 992 twed_intr(bp); 993} 994 995/******************************************************************************** 996 ******************************************************************************** 997 Command I/O to Controller 998 ******************************************************************************** 999 ********************************************************************************/ 1000 1001/******************************************************************************** 1002 * Try to deliver (tr) to the controller. 1003 * 1004 * Can be called at any interrupt level, with or without interrupts enabled. 1005 */ 1006static int 1007twe_start(struct twe_request *tr) 1008{ 1009 struct twe_softc *sc = tr->tr_sc; 1010 int i, s, done; 1011 u_int32_t status_reg; 1012 1013 debug_called(4); 1014 1015 /* give the command a request ID */ 1016 if (twe_get_requestid(tr)) 1017 return(EBUSY); /* can't handle it now, try later */ 1018 1019 /* mark the command as currently being processed */ 1020 tr->tr_status = TWE_CMD_BUSY; 1021 1022 /* spin briefly waiting for the controller to come ready */ 1023 for (i = 100000, done = 0; (i > 0) && !done; i--) { 1024 s = splbio(); 1025 1026 /* check to see if we can post a command */ 1027 status_reg = TWE_STATUS(sc); 1028 twe_check_bits(sc, status_reg); 1029 1030 if (!(status_reg & TWE_STATUS_COMMAND_QUEUE_FULL)) { 1031 TWE_COMMAND_QUEUE(sc, tr->tr_cmdphys); 1032 done = 1; 1033 /* move command to work queue */ 1034 TAILQ_INSERT_TAIL(&sc->twe_work, tr, tr_link); 1035 if (tr->tr_complete != NULL) { 1036 debug(3, "queued request %d with callback %p", tr->tr_command.request_id, tr->tr_complete); 1037 } else if (tr->tr_private != NULL) { 1038 debug(3, "queued request %d with wait channel %p", tr->tr_command.request_id, tr->tr_private); 1039 } else { 1040 debug(3, "queued request %d for polling caller", tr->tr_command.request_id); 1041 } 1042 } 1043 splx(s); /* drop spl to allow completion interrupts */ 1044 } 1045 1046 /* command is enqueued */ 1047 if (done) 1048 return(0); 1049 1050 /* 1051 * We couldn't get the controller to take the command; try submitting it again later. 1052 * This should only happen if something is wrong with the controller, or if we have 1053 * overestimated the number of commands it can accept. (Should we actually reject 1054 * the command at this point?) 1055 */ 1056 twe_release_requestid(tr); 1057 return(EBUSY); 1058} 1059 1060/******************************************************************************** 1061 * Poll the controller (sc) for completed commands. 1062 * 1063 * Can be called at any interrupt level, with or without interrupts enabled. 1064 */ 1065static void 1066twe_done(struct twe_softc *sc) 1067{ 1068 TWE_Response_Queue rq; 1069 struct twe_request *tr; 1070 int s, found; 1071 u_int32_t status_reg; 1072 1073 debug_called(5); 1074 1075 /* loop collecting completed commands */ 1076 found = 0; 1077 s = splbio(); 1078 for (;;) { 1079 status_reg = TWE_STATUS(sc); 1080 twe_check_bits(sc, status_reg); /* XXX should this fail? */ 1081 1082 if (!(status_reg & TWE_STATUS_RESPONSE_QUEUE_EMPTY)) { 1083 found = 1; 1084 rq = TWE_RESPONSE_QUEUE(sc); 1085 tr = sc->twe_cmdlookup[rq.u.response_id]; /* find command */ 1086 if (tr != NULL) { /* paranoia */ 1087 tr->tr_status = TWE_CMD_COMPLETE; 1088 debug(3, "completed request id %d with status %d", tr->tr_command.request_id, tr->tr_command.status); 1089 twe_release_requestid(tr); 1090 } else { 1091 debug(2, "done event for nonbusy id %d\n", rq.u.response_id); 1092 } 1093 } else { 1094 break; /* no response ready */ 1095 } 1096 } 1097 splx(s); 1098 1099 /* if we've completed any commands, try posting some more */ 1100 if (found) 1101 twe_startio(sc); 1102 1103 /* handle completion and timeouts */ 1104 twe_complete(sc); 1105} 1106 1107/******************************************************************************** 1108 * Perform post-completion processing for commands on (sc). 1109 * 1110 * This is split from twe_done as it can be safely deferred and run at a lower 1111 * priority level should facilities for such a thing become available. 1112 */ 1113static void 1114twe_complete(struct twe_softc *sc) 1115{ 1116 struct twe_request *tr, *nr; 1117 int s; 1118 1119 debug_called(5); 1120 1121 s = splbio(); 1122 1123 /* 1124 * Scan the list of busy/done commands, dispatch them appropriately. 1125 */ 1126 tr = TAILQ_FIRST(&sc->twe_work); 1127 while (tr != NULL) { 1128 nr = TAILQ_NEXT(tr, tr_link); 1129 1130 /* command has been completed in some fashion */ 1131 if (tr->tr_status > TWE_CMD_BUSY) { 1132 1133 /* unmap the command's data buffer */ 1134 twe_unmap_request(tr); 1135 1136 /* remove from work list */ 1137 TAILQ_REMOVE(&sc->twe_work, tr, tr_link); 1138 1139 /* dispatch to suit command originator */ 1140 if (tr->tr_complete != NULL) { /* completion callback */ 1141 debug(2, "call completion handler %p", tr->tr_complete); 1142 tr->tr_complete(tr); 1143 1144 } else if (tr->tr_private != NULL) { /* caller is asleep waiting */ 1145 debug(2, "wake up command owner on %p", tr->tr_private); 1146 wakeup_one(tr->tr_private); 1147 1148 } else { /* caller is polling command */ 1149 debug(2, "command left for owner"); 1150 } 1151 } 1152 tr = nr; 1153 } 1154 splx(s); 1155} 1156 1157/******************************************************************************** 1158 * Wait for (status) to be set in the controller status register for up to 1159 * (timeout) seconds. Returns 0 if found, nonzero if we time out. 1160 * 1161 * Note: this busy-waits, rather than sleeping, since we may be called with 1162 * eg. clock interrupts masked. 1163 */ 1164static int 1165twe_wait_status(struct twe_softc *sc, u_int32_t status, int timeout) 1166{ 1167 time_t expiry; 1168 u_int32_t status_reg; 1169 1170 debug_called(4); 1171 1172 expiry = time_second + timeout; 1173 1174 do { 1175 status_reg = TWE_STATUS(sc); 1176 if (status_reg & status) /* got the required bit(s)? */ 1177 return(0); 1178 DELAY(100000); 1179 } while (time_second <= expiry); 1180 1181 return(1); 1182} 1183 1184/******************************************************************************** 1185 * Drain the response queue, which may contain responses to commands we know 1186 * nothing about. 1187 */ 1188static int 1189twe_drain_response_queue(struct twe_softc *sc) 1190{ 1191 TWE_Response_Queue rq; 1192 u_int32_t status_reg; 1193 1194 debug_called(4); 1195 1196 for (;;) { /* XXX give up eventually? */ 1197 status_reg = TWE_STATUS(sc); 1198 if (twe_check_bits(sc, status_reg)) 1199 return(1); 1200 if (status_reg & TWE_STATUS_RESPONSE_QUEUE_EMPTY) 1201 return(0); 1202 rq = TWE_RESPONSE_QUEUE(sc); 1203 } 1204} 1205 1206/******************************************************************************** 1207 ******************************************************************************** 1208 Interrupt Handling 1209 ******************************************************************************** 1210 ********************************************************************************/ 1211 1212/******************************************************************************** 1213 * Host interrupt. 1214 * 1215 * XXX what does this mean? 1216 */ 1217static void 1218twe_host_intr(struct twe_softc *sc) 1219{ 1220 debug_called(4); 1221 1222 device_printf(sc->twe_dev, "host interrupt\n"); 1223 TWE_CONTROL(sc, TWE_CONTROL_CLEAR_HOST_INTERRUPT); 1224} 1225 1226/******************************************************************************** 1227 * Attention interrupt. 1228 * 1229 * Signalled when the controller has one or more AENs for us. 1230 */ 1231static void 1232twe_attention_intr(struct twe_softc *sc) 1233{ 1234 debug_called(4); 1235 1236 /* instigate a poll for AENs */ 1237 if (twe_fetch_aen(sc)) { 1238 device_printf(sc->twe_dev, "error polling for signalled AEN\n"); 1239 } else { 1240 TWE_CONTROL(sc, TWE_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1241 } 1242} 1243 1244/******************************************************************************** 1245 * Command interrupt. 1246 * 1247 * Signalled when the controller can handle more commands. 1248 */ 1249static void 1250twe_command_intr(struct twe_softc *sc) 1251{ 1252 debug_called(4); 1253 1254 /* 1255 * We don't use this, rather we try to submit commands when we receive 1256 * them, and when other commands have completed. Mask it so we don't get 1257 * another one. 1258 */ 1259 device_printf(sc->twe_dev, "command interrupt\n"); 1260 TWE_CONTROL(sc, TWE_CONTROL_MASK_COMMAND_INTERRUPT); 1261} 1262 1263/******************************************************************************** 1264 * Enable the useful interrupts from the controller. 1265 */ 1266static void 1267twe_enable_interrupts(struct twe_softc *sc) 1268{ 1269 sc->twe_state |= TWE_STATE_INTEN; 1270 TWE_CONTROL(sc, 1271 TWE_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1272 TWE_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1273 TWE_CONTROL_ENABLE_INTERRUPTS); 1274} 1275 1276/******************************************************************************** 1277 * Disable interrupts from the controller. 1278 */ 1279static void 1280twe_disable_interrupts(struct twe_softc *sc) 1281{ 1282 TWE_CONTROL(sc, TWE_CONTROL_DISABLE_INTERRUPTS); 1283 sc->twe_state &= ~TWE_STATE_INTEN; 1284} 1285 1286/******************************************************************************** 1287 ******************************************************************************** 1288 Asynchronous Event Handling 1289 ******************************************************************************** 1290 ********************************************************************************/ 1291 1292/******************************************************************************** 1293 * Request an AEN from the controller. 1294 */ 1295static int 1296twe_fetch_aen(struct twe_softc *sc) 1297{ 1298 1299 debug_called(4); 1300 1301 /* XXX ick, magic numbers */ 1302 if ((twe_get_param(sc, 0x401, 2, 2, twe_handle_aen)) == NULL) 1303 return(EIO); 1304 return(0); 1305} 1306 1307/******************************************************************************** 1308 * Handle an AEN returned by the controller. 1309 */ 1310static void 1311twe_handle_aen(struct twe_request *tr) 1312{ 1313 struct twe_softc *sc = tr->tr_sc; 1314 TWE_Param *param; 1315 u_int16_t aen; 1316 1317 debug_called(4); 1318 1319 /* XXX check for command success somehow? */ 1320 1321 param = (TWE_Param *)tr->tr_data; 1322 aen = *(u_int16_t *)(param->data); 1323 1324 free(tr->tr_data, M_DEVBUF); 1325 twe_release_request(tr); 1326 twe_enqueue_aen(sc, aen); 1327 1328 /* XXX poll for more AENs? */ 1329} 1330 1331/******************************************************************************** 1332 * Pull AENs out of the controller and park them in the queue, in a context where 1333 * interrupts aren't active. Return nonzero if we encounter any errors in the 1334 * process of obtaining all the available AENs. 1335 */ 1336static int 1337twe_drain_aen_queue(struct twe_softc *sc) 1338{ 1339 TWE_Param *param; 1340 u_int16_t aen; 1341 1342 for (;;) { 1343 /* XXX ick, magic numbers */ 1344 param = twe_get_param(sc, 0x401, 2, 2, NULL); 1345 if (param == NULL) 1346 return(1); 1347 aen = *(u_int16_t *)(param->data); 1348 if (aen == TWE_AEN_QUEUE_EMPTY) 1349 return(0); 1350 twe_enqueue_aen(sc, aen); 1351 } 1352} 1353 1354/******************************************************************************** 1355 * Push an AEN that we've received onto the queue. 1356 * 1357 * Note that we have to lock this against reentrance, since it may be called 1358 * from both interrupt and non-interrupt context. 1359 * 1360 * If someone is waiting for the AEN we have, wake them up. 1361 */ 1362static void 1363twe_enqueue_aen(struct twe_softc *sc, u_int16_t aen) 1364{ 1365 int s, next; 1366 1367 debug_called(4); 1368 1369 debug(1, "queueing AEN <%s>", twe_name_aen(aen)); 1370 1371 s = splbio(); 1372 /* enqueue the AEN */ 1373 next = ((sc->twe_aen_head + 1) % TWE_Q_LENGTH); 1374 if (next != sc->twe_aen_tail) { 1375 sc->twe_aen_queue[sc->twe_aen_head] = aen; 1376 sc->twe_aen_head = next; 1377 } else { 1378 device_printf(sc->twe_dev, "AEN queue overflow, lost AEN <%s>\n", twe_name_aen(aen)); 1379 } 1380 1381 /* anyone looking for this AEN? */ 1382 if (sc->twe_wait_aen == aen) { 1383 sc->twe_wait_aen = -1; 1384 wakeup(&sc->twe_wait_aen); 1385 } 1386 splx(s); 1387} 1388 1389#if 0 1390/******************************************************************************** 1391 * Pop an AEN off the queue, or return -1 if there are none left. 1392 * 1393 * We are more or less interrupt-safe, so don't block interrupts. 1394 */ 1395static int 1396twe_dequeue_aen(struct twe_softc *sc) 1397{ 1398 int result; 1399 1400 debug_called(4); 1401 1402 if (sc->twe_aen_tail == sc->twe_aen_head) { 1403 result = -1; 1404 } else { 1405 result = sc->twe_aen_queue[sc->twe_aen_tail]; 1406 sc->twe_aen_tail = ((sc->twe_aen_tail + 1) % TWE_Q_LENGTH); 1407 } 1408 return(result); 1409} 1410#endif 1411 1412/******************************************************************************** 1413 * Check to see if the requested AEN is in the queue. 1414 * 1415 * XXX we could probably avoid masking interrupts here 1416 */ 1417static int 1418twe_find_aen(struct twe_softc *sc, u_int16_t aen) 1419{ 1420 int i, s, missing; 1421 1422 missing = 1; 1423 s = splbio(); 1424 for (i = sc->twe_aen_tail; (i != sc->twe_aen_head) && missing; i = (i + 1) % TWE_Q_LENGTH) { 1425 if (sc->twe_aen_queue[i] == aen) 1426 missing = 0; 1427 } 1428 return(missing); 1429} 1430 1431 1432#if 0 /* currently unused */ 1433/******************************************************************************** 1434 * Sleep waiting for at least (timeout) seconds until we see (aen) as 1435 * requested. Returns nonzero on timeout or failure. 1436 * 1437 * XXX: this should not be used in cases where there may be more than one sleeper 1438 * without a mechanism for registering multiple sleepers. 1439 */ 1440static int 1441twe_wait_aen(struct twe_softc *sc, int aen, int timeout) 1442{ 1443 time_t expiry; 1444 int found, s; 1445 1446 debug_called(4); 1447 1448 expiry = time_second + timeout; 1449 found = 0; 1450 1451 s = splbio(); 1452 sc->twe_wait_aen = aen; 1453 do { 1454 twe_fetch_aen(sc); 1455 tsleep(&sc->twe_wait_aen, PZERO, "twewaen", hz); 1456 if (sc->twe_wait_aen == -1) 1457 found = 1; 1458 } while ((time_second <= expiry) && !found); 1459 splx(s); 1460 return(!found); 1461} 1462#endif 1463 1464/******************************************************************************** 1465 ******************************************************************************** 1466 Command Buffer Management 1467 ******************************************************************************** 1468 ********************************************************************************/ 1469 1470/******************************************************************************** 1471 * Get a new command buffer. 1472 * 1473 * This may return NULL in low-memory cases. 1474 * 1475 * Note that using malloc() is expensive (the command buffer is << 1 page) but 1476 * necessary if we are to be a loadable module before the zone allocator is fixed. 1477 * On the other hand, using malloc ensures that the command structure at the top 1478 * of the request is aligned within the controller's constraints (64 bytes). 1479 * 1480 * If possible, we recycle a command buffer that's been used before. 1481 * 1482 * XXX currently, commands are mapped into controller space just before being 1483 * handed to the controller. It may be more efficient to do that here. 1484 */ 1485static struct twe_request * 1486twe_get_request(struct twe_softc *sc) 1487{ 1488 struct twe_request *tr; 1489 int s, error; 1490 1491 debug_called(4); 1492 1493 /* try to reuse an old buffer */ 1494 s = splbio(); 1495 if ((tr = TAILQ_FIRST(&sc->twe_freecmds)) != NULL) 1496 TAILQ_REMOVE(&sc->twe_freecmds, tr, tr_link); 1497 splx(s); 1498 1499 /* allocate a new command buffer? */ 1500 if (tr == NULL) { 1501 tr = (struct twe_request *)malloc(sizeof(*tr), M_DEVBUF, M_NOWAIT); 1502 if (tr != NULL) { 1503 bzero(tr, sizeof(*tr)); 1504 tr->tr_sc = sc; 1505 error = bus_dmamap_create(sc->twe_buffer_dmat, 0, &tr->tr_cmdmap); 1506 if (error) { 1507 free(tr, M_DEVBUF); 1508 return(NULL); 1509 } 1510 error = bus_dmamap_create(sc->twe_buffer_dmat, 0, &tr->tr_dmamap); 1511 if (error) { 1512 bus_dmamap_destroy(sc->twe_buffer_dmat, tr->tr_cmdmap); 1513 free(tr, M_DEVBUF); 1514 return(NULL); 1515 } 1516 } 1517 } 1518 1519 /* initialise some fields to their defaults */ 1520 tr->tr_status = TWE_CMD_SETUP; /* command is in setup phase */ 1521 tr->tr_flags = 0; 1522 tr->tr_command.host_id = 0; /* not used */ 1523 tr->tr_command.status = 0; /* before submission to controller */ 1524 tr->tr_command.flags = 0; /* not used */ 1525 return(tr); 1526} 1527 1528/******************************************************************************** 1529 * Release a command buffer for recycling. 1530 * 1531 * XXX It might be a good idea to limit the number of commands we save for reuse 1532 * if it's shown that this list bloats out massively. 1533 */ 1534static void 1535twe_release_request(struct twe_request *tr) 1536{ 1537 int s; 1538 1539 debug_called(4); 1540 1541 s = splbio(); 1542 TAILQ_INSERT_HEAD(&tr->tr_sc->twe_freecmds, tr, tr_link); 1543 splx(s); 1544} 1545 1546/******************************************************************************** 1547 * Permanently discard a command buffer. 1548 */ 1549static void 1550twe_free_request(struct twe_request *tr) 1551{ 1552 struct twe_softc *sc = tr->tr_sc; 1553 1554 debug_called(4); 1555 1556 bus_dmamap_destroy(sc->twe_buffer_dmat, tr->tr_cmdmap); 1557 bus_dmamap_destroy(sc->twe_buffer_dmat, tr->tr_dmamap); 1558 free(tr, M_DEVBUF); 1559} 1560 1561/******************************************************************************** 1562 * Allocate a request ID for a command about to be submitted. 1563 */ 1564static int 1565twe_get_requestid(struct twe_request *tr) 1566{ 1567 struct twe_softc *sc = tr->tr_sc; 1568 int i, s, result; 1569 1570 debug_called(4); 1571 1572 s = splbio(); 1573 result = 1; 1574 1575 /* XXX linear search is slow */ 1576 for (i = 0; i < TWE_Q_LENGTH; i++) { 1577 if (sc->twe_cmdlookup[i] == NULL) { 1578 tr->tr_command.request_id = i; 1579 sc->twe_cmdlookup[i] = tr; 1580 result = 0; 1581 break; 1582 } 1583 } 1584 splx(s); 1585 1586 return(result); 1587} 1588 1589/******************************************************************************** 1590 * Free a command's request ID for reuse. 1591 */ 1592static void 1593twe_release_requestid(struct twe_request *tr) 1594{ 1595 struct twe_softc *sc = tr->tr_sc; 1596 1597 debug_called(4); 1598 1599 sc->twe_cmdlookup[tr->tr_command.request_id] = 0; /* XXX atomic? */ 1600} 1601 1602/******************************************************************************** 1603 * Map/unmap (tr)'s command and data in the controller's addressable space. 1604 * 1605 * These routines ensure that the data which the controller is going to try to 1606 * access is actually visible to the controller, in a machine-independant 1607 * fasion. Due to a hardware limitation, I/O buffers must be 512-byte aligned 1608 * and we take care of that here as well. 1609 */ 1610static void 1611twe_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 1612{ 1613 struct twe_request *tr = (struct twe_request *)arg; 1614 TWE_Command *cmd = &tr->tr_command; 1615 int i; 1616 1617 debug_called(4); 1618 1619 /* save base of first segment in command (applicable if there only one segment) */ 1620 tr->tr_dataphys = segs[0].ds_addr; 1621 1622 /* correct command size for s/g list size */ 1623 tr->tr_command.size += 2 * nsegments; 1624 1625 /* 1626 * Due to the fact that parameter and I/O commands have the scatter/gather list in 1627 * different places, we need to determine which sort of command this actually is 1628 * before we can populate it correctly. 1629 */ 1630 switch(cmd->sgl_offset) { 1631 case 2: 1632 for (i = 0; i < nsegments; i++) { 1633 cmd->args.param.sgl[i].address = segs[i].ds_addr; 1634 cmd->args.param.sgl[i].length = segs[i].ds_len; 1635 } 1636 for (; i < TWE_MAX_SGL_LENGTH; i++) { /* XXX necessary? */ 1637 cmd->args.param.sgl[i].address = 0; 1638 cmd->args.param.sgl[i].length = 0; 1639 } 1640 break; 1641 case 3: 1642 for (i = 0; i < nsegments; i++) { 1643 cmd->args.io.sgl[i].address = segs[i].ds_addr; 1644 cmd->args.io.sgl[i].length = segs[i].ds_len; 1645 } 1646 for (; i < TWE_MAX_SGL_LENGTH; i++) { /* XXX necessary? */ 1647 cmd->args.io.sgl[i].address = 0; 1648 cmd->args.io.sgl[i].length = 0; 1649 } 1650 break; 1651 default: 1652 /* no s/g list, nothing to do */ 1653 } 1654} 1655 1656static void 1657twe_setup_request_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 1658{ 1659 struct twe_request *tr = (struct twe_request *)arg; 1660 1661 debug_called(4); 1662 1663 /* command can't cross a page boundary */ 1664 tr->tr_cmdphys = segs[0].ds_addr; 1665} 1666 1667static void 1668twe_map_request(struct twe_request *tr) 1669{ 1670 struct twe_softc *sc = tr->tr_sc; 1671 1672 debug_called(4); 1673 1674 1675 /* 1676 * Map the command into bus space. 1677 */ 1678 bus_dmamap_load(sc->twe_buffer_dmat, tr->tr_cmdmap, &tr->tr_command, sizeof(tr->tr_command), 1679 twe_setup_request_dmamap, tr, 0); 1680 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_cmdmap, BUS_DMASYNC_PREWRITE); 1681 1682 /* 1683 * If the command involves data, map that too. 1684 */ 1685 if (tr->tr_data != NULL) { 1686 1687 /* 1688 * Data must be 64-byte aligned; allocate a fixup buffer if it's not. 1689 */ 1690 if (((vm_offset_t)tr->tr_data % TWE_ALIGNMENT) != 0) { 1691 tr->tr_realdata = tr->tr_data; /* save pointer to 'real' data */ 1692 tr->tr_flags |= TWE_CMD_ALIGNBUF; 1693 tr->tr_data = malloc(tr->tr_length, M_DEVBUF, M_NOWAIT); /* XXX check result here */ 1694 } 1695 1696 /* 1697 * Map the data buffer into bus space and build the s/g list. 1698 */ 1699 bus_dmamap_load(sc->twe_buffer_dmat, tr->tr_dmamap, tr->tr_data, tr->tr_length, 1700 twe_setup_data_dmamap, tr, 0); 1701 if (tr->tr_flags & TWE_CMD_DATAIN) 1702 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap, BUS_DMASYNC_PREREAD); 1703 if (tr->tr_flags & TWE_CMD_DATAOUT) { 1704 /* if we're using an alignment buffer, and we're writing data, copy the real data out */ 1705 if (tr->tr_flags & TWE_CMD_ALIGNBUF) 1706 bcopy(tr->tr_realdata, tr->tr_data, tr->tr_length); 1707 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap, BUS_DMASYNC_PREWRITE); 1708 } 1709 } 1710} 1711 1712static void 1713twe_unmap_request(struct twe_request *tr) 1714{ 1715 struct twe_softc *sc = tr->tr_sc; 1716 1717 debug_called(4); 1718 1719 /* 1720 * Unmap the command from bus space. 1721 */ 1722 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_cmdmap, BUS_DMASYNC_POSTWRITE); 1723 bus_dmamap_unload(sc->twe_buffer_dmat, tr->tr_cmdmap); 1724 1725 /* 1726 * If the command involved data, unmap that too. 1727 */ 1728 if (tr->tr_data != NULL) { 1729 1730 if (tr->tr_flags & TWE_CMD_DATAIN) { 1731 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap, BUS_DMASYNC_POSTREAD); 1732 /* if we're using an alignment buffer, and we're reading data, copy the real data in */ 1733 if (tr->tr_flags & TWE_CMD_ALIGNBUF) 1734 bcopy(tr->tr_data, tr->tr_realdata, tr->tr_length); 1735 } 1736 if (tr->tr_flags & TWE_CMD_DATAOUT) 1737 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap, BUS_DMASYNC_POSTWRITE); 1738 1739 bus_dmamap_unload(sc->twe_buffer_dmat, tr->tr_dmamap); 1740 } 1741 1742 /* free alignment buffer if it was used */ 1743 if (tr->tr_flags & TWE_CMD_ALIGNBUF) { 1744 free(tr->tr_data, M_DEVBUF); 1745 tr->tr_data = tr->tr_realdata; /* restore 'real' data pointer */ 1746 } 1747} 1748 1749/******************************************************************************** 1750 ******************************************************************************** 1751 Debugging 1752 ******************************************************************************** 1753 ********************************************************************************/ 1754 1755/******************************************************************************** 1756 * Complain if the status bits aren't what we're expecting. 1757 */ 1758static int 1759twe_check_bits(struct twe_softc *sc, u_int32_t status_reg) 1760{ 1761 int result; 1762 1763 result = 0; 1764 if ((status_reg & TWE_STATUS_EXPECTED_BITS) != TWE_STATUS_EXPECTED_BITS) { 1765 device_printf(sc->twe_dev, "missing expected status bit(s) %b\n", ~status_reg & TWE_STATUS_EXPECTED_BITS, 1766 TWE_STATUS_BITS_DESCRIPTION); 1767 result = 1; 1768 } 1769 1770 if ((status_reg & TWE_STATUS_UNEXPECTED_BITS) != 0) { 1771 device_printf(sc->twe_dev, "unexpected status bit(s) %b\n", status_reg & TWE_STATUS_UNEXPECTED_BITS, 1772 TWE_STATUS_BITS_DESCRIPTION); 1773 result = 1; 1774 } 1775 return(result); 1776} 1777 1778/******************************************************************************** 1779 * Return a string naming (aen). 1780 */ 1781static struct { 1782 u_int16_t aen; 1783 char *desc; 1784} twe_aen_names[] = { 1785 {0x0000, "queue empty"}, 1786 {0x0001, "soft reset"}, 1787 {0x0002, "degraded mirror"}, 1788 {0x0003, "controller error"}, 1789 {0x0004, "rebuild fail"}, 1790 {0x0005, "rebuild done"}, 1791 {0x00ff, "aen queue full"}, 1792 {0, NULL} 1793}; 1794 1795static char * 1796twe_name_aen(u_int16_t aen) 1797{ 1798 int i; 1799 static char buf[16]; 1800 1801 for (i = 0; twe_aen_names[i].desc != NULL; i++) 1802 if (twe_aen_names[i].aen == aen) 1803 return(twe_aen_names[i].desc); 1804 1805 sprintf(buf, "0x%x", aen); 1806 return(buf); 1807} 1808 1809#if 0 1810/******************************************************************************** 1811 * Return a string naming (opcode). 1812 */ 1813static struct { 1814 u_int8_t opcode; 1815 char *desc; 1816} twe_opcode_names[] = { 1817 {0x00, "nop"}, 1818 {0x01, "init connection"}, 1819 {0x02, "read"}, 1820 {0x03, "write"}, 1821 {0x04, "verify"}, 1822 {0x12, "get param"}, 1823 {0x13, "set param"}, 1824 {0x1a, "sector info"}, 1825 {0x1c, "listen"}, 1826 {0, NULL} 1827}; 1828 1829static char * 1830twe_name_opcode(u_int8_t opcode) 1831{ 1832 int i; 1833 static char buf[16]; 1834 1835 for (i = 0; twe_opcode_names[i].desc != NULL; i++) 1836 if (twe_opcode_names[i].opcode == opcode) 1837 return(twe_opcode_names[i].desc); 1838 1839 sprintf(buf, "0x%x", opcode); 1840 return(buf); 1841} 1842 1843/******************************************************************************** 1844 * Print a request/command in human-readable format. 1845 */ 1846static void 1847twe_print_request(struct twe_request *tr) 1848{ 1849 device_t dev = tr->tr_sc->twe_dev; 1850 TWE_Command *cmd = &tr->tr_command; 1851 int i; 1852 1853 device_printf(dev, "CMD: request_id %d opcode <%s> size %d unit %d host_id %d\n", 1854 cmd->request_id, twe_name_opcode(cmd->opcode), cmd->size, cmd->unit, cmd->host_id); 1855 device_printf(dev, " status %d flags 0x%x count %d sgl_offset %d\n", 1856 cmd->status, cmd->flags, cmd->count, cmd->sgl_offset); 1857 switch(cmd->sgl_offset) { 1858 case 3: 1859 device_printf(dev, " lba %d\n", cmd->args.io.lba); 1860 for (i = 0; (i < TWE_MAX_SGL_LENGTH) && (cmd->args.io.sgl[i].length != 0); i++) 1861 device_printf(dev, " %d: 0x%x/%d\n", 1862 i, cmd->args.io.sgl[i].address, cmd->args.io.sgl[i].length); 1863 break; 1864 1865 case 2: 1866 for (i = 0; (i < TWE_MAX_SGL_LENGTH) && (cmd->args.param.sgl[i].length != 0); i++) 1867 device_printf(dev, " %d: 0x%x/%d\n", 1868 i, cmd->args.param.sgl[i].address, cmd->args.param.sgl[i].length); 1869 break; 1870 1871 default: 1872 device_printf(dev, " response queue pointer 0x%x\n", 1873 cmd->args.init_connection.response_queue_pointer); 1874 } 1875 device_printf(dev, " tr_command %p/0x%x tr_data %p/0x%x,%d\n", 1876 tr, tr->tr_cmdphys, tr->tr_data, tr->tr_dataphys, tr->tr_length); 1877 device_printf(dev, " tr_status %d tr_flags 0x%x tr_complete %p tr_private %p\n", 1878 tr->tr_status, tr->tr_flags, tr->tr_complete, tr->tr_private); 1879} 1880 1881/******************************************************************************** 1882 * Print current controller status, call from DDB. 1883 */ 1884void 1885twe_report(void) 1886{ 1887 u_int32_t status_reg; 1888 struct twe_softc *sc; 1889 int i, s; 1890 1891 s = splbio(); 1892 for (i = 0; (sc = devclass_get_softc(twe_devclass, i)) != NULL; i++) { 1893 status_reg = TWE_STATUS(sc); 1894 device_printf(sc->twe_dev, "status %b\n", status_reg, TWE_STATUS_BITS_DESCRIPTION); 1895 } 1896 splx(s); 1897} 1898#endif 1899