1285SN/A/* $FreeBSD$ */ 2367SN/A/* $NecBSD: tmc18c30reg.h,v 1.4.24.1 2001/06/08 06:27:50 honda Exp $ */ 3285SN/A/* $NetBSD$ */ 4285SN/A 5285SN/A/*- 6285SN/A * [NetBSD for NEC PC-98 series] 7285SN/A * Copyright (c) 1996, 1997, 1998 8285SN/A * NetBSD/pc98 porting staff. All rights reserved. 9285SN/A * Copyright (c) 1996, 1997, 1998 10285SN/A * Kouichi Matsuda. All rights reserved. 11285SN/A * 12285SN/A * Redistribution and use in source and binary forms, with or without 13285SN/A * modification, are permitted provided that the following conditions 14285SN/A * are met: 15285SN/A * 1. Redistributions of source code must retain the above copyright 16285SN/A * notice, this list of conditions and the following disclaimer. 17285SN/A * 2. Redistributions in binary form must reproduce the above copyright 18285SN/A * notice, this list of conditions and the following disclaimer in the 19285SN/A * documentation and/or other materials provided with the distribution. 20285SN/A * 3. The name of the author may not be used to endorse or promote products 21285SN/A * derived from this software without specific prior written permission. 22285SN/A * 23285SN/A * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24285SN/A * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25285SN/A * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26285SN/A * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 27285SN/A * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28285SN/A * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29285SN/A * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30285SN/A * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 31285SN/A * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 32285SN/A * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33285SN/A * POSSIBILITY OF SUCH DAMAGE. 34285SN/A */ 35285SN/A 36285SN/A#ifndef _TMC18C30REG_H_ 37285SN/A#define _TMC18C30REG_H_ 38285SN/A 39285SN/A#define tmc_wdata 0x00 40285SN/A#define tmc_rdata 0x00 41285SN/A 42285SN/A#define tmc_bctl 0x01 43285SN/A#define BCTL_BUSFREE 0x00 44285SN/A#define BCTL_RST 0x01 45285SN/A#define BCTL_SEL 0x02 46285SN/A#define BCTL_BSY 0x04 47285SN/A#define BCTL_ATN 0x08 48285SN/A#define BCTL_IO 0x10 49285SN/A#define BCTL_CD 0x20 50285SN/A#define BCTL_MSG 0x40 51285SN/A#define BCTL_BUSEN 0x80 52285SN/A#define tmc_bstat 0x01 53285SN/A#define BSTAT_BSY 0x01 54285SN/A#define BSTAT_MSG 0x02 55285SN/A#define BSTAT_IO 0x04 56285SN/A#define BSTAT_CMD 0x08 57285SN/A#define BSTAT_REQ 0x10 58285SN/A#define BSTAT_SEL 0x20 59285SN/A#define BSTAT_ACK 0x40 60285SN/A 61285SN/A#define tmc_ictl 0x02 62285SN/A#define ICTL_FIFO 0x10 63285SN/A#define ICTL_ARBIT 0x20 64285SN/A#define ICTL_SEL 0x40 65285SN/A#define ICTL_CD 0x80 66285SN/A#define ICTL_ALLINT (ICTL_ARBIT | ICTL_CD | ICTL_SEL | ICTL_FIFO) 67285SN/A#define tmc_astat 0x02 68285SN/A#define ASTAT_INT 0x01 69285SN/A#define ASTAT_ARBIT 0x02 70285SN/A#define ASTAT_PARERR 0x04 71285SN/A#define ASTAT_SCSIRST 0x08 72285SN/A#define ASTAT_STATMASK 0x0f 73285SN/A#define ASTAT_FIFODIR 0x10 74285SN/A#define ASTAT_FIFOEN 0x20 75367SN/A#define ASTAT_PARENB 0x40 76285SN/A#define ASTAT_BUSEN 0x80 77285SN/A 78285SN/A#define tmc_ssctl 0x03 79285SN/A#define SSCTL_FSYNCHEN 0x40 80285SN/A#define SSCTL_SYNCHEN 0x80 81285SN/A#define tmc_fstat 0x03 82285SN/A 83285SN/A#define tmc_fctl 0x04 84285SN/A#define FCTL_CLRFIFO 0x01 85285SN/A#define FCTL_ARBIT 0x04 86285SN/A#define FCTL_PARENB 0x08 87285SN/A#define FCTL_INTEN 0x10 88285SN/A#define FCTL_CLRINT 0x20 89285SN/A#define FCTL_FIFOW 0x40 90285SN/A#define FCTL_FIFOEN 0x80 91285SN/A#define tmc_icnd 0x04 92285SN/A 93367SN/A#define tmc_mctl 0x05 94285SN/A#define tmc_idlsb 0x05 95285SN/A 96285SN/A#define tmc_idmsb 0x06 97285SN/A 98285SN/A#define tmc_wlb 0x07 99285SN/A#define tmc_rlb 0x07 100285SN/A 101285SN/A#define tmc_scsiid 0x08 102285SN/A#define tmc_sdna 0x08 103285SN/A 104285SN/A#define tmc_istat 0x09 105285SN/A#define ISTAT_INTEN 0x08 106285SN/A#define ISTAT_FIFO 0x10 107285SN/A#define ISTAT_ARBIT 0x20 108285SN/A#define ISTAT_SEL 0x40 109285SN/A#define ISTAT_CD 0x80 110285SN/A 111285SN/A#define tmc_cfg1 0x0a 112285SN/A 113285SN/A#define tmc_ioctl 0x0b 114285SN/A#define IOCTL_IO32 0x80 115285SN/A#define tmc_cfg2 0x0b 116285SN/A 117285SN/A#define tmc_wfifo 0x0c 118285SN/A#define tmc_rfifo 0x0c 119285SN/A 120285SN/A#define tmc_fdcnt 0x0e 121285SN/A 122285SN/A/* Information transfer phases */ 123285SN/A#define BUSFREE_PHASE 0x00 124285SN/A#define DATA_OUT_PHASE (BSTAT_BSY) 125285SN/A#define DATA_IN_PHASE (BSTAT_BSY|BSTAT_IO) 126285SN/A#define COMMAND_PHASE (BSTAT_CMD|BSTAT_BSY) 127285SN/A#define STATUS_PHASE (BSTAT_CMD|BSTAT_BSY|BSTAT_IO) 128285SN/A#define MESSAGE_OUT_PHASE (BSTAT_CMD|BSTAT_MSG|BSTAT_BSY) 129285SN/A#define MESSAGE_IN_PHASE (BSTAT_CMD|BSTAT_MSG|BSTAT_BSY|BSTAT_IO) 130285SN/A#define PHASE_RESELECTED (BSTAT_SEL|BSTAT_IO) 131285SN/A 132#define BSTAT_PHMASK (BSTAT_MSG | BSTAT_IO | BSTAT_CMD) 133#define PHASE_MASK (BSTAT_SEL | BSTAT_BSY | BSTAT_PHMASK) 134#define RESEL_PHASE_MASK (BSTAT_SEL | BSTAT_PHMASK) 135 136#define STG_IS_PHASE_DATA(st) \ 137 ((((st) & PHASE_MASK) & ~BSTAT_IO) == BSTAT_BSY) 138 139/* chip type */ 140#define TMCCHIP_UNK 0x00 141#define TMCCHIP_1800 0x01 142#define TMCCHIP_18C50 0x02 143#define TMCCHIP_18C30 0x03 144 145#define STGIOSZ 0x10 146 147#endif /* !_TMC18C30REG_H_ */ 148