tmc18c30.c revision 89093
11590Srgrimes/* $FreeBSD: head/sys/dev/stg/tmc18c30.c 89093 2002-01-08 19:37:12Z msmith $ */ 21590Srgrimes/* $NecBSD: tmc18c30.c,v 1.28.12.3 2001/06/19 04:35:48 honda Exp $ */ 31590Srgrimes/* $NetBSD$ */ 41590Srgrimes 51590Srgrimes#define STG_DEBUG 61590Srgrimes#define STG_STATICS 71590Srgrimes#define STG_IO_CONTROL_FLAGS (STG_FIFO_INTERRUPTS | STG_WAIT_FOR_SELECT) 81590Srgrimes 91590Srgrimes/* 101590Srgrimes * [NetBSD for NEC PC-98 series] 111590Srgrimes * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001 121590Srgrimes * NetBSD/pc98 porting staff. All rights reserved. 131590Srgrimes * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001 141590Srgrimes * Naofumi HONDA. All rights reserved. 151590Srgrimes * Copyright (c) 1996, 1997, 1998, 1999 161590Srgrimes * Kouichi Matsuda. All rights reserved. 171590Srgrimes * 181590Srgrimes * Redistribution and use in source and binary forms, with or without 191590Srgrimes * modification, are permitted provided that the following conditions 201590Srgrimes * are met: 211590Srgrimes * 1. Redistributions of source code must retain the above copyright 221590Srgrimes * notice, this list of conditions and the following disclaimer. 231590Srgrimes * 2. Redistributions in binary form must reproduce the above copyright 241590Srgrimes * notice, this list of conditions and the following disclaimer in the 251590Srgrimes * documentation and/or other materials provided with the distribution. 261590Srgrimes * 3. The name of the author may not be used to endorse or promote products 271590Srgrimes * derived from this software without specific prior written permission. 281590Srgrimes * 291590Srgrimes * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 301590Srgrimes * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 311590Srgrimes * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 321590Srgrimes * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 331590Srgrimes * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 341590Srgrimes * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 351590Srgrimes * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 361590Srgrimes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 371590Srgrimes * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 3827169Scharnier * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3923693Speter * POSSIBILITY OF SUCH DAMAGE. 4072109Scharnier */ 4127169Scharnier#include "opt_ddb.h" 4250477Speter 431590Srgrimes#include <sys/param.h> 441590Srgrimes#include <sys/systm.h> 451590Srgrimes#include <sys/kernel.h> 4672109Scharnier#if defined(__FreeBSD__) && __FreeBSD_version >= 500001 471590Srgrimes#include <sys/bio.h> 4823693Speter#endif /* __FreeBSD__ */ 4972109Scharnier#include <sys/buf.h> 5074586Sache#include <sys/queue.h> 5172109Scharnier#include <sys/malloc.h> 521590Srgrimes#include <sys/errno.h> 531590Srgrimes 541590Srgrimes#ifdef __NetBSD__ 5572109Scharnier#include <sys/device.h> 5672109Scharnier#include <machine/bus.h> 571590Srgrimes#include <machine/intr.h> 5865064Sbrian 5965064Sbrian#include <dev/scsipi/scsi_all.h> 601590Srgrimes#include <dev/scsipi/scsipi_all.h> 611590Srgrimes#include <dev/scsipi/scsiconf.h> 621590Srgrimes#include <dev/scsipi/scsi_disk.h> 631590Srgrimes 641590Srgrimes#include <machine/dvcfg.h> 651590Srgrimes#include <machine/physio_proc.h> 6638164Sache 671590Srgrimes#include <i386/Cbus/dev/scsi_low.h> 681590Srgrimes#include <i386/Cbus/dev/tmc18c30reg.h> 691590Srgrimes#include <i386/Cbus/dev/tmc18c30var.h> 701590Srgrimes#endif /* __NetBSD__ */ 711590Srgrimes 721590Srgrimes#ifdef __FreeBSD__ 731590Srgrimes#include <machine/clock.h> 7423693Speter#include <machine/cpu.h> 751590Srgrimes#include <machine/bus_pio.h> 761590Srgrimes#include <machine/bus.h> 771590Srgrimes 781590Srgrimes#include <machine/dvcfg.h> 791590Srgrimes#include <machine/physio_proc.h> 8023693Speter 811590Srgrimes#include <cam/scsi/scsi_low.h> 821590Srgrimes#include <dev/stg/tmc18c30reg.h> 8323693Speter#include <dev/stg/tmc18c30var.h> 8423693Speter#endif /* __FreeBSD__ */ 851590Srgrimes 861590Srgrimes/*************************************************** 871590Srgrimes * USER SETTINGS 881590Srgrimes ***************************************************/ 891590Srgrimes/* DEVICE CONFIGURATION FLAGS (MINOR) 901590Srgrimes * 911590Srgrimes * 0x01 DISCONECT OFF 921590Srgrimes * 0x02 PARITY LINE OFF 931590Srgrimes * 0x04 IDENTIFY MSG OFF ( = single lun) 9470474Sdes * 0x08 SYNC TRANSFER OFF 9570655Sdes */ 961590Srgrimes/* #define STG_SYNC_SUPPORT */ /* NOT YET but easy */ 971590Srgrimes 981590Srgrimes/* For the 512 fifo type: change below */ 991590Srgrimes#define TMC18C30_FIFOSZ 0x800 1001590Srgrimes#define TMC18C30_FCBSZ 0x200 1011590Srgrimes#define TMC18C50_FIFOSZ 0x2000 1021590Srgrimes#define TMC18C50_FCBSZ 0x400 1031590Srgrimes 1041590Srgrimes#define STG_MAX_DATA_SIZE (64 * 1024) 1051590Srgrimes#define STG_DELAY_MAX (2 * 1000 * 1000) 1061590Srgrimes#define STG_DELAY_INTERVAL (1) 1071590Srgrimes#define STG_DELAY_SELECT_POLLING_MAX (5 * 1000 * 1000) 1081590Srgrimes 1091590Srgrimes/*************************************************** 1109993Sache * PARAMS 1111590Srgrimes ***************************************************/ 11274586Sache#define STG_NTARGETS 8 11374586Sache#define STG_NLUNS 8 1141590Srgrimes 1151590Srgrimes/*************************************************** 1161590Srgrimes * DEBUG 1171590Srgrimes ***************************************************/ 1181590Srgrimes#ifdef STG_DEBUG 1191590Srgrimesstatic int stg_debug; 1201590Srgrimes#endif /* STG_DEBUG */ 1212537Spst 1221590Srgrimes#ifdef STG_STATICS 1231590Srgrimesstatic struct stg_statics { 1241590Srgrimes int arbit_fail_0; 1251590Srgrimes int arbit_fail_1; 1261590Srgrimes int disconnect; 1271590Srgrimes int reselect; 1281590Srgrimes} stg_statics; 1291590Srgrimes#endif /* STG_STATICS */ 1301590Srgrimes 1311590Srgrimes/*************************************************** 1321590Srgrimes * IO control flags 1331590Srgrimes ***************************************************/ 1341590Srgrimes#define STG_FIFO_INTERRUPTS 0x0001 1351590Srgrimes#define STG_WAIT_FOR_SELECT 0x0100 1361590Srgrimes 1371590Srgrimesint stg_io_control = STG_IO_CONTROL_FLAGS; 1381590Srgrimes 1391590Srgrimes/*************************************************** 1401590Srgrimes * DEVICE STRUCTURE 1411590Srgrimes ***************************************************/ 1421590Srgrimesextern struct cfdriver stg_cd; 1431590Srgrimes 1441590Srgrimes/************************************************************** 1451590Srgrimes * DECLARE 1461590Srgrimes **************************************************************/ 1471590Srgrimes/* static */ 1481590Srgrimesstatic void stg_pio_read __P((struct stg_softc *, struct targ_info *, u_int)); 1491590Srgrimesstatic void stg_pio_write __P((struct stg_softc *, struct targ_info *, u_int)); 1501590Srgrimesstatic int stg_xfer __P((struct stg_softc *, u_int8_t *, int, int, int)); 1511590Srgrimesstatic int stg_msg __P((struct stg_softc *, struct targ_info *, u_int)); 1521590Srgrimesstatic int stg_reselected __P((struct stg_softc *)); 1531590Srgrimesstatic int stg_disconnected __P((struct stg_softc *, struct targ_info *)); 1541590Srgrimesstatic __inline void stg_pdma_end __P((struct stg_softc *, struct targ_info *)); 1551590Srgrimesstatic int stghw_select_targ_wait __P((struct stg_softc *, int)); 1561590Srgrimesstatic int stghw_check __P((struct stg_softc *)); 1571590Srgrimesstatic void stghw_init __P((struct stg_softc *)); 1581590Srgrimesstatic int stg_negate_signal __P((struct stg_softc *, u_int8_t, u_char *)); 1591590Srgrimesstatic int stg_expect_signal __P((struct stg_softc *, u_int8_t, u_int8_t)); 1601590Srgrimesstatic int stg_world_start __P((struct stg_softc *, int)); 1612537Spststatic int stghw_start_selection __P((struct stg_softc *sc, struct slccb *)); 1622537Spststatic void stghw_bus_reset __P((struct stg_softc *)); 1631590Srgrimesstatic void stghw_attention __P((struct stg_softc *)); 1641590Srgrimesstatic int stg_target_nexus_establish __P((struct stg_softc *)); 1651590Srgrimesstatic int stg_lun_nexus_establish __P((struct stg_softc *)); 1661590Srgrimesstatic int stg_ccb_nexus_establish __P((struct stg_softc *)); 1671590Srgrimesstatic int stg_targ_init __P((struct stg_softc *, struct targ_info *, int)); 1681590Srgrimesstatic __inline void stghw_bcr_write_1 __P((struct stg_softc *, u_int8_t)); 1691590Srgrimesstatic int stg_timeout __P((struct stg_softc *)); 1701590Srgrimesstatic void stg_selection_done_and_expect_msgout __P((struct stg_softc *)); 1711590Srgrimes 1721590Srgrimesstruct scsi_low_funcs stgfuncs = { 1731590Srgrimes SC_LOW_INIT_T stg_world_start, 1741590Srgrimes SC_LOW_BUSRST_T stghw_bus_reset, 1751590Srgrimes SC_LOW_TARG_INIT_T stg_targ_init, 17667467Sru SC_LOW_LUN_INIT_T NULL, 1771590Srgrimes 17874586Sache SC_LOW_SELECT_T stghw_start_selection, 17974586Sache SC_LOW_NEXUS_T stg_lun_nexus_establish, 18074586Sache SC_LOW_NEXUS_T stg_ccb_nexus_establish, 18174586Sache 1821590Srgrimes SC_LOW_ATTEN_T stghw_attention, 1831590Srgrimes SC_LOW_MSG_T stg_msg, 1841590Srgrimes 1851590Srgrimes SC_LOW_TIMEOUT_T stg_timeout, 1861590Srgrimes SC_LOW_POLL_T stgintr, 1871590Srgrimes 1881590Srgrimes NULL, 1891590Srgrimes}; 1901590Srgrimes 1911590Srgrimes/**************************************************** 1921590Srgrimes * hwfuncs 1931590Srgrimes ****************************************************/ 1941590Srgrimesstatic __inline void 1951590Srgrimesstghw_bcr_write_1(sc, bcv) 1961590Srgrimes struct stg_softc *sc; 1971590Srgrimes u_int8_t bcv; 1981590Srgrimes{ 1991590Srgrimes 2001590Srgrimes bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, bcv); 2011590Srgrimes sc->sc_busimg = bcv; 2021590Srgrimes} 2031590Srgrimes 2041590Srgrimesstatic int 20567467Srustghw_check(sc) 20667467Sru struct stg_softc *sc; 20767467Sru{ 2081590Srgrimes struct scsi_low_softc *slp = &sc->sc_sclow; 20974586Sache bus_space_tag_t iot = sc->sc_iot; 21074586Sache bus_space_handle_t ioh = sc->sc_ioh; 21174586Sache u_int fcbsize, fcb; 21274586Sache u_int16_t lsb, msb; 21374586Sache 21474586Sache lsb = bus_space_read_1(iot, ioh, tmc_idlsb); 21574586Sache msb = bus_space_read_1(iot, ioh, tmc_idmsb); 21674586Sache switch (msb << 8 | lsb) 21774586Sache { 21874586Sache case 0x6127: 21974586Sache /* TMCCHIP_1800 not supported. (it's my policy) */ 22074586Sache sc->sc_chip = TMCCHIP_1800; 2211590Srgrimes return EINVAL; 2221590Srgrimes 2231590Srgrimes case 0x60e9: 2241590Srgrimes if (bus_space_read_1(iot, ioh, tmc_cfg2) & 0x02) 2251590Srgrimes { 2261590Srgrimes sc->sc_chip = TMCCHIP_18C30; 2271590Srgrimes sc->sc_fsz = TMC18C30_FIFOSZ; 2281590Srgrimes fcbsize = TMC18C30_FCBSZ; 2292537Spst } 2302537Spst else 2312537Spst { 2322537Spst sc->sc_chip = TMCCHIP_18C50; 23374586Sache sc->sc_fsz = TMC18C50_FIFOSZ; 23474586Sache fcbsize = TMC18C50_FCBSZ; 23574586Sache } 23674586Sache break; 23774586Sache 2382537Spst default: 23974586Sache sc->sc_chip = TMCCHIP_UNK; 24074586Sache return ENODEV; 24174586Sache } 24274586Sache 24374586Sache sc->sc_fcRinit = FCTL_INTEN; 2442537Spst sc->sc_fcWinit = FCTL_PARENB | FCTL_INTEN; 2452537Spst 24674586Sache if (slp->sl_cfgflags & CFG_NOATTEN) 24774586Sache sc->sc_imsg = 0; 24874586Sache else 24974586Sache sc->sc_imsg = BCTL_ATN; 25074586Sache sc->sc_busc = BCTL_BUSEN; 2512537Spst 2521590Srgrimes sc->sc_wthold = fcbsize + 256; 2531590Srgrimes sc->sc_rthold = fcbsize - 256; 2541590Srgrimes sc->sc_maxwsize = sc->sc_fsz; 2551590Srgrimes 2561590Srgrimes fcb = fcbsize / (sc->sc_fsz / 16); 2571590Srgrimes sc->sc_icinit = ICTL_CD | ICTL_SEL | ICTL_ARBIT | fcb; 2581590Srgrimes return 0; 2591590Srgrimes} 2601590Srgrimes 2611590Srgrimesstatic void 2621590Srgrimesstghw_init(sc) 2631590Srgrimes struct stg_softc *sc; 2641590Srgrimes{ 2651590Srgrimes bus_space_tag_t iot = sc->sc_iot; 2661590Srgrimes bus_space_handle_t ioh = sc->sc_ioh; 2671590Srgrimes 2681590Srgrimes bus_space_write_1(iot, ioh, tmc_ictl, 0); 2691590Srgrimes stghw_bcr_write_1(sc, BCTL_BUSFREE); 2701590Srgrimes bus_space_write_1(iot, ioh, tmc_fctl, 2711590Srgrimes sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT); 2721590Srgrimes bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 2731590Srgrimes bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit); 2741590Srgrimes 2751590Srgrimes bus_space_write_1(iot, ioh, tmc_ssctl, 0); 2761590Srgrimes} 2771590Srgrimes 2781590Srgrimesstatic int 2791590Srgrimesstg_targ_init(sc, ti, action) 2801590Srgrimes struct stg_softc *sc; 2811590Srgrimes struct targ_info *ti; 2821590Srgrimes int action; 2831590Srgrimes{ 2841590Srgrimes struct stg_targ_info *sti = (void *) ti; 2851590Srgrimes 2861590Srgrimes if (action == SCSI_LOW_INFO_ALLOC || action == SCSI_LOW_INFO_REVOKE) 2871590Srgrimes { 2881590Srgrimes ti->ti_width = SCSI_LOW_BUS_WIDTH_8; 2891590Srgrimes ti->ti_maxsynch.period = 0; 2901590Srgrimes ti->ti_maxsynch.offset = 0; 2911590Srgrimes sti->sti_reg_synch = 0; 2921590Srgrimes } 2931590Srgrimes return 0; 29465064Sbrian} 2951590Srgrimes 2961590Srgrimes/**************************************************** 2971590Srgrimes * scsi low interface 2981590Srgrimes ****************************************************/ 2991590Srgrimesstatic void 30038164Sachestghw_attention(sc) 30138164Sache struct stg_softc *sc; 3021590Srgrimes{ 3031590Srgrimes 30467467Sru sc->sc_busc |= BCTL_ATN; 30567467Sru sc->sc_busimg |= BCTL_ATN; 3061590Srgrimes bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, sc->sc_busimg); 3071590Srgrimes SCSI_LOW_DELAY(10); 3081590Srgrimes} 3091590Srgrimes 3101590Srgrimesstatic void 3111590Srgrimesstghw_bus_reset(sc) 3121590Srgrimes struct stg_softc *sc; 3131590Srgrimes{ 3141590Srgrimes bus_space_tag_t iot = sc->sc_iot; 3151590Srgrimes bus_space_handle_t ioh = sc->sc_ioh; 3161590Srgrimes 3171590Srgrimes bus_space_write_1(iot, ioh, tmc_ictl, 0); 3181590Srgrimes bus_space_write_1(iot, ioh, tmc_fctl, 0); 3191590Srgrimes stghw_bcr_write_1(sc, BCTL_RST); 3201590Srgrimes SCSI_LOW_DELAY(100000); 3211590Srgrimes stghw_bcr_write_1(sc, BCTL_BUSFREE); 32265064Sbrian} 32365064Sbrian 3241590Srgrimesstatic int 32523971Sachestghw_start_selection(sc, cb) 32623971Sache struct stg_softc *sc; 3271590Srgrimes struct slccb *cb; 3281590Srgrimes{ 3291590Srgrimes bus_space_tag_t iot = sc->sc_iot; 3301590Srgrimes bus_space_handle_t ioh = sc->sc_ioh; 3311590Srgrimes struct targ_info *ti = cb->ti; 3321590Srgrimes register u_int8_t stat; 3331590Srgrimes int s; 3341590Srgrimes 3351590Srgrimes sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000; 3361590Srgrimes sc->sc_dataout_timeout = 0; 33765064Sbrian sc->sc_ubf_timeout = 0; 33865064Sbrian stghw_bcr_write_1(sc, BCTL_BUSFREE); 3391590Srgrimes bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit); 34023971Sache 34123971Sache s = splhigh(); 3421590Srgrimes stat = bus_space_read_1(iot, ioh, tmc_astat); 3431590Srgrimes if ((stat & ASTAT_INT) != 0) 3441590Srgrimes { 3451590Srgrimes splx(s); 3461590Srgrimes return SCSI_LOW_START_FAIL; 3471590Srgrimes } 3481590Srgrimes 3491590Srgrimes bus_space_write_1(iot, ioh, tmc_scsiid, sc->sc_idbit); 35038164Sache bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_ARBIT); 3511590Srgrimes splx(s); 3521590Srgrimes 3531590Srgrimes SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART); 3549994Sache return SCSI_LOW_START_OK; 3551590Srgrimes} 3561590Srgrimes 3571590Srgrimesstatic int 3581590Srgrimesstg_world_start(sc, fdone) 3591590Srgrimes struct stg_softc *sc; 3601590Srgrimes int fdone; 36167467Sru{ 3621590Srgrimes struct scsi_low_softc *slp = &sc->sc_sclow; 3631590Srgrimes int error; 3641590Srgrimes 3651590Srgrimes if ((slp->sl_cfgflags & CFG_NOPARITY) == 0) 3661590Srgrimes sc->sc_fcRinit |= FCTL_PARENB; 3671590Srgrimes else 368 sc->sc_fcRinit &= ~FCTL_PARENB; 369 370 if ((error = stghw_check(sc)) != 0) 371 return error; 372 373 stghw_init(sc); 374 scsi_low_bus_reset(slp); 375 stghw_init(sc); 376 377 SOFT_INTR_REQUIRED(slp); 378 return 0; 379} 380 381static int 382stg_msg(sc, ti, msg) 383 struct stg_softc *sc; 384 struct targ_info *ti; 385 u_int msg; 386{ 387 bus_space_tag_t iot = sc->sc_iot; 388 bus_space_handle_t ioh = sc->sc_ioh; 389 struct stg_targ_info *sti = (void *) ti; 390 u_int period, offset; 391 392 if ((msg & SCSI_LOW_MSG_WIDE) != 0) 393 { 394 if (ti->ti_width != SCSI_LOW_BUS_WIDTH_8) 395 { 396 ti->ti_width = SCSI_LOW_BUS_WIDTH_8; 397 return EINVAL; 398 } 399 return 0; 400 } 401 402 if ((msg & SCSI_LOW_MSG_SYNCH) == 0) 403 return 0; 404 405 period = ti->ti_maxsynch.period; 406 offset = ti->ti_maxsynch.offset; 407 period = period << 2; 408 if (period >= 200) 409 { 410 sti->sti_reg_synch = (period - 200) / 50; 411 if (period % 50) 412 sti->sti_reg_synch ++; 413 sti->sti_reg_synch |= SSCTL_SYNCHEN; 414 } 415 else if (period >= 100) 416 { 417 sti->sti_reg_synch = (period - 100) / 50; 418 if (period % 50) 419 sti->sti_reg_synch ++; 420 sti->sti_reg_synch |= SSCTL_SYNCHEN | SSCTL_FSYNCHEN; 421 } 422 bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch); 423 return 0; 424} 425 426/************************************************************** 427 * General probe attach 428 **************************************************************/ 429int 430stgprobesubr(iot, ioh, dvcfg) 431 bus_space_tag_t iot; 432 bus_space_handle_t ioh; 433 u_int dvcfg; 434{ 435 u_int16_t lsb, msb; 436 437 lsb = bus_space_read_1(iot, ioh, tmc_idlsb); 438 msb = bus_space_read_1(iot, ioh, tmc_idmsb); 439 switch (msb << 8 | lsb) 440 { 441 default: 442 return 0; 443 case 0x6127: 444 /* not support! */ 445 return 0; 446 case 0x60e9: 447 return 1; 448 } 449 return 0; 450} 451 452int 453stgprint(aux, name) 454 void *aux; 455 const char *name; 456{ 457 458 if (name != NULL) 459 printf("%s: scsibus ", name); 460 return UNCONF; 461} 462 463void 464stgattachsubr(sc) 465 struct stg_softc *sc; 466{ 467 struct scsi_low_softc *slp = &sc->sc_sclow; 468 469 printf("\n"); 470 471 sc->sc_idbit = (1 << slp->sl_hostid); 472 slp->sl_funcs = &stgfuncs; 473 sc->sc_tmaxcnt = SCSI_LOW_MIN_TOUT * 1000 * 1000; /* default */ 474 475 slp->sl_flags |= HW_READ_PADDING; 476 slp->sl_cfgflags |= CFG_ASYNC; /* XXX */ 477 478 (void) scsi_low_attach(slp, 0, STG_NTARGETS, STG_NLUNS, 479 sizeof(struct stg_targ_info), 0); 480} 481 482/************************************************************** 483 * PDMA functions 484 **************************************************************/ 485static __inline void 486stg_pdma_end(sc, ti) 487 struct stg_softc *sc; 488 struct targ_info *ti; 489{ 490 struct scsi_low_softc *slp = &sc->sc_sclow; 491 bus_space_tag_t iot = sc->sc_iot; 492 bus_space_handle_t ioh = sc->sc_ioh; 493 struct slccb *cb = slp->sl_Qnexus; 494 u_int len, tres; 495 496 slp->sl_flags &= ~HW_PDMASTART; 497 sc->sc_icinit &= ~ICTL_FIFO; 498 sc->sc_dataout_timeout = 0; 499 500 if (cb == NULL) 501 { 502 slp->sl_error |= PDMAERR; 503 goto out; 504 } 505 506 if (ti->ti_phase == PH_DATA) 507 { 508 len = bus_space_read_2(iot, ioh, tmc_fdcnt); 509 if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE) 510 { 511 if (len != 0) 512 { 513 tres = len + slp->sl_scp.scp_datalen; 514 if (tres <= (u_int) cb->ccb_scp.scp_datalen) 515 { 516 slp->sl_scp.scp_data -= len; 517 slp->sl_scp.scp_datalen = tres; 518 } 519 else 520 { 521 slp->sl_error |= PDMAERR; 522 printf("%s len %x >= datalen %x\n", 523 slp->sl_xname, 524 len, slp->sl_scp.scp_datalen); 525 } 526 } 527 } 528 else if (slp->sl_scp.scp_direction == SCSI_LOW_READ) 529 { 530 if (len != 0) 531 { 532 slp->sl_error |= PDMAERR; 533 printf("%s: len %x left in fifo\n", 534 slp->sl_xname, len); 535 } 536 } 537 scsi_low_data_finish(slp); 538 } 539 else 540 { 541 542 printf("%s data phase miss\n", slp->sl_xname); 543 slp->sl_error |= PDMAERR; 544 } 545 546out: 547 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 548} 549 550static void 551stg_pio_read(sc, ti, thold) 552 struct stg_softc *sc; 553 struct targ_info *ti; 554 u_int thold; 555{ 556 struct scsi_low_softc *slp = &sc->sc_sclow; 557 bus_space_tag_t iot = sc->sc_iot; 558 bus_space_handle_t ioh = sc->sc_ioh; 559 struct sc_p *sp = &slp->sl_scp; 560 int s, tout; 561 u_int res; 562 u_int8_t stat; 563 564 if ((slp->sl_flags & HW_PDMASTART) == 0) 565 { 566 bus_space_write_1(iot, ioh, tmc_fctl, 567 sc->sc_fcRinit | FCTL_FIFOEN); 568 slp->sl_flags |= HW_PDMASTART; 569 } 570 571 tout = sc->sc_tmaxcnt; 572 while (tout -- > 0) 573 { 574 if (thold > 0) 575 { 576 s = splhigh(); 577 res = bus_space_read_2(iot, ioh, tmc_fdcnt); 578 if (res < thold) 579 { 580 bus_space_write_1(iot, ioh, tmc_ictl, 581 sc->sc_icinit); 582 splx(s); 583 break; 584 } 585 splx(s); 586 } 587 else 588 { 589 stat = bus_space_read_1(iot, ioh, tmc_bstat); 590 res = bus_space_read_2(iot, ioh, tmc_fdcnt); 591 if (res == 0) 592 { 593 if ((stat & PHASE_MASK) != DATA_IN_PHASE) 594 break; 595 if (sp->scp_datalen <= 0) 596 break; 597 SCSI_LOW_DELAY(1); 598 continue; 599 } 600 } 601 602 /* The assumtion res != 0 is valid here */ 603 if (res > sp->scp_datalen) 604 { 605 if (res == (u_int) -1) 606 break; 607 608 slp->sl_error |= PDMAERR; 609 if ((slp->sl_flags & HW_READ_PADDING) == 0) 610 { 611 printf("%s: read padding required\n", 612 slp->sl_xname); 613 break; 614 } 615 616 sp->scp_datalen = 0; 617 if (res > STG_MAX_DATA_SIZE) 618 res = STG_MAX_DATA_SIZE; 619 while (res -- > 0) 620 { 621 (void) bus_space_read_1(iot, ioh, tmc_rfifo); 622 } 623 continue; 624 } 625 626 sp->scp_datalen -= res; 627 if (res & 1) 628 { 629 *sp->scp_data = bus_space_read_1(iot, ioh, tmc_rfifo); 630 sp->scp_data ++; 631 res --; 632 } 633 634 bus_space_read_multi_2(iot, ioh, tmc_rfifo, 635 (u_int16_t *) sp->scp_data, res >> 1); 636 sp->scp_data += res; 637 } 638 639 if (tout <= 0) 640 printf("%s: pio read timeout\n", slp->sl_xname); 641} 642 643static void 644stg_pio_write(sc, ti, thold) 645 struct stg_softc *sc; 646 struct targ_info *ti; 647 u_int thold; 648{ 649 struct scsi_low_softc *slp = &sc->sc_sclow; 650 bus_space_tag_t iot = sc->sc_iot; 651 bus_space_handle_t ioh = sc->sc_ioh; 652 struct sc_p *sp = &slp->sl_scp; 653 u_int res; 654 int s, tout; 655 register u_int8_t stat; 656 657 if ((slp->sl_flags & HW_PDMASTART) == 0) 658 { 659 stat = sc->sc_fcWinit | FCTL_FIFOEN | FCTL_FIFOW; 660 bus_space_write_1(iot, ioh, tmc_fctl, stat | FCTL_CLRFIFO); 661 bus_space_write_1(iot, ioh, tmc_fctl, stat); 662 slp->sl_flags |= HW_PDMASTART; 663 } 664 665 tout = sc->sc_tmaxcnt; 666 while (tout -- > 0) 667 { 668 stat = bus_space_read_1(iot, ioh, tmc_bstat); 669 if ((stat & PHASE_MASK) != DATA_OUT_PHASE) 670 break; 671 672 if (sp->scp_datalen <= 0) 673 { 674 if (sc->sc_dataout_timeout == 0) 675 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ; 676 break; 677 } 678 679 if (thold > 0) 680 { 681 s = splhigh(); 682 res = bus_space_read_2(iot, ioh, tmc_fdcnt); 683 if (res > thold) 684 { 685 bus_space_write_1(iot, ioh, tmc_ictl, 686 sc->sc_icinit); 687 splx(s); 688 break; 689 } 690 splx(s); 691 } 692 else 693 { 694 res = bus_space_read_2(iot, ioh, tmc_fdcnt); 695 if (res > sc->sc_maxwsize / 2) 696 { 697 SCSI_LOW_DELAY(1); 698 continue; 699 } 700 } 701 702 if (res == (u_int) -1) 703 break; 704 res = sc->sc_maxwsize - res; 705 if (res > sp->scp_datalen) 706 res = sp->scp_datalen; 707 708 sp->scp_datalen -= res; 709 if ((res & 0x1) != 0) 710 { 711 bus_space_write_1(iot, ioh, tmc_wfifo, *sp->scp_data); 712 sp->scp_data ++; 713 res --; 714 } 715 716 bus_space_write_multi_2(iot, ioh, tmc_wfifo, 717 (u_int16_t *) sp->scp_data, res >> 1); 718 sp->scp_data += res; 719 } 720 721 if (tout <= 0) 722 printf("%s: pio write timeout\n", slp->sl_xname); 723} 724 725static int 726stg_negate_signal(sc, mask, s) 727 struct stg_softc *sc; 728 u_int8_t mask; 729 u_char *s; 730{ 731 struct scsi_low_softc *slp = &sc->sc_sclow; 732 bus_space_tag_t bst = sc->sc_iot; 733 bus_space_handle_t bsh = sc->sc_ioh; 734 int wc; 735 u_int8_t regv; 736 737 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++) 738 { 739 regv = bus_space_read_1(bst, bsh, tmc_bstat); 740 if (regv == (u_int8_t) -1) 741 return -1; 742 if ((regv & mask) == 0) 743 return 1; 744 745 SCSI_LOW_DELAY(STG_DELAY_INTERVAL); 746 } 747 748 printf("%s: %s stg_negate_signal timeout\n", slp->sl_xname, s); 749 return -1; 750} 751 752static int 753stg_expect_signal(sc, phase, mask) 754 struct stg_softc *sc; 755 u_int8_t phase, mask; 756{ 757 struct scsi_low_softc *slp = &sc->sc_sclow; 758 bus_space_tag_t bst = sc->sc_iot; 759 bus_space_handle_t bsh = sc->sc_ioh; 760 int wc; 761 u_int8_t ph; 762 763 phase &= PHASE_MASK; 764 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++) 765 { 766 ph = bus_space_read_1(bst, bsh, tmc_bstat); 767 if (ph == (u_int8_t) -1) 768 return -1; 769 if ((ph & PHASE_MASK) != phase) 770 return 0; 771 if ((ph & mask) != 0) 772 return 1; 773 774 SCSI_LOW_DELAY(STG_DELAY_INTERVAL); 775 } 776 777 printf("%s: stg_expect_signal timeout\n", slp->sl_xname); 778 return -1; 779} 780 781static int 782stg_xfer(sc, buf, len, phase, clear_atn) 783 struct stg_softc *sc; 784 u_int8_t *buf; 785 int len; 786 int phase; 787 int clear_atn; 788{ 789 bus_space_tag_t iot = sc->sc_iot; 790 bus_space_handle_t ioh = sc->sc_ioh; 791 int rv, ptr; 792 793 if (phase & BSTAT_IO) 794 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 795 else 796 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit); 797 798 for (ptr = 0; len > 0; len --) 799 { 800 rv = stg_expect_signal(sc, phase, BSTAT_REQ); 801 if (rv <= 0) 802 goto bad; 803 804 if (len == 1 && clear_atn != 0) 805 { 806 sc->sc_busc &= ~BCTL_ATN; 807 stghw_bcr_write_1(sc, sc->sc_busc); 808 SCSI_LOW_DEASSERT_ATN(&sc->sc_sclow); 809 } 810 811 if (phase & BSTAT_IO) 812 { 813 buf[ptr ++] = bus_space_read_1(iot, ioh, tmc_rdata); 814 } 815 else 816 { 817 bus_space_write_1(iot, ioh, tmc_wdata, buf[ptr ++]); 818 } 819 820 stg_negate_signal(sc, BSTAT_ACK, "xfer<ACK>"); 821 } 822 823bad: 824 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 825 return len; 826} 827 828/************************************************************** 829 * disconnect & reselect (HW low) 830 **************************************************************/ 831static int 832stg_reselected(sc) 833 struct stg_softc *sc; 834{ 835 struct scsi_low_softc *slp = &sc->sc_sclow; 836 bus_space_tag_t iot = sc->sc_iot; 837 bus_space_handle_t ioh = sc->sc_ioh; 838 int tout; 839 u_int sid; 840 u_int8_t regv; 841 842 if (slp->sl_selid != NULL) 843 { 844 /* XXX: 845 * Selection vs Reselection conflicts. 846 */ 847 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 848 stghw_bcr_write_1(sc, BCTL_BUSFREE); 849 } 850 else if (slp->sl_Tnexus != NULL) 851 { 852 printf("%s: unexpected termination\n", slp->sl_xname); 853 stg_disconnected(sc, slp->sl_Tnexus); 854 } 855 856 /* XXX: 857 * We should ack the reselection as soon as possible, 858 * becuase the target would abort the current reselection seq 859 * due to reselection timeout. 860 */ 861 tout = STG_DELAY_SELECT_POLLING_MAX; 862 while (tout -- > 0) 863 { 864 regv = bus_space_read_1(iot, ioh, tmc_bstat); 865 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) == 866 (BSTAT_IO | BSTAT_SEL)) 867 { 868 SCSI_LOW_DELAY(1); 869 regv = bus_space_read_1(iot, ioh, tmc_bstat); 870 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) == 871 (BSTAT_IO | BSTAT_SEL)) 872 goto reselect_start; 873 } 874 SCSI_LOW_DELAY(1); 875 } 876 printf("%s: reselction timeout I\n", slp->sl_xname); 877 return EJUSTRETURN; 878 879reselect_start: 880 sid = (u_int) bus_space_read_1(iot, ioh, tmc_scsiid); 881 if ((sid & sc->sc_idbit) == 0) 882 { 883 /* not us */ 884 return EJUSTRETURN; 885 } 886 887 bus_space_write_1(iot, ioh, tmc_fctl, 888 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT); 889 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 890 stghw_bcr_write_1(sc, sc->sc_busc | BCTL_BSY); 891 892 while (tout -- > 0) 893 { 894 regv = bus_space_read_1(iot, ioh, tmc_bstat); 895 if ((regv & (BSTAT_SEL | BSTAT_BSY)) == BSTAT_BSY) 896 goto reselected; 897 SCSI_LOW_DELAY(1); 898 } 899 printf("%s: reselction timeout II\n", slp->sl_xname); 900 return EJUSTRETURN; 901 902reselected: 903 sid &= ~sc->sc_idbit; 904 sid = ffs(sid) - 1; 905 if (scsi_low_reselected(slp, sid) == NULL) 906 return EJUSTRETURN; 907 908#ifdef STG_STATICS 909 stg_statics.reselect ++; 910#endif /* STG_STATICS */ 911 return EJUSTRETURN; 912} 913 914static int 915stg_disconnected(sc, ti) 916 struct stg_softc *sc; 917 struct targ_info *ti; 918{ 919 struct scsi_low_softc *slp = &sc->sc_sclow; 920 bus_space_tag_t iot = sc->sc_iot; 921 bus_space_handle_t ioh = sc->sc_ioh; 922 923 /* clear bus status & fifo */ 924 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO); 925 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 926 stghw_bcr_write_1(sc, BCTL_BUSFREE); 927 sc->sc_icinit &= ~ICTL_FIFO; 928 sc->sc_busc &= ~BCTL_ATN; 929 sc->sc_dataout_timeout = 0; 930 sc->sc_ubf_timeout = 0; 931 932#ifdef STG_STATICS 933 stg_statics.disconnect ++; 934#endif /* STG_STATICS */ 935 scsi_low_disconnected(slp, ti); 936 return 1; 937} 938 939/************************************************************** 940 * SEQUENCER 941 **************************************************************/ 942static int 943stg_target_nexus_establish(sc) 944 struct stg_softc *sc; 945{ 946 struct scsi_low_softc *slp = &sc->sc_sclow; 947 bus_space_tag_t iot = sc->sc_iot; 948 bus_space_handle_t ioh = sc->sc_ioh; 949 struct targ_info *ti = slp->sl_Tnexus; 950 struct stg_targ_info *sti = (void *) ti; 951 952 bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch); 953 if ((stg_io_control & STG_FIFO_INTERRUPTS) != 0) 954 { 955 sc->sc_icinit |= ICTL_FIFO; 956 } 957 return 0; 958} 959 960static int 961stg_lun_nexus_establish(sc) 962 struct stg_softc *sc; 963{ 964 965 return 0; 966} 967 968static int 969stg_ccb_nexus_establish(sc) 970 struct stg_softc *sc; 971{ 972 struct scsi_low_softc *slp = &sc->sc_sclow; 973 struct slccb *cb = slp->sl_Qnexus; 974 975 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000; 976 return 0; 977} 978 979#define STGHW_SELECT_INTERVAL 10 980 981static int 982stghw_select_targ_wait(sc, mu) 983 struct stg_softc *sc; 984 int mu; 985{ 986 bus_space_tag_t iot = sc->sc_iot; 987 bus_space_handle_t ioh = sc->sc_ioh; 988 989 mu = mu / STGHW_SELECT_INTERVAL; 990 while (mu -- > 0) 991 { 992 if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) == 0) 993 { 994 SCSI_LOW_DELAY(STGHW_SELECT_INTERVAL); 995 continue; 996 } 997 SCSI_LOW_DELAY(1); 998 if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) != 0) 999 { 1000 return 0; 1001 } 1002 } 1003 return ENXIO; 1004} 1005 1006static void 1007stg_selection_done_and_expect_msgout(sc) 1008 struct stg_softc *sc; 1009{ 1010 struct scsi_low_softc *slp = &sc->sc_sclow; 1011 bus_space_tag_t iot = sc->sc_iot; 1012 bus_space_handle_t ioh = sc->sc_ioh; 1013 1014 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO); 1015 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 1016 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc); 1017 SCSI_LOW_ASSERT_ATN(slp); 1018} 1019 1020int 1021stgintr(arg) 1022 void *arg; 1023{ 1024 struct stg_softc *sc = arg; 1025 struct scsi_low_softc *slp = &sc->sc_sclow; 1026 bus_space_tag_t iot = sc->sc_iot; 1027 bus_space_handle_t ioh = sc->sc_ioh; 1028 struct targ_info *ti; 1029 struct physio_proc *pp; 1030 struct buf *bp; 1031 u_int derror, flags; 1032 int len, s; 1033 u_int8_t status, astatus, regv; 1034 1035 /******************************************* 1036 * interrupt check 1037 *******************************************/ 1038 if (slp->sl_flags & HW_INACTIVE) 1039 return 0; 1040 1041 astatus = bus_space_read_1(iot, ioh, tmc_astat); 1042 status = bus_space_read_1(iot, ioh, tmc_bstat); 1043 1044 if ((astatus & ASTAT_STATMASK) == 0 || astatus == (u_int8_t) -1) 1045 return 0; 1046 1047 bus_space_write_1(iot, ioh, tmc_ictl, 0); 1048 if (astatus & ASTAT_SCSIRST) 1049 { 1050 bus_space_write_1(iot, ioh, tmc_fctl, 1051 sc->sc_fcRinit | FCTL_CLRFIFO); 1052 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 1053 bus_space_write_1(iot, ioh, tmc_ictl, 0); 1054 1055 scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT, 1056 "bus reset (power off?)"); 1057 return 1; 1058 } 1059 1060 /******************************************* 1061 * debug section 1062 *******************************************/ 1063#ifdef STG_DEBUG 1064 if (stg_debug) 1065 { 1066 scsi_low_print(slp, NULL); 1067 printf("%s: st %x ist %x\n\n", slp->sl_xname, 1068 status, astatus); 1069#ifdef DDB 1070 if (stg_debug > 1) 1071 SCSI_LOW_DEBUGGER("stg"); 1072#endif /* DDB */ 1073 } 1074#endif /* STG_DEBUG */ 1075 1076 /******************************************* 1077 * reselection & nexus 1078 *******************************************/ 1079 if ((status & RESEL_PHASE_MASK)== PHASE_RESELECTED) 1080 { 1081 if (stg_reselected(sc) == EJUSTRETURN) 1082 goto out; 1083 } 1084 1085 if ((ti = slp->sl_Tnexus) == NULL) 1086 return 0; 1087 1088 derror = 0; 1089 if ((astatus & ASTAT_PARERR) != 0 && ti->ti_phase != PH_ARBSTART && 1090 (sc->sc_fcRinit & FCTL_PARENB) != 0) 1091 { 1092 slp->sl_error |= PARITYERR; 1093 derror = SCSI_LOW_DATA_PE; 1094 if ((status & PHASE_MASK) == MESSAGE_IN_PHASE) 1095 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_PARITY, 0); 1096 else 1097 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ERROR, 1); 1098 } 1099 1100 /******************************************* 1101 * aribitration & selection 1102 *******************************************/ 1103 switch (ti->ti_phase) 1104 { 1105 case PH_ARBSTART: 1106 if ((astatus & ASTAT_ARBIT) == 0) 1107 { 1108#ifdef STG_STATICS 1109 stg_statics.arbit_fail_0 ++; 1110#endif /* STG_STATICS */ 1111 goto arb_fail; 1112 } 1113 1114 status = bus_space_read_1(iot, ioh, tmc_bstat); 1115 if ((status & BSTAT_IO) != 0) 1116 { 1117 /* XXX: 1118 * Selection vs Reselection conflicts. 1119 */ 1120#ifdef STG_STATICS 1121 stg_statics.arbit_fail_1 ++; 1122#endif /* STG_STATICS */ 1123arb_fail: 1124 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 1125 stghw_bcr_write_1(sc, BCTL_BUSFREE); 1126 scsi_low_arbit_fail(slp, slp->sl_Qnexus); 1127 goto out; 1128 } 1129 1130 /* 1131 * selection assert start. 1132 */ 1133 SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART); 1134 scsi_low_arbit_win(slp); 1135 1136 s = splhigh(); 1137 bus_space_write_1(iot, ioh, tmc_scsiid, 1138 sc->sc_idbit | (1 << ti->ti_id)); 1139 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL); 1140 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit); 1141 if ((stg_io_control & STG_WAIT_FOR_SELECT) != 0) 1142 { 1143 /* selection abort delay 200 + 100 micro sec */ 1144 if (stghw_select_targ_wait(sc, 300) == 0) 1145 { 1146 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED); 1147 stg_selection_done_and_expect_msgout(sc); 1148 } 1149 } 1150 splx(s); 1151 goto out; 1152 1153 case PH_SELSTART: 1154 if ((status & BSTAT_BSY) == 0) 1155 { 1156 /* selection timeout delay 250 ms */ 1157 if (stghw_select_targ_wait(sc, 250 * 1000) != 0) 1158 { 1159 stg_disconnected(sc, ti); 1160 goto out; 1161 } 1162 } 1163 1164 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED); 1165 stg_selection_done_and_expect_msgout(sc); 1166 goto out; 1167 1168 case PH_SELECTED: 1169 if ((status & BSTAT_REQ) == 0) 1170 goto out; 1171 stg_target_nexus_establish(sc); 1172 break; 1173 1174 case PH_RESEL: 1175 if ((status & BSTAT_REQ) == 0) 1176 goto out; 1177 1178 /* clear a busy line */ 1179 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 1180 stghw_bcr_write_1(sc, sc->sc_busc); 1181 stg_target_nexus_establish(sc); 1182 if ((status & PHASE_MASK) != MESSAGE_IN_PHASE) 1183 { 1184 printf("%s: unexpected phase after reselect\n", 1185 slp->sl_xname); 1186 slp->sl_error |= FATALIO; 1187 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1); 1188 goto out; 1189 } 1190 break; 1191 } 1192 1193 /******************************************* 1194 * data phase 1195 *******************************************/ 1196 if ((slp->sl_flags & HW_PDMASTART) && STG_IS_PHASE_DATA(status) == 0) 1197 { 1198 if (slp->sl_scp.scp_direction == SCSI_LOW_READ) 1199 stg_pio_read(sc, ti, 0); 1200 1201 stg_pdma_end(sc, ti); 1202 } 1203 1204 /******************************************* 1205 * scsi seq 1206 *******************************************/ 1207 switch (status & PHASE_MASK) 1208 { 1209 case COMMAND_PHASE: 1210 if (stg_expect_signal(sc, COMMAND_PHASE, BSTAT_REQ) <= 0) 1211 break; 1212 1213 SCSI_LOW_SETUP_PHASE(ti, PH_CMD); 1214 if (scsi_low_cmd(slp, ti) != 0) 1215 { 1216 scsi_low_attention(slp); 1217 } 1218 1219 if (stg_xfer(sc, slp->sl_scp.scp_cmd, slp->sl_scp.scp_cmdlen, 1220 COMMAND_PHASE, 0) != 0) 1221 { 1222 printf("%s: CMDOUT short\n", slp->sl_xname); 1223 } 1224 break; 1225 1226 case DATA_OUT_PHASE: 1227 SCSI_LOW_SETUP_PHASE(ti, PH_DATA); 1228 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0) 1229 { 1230 scsi_low_attention(slp); 1231 } 1232 1233 pp = physio_proc_enter(bp); 1234 if ((sc->sc_icinit & ICTL_FIFO) != 0) 1235 stg_pio_write(sc, ti, sc->sc_wthold); 1236 else 1237 stg_pio_write(sc, ti, 0); 1238 physio_proc_leave(pp); 1239 break; 1240 1241 case DATA_IN_PHASE: 1242 SCSI_LOW_SETUP_PHASE(ti, PH_DATA); 1243 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0) 1244 { 1245 scsi_low_attention(slp); 1246 } 1247 1248 pp = physio_proc_enter(bp); 1249 if ((sc->sc_icinit & ICTL_FIFO) != 0) 1250 stg_pio_read(sc, ti, sc->sc_rthold); 1251 else 1252 stg_pio_read(sc, ti, 0); 1253 physio_proc_leave(pp); 1254 break; 1255 1256 case STATUS_PHASE: 1257 regv = stg_expect_signal(sc, STATUS_PHASE, BSTAT_REQ); 1258 if (regv <= 0) 1259 break; 1260 1261 SCSI_LOW_SETUP_PHASE(ti, PH_STAT); 1262 regv = bus_space_read_1(iot, ioh, tmc_sdna); 1263 if (scsi_low_statusin(slp, ti, regv | derror) != 0) 1264 { 1265 scsi_low_attention(slp); 1266 } 1267 if (regv != bus_space_read_1(iot, ioh, tmc_rdata)) 1268 { 1269 printf("%s: STATIN: data mismatch\n", slp->sl_xname); 1270 } 1271 stg_negate_signal(sc, BSTAT_ACK, "statin<ACK>"); 1272 break; 1273 1274 case MESSAGE_OUT_PHASE: 1275 if (stg_expect_signal(sc, MESSAGE_OUT_PHASE, BSTAT_REQ) <= 0) 1276 break; 1277 1278 SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT); 1279 flags = (ti->ti_ophase != ti->ti_phase) ? 1280 SCSI_LOW_MSGOUT_INIT : 0; 1281 len = scsi_low_msgout(slp, ti, flags); 1282 1283 if (len > 1 && slp->sl_atten == 0) 1284 { 1285 scsi_low_attention(slp); 1286 } 1287 1288 if (stg_xfer(sc, ti->ti_msgoutstr, len, MESSAGE_OUT_PHASE, 1289 slp->sl_clear_atten) != 0) 1290 { 1291 printf("%s: MSGOUT short\n", slp->sl_xname); 1292 } 1293 else 1294 { 1295 if (slp->sl_msgphase >= MSGPH_ABORT) 1296 { 1297 stg_disconnected(sc, ti); 1298 } 1299 } 1300 break; 1301 1302 case MESSAGE_IN_PHASE: 1303 /* confirm phase and req signal */ 1304 if (stg_expect_signal(sc, MESSAGE_IN_PHASE, BSTAT_REQ) <= 0) 1305 break; 1306 1307 SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN); 1308 1309 /* read data with NOACK */ 1310 regv = bus_space_read_1(iot, ioh, tmc_sdna); 1311 1312 if (scsi_low_msgin(slp, ti, derror | regv) == 0) 1313 { 1314 if (scsi_low_is_msgout_continue(ti, 0) != 0) 1315 { 1316 scsi_low_attention(slp); 1317 } 1318 } 1319 1320 /* read data with ACK */ 1321 if (regv != bus_space_read_1(iot, ioh, tmc_rdata)) 1322 { 1323 printf("%s: MSGIN: data mismatch\n", slp->sl_xname); 1324 } 1325 1326 /* wait for the ack negated */ 1327 stg_negate_signal(sc, BSTAT_ACK, "msgin<ACK>"); 1328 1329 if (slp->sl_msgphase != 0 && slp->sl_msgphase < MSGPH_ABORT) 1330 { 1331 stg_disconnected(sc, ti); 1332 } 1333 break; 1334 1335 case BUSFREE_PHASE: 1336 printf("%s: unexpected disconnect\n", slp->sl_xname); 1337 stg_disconnected(sc, ti); 1338 break; 1339 1340 default: 1341 slp->sl_error |= FATALIO; 1342 printf("%s: unknown phase bus %x intr %x\n", 1343 slp->sl_xname, status, astatus); 1344 break; 1345 } 1346 1347out: 1348 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit); 1349 return 1; 1350} 1351 1352static int 1353stg_timeout(sc) 1354 struct stg_softc *sc; 1355{ 1356 struct scsi_low_softc *slp = &sc->sc_sclow; 1357 bus_space_tag_t iot = sc->sc_iot; 1358 bus_space_handle_t ioh = sc->sc_ioh; 1359 int tout, count; 1360 u_int8_t status; 1361 1362 if (slp->sl_Tnexus == NULL) 1363 return 0; 1364 1365 status = bus_space_read_1(iot, ioh, tmc_bstat); 1366 if ((status & PHASE_MASK) == 0) 1367 { 1368 if (sc->sc_ubf_timeout ++ == 0) 1369 return 0; 1370 1371 printf("%s: unexpected bus free detected\n", slp->sl_xname); 1372 slp->sl_error |= FATALIO; 1373 scsi_low_print(slp, slp->sl_Tnexus); 1374 stg_disconnected(sc, slp->sl_Tnexus); 1375 return 0; 1376 } 1377 1378 switch (status & PHASE_MASK) 1379 { 1380 case DATA_OUT_PHASE: 1381 if (sc->sc_dataout_timeout == 0) 1382 break; 1383 if ((status & BSTAT_REQ) == 0) 1384 break; 1385 if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0) 1386 break; 1387 if ((-- sc->sc_dataout_timeout) > 0) 1388 break; 1389 1390 slp->sl_error |= PDMAERR; 1391 if ((slp->sl_flags & HW_WRITE_PADDING) == 0) 1392 { 1393 printf("%s: write padding required\n", 1394 slp->sl_xname); 1395 break; 1396 } 1397 1398 bus_space_write_1(iot, ioh, tmc_ictl, 0); 1399 1400 tout = STG_DELAY_MAX; 1401 while (tout --) 1402 { 1403 status = bus_space_read_1(iot, ioh, tmc_bstat); 1404 if ((status & PHASE_MASK) != DATA_OUT_PHASE) 1405 break; 1406 1407 if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0) 1408 { 1409 SCSI_LOW_DELAY(1); 1410 continue; 1411 } 1412 1413 for (count = sc->sc_maxwsize; count > 0; count --) 1414 bus_space_write_1(iot, ioh, tmc_wfifo, 0); 1415 } 1416 1417 status = bus_space_read_1(iot, ioh, tmc_bstat); 1418 if ((status & PHASE_MASK) == DATA_OUT_PHASE) 1419 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ; 1420 1421 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit); 1422 break; 1423 1424 default: 1425 break; 1426 } 1427 return 0; 1428} 1429