tmc18c30.c revision 119420
1/* $NecBSD: tmc18c30.c,v 1.28.12.3 2001/06/19 04:35:48 honda Exp $ */ 2/* $NetBSD$ */ 3 4#define STG_DEBUG 5#define STG_STATICS 6#define STG_IO_CONTROL_FLAGS (STG_FIFO_INTERRUPTS | STG_WAIT_FOR_SELECT) 7 8/* 9 * [NetBSD for NEC PC-98 series] 10 * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001 11 * NetBSD/pc98 porting staff. All rights reserved. 12 * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001 13 * Naofumi HONDA. All rights reserved. 14 * Copyright (c) 1996, 1997, 1998, 1999 15 * Kouichi Matsuda. All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions 19 * are met: 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 3. The name of the author may not be used to endorse or promote products 26 * derived from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 29 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 30 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 31 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 32 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 33 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41#include <sys/cdefs.h> 42__FBSDID("$FreeBSD: head/sys/dev/stg/tmc18c30.c 119420 2003-08-24 18:17:24Z obrien $"); 43#include "opt_ddb.h" 44 45#include <sys/param.h> 46#include <sys/systm.h> 47#include <sys/kernel.h> 48#if defined(__FreeBSD__) && __FreeBSD_version >= 500001 49#include <sys/bio.h> 50#endif /* __FreeBSD__ */ 51#include <sys/buf.h> 52#include <sys/queue.h> 53#include <sys/malloc.h> 54#include <sys/errno.h> 55 56#ifdef __NetBSD__ 57#include <sys/device.h> 58#include <machine/bus.h> 59#include <machine/intr.h> 60 61#include <dev/scsipi/scsi_all.h> 62#include <dev/scsipi/scsipi_all.h> 63#include <dev/scsipi/scsiconf.h> 64#include <dev/scsipi/scsi_disk.h> 65 66#include <machine/dvcfg.h> 67#include <machine/physio_proc.h> 68 69#include <i386/Cbus/dev/scsi_low.h> 70#include <i386/Cbus/dev/tmc18c30reg.h> 71#include <i386/Cbus/dev/tmc18c30var.h> 72#endif /* __NetBSD__ */ 73 74#ifdef __FreeBSD__ 75#include <machine/clock.h> 76#include <machine/cpu.h> 77#include <machine/bus_pio.h> 78#include <machine/bus.h> 79 80#include <machine/dvcfg.h> 81#include <machine/physio_proc.h> 82 83#include <cam/scsi/scsi_low.h> 84#include <dev/stg/tmc18c30reg.h> 85#include <dev/stg/tmc18c30var.h> 86#endif /* __FreeBSD__ */ 87 88/*************************************************** 89 * USER SETTINGS 90 ***************************************************/ 91/* DEVICE CONFIGURATION FLAGS (MINOR) 92 * 93 * 0x01 DISCONECT OFF 94 * 0x02 PARITY LINE OFF 95 * 0x04 IDENTIFY MSG OFF ( = single lun) 96 * 0x08 SYNC TRANSFER OFF 97 */ 98/* #define STG_SYNC_SUPPORT */ /* NOT YET but easy */ 99 100/* For the 512 fifo type: change below */ 101#define TMC18C30_FIFOSZ 0x800 102#define TMC18C30_FCBSZ 0x200 103#define TMC18C50_FIFOSZ 0x2000 104#define TMC18C50_FCBSZ 0x400 105 106#define STG_MAX_DATA_SIZE (64 * 1024) 107#define STG_DELAY_MAX (2 * 1000 * 1000) 108#define STG_DELAY_INTERVAL (1) 109#define STG_DELAY_SELECT_POLLING_MAX (5 * 1000 * 1000) 110 111/*************************************************** 112 * PARAMS 113 ***************************************************/ 114#define STG_NTARGETS 8 115#define STG_NLUNS 8 116 117/*************************************************** 118 * DEBUG 119 ***************************************************/ 120#ifdef STG_DEBUG 121static int stg_debug; 122#endif /* STG_DEBUG */ 123 124#ifdef STG_STATICS 125static struct stg_statics { 126 int arbit_fail_0; 127 int arbit_fail_1; 128 int disconnect; 129 int reselect; 130} stg_statics; 131#endif /* STG_STATICS */ 132 133/*************************************************** 134 * IO control flags 135 ***************************************************/ 136#define STG_FIFO_INTERRUPTS 0x0001 137#define STG_WAIT_FOR_SELECT 0x0100 138 139int stg_io_control = STG_IO_CONTROL_FLAGS; 140 141/*************************************************** 142 * DEVICE STRUCTURE 143 ***************************************************/ 144extern struct cfdriver stg_cd; 145 146/************************************************************** 147 * DECLARE 148 **************************************************************/ 149/* static */ 150static void stg_pio_read(struct stg_softc *, struct targ_info *, u_int); 151static void stg_pio_write(struct stg_softc *, struct targ_info *, u_int); 152static int stg_xfer(struct stg_softc *, u_int8_t *, int, int, int); 153static int stg_msg(struct stg_softc *, struct targ_info *, u_int); 154static int stg_reselected(struct stg_softc *); 155static int stg_disconnected(struct stg_softc *, struct targ_info *); 156static __inline void stg_pdma_end(struct stg_softc *, struct targ_info *); 157static int stghw_select_targ_wait(struct stg_softc *, int); 158static int stghw_check(struct stg_softc *); 159static void stghw_init(struct stg_softc *); 160static int stg_negate_signal(struct stg_softc *, u_int8_t, u_char *); 161static int stg_expect_signal(struct stg_softc *, u_int8_t, u_int8_t); 162static int stg_world_start(struct stg_softc *, int); 163static int stghw_start_selection(struct stg_softc *sc, struct slccb *); 164static void stghw_bus_reset(struct stg_softc *); 165static void stghw_attention(struct stg_softc *); 166static int stg_target_nexus_establish(struct stg_softc *); 167static int stg_lun_nexus_establish(struct stg_softc *); 168static int stg_ccb_nexus_establish(struct stg_softc *); 169static int stg_targ_init(struct stg_softc *, struct targ_info *, int); 170static __inline void stghw_bcr_write_1(struct stg_softc *, u_int8_t); 171static int stg_timeout(struct stg_softc *); 172static void stg_selection_done_and_expect_msgout(struct stg_softc *); 173 174struct scsi_low_funcs stgfuncs = { 175 SC_LOW_INIT_T stg_world_start, 176 SC_LOW_BUSRST_T stghw_bus_reset, 177 SC_LOW_TARG_INIT_T stg_targ_init, 178 SC_LOW_LUN_INIT_T NULL, 179 180 SC_LOW_SELECT_T stghw_start_selection, 181 SC_LOW_NEXUS_T stg_lun_nexus_establish, 182 SC_LOW_NEXUS_T stg_ccb_nexus_establish, 183 184 SC_LOW_ATTEN_T stghw_attention, 185 SC_LOW_MSG_T stg_msg, 186 187 SC_LOW_TIMEOUT_T stg_timeout, 188 SC_LOW_POLL_T stgintr, 189 190 NULL, 191}; 192 193/**************************************************** 194 * hwfuncs 195 ****************************************************/ 196static __inline void 197stghw_bcr_write_1(sc, bcv) 198 struct stg_softc *sc; 199 u_int8_t bcv; 200{ 201 202 bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, bcv); 203 sc->sc_busimg = bcv; 204} 205 206static int 207stghw_check(sc) 208 struct stg_softc *sc; 209{ 210 struct scsi_low_softc *slp = &sc->sc_sclow; 211 bus_space_tag_t iot = sc->sc_iot; 212 bus_space_handle_t ioh = sc->sc_ioh; 213 u_int fcbsize, fcb; 214 u_int16_t lsb, msb; 215 216 lsb = bus_space_read_1(iot, ioh, tmc_idlsb); 217 msb = bus_space_read_1(iot, ioh, tmc_idmsb); 218 switch (msb << 8 | lsb) 219 { 220 case 0x6127: 221 /* TMCCHIP_1800 not supported. (it's my policy) */ 222 sc->sc_chip = TMCCHIP_1800; 223 return EINVAL; 224 225 case 0x60e9: 226 if (bus_space_read_1(iot, ioh, tmc_cfg2) & 0x02) 227 { 228 sc->sc_chip = TMCCHIP_18C30; 229 sc->sc_fsz = TMC18C30_FIFOSZ; 230 fcbsize = TMC18C30_FCBSZ; 231 } 232 else 233 { 234 sc->sc_chip = TMCCHIP_18C50; 235 sc->sc_fsz = TMC18C50_FIFOSZ; 236 fcbsize = TMC18C50_FCBSZ; 237 } 238 break; 239 240 default: 241 sc->sc_chip = TMCCHIP_UNK; 242 return ENODEV; 243 } 244 245 sc->sc_fcRinit = FCTL_INTEN; 246 sc->sc_fcWinit = FCTL_PARENB | FCTL_INTEN; 247 248 if (slp->sl_cfgflags & CFG_NOATTEN) 249 sc->sc_imsg = 0; 250 else 251 sc->sc_imsg = BCTL_ATN; 252 sc->sc_busc = BCTL_BUSEN; 253 254 sc->sc_wthold = fcbsize + 256; 255 sc->sc_rthold = fcbsize - 256; 256 sc->sc_maxwsize = sc->sc_fsz; 257 258 fcb = fcbsize / (sc->sc_fsz / 16); 259 sc->sc_icinit = ICTL_CD | ICTL_SEL | ICTL_ARBIT | fcb; 260 return 0; 261} 262 263static void 264stghw_init(sc) 265 struct stg_softc *sc; 266{ 267 bus_space_tag_t iot = sc->sc_iot; 268 bus_space_handle_t ioh = sc->sc_ioh; 269 270 bus_space_write_1(iot, ioh, tmc_ictl, 0); 271 stghw_bcr_write_1(sc, BCTL_BUSFREE); 272 bus_space_write_1(iot, ioh, tmc_fctl, 273 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT); 274 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 275 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit); 276 277 bus_space_write_1(iot, ioh, tmc_ssctl, 0); 278} 279 280static int 281stg_targ_init(sc, ti, action) 282 struct stg_softc *sc; 283 struct targ_info *ti; 284 int action; 285{ 286 struct stg_targ_info *sti = (void *) ti; 287 288 if (action == SCSI_LOW_INFO_ALLOC || action == SCSI_LOW_INFO_REVOKE) 289 { 290 ti->ti_width = SCSI_LOW_BUS_WIDTH_8; 291 ti->ti_maxsynch.period = 0; 292 ti->ti_maxsynch.offset = 0; 293 sti->sti_reg_synch = 0; 294 } 295 return 0; 296} 297 298/**************************************************** 299 * scsi low interface 300 ****************************************************/ 301static void 302stghw_attention(sc) 303 struct stg_softc *sc; 304{ 305 306 sc->sc_busc |= BCTL_ATN; 307 sc->sc_busimg |= BCTL_ATN; 308 bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, sc->sc_busimg); 309 SCSI_LOW_DELAY(10); 310} 311 312static void 313stghw_bus_reset(sc) 314 struct stg_softc *sc; 315{ 316 bus_space_tag_t iot = sc->sc_iot; 317 bus_space_handle_t ioh = sc->sc_ioh; 318 319 bus_space_write_1(iot, ioh, tmc_ictl, 0); 320 bus_space_write_1(iot, ioh, tmc_fctl, 0); 321 stghw_bcr_write_1(sc, BCTL_RST); 322 SCSI_LOW_DELAY(100000); 323 stghw_bcr_write_1(sc, BCTL_BUSFREE); 324} 325 326static int 327stghw_start_selection(sc, cb) 328 struct stg_softc *sc; 329 struct slccb *cb; 330{ 331 bus_space_tag_t iot = sc->sc_iot; 332 bus_space_handle_t ioh = sc->sc_ioh; 333 struct targ_info *ti = cb->ti; 334 register u_int8_t stat; 335 int s; 336 337 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000; 338 sc->sc_dataout_timeout = 0; 339 sc->sc_ubf_timeout = 0; 340 stghw_bcr_write_1(sc, BCTL_BUSFREE); 341 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit); 342 343 s = splhigh(); 344 stat = bus_space_read_1(iot, ioh, tmc_astat); 345 if ((stat & ASTAT_INT) != 0) 346 { 347 splx(s); 348 return SCSI_LOW_START_FAIL; 349 } 350 351 bus_space_write_1(iot, ioh, tmc_scsiid, sc->sc_idbit); 352 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_ARBIT); 353 splx(s); 354 355 SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART); 356 return SCSI_LOW_START_OK; 357} 358 359static int 360stg_world_start(sc, fdone) 361 struct stg_softc *sc; 362 int fdone; 363{ 364 struct scsi_low_softc *slp = &sc->sc_sclow; 365 int error; 366 367 if ((slp->sl_cfgflags & CFG_NOPARITY) == 0) 368 sc->sc_fcRinit |= FCTL_PARENB; 369 else 370 sc->sc_fcRinit &= ~FCTL_PARENB; 371 372 if ((error = stghw_check(sc)) != 0) 373 return error; 374 375 stghw_init(sc); 376 scsi_low_bus_reset(slp); 377 stghw_init(sc); 378 379 SOFT_INTR_REQUIRED(slp); 380 return 0; 381} 382 383static int 384stg_msg(sc, ti, msg) 385 struct stg_softc *sc; 386 struct targ_info *ti; 387 u_int msg; 388{ 389 bus_space_tag_t iot = sc->sc_iot; 390 bus_space_handle_t ioh = sc->sc_ioh; 391 struct stg_targ_info *sti = (void *) ti; 392 u_int period, offset; 393 394 if ((msg & SCSI_LOW_MSG_WIDE) != 0) 395 { 396 if (ti->ti_width != SCSI_LOW_BUS_WIDTH_8) 397 { 398 ti->ti_width = SCSI_LOW_BUS_WIDTH_8; 399 return EINVAL; 400 } 401 return 0; 402 } 403 404 if ((msg & SCSI_LOW_MSG_SYNCH) == 0) 405 return 0; 406 407 period = ti->ti_maxsynch.period; 408 offset = ti->ti_maxsynch.offset; 409 period = period << 2; 410 if (period >= 200) 411 { 412 sti->sti_reg_synch = (period - 200) / 50; 413 if (period % 50) 414 sti->sti_reg_synch ++; 415 sti->sti_reg_synch |= SSCTL_SYNCHEN; 416 } 417 else if (period >= 100) 418 { 419 sti->sti_reg_synch = (period - 100) / 50; 420 if (period % 50) 421 sti->sti_reg_synch ++; 422 sti->sti_reg_synch |= SSCTL_SYNCHEN | SSCTL_FSYNCHEN; 423 } 424 bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch); 425 return 0; 426} 427 428/************************************************************** 429 * General probe attach 430 **************************************************************/ 431int 432stgprobesubr(iot, ioh, dvcfg) 433 bus_space_tag_t iot; 434 bus_space_handle_t ioh; 435 u_int dvcfg; 436{ 437 u_int16_t lsb, msb; 438 439 lsb = bus_space_read_1(iot, ioh, tmc_idlsb); 440 msb = bus_space_read_1(iot, ioh, tmc_idmsb); 441 switch (msb << 8 | lsb) 442 { 443 default: 444 return 0; 445 case 0x6127: 446 /* not support! */ 447 return 0; 448 case 0x60e9: 449 return 1; 450 } 451 return 0; 452} 453 454int 455stgprint(aux, name) 456 void *aux; 457 const char *name; 458{ 459 460 if (name != NULL) 461 printf("%s: scsibus ", name); 462 return UNCONF; 463} 464 465void 466stgattachsubr(sc) 467 struct stg_softc *sc; 468{ 469 struct scsi_low_softc *slp = &sc->sc_sclow; 470 471 printf("\n"); 472 473 sc->sc_idbit = (1 << slp->sl_hostid); 474 slp->sl_funcs = &stgfuncs; 475 sc->sc_tmaxcnt = SCSI_LOW_MIN_TOUT * 1000 * 1000; /* default */ 476 477 slp->sl_flags |= HW_READ_PADDING; 478 slp->sl_cfgflags |= CFG_ASYNC; /* XXX */ 479 480 (void) scsi_low_attach(slp, 0, STG_NTARGETS, STG_NLUNS, 481 sizeof(struct stg_targ_info), 0); 482} 483 484/************************************************************** 485 * PDMA functions 486 **************************************************************/ 487static __inline void 488stg_pdma_end(sc, ti) 489 struct stg_softc *sc; 490 struct targ_info *ti; 491{ 492 struct scsi_low_softc *slp = &sc->sc_sclow; 493 bus_space_tag_t iot = sc->sc_iot; 494 bus_space_handle_t ioh = sc->sc_ioh; 495 struct slccb *cb = slp->sl_Qnexus; 496 u_int len, tres; 497 498 slp->sl_flags &= ~HW_PDMASTART; 499 sc->sc_icinit &= ~ICTL_FIFO; 500 sc->sc_dataout_timeout = 0; 501 502 if (cb == NULL) 503 { 504 slp->sl_error |= PDMAERR; 505 goto out; 506 } 507 508 if (ti->ti_phase == PH_DATA) 509 { 510 len = bus_space_read_2(iot, ioh, tmc_fdcnt); 511 if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE) 512 { 513 if (len != 0) 514 { 515 tres = len + slp->sl_scp.scp_datalen; 516 if (tres <= (u_int) cb->ccb_scp.scp_datalen) 517 { 518 slp->sl_scp.scp_data -= len; 519 slp->sl_scp.scp_datalen = tres; 520 } 521 else 522 { 523 slp->sl_error |= PDMAERR; 524 printf("%s len %x >= datalen %x\n", 525 slp->sl_xname, 526 len, slp->sl_scp.scp_datalen); 527 } 528 } 529 } 530 else if (slp->sl_scp.scp_direction == SCSI_LOW_READ) 531 { 532 if (len != 0) 533 { 534 slp->sl_error |= PDMAERR; 535 printf("%s: len %x left in fifo\n", 536 slp->sl_xname, len); 537 } 538 } 539 scsi_low_data_finish(slp); 540 } 541 else 542 { 543 544 printf("%s data phase miss\n", slp->sl_xname); 545 slp->sl_error |= PDMAERR; 546 } 547 548out: 549 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 550} 551 552static void 553stg_pio_read(sc, ti, thold) 554 struct stg_softc *sc; 555 struct targ_info *ti; 556 u_int thold; 557{ 558 struct scsi_low_softc *slp = &sc->sc_sclow; 559 bus_space_tag_t iot = sc->sc_iot; 560 bus_space_handle_t ioh = sc->sc_ioh; 561 struct sc_p *sp = &slp->sl_scp; 562 int s, tout; 563 u_int res; 564 u_int8_t stat; 565 566 if ((slp->sl_flags & HW_PDMASTART) == 0) 567 { 568 bus_space_write_1(iot, ioh, tmc_fctl, 569 sc->sc_fcRinit | FCTL_FIFOEN); 570 slp->sl_flags |= HW_PDMASTART; 571 } 572 573 tout = sc->sc_tmaxcnt; 574 while (tout -- > 0) 575 { 576 if (thold > 0) 577 { 578 s = splhigh(); 579 res = bus_space_read_2(iot, ioh, tmc_fdcnt); 580 if (res < thold) 581 { 582 bus_space_write_1(iot, ioh, tmc_ictl, 583 sc->sc_icinit); 584 splx(s); 585 break; 586 } 587 splx(s); 588 } 589 else 590 { 591 stat = bus_space_read_1(iot, ioh, tmc_bstat); 592 res = bus_space_read_2(iot, ioh, tmc_fdcnt); 593 if (res == 0) 594 { 595 if ((stat & PHASE_MASK) != DATA_IN_PHASE) 596 break; 597 if (sp->scp_datalen <= 0) 598 break; 599 SCSI_LOW_DELAY(1); 600 continue; 601 } 602 } 603 604 /* The assumtion res != 0 is valid here */ 605 if (res > sp->scp_datalen) 606 { 607 if (res == (u_int) -1) 608 break; 609 610 slp->sl_error |= PDMAERR; 611 if ((slp->sl_flags & HW_READ_PADDING) == 0) 612 { 613 printf("%s: read padding required\n", 614 slp->sl_xname); 615 break; 616 } 617 618 sp->scp_datalen = 0; 619 if (res > STG_MAX_DATA_SIZE) 620 res = STG_MAX_DATA_SIZE; 621 while (res -- > 0) 622 { 623 (void) bus_space_read_1(iot, ioh, tmc_rfifo); 624 } 625 continue; 626 } 627 628 sp->scp_datalen -= res; 629 if (res & 1) 630 { 631 *sp->scp_data = bus_space_read_1(iot, ioh, tmc_rfifo); 632 sp->scp_data ++; 633 res --; 634 } 635 636 bus_space_read_multi_2(iot, ioh, tmc_rfifo, 637 (u_int16_t *) sp->scp_data, res >> 1); 638 sp->scp_data += res; 639 } 640 641 if (tout <= 0) 642 printf("%s: pio read timeout\n", slp->sl_xname); 643} 644 645static void 646stg_pio_write(sc, ti, thold) 647 struct stg_softc *sc; 648 struct targ_info *ti; 649 u_int thold; 650{ 651 struct scsi_low_softc *slp = &sc->sc_sclow; 652 bus_space_tag_t iot = sc->sc_iot; 653 bus_space_handle_t ioh = sc->sc_ioh; 654 struct sc_p *sp = &slp->sl_scp; 655 u_int res; 656 int s, tout; 657 register u_int8_t stat; 658 659 if ((slp->sl_flags & HW_PDMASTART) == 0) 660 { 661 stat = sc->sc_fcWinit | FCTL_FIFOEN | FCTL_FIFOW; 662 bus_space_write_1(iot, ioh, tmc_fctl, stat | FCTL_CLRFIFO); 663 bus_space_write_1(iot, ioh, tmc_fctl, stat); 664 slp->sl_flags |= HW_PDMASTART; 665 } 666 667 tout = sc->sc_tmaxcnt; 668 while (tout -- > 0) 669 { 670 stat = bus_space_read_1(iot, ioh, tmc_bstat); 671 if ((stat & PHASE_MASK) != DATA_OUT_PHASE) 672 break; 673 674 if (sp->scp_datalen <= 0) 675 { 676 if (sc->sc_dataout_timeout == 0) 677 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ; 678 break; 679 } 680 681 if (thold > 0) 682 { 683 s = splhigh(); 684 res = bus_space_read_2(iot, ioh, tmc_fdcnt); 685 if (res > thold) 686 { 687 bus_space_write_1(iot, ioh, tmc_ictl, 688 sc->sc_icinit); 689 splx(s); 690 break; 691 } 692 splx(s); 693 } 694 else 695 { 696 res = bus_space_read_2(iot, ioh, tmc_fdcnt); 697 if (res > sc->sc_maxwsize / 2) 698 { 699 SCSI_LOW_DELAY(1); 700 continue; 701 } 702 } 703 704 if (res == (u_int) -1) 705 break; 706 res = sc->sc_maxwsize - res; 707 if (res > sp->scp_datalen) 708 res = sp->scp_datalen; 709 710 sp->scp_datalen -= res; 711 if ((res & 0x1) != 0) 712 { 713 bus_space_write_1(iot, ioh, tmc_wfifo, *sp->scp_data); 714 sp->scp_data ++; 715 res --; 716 } 717 718 bus_space_write_multi_2(iot, ioh, tmc_wfifo, 719 (u_int16_t *) sp->scp_data, res >> 1); 720 sp->scp_data += res; 721 } 722 723 if (tout <= 0) 724 printf("%s: pio write timeout\n", slp->sl_xname); 725} 726 727static int 728stg_negate_signal(sc, mask, s) 729 struct stg_softc *sc; 730 u_int8_t mask; 731 u_char *s; 732{ 733 struct scsi_low_softc *slp = &sc->sc_sclow; 734 bus_space_tag_t bst = sc->sc_iot; 735 bus_space_handle_t bsh = sc->sc_ioh; 736 int wc; 737 u_int8_t regv; 738 739 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++) 740 { 741 regv = bus_space_read_1(bst, bsh, tmc_bstat); 742 if (regv == (u_int8_t) -1) 743 return -1; 744 if ((regv & mask) == 0) 745 return 1; 746 747 SCSI_LOW_DELAY(STG_DELAY_INTERVAL); 748 } 749 750 printf("%s: %s stg_negate_signal timeout\n", slp->sl_xname, s); 751 return -1; 752} 753 754static int 755stg_expect_signal(sc, phase, mask) 756 struct stg_softc *sc; 757 u_int8_t phase, mask; 758{ 759 struct scsi_low_softc *slp = &sc->sc_sclow; 760 bus_space_tag_t bst = sc->sc_iot; 761 bus_space_handle_t bsh = sc->sc_ioh; 762 int wc; 763 u_int8_t ph; 764 765 phase &= PHASE_MASK; 766 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++) 767 { 768 ph = bus_space_read_1(bst, bsh, tmc_bstat); 769 if (ph == (u_int8_t) -1) 770 return -1; 771 if ((ph & PHASE_MASK) != phase) 772 return 0; 773 if ((ph & mask) != 0) 774 return 1; 775 776 SCSI_LOW_DELAY(STG_DELAY_INTERVAL); 777 } 778 779 printf("%s: stg_expect_signal timeout\n", slp->sl_xname); 780 return -1; 781} 782 783static int 784stg_xfer(sc, buf, len, phase, clear_atn) 785 struct stg_softc *sc; 786 u_int8_t *buf; 787 int len; 788 int phase; 789 int clear_atn; 790{ 791 bus_space_tag_t iot = sc->sc_iot; 792 bus_space_handle_t ioh = sc->sc_ioh; 793 int rv, ptr; 794 795 if (phase & BSTAT_IO) 796 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 797 else 798 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit); 799 800 for (ptr = 0; len > 0; len --) 801 { 802 rv = stg_expect_signal(sc, phase, BSTAT_REQ); 803 if (rv <= 0) 804 goto bad; 805 806 if (len == 1 && clear_atn != 0) 807 { 808 sc->sc_busc &= ~BCTL_ATN; 809 stghw_bcr_write_1(sc, sc->sc_busc); 810 SCSI_LOW_DEASSERT_ATN(&sc->sc_sclow); 811 } 812 813 if (phase & BSTAT_IO) 814 { 815 buf[ptr ++] = bus_space_read_1(iot, ioh, tmc_rdata); 816 } 817 else 818 { 819 bus_space_write_1(iot, ioh, tmc_wdata, buf[ptr ++]); 820 } 821 822 stg_negate_signal(sc, BSTAT_ACK, "xfer<ACK>"); 823 } 824 825bad: 826 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 827 return len; 828} 829 830/************************************************************** 831 * disconnect & reselect (HW low) 832 **************************************************************/ 833static int 834stg_reselected(sc) 835 struct stg_softc *sc; 836{ 837 struct scsi_low_softc *slp = &sc->sc_sclow; 838 bus_space_tag_t iot = sc->sc_iot; 839 bus_space_handle_t ioh = sc->sc_ioh; 840 int tout; 841 u_int sid; 842 u_int8_t regv; 843 844 if (slp->sl_selid != NULL) 845 { 846 /* XXX: 847 * Selection vs Reselection conflicts. 848 */ 849 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 850 stghw_bcr_write_1(sc, BCTL_BUSFREE); 851 } 852 else if (slp->sl_Tnexus != NULL) 853 { 854 printf("%s: unexpected termination\n", slp->sl_xname); 855 stg_disconnected(sc, slp->sl_Tnexus); 856 } 857 858 /* XXX: 859 * We should ack the reselection as soon as possible, 860 * becuase the target would abort the current reselection seq 861 * due to reselection timeout. 862 */ 863 tout = STG_DELAY_SELECT_POLLING_MAX; 864 while (tout -- > 0) 865 { 866 regv = bus_space_read_1(iot, ioh, tmc_bstat); 867 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) == 868 (BSTAT_IO | BSTAT_SEL)) 869 { 870 SCSI_LOW_DELAY(1); 871 regv = bus_space_read_1(iot, ioh, tmc_bstat); 872 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) == 873 (BSTAT_IO | BSTAT_SEL)) 874 goto reselect_start; 875 } 876 SCSI_LOW_DELAY(1); 877 } 878 printf("%s: reselction timeout I\n", slp->sl_xname); 879 return EJUSTRETURN; 880 881reselect_start: 882 sid = (u_int) bus_space_read_1(iot, ioh, tmc_scsiid); 883 if ((sid & sc->sc_idbit) == 0) 884 { 885 /* not us */ 886 return EJUSTRETURN; 887 } 888 889 bus_space_write_1(iot, ioh, tmc_fctl, 890 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT); 891 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 892 stghw_bcr_write_1(sc, sc->sc_busc | BCTL_BSY); 893 894 while (tout -- > 0) 895 { 896 regv = bus_space_read_1(iot, ioh, tmc_bstat); 897 if ((regv & (BSTAT_SEL | BSTAT_BSY)) == BSTAT_BSY) 898 goto reselected; 899 SCSI_LOW_DELAY(1); 900 } 901 printf("%s: reselction timeout II\n", slp->sl_xname); 902 return EJUSTRETURN; 903 904reselected: 905 sid &= ~sc->sc_idbit; 906 sid = ffs(sid) - 1; 907 if (scsi_low_reselected(slp, sid) == NULL) 908 return EJUSTRETURN; 909 910#ifdef STG_STATICS 911 stg_statics.reselect ++; 912#endif /* STG_STATICS */ 913 return EJUSTRETURN; 914} 915 916static int 917stg_disconnected(sc, ti) 918 struct stg_softc *sc; 919 struct targ_info *ti; 920{ 921 struct scsi_low_softc *slp = &sc->sc_sclow; 922 bus_space_tag_t iot = sc->sc_iot; 923 bus_space_handle_t ioh = sc->sc_ioh; 924 925 /* clear bus status & fifo */ 926 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO); 927 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 928 stghw_bcr_write_1(sc, BCTL_BUSFREE); 929 sc->sc_icinit &= ~ICTL_FIFO; 930 sc->sc_busc &= ~BCTL_ATN; 931 sc->sc_dataout_timeout = 0; 932 sc->sc_ubf_timeout = 0; 933 934#ifdef STG_STATICS 935 stg_statics.disconnect ++; 936#endif /* STG_STATICS */ 937 scsi_low_disconnected(slp, ti); 938 return 1; 939} 940 941/************************************************************** 942 * SEQUENCER 943 **************************************************************/ 944static int 945stg_target_nexus_establish(sc) 946 struct stg_softc *sc; 947{ 948 struct scsi_low_softc *slp = &sc->sc_sclow; 949 bus_space_tag_t iot = sc->sc_iot; 950 bus_space_handle_t ioh = sc->sc_ioh; 951 struct targ_info *ti = slp->sl_Tnexus; 952 struct stg_targ_info *sti = (void *) ti; 953 954 bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch); 955 if ((stg_io_control & STG_FIFO_INTERRUPTS) != 0) 956 { 957 sc->sc_icinit |= ICTL_FIFO; 958 } 959 return 0; 960} 961 962static int 963stg_lun_nexus_establish(sc) 964 struct stg_softc *sc; 965{ 966 967 return 0; 968} 969 970static int 971stg_ccb_nexus_establish(sc) 972 struct stg_softc *sc; 973{ 974 struct scsi_low_softc *slp = &sc->sc_sclow; 975 struct slccb *cb = slp->sl_Qnexus; 976 977 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000; 978 return 0; 979} 980 981#define STGHW_SELECT_INTERVAL 10 982 983static int 984stghw_select_targ_wait(sc, mu) 985 struct stg_softc *sc; 986 int mu; 987{ 988 bus_space_tag_t iot = sc->sc_iot; 989 bus_space_handle_t ioh = sc->sc_ioh; 990 991 mu = mu / STGHW_SELECT_INTERVAL; 992 while (mu -- > 0) 993 { 994 if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) == 0) 995 { 996 SCSI_LOW_DELAY(STGHW_SELECT_INTERVAL); 997 continue; 998 } 999 SCSI_LOW_DELAY(1); 1000 if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) != 0) 1001 { 1002 return 0; 1003 } 1004 } 1005 return ENXIO; 1006} 1007 1008static void 1009stg_selection_done_and_expect_msgout(sc) 1010 struct stg_softc *sc; 1011{ 1012 struct scsi_low_softc *slp = &sc->sc_sclow; 1013 bus_space_tag_t iot = sc->sc_iot; 1014 bus_space_handle_t ioh = sc->sc_ioh; 1015 1016 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO); 1017 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 1018 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc); 1019 SCSI_LOW_ASSERT_ATN(slp); 1020} 1021 1022int 1023stgintr(arg) 1024 void *arg; 1025{ 1026 struct stg_softc *sc = arg; 1027 struct scsi_low_softc *slp = &sc->sc_sclow; 1028 bus_space_tag_t iot = sc->sc_iot; 1029 bus_space_handle_t ioh = sc->sc_ioh; 1030 struct targ_info *ti; 1031 struct physio_proc *pp; 1032 struct buf *bp; 1033 u_int derror, flags; 1034 int len, s; 1035 u_int8_t status, astatus, regv; 1036 1037 /******************************************* 1038 * interrupt check 1039 *******************************************/ 1040 if (slp->sl_flags & HW_INACTIVE) 1041 return 0; 1042 1043 astatus = bus_space_read_1(iot, ioh, tmc_astat); 1044 status = bus_space_read_1(iot, ioh, tmc_bstat); 1045 1046 if ((astatus & ASTAT_STATMASK) == 0 || astatus == (u_int8_t) -1) 1047 return 0; 1048 1049 bus_space_write_1(iot, ioh, tmc_ictl, 0); 1050 if (astatus & ASTAT_SCSIRST) 1051 { 1052 bus_space_write_1(iot, ioh, tmc_fctl, 1053 sc->sc_fcRinit | FCTL_CLRFIFO); 1054 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 1055 bus_space_write_1(iot, ioh, tmc_ictl, 0); 1056 1057 scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT, 1058 "bus reset (power off?)"); 1059 return 1; 1060 } 1061 1062 /******************************************* 1063 * debug section 1064 *******************************************/ 1065#ifdef STG_DEBUG 1066 if (stg_debug) 1067 { 1068 scsi_low_print(slp, NULL); 1069 printf("%s: st %x ist %x\n\n", slp->sl_xname, 1070 status, astatus); 1071#ifdef DDB 1072 if (stg_debug > 1) 1073 SCSI_LOW_DEBUGGER("stg"); 1074#endif /* DDB */ 1075 } 1076#endif /* STG_DEBUG */ 1077 1078 /******************************************* 1079 * reselection & nexus 1080 *******************************************/ 1081 if ((status & RESEL_PHASE_MASK)== PHASE_RESELECTED) 1082 { 1083 if (stg_reselected(sc) == EJUSTRETURN) 1084 goto out; 1085 } 1086 1087 if ((ti = slp->sl_Tnexus) == NULL) 1088 return 0; 1089 1090 derror = 0; 1091 if ((astatus & ASTAT_PARERR) != 0 && ti->ti_phase != PH_ARBSTART && 1092 (sc->sc_fcRinit & FCTL_PARENB) != 0) 1093 { 1094 slp->sl_error |= PARITYERR; 1095 derror = SCSI_LOW_DATA_PE; 1096 if ((status & PHASE_MASK) == MESSAGE_IN_PHASE) 1097 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_PARITY, 0); 1098 else 1099 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ERROR, 1); 1100 } 1101 1102 /******************************************* 1103 * aribitration & selection 1104 *******************************************/ 1105 switch (ti->ti_phase) 1106 { 1107 case PH_ARBSTART: 1108 if ((astatus & ASTAT_ARBIT) == 0) 1109 { 1110#ifdef STG_STATICS 1111 stg_statics.arbit_fail_0 ++; 1112#endif /* STG_STATICS */ 1113 goto arb_fail; 1114 } 1115 1116 status = bus_space_read_1(iot, ioh, tmc_bstat); 1117 if ((status & BSTAT_IO) != 0) 1118 { 1119 /* XXX: 1120 * Selection vs Reselection conflicts. 1121 */ 1122#ifdef STG_STATICS 1123 stg_statics.arbit_fail_1 ++; 1124#endif /* STG_STATICS */ 1125arb_fail: 1126 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 1127 stghw_bcr_write_1(sc, BCTL_BUSFREE); 1128 scsi_low_arbit_fail(slp, slp->sl_Qnexus); 1129 goto out; 1130 } 1131 1132 /* 1133 * selection assert start. 1134 */ 1135 SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART); 1136 scsi_low_arbit_win(slp); 1137 1138 s = splhigh(); 1139 bus_space_write_1(iot, ioh, tmc_scsiid, 1140 sc->sc_idbit | (1 << ti->ti_id)); 1141 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL); 1142 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit); 1143 if ((stg_io_control & STG_WAIT_FOR_SELECT) != 0) 1144 { 1145 /* selection abort delay 200 + 100 micro sec */ 1146 if (stghw_select_targ_wait(sc, 300) == 0) 1147 { 1148 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED); 1149 stg_selection_done_and_expect_msgout(sc); 1150 } 1151 } 1152 splx(s); 1153 goto out; 1154 1155 case PH_SELSTART: 1156 if ((status & BSTAT_BSY) == 0) 1157 { 1158 /* selection timeout delay 250 ms */ 1159 if (stghw_select_targ_wait(sc, 250 * 1000) != 0) 1160 { 1161 stg_disconnected(sc, ti); 1162 goto out; 1163 } 1164 } 1165 1166 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED); 1167 stg_selection_done_and_expect_msgout(sc); 1168 goto out; 1169 1170 case PH_SELECTED: 1171 if ((status & BSTAT_REQ) == 0) 1172 goto out; 1173 stg_target_nexus_establish(sc); 1174 break; 1175 1176 case PH_RESEL: 1177 if ((status & BSTAT_REQ) == 0) 1178 goto out; 1179 1180 /* clear a busy line */ 1181 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit); 1182 stghw_bcr_write_1(sc, sc->sc_busc); 1183 stg_target_nexus_establish(sc); 1184 if ((status & PHASE_MASK) != MESSAGE_IN_PHASE) 1185 { 1186 printf("%s: unexpected phase after reselect\n", 1187 slp->sl_xname); 1188 slp->sl_error |= FATALIO; 1189 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1); 1190 goto out; 1191 } 1192 break; 1193 } 1194 1195 /******************************************* 1196 * data phase 1197 *******************************************/ 1198 if ((slp->sl_flags & HW_PDMASTART) && STG_IS_PHASE_DATA(status) == 0) 1199 { 1200 if (slp->sl_scp.scp_direction == SCSI_LOW_READ) 1201 stg_pio_read(sc, ti, 0); 1202 1203 stg_pdma_end(sc, ti); 1204 } 1205 1206 /******************************************* 1207 * scsi seq 1208 *******************************************/ 1209 switch (status & PHASE_MASK) 1210 { 1211 case COMMAND_PHASE: 1212 if (stg_expect_signal(sc, COMMAND_PHASE, BSTAT_REQ) <= 0) 1213 break; 1214 1215 SCSI_LOW_SETUP_PHASE(ti, PH_CMD); 1216 if (scsi_low_cmd(slp, ti) != 0) 1217 { 1218 scsi_low_attention(slp); 1219 } 1220 1221 if (stg_xfer(sc, slp->sl_scp.scp_cmd, slp->sl_scp.scp_cmdlen, 1222 COMMAND_PHASE, 0) != 0) 1223 { 1224 printf("%s: CMDOUT short\n", slp->sl_xname); 1225 } 1226 break; 1227 1228 case DATA_OUT_PHASE: 1229 SCSI_LOW_SETUP_PHASE(ti, PH_DATA); 1230 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0) 1231 { 1232 scsi_low_attention(slp); 1233 } 1234 1235 pp = physio_proc_enter(bp); 1236 if ((sc->sc_icinit & ICTL_FIFO) != 0) 1237 stg_pio_write(sc, ti, sc->sc_wthold); 1238 else 1239 stg_pio_write(sc, ti, 0); 1240 physio_proc_leave(pp); 1241 break; 1242 1243 case DATA_IN_PHASE: 1244 SCSI_LOW_SETUP_PHASE(ti, PH_DATA); 1245 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0) 1246 { 1247 scsi_low_attention(slp); 1248 } 1249 1250 pp = physio_proc_enter(bp); 1251 if ((sc->sc_icinit & ICTL_FIFO) != 0) 1252 stg_pio_read(sc, ti, sc->sc_rthold); 1253 else 1254 stg_pio_read(sc, ti, 0); 1255 physio_proc_leave(pp); 1256 break; 1257 1258 case STATUS_PHASE: 1259 regv = stg_expect_signal(sc, STATUS_PHASE, BSTAT_REQ); 1260 if (regv <= 0) 1261 break; 1262 1263 SCSI_LOW_SETUP_PHASE(ti, PH_STAT); 1264 regv = bus_space_read_1(iot, ioh, tmc_sdna); 1265 if (scsi_low_statusin(slp, ti, regv | derror) != 0) 1266 { 1267 scsi_low_attention(slp); 1268 } 1269 if (regv != bus_space_read_1(iot, ioh, tmc_rdata)) 1270 { 1271 printf("%s: STATIN: data mismatch\n", slp->sl_xname); 1272 } 1273 stg_negate_signal(sc, BSTAT_ACK, "statin<ACK>"); 1274 break; 1275 1276 case MESSAGE_OUT_PHASE: 1277 if (stg_expect_signal(sc, MESSAGE_OUT_PHASE, BSTAT_REQ) <= 0) 1278 break; 1279 1280 SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT); 1281 flags = (ti->ti_ophase != ti->ti_phase) ? 1282 SCSI_LOW_MSGOUT_INIT : 0; 1283 len = scsi_low_msgout(slp, ti, flags); 1284 1285 if (len > 1 && slp->sl_atten == 0) 1286 { 1287 scsi_low_attention(slp); 1288 } 1289 1290 if (stg_xfer(sc, ti->ti_msgoutstr, len, MESSAGE_OUT_PHASE, 1291 slp->sl_clear_atten) != 0) 1292 { 1293 printf("%s: MSGOUT short\n", slp->sl_xname); 1294 } 1295 else 1296 { 1297 if (slp->sl_msgphase >= MSGPH_ABORT) 1298 { 1299 stg_disconnected(sc, ti); 1300 } 1301 } 1302 break; 1303 1304 case MESSAGE_IN_PHASE: 1305 /* confirm phase and req signal */ 1306 if (stg_expect_signal(sc, MESSAGE_IN_PHASE, BSTAT_REQ) <= 0) 1307 break; 1308 1309 SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN); 1310 1311 /* read data with NOACK */ 1312 regv = bus_space_read_1(iot, ioh, tmc_sdna); 1313 1314 if (scsi_low_msgin(slp, ti, derror | regv) == 0) 1315 { 1316 if (scsi_low_is_msgout_continue(ti, 0) != 0) 1317 { 1318 scsi_low_attention(slp); 1319 } 1320 } 1321 1322 /* read data with ACK */ 1323 if (regv != bus_space_read_1(iot, ioh, tmc_rdata)) 1324 { 1325 printf("%s: MSGIN: data mismatch\n", slp->sl_xname); 1326 } 1327 1328 /* wait for the ack negated */ 1329 stg_negate_signal(sc, BSTAT_ACK, "msgin<ACK>"); 1330 1331 if (slp->sl_msgphase != 0 && slp->sl_msgphase < MSGPH_ABORT) 1332 { 1333 stg_disconnected(sc, ti); 1334 } 1335 break; 1336 1337 case BUSFREE_PHASE: 1338 printf("%s: unexpected disconnect\n", slp->sl_xname); 1339 stg_disconnected(sc, ti); 1340 break; 1341 1342 default: 1343 slp->sl_error |= FATALIO; 1344 printf("%s: unknown phase bus %x intr %x\n", 1345 slp->sl_xname, status, astatus); 1346 break; 1347 } 1348 1349out: 1350 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit); 1351 return 1; 1352} 1353 1354static int 1355stg_timeout(sc) 1356 struct stg_softc *sc; 1357{ 1358 struct scsi_low_softc *slp = &sc->sc_sclow; 1359 bus_space_tag_t iot = sc->sc_iot; 1360 bus_space_handle_t ioh = sc->sc_ioh; 1361 int tout, count; 1362 u_int8_t status; 1363 1364 if (slp->sl_Tnexus == NULL) 1365 return 0; 1366 1367 status = bus_space_read_1(iot, ioh, tmc_bstat); 1368 if ((status & PHASE_MASK) == 0) 1369 { 1370 if (sc->sc_ubf_timeout ++ == 0) 1371 return 0; 1372 1373 printf("%s: unexpected bus free detected\n", slp->sl_xname); 1374 slp->sl_error |= FATALIO; 1375 scsi_low_print(slp, slp->sl_Tnexus); 1376 stg_disconnected(sc, slp->sl_Tnexus); 1377 return 0; 1378 } 1379 1380 switch (status & PHASE_MASK) 1381 { 1382 case DATA_OUT_PHASE: 1383 if (sc->sc_dataout_timeout == 0) 1384 break; 1385 if ((status & BSTAT_REQ) == 0) 1386 break; 1387 if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0) 1388 break; 1389 if ((-- sc->sc_dataout_timeout) > 0) 1390 break; 1391 1392 slp->sl_error |= PDMAERR; 1393 if ((slp->sl_flags & HW_WRITE_PADDING) == 0) 1394 { 1395 printf("%s: write padding required\n", 1396 slp->sl_xname); 1397 break; 1398 } 1399 1400 bus_space_write_1(iot, ioh, tmc_ictl, 0); 1401 1402 tout = STG_DELAY_MAX; 1403 while (tout --) 1404 { 1405 status = bus_space_read_1(iot, ioh, tmc_bstat); 1406 if ((status & PHASE_MASK) != DATA_OUT_PHASE) 1407 break; 1408 1409 if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0) 1410 { 1411 SCSI_LOW_DELAY(1); 1412 continue; 1413 } 1414 1415 for (count = sc->sc_maxwsize; count > 0; count --) 1416 bus_space_write_1(iot, ioh, tmc_wfifo, 0); 1417 } 1418 1419 status = bus_space_read_1(iot, ioh, tmc_bstat); 1420 if ((status & PHASE_MASK) == DATA_OUT_PHASE) 1421 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ; 1422 1423 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit); 1424 break; 1425 1426 default: 1427 break; 1428 } 1429 return 0; 1430} 1431