hdspe.c revision 241066
1232337Smav/*-
2232337Smav * Copyright (c) 2012 Ruslan Bukin <br@bsdpad.com>
3232337Smav * All rights reserved.
4232337Smav *
5232337Smav * Redistribution and use in source and binary forms, with or without
6232337Smav * modification, are permitted provided that the following conditions
7232337Smav * are met:
8232337Smav * 1. Redistributions of source code must retain the above copyright
9232337Smav *    notice, this list of conditions and the following disclaimer.
10232337Smav * 2. Redistributions in binary form must reproduce the above copyright
11232337Smav *    notice, this list of conditions and the following disclaimer in the
12232337Smav *    documentation and/or other materials provided with the distribution.
13232337Smav *
14232337Smav * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15232337Smav * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16232337Smav * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17232337Smav * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18232337Smav * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19232337Smav * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20232337Smav * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21232337Smav * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22232337Smav * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23232337Smav * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24232337Smav * SUCH DAMAGE.
25232337Smav */
26232337Smav
27232337Smav/*
28232337Smav * RME HDSPe driver for FreeBSD.
29232337Smav * Supported cards: AIO, RayDAT.
30232337Smav */
31232337Smav
32232337Smav#include <dev/sound/pcm/sound.h>
33232337Smav#include <dev/sound/pci/hdspe.h>
34232337Smav#include <dev/sound/chip.h>
35232337Smav
36232337Smav#include <dev/pci/pcireg.h>
37232337Smav#include <dev/pci/pcivar.h>
38232337Smav
39232337Smav#include <mixer_if.h>
40232337Smav
41232337SmavSND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/hdspe.c 241066 2012-09-30 09:21:10Z kevlo $");
42232337Smav
43232337Smavstatic struct hdspe_channel chan_map_aio[] = {
44232337Smav	{  0,  1,   "line", 1, 1 },
45232337Smav	{  6,  7,  "phone", 1, 0 },
46232337Smav	{  8,  9,    "aes", 1, 1 },
47232337Smav	{ 10, 11, "s/pdif", 1, 1 },
48232337Smav	{ 12, 16,   "adat", 1, 1 },
49232337Smav
50232337Smav	/* Single or double speed. */
51232337Smav	{ 14, 18,   "adat", 1, 1 },
52232337Smav
53232337Smav	/* Single speed only. */
54232337Smav	{ 13, 15,   "adat", 1, 1 },
55232337Smav	{ 17, 19,   "adat", 1, 1 },
56232337Smav
57232337Smav	{  0,  0,     NULL, 0, 0 },
58232337Smav};
59232337Smav
60232337Smavstatic struct hdspe_channel chan_map_rd[] = {
61232337Smav	{   0, 1,    "aes", 1, 1 },
62232337Smav	{   2, 3, "s/pdif", 1, 1 },
63232337Smav	{   4, 5,   "adat", 1, 1 },
64232337Smav	{   6, 7,   "adat", 1, 1 },
65232337Smav	{   8, 9,   "adat", 1, 1 },
66232337Smav	{ 10, 11,   "adat", 1, 1 },
67232337Smav
68232337Smav	/* Single or double speed. */
69232337Smav	{ 12, 13,   "adat", 1, 1 },
70232337Smav	{ 14, 15,   "adat", 1, 1 },
71232337Smav	{ 16, 17,   "adat", 1, 1 },
72232337Smav	{ 18, 19,   "adat", 1, 1 },
73232337Smav
74232337Smav	/* Single speed only. */
75232337Smav	{ 20, 21,   "adat", 1, 1 },
76232337Smav	{ 22, 23,   "adat", 1, 1 },
77232337Smav	{ 24, 25,   "adat", 1, 1 },
78232337Smav	{ 26, 27,   "adat", 1, 1 },
79232337Smav	{ 28, 29,   "adat", 1, 1 },
80232337Smav	{ 30, 31,   "adat", 1, 1 },
81232337Smav	{ 32, 33,   "adat", 1, 1 },
82232337Smav	{ 34, 35,   "adat", 1, 1 },
83232337Smav
84232337Smav	{ 0,  0,      NULL, 0, 0 },
85232337Smav};
86232337Smav
87232337Smavstatic void
88232337Smavhdspe_intr(void *p)
89232337Smav{
90232337Smav	struct sc_info *sc = (struct sc_info *)p;
91232337Smav	struct sc_pcminfo *scp;
92232337Smav	device_t *devlist;
93232337Smav	int devcount, status;
94232337Smav	int i, err;
95232337Smav
96232337Smav	snd_mtxlock(sc->lock);
97232337Smav
98232337Smav	status = hdspe_read_1(sc, HDSPE_STATUS_REG);
99232337Smav	if (status & HDSPE_AUDIO_IRQ_PENDING) {
100232337Smav		if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
101232337Smav			return;
102232337Smav
103232337Smav		for (i = 0; i < devcount; i++) {
104232337Smav			scp = device_get_ivars(devlist[i]);
105232337Smav			if (scp->ih != NULL)
106232337Smav				scp->ih(scp);
107232337Smav		}
108232337Smav
109232337Smav		hdspe_write_1(sc, HDSPE_INTERRUPT_ACK, 0);
110241066Skevlo		free(devlist, M_TEMP);
111232337Smav	}
112232337Smav
113232337Smav	snd_mtxunlock(sc->lock);
114232337Smav}
115232337Smav
116232337Smavstatic void
117232337Smavhdspe_dmapsetmap(void *arg, bus_dma_segment_t *segs, int nseg, int error)
118232337Smav{
119232337Smav#if 0
120232337Smav	struct sc_info *sc = (struct sc_info *)arg;
121232337Smav	device_printf(sc->dev, "hdspe_dmapsetmap()\n");
122232337Smav#endif
123232337Smav}
124232337Smav
125232337Smavstatic int
126232337Smavhdspe_alloc_resources(struct sc_info *sc)
127232337Smav{
128232337Smav
129232337Smav	/* Allocate resource. */
130232337Smav	sc->csid = PCIR_BAR(0);
131232337Smav	sc->cs = bus_alloc_resource(sc->dev, SYS_RES_MEMORY,
132232337Smav	    &sc->csid, 0, ~0, 1, RF_ACTIVE);
133232337Smav
134232337Smav	if (!sc->cs) {
135232337Smav		device_printf(sc->dev, "Unable to map SYS_RES_MEMORY.\n");
136232337Smav		return (ENXIO);
137232337Smav	}
138232337Smav	sc->cst = rman_get_bustag(sc->cs);
139232337Smav	sc->csh = rman_get_bushandle(sc->cs);
140232337Smav
141232337Smav
142232337Smav	/* Allocate interrupt resource. */
143232337Smav	sc->irqid = 0;
144232337Smav	sc->irq = bus_alloc_resource(sc->dev, SYS_RES_IRQ, &sc->irqid,
145232337Smav	    0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
146232337Smav
147232337Smav	if (!sc->irq ||
148232337Smav	    bus_setup_intr(sc->dev, sc->irq, INTR_MPSAFE | INTR_TYPE_AV,
149232337Smav		NULL, hdspe_intr, sc, &sc->ih)) {
150232337Smav		device_printf(sc->dev, "Unable to alloc interrupt resource.\n");
151232337Smav		return (ENXIO);
152232337Smav	}
153232337Smav
154232337Smav	/* Allocate DMA resources. */
155232337Smav	if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(sc->dev),
156232337Smav		/*alignment*/4,
157232337Smav		/*boundary*/0,
158232337Smav		/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
159232337Smav		/*highaddr*/BUS_SPACE_MAXADDR,
160232337Smav		/*filter*/NULL,
161232337Smav		/*filterarg*/NULL,
162232337Smav		/*maxsize*/2 * HDSPE_DMASEGSIZE,
163232337Smav		/*nsegments*/2,
164232337Smav		/*maxsegsz*/HDSPE_DMASEGSIZE,
165232337Smav		/*flags*/0,
166232337Smav		/*lockfunc*/busdma_lock_mutex,
167232337Smav		/*lockarg*/&Giant,
168232337Smav		/*dmatag*/&sc->dmat) != 0) {
169232337Smav		device_printf(sc->dev, "Unable to create dma tag.\n");
170232337Smav		return (ENXIO);
171232337Smav	}
172232337Smav
173232337Smav	sc->bufsize = HDSPE_DMASEGSIZE;
174232337Smav
175232337Smav	/* pbuf (play buffer). */
176232337Smav	if (bus_dmamem_alloc(sc->dmat, (void **)&sc->pbuf,
177232337Smav		BUS_DMA_NOWAIT, &sc->pmap)) {
178232337Smav		device_printf(sc->dev, "Can't alloc pbuf.\n");
179232337Smav		return (ENXIO);
180232337Smav	}
181232337Smav
182232337Smav	if (bus_dmamap_load(sc->dmat, sc->pmap, sc->pbuf, sc->bufsize,
183232337Smav		hdspe_dmapsetmap, sc, 0)) {
184232337Smav		device_printf(sc->dev, "Can't load pbuf.\n");
185232337Smav		return (ENXIO);
186232337Smav	}
187232337Smav
188232337Smav	/* rbuf (rec buffer). */
189232337Smav	if (bus_dmamem_alloc(sc->dmat, (void **)&sc->rbuf,
190232337Smav		BUS_DMA_NOWAIT, &sc->rmap)) {
191232337Smav		device_printf(sc->dev, "Can't alloc rbuf.\n");
192232337Smav		return (ENXIO);
193232337Smav	}
194232337Smav
195232337Smav	if (bus_dmamap_load(sc->dmat, sc->rmap, sc->rbuf, sc->bufsize,
196232337Smav		hdspe_dmapsetmap, sc, 0)) {
197232337Smav		device_printf(sc->dev, "Can't load rbuf.\n");
198232337Smav		return (ENXIO);
199232337Smav	}
200232337Smav
201232337Smav	bzero(sc->pbuf, sc->bufsize);
202232337Smav	bzero(sc->rbuf, sc->bufsize);
203232337Smav
204232337Smav	return (0);
205232337Smav}
206232337Smav
207232337Smavstatic void
208232337Smavhdspe_map_dmabuf(struct sc_info *sc)
209232337Smav{
210232337Smav	uint32_t paddr,raddr;
211232337Smav	int i;
212232337Smav
213232337Smav	paddr = vtophys(sc->pbuf);
214232337Smav	raddr = vtophys(sc->rbuf);
215232337Smav
216232337Smav	for (i = 0; i < HDSPE_MAX_SLOTS * 16; i++) {
217232337Smav		hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_OUT + 4 * i,
218232337Smav                    paddr + i * 4096);
219232337Smav		hdspe_write_4(sc, HDSPE_PAGE_ADDR_BUF_IN + 4 * i,
220232337Smav                    raddr + i * 4096);
221232337Smav	}
222232337Smav}
223232337Smav
224232337Smavstatic int
225232337Smavhdspe_probe(device_t dev)
226232337Smav{
227232337Smav	uint32_t rev;
228232337Smav
229232337Smav	if (pci_get_vendor(dev) == PCI_VENDOR_XILINX &&
230232337Smav	    pci_get_device(dev) == PCI_DEVICE_XILINX_HDSPE) {
231232337Smav		rev = pci_get_revid(dev);
232232337Smav		switch (rev) {
233232337Smav		case PCI_REVISION_AIO:
234232337Smav			device_set_desc(dev, "RME HDSPe AIO");
235232337Smav			return 0;
236232337Smav		case PCI_REVISION_RAYDAT:
237232337Smav			device_set_desc(dev, "RME HDSPe RayDAT");
238232337Smav			return 0;
239232337Smav		}
240232337Smav	}
241232337Smav
242232337Smav	return (ENXIO);
243232337Smav}
244232337Smav
245232337Smavstatic int
246232337Smavset_pci_config(device_t dev)
247232337Smav{
248232337Smav	uint32_t data;
249232337Smav
250232337Smav	pci_enable_busmaster(dev);
251232337Smav
252232337Smav	data = pci_get_revid(dev);
253232337Smav	data |= PCIM_CMD_PORTEN;
254232337Smav	pci_write_config(dev, PCIR_COMMAND, data, 2);
255232337Smav
256232337Smav	return 0;
257232337Smav}
258232337Smav
259232337Smavstatic int
260232337Smavhdspe_init(struct sc_info *sc)
261232337Smav{
262232337Smav	long long period;
263232337Smav
264232337Smav	/* Set defaults. */
265232337Smav	sc->ctrl_register |= HDSPM_CLOCK_MODE_MASTER;
266232337Smav
267232337Smav	/* Set latency. */
268232337Smav	sc->period = 32;
269232337Smav	sc->ctrl_register = hdspe_encode_latency(7);
270232337Smav
271232337Smav	/* Set rate. */
272232337Smav	sc->speed = HDSPE_SPEED_DEFAULT;
273232337Smav	sc->ctrl_register &= ~HDSPE_FREQ_MASK;
274232337Smav	sc->ctrl_register |= HDSPE_FREQ_MASK_DEFAULT;
275232337Smav	hdspe_write_4(sc, HDSPE_CONTROL_REG, sc->ctrl_register);
276232337Smav
277232337Smav	switch (sc->type) {
278232337Smav	case RAYDAT:
279232337Smav	case AIO:
280232337Smav		period = HDSPE_FREQ_AIO;
281232337Smav		break;
282232337Smav	default:
283232337Smav		return (ENXIO);
284232337Smav	}
285232337Smav
286232337Smav	/* Set DDS value. */
287232337Smav	period /= sc->speed;
288232337Smav	hdspe_write_4(sc, HDSPE_FREQ_REG, period);
289232337Smav
290232337Smav	/* Other settings. */
291232337Smav	sc->settings_register = 0;
292232337Smav	hdspe_write_4(sc, HDSPE_SETTINGS_REG, sc->settings_register);
293232337Smav
294232337Smav	return 0;
295232337Smav}
296232337Smav
297232337Smavstatic int
298232337Smavhdspe_attach(device_t dev)
299232337Smav{
300232337Smav	struct sc_info *sc;
301232337Smav	struct sc_pcminfo *scp;
302232337Smav	struct hdspe_channel *chan_map;
303232337Smav	uint32_t rev;
304232337Smav	int i, err;
305232337Smav
306232337Smav#if 0
307232337Smav	device_printf(dev, "hdspe_attach()\n");
308232337Smav#endif
309232337Smav
310232337Smav	set_pci_config(dev);
311232337Smav
312232337Smav	sc = device_get_softc(dev);
313232337Smav	sc->lock = snd_mtxcreate(device_get_nameunit(dev),
314232337Smav	    "snd_hdspe softc");
315232337Smav	sc->dev = dev;
316232337Smav
317232337Smav	rev = pci_get_revid(dev);
318232337Smav	switch (rev) {
319232337Smav	case PCI_REVISION_AIO:
320232337Smav		sc->type = AIO;
321232337Smav		chan_map = chan_map_aio;
322232337Smav		break;
323232337Smav	case PCI_REVISION_RAYDAT:
324232337Smav		sc->type = RAYDAT;
325232337Smav		chan_map = chan_map_rd;
326232337Smav		break;
327232337Smav	default:
328232337Smav		return ENXIO;
329232337Smav	}
330232337Smav
331232337Smav	/* Allocate resources. */
332232337Smav	err = hdspe_alloc_resources(sc);
333232337Smav	if (err) {
334232337Smav		device_printf(dev, "Unable to allocate system resources.\n");
335232337Smav		return ENXIO;
336232337Smav	}
337232337Smav
338232337Smav	if (hdspe_init(sc) != 0)
339232337Smav		return ENXIO;
340232337Smav
341232337Smav	for (i = 0; i < HDSPE_MAX_CHANS && chan_map[i].descr != NULL; i++) {
342232337Smav		scp = malloc(sizeof(struct sc_pcminfo), M_DEVBUF, M_NOWAIT | M_ZERO);
343232337Smav		scp->hc = &chan_map[i];
344232337Smav		scp->sc = sc;
345232337Smav		scp->dev = device_add_child(dev, "pcm", -1);
346232337Smav		device_set_ivars(scp->dev, scp);
347232337Smav	}
348232337Smav
349232337Smav	hdspe_map_dmabuf(sc);
350232337Smav
351237975Sglebius	return (bus_generic_attach(dev));
352232337Smav}
353232337Smav
354232337Smavstatic void
355232337Smavhdspe_dmafree(struct sc_info *sc)
356232337Smav{
357232337Smav
358232337Smav	bus_dmamap_unload(sc->dmat, sc->rmap);
359232337Smav	bus_dmamap_unload(sc->dmat, sc->pmap);
360232337Smav	bus_dmamem_free(sc->dmat, sc->rbuf, sc->rmap);
361232337Smav	bus_dmamem_free(sc->dmat, sc->pbuf, sc->pmap);
362232337Smav	sc->rmap = sc->pmap = NULL;
363232337Smav	sc->rbuf = sc->pbuf = NULL;
364232337Smav}
365232337Smav
366232337Smavstatic int
367232337Smavhdspe_detach(device_t dev)
368232337Smav{
369232337Smav	struct sc_info *sc;
370232337Smav	int err;
371232337Smav
372232337Smav	sc = device_get_softc(dev);
373232337Smav	if (sc == NULL) {
374232337Smav		device_printf(dev,"Can't detach: softc is null.\n");
375232337Smav		return 0;
376232337Smav	}
377232337Smav
378232337Smav	err = device_delete_children(dev);
379232337Smav	if (err)
380232337Smav		return (err);
381232337Smav
382232337Smav	hdspe_dmafree(sc);
383232337Smav
384232337Smav	if (sc->ih)
385232337Smav		bus_teardown_intr(dev, sc->irq, sc->ih);
386232337Smav	if (sc->dmat)
387232337Smav		bus_dma_tag_destroy(sc->dmat);
388232337Smav	if (sc->irq)
389232337Smav		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq);
390232337Smav	if (sc->cs)
391232337Smav		bus_release_resource(dev, SYS_RES_MEMORY, PCIR_BAR(0), sc->cs);
392232337Smav	if (sc->lock)
393232337Smav		snd_mtxfree(sc->lock);
394232337Smav
395232337Smav	return 0;
396232337Smav}
397232337Smav
398232337Smavstatic device_method_t hdspe_methods[] = {
399232337Smav	DEVMETHOD(device_probe,     hdspe_probe),
400232337Smav	DEVMETHOD(device_attach,    hdspe_attach),
401232337Smav	DEVMETHOD(device_detach,    hdspe_detach),
402232337Smav	{ 0, 0 }
403232337Smav};
404232337Smav
405232337Smavstatic driver_t hdspe_driver = {
406232337Smav	"hdspe",
407232337Smav	hdspe_methods,
408232337Smav	PCM_SOFTC_SIZE,
409232337Smav};
410232337Smav
411237975Sglebiusstatic devclass_t hdspe_devclass;
412237975Sglebius
413237975SglebiusDRIVER_MODULE(snd_hdspe, pci, hdspe_driver, hdspe_devclass, 0, 0);
414