es137x.c revision 59019
1/* 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * $FreeBSD: head/sys/dev/sound/pci/es137x.c 59019 2000-04-05 00:38:00Z cg $ 42 */ 43 44/* 45 * Part of this code was heavily inspired by the linux driver from 46 * Thomas Sailer (sailer@ife.ee.ethz.ch) 47 * Just about everything has been touched and reworked in some way but 48 * the all the underlying sequences/timing/register values are from 49 * Thomas' code. 50 * 51*/ 52 53#include <dev/sound/pcm/sound.h> 54#include <dev/sound/pcm/ac97.h> 55#include <dev/sound/pci/es137x.h> 56 57#include <pci/pcireg.h> 58#include <pci/pcivar.h> 59 60#include <sys/sysctl.h> 61 62static int debug = 0; 63SYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 64 65#define MEM_MAP_REG 0x14 66 67/* PCI IDs of supported chips */ 68#define ES1370_PCI_ID 0x50001274 69#define ES1371_PCI_ID 0x13711274 70#define ES1371_PCI_ID2 0x13713274 71 72#define ES_BUFFSIZE 4096 73 74/* device private data */ 75struct es_info; 76 77struct es_chinfo { 78 struct es_info *parent; 79 pcm_channel *channel; 80 snd_dbuf *buffer; 81 int dir, num; 82 u_int32_t fmt; 83}; 84 85struct es_info { 86 bus_space_tag_t st; 87 bus_space_handle_t sh; 88 bus_dma_tag_t parent_dmat; 89 90 device_t dev; 91 int num; 92 /* Contents of board's registers */ 93 u_long ctrl; 94 u_long sctrl; 95 struct es_chinfo pch, rch; 96}; 97 98/* -------------------------------------------------------------------- */ 99 100/* prototypes */ 101static void es_intr(void *); 102 103static void es1371_wrcodec(void *, int, u_int32_t); 104static u_int32_t es1371_rdcodec(void *, int); 105static u_int es1371_wait_src_ready(struct es_info *); 106static void es1371_src_write(struct es_info *, u_short, unsigned short); 107static u_int es1371_adc_rate(struct es_info *, u_int, int); 108static u_int es1371_dac_rate(struct es_info *, u_int, int); 109static int es1371_init(struct es_info *es, int); 110static int es1370_init(struct es_info *); 111static int es1370_wrcodec(struct es_info *, u_char, u_char); 112 113/* channel interface */ 114static void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 115static int eschan_setdir(void *data, int dir); 116static int eschan_setformat(void *data, u_int32_t format); 117static int eschan1370_setspeed(void *data, u_int32_t speed); 118static int eschan1371_setspeed(void *data, u_int32_t speed); 119static int eschan_setblocksize(void *data, u_int32_t blocksize); 120static int eschan_trigger(void *data, int go); 121static int eschan_getptr(void *data); 122static pcmchan_caps *eschan_getcaps(void *data); 123 124static pcmchan_caps es_playcaps = { 125 4000, 48000, 126 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 127 AFMT_STEREO | AFMT_S16_LE 128}; 129 130static pcmchan_caps es_reccaps = { 131 4000, 48000, 132 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 133 AFMT_STEREO | AFMT_S16_LE 134}; 135 136static pcm_channel es1370_chantemplate = { 137 eschan_init, 138 eschan_setdir, 139 eschan_setformat, 140 eschan1370_setspeed, 141 eschan_setblocksize, 142 eschan_trigger, 143 eschan_getptr, 144 eschan_getcaps, 145}; 146 147static pcm_channel es1371_chantemplate = { 148 eschan_init, 149 eschan_setdir, 150 eschan_setformat, 151 eschan1371_setspeed, 152 eschan_setblocksize, 153 eschan_trigger, 154 eschan_getptr, 155 eschan_getcaps, 156}; 157 158/* -------------------------------------------------------------------- */ 159 160/* The es1370 mixer interface */ 161 162static int es1370_mixinit(snd_mixer *m); 163static int es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right); 164static int es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src); 165 166static snd_mixer es1370_mixer = { 167 "AudioPCI 1370 mixer", 168 es1370_mixinit, 169 es1370_mixset, 170 es1370_mixsetrecsrc, 171}; 172 173static const struct { 174 unsigned volidx:4; 175 unsigned left:4; 176 unsigned right:4; 177 unsigned stereo:1; 178 unsigned recmask:13; 179 unsigned avail:1; 180} mixtable[SOUND_MIXER_NRDEVICES] = { 181 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 182 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 183 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 184 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 185 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 186 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 187 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 188 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 189 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 190 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 191}; 192 193static int 194es1370_mixinit(snd_mixer *m) 195{ 196 int i; 197 u_int32_t v; 198 199 v = 0; 200 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 201 if (mixtable[i].avail) v |= (1 << i); 202 mix_setdevs(m, v); 203 v = 0; 204 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 205 if (mixtable[i].recmask) v |= (1 << i); 206 mix_setrecdevs(m, v); 207 return 0; 208} 209 210static int 211es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right) 212{ 213 int l, r, rl, rr; 214 215 if (!mixtable[dev].avail) return -1; 216 l = left; 217 r = mixtable[dev].stereo? right : l; 218 if (mixtable[dev].left == 0xf) { 219 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 220 } else { 221 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 222 } 223 if (mixtable[dev].stereo) { 224 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 225 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 226 } 227 es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 228 return l | (r << 8); 229} 230 231static int 232es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src) 233{ 234 int i, j = 0; 235 236 if (src == 0) src = 1 << SOUND_MIXER_MIC; 237 src &= mix_getrecdevs(m); 238 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 239 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 240 241 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 242 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 243 es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 244 es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 245 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 246 es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 247 return src; 248} 249 250static int 251es1370_wrcodec(struct es_info *es, u_char i, u_char data) 252{ 253 int wait = 100; /* 100 msec timeout */ 254 255 do { 256 if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 257 STAT_CSTAT) == 0) { 258 bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 259 ((u_short)i << CODEC_INDEX_SHIFT) | data); 260 return 0; 261 } 262 DELAY(1000); 263 } while (--wait); 264 printf("pcm: es1370_wrcodec timed out\n"); 265 return -1; 266} 267 268/* -------------------------------------------------------------------- */ 269 270/* channel interface */ 271static void * 272eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 273{ 274 struct es_info *es = devinfo; 275 struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 276 277 ch->parent = es; 278 ch->channel = c; 279 ch->buffer = b; 280 ch->buffer->bufsize = ES_BUFFSIZE; 281 ch->num = ch->parent->num++; 282 if (chn_allocbuf(ch->buffer, es->parent_dmat) == -1) return NULL; 283 return ch; 284} 285 286static int 287eschan_setdir(void *data, int dir) 288{ 289 struct es_chinfo *ch = data; 290 struct es_info *es = ch->parent; 291 292 if (dir == PCMDIR_PLAY) { 293 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 294 ES1370_REG_DAC2_FRAMEADR >> 8); 295 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, 296 vtophys(ch->buffer->buf)); 297 bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, 298 (ch->buffer->bufsize >> 2) - 1); 299 } else { 300 bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 301 ES1370_REG_ADC_FRAMEADR >> 8); 302 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, 303 vtophys(ch->buffer->buf)); 304 bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, 305 (ch->buffer->bufsize >> 2) - 1); 306 } 307 ch->dir = dir; 308 return 0; 309} 310 311static int 312eschan_setformat(void *data, u_int32_t format) 313{ 314 struct es_chinfo *ch = data; 315 struct es_info *es = ch->parent; 316 317 if (ch->dir == PCMDIR_PLAY) { 318 es->sctrl &= ~SCTRL_P2FMT; 319 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 320 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 321 } else { 322 es->sctrl &= ~SCTRL_R1FMT; 323 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 324 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 325 } 326 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 327 ch->fmt = format; 328 return 0; 329} 330 331static int 332eschan1370_setspeed(void *data, u_int32_t speed) 333{ 334 struct es_chinfo *ch = data; 335 struct es_info *es = ch->parent; 336 337 es->ctrl &= ~CTRL_PCLKDIV; 338 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 339 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 340 /* rec/play speeds locked together - should indicate in flags */ 341 return speed; /* XXX calc real speed */ 342} 343 344int 345eschan1371_setspeed(void *data, u_int32_t speed) 346{ 347 struct es_chinfo *ch = data; 348 struct es_info *es = ch->parent; 349 350 if (ch->dir == PCMDIR_PLAY) { 351 return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 352 } else { 353 return es1371_adc_rate(es, speed, 1); /* record */ 354 } 355} 356 357static int 358eschan_setblocksize(void *data, u_int32_t blocksize) 359{ 360 return blocksize; 361} 362 363static int 364eschan_trigger(void *data, int go) 365{ 366 struct es_chinfo *ch = data; 367 struct es_info *es = ch->parent; 368 unsigned cnt = ch->buffer->dl / ch->buffer->sample_size - 1; 369 370 if (go == PCMTRIG_EMLDMAWR) return 0; 371 if (ch->dir == PCMDIR_PLAY) { 372 if (go == PCMTRIG_START) { 373 int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 374 es->ctrl |= CTRL_DAC2_EN; 375 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 376 SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 377 SCTRL_P2DACSEN); 378 es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 379 bus_space_write_4(es->st, es->sh, 380 ES1370_REG_DAC2_SCOUNT, cnt); 381 } else es->ctrl &= ~CTRL_DAC2_EN; 382 } else { 383 if (go == PCMTRIG_START) { 384 es->ctrl |= CTRL_ADC_EN; 385 es->sctrl &= ~SCTRL_R1LOOPSEL; 386 es->sctrl |= SCTRL_R1INTEN; 387 bus_space_write_4(es->st, es->sh, 388 ES1370_REG_ADC_SCOUNT, cnt); 389 } else es->ctrl &= ~CTRL_ADC_EN; 390 } 391 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 392 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 393 return 0; 394} 395 396static int 397eschan_getptr(void *data) 398{ 399 struct es_chinfo *ch = data; 400 struct es_info *es = ch->parent; 401 if (ch->dir == PCMDIR_PLAY) { 402 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 403 ES1370_REG_DAC2_FRAMECNT >> 8); 404 return (bus_space_read_4(es->st, es->sh, 405 ES1370_REG_DAC2_FRAMECNT & 0xff) >> 14) & 0x3fffc; 406 } else { 407 bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 408 ES1370_REG_ADC_FRAMECNT >> 8); 409 return (bus_space_read_4(es->st, es->sh, 410 ES1370_REG_ADC_FRAMECNT & 0xff) >> 14) & 0x3fffc; 411 } 412} 413 414static pcmchan_caps * 415eschan_getcaps(void *data) 416{ 417 struct es_chinfo *ch = data; 418 return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 419} 420 421/* The interrupt handler */ 422static void 423es_intr(void *p) 424{ 425 struct es_info *es = p; 426 unsigned intsrc, sctrl; 427 428 intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 429 if ((intsrc & STAT_INTR) == 0) return; 430 431 sctrl = es->sctrl; 432 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 433 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 434 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 435 436 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 437 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 438 439 if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 440 if (intsrc & STAT_DAC1); 441 if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 442} 443 444/* ES1370 specific */ 445static int 446es1370_init(struct es_info *es) 447{ 448 es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 449 (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 450 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 451 452 es->sctrl = 0; 453 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 454 455 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 456 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 457 * {LR,B}CLK2 and run off the LRCLK2 458 * PLL; program DAC_SYNC=0! */ 459 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 460 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 461 462 return 0; 463} 464 465/* ES1371 specific */ 466int 467es1371_init(struct es_info *es, int rev) 468{ 469 int idx; 470 471 if (debug > 0) printf("es_init\n"); 472 473 es->num = 0; 474 es->ctrl = 0; 475 es->sctrl = 0; 476 /* initialize the chips */ 477 if (rev == 7 || rev >= 9) { 478#define ES1371_BINTSUMM_OFF 0x07 479 bus_space_write_4(es->st, es->sh, ES1371_BINTSUMM_OFF, 0x20); 480 if (debug > 0) printf("es_init rev == 7 || rev >= 9\n"); 481 } else { /* pre ac97 2.1 card */ 482 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 483 if (debug > 0) printf("es_init pre ac97 2.1\n"); 484 } 485 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 486 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 487 /* AC'97 warm reset to start the bitclk */ 488 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 489 DELAY(2000); 490 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 491 /* Init the sample rate converter */ 492 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 493 for (idx = 0; idx < 0x80; idx++) 494 es1371_src_write(es, idx, 0); 495 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 496 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 497 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 498 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 499 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 500 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 501 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 502 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 503 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 504 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 505 es1371_adc_rate (es, 22050, 1); 506 es1371_dac_rate (es, 22050, 1); 507 es1371_dac_rate (es, 22050, 2); 508 /* WARNING: 509 * enabling the sample rate converter without properly programming 510 * its parameters causes the chip to lock up (the SRC busy bit will 511 * be stuck high, and I've found no way to rectify this other than 512 * power cycle) 513 */ 514 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 515 516 return (0); 517} 518 519static void 520es1371_wrcodec(void *s, int addr, u_int32_t data) 521{ 522 int sl; 523 unsigned t, x; 524 struct es_info *es = (struct es_info*)s; 525 526 if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 527 528 for (t = 0; t < 0x1000; t++) 529 if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 530 break; 531 sl = spltty(); 532 /* save the current state for later */ 533 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 534 /* enable SRC state data in SRC mux */ 535 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 536 (es1371_wait_src_ready(s) & 537 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 538 /* wait for a SAFE time to write addr/data and then do it, dammit */ 539 for (t = 0; t < 0x1000; t++) 540 if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 541 break; 542 543 if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC, 544 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 545 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 546 547 bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 548 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 549 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 550 /* restore SRC reg */ 551 es1371_wait_src_ready(s); 552 if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x); 553 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 554 splx(sl); 555} 556 557static u_int32_t 558es1371_rdcodec(void *s, int addr) 559{ 560 int sl; 561 unsigned t, x; 562 struct es_info *es = (struct es_info *)s; 563 564 if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 565 566 for (t = 0; t < 0x1000; t++) 567 if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 568 break; 569 if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 570 571 sl = spltty(); 572 573 /* save the current state for later */ 574 x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 575 /* enable SRC state data in SRC mux */ 576 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 577 (es1371_wait_src_ready(s) & 578 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 579 /* wait for a SAFE time to write addr/data and then do it, dammit */ 580 for (t = 0; t < 0x5000; t++) 581 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 582 break; 583 if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 584 bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 585 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 586 587 /* restore SRC reg */ 588 es1371_wait_src_ready(s); 589 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 590 591 splx(sl); 592 593 /* now wait for the stinkin' data (RDY) */ 594 for (t = 0; t < 0x1000; t++) 595 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 596 break; 597 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 598 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 599} 600 601static u_int 602es1371_src_read(struct es_info *es, u_short reg) 603{ 604 unsigned int r; 605 606 r = es1371_wait_src_ready(es) & 607 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 608 r |= ES1371_SRC_RAM_ADDRO(reg); 609 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 610 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 611} 612 613static void 614es1371_src_write(struct es_info *es, u_short reg, u_short data){ 615 u_int r; 616 617 r = es1371_wait_src_ready(es) & 618 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 619 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 620 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 621 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 622} 623 624static u_int 625es1371_adc_rate(struct es_info *es, u_int rate, int set) 626{ 627 u_int n, truncm, freq, result; 628 629 if (rate > 48000) rate = 48000; 630 if (rate < 4000) rate = 4000; 631 n = rate / 3000; 632 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 633 n--; 634 truncm = (21 * n - 1) | 1; 635 freq = ((48000UL << 15) / rate) * n; 636 result = (48000UL << 15) / (freq / n); 637 if (set) { 638 if (rate >= 24000) { 639 if (truncm > 239) truncm = 239; 640 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 641 (((239 - truncm) >> 1) << 9) | (n << 4)); 642 } else { 643 if (truncm > 119) truncm = 119; 644 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 645 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 646 } 647 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 648 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 649 0x00ff) | ((freq >> 5) & 0xfc00)); 650 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 651 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 652 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 653 } 654 return result; 655} 656 657static u_int 658es1371_dac_rate(struct es_info *es, u_int rate, int set) 659{ 660 u_int freq, r, result, dac, dis; 661 662 if (rate > 48000) rate = 48000; 663 if (rate < 4000) rate = 4000; 664 freq = (rate << 15) / 3000; 665 result = (freq * 3000) >> 15; 666 if (set) { 667 dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 668 dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 669 670 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 671 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 672 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 673 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 674 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 675 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 676 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 677 } 678 return result; 679} 680 681static u_int 682es1371_wait_src_ready(struct es_info *es) 683{ 684 u_int t, r; 685 686 for (t = 0; t < 500; t++) { 687 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 688 return r; 689 DELAY(1000); 690 } 691 printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 692 return 0; 693} 694 695/* -------------------------------------------------------------------- */ 696 697/* 698 * Probe and attach the card 699 */ 700 701static int 702es_pci_probe(device_t dev) 703{ 704 if (pci_get_devid(dev) == ES1370_PCI_ID) { 705 device_set_desc(dev, "AudioPCI ES1370"); 706 return 0; 707 } else if (pci_get_devid(dev) == ES1371_PCI_ID || 708 pci_get_devid(dev) == ES1371_PCI_ID2) { 709 device_set_desc(dev, "AudioPCI ES1371"); 710 return 0; 711 } 712 return ENXIO; 713} 714 715static int 716es_pci_attach(device_t dev) 717{ 718 snddev_info *d; 719 u_int32_t data; 720 struct es_info *es = 0; 721 int type = 0; 722 int regid; 723 struct resource *reg = 0; 724 int mapped; 725 int irqid; 726 struct resource *irq = 0; 727 void *ih = 0; 728 char status[SND_STATUSLEN]; 729 struct ac97_info *codec; 730 pcm_channel *ct = NULL; 731 732 d = device_get_softc(dev); 733 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) { 734 device_printf(dev, "cannot allocate softc\n"); 735 return ENXIO; 736 } 737 bzero(es, sizeof *es); 738 739 es->dev = dev; 740 mapped = 0; 741 data = pci_read_config(dev, PCIR_COMMAND, 2); 742 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 743 pci_write_config(dev, PCIR_COMMAND, data, 2); 744 data = pci_read_config(dev, PCIR_COMMAND, 2); 745 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 746 regid = MEM_MAP_REG; 747 type = SYS_RES_MEMORY; 748 reg = bus_alloc_resource(dev, type, ®id, 749 0, ~0, 1, RF_ACTIVE); 750 if (reg) { 751 es->st = rman_get_bustag(reg); 752 es->sh = rman_get_bushandle(reg); 753 mapped++; 754 } 755 } 756 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 757 regid = PCI_MAP_REG_START; 758 type = SYS_RES_IOPORT; 759 reg = bus_alloc_resource(dev, type, ®id, 760 0, ~0, 1, RF_ACTIVE); 761 if (reg) { 762 es->st = rman_get_bustag(reg); 763 es->sh = rman_get_bushandle(reg); 764 mapped++; 765 } 766 } 767 if (mapped == 0) { 768 device_printf(dev, "unable to map register space\n"); 769 goto bad; 770 } 771 772 if (pci_get_devid(dev) == ES1371_PCI_ID || 773 pci_get_devid(dev) == ES1371_PCI_ID2) { 774 if(-1 == es1371_init(es, pci_get_revid(dev))) { 775 device_printf(dev, "unable to initialize the card\n"); 776 goto bad; 777 } 778 codec = ac97_create(dev, es, NULL, es1371_rdcodec, es1371_wrcodec); 779 if (codec == NULL) goto bad; 780 /* our init routine does everything for us */ 781 /* set to NULL; flag mixer_init not to run the ac97_init */ 782 /* ac97_mixer.init = NULL; */ 783 if (mixer_init(d, &ac97_mixer, codec) == -1) goto bad; 784 ct = &es1371_chantemplate; 785 } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 786 if (-1 == es1370_init(es)) { 787 device_printf(dev, "unable to initialize the card\n"); 788 goto bad; 789 } 790 mixer_init(d, &es1370_mixer, es); 791 ct = &es1370_chantemplate; 792 } else goto bad; 793 794 irqid = 0; 795 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &irqid, 796 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 797 if (!irq 798 || bus_setup_intr(dev, irq, INTR_TYPE_TTY, es_intr, es, &ih)) { 799 device_printf(dev, "unable to map interrupt\n"); 800 goto bad; 801 } 802 803 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 804 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 805 /*highaddr*/BUS_SPACE_MAXADDR, 806 /*filter*/NULL, /*filterarg*/NULL, 807 /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 808 /*flags*/0, &es->parent_dmat) != 0) { 809 device_printf(dev, "unable to create dma tag\n"); 810 goto bad; 811 } 812 813 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 814 (type == SYS_RES_IOPORT)? "io" : "memory", 815 rman_get_start(reg), rman_get_start(irq)); 816 817 if (pcm_register(dev, es, 1, 1)) goto bad; 818 pcm_addchan(dev, PCMDIR_REC, ct, es); 819 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 820 pcm_setstatus(dev, status); 821 822 return 0; 823 824 bad: 825 if (es) free(es, M_DEVBUF); 826 if (reg) bus_release_resource(dev, type, regid, reg); 827 if (ih) bus_teardown_intr(dev, irq, ih); 828 if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq); 829 return ENXIO; 830} 831 832static device_method_t es_methods[] = { 833 /* Device interface */ 834 DEVMETHOD(device_probe, es_pci_probe), 835 DEVMETHOD(device_attach, es_pci_attach), 836 837 { 0, 0 } 838}; 839 840static driver_t es_driver = { 841 "pcm", 842 es_methods, 843 sizeof(snddev_info), 844}; 845 846static devclass_t pcm_devclass; 847 848DRIVER_MODULE(es, pci, es_driver, pcm_devclass, 0, 0); 849