es137x.c revision 65644
150724Scg/* 253413Sroger * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 353413Sroger * boards based on the ES1370, ES1371 and ES1373 chips. 450724Scg * 553413Sroger * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 650724Scg * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 750724Scg * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 850724Scg * 950724Scg * Redistribution and use in source and binary forms, with or without 1050724Scg * modification, are permitted provided that the following conditions 1150724Scg * are met: 1250724Scg * 1350724Scg * 1. Redistributions of source code must retain the above copyright 1450724Scg * notice, this list of conditions and the following disclaimer. 1550724Scg * 1650724Scg * 2. Redistributions in binary form must reproduce the above copyright 1750724Scg * notice, this list of conditions and the following disclaimer in 1850724Scg * the documentation and/or other materials provided with the 1950724Scg * distribution. 2050724Scg * 2150724Scg * 3. All advertising materials mentioning features or use of this 2250724Scg * software must display the following acknowledgement: 2350724Scg * This product includes software developed by Joachim Kuebart. 2450724Scg * 2550724Scg * 4. The name of the author may not be used to endorse or promote 2650724Scg * products derived from this software without specific prior 2750724Scg * written permission. 2850724Scg * 2950724Scg * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 3050724Scg * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 3150724Scg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 3250724Scg * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 3350724Scg * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 3450724Scg * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 3550724Scg * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3650724Scg * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 3750724Scg * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3850724Scg * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 3950724Scg * OF THE POSSIBILITY OF SUCH DAMAGE. 4050724Scg * 4150733Speter * $FreeBSD: head/sys/dev/sound/pci/es137x.c 65644 2000-09-09 19:21:04Z cg $ 4250724Scg */ 4350724Scg 4453413Sroger/* 4553413Sroger * Part of this code was heavily inspired by the linux driver from 4653413Sroger * Thomas Sailer (sailer@ife.ee.ethz.ch) 4754831Scg * Just about everything has been touched and reworked in some way but 4854831Scg * the all the underlying sequences/timing/register values are from 4953413Sroger * Thomas' code. 5053413Sroger * 5153413Sroger*/ 5253413Sroger 5353465Scg#include <dev/sound/pcm/sound.h> 5453465Scg#include <dev/sound/pcm/ac97.h> 5553465Scg#include <dev/sound/pci/es137x.h> 5650724Scg 5750724Scg#include <pci/pcireg.h> 5850724Scg#include <pci/pcivar.h> 5950724Scg 6053413Sroger#include <sys/sysctl.h> 6153413Sroger 6253413Srogerstatic int debug = 0; 6353413SrogerSYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 6453413Sroger 6550724Scg#define MEM_MAP_REG 0x14 6650724Scg 6750724Scg/* PCI IDs of supported chips */ 6850724Scg#define ES1370_PCI_ID 0x50001274 6953413Sroger#define ES1371_PCI_ID 0x13711274 7056154Speter#define ES1371_PCI_ID2 0x13713274 7162412Sroberto#define ES1371_PCI_ID3 0x58801274 7250724Scg 7359019Scg#define ES_BUFFSIZE 4096 7459019Scg 7550724Scg/* device private data */ 7650724Scgstruct es_info; 7750724Scg 7855209Scgstruct es_chinfo { 7950724Scg struct es_info *parent; 8050724Scg pcm_channel *channel; 8150724Scg snd_dbuf *buffer; 8254831Scg int dir, num; 8350724Scg u_int32_t fmt; 8455209Scg}; 8550724Scg 8655209Scgstruct es_info { 8750724Scg bus_space_tag_t st; 8850724Scg bus_space_handle_t sh; 8950724Scg bus_dma_tag_t parent_dmat; 9050724Scg 9165644Scg struct resource *reg, *irq; 9265644Scg int regtype, regid, irqid; 9365644Scg void *ih; 9465644Scg 9559019Scg device_t dev; 9654831Scg int num; 9750724Scg /* Contents of board's registers */ 9850724Scg u_long ctrl; 9950724Scg u_long sctrl; 10050724Scg struct es_chinfo pch, rch; 10155209Scg}; 10250724Scg 10350724Scg/* -------------------------------------------------------------------- */ 10454831Scg 10553413Sroger/* prototypes */ 10654831Scgstatic void es_intr(void *); 10750724Scg 10854831Scgstatic void es1371_wrcodec(void *, int, u_int32_t); 10954831Scgstatic u_int32_t es1371_rdcodec(void *, int); 11055209Scgstatic u_int es1371_wait_src_ready(struct es_info *); 11155209Scgstatic void es1371_src_write(struct es_info *, u_short, unsigned short); 11255209Scgstatic u_int es1371_adc_rate(struct es_info *, u_int, int); 11355209Scgstatic u_int es1371_dac_rate(struct es_info *, u_int, int); 11455209Scgstatic int es1371_init(struct es_info *es, int); 11554831Scgstatic int es1370_init(struct es_info *); 11654831Scgstatic int es1370_wrcodec(struct es_info *, u_char, u_char); 11750724Scg 11850724Scg/* channel interface */ 11950724Scgstatic void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 12054831Scgstatic int eschan_setdir(void *data, int dir); 12154831Scgstatic int eschan_setformat(void *data, u_int32_t format); 12254831Scgstatic int eschan1370_setspeed(void *data, u_int32_t speed); 12355209Scgstatic int eschan1371_setspeed(void *data, u_int32_t speed); 12454831Scgstatic int eschan_setblocksize(void *data, u_int32_t blocksize); 12554831Scgstatic int eschan_trigger(void *data, int go); 12654831Scgstatic int eschan_getptr(void *data); 12750724Scgstatic pcmchan_caps *eschan_getcaps(void *data); 12850724Scg 12964881Scgstatic u_int32_t es_playfmt[] = { 13064881Scg AFMT_U8, 13164881Scg AFMT_STEREO | AFMT_U8, 13264881Scg AFMT_S16_LE, 13364881Scg AFMT_STEREO | AFMT_S16_LE, 13464881Scg 0 13550724Scg}; 13664881Scgstatic pcmchan_caps es_playcaps = {4000, 48000, es_playfmt, 0}; 13750724Scg 13864881Scgstatic u_int32_t es_recfmt[] = { 13964881Scg AFMT_U8, 14064881Scg AFMT_STEREO | AFMT_U8, 14164881Scg AFMT_S16_LE, 14264881Scg AFMT_STEREO | AFMT_S16_LE, 14364881Scg 0 14450724Scg}; 14564881Scgstatic pcmchan_caps es_reccaps = {4000, 48000, es_recfmt, 0}; 14650724Scg 14754831Scgstatic pcm_channel es1370_chantemplate = { 14850724Scg eschan_init, 14950724Scg eschan_setdir, 15050724Scg eschan_setformat, 15154831Scg eschan1370_setspeed, 15250724Scg eschan_setblocksize, 15350724Scg eschan_trigger, 15450724Scg eschan_getptr, 15550724Scg eschan_getcaps, 15665340Scg NULL, /* free */ 15765340Scg NULL, /* nop1 */ 15865340Scg NULL, /* nop2 */ 15965340Scg NULL, /* nop3 */ 16065340Scg NULL, /* nop4 */ 16165340Scg NULL, /* nop5 */ 16265340Scg NULL, /* nop6 */ 16365340Scg NULL, /* nop7 */ 16450724Scg}; 16550724Scg 16654831Scgstatic pcm_channel es1371_chantemplate = { 16754831Scg eschan_init, 16854831Scg eschan_setdir, 16954831Scg eschan_setformat, 17054831Scg eschan1371_setspeed, 17154831Scg eschan_setblocksize, 17254831Scg eschan_trigger, 17354831Scg eschan_getptr, 17454831Scg eschan_getcaps, 17565340Scg NULL, /* free */ 17665340Scg NULL, /* nop1 */ 17765340Scg NULL, /* nop2 */ 17865340Scg NULL, /* nop3 */ 17965340Scg NULL, /* nop4 */ 18065340Scg NULL, /* nop5 */ 18165340Scg NULL, /* nop6 */ 18265340Scg NULL, /* nop7 */ 18354831Scg}; 18454831Scg 18550724Scg/* -------------------------------------------------------------------- */ 18650724Scg 18754831Scg/* The es1370 mixer interface */ 18850724Scg 18954831Scgstatic int es1370_mixinit(snd_mixer *m); 19054831Scgstatic int es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right); 19154831Scgstatic int es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src); 19250724Scg 19354831Scgstatic snd_mixer es1370_mixer = { 19454831Scg "AudioPCI 1370 mixer", 19554831Scg es1370_mixinit, 19665340Scg NULL, 19754831Scg es1370_mixset, 19854831Scg es1370_mixsetrecsrc, 19950724Scg}; 20050724Scg 20150724Scgstatic const struct { 20250724Scg unsigned volidx:4; 20350724Scg unsigned left:4; 20450724Scg unsigned right:4; 20550724Scg unsigned stereo:1; 20650724Scg unsigned recmask:13; 20750724Scg unsigned avail:1; 20850724Scg} mixtable[SOUND_MIXER_NRDEVICES] = { 20950724Scg [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 21050724Scg [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 21150724Scg [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 21250724Scg [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 21350724Scg [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 21450724Scg [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 21550724Scg [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 21650724Scg [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 21750724Scg [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 21854831Scg [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 21954831Scg}; 22050724Scg 22150724Scgstatic int 22254831Scges1370_mixinit(snd_mixer *m) 22350724Scg{ 22450724Scg int i; 22550724Scg u_int32_t v; 22650724Scg 22750724Scg v = 0; 22850724Scg for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 22950724Scg if (mixtable[i].avail) v |= (1 << i); 23050724Scg mix_setdevs(m, v); 23150724Scg v = 0; 23250724Scg for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 23350724Scg if (mixtable[i].recmask) v |= (1 << i); 23450724Scg mix_setrecdevs(m, v); 23550724Scg return 0; 23650724Scg} 23750724Scg 23850724Scgstatic int 23954831Scges1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right) 24050724Scg{ 24150724Scg int l, r, rl, rr; 24250724Scg 24350724Scg if (!mixtable[dev].avail) return -1; 24450724Scg l = left; 24550724Scg r = mixtable[dev].stereo? right : l; 24650724Scg if (mixtable[dev].left == 0xf) { 24750724Scg rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 24850724Scg } else { 24950724Scg rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 25050724Scg } 25150724Scg if (mixtable[dev].stereo) { 25250724Scg rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 25354831Scg es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 25450724Scg } 25554831Scg es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 25650724Scg return l | (r << 8); 25750724Scg} 25850724Scg 25950724Scgstatic int 26054831Scges1370_mixsetrecsrc(snd_mixer *m, u_int32_t src) 26150724Scg{ 26250724Scg int i, j = 0; 26350724Scg 26450724Scg if (src == 0) src = 1 << SOUND_MIXER_MIC; 26550724Scg src &= mix_getrecdevs(m); 26650724Scg for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 26750724Scg if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 26850724Scg 26954831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 27054831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 27154831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 27254831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 27354831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 27454831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 27550724Scg return src; 27650724Scg} 27750724Scg 27850724Scgstatic int 27954831Scges1370_wrcodec(struct es_info *es, u_char i, u_char data) 28050724Scg{ 28150724Scg int wait = 100; /* 100 msec timeout */ 28250724Scg 28350724Scg do { 28450724Scg if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 28550724Scg STAT_CSTAT) == 0) { 28650724Scg bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 28750724Scg ((u_short)i << CODEC_INDEX_SHIFT) | data); 28850724Scg return 0; 28950724Scg } 29050724Scg DELAY(1000); 29150724Scg } while (--wait); 29254831Scg printf("pcm: es1370_wrcodec timed out\n"); 29350724Scg return -1; 29450724Scg} 29550724Scg 29650724Scg/* -------------------------------------------------------------------- */ 29750724Scg 29850724Scg/* channel interface */ 29950724Scgstatic void * 30050724Scgeschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 30150724Scg{ 30250724Scg struct es_info *es = devinfo; 30350724Scg struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 30450724Scg 30550724Scg ch->parent = es; 30650724Scg ch->channel = c; 30750724Scg ch->buffer = b; 30850724Scg ch->buffer->bufsize = ES_BUFFSIZE; 30954831Scg ch->num = ch->parent->num++; 31050724Scg if (chn_allocbuf(ch->buffer, es->parent_dmat) == -1) return NULL; 31150724Scg return ch; 31250724Scg} 31350724Scg 31450724Scgstatic int 31550724Scgeschan_setdir(void *data, int dir) 31650724Scg{ 31750724Scg struct es_chinfo *ch = data; 31850724Scg struct es_info *es = ch->parent; 31950724Scg 32050724Scg if (dir == PCMDIR_PLAY) { 32150724Scg bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 32250724Scg ES1370_REG_DAC2_FRAMEADR >> 8); 32350724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, 32450724Scg vtophys(ch->buffer->buf)); 32550724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, 32650724Scg (ch->buffer->bufsize >> 2) - 1); 32750724Scg } else { 32850724Scg bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 32950724Scg ES1370_REG_ADC_FRAMEADR >> 8); 33050724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, 33150724Scg vtophys(ch->buffer->buf)); 33250724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, 33350724Scg (ch->buffer->bufsize >> 2) - 1); 33450724Scg } 33550724Scg ch->dir = dir; 33650724Scg return 0; 33750724Scg} 33850724Scg 33950724Scgstatic int 34050724Scgeschan_setformat(void *data, u_int32_t format) 34150724Scg{ 34250724Scg struct es_chinfo *ch = data; 34350724Scg struct es_info *es = ch->parent; 34450724Scg 34550724Scg if (ch->dir == PCMDIR_PLAY) { 34650724Scg es->sctrl &= ~SCTRL_P2FMT; 34750724Scg if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 34850724Scg if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 34950724Scg } else { 35050724Scg es->sctrl &= ~SCTRL_R1FMT; 35150724Scg if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 35250724Scg if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 35350724Scg } 35450724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 35550724Scg ch->fmt = format; 35650724Scg return 0; 35750724Scg} 35850724Scg 35950724Scgstatic int 36054831Scgeschan1370_setspeed(void *data, u_int32_t speed) 36150724Scg{ 36250724Scg struct es_chinfo *ch = data; 36350724Scg struct es_info *es = ch->parent; 36450724Scg 36550724Scg es->ctrl &= ~CTRL_PCLKDIV; 36650724Scg es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 36750724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 36850724Scg /* rec/play speeds locked together - should indicate in flags */ 36950724Scg return speed; /* XXX calc real speed */ 37050724Scg} 37150724Scg 37254831Scgint 37354831Scgeschan1371_setspeed(void *data, u_int32_t speed) 37454831Scg{ 37554831Scg struct es_chinfo *ch = data; 37654831Scg struct es_info *es = ch->parent; 37754831Scg 37854831Scg if (ch->dir == PCMDIR_PLAY) { 37954831Scg return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 38054831Scg } else { 38154831Scg return es1371_adc_rate(es, speed, 1); /* record */ 38254831Scg } 38354831Scg} 38454831Scg 38550724Scgstatic int 38650724Scgeschan_setblocksize(void *data, u_int32_t blocksize) 38750724Scg{ 38850724Scg return blocksize; 38950724Scg} 39050724Scg 39150724Scgstatic int 39250724Scgeschan_trigger(void *data, int go) 39350724Scg{ 39450724Scg struct es_chinfo *ch = data; 39550724Scg struct es_info *es = ch->parent; 39660958Scg unsigned ss, cnt; 39750724Scg 39860958Scg if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 39960958Scg return 0; 40060958Scg 40160958Scg ss = 1; 40260958Scg ss <<= (ch->fmt & AFMT_STEREO)? 1 : 0; 40360958Scg ss <<= (ch->fmt & AFMT_16BIT)? 1 : 0; 40460958Scg cnt = ch->buffer->dl / ss - 1; 40560958Scg 40650724Scg if (ch->dir == PCMDIR_PLAY) { 40750724Scg if (go == PCMTRIG_START) { 40850724Scg int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 40950724Scg es->ctrl |= CTRL_DAC2_EN; 41050724Scg es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 41150724Scg SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 41250724Scg SCTRL_P2DACSEN); 41350724Scg es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 41450724Scg bus_space_write_4(es->st, es->sh, 41550724Scg ES1370_REG_DAC2_SCOUNT, cnt); 41659323Scg /* start at beginning of buffer */ 41759323Scg bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 41859323Scg ES1370_REG_DAC2_FRAMECNT >> 8); 41959323Scg bus_space_write_4(es->st, es->sh, 42059323Scg ES1370_REG_DAC2_FRAMECNT & 0xff, 42159323Scg (ch->buffer->bufsize >> 2) - 1); 42250724Scg } else es->ctrl &= ~CTRL_DAC2_EN; 42350724Scg } else { 42450724Scg if (go == PCMTRIG_START) { 42550724Scg es->ctrl |= CTRL_ADC_EN; 42650724Scg es->sctrl &= ~SCTRL_R1LOOPSEL; 42750724Scg es->sctrl |= SCTRL_R1INTEN; 42850724Scg bus_space_write_4(es->st, es->sh, 42950724Scg ES1370_REG_ADC_SCOUNT, cnt); 43059323Scg /* start at beginning of buffer */ 43159323Scg bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 43259323Scg ES1370_REG_ADC_FRAMECNT >> 8); 43359323Scg bus_space_write_4(es->st, es->sh, 43459323Scg ES1370_REG_ADC_FRAMECNT & 0xff, 43559323Scg (ch->buffer->bufsize >> 2) - 1); 43650724Scg } else es->ctrl &= ~CTRL_ADC_EN; 43750724Scg } 43850724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 43950724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 44050724Scg return 0; 44150724Scg} 44250724Scg 44350724Scgstatic int 44450724Scgeschan_getptr(void *data) 44550724Scg{ 44650724Scg struct es_chinfo *ch = data; 44750724Scg struct es_info *es = ch->parent; 44859323Scg u_int32_t reg, cnt; 44959323Scg 45059323Scg if (ch->dir == PCMDIR_PLAY) 45159323Scg reg = ES1370_REG_DAC2_FRAMECNT; 45259323Scg else 45359323Scg reg = ES1370_REG_ADC_FRAMECNT; 45459323Scg 45559323Scg bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, reg >> 8); 45659323Scg cnt = bus_space_read_4(es->st, es->sh, reg & 0x000000ff) >> 16; 45759323Scg /* cnt is longwords */ 45859323Scg return cnt << 2; 45950724Scg} 46050724Scg 46150724Scgstatic pcmchan_caps * 46250724Scgeschan_getcaps(void *data) 46350724Scg{ 46450724Scg struct es_chinfo *ch = data; 46550724Scg return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 46650724Scg} 46750724Scg 46850724Scg/* The interrupt handler */ 46950724Scgstatic void 47054831Scges_intr(void *p) 47150724Scg{ 47250724Scg struct es_info *es = p; 47350724Scg unsigned intsrc, sctrl; 47450724Scg 47550724Scg intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 47650724Scg if ((intsrc & STAT_INTR) == 0) return; 47750724Scg 47850724Scg sctrl = es->sctrl; 47950724Scg if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 48050724Scg if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 48150724Scg if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 48250724Scg 48350724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 48450724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 48550724Scg 48654831Scg if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 48754831Scg if (intsrc & STAT_DAC1); 48850724Scg if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 48950724Scg} 49050724Scg 49154831Scg/* ES1370 specific */ 49254831Scgstatic int 49354831Scges1370_init(struct es_info *es) 49454831Scg{ 49554831Scg es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 49654831Scg (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 49754831Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 49853413Sroger 49954831Scg es->sctrl = 0; 50054831Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 50153413Sroger 50254831Scg es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 50354831Scg es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 50454831Scg * {LR,B}CLK2 and run off the LRCLK2 50554831Scg * PLL; program DAC_SYNC=0! */ 50654831Scg es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 50754831Scg es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 50853413Sroger 50954831Scg return 0; 51054831Scg} 51153413Sroger 51254831Scg/* ES1371 specific */ 51353413Srogerint 51455209Scges1371_init(struct es_info *es, int rev) 51553413Sroger{ 51653413Sroger int idx; 51753413Sroger 51854831Scg if (debug > 0) printf("es_init\n"); 51954831Scg 52054831Scg es->num = 0; 52153413Sroger es->ctrl = 0; 52253413Sroger es->sctrl = 0; 52353413Sroger /* initialize the chips */ 52462412Sroberto if (rev == 7 || rev >= 9 || rev == 2) { 52555209Scg#define ES1371_BINTSUMM_OFF 0x07 52655209Scg bus_space_write_4(es->st, es->sh, ES1371_BINTSUMM_OFF, 0x20); 52755209Scg if (debug > 0) printf("es_init rev == 7 || rev >= 9\n"); 52855209Scg } else { /* pre ac97 2.1 card */ 52955209Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 53055209Scg if (debug > 0) printf("es_init pre ac97 2.1\n"); 53155209Scg } 53253413Sroger bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 53353413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 53453413Sroger /* AC'97 warm reset to start the bitclk */ 53553413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 53653413Sroger DELAY(2000); 53755204Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl); 53853413Sroger /* Init the sample rate converter */ 53953413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 54053413Sroger for (idx = 0; idx < 0x80; idx++) 54154831Scg es1371_src_write(es, idx, 0); 54253413Sroger es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 54353413Sroger es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 54453413Sroger es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 54553413Sroger es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 54653413Sroger es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 54753413Sroger es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 54853413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 54953413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 55053413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 55153413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 55253413Sroger es1371_adc_rate (es, 22050, 1); 55354831Scg es1371_dac_rate (es, 22050, 1); 55454831Scg es1371_dac_rate (es, 22050, 2); 55553413Sroger /* WARNING: 55653413Sroger * enabling the sample rate converter without properly programming 55753413Sroger * its parameters causes the chip to lock up (the SRC busy bit will 55853413Sroger * be stuck high, and I've found no way to rectify this other than 55953413Sroger * power cycle) 56053413Sroger */ 56153413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 56253413Sroger 56353413Sroger return (0); 56453413Sroger} 56553413Sroger 56654831Scgstatic void 56753413Srogeres1371_wrcodec(void *s, int addr, u_int32_t data) 56853413Sroger{ 56954831Scg int sl; 57054831Scg unsigned t, x; 57153413Sroger struct es_info *es = (struct es_info*)s; 57253413Sroger 57354831Scg if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 57453413Sroger 57553413Sroger for (t = 0; t < 0x1000; t++) 57654831Scg if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 57753413Sroger break; 57853413Sroger sl = spltty(); 57953413Sroger /* save the current state for later */ 58054831Scg x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 58153413Sroger /* enable SRC state data in SRC mux */ 58253413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 58354831Scg (es1371_wait_src_ready(s) & 58454831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 58553413Sroger /* wait for a SAFE time to write addr/data and then do it, dammit */ 58653413Sroger for (t = 0; t < 0x1000; t++) 58754831Scg if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 58854831Scg break; 58954831Scg 59054831Scg if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC, 59153413Sroger ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 59253413Sroger ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 59354831Scg 59453413Sroger bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 59553413Sroger ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 59653413Sroger ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 59753413Sroger /* restore SRC reg */ 59853413Sroger es1371_wait_src_ready(s); 59954831Scg if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x); 60054831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 60153413Sroger splx(sl); 60253413Sroger} 60353413Sroger 60454831Scgstatic u_int32_t 60554831Scges1371_rdcodec(void *s, int addr) 60653413Sroger{ 60754831Scg int sl; 60854831Scg unsigned t, x; 60954831Scg struct es_info *es = (struct es_info *)s; 61053413Sroger 61154831Scg if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 61253413Sroger 61354831Scg for (t = 0; t < 0x1000; t++) 61454831Scg if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 61554831Scg break; 61654831Scg if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 61753413Sroger 61854831Scg sl = spltty(); 61953413Sroger 62054831Scg /* save the current state for later */ 62154831Scg x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 62254831Scg /* enable SRC state data in SRC mux */ 62354831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 62454831Scg (es1371_wait_src_ready(s) & 62554831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 62654831Scg /* wait for a SAFE time to write addr/data and then do it, dammit */ 62754831Scg for (t = 0; t < 0x5000; t++) 62854831Scg if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 62954831Scg break; 63054831Scg if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 63154831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 63254831Scg ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 63353413Sroger 63454831Scg /* restore SRC reg */ 63554831Scg es1371_wait_src_ready(s); 63654831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 63753413Sroger 63854831Scg splx(sl); 63953413Sroger 64054831Scg /* now wait for the stinkin' data (RDY) */ 64154831Scg for (t = 0; t < 0x1000; t++) 64254831Scg if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 64354831Scg break; 64454831Scg if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 64554831Scg return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 64653413Sroger} 64753413Sroger 64853413Srogerstatic u_int 64955209Scges1371_src_read(struct es_info *es, u_short reg) 65054831Scg{ 65154831Scg unsigned int r; 65253413Sroger 65354831Scg r = es1371_wait_src_ready(es) & 65454831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 65554831Scg r |= ES1371_SRC_RAM_ADDRO(reg); 65654831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 65754831Scg return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 65853413Sroger} 65953413Sroger 66053413Srogerstatic void 66155209Scges1371_src_write(struct es_info *es, u_short reg, u_short data){ 66253413Sroger u_int r; 66353413Sroger 66453413Sroger r = es1371_wait_src_ready(es) & 66554831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 66653413Sroger r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 66753413Sroger /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 66854831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 66953413Sroger} 67053413Sroger 67154831Scgstatic u_int 67255209Scges1371_adc_rate(struct es_info *es, u_int rate, int set) 67354831Scg{ 67454831Scg u_int n, truncm, freq, result; 67554831Scg 67654831Scg if (rate > 48000) rate = 48000; 67754831Scg if (rate < 4000) rate = 4000; 67854831Scg n = rate / 3000; 67954831Scg if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 68054831Scg n--; 68154831Scg truncm = (21 * n - 1) | 1; 68254831Scg freq = ((48000UL << 15) / rate) * n; 68354831Scg result = (48000UL << 15) / (freq / n); 68454831Scg if (set) { 68554831Scg if (rate >= 24000) { 68654831Scg if (truncm > 239) truncm = 239; 68754831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 68854831Scg (((239 - truncm) >> 1) << 9) | (n << 4)); 68954831Scg } else { 69054831Scg if (truncm > 119) truncm = 119; 69154831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 69254831Scg 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 69354831Scg } 69454831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 69554831Scg (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 69654831Scg 0x00ff) | ((freq >> 5) & 0xfc00)); 69754831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 69854831Scg es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 69954831Scg es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 70053413Sroger } 70153413Sroger return result; 70253413Sroger} 70353413Sroger 70453413Srogerstatic u_int 70555209Scges1371_dac_rate(struct es_info *es, u_int rate, int set) 70654831Scg{ 70754831Scg u_int freq, r, result, dac, dis; 70853413Sroger 70954831Scg if (rate > 48000) rate = 48000; 71054831Scg if (rate < 4000) rate = 4000; 71154831Scg freq = (rate << 15) / 3000; 71254831Scg result = (freq * 3000) >> 15; 71354831Scg if (set) { 71454831Scg dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 71554831Scg dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 71654831Scg 71754831Scg r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 71854831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 71954831Scg es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 72054831Scg (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 72154831Scg es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 72254831Scg r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 72354831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 72454831Scg } 72554831Scg return result; 72653413Sroger} 72753413Sroger 72853413Srogerstatic u_int 72955209Scges1371_wait_src_ready(struct es_info *es) 73054831Scg{ 73154831Scg u_int t, r; 73253413Sroger 73354831Scg for (t = 0; t < 500; t++) { 73454831Scg if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 73554831Scg return r; 73654831Scg DELAY(1000); 73754831Scg } 73854831Scg printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 73954831Scg return 0; 74053413Sroger} 74153413Sroger 74250724Scg/* -------------------------------------------------------------------- */ 74350724Scg 74450724Scg/* 74550724Scg * Probe and attach the card 74650724Scg */ 74750724Scg 74850724Scgstatic int 74950724Scges_pci_probe(device_t dev) 75050724Scg{ 75150724Scg if (pci_get_devid(dev) == ES1370_PCI_ID) { 75250724Scg device_set_desc(dev, "AudioPCI ES1370"); 75350724Scg return 0; 75456154Speter } else if (pci_get_devid(dev) == ES1371_PCI_ID || 75562412Sroberto pci_get_devid(dev) == ES1371_PCI_ID2 || 75662412Sroberto pci_get_devid(dev) == ES1371_PCI_ID3) { 75753413Sroger device_set_desc(dev, "AudioPCI ES1371"); 75853413Sroger return 0; 75950724Scg } 76050724Scg return ENXIO; 76150724Scg} 76250724Scg 76350724Scgstatic int 76450724Scges_pci_attach(device_t dev) 76550724Scg{ 76650724Scg u_int32_t data; 76750724Scg struct es_info *es = 0; 76850724Scg int mapped; 76950724Scg char status[SND_STATUSLEN]; 77065644Scg struct ac97_info *codec = 0; 77154831Scg pcm_channel *ct = NULL; 77250724Scg 77350724Scg if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) { 77450724Scg device_printf(dev, "cannot allocate softc\n"); 77550724Scg return ENXIO; 77650724Scg } 77750724Scg bzero(es, sizeof *es); 77850724Scg 77959019Scg es->dev = dev; 78050724Scg mapped = 0; 78150724Scg data = pci_read_config(dev, PCIR_COMMAND, 2); 78255426Scg data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 78355426Scg pci_write_config(dev, PCIR_COMMAND, data, 2); 78455426Scg data = pci_read_config(dev, PCIR_COMMAND, 2); 78550724Scg if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 78665644Scg es->regid = MEM_MAP_REG; 78765644Scg es->regtype = SYS_RES_MEMORY; 78865644Scg es->reg = bus_alloc_resource(dev, es->regtype, &es->regid, 78950724Scg 0, ~0, 1, RF_ACTIVE); 79065644Scg if (es->reg) { 79165644Scg es->st = rman_get_bustag(es->reg); 79265644Scg es->sh = rman_get_bushandle(es->reg); 79350724Scg mapped++; 79450724Scg } 79550724Scg } 79650724Scg if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 79765644Scg es->regid = PCIR_MAPS; 79865644Scg es->regtype = SYS_RES_IOPORT; 79965644Scg es->reg = bus_alloc_resource(dev, es->regtype, &es->regid, 80050724Scg 0, ~0, 1, RF_ACTIVE); 80165644Scg if (es->reg) { 80265644Scg es->st = rman_get_bustag(es->reg); 80365644Scg es->sh = rman_get_bushandle(es->reg); 80450724Scg mapped++; 80550724Scg } 80650724Scg } 80750724Scg if (mapped == 0) { 80850724Scg device_printf(dev, "unable to map register space\n"); 80950724Scg goto bad; 81050724Scg } 81154831Scg 81256154Speter if (pci_get_devid(dev) == ES1371_PCI_ID || 81365340Scg pci_get_devid(dev) == ES1371_PCI_ID2 || 81462412Sroberto pci_get_devid(dev) == ES1371_PCI_ID3) { 81555209Scg if(-1 == es1371_init(es, pci_get_revid(dev))) { 81654831Scg device_printf(dev, "unable to initialize the card\n"); 81754831Scg goto bad; 81854831Scg } 81958384Scg codec = ac97_create(dev, es, NULL, es1371_rdcodec, es1371_wrcodec); 82054831Scg if (codec == NULL) goto bad; 82154831Scg /* our init routine does everything for us */ 82254831Scg /* set to NULL; flag mixer_init not to run the ac97_init */ 82354831Scg /* ac97_mixer.init = NULL; */ 82465340Scg if (mixer_init(dev, &ac97_mixer, codec) == -1) goto bad; 82554831Scg ct = &es1371_chantemplate; 82654831Scg } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 82754831Scg if (-1 == es1370_init(es)) { 82854831Scg device_printf(dev, "unable to initialize the card\n"); 82954831Scg goto bad; 83054831Scg } 83165340Scg mixer_init(dev, &es1370_mixer, es); 83254831Scg ct = &es1370_chantemplate; 83354831Scg } else goto bad; 83450724Scg 83565644Scg es->irqid = 0; 83665644Scg es->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &es->irqid, 83752046Simp 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 83865644Scg if (!es->irq 83965644Scg || bus_setup_intr(dev, es->irq, INTR_TYPE_TTY, es_intr, es, &es->ih)) { 84050724Scg device_printf(dev, "unable to map interrupt\n"); 84150724Scg goto bad; 84250724Scg } 84350724Scg 84450724Scg if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 84550724Scg /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 84650724Scg /*highaddr*/BUS_SPACE_MAXADDR, 84750724Scg /*filter*/NULL, /*filterarg*/NULL, 84850724Scg /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 84950724Scg /*flags*/0, &es->parent_dmat) != 0) { 85050724Scg device_printf(dev, "unable to create dma tag\n"); 85150724Scg goto bad; 85250724Scg } 85350724Scg 85450724Scg snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 85565644Scg (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 85665644Scg rman_get_start(es->reg), rman_get_start(es->irq)); 85750724Scg 85850724Scg if (pcm_register(dev, es, 1, 1)) goto bad; 85954831Scg pcm_addchan(dev, PCMDIR_REC, ct, es); 86054831Scg pcm_addchan(dev, PCMDIR_PLAY, ct, es); 86150724Scg pcm_setstatus(dev, status); 86250724Scg 86350724Scg return 0; 86450724Scg 86550724Scg bad: 86665644Scg if (codec) ac97_destroy(codec); 86765644Scg if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); 86865644Scg if (es->ih) bus_teardown_intr(dev, es->irq, es->ih); 86965644Scg if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 87065644Scg if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat); 87150724Scg if (es) free(es, M_DEVBUF); 87250724Scg return ENXIO; 87350724Scg} 87450724Scg 87565644Scgstatic int 87665644Scges_pci_detach(device_t dev) 87765644Scg{ 87865644Scg int r; 87965644Scg struct es_info *es; 88065644Scg 88165644Scg r = pcm_unregister(dev); 88265644Scg if (r) 88365644Scg return r; 88465644Scg 88565644Scg es = pcm_getdevinfo(dev); 88665644Scg bus_release_resource(dev, es->regtype, es->regid, es->reg); 88765644Scg bus_teardown_intr(dev, es->irq, es->ih); 88865644Scg bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 88965644Scg bus_dma_tag_destroy(es->parent_dmat); 89065644Scg free(es, M_DEVBUF); 89165644Scg 89265644Scg return 0; 89365644Scg} 89465644Scg 89550724Scgstatic device_method_t es_methods[] = { 89650724Scg /* Device interface */ 89750724Scg DEVMETHOD(device_probe, es_pci_probe), 89850724Scg DEVMETHOD(device_attach, es_pci_attach), 89965644Scg DEVMETHOD(device_detach, es_pci_detach), 90050724Scg 90150724Scg { 0, 0 } 90250724Scg}; 90350724Scg 90450724Scgstatic driver_t es_driver = { 90550724Scg "pcm", 90650724Scg es_methods, 90750724Scg sizeof(snddev_info), 90850724Scg}; 90950724Scg 91050724Scgstatic devclass_t pcm_devclass; 91150724Scg 91262483ScgDRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0); 91362483ScgMODULE_DEPEND(snd_es137x, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 91462483ScgMODULE_VERSION(snd_es137x, 1); 915