es137x.c revision 54831
150724Scg/* 253413Sroger * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 353413Sroger * boards based on the ES1370, ES1371 and ES1373 chips. 450724Scg * 553413Sroger * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 650724Scg * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 750724Scg * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 850724Scg * 950724Scg * Redistribution and use in source and binary forms, with or without 1050724Scg * modification, are permitted provided that the following conditions 1150724Scg * are met: 1250724Scg * 1350724Scg * 1. Redistributions of source code must retain the above copyright 1450724Scg * notice, this list of conditions and the following disclaimer. 1550724Scg * 1650724Scg * 2. Redistributions in binary form must reproduce the above copyright 1750724Scg * notice, this list of conditions and the following disclaimer in 1850724Scg * the documentation and/or other materials provided with the 1950724Scg * distribution. 2050724Scg * 2150724Scg * 3. All advertising materials mentioning features or use of this 2250724Scg * software must display the following acknowledgement: 2350724Scg * This product includes software developed by Joachim Kuebart. 2450724Scg * 2550724Scg * 4. The name of the author may not be used to endorse or promote 2650724Scg * products derived from this software without specific prior 2750724Scg * written permission. 2850724Scg * 2950724Scg * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 3050724Scg * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 3150724Scg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 3250724Scg * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 3350724Scg * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 3450724Scg * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 3550724Scg * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 3650724Scg * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 3750724Scg * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3850724Scg * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 3950724Scg * OF THE POSSIBILITY OF SUCH DAMAGE. 4050724Scg * 4150733Speter * $FreeBSD: head/sys/dev/sound/pci/es137x.c 54831 1999-12-19 17:51:32Z cg $ 4250724Scg */ 4350724Scg 4453413Sroger/* 4553413Sroger * Part of this code was heavily inspired by the linux driver from 4653413Sroger * Thomas Sailer (sailer@ife.ee.ethz.ch) 4754831Scg * Just about everything has been touched and reworked in some way but 4854831Scg * the all the underlying sequences/timing/register values are from 4953413Sroger * Thomas' code. 5053413Sroger * 5153413Sroger*/ 5253413Sroger 5350724Scg#include "pci.h" 5450724Scg#include "pcm.h" 5550724Scg 5653465Scg#include <dev/sound/pcm/sound.h> 5753465Scg#include <dev/sound/pcm/ac97.h> 5853465Scg#include <dev/sound/pci/es137x.h> 5950724Scg 6050724Scg#include <pci/pcireg.h> 6150724Scg#include <pci/pcivar.h> 6250724Scg 6353413Sroger#include <sys/sysctl.h> 6453413Sroger 6553413Srogerstatic int debug = 0; 6653413SrogerSYSCTL_INT(_debug, OID_AUTO, es_debug, CTLFLAG_RW, &debug, 0, ""); 6753413Sroger 6850724Scg#define MEM_MAP_REG 0x14 6950724Scg 7050724Scg/* PCI IDs of supported chips */ 7150724Scg#define ES1370_PCI_ID 0x50001274 7253413Sroger#define ES1371_PCI_ID 0x13711274 7350724Scg 7450724Scg/* device private data */ 7550724Scgstruct es_info; 7650724Scg 7753413Srogertypedef struct es_chinfo { 7850724Scg struct es_info *parent; 7950724Scg pcm_channel *channel; 8050724Scg snd_dbuf *buffer; 8154831Scg int dir, num; 8250724Scg u_int32_t fmt; 8353413Sroger} es_chinfo_t; 8450724Scg 8553413Srogertypedef struct es_info { 8650724Scg bus_space_tag_t st; 8750724Scg bus_space_handle_t sh; 8850724Scg bus_dma_tag_t parent_dmat; 8950724Scg 9054831Scg int num; 9150724Scg /* Contents of board's registers */ 9250724Scg u_long ctrl; 9350724Scg u_long sctrl; 9450724Scg struct es_chinfo pch, rch; 9553413Sroger} es_info_t; 9650724Scg 9750724Scg/* -------------------------------------------------------------------- */ 9854831Scg 9953413Sroger/* prototypes */ 10054831Scgstatic void es_intr(void *); 10150724Scg 10254831Scgstatic void es1371_wrcodec(void *, int, u_int32_t); 10354831Scgstatic u_int32_t es1371_rdcodec(void *, int); 10453413Srogerstatic u_int es1371_wait_src_ready(es_info_t *); 10553413Srogerstatic void es1371_src_write(es_info_t *, u_short, unsigned short); 10654831Scgstatic u_int es1371_adc_rate(es_info_t *, u_int, int); 10754831Scgstatic u_int es1371_dac_rate(es_info_t *, u_int, int); 10853413Srogerstatic int es1371_init(es_info_t *es); 10953413Srogerstatic int eschan1371_setspeed(void *data, u_int32_t speed); 11053413Sroger 11154831Scgstatic int es1370_init(struct es_info *); 11254831Scgstatic int es1370_wrcodec(struct es_info *, u_char, u_char); 11350724Scg 11450724Scg/* channel interface */ 11550724Scgstatic void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 11654831Scgstatic int eschan_setdir(void *data, int dir); 11754831Scgstatic int eschan_setformat(void *data, u_int32_t format); 11854831Scgstatic int eschan1370_setspeed(void *data, u_int32_t speed); 11954831Scgstatic int eschan_setblocksize(void *data, u_int32_t blocksize); 12054831Scgstatic int eschan_trigger(void *data, int go); 12154831Scgstatic int eschan_getptr(void *data); 12250724Scgstatic pcmchan_caps *eschan_getcaps(void *data); 12350724Scg 12450724Scgstatic pcmchan_caps es_playcaps = { 12550724Scg 4000, 48000, 12650724Scg AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 12750724Scg AFMT_STEREO | AFMT_S16_LE 12850724Scg}; 12950724Scg 13050724Scgstatic pcmchan_caps es_reccaps = { 13150724Scg 4000, 48000, 13250724Scg AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 13350724Scg AFMT_STEREO | AFMT_S16_LE 13450724Scg}; 13550724Scg 13654831Scgstatic pcm_channel es1370_chantemplate = { 13750724Scg eschan_init, 13850724Scg eschan_setdir, 13950724Scg eschan_setformat, 14054831Scg eschan1370_setspeed, 14150724Scg eschan_setblocksize, 14250724Scg eschan_trigger, 14350724Scg eschan_getptr, 14450724Scg eschan_getcaps, 14550724Scg}; 14650724Scg 14754831Scgstatic pcm_channel es1371_chantemplate = { 14854831Scg eschan_init, 14954831Scg eschan_setdir, 15054831Scg eschan_setformat, 15154831Scg eschan1371_setspeed, 15254831Scg eschan_setblocksize, 15354831Scg eschan_trigger, 15454831Scg eschan_getptr, 15554831Scg eschan_getcaps, 15654831Scg}; 15754831Scg 15850724Scg/* -------------------------------------------------------------------- */ 15950724Scg 16054831Scg/* The es1370 mixer interface */ 16150724Scg 16254831Scgstatic int es1370_mixinit(snd_mixer *m); 16354831Scgstatic int es1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right); 16454831Scgstatic int es1370_mixsetrecsrc(snd_mixer *m, u_int32_t src); 16550724Scg 16654831Scgstatic snd_mixer es1370_mixer = { 16754831Scg "AudioPCI 1370 mixer", 16854831Scg es1370_mixinit, 16954831Scg es1370_mixset, 17054831Scg es1370_mixsetrecsrc, 17150724Scg}; 17250724Scg 17350724Scgstatic const struct { 17450724Scg unsigned volidx:4; 17550724Scg unsigned left:4; 17650724Scg unsigned right:4; 17750724Scg unsigned stereo:1; 17850724Scg unsigned recmask:13; 17950724Scg unsigned avail:1; 18050724Scg} mixtable[SOUND_MIXER_NRDEVICES] = { 18150724Scg [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, 18250724Scg [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 18350724Scg [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 18450724Scg [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 18550724Scg [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 18650724Scg [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 18750724Scg [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 18850724Scg [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 18950724Scg [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 19054831Scg [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 19154831Scg}; 19250724Scg 19350724Scgstatic int 19454831Scges1370_mixinit(snd_mixer *m) 19550724Scg{ 19650724Scg int i; 19750724Scg u_int32_t v; 19850724Scg 19950724Scg v = 0; 20050724Scg for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 20150724Scg if (mixtable[i].avail) v |= (1 << i); 20250724Scg mix_setdevs(m, v); 20350724Scg v = 0; 20450724Scg for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 20550724Scg if (mixtable[i].recmask) v |= (1 << i); 20650724Scg mix_setrecdevs(m, v); 20750724Scg return 0; 20850724Scg} 20950724Scg 21050724Scgstatic int 21154831Scges1370_mixset(snd_mixer *m, unsigned dev, unsigned left, unsigned right) 21250724Scg{ 21350724Scg int l, r, rl, rr; 21450724Scg 21550724Scg if (!mixtable[dev].avail) return -1; 21650724Scg l = left; 21750724Scg r = mixtable[dev].stereo? right : l; 21850724Scg if (mixtable[dev].left == 0xf) { 21950724Scg rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 22050724Scg } else { 22150724Scg rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 22250724Scg } 22350724Scg if (mixtable[dev].stereo) { 22450724Scg rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 22554831Scg es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].right, rr); 22650724Scg } 22754831Scg es1370_wrcodec(mix_getdevinfo(m), mixtable[dev].left, rl); 22850724Scg return l | (r << 8); 22950724Scg} 23050724Scg 23150724Scgstatic int 23254831Scges1370_mixsetrecsrc(snd_mixer *m, u_int32_t src) 23350724Scg{ 23450724Scg int i, j = 0; 23550724Scg 23650724Scg if (src == 0) src = 1 << SOUND_MIXER_MIC; 23750724Scg src &= mix_getrecdevs(m); 23850724Scg for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 23950724Scg if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 24050724Scg 24154831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX1, j & 0x55); 24254831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX1, j & 0xaa); 24354831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_LIMIX2, (j >> 8) & 0x17); 24454831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_RIMIX2, (j >> 8) & 0x0f); 24554831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX1, 0x7f); 24654831Scg es1370_wrcodec(mix_getdevinfo(m), CODEC_OMIX2, 0x3f); 24750724Scg return src; 24850724Scg} 24950724Scg 25050724Scgstatic int 25154831Scges1370_wrcodec(struct es_info *es, u_char i, u_char data) 25250724Scg{ 25350724Scg int wait = 100; /* 100 msec timeout */ 25450724Scg 25550724Scg do { 25650724Scg if ((bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS) & 25750724Scg STAT_CSTAT) == 0) { 25850724Scg bus_space_write_2(es->st, es->sh, ES1370_REG_CODEC, 25950724Scg ((u_short)i << CODEC_INDEX_SHIFT) | data); 26050724Scg return 0; 26150724Scg } 26250724Scg DELAY(1000); 26350724Scg } while (--wait); 26454831Scg printf("pcm: es1370_wrcodec timed out\n"); 26550724Scg return -1; 26650724Scg} 26750724Scg 26850724Scg/* -------------------------------------------------------------------- */ 26950724Scg 27050724Scg/* channel interface */ 27150724Scgstatic void * 27250724Scgeschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 27350724Scg{ 27450724Scg struct es_info *es = devinfo; 27550724Scg struct es_chinfo *ch = (dir == PCMDIR_PLAY)? &es->pch : &es->rch; 27650724Scg 27750724Scg ch->parent = es; 27850724Scg ch->channel = c; 27950724Scg ch->buffer = b; 28050724Scg ch->buffer->bufsize = ES_BUFFSIZE; 28154831Scg ch->num = ch->parent->num++; 28250724Scg if (chn_allocbuf(ch->buffer, es->parent_dmat) == -1) return NULL; 28350724Scg return ch; 28450724Scg} 28550724Scg 28650724Scgstatic int 28750724Scgeschan_setdir(void *data, int dir) 28850724Scg{ 28950724Scg struct es_chinfo *ch = data; 29050724Scg struct es_info *es = ch->parent; 29150724Scg 29250724Scg if (dir == PCMDIR_PLAY) { 29350724Scg bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 29450724Scg ES1370_REG_DAC2_FRAMEADR >> 8); 29550724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMEADR & 0xff, 29650724Scg vtophys(ch->buffer->buf)); 29750724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_DAC2_FRAMECNT & 0xff, 29850724Scg (ch->buffer->bufsize >> 2) - 1); 29950724Scg } else { 30050724Scg bus_space_write_1(es->st, es->sh, ES1370_REG_MEMPAGE, 30150724Scg ES1370_REG_ADC_FRAMEADR >> 8); 30250724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMEADR & 0xff, 30350724Scg vtophys(ch->buffer->buf)); 30450724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_ADC_FRAMECNT & 0xff, 30550724Scg (ch->buffer->bufsize >> 2) - 1); 30650724Scg } 30750724Scg ch->dir = dir; 30850724Scg return 0; 30950724Scg} 31050724Scg 31150724Scgstatic int 31250724Scgeschan_setformat(void *data, u_int32_t format) 31350724Scg{ 31450724Scg struct es_chinfo *ch = data; 31550724Scg struct es_info *es = ch->parent; 31650724Scg 31750724Scg if (ch->dir == PCMDIR_PLAY) { 31850724Scg es->sctrl &= ~SCTRL_P2FMT; 31950724Scg if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 32050724Scg if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 32150724Scg } else { 32250724Scg es->sctrl &= ~SCTRL_R1FMT; 32350724Scg if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 32450724Scg if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 32550724Scg } 32650724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 32750724Scg ch->fmt = format; 32850724Scg return 0; 32950724Scg} 33050724Scg 33150724Scgstatic int 33254831Scgeschan1370_setspeed(void *data, u_int32_t speed) 33350724Scg{ 33450724Scg struct es_chinfo *ch = data; 33550724Scg struct es_info *es = ch->parent; 33650724Scg 33750724Scg es->ctrl &= ~CTRL_PCLKDIV; 33850724Scg es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 33950724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 34050724Scg /* rec/play speeds locked together - should indicate in flags */ 34150724Scg return speed; /* XXX calc real speed */ 34250724Scg} 34350724Scg 34454831Scgint 34554831Scgeschan1371_setspeed(void *data, u_int32_t speed) 34654831Scg{ 34754831Scg struct es_chinfo *ch = data; 34854831Scg struct es_info *es = ch->parent; 34954831Scg 35054831Scg if (ch->dir == PCMDIR_PLAY) { 35154831Scg return es1371_dac_rate(es, speed, 3 - ch->num); /* play */ 35254831Scg } else { 35354831Scg return es1371_adc_rate(es, speed, 1); /* record */ 35454831Scg } 35554831Scg} 35654831Scg 35750724Scgstatic int 35850724Scgeschan_setblocksize(void *data, u_int32_t blocksize) 35950724Scg{ 36050724Scg return blocksize; 36150724Scg} 36250724Scg 36350724Scgstatic int 36450724Scgeschan_trigger(void *data, int go) 36550724Scg{ 36650724Scg struct es_chinfo *ch = data; 36750724Scg struct es_info *es = ch->parent; 36850724Scg unsigned cnt = ch->buffer->dl / ch->buffer->sample_size - 1; 36950724Scg 37050724Scg if (ch->dir == PCMDIR_PLAY) { 37150724Scg if (go == PCMTRIG_START) { 37250724Scg int b = (ch->fmt & AFMT_S16_LE)? 2 : 1; 37350724Scg es->ctrl |= CTRL_DAC2_EN; 37450724Scg es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | 37550724Scg SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | 37650724Scg SCTRL_P2DACSEN); 37750724Scg es->sctrl |= SCTRL_P2INTEN | (b << SCTRL_SH_P2ENDINC); 37850724Scg bus_space_write_4(es->st, es->sh, 37950724Scg ES1370_REG_DAC2_SCOUNT, cnt); 38050724Scg } else es->ctrl &= ~CTRL_DAC2_EN; 38150724Scg } else { 38250724Scg if (go == PCMTRIG_START) { 38350724Scg es->ctrl |= CTRL_ADC_EN; 38450724Scg es->sctrl &= ~SCTRL_R1LOOPSEL; 38550724Scg es->sctrl |= SCTRL_R1INTEN; 38650724Scg bus_space_write_4(es->st, es->sh, 38750724Scg ES1370_REG_ADC_SCOUNT, cnt); 38850724Scg } else es->ctrl &= ~CTRL_ADC_EN; 38950724Scg } 39050724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 39150724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 39250724Scg return 0; 39350724Scg} 39450724Scg 39550724Scgstatic int 39650724Scgeschan_getptr(void *data) 39750724Scg{ 39850724Scg struct es_chinfo *ch = data; 39950724Scg struct es_info *es = ch->parent; 40050724Scg if (ch->dir == PCMDIR_PLAY) { 40150724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 40250724Scg ES1370_REG_DAC2_FRAMECNT >> 8); 40350724Scg return (bus_space_read_4(es->st, es->sh, 40450724Scg ES1370_REG_DAC2_FRAMECNT & 0xff) >> 14) & 0x3fffc; 40550724Scg } else { 40650724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_MEMPAGE, 40750724Scg ES1370_REG_ADC_FRAMECNT >> 8); 40850724Scg return (bus_space_read_4(es->st, es->sh, 40950724Scg ES1370_REG_ADC_FRAMECNT & 0xff) >> 14) & 0x3fffc; 41050724Scg } 41150724Scg} 41250724Scg 41350724Scgstatic pcmchan_caps * 41450724Scgeschan_getcaps(void *data) 41550724Scg{ 41650724Scg struct es_chinfo *ch = data; 41750724Scg return (ch->dir == PCMDIR_PLAY)? &es_playcaps : &es_reccaps; 41850724Scg} 41950724Scg 42050724Scg/* The interrupt handler */ 42150724Scgstatic void 42254831Scges_intr(void *p) 42350724Scg{ 42450724Scg struct es_info *es = p; 42550724Scg unsigned intsrc, sctrl; 42650724Scg 42750724Scg intsrc = bus_space_read_4(es->st, es->sh, ES1370_REG_STATUS); 42850724Scg if ((intsrc & STAT_INTR) == 0) return; 42950724Scg 43050724Scg sctrl = es->sctrl; 43150724Scg if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 43250724Scg if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 43350724Scg if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 43450724Scg 43550724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, sctrl); 43650724Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 43750724Scg 43854831Scg if (intsrc & STAT_ADC) chn_intr(es->rch.channel); 43954831Scg if (intsrc & STAT_DAC1); 44050724Scg if (intsrc & STAT_DAC2) chn_intr(es->pch.channel); 44150724Scg} 44250724Scg 44354831Scg/* ES1370 specific */ 44454831Scgstatic int 44554831Scges1370_init(struct es_info *es) 44654831Scg{ 44754831Scg es->ctrl = CTRL_CDC_EN | CTRL_SERR_DIS | 44854831Scg (DAC2_SRTODIV(DSP_DEFAULT_SPEED) << CTRL_SH_PCLKDIV); 44954831Scg bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 45053413Sroger 45154831Scg es->sctrl = 0; 45254831Scg bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 45353413Sroger 45454831Scg es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 45554831Scg es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 45654831Scg * {LR,B}CLK2 and run off the LRCLK2 45754831Scg * PLL; program DAC_SYNC=0! */ 45854831Scg es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 45954831Scg es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 46053413Sroger 46154831Scg return 0; 46254831Scg} 46353413Sroger 46454831Scg/* ES1371 specific */ 46553413Srogerint 46653413Srogeres1371_init(struct es_info *es) 46753413Sroger{ 46853413Sroger int idx; 46953413Sroger 47054831Scg if (debug > 0) printf("es_init\n"); 47154831Scg 47254831Scg es->num = 0; 47353413Sroger es->ctrl = 0; 47453413Sroger es->sctrl = 0; 47553413Sroger /* initialize the chips */ 47653413Sroger bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl); 47753413Sroger bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl); 47853413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0); 47953413Sroger /* AC'97 warm reset to start the bitclk */ 48053413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES); 48153413Sroger DELAY(2000); 48253413Sroger bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL,es->ctrl); 48353413Sroger /* Init the sample rate converter */ 48453413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC); 48553413Sroger for (idx = 0; idx < 0x80; idx++) 48654831Scg es1371_src_write(es, idx, 0); 48753413Sroger es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 48853413Sroger es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 48953413Sroger es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 49053413Sroger es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 49153413Sroger es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 49253413Sroger es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 49353413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 49453413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 49553413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 49653413Sroger es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 49753413Sroger es1371_adc_rate (es, 22050, 1); 49854831Scg es1371_dac_rate (es, 22050, 1); 49954831Scg es1371_dac_rate (es, 22050, 2); 50053413Sroger /* WARNING: 50153413Sroger * enabling the sample rate converter without properly programming 50253413Sroger * its parameters causes the chip to lock up (the SRC busy bit will 50353413Sroger * be stuck high, and I've found no way to rectify this other than 50453413Sroger * power cycle) 50553413Sroger */ 50653413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 0); 50753413Sroger 50853413Sroger return (0); 50953413Sroger} 51053413Sroger 51154831Scgstatic void 51253413Srogeres1371_wrcodec(void *s, int addr, u_int32_t data) 51353413Sroger{ 51454831Scg int sl; 51554831Scg unsigned t, x; 51653413Sroger struct es_info *es = (struct es_info*)s; 51753413Sroger 51854831Scg if (debug > 0) printf("wrcodec addr 0x%x data 0x%x\n", addr, data); 51953413Sroger 52053413Sroger for (t = 0; t < 0x1000; t++) 52154831Scg if (!(bus_space_read_4(es->st, es->sh,(ES1371_REG_CODEC & CODEC_WIP)))) 52253413Sroger break; 52353413Sroger sl = spltty(); 52453413Sroger /* save the current state for later */ 52554831Scg x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 52653413Sroger /* enable SRC state data in SRC mux */ 52753413Sroger bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 52854831Scg (es1371_wait_src_ready(s) & 52954831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 53053413Sroger /* wait for a SAFE time to write addr/data and then do it, dammit */ 53153413Sroger for (t = 0; t < 0x1000; t++) 53254831Scg if ((bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 53354831Scg break; 53454831Scg 53554831Scg if (debug > 2) printf("one b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_CODEC, 53653413Sroger ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 53753413Sroger ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 53854831Scg 53953413Sroger bus_space_write_4(es->st, es->sh,ES1371_REG_CODEC, 54053413Sroger ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 54153413Sroger ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK)); 54253413Sroger /* restore SRC reg */ 54353413Sroger es1371_wait_src_ready(s); 54454831Scg if (debug > 2) printf("two b_s_w: 0x%x 0x%x 0x%x\n", es->sh, ES1371_REG_SMPRATE, x); 54554831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 54653413Sroger splx(sl); 54753413Sroger} 54853413Sroger 54954831Scgstatic u_int32_t 55054831Scges1371_rdcodec(void *s, int addr) 55153413Sroger{ 55254831Scg int sl; 55354831Scg unsigned t, x; 55454831Scg struct es_info *es = (struct es_info *)s; 55553413Sroger 55654831Scg if (debug > 0) printf("rdcodec addr 0x%x ... ", addr); 55753413Sroger 55854831Scg for (t = 0; t < 0x1000; t++) 55954831Scg if (!(x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC) & CODEC_WIP)) 56054831Scg break; 56154831Scg if (debug > 0) printf("loop 1 t 0x%x x 0x%x ", t, x); 56253413Sroger 56354831Scg sl = spltty(); 56453413Sroger 56554831Scg /* save the current state for later */ 56654831Scg x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE); 56754831Scg /* enable SRC state data in SRC mux */ 56854831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, 56954831Scg (es1371_wait_src_ready(s) & 57054831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1))); 57154831Scg /* wait for a SAFE time to write addr/data and then do it, dammit */ 57254831Scg for (t = 0; t < 0x5000; t++) 57354831Scg if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE) & 0x00070000) == 0x00010000) 57454831Scg break; 57554831Scg if (debug > 0) printf("loop 2 t 0x%x x 0x%x ", t, x); 57654831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_CODEC, 57754831Scg ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD); 57853413Sroger 57954831Scg /* restore SRC reg */ 58054831Scg es1371_wait_src_ready(s); 58154831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, x); 58253413Sroger 58354831Scg splx(sl); 58453413Sroger 58554831Scg /* now wait for the stinkin' data (RDY) */ 58654831Scg for (t = 0; t < 0x1000; t++) 58754831Scg if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY) 58854831Scg break; 58954831Scg if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT)); 59054831Scg return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 59153413Sroger} 59253413Sroger 59353413Srogerstatic u_int 59454831Scges1371_src_read(es_info_t *es, u_short reg) 59554831Scg{ 59654831Scg unsigned int r; 59753413Sroger 59854831Scg r = es1371_wait_src_ready(es) & 59954831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 60054831Scg r |= ES1371_SRC_RAM_ADDRO(reg); 60154831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r); 60254831Scg return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 60353413Sroger} 60453413Sroger 60553413Srogerstatic void 60653413Srogeres1371_src_write(es_info_t *es, u_short reg, u_short data){ 60753413Sroger u_int r; 60853413Sroger 60953413Sroger r = es1371_wait_src_ready(es) & 61054831Scg (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 61153413Sroger r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 61253413Sroger /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */ 61354831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE); 61453413Sroger} 61553413Sroger 61654831Scgstatic u_int 61754831Scges1371_adc_rate(es_info_t *es, u_int rate, int set) 61854831Scg{ 61954831Scg u_int n, truncm, freq, result; 62054831Scg 62154831Scg if (rate > 48000) rate = 48000; 62254831Scg if (rate < 4000) rate = 4000; 62354831Scg n = rate / 3000; 62454831Scg if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 62554831Scg n--; 62654831Scg truncm = (21 * n - 1) | 1; 62754831Scg freq = ((48000UL << 15) / rate) * n; 62854831Scg result = (48000UL << 15) / (freq / n); 62954831Scg if (set) { 63054831Scg if (rate >= 24000) { 63154831Scg if (truncm > 239) truncm = 239; 63254831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 63354831Scg (((239 - truncm) >> 1) << 9) | (n << 4)); 63454831Scg } else { 63554831Scg if (truncm > 119) truncm = 119; 63654831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 63754831Scg 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 63854831Scg } 63954831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 64054831Scg (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 64154831Scg 0x00ff) | ((freq >> 5) & 0xfc00)); 64254831Scg es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 64354831Scg es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 64454831Scg es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 64553413Sroger } 64653413Sroger return result; 64753413Sroger} 64853413Sroger 64953413Srogerstatic u_int 65054831Scges1371_dac_rate(es_info_t *es, u_int rate, int set) 65154831Scg{ 65254831Scg u_int freq, r, result, dac, dis; 65353413Sroger 65454831Scg if (rate > 48000) rate = 48000; 65554831Scg if (rate < 4000) rate = 4000; 65654831Scg freq = (rate << 15) / 3000; 65754831Scg result = (freq * 3000) >> 15; 65854831Scg if (set) { 65954831Scg dac = (set == 1)? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 66054831Scg dis = (set == 1)? ES1371_DIS_P2 : ES1371_DIS_P1; 66154831Scg 66254831Scg r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 66354831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 66454831Scg es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 66554831Scg (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 66654831Scg es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 66754831Scg r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 66854831Scg bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r); 66954831Scg } 67054831Scg return result; 67153413Sroger} 67253413Sroger 67353413Srogerstatic u_int 67454831Scges1371_wait_src_ready(es_info_t *es) 67554831Scg{ 67654831Scg u_int t, r; 67753413Sroger 67854831Scg for (t = 0; t < 500; t++) { 67954831Scg if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY)) 68054831Scg return r; 68154831Scg DELAY(1000); 68254831Scg } 68354831Scg printf("es1371: wait src ready timeout 0x%x [0x%x]\n", ES1371_REG_SMPRATE, r); 68454831Scg return 0; 68553413Sroger} 68653413Sroger 68750724Scg/* -------------------------------------------------------------------- */ 68850724Scg 68950724Scg/* 69050724Scg * Probe and attach the card 69150724Scg */ 69250724Scg 69350724Scgstatic int 69450724Scges_pci_probe(device_t dev) 69550724Scg{ 69650724Scg if (pci_get_devid(dev) == ES1370_PCI_ID) { 69750724Scg device_set_desc(dev, "AudioPCI ES1370"); 69850724Scg return 0; 69953413Sroger } else if (pci_get_devid(dev) == ES1371_PCI_ID) { 70053413Sroger device_set_desc(dev, "AudioPCI ES1371"); 70153413Sroger return 0; 70250724Scg } 70350724Scg return ENXIO; 70450724Scg} 70550724Scg 70650724Scgstatic int 70750724Scges_pci_attach(device_t dev) 70850724Scg{ 70950724Scg snddev_info *d; 71050724Scg u_int32_t data; 71150724Scg struct es_info *es = 0; 71250724Scg int type = 0; 71350724Scg int regid; 71450724Scg struct resource *reg = 0; 71550724Scg int mapped; 71650724Scg int irqid; 71750724Scg struct resource *irq = 0; 71850724Scg void *ih = 0; 71950724Scg char status[SND_STATUSLEN]; 72053413Sroger struct ac97_info *codec; 72154831Scg pcm_channel *ct = NULL; 72250724Scg 72350724Scg d = device_get_softc(dev); 72450724Scg if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT)) == NULL) { 72550724Scg device_printf(dev, "cannot allocate softc\n"); 72650724Scg return ENXIO; 72750724Scg } 72850724Scg bzero(es, sizeof *es); 72950724Scg 73050724Scg mapped = 0; 73150724Scg data = pci_read_config(dev, PCIR_COMMAND, 2); 73250724Scg if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 73350724Scg regid = MEM_MAP_REG; 73450724Scg type = SYS_RES_MEMORY; 73550724Scg reg = bus_alloc_resource(dev, type, ®id, 73650724Scg 0, ~0, 1, RF_ACTIVE); 73750724Scg if (reg) { 73850724Scg es->st = rman_get_bustag(reg); 73950724Scg es->sh = rman_get_bushandle(reg); 74050724Scg mapped++; 74150724Scg } 74250724Scg } 74350724Scg if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 74450724Scg regid = PCI_MAP_REG_START; 74550724Scg type = SYS_RES_IOPORT; 74650724Scg reg = bus_alloc_resource(dev, type, ®id, 74750724Scg 0, ~0, 1, RF_ACTIVE); 74850724Scg if (reg) { 74950724Scg es->st = rman_get_bustag(reg); 75050724Scg es->sh = rman_get_bushandle(reg); 75150724Scg mapped++; 75250724Scg } 75350724Scg } 75450724Scg if (mapped == 0) { 75550724Scg device_printf(dev, "unable to map register space\n"); 75650724Scg goto bad; 75750724Scg } 75854831Scg 75953413Sroger if (pci_get_devid(dev) == ES1371_PCI_ID) { 76054831Scg if(-1 == es1371_init(es)) { 76154831Scg device_printf(dev, "unable to initialize the card\n"); 76254831Scg goto bad; 76354831Scg } 76454831Scg codec = ac97_create(es, es1371_rdcodec, es1371_wrcodec); 76554831Scg if (codec == NULL) goto bad; 76654831Scg /* our init routine does everything for us */ 76754831Scg /* set to NULL; flag mixer_init not to run the ac97_init */ 76854831Scg /* ac97_mixer.init = NULL; */ 76954831Scg mixer_init(d, &ac97_mixer, codec); 77054831Scg ct = &es1371_chantemplate; 77154831Scg } else if (pci_get_devid(dev) == ES1370_PCI_ID) { 77254831Scg if (-1 == es1370_init(es)) { 77354831Scg device_printf(dev, "unable to initialize the card\n"); 77454831Scg goto bad; 77554831Scg } 77654831Scg mixer_init(d, &es1370_mixer, es); 77754831Scg ct = &es1370_chantemplate; 77854831Scg } else goto bad; 77950724Scg 78050724Scg irqid = 0; 78150724Scg irq = bus_alloc_resource(dev, SYS_RES_IRQ, &irqid, 78252046Simp 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 78350724Scg if (!irq 78450724Scg || bus_setup_intr(dev, irq, INTR_TYPE_TTY, es_intr, es, &ih)) { 78550724Scg device_printf(dev, "unable to map interrupt\n"); 78650724Scg goto bad; 78750724Scg } 78850724Scg 78950724Scg if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 79050724Scg /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 79150724Scg /*highaddr*/BUS_SPACE_MAXADDR, 79250724Scg /*filter*/NULL, /*filterarg*/NULL, 79350724Scg /*maxsize*/ES_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 79450724Scg /*flags*/0, &es->parent_dmat) != 0) { 79550724Scg device_printf(dev, "unable to create dma tag\n"); 79650724Scg goto bad; 79750724Scg } 79850724Scg 79950724Scg snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 80050724Scg (type == SYS_RES_IOPORT)? "io" : "memory", 80150724Scg rman_get_start(reg), rman_get_start(irq)); 80250724Scg 80350724Scg if (pcm_register(dev, es, 1, 1)) goto bad; 80454831Scg pcm_addchan(dev, PCMDIR_REC, ct, es); 80554831Scg pcm_addchan(dev, PCMDIR_PLAY, ct, es); 80650724Scg pcm_setstatus(dev, status); 80750724Scg 80850724Scg return 0; 80950724Scg 81050724Scg bad: 81150724Scg if (es) free(es, M_DEVBUF); 81250724Scg if (reg) bus_release_resource(dev, type, regid, reg); 81350724Scg if (ih) bus_teardown_intr(dev, irq, ih); 81450724Scg if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq); 81550724Scg return ENXIO; 81650724Scg} 81750724Scg 81850724Scgstatic device_method_t es_methods[] = { 81950724Scg /* Device interface */ 82050724Scg DEVMETHOD(device_probe, es_pci_probe), 82150724Scg DEVMETHOD(device_attach, es_pci_attach), 82250724Scg 82350724Scg { 0, 0 } 82450724Scg}; 82550724Scg 82650724Scgstatic driver_t es_driver = { 82750724Scg "pcm", 82850724Scg es_methods, 82950724Scg sizeof(snddev_info), 83050724Scg}; 83150724Scg 83250724Scgstatic devclass_t pcm_devclass; 83350724Scg 83450724ScgDRIVER_MODULE(es, pci, es_driver, pcm_devclass, 0, 0); 835