es137x.c revision 152419
1/*- 2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI 3 * boards based on the ES1370, ES1371 and ES1373 chips. 4 * 5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com> 6 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org> 7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in 18 * the documentation and/or other materials provided with the 19 * distribution. 20 * 21 * 3. All advertising materials mentioning features or use of this 22 * software must display the following acknowledgement: 23 * This product includes software developed by Joachim Kuebart. 24 * 25 * 4. The name of the author may not be used to endorse or promote 26 * products derived from this software without specific prior 27 * written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 32 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED 39 * OF THE POSSIBILITY OF SUCH DAMAGE. 40 */ 41 42/* 43 * Part of this code was heavily inspired by the linux driver from 44 * Thomas Sailer (sailer@ife.ee.ethz.ch) 45 * Just about everything has been touched and reworked in some way but 46 * the all the underlying sequences/timing/register values are from 47 * Thomas' code. 48 * 49*/ 50 51#include <dev/sound/pcm/sound.h> 52#include <dev/sound/pcm/ac97.h> 53#include <dev/sound/pci/es137x.h> 54 55#include <dev/pci/pcireg.h> 56#include <dev/pci/pcivar.h> 57 58#include <sys/sysctl.h> 59 60#include "mixer_if.h" 61 62SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/es137x.c 152419 2005-11-14 18:17:31Z ariff $"); 63 64#define MEM_MAP_REG 0x14 65 66/* PCI IDs of supported chips */ 67#define ES1370_PCI_ID 0x50001274 68#define ES1371_PCI_ID 0x13711274 69#define ES1371_PCI_ID2 0x13713274 70#define CT5880_PCI_ID 0x58801274 71#define CT4730_PCI_ID 0x89381102 72 73#define ES1371REV_ES1371_A 0x02 74#define ES1371REV_ES1371_B 0x09 75 76#define ES1371REV_ES1373_8 0x08 77#define ES1371REV_ES1373_A 0x04 78#define ES1371REV_ES1373_B 0x06 79 80#define ES1371REV_CT5880_A 0x07 81 82#define CT5880REV_CT5880_C 0x02 83#define CT5880REV_CT5880_D 0x03 84#define CT5880REV_CT5880_E 0x04 85 86#define CT4730REV_CT4730_A 0x00 87 88#define ES_DEFAULT_BUFSZ 4096 89 90/* 2 DAC for playback, 1 ADC for record */ 91#define ES_DAC1 0 92#define ES_DAC2 1 93#define ES_ADC 2 94#define ES_NCHANS 3 95 96#define ES1370_DAC1_MINSPEED 5512 97#define ES1370_DAC1_MAXSPEED 44100 98 99/* device private data */ 100struct es_info; 101 102struct es_chinfo { 103 struct es_info *parent; 104 struct pcm_channel *channel; 105 struct snd_dbuf *buffer; 106 struct pcmchan_caps caps; 107 int dir, num, index; 108 u_int32_t fmt, blksz, bufsz; 109}; 110 111/* 112 * 32bit Ensoniq Configuration (es->escfg). 113 * ---------------------------------------- 114 * 115 * +-------+--------+------+------+---------+--------+---------+---------+ 116 * len | 16 | 1 | 1 | 1 | 2 | 2 | 1 | 8 | 117 * +-------+--------+------+------+---------+--------+---------+---------+ 118 * | fixed | single | | | | | is | general | 119 * | rate | pcm | DACx | DACy | numplay | numrec | es1370? | purpose | 120 * | | mixer | | | | | | | 121 * +-------+--------+------+------+---------+--------+---------+---------+ 122 */ 123#define ES_FIXED_RATE(cfgv) \ 124 (((cfgv) & 0xffff0000) >> 16) 125#define ES_SET_FIXED_RATE(cfgv, nv) \ 126 (((cfgv) & ~0xffff0000) | (((nv) & 0xffff) << 16)) 127#define ES_SINGLE_PCM_MIX(cfgv) \ 128 (((cfgv) & 0x8000) >> 15) 129#define ES_SET_SINGLE_PCM_MIX(cfgv, nv) \ 130 (((cfgv) & ~0x8000) | (((nv) ? 1 : 0) << 15)) 131#define ES_DAC_FIRST(cfgv) \ 132 (((cfgv) & 0x4000) >> 14) 133#define ES_SET_DAC_FIRST(cfgv, nv) \ 134 (((cfgv) & ~0x4000) | (((nv) & 0x1) << 14)) 135#define ES_DAC_SECOND(cfgv) \ 136 (((cfgv) & 0x2000) >> 13) 137#define ES_SET_DAC_SECOND(cfgv, nv) \ 138 (((cfgv) & ~0x2000) | (((nv) & 0x1) << 13)) 139#define ES_NUMPLAY(cfgv) \ 140 (((cfgv) & 0x1800) >> 11) 141#define ES_SET_NUMPLAY(cfgv, nv) \ 142 (((cfgv) & ~0x1800) | (((nv) & 0x3) << 11)) 143#define ES_NUMREC(cfgv) \ 144 (((cfgv) & 0x600) >> 9) 145#define ES_SET_NUMREC(cfgv, nv) \ 146 (((cfgv) & ~0x600) | (((nv) & 0x3) << 9)) 147#define ES_IS_ES1370(cfgv) \ 148 (((cfgv) & 0x100) >> 8) 149#define ES_SET_IS_ES1370(cfgv, nv) \ 150 (((cfgv) & ~0x100) | (((nv) ? 1 : 0) << 8)) 151#define ES_GP(cfgv) \ 152 ((cfgv) & 0xff) 153#define ES_SET_GP(cfgv, nv) \ 154 (((cfgv) & ~0xff) | ((nv) & 0xff)) 155 156#define ES_DAC1_ENABLED(cfgv) \ 157 (ES_NUMPLAY(cfgv) > 1 || \ 158 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC1)) 159#define ES_DAC2_ENABLED(cfgv) \ 160 (ES_NUMPLAY(cfgv) > 1 || \ 161 (ES_NUMPLAY(cfgv) == 1 && ES_DAC_FIRST(cfgv) == ES_DAC2)) 162 163/* 164 * DAC 1/2 configuration through kernel hint - hint.pcm.<unit>.dac="val" 165 * 166 * 0 = Enable both DACs - Default 167 * 1 = Enable single DAC (DAC1) 168 * 2 = Enable single DAC (DAC2) 169 * 3 = Enable both DACs, swap position (DAC2 comes first instead of DAC1) 170 */ 171#define ES_DEFAULT_DAC_CFG 0 172 173struct es_info { 174 bus_space_tag_t st; 175 bus_space_handle_t sh; 176 bus_dma_tag_t parent_dmat; 177 178 struct resource *reg, *irq; 179 int regtype, regid, irqid; 180 void *ih; 181 182 device_t dev; 183 int num; 184 unsigned int bufsz; 185 186 /* Contents of board's registers */ 187 uint32_t ctrl; 188 uint32_t sctrl; 189 uint32_t escfg; 190 struct es_chinfo ch[ES_NCHANS]; 191 struct mtx *lock; 192}; 193 194#define ES_LOCK(sc) snd_mtxlock((sc)->lock) 195#define ES_UNLOCK(sc) snd_mtxunlock((sc)->lock) 196#define ES_LOCK_ASSERT(sc) snd_mtxassert((sc)->lock) 197 198/* prototypes */ 199static void es_intr(void *); 200static uint32_t es1371_wait_src_ready(struct es_info *); 201static void es1371_src_write(struct es_info *, u_short, unsigned short); 202static u_int es1371_adc_rate(struct es_info *, u_int, int); 203static u_int es1371_dac_rate(struct es_info *, u_int, int); 204static int es1371_init(struct es_info *); 205static int es1370_init(struct es_info *); 206static int es1370_wrcodec(struct es_info *, u_char, u_char); 207 208static u_int32_t es_fmt[] = { 209 AFMT_U8, 210 AFMT_STEREO | AFMT_U8, 211 AFMT_S16_LE, 212 AFMT_STEREO | AFMT_S16_LE, 213 0 214}; 215static struct pcmchan_caps es_caps = {4000, 48000, es_fmt, 0}; 216 217static const struct { 218 unsigned volidx:4; 219 unsigned left:4; 220 unsigned right:4; 221 unsigned stereo:1; 222 unsigned recmask:13; 223 unsigned avail:1; 224} mixtable[SOUND_MIXER_NRDEVICES] = { 225 [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x1f7f, 1 }, 226 [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, 227 [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, 228 [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, 229 [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, 230 [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, 231 [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, 232 [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, 233 [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, 234 [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } 235}; 236 237static __inline u_int32_t 238es_rd(struct es_info *es, int regno, int size) 239{ 240 switch (size) { 241 case 1: 242 return bus_space_read_1(es->st, es->sh, regno); 243 case 2: 244 return bus_space_read_2(es->st, es->sh, regno); 245 case 4: 246 return bus_space_read_4(es->st, es->sh, regno); 247 default: 248 return 0xFFFFFFFF; 249 } 250} 251 252static __inline void 253es_wr(struct es_info *es, int regno, u_int32_t data, int size) 254{ 255 256 switch (size) { 257 case 1: 258 bus_space_write_1(es->st, es->sh, regno, data); 259 break; 260 case 2: 261 bus_space_write_2(es->st, es->sh, regno, data); 262 break; 263 case 4: 264 bus_space_write_4(es->st, es->sh, regno, data); 265 break; 266 } 267} 268 269/* -------------------------------------------------------------------- */ 270/* The es1370 mixer interface */ 271 272static int 273es1370_mixinit(struct snd_mixer *m) 274{ 275 struct es_info *es; 276 int i; 277 u_int32_t v; 278 279 es = mix_getdevinfo(m); 280 v = 0; 281 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 282 if (mixtable[i].avail) v |= (1 << i); 283 /* 284 * Each DAC1/2 for ES1370 can be controlled independently 285 * DAC1 = controlled by synth 286 * DAC2 = controlled by pcm 287 * This is indeed can confuse user if DAC1 become primary playback 288 * channel. Try to be smart and combine both if necessary. 289 */ 290 if (ES_SINGLE_PCM_MIX(es->escfg)) 291 v &= ~(1 << SOUND_MIXER_SYNTH); 292 mix_setdevs(m, v); 293 v = 0; 294 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 295 if (mixtable[i].recmask) v |= (1 << i); 296 if (ES_SINGLE_PCM_MIX(es->escfg)) /* ditto */ 297 v &= ~(1 << SOUND_MIXER_SYNTH); 298 mix_setrecdevs(m, v); 299 return 0; 300} 301 302static int 303es1370_mixset(struct snd_mixer *m, unsigned dev, unsigned left, unsigned right) 304{ 305 struct es_info *es; 306 int l, r, rl, rr, set_dac1; 307 308 if (!mixtable[dev].avail) return -1; 309 l = left; 310 r = mixtable[dev].stereo? right : l; 311 if (mixtable[dev].left == 0xf) { 312 rl = (l < 2)? 0x80 : 7 - (l - 2) / 14; 313 } else { 314 rl = (l < 10)? 0x80 : 15 - (l - 10) / 6; 315 } 316 es = mix_getdevinfo(m); 317 ES_LOCK(es); 318 if (dev == SOUND_MIXER_PCM && (ES_SINGLE_PCM_MIX(es->escfg)) && 319 ES_DAC1_ENABLED(es->escfg)) { 320 set_dac1 = 1; 321 } else { 322 set_dac1 = 0; 323 } 324 if (mixtable[dev].stereo) { 325 rr = (r < 10)? 0x80 : 15 - (r - 10) / 6; 326 es1370_wrcodec(es, mixtable[dev].right, rr); 327 if (set_dac1 && mixtable[SOUND_MIXER_SYNTH].stereo) 328 es1370_wrcodec(es, mixtable[SOUND_MIXER_SYNTH].right, rr); 329 } 330 es1370_wrcodec(es, mixtable[dev].left, rl); 331 if (set_dac1) 332 es1370_wrcodec(es, mixtable[SOUND_MIXER_SYNTH].left, rl); 333 ES_UNLOCK(es); 334 335 return l | (r << 8); 336} 337 338static int 339es1370_mixsetrecsrc(struct snd_mixer *m, u_int32_t src) 340{ 341 struct es_info *es; 342 int i, j = 0; 343 344 es = mix_getdevinfo(m); 345 if (src == 0) src = 1 << SOUND_MIXER_MIC; 346 src &= mix_getrecdevs(m); 347 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) 348 if ((src & (1 << i)) != 0) j |= mixtable[i].recmask; 349 350 ES_LOCK(es); 351 if ((src & (1 << SOUND_MIXER_PCM)) && ES_SINGLE_PCM_MIX(es->escfg) && 352 ES_DAC1_ENABLED(es->escfg)) { 353 j |= mixtable[SOUND_MIXER_SYNTH].recmask; 354 } 355 es1370_wrcodec(es, CODEC_LIMIX1, j & 0x55); 356 es1370_wrcodec(es, CODEC_RIMIX1, j & 0xaa); 357 es1370_wrcodec(es, CODEC_LIMIX2, (j >> 8) & 0x17); 358 es1370_wrcodec(es, CODEC_RIMIX2, (j >> 8) & 0x0f); 359 es1370_wrcodec(es, CODEC_OMIX1, 0x7f); 360 es1370_wrcodec(es, CODEC_OMIX2, 0x3f); 361 ES_UNLOCK(es); 362 363 return src; 364} 365 366static kobj_method_t es1370_mixer_methods[] = { 367 KOBJMETHOD(mixer_init, es1370_mixinit), 368 KOBJMETHOD(mixer_set, es1370_mixset), 369 KOBJMETHOD(mixer_setrecsrc, es1370_mixsetrecsrc), 370 { 0, 0 } 371}; 372MIXER_DECLARE(es1370_mixer); 373 374/* -------------------------------------------------------------------- */ 375 376static int 377es1370_wrcodec(struct es_info *es, u_char i, u_char data) 378{ 379 u_int t; 380 381 ES_LOCK_ASSERT(es); 382 383 for (t = 0; t < 0x1000; t++) { 384 if ((es_rd(es, ES1370_REG_STATUS, 4) & 385 STAT_CSTAT) == 0) { 386 es_wr(es, ES1370_REG_CODEC, 387 ((u_short)i << CODEC_INDEX_SHIFT) | data, 2); 388 return 0; 389 } 390 DELAY(1); 391 } 392 device_printf(es->dev, "%s: timed out\n", __func__); 393 return -1; 394} 395 396/* -------------------------------------------------------------------- */ 397 398/* channel interface */ 399static void * 400eschan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 401{ 402 struct es_info *es = devinfo; 403 struct es_chinfo *ch; 404 uint32_t index; 405 406 ES_LOCK(es); 407 408 if (dir == PCMDIR_PLAY) { 409 index = ES_GP(es->escfg); 410 es->escfg = ES_SET_GP(es->escfg, index + 1); 411 if (index == 0) { 412 index = ES_DAC_FIRST(es->escfg); 413 } else if (index == 1) { 414 index = ES_DAC_SECOND(es->escfg); 415 } else { 416 device_printf(es->dev, "Invalid ES_GP index: %d\n", index); 417 ES_UNLOCK(es); 418 return NULL; 419 } 420 if (!(index == ES_DAC1 || index == ES_DAC2)) { 421 device_printf(es->dev, "Unknown DAC: %d\n", 422 index + 1); 423 ES_UNLOCK(es); 424 return NULL; 425 } 426 if (es->ch[index].channel != NULL) { 427 device_printf(es->dev, "DAC%d already initialized!\n", 428 index + 1); 429 ES_UNLOCK(es); 430 return NULL; 431 } 432 } else 433 index = ES_ADC; 434 435 ch = &es->ch[index]; 436 ch->index = index; 437 ch->num = es->num++; 438 ch->caps = es_caps; 439 if (ES_IS_ES1370(es->escfg)) { 440 if (ch->index == ES_DAC1) { 441 ch->caps.maxspeed = ES1370_DAC1_MAXSPEED; 442 ch->caps.minspeed = ES1370_DAC1_MINSPEED; 443 } else { 444 uint32_t fixed_rate = ES_FIXED_RATE(es->escfg); 445 if (!(fixed_rate < es_caps.minspeed || 446 fixed_rate > es_caps.maxspeed)) { 447 ch->caps.maxspeed = fixed_rate; 448 ch->caps.minspeed = fixed_rate; 449 } 450 } 451 } 452 ch->parent = es; 453 ch->channel = c; 454 ch->buffer = b; 455 ch->bufsz = es->bufsz; 456 ch->blksz = ch->bufsz / 2; 457 ch->dir = dir; 458 ES_UNLOCK(es); 459 if (sndbuf_alloc(ch->buffer, es->parent_dmat, ch->bufsz) != 0) 460 return NULL; 461 ES_LOCK(es); 462 if (dir == PCMDIR_PLAY) { 463 if (ch->index == ES_DAC1) { 464 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC1_FRAMEADR >> 8, 1); 465 es_wr(es, ES1370_REG_DAC1_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); 466 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 467 } else { 468 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMEADR >> 8, 1); 469 es_wr(es, ES1370_REG_DAC2_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); 470 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 471 } 472 } else { 473 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMEADR >> 8, 1); 474 es_wr(es, ES1370_REG_ADC_FRAMEADR & 0xff, sndbuf_getbufaddr(ch->buffer), 4); 475 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 476 } 477 ES_UNLOCK(es); 478 return ch; 479} 480 481static int 482eschan_setformat(kobj_t obj, void *data, u_int32_t format) 483{ 484 struct es_chinfo *ch = data; 485 struct es_info *es = ch->parent; 486 487 ES_LOCK(es); 488 if (ch->dir == PCMDIR_PLAY) { 489 if (ch->index == ES_DAC1) { 490 es->sctrl &= ~SCTRL_P1FMT; 491 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P1SEB; 492 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P1SMB; 493 } else { 494 es->sctrl &= ~SCTRL_P2FMT; 495 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_P2SEB; 496 if (format & AFMT_STEREO) es->sctrl |= SCTRL_P2SMB; 497 } 498 } else { 499 es->sctrl &= ~SCTRL_R1FMT; 500 if (format & AFMT_S16_LE) es->sctrl |= SCTRL_R1SEB; 501 if (format & AFMT_STEREO) es->sctrl |= SCTRL_R1SMB; 502 } 503 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 504 ES_UNLOCK(es); 505 ch->fmt = format; 506 return 0; 507} 508 509static int 510eschan1370_setspeed(kobj_t obj, void *data, u_int32_t speed) 511{ 512 struct es_chinfo *ch = data; 513 struct es_info *es = ch->parent; 514 515 /* Fixed rate , do nothing. */ 516 if (ch->caps.minspeed == ch->caps.maxspeed) 517 return ch->caps.maxspeed; 518 if (speed < ch->caps.minspeed) 519 speed = ch->caps.minspeed; 520 if (speed > ch->caps.maxspeed) 521 speed = ch->caps.maxspeed; 522 ES_LOCK(es); 523 if (ch->index == ES_DAC1) { 524 /* 525 * DAC1 does not support continuous rate settings. 526 * Pick the nearest and use it since FEEDER_RATE will 527 * do the the proper conversion for us. 528 */ 529 es->ctrl &= ~CTRL_WTSRSEL; 530 if (speed < 8268) { 531 speed = 5512; 532 es->ctrl |= 0 << CTRL_SH_WTSRSEL; 533 } else if (speed < 16537) { 534 speed = 11025; 535 es->ctrl |= 1 << CTRL_SH_WTSRSEL; 536 } else if (speed < 33075) { 537 speed = 22050; 538 es->ctrl |= 2 << CTRL_SH_WTSRSEL; 539 } else { 540 speed = 44100; 541 es->ctrl |= 3 << CTRL_SH_WTSRSEL; 542 } 543 } else { 544 es->ctrl &= ~CTRL_PCLKDIV; 545 es->ctrl |= DAC2_SRTODIV(speed) << CTRL_SH_PCLKDIV; 546 } 547 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 548 ES_UNLOCK(es); 549 return speed; 550} 551 552static int 553eschan1371_setspeed(kobj_t obj, void *data, u_int32_t speed) 554{ 555 struct es_chinfo *ch = data; 556 struct es_info *es = ch->parent; 557 uint32_t i; 558 int delta; 559 560 ES_LOCK(es); 561 if (ch->dir == PCMDIR_PLAY) 562 i = es1371_dac_rate(es, speed, ch->index); /* play */ 563 else 564 i = es1371_adc_rate(es, speed, ch->index); /* record */ 565 ES_UNLOCK(es); 566 delta = (speed > i) ? speed - i : i - speed; 567 if (delta < 2) 568 return speed; 569 return i; 570} 571 572static int 573eschan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 574{ 575 struct es_info *es; 576 struct es_chinfo *ch = data; 577 uint32_t oblksz, obufsz; 578 int error; 579 580 oblksz = ch->blksz; 581 obufsz = ch->bufsz; 582 ch->blksz = blocksize; 583 ch->bufsz = ch->blksz * 2; 584 error = sndbuf_resize(ch->buffer, 2, ch->blksz); 585 if (error != 0) { 586 ch->blksz = oblksz; 587 ch->bufsz = obufsz; 588 es = ch->parent; 589 device_printf(es->dev, "unable to set block size, blksz = %d, " 590 "error = %d", blocksize, error); 591 } 592 return ch->blksz; 593} 594 595static int 596eschan_trigger(kobj_t obj, void *data, int go) 597{ 598 struct es_chinfo *ch = data; 599 struct es_info *es = ch->parent; 600 uint32_t cnt, b = 0; 601 602 if (go == PCMTRIG_EMLDMAWR || go == PCMTRIG_EMLDMARD) 603 return 0; 604 605 cnt = (ch->blksz / sndbuf_getbps(ch->buffer)) - 1; 606 if (ch->fmt & AFMT_16BIT) 607 b |= 0x02; 608 if (ch->fmt & AFMT_STEREO) 609 b |= 0x01; 610 ES_LOCK(es); 611 if (ch->dir == PCMDIR_PLAY) { 612 if (go == PCMTRIG_START) { 613 if (ch->index == ES_DAC1) { 614 es->ctrl |= CTRL_DAC1_EN; 615 es->sctrl &= ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | SCTRL_P1SCTRLD); 616 es->sctrl |= SCTRL_P1INTEN | b; 617 es_wr(es, ES1370_REG_DAC1_SCOUNT, cnt, 4); 618 /* start at beginning of buffer */ 619 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC1_FRAMECNT >> 8, 4); 620 es_wr(es, ES1370_REG_DAC1_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 621 } else { 622 es->ctrl |= CTRL_DAC2_EN; 623 es->sctrl &= ~(SCTRL_P2ENDINC | SCTRL_P2STINC | SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN); 624 es->sctrl |= SCTRL_P2INTEN | (b << 2) | 625 (((b & 2) ? : 1) << SCTRL_SH_P2ENDINC); 626 es_wr(es, ES1370_REG_DAC2_SCOUNT, cnt, 4); 627 /* start at beginning of buffer */ 628 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_DAC2_FRAMECNT >> 8, 4); 629 es_wr(es, ES1370_REG_DAC2_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 630 } 631 } else es->ctrl &= ~(ch->index == ES_DAC1 ? CTRL_DAC1_EN : CTRL_DAC2_EN); 632 } else { 633 if (go == PCMTRIG_START) { 634 es->ctrl |= CTRL_ADC_EN; 635 es->sctrl &= ~SCTRL_R1LOOPSEL; 636 es->sctrl |= SCTRL_R1INTEN | (b << 4); 637 es_wr(es, ES1370_REG_ADC_SCOUNT, cnt, 4); 638 /* start at beginning of buffer */ 639 es_wr(es, ES1370_REG_MEMPAGE, ES1370_REG_ADC_FRAMECNT >> 8, 4); 640 es_wr(es, ES1370_REG_ADC_FRAMECNT & 0xff, (ch->bufsz >> 2) - 1, 4); 641 } else es->ctrl &= ~CTRL_ADC_EN; 642 } 643 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 644 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 645 ES_UNLOCK(es); 646 return 0; 647} 648 649static int 650eschan_getptr(kobj_t obj, void *data) 651{ 652 struct es_chinfo *ch = data; 653 struct es_info *es = ch->parent; 654 u_int32_t reg, cnt; 655 656 if (ch->dir == PCMDIR_PLAY) { 657 if (ch->index == ES_DAC1) 658 reg = ES1370_REG_DAC1_FRAMECNT; 659 else 660 reg = ES1370_REG_DAC2_FRAMECNT; 661 } else 662 reg = ES1370_REG_ADC_FRAMECNT; 663 ES_LOCK(es); 664 es_wr(es, ES1370_REG_MEMPAGE, reg >> 8, 4); 665 cnt = es_rd(es, reg & 0x000000ff, 4) >> 16; 666 ES_UNLOCK(es); 667 /* cnt is longwords */ 668 return cnt << 2; 669} 670 671static struct pcmchan_caps * 672eschan_getcaps(kobj_t obj, void *data) 673{ 674 struct es_chinfo *ch = data; 675 676 return &ch->caps; 677} 678 679static kobj_method_t eschan1370_methods[] = { 680 KOBJMETHOD(channel_init, eschan_init), 681 KOBJMETHOD(channel_setformat, eschan_setformat), 682 KOBJMETHOD(channel_setspeed, eschan1370_setspeed), 683 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 684 KOBJMETHOD(channel_trigger, eschan_trigger), 685 KOBJMETHOD(channel_getptr, eschan_getptr), 686 KOBJMETHOD(channel_getcaps, eschan_getcaps), 687 { 0, 0 } 688}; 689CHANNEL_DECLARE(eschan1370); 690 691static kobj_method_t eschan1371_methods[] = { 692 KOBJMETHOD(channel_init, eschan_init), 693 KOBJMETHOD(channel_setformat, eschan_setformat), 694 KOBJMETHOD(channel_setspeed, eschan1371_setspeed), 695 KOBJMETHOD(channel_setblocksize, eschan_setblocksize), 696 KOBJMETHOD(channel_trigger, eschan_trigger), 697 KOBJMETHOD(channel_getptr, eschan_getptr), 698 KOBJMETHOD(channel_getcaps, eschan_getcaps), 699 { 0, 0 } 700}; 701CHANNEL_DECLARE(eschan1371); 702 703/* -------------------------------------------------------------------- */ 704/* The interrupt handler */ 705static void 706es_intr(void *p) 707{ 708 struct es_info *es = p; 709 uint32_t intsrc, sctrl; 710 711 ES_LOCK(es); 712 intsrc = es_rd(es, ES1370_REG_STATUS, 4); 713 if ((intsrc & STAT_INTR) == 0) { 714 ES_UNLOCK(es); 715 return; 716 } 717 718 sctrl = es->sctrl; 719 if (intsrc & STAT_ADC) sctrl &= ~SCTRL_R1INTEN; 720 if (intsrc & STAT_DAC1) sctrl &= ~SCTRL_P1INTEN; 721 if (intsrc & STAT_DAC2) sctrl &= ~SCTRL_P2INTEN; 722 723 es_wr(es, ES1370_REG_SERIAL_CONTROL, sctrl, 4); 724 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 725 ES_UNLOCK(es); 726 727 if (intsrc & STAT_ADC) chn_intr(es->ch[ES_ADC].channel); 728 if (intsrc & STAT_DAC1) chn_intr(es->ch[ES_DAC1].channel); 729 if (intsrc & STAT_DAC2) chn_intr(es->ch[ES_DAC2].channel); 730} 731 732/* ES1370 specific */ 733static int 734es1370_init(struct es_info *es) 735{ 736 uint32_t fixed_rate; 737 int r, single_pcm; 738 739 /* ES1370 default to fixed rate operation */ 740 if (resource_int_value(device_get_name(es->dev), 741 device_get_unit(es->dev), "fixed_rate", &r) == 0) { 742 fixed_rate = r; 743 if (fixed_rate) { 744 if (fixed_rate < es_caps.minspeed) 745 fixed_rate = es_caps.minspeed; 746 if (fixed_rate > es_caps.maxspeed) 747 fixed_rate = es_caps.maxspeed; 748 } 749 } else 750 fixed_rate = es_caps.maxspeed; 751 752 if (resource_int_value(device_get_name(es->dev), 753 device_get_unit(es->dev), "single_pcm_mixer", &r) == 0) 754 single_pcm = (r) ? 1 : 0; 755 else 756 single_pcm = 1; 757 758 ES_LOCK(es); 759 if (ES_NUMPLAY(es->escfg) == 1) 760 single_pcm = 1; 761 /* This is ES1370 */ 762 es->escfg = ES_SET_IS_ES1370(es->escfg, 1); 763 if (fixed_rate) { 764 es->escfg = ES_SET_FIXED_RATE(es->escfg, fixed_rate); 765 } else { 766 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0); 767 fixed_rate = DSP_DEFAULT_SPEED; 768 } 769 if (single_pcm) { 770 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1); 771 } else { 772 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0); 773 } 774 es->ctrl = CTRL_CDC_EN | CTRL_JYSTK_EN | CTRL_SERR_DIS | 775 (DAC2_SRTODIV(fixed_rate) << CTRL_SH_PCLKDIV); 776 es->ctrl |= 3 << CTRL_SH_WTSRSEL; 777 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 778 779 es->sctrl = 0; 780 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 781 782 es1370_wrcodec(es, CODEC_RES_PD, 3);/* No RST, PD */ 783 es1370_wrcodec(es, CODEC_CSEL, 0); /* CODEC ADC and CODEC DAC use 784 * {LR,B}CLK2 and run off the LRCLK2 785 * PLL; program DAC_SYNC=0! */ 786 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */ 787 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */ 788 ES_UNLOCK(es); 789 790 return 0; 791} 792 793/* ES1371 specific */ 794int 795es1371_init(struct es_info *es) 796{ 797 uint32_t cssr, devid, revid; 798 int idx; 799 800 ES_LOCK(es); 801 /* This is NOT ES1370 */ 802 es->escfg = ES_SET_IS_ES1370(es->escfg, 0); 803 es->num = 0; 804 es->ctrl = CTRL_JYSTK_EN; 805 es->sctrl = 0; 806 cssr = 0; 807 devid = pci_get_devid(es->dev); 808 revid = pci_get_revid(es->dev); 809 if (devid == CT4730_PCI_ID) { 810 /* XXX amplifier hack? */ 811 es->ctrl |= (1 << 16); 812 } 813 /* initialize the chips */ 814 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 815 es_wr(es, ES1370_REG_SERIAL_CONTROL, es->sctrl, 4); 816 es_wr(es, ES1371_REG_LEGACY, 0, 4); 817 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 818 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 819 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 820 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 821 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { 822 cssr = 1 << 29; 823 es_wr(es, ES1370_REG_STATUS, cssr, 4); 824 DELAY(20000); 825 } 826 /* AC'97 warm reset to start the bitclk */ 827 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 828 es_wr(es, ES1371_REG_LEGACY, ES1371_SYNC_RES, 4); 829 DELAY(2000); 830 es_wr(es, ES1370_REG_CONTROL, es->sctrl, 4); 831 es1371_wait_src_ready(es); 832 /* Init the sample rate converter */ 833 es_wr(es, ES1371_REG_SMPRATE, ES1371_DIS_SRC, 4); 834 for (idx = 0; idx < 0x80; idx++) 835 es1371_src_write(es, idx, 0); 836 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4); 837 es1371_src_write(es, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10); 838 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4); 839 es1371_src_write(es, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10); 840 es1371_src_write(es, ES_SMPREG_VOL_ADC, 1 << 12); 841 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, 1 << 12); 842 es1371_src_write(es, ES_SMPREG_VOL_DAC1, 1 << 12); 843 es1371_src_write(es, ES_SMPREG_VOL_DAC1 + 1, 1 << 12); 844 es1371_src_write(es, ES_SMPREG_VOL_DAC2, 1 << 12); 845 es1371_src_write(es, ES_SMPREG_VOL_DAC2 + 1, 1 << 12); 846 es1371_adc_rate(es, 22050, ES_ADC); 847 es1371_dac_rate(es, 22050, ES_DAC1); 848 es1371_dac_rate(es, 22050, ES_DAC2); 849 /* WARNING: 850 * enabling the sample rate converter without properly programming 851 * its parameters causes the chip to lock up (the SRC busy bit will 852 * be stuck high, and I've found no way to rectify this other than 853 * power cycle) 854 */ 855 es1371_wait_src_ready(es); 856 es_wr(es, ES1371_REG_SMPRATE, 0, 4); 857 /* try to reset codec directly */ 858 es_wr(es, ES1371_REG_CODEC, 0, 4); 859 es_wr(es, ES1370_REG_STATUS, cssr, 4); 860 ES_UNLOCK(es); 861 862 return (0); 863} 864 865/* -------------------------------------------------------------------- */ 866 867static int 868es1371_wrcd(kobj_t obj, void *s, int addr, u_int32_t data) 869{ 870 uint32_t t, x, orig; 871 struct es_info *es = (struct es_info*)s; 872 873 for (t = 0; t < 0x1000; t++) 874 if (!es_rd(es, ES1371_REG_CODEC & CODEC_WIP, 4)) 875 break; 876 /* save the current state for later */ 877 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 878 /* enable SRC state data in SRC mux */ 879 es_wr(es, ES1371_REG_SMPRATE, 880 (x & 881 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)) | 882 0x00010000, 4); 883 /* busy wait */ 884 for (t = 0; t < 0x1000; t++) 885 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00000000) 886 break; 887 /* wait for a SAFE time to write addr/data and then do it, dammit */ 888 for (t = 0; t < 0x1000; t++) 889 if ((es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00010000) 890 break; 891 892 es_wr(es, ES1371_REG_CODEC, 893 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 894 ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), 4); 895 /* restore SRC reg */ 896 es1371_wait_src_ready(s); 897 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 898 899 return 0; 900} 901 902static int 903es1371_rdcd(kobj_t obj, void *s, int addr) 904{ 905 uint32_t t, x, orig; 906 struct es_info *es = (struct es_info *)s; 907 908 for (t = 0; t < 0x1000; t++) 909 if (!(x = es_rd(es, ES1371_REG_CODEC, 4) & CODEC_WIP)) 910 break; 911 912 /* save the current state for later */ 913 x = orig = es_rd(es, ES1371_REG_SMPRATE, 4); 914 /* enable SRC state data in SRC mux */ 915 es_wr(es, ES1371_REG_SMPRATE, 916 (x & 917 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)) | 918 0x00010000, 4); 919 /* busy wait */ 920 for (t = 0; t < 0x1000; t++) 921 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00000000) 922 break; 923 /* wait for a SAFE time to write addr/data and then do it, dammit */ 924 for (t = 0; t < 0x1000; t++) 925 if ((x = es_rd(es, ES1371_REG_SMPRATE, 4) & 0x00870000) == 0x00010000) 926 break; 927 928 es_wr(es, ES1371_REG_CODEC, 929 ((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | 930 CODEC_PORD, 4); 931 932 /* restore SRC reg */ 933 es1371_wait_src_ready(s); 934 es_wr(es, ES1371_REG_SMPRATE, orig, 4); 935 936 /* now wait for the stinkin' data (RDY) */ 937 for (t = 0; t < 0x1000; t++) 938 if ((x = es_rd(es, ES1371_REG_CODEC, 4)) & CODEC_RDY) 939 break; 940 941 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT); 942} 943 944static kobj_method_t es1371_ac97_methods[] = { 945 KOBJMETHOD(ac97_read, es1371_rdcd), 946 KOBJMETHOD(ac97_write, es1371_wrcd), 947 { 0, 0 } 948}; 949AC97_DECLARE(es1371_ac97); 950 951/* -------------------------------------------------------------------- */ 952 953static u_int 954es1371_src_read(struct es_info *es, u_short reg) 955{ 956 uint32_t r; 957 958 r = es1371_wait_src_ready(es) & 959 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 960 r |= ES1371_SRC_RAM_ADDRO(reg); 961 es_wr(es, ES1371_REG_SMPRATE, r, 4); 962 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es)); 963} 964 965static void 966es1371_src_write(struct es_info *es, u_short reg, u_short data) 967{ 968 uint32_t r; 969 970 r = es1371_wait_src_ready(es) & 971 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1); 972 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data); 973 es_wr(es, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE, 4); 974} 975 976static u_int 977es1371_adc_rate(struct es_info *es, u_int rate, int set) 978{ 979 u_int n, truncm, freq, result; 980 981 ES_LOCK_ASSERT(es); 982 983 if (rate > 48000) rate = 48000; 984 if (rate < 4000) rate = 4000; 985 n = rate / 3000; 986 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9))) 987 n--; 988 truncm = (21 * n - 1) | 1; 989 freq = ((48000UL << 15) / rate) * n; 990 result = (48000UL << 15) / (freq / n); 991 if (set) { 992 if (rate >= 24000) { 993 if (truncm > 239) truncm = 239; 994 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 995 (((239 - truncm) >> 1) << 9) | (n << 4)); 996 } else { 997 if (truncm > 119) truncm = 119; 998 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_TRUNC_N, 999 0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4)); 1000 } 1001 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS, 1002 (es1371_src_read(es, ES_SMPREG_ADC + ES_SMPREG_INT_REGS) & 1003 0x00ff) | ((freq >> 5) & 0xfc00)); 1004 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 1005 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8); 1006 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8); 1007 } 1008 return result; 1009} 1010 1011static u_int 1012es1371_dac_rate(struct es_info *es, u_int rate, int set) 1013{ 1014 u_int freq, r, result, dac, dis; 1015 1016 ES_LOCK_ASSERT(es); 1017 1018 if (rate > 48000) rate = 48000; 1019 if (rate < 4000) rate = 4000; 1020 freq = ((rate << 15) + 1500) / 3000; 1021 result = (freq * 3000) >> 15; 1022 1023 dac = (set == ES_DAC1) ? ES_SMPREG_DAC1 : ES_SMPREG_DAC2; 1024 dis = (set == ES_DAC1) ? ES1371_DIS_P2 : ES1371_DIS_P1; 1025 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1)); 1026 es_wr(es, ES1371_REG_SMPRATE, r, 4); 1027 es1371_src_write(es, dac + ES_SMPREG_INT_REGS, 1028 (es1371_src_read(es, dac + ES_SMPREG_INT_REGS) & 0x00ff) | ((freq >> 5) & 0xfc00)); 1029 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff); 1030 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1)); 1031 es_wr(es, ES1371_REG_SMPRATE, r, 4); 1032 return result; 1033} 1034 1035static uint32_t 1036es1371_wait_src_ready(struct es_info *es) 1037{ 1038 uint32_t t, r; 1039 1040 for (t = 0; t < 0x1000; t++) { 1041 if (!((r = es_rd(es, ES1371_REG_SMPRATE, 4)) & ES1371_SRC_RAM_BUSY)) 1042 return r; 1043 DELAY(1); 1044 } 1045 device_printf(es->dev, "%s: timed out 0x%x [0x%x]\n", __func__, 1046 ES1371_REG_SMPRATE, r); 1047 return 0; 1048} 1049 1050/* -------------------------------------------------------------------- */ 1051 1052/* 1053 * Probe and attach the card 1054 */ 1055 1056static int 1057es_pci_probe(device_t dev) 1058{ 1059 switch(pci_get_devid(dev)) { 1060 case ES1370_PCI_ID: 1061 device_set_desc(dev, "AudioPCI ES1370"); 1062 return BUS_PROBE_DEFAULT; 1063 1064 case ES1371_PCI_ID: 1065 switch(pci_get_revid(dev)) { 1066 case ES1371REV_ES1371_A: 1067 device_set_desc(dev, "AudioPCI ES1371-A"); 1068 return BUS_PROBE_DEFAULT; 1069 1070 case ES1371REV_ES1371_B: 1071 device_set_desc(dev, "AudioPCI ES1371-B"); 1072 return BUS_PROBE_DEFAULT; 1073 1074 case ES1371REV_ES1373_A: 1075 device_set_desc(dev, "AudioPCI ES1373-A"); 1076 return BUS_PROBE_DEFAULT; 1077 1078 case ES1371REV_ES1373_B: 1079 device_set_desc(dev, "AudioPCI ES1373-B"); 1080 return BUS_PROBE_DEFAULT; 1081 1082 case ES1371REV_ES1373_8: 1083 device_set_desc(dev, "AudioPCI ES1373-8"); 1084 return BUS_PROBE_DEFAULT; 1085 1086 case ES1371REV_CT5880_A: 1087 device_set_desc(dev, "Creative CT5880-A"); 1088 return BUS_PROBE_DEFAULT; 1089 1090 default: 1091 device_set_desc(dev, "AudioPCI ES1371-?"); 1092 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 1093 return BUS_PROBE_DEFAULT; 1094 } 1095 1096 case ES1371_PCI_ID2: 1097 device_set_desc(dev, "Strange AudioPCI ES1371-? (vid=3274)"); 1098 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 1099 return BUS_PROBE_DEFAULT; 1100 1101 case CT4730_PCI_ID: 1102 switch(pci_get_revid(dev)) { 1103 case CT4730REV_CT4730_A: 1104 device_set_desc(dev, "Creative SB AudioPCI CT4730/EV1938"); 1105 return BUS_PROBE_DEFAULT; 1106 default: 1107 device_set_desc(dev, "Creative SB AudioPCI CT4730-?"); 1108 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 1109 return BUS_PROBE_DEFAULT; 1110 } 1111 1112 case CT5880_PCI_ID: 1113 switch(pci_get_revid(dev)) { 1114 case CT5880REV_CT5880_C: 1115 device_set_desc(dev, "Creative CT5880-C"); 1116 return BUS_PROBE_DEFAULT; 1117 1118 case CT5880REV_CT5880_D: 1119 device_set_desc(dev, "Creative CT5880-D"); 1120 return BUS_PROBE_DEFAULT; 1121 1122 case CT5880REV_CT5880_E: 1123 device_set_desc(dev, "Creative CT5880-E"); 1124 return BUS_PROBE_DEFAULT; 1125 1126 default: 1127 device_set_desc(dev, "Creative CT5880-?"); 1128 device_printf(dev, "unknown revision %d -- please report to cg@freebsd.org\n", pci_get_revid(dev)); 1129 return BUS_PROBE_DEFAULT; 1130 } 1131 1132 default: 1133 return ENXIO; 1134 } 1135} 1136 1137#ifdef SND_DYNSYSCTL 1138static int 1139sysctl_es137x_spdif_enable(SYSCTL_HANDLER_ARGS) 1140{ 1141 struct es_info *es; 1142 device_t dev; 1143 uint32_t r; 1144 int err, new_en; 1145 1146 dev = oidp->oid_arg1; 1147 es = pcm_getdevinfo(dev); 1148 ES_LOCK(es); 1149 r = es_rd(es, ES1370_REG_STATUS, 4); 1150 ES_UNLOCK(es); 1151 new_en = (r & ENABLE_SPDIF) ? 1 : 0; 1152 err = sysctl_handle_int(oidp, &new_en, sizeof(new_en), req); 1153 1154 if (err || req->newptr == NULL) 1155 return (err); 1156 if (new_en < 0 || new_en > 1) 1157 return (EINVAL); 1158 1159 ES_LOCK(es); 1160 if (new_en) { 1161 r |= ENABLE_SPDIF; 1162 es->ctrl |= SPDIFEN_B; 1163 es->ctrl |= RECEN_B; 1164 } else { 1165 r &= ~ENABLE_SPDIF; 1166 es->ctrl &= ~SPDIFEN_B; 1167 es->ctrl &= ~RECEN_B; 1168 } 1169 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1170 es_wr(es, ES1370_REG_STATUS, r, 4); 1171 ES_UNLOCK(es); 1172 1173 return (0); 1174} 1175 1176static int 1177sysctl_es137x_latency_timer(SYSCTL_HANDLER_ARGS) 1178{ 1179 struct es_info *es; 1180 device_t dev; 1181 uint32_t val; 1182 int err; 1183 1184 dev = oidp->oid_arg1; 1185 es = pcm_getdevinfo(dev); 1186 ES_LOCK(es); 1187 val = pci_read_config(dev, PCIR_LATTIMER, 1); 1188 ES_UNLOCK(es); 1189 err = sysctl_handle_int(oidp, &val, sizeof(val), req); 1190 1191 if (err || req->newptr == NULL) 1192 return (err); 1193 if (val > 255) 1194 return (EINVAL); 1195 1196 ES_LOCK(es); 1197 pci_write_config(dev, PCIR_LATTIMER, val, 1); 1198 ES_UNLOCK(es); 1199 1200 return (0); 1201} 1202 1203static int 1204sysctl_es137x_fixed_rate(SYSCTL_HANDLER_ARGS) 1205{ 1206 struct es_info *es; 1207 device_t dev; 1208 uint32_t val; 1209 int err; 1210 1211 dev = oidp->oid_arg1; 1212 es = pcm_getdevinfo(dev); 1213 ES_LOCK(es); 1214 val = ES_FIXED_RATE(es->escfg); 1215 if (val < es_caps.minspeed) 1216 val = 0; 1217 ES_UNLOCK(es); 1218 err = sysctl_handle_int(oidp, &val, sizeof(val), req); 1219 1220 if (err || req->newptr == NULL) 1221 return (err); 1222 if (val != 0 && (val < es_caps.minspeed || val > es_caps.maxspeed)) 1223 return (EINVAL); 1224 1225 ES_LOCK(es); 1226 if (es->ctrl & (CTRL_DAC2_EN|CTRL_ADC_EN)) { 1227 ES_UNLOCK(es); 1228 return (EBUSY); 1229 } 1230 if (val) { 1231 if (val != ES_FIXED_RATE(es->escfg)) { 1232 es->escfg = ES_SET_FIXED_RATE(es->escfg, val); 1233 es->ch[ES_DAC2].caps.maxspeed = val; 1234 es->ch[ES_DAC2].caps.minspeed = val; 1235 es->ch[ES_ADC].caps.maxspeed = val; 1236 es->ch[ES_ADC].caps.minspeed = val; 1237 es->ctrl &= ~CTRL_PCLKDIV; 1238 es->ctrl |= DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV; 1239 es_wr(es, ES1370_REG_CONTROL, es->ctrl, 4); 1240 } 1241 } else { 1242 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0); 1243 es->ch[ES_DAC2].caps = es_caps; 1244 es->ch[ES_ADC].caps = es_caps; 1245 } 1246 ES_UNLOCK(es); 1247 1248 return (0); 1249} 1250 1251static int 1252sysctl_es137x_single_pcm_mixer(SYSCTL_HANDLER_ARGS) 1253{ 1254 struct es_info *es; 1255 struct snddev_info *d; 1256 struct snd_mixer *m; 1257 struct cdev *i_dev; 1258 device_t dev; 1259 uint32_t val, set; 1260 int recsrc, level, err; 1261 1262 dev = oidp->oid_arg1; 1263 d = device_get_softc(dev); 1264 if (d == NULL || d->mixer_dev == NULL || d->mixer_dev->si_drv1 == NULL) 1265 return (EINVAL); 1266 es = d->devinfo; 1267 if (es == NULL) 1268 return (EINVAL); 1269 ES_LOCK(es); 1270 set = ES_SINGLE_PCM_MIX(es->escfg); 1271 val = set; 1272 ES_UNLOCK(es); 1273 err = sysctl_handle_int(oidp, &val, sizeof(val), req); 1274 1275 if (err || req->newptr == NULL) 1276 return (err); 1277 if (!(val == 0 || val == 1)) 1278 return (EINVAL); 1279 if (val == set) 1280 return (0); 1281 i_dev = d->mixer_dev; 1282 if (mixer_ioctl(i_dev, 0, (caddr_t)&recsrc, 0, NULL) != EBADF) 1283 return (EBUSY); 1284 err = mixer_ioctl(i_dev, MIXER_READ(SOUND_MIXER_PCM), 1285 (caddr_t)&level, -1, NULL); 1286 if (!err) 1287 err = mixer_ioctl(i_dev, MIXER_READ(SOUND_MIXER_RECSRC), 1288 (caddr_t)&recsrc, -1, NULL); 1289 if (err) 1290 return (err); 1291 if (level < 0) 1292 return (EINVAL); 1293 1294 ES_LOCK(es); 1295 if (es->ctrl & (CTRL_ADC_EN | CTRL_DAC1_EN | CTRL_DAC2_EN)) { 1296 ES_UNLOCK(es); 1297 return (EBUSY); 1298 } 1299 if (val) { 1300 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 1); 1301 } else { 1302 es->escfg = ES_SET_SINGLE_PCM_MIX(es->escfg, 0); 1303 } 1304 ES_UNLOCK(es); 1305 m = i_dev->si_drv1; 1306 if (!val) { 1307 mix_setdevs(m, mix_getdevs(d->mixer_dev->si_drv1) | 1308 (1 << SOUND_MIXER_SYNTH)); 1309 mix_setrecdevs(m, mix_getrecdevs(d->mixer_dev->si_drv1) | 1310 (1 << SOUND_MIXER_SYNTH)); 1311 err = mixer_ioctl(i_dev, MIXER_WRITE(SOUND_MIXER_SYNTH), 1312 (caddr_t)&level, -1, NULL); 1313 } else { 1314 err = mixer_ioctl(i_dev, MIXER_WRITE(SOUND_MIXER_SYNTH), 1315 (caddr_t)&level, -1, NULL); 1316 mix_setdevs(m, mix_getdevs(d->mixer_dev->si_drv1) & 1317 ~(1 << SOUND_MIXER_SYNTH)); 1318 mix_setrecdevs(m, mix_getrecdevs(d->mixer_dev->si_drv1) & 1319 ~(1 << SOUND_MIXER_SYNTH)); 1320 } 1321 if (!err) { 1322 level = recsrc; 1323 if (recsrc & (1 << SOUND_MIXER_PCM)) 1324 recsrc |= 1 << SOUND_MIXER_SYNTH; 1325 else if (recsrc & (1 << SOUND_MIXER_SYNTH)) 1326 recsrc |= 1 << SOUND_MIXER_PCM; 1327 if (level != recsrc) 1328 err = mixer_ioctl(i_dev, MIXER_WRITE(SOUND_MIXER_RECSRC), 1329 (caddr_t)&recsrc, -1, NULL); 1330 } 1331 return (err); 1332} 1333#endif /* SND_DYNSYSCTL */ 1334 1335static void 1336es_init_sysctls(device_t dev) 1337{ 1338#ifdef SND_DYNSYSCTL 1339 struct es_info *es; 1340 int r, devid, revid; 1341 1342 devid = pci_get_devid(dev); 1343 revid = pci_get_revid(dev); 1344 es = pcm_getdevinfo(dev); 1345 if ((devid == ES1371_PCI_ID && revid == ES1371REV_ES1373_8) || 1346 (devid == ES1371_PCI_ID && revid == ES1371REV_CT5880_A) || 1347 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_C) || 1348 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_D) || 1349 (devid == CT5880_PCI_ID && revid == CT5880REV_CT5880_E)) { 1350 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1351 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1352 OID_AUTO, "spdif_enabled", 1353 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1354 sysctl_es137x_spdif_enable, "I", 1355 "Enable S/PDIF output on primary playback channel"); 1356 } else if (devid == ES1370_PCI_ID) { 1357 /* 1358 * Enable fixed rate sysctl if both DAC2 / ADC enabled. 1359 */ 1360 if (es->ch[ES_DAC2].channel != NULL && es->ch[ES_ADC].channel != NULL) { 1361 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1362 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1363 OID_AUTO, "fixed_rate", 1364 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1365 sysctl_es137x_fixed_rate, "I", 1366 "Enable fixed rate playback/recording"); 1367 } 1368 /* 1369 * Enable single pcm mixer sysctl if both DAC1/2 enabled. 1370 */ 1371 if (es->ch[ES_DAC1].channel != NULL && es->ch[ES_DAC2].channel != NULL) { 1372 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1373 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1374 OID_AUTO, "single_pcm_mixer", 1375 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1376 sysctl_es137x_single_pcm_mixer, "I", 1377 "Single PCM mixer controller for both DAC1/DAC2"); 1378 } 1379 } 1380 if (resource_int_value(device_get_name(dev), 1381 device_get_unit(dev), "latency_timer", &r) == 0 && 1382 !(r < 0 || r > 255)) 1383 pci_write_config(dev, PCIR_LATTIMER, r, 1); 1384 SYSCTL_ADD_PROC(snd_sysctl_tree(dev), 1385 SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)), 1386 OID_AUTO, "latency_timer", 1387 CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev), 1388 sysctl_es137x_latency_timer, "I", 1389 "PCI Latency Timer configuration"); 1390#endif /* SND_DYNSYSCTL */ 1391} 1392 1393static int 1394es_pci_attach(device_t dev) 1395{ 1396 u_int32_t data; 1397 struct es_info *es = NULL; 1398 int mapped, i, numplay, dac_cfg; 1399 char status[SND_STATUSLEN]; 1400 struct ac97_info *codec = NULL; 1401 kobj_class_t ct = NULL; 1402 uint32_t devid; 1403 1404 if ((es = malloc(sizeof *es, M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) { 1405 device_printf(dev, "cannot allocate softc\n"); 1406 return ENXIO; 1407 } 1408 es->lock = snd_mtxcreate(device_get_nameunit(dev), "sound softc"); 1409 es->dev = dev; 1410 es->escfg = 0; 1411 mapped = 0; 1412 1413 pci_enable_busmaster(dev); 1414 data = pci_read_config(dev, PCIR_COMMAND, 2); 1415 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN); 1416 pci_write_config(dev, PCIR_COMMAND, data, 2); 1417 data = pci_read_config(dev, PCIR_COMMAND, 2); 1418 if (mapped == 0 && (data & PCIM_CMD_MEMEN)) { 1419 es->regid = MEM_MAP_REG; 1420 es->regtype = SYS_RES_MEMORY; 1421 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1422 RF_ACTIVE); 1423 if (es->reg) 1424 mapped++; 1425 } 1426 if (mapped == 0 && (data & PCIM_CMD_PORTEN)) { 1427 es->regid = PCIR_BAR(0); 1428 es->regtype = SYS_RES_IOPORT; 1429 es->reg = bus_alloc_resource_any(dev, es->regtype, &es->regid, 1430 RF_ACTIVE); 1431 if (es->reg) 1432 mapped++; 1433 } 1434 if (mapped == 0) { 1435 device_printf(dev, "unable to map register space\n"); 1436 goto bad; 1437 } 1438 1439 es->st = rman_get_bustag(es->reg); 1440 es->sh = rman_get_bushandle(es->reg); 1441 es->bufsz = pcm_getbuffersize(dev, 4096, ES_DEFAULT_BUFSZ, 65536); 1442 1443 if (resource_int_value(device_get_name(dev), 1444 device_get_unit(dev), "dac", &dac_cfg) == 0) { 1445 if (dac_cfg < 0 || dac_cfg > 3) 1446 dac_cfg = ES_DEFAULT_DAC_CFG; 1447 } else 1448 dac_cfg = ES_DEFAULT_DAC_CFG; 1449 1450 switch (dac_cfg) { 1451 case 0: /* Enable all DAC: DAC1, DAC2 */ 1452 numplay = 2; 1453 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1); 1454 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC2); 1455 break; 1456 case 1: /* Only DAC1 */ 1457 numplay = 1; 1458 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC1); 1459 break; 1460 case 3: /* Enable all DAC / swap position: DAC2, DAC1 */ 1461 numplay = 2; 1462 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2); 1463 es->escfg = ES_SET_DAC_SECOND(es->escfg, ES_DAC1); 1464 break; 1465 case 2: /* Only DAC2 */ 1466 default: 1467 numplay = 1; 1468 es->escfg = ES_SET_DAC_FIRST(es->escfg, ES_DAC2); 1469 break; 1470 } 1471 es->escfg = ES_SET_NUMPLAY(es->escfg, numplay); 1472 es->escfg = ES_SET_NUMREC(es->escfg, 1); 1473 1474 devid = pci_get_devid(dev); 1475 switch (devid) { 1476 case ES1371_PCI_ID: 1477 case ES1371_PCI_ID2: 1478 case CT5880_PCI_ID: 1479 case CT4730_PCI_ID: 1480 es1371_init(es); 1481 codec = AC97_CREATE(dev, es, es1371_ac97); 1482 if (codec == NULL) 1483 goto bad; 1484 /* our init routine does everything for us */ 1485 /* set to NULL; flag mixer_init not to run the ac97_init */ 1486 /* ac97_mixer.init = NULL; */ 1487 if (mixer_init(dev, ac97_getmixerclass(), codec)) 1488 goto bad; 1489 ct = &eschan1371_class; 1490 break; 1491 case ES1370_PCI_ID: 1492 es1370_init(es); 1493 /* 1494 * Disable fixed rate operation if DAC2 disabled. 1495 * This is a special case for es1370 only, where the 1496 * speed of both ADC and DAC2 locked together. 1497 */ 1498 if (!ES_DAC2_ENABLED(es->escfg)) { 1499 es->escfg = ES_SET_FIXED_RATE(es->escfg, 0); 1500 } 1501 if (mixer_init(dev, &es1370_mixer_class, es)) 1502 goto bad; 1503 ct = &eschan1370_class; 1504 break; 1505 default: 1506 goto bad; 1507 /* NOTREACHED */ 1508 } 1509 1510 es->irqid = 0; 1511 es->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &es->irqid, 1512 RF_ACTIVE | RF_SHAREABLE); 1513 if (!es->irq || snd_setup_intr(dev, es->irq, INTR_MPSAFE, es_intr, es, &es->ih)) { 1514 device_printf(dev, "unable to map interrupt\n"); 1515 goto bad; 1516 } 1517 1518 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 1519 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 1520 /*highaddr*/BUS_SPACE_MAXADDR, 1521 /*filter*/NULL, /*filterarg*/NULL, 1522 /*maxsize*/es->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff, 1523 /*flags*/0, /*lockfunc*/NULL, 1524 /*lockarg*/NULL, &es->parent_dmat) != 0) { 1525 device_printf(dev, "unable to create dma tag\n"); 1526 goto bad; 1527 } 1528 1529 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld %s", 1530 (es->regtype == SYS_RES_IOPORT)? "io" : "memory", 1531 rman_get_start(es->reg), rman_get_start(es->irq),PCM_KLDSTRING(snd_es137x)); 1532 1533 if (pcm_register(dev, es, numplay, 1)) 1534 goto bad; 1535 for (i = 0; i < numplay; i++) 1536 pcm_addchan(dev, PCMDIR_PLAY, ct, es); 1537 pcm_addchan(dev, PCMDIR_REC, ct, es); 1538 es_init_sysctls(dev); 1539 pcm_setstatus(dev, status); 1540 es->escfg = ES_SET_GP(es->escfg, 0); 1541 if (numplay == 1) { 1542 device_printf(dev, "<Playback: DAC%d / Record: ADC>\n", 1543 ES_DAC_FIRST(es->escfg) + 1); 1544 } else if (numplay == 2) { 1545 device_printf(dev, "<Playback: DAC%d,DAC%d / Record: ADC>\n", 1546 ES_DAC_FIRST(es->escfg) + 1, 1547 ES_DAC_SECOND(es->escfg) + 1); 1548 } 1549 return 0; 1550 1551 bad: 1552 if (es->parent_dmat) bus_dma_tag_destroy(es->parent_dmat); 1553 if (es->ih) bus_teardown_intr(dev, es->irq, es->ih); 1554 if (es->irq) bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1555 if (codec) ac97_destroy(codec); 1556 if (es->reg) bus_release_resource(dev, es->regtype, es->regid, es->reg); 1557 if (es->lock) snd_mtxfree(es->lock); 1558 if (es) free(es, M_DEVBUF); 1559 return ENXIO; 1560} 1561 1562static int 1563es_pci_detach(device_t dev) 1564{ 1565 int r; 1566 struct es_info *es; 1567 1568 r = pcm_unregister(dev); 1569 if (r) return r; 1570 1571 es = pcm_getdevinfo(dev); 1572 bus_teardown_intr(dev, es->irq, es->ih); 1573 bus_release_resource(dev, SYS_RES_IRQ, es->irqid, es->irq); 1574 bus_release_resource(dev, es->regtype, es->regid, es->reg); 1575 bus_dma_tag_destroy(es->parent_dmat); 1576 snd_mtxfree(es->lock); 1577 free(es, M_DEVBUF); 1578 1579 return 0; 1580} 1581 1582static device_method_t es_methods[] = { 1583 /* Device interface */ 1584 DEVMETHOD(device_probe, es_pci_probe), 1585 DEVMETHOD(device_attach, es_pci_attach), 1586 DEVMETHOD(device_detach, es_pci_detach), 1587 1588 { 0, 0 } 1589}; 1590 1591static driver_t es_driver = { 1592 "pcm", 1593 es_methods, 1594 PCM_SOFTC_SIZE, 1595}; 1596 1597DRIVER_MODULE(snd_es137x, pci, es_driver, pcm_devclass, 0, 0); 1598MODULE_DEPEND(snd_es137x, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 1599MODULE_VERSION(snd_es137x, 1); 1600