aureal.c revision 56876
1/* 2 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/dev/sound/pci/aureal.c 56876 2000-01-29 18:48:30Z peter $ 27 */ 28 29#include <dev/sound/pcm/sound.h> 30#include <dev/sound/pcm/ac97.h> 31#include <dev/sound/pci/aureal.h> 32 33#include <pci/pcireg.h> 34#include <pci/pcivar.h> 35 36/* PCI IDs of supported chips */ 37#define AU8820_PCI_ID 0x000112eb 38 39/* channel interface */ 40static void *auchan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir); 41static int auchan_setdir(void *data, int dir); 42static int auchan_setformat(void *data, u_int32_t format); 43static int auchan_setspeed(void *data, u_int32_t speed); 44static int auchan_setblocksize(void *data, u_int32_t blocksize); 45static int auchan_trigger(void *data, int go); 46static int auchan_getptr(void *data); 47static pcmchan_caps *auchan_getcaps(void *data); 48 49static pcmchan_caps au_playcaps = { 50 4000, 48000, 51 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 52 AFMT_STEREO | AFMT_S16_LE 53}; 54 55static pcmchan_caps au_reccaps = { 56 4000, 48000, 57 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE, 58 AFMT_STEREO | AFMT_S16_LE 59}; 60 61static pcm_channel au_chantemplate = { 62 auchan_init, 63 auchan_setdir, 64 auchan_setformat, 65 auchan_setspeed, 66 auchan_setblocksize, 67 auchan_trigger, 68 auchan_getptr, 69 auchan_getcaps, 70}; 71 72/* -------------------------------------------------------------------- */ 73 74static u_int32_t au_rdcd(void *arg, int regno); 75static void au_wrcd(void *arg, int regno, u_int32_t data); 76 77struct au_info; 78 79struct au_chinfo { 80 struct au_info *parent; 81 pcm_channel *channel; 82 snd_dbuf *buffer; 83 int dir; 84}; 85 86struct au_info { 87 int unit; 88 89 bus_space_tag_t st[3]; 90 bus_space_handle_t sh[3]; 91 92 bus_dma_tag_t parent_dmat; 93 94 u_int32_t x[32], y[128]; 95 char z[128]; 96 u_int32_t routes[4], interrupts; 97 struct au_chinfo pch; 98}; 99 100static int au_init(device_t dev, struct au_info *au); 101static void au_intr(void *); 102 103/* -------------------------------------------------------------------- */ 104 105static u_int32_t 106au_rd(struct au_info *au, int mapno, int regno, int size) 107{ 108 switch(size) { 109 case 1: 110 return bus_space_read_1(au->st[mapno], au->sh[mapno], regno); 111 case 2: 112 return bus_space_read_2(au->st[mapno], au->sh[mapno], regno); 113 case 4: 114 return bus_space_read_4(au->st[mapno], au->sh[mapno], regno); 115 default: 116 return 0xffffffff; 117 } 118} 119 120static void 121au_wr(struct au_info *au, int mapno, int regno, u_int32_t data, int size) 122{ 123 switch(size) { 124 case 1: 125 bus_space_write_1(au->st[mapno], au->sh[mapno], regno, data); 126 break; 127 case 2: 128 bus_space_write_2(au->st[mapno], au->sh[mapno], regno, data); 129 break; 130 case 4: 131 bus_space_write_4(au->st[mapno], au->sh[mapno], regno, data); 132 break; 133 } 134} 135 136static u_int32_t 137au_rdcd(void *arg, int regno) 138{ 139 struct au_info *au = (struct au_info *)arg; 140 int i=0, j=0; 141 142 regno<<=16; 143 au_wr(au, 0, AU_REG_CODECIO, regno, 4); 144 while (j<50) { 145 i=au_rd(au, 0, AU_REG_CODECIO, 4); 146 if ((i & 0x00ff0000) == (regno | 0x00800000)) break; 147 DELAY(j * 200 + 2000); 148 j++; 149 } 150 if (j==50) printf("pcm%d: codec timeout reading register %x (%x)\n", 151 au->unit, (regno & AU_CDC_REGMASK)>>16, i); 152 return i & AU_CDC_DATAMASK; 153} 154 155static void 156au_wrcd(void *arg, int regno, u_int32_t data) 157{ 158 struct au_info *au = (struct au_info *)arg; 159 int i, j, tries; 160 i=j=tries=0; 161 do { 162 while (j<50 && (i & AU_CDC_WROK) == 0) { 163 i=au_rd(au, 0, AU_REG_CODECST, 4); 164 DELAY(2000); 165 j++; 166 } 167 if (j==50) printf("codec timeout during write of register %x, data %x\n", 168 regno, data); 169 au_wr(au, 0, AU_REG_CODECIO, (regno<<16) | AU_CDC_REGSET | data, 4); 170/* DELAY(20000); 171 i=au_rdcd(au, regno); 172*/ tries++; 173 } while (0); /* (i != data && tries < 3); */ 174 /* 175 if (tries == 3) printf("giving up writing 0x%4x to codec reg %2x\n", data, regno); 176 */ 177} 178 179static void 180au_setbit(u_int32_t *p, char bit, u_int32_t value) 181{ 182 p += bit >> 5; 183 bit &= 0x1f; 184 *p &= ~ (1 << bit); 185 *p |= (value << bit); 186} 187 188static void 189au_addroute(struct au_info *au, int a, int b, int route) 190{ 191 int j = 0x1099c+(a<<2); 192 if (au->x[a] != a+0x67) j = AU_REG_RTBASE+(au->x[a]<<2); 193 194 au_wr(au, 0, AU_REG_RTBASE+(route<<2), 0xffffffff, 4); 195 au_wr(au, 0, j, route | (b<<7), 4); 196 au->y[route]=au->x[a]; 197 au->x[a]=route; 198 au->z[route]=a & 0x000000ff; 199 au_setbit(au->routes, route, 1); 200} 201 202static void 203au_delroute(struct au_info *au, int route) 204{ 205 int i; 206 int j=au->z[route]; 207 208 au_setbit(au->routes, route, 0); 209 au->z[route]=0x1f; 210 i=au_rd(au, 0, AU_REG_RTBASE+(route<<2), 4); 211 au_wr(au, 0, AU_REG_RTBASE+(au->y[route]<<2), i, 4); 212 au->y[i & 0x7f]=au->y[route]; 213 au_wr(au, 0, AU_REG_RTBASE+(route<<2), 0xfffffffe, 4); 214 if (au->x[j] == route) au->x[j]=au->y[route]; 215 au->y[route]=0x7f; 216} 217 218static void 219au_encodec(struct au_info *au, char channel) 220{ 221 au_wr(au, 0, AU_REG_CODECEN, 222 au_rd(au, 0, AU_REG_CODECEN, 4) | (1 << (channel + 8)), 4); 223} 224 225static void 226au_clrfifo(struct au_info *au, u_int32_t c) 227{ 228 u_int32_t i; 229 230 for (i=0; i<32; i++) au_wr(au, 0, AU_REG_FIFOBASE+(c<<7)+(i<<2), 0, 4); 231} 232 233static void 234au_setadb(struct au_info *au, u_int32_t c, u_int32_t enable) 235{ 236 int x; 237 238 x = au_rd(au, 0, AU_REG_ADB, 4); 239 x &= ~(1 << c); 240 x |= (enable << c); 241 au_wr(au, 0, AU_REG_ADB, x, 4); 242} 243 244static void 245au_prepareoutput(struct au_chinfo *ch, u_int32_t format) 246{ 247 struct au_info *au = ch->parent; 248 int i, stereo = (format & AFMT_STEREO)? 1 : 0; 249 u_int32_t baseaddr = vtophys(ch->buffer->buf); 250 251 au_wr(au, 0, 0x1061c, 0, 4); 252 au_wr(au, 0, 0x10620, 0, 4); 253 au_wr(au, 0, 0x10624, 0, 4); 254 switch(format & ~AFMT_STEREO) { 255 case 1: 256 i=0xb000; 257 break; 258 case 2: 259 i=0xf000; 260 break; 261 case 8: 262 i=0x7000; 263 break; 264 case 16: 265 i=0x23000; 266 break; 267 default: 268 i=0x3000; 269 } 270 au_wr(au, 0, 0x10200, baseaddr, 4); 271 au_wr(au, 0, 0x10204, baseaddr+0x1000, 4); 272 au_wr(au, 0, 0x10208, baseaddr+0x2000, 4); 273 au_wr(au, 0, 0x1020c, baseaddr+0x3000, 4); 274 275 au_wr(au, 0, 0x10400, 0xdeffffff, 4); 276 au_wr(au, 0, 0x10404, 0xfcffffff, 4); 277 278 au_wr(au, 0, 0x10580, i, 4); 279 280 au_wr(au, 0, 0x10210, baseaddr, 4); 281 au_wr(au, 0, 0x10214, baseaddr+0x1000, 4); 282 au_wr(au, 0, 0x10218, baseaddr+0x2000, 4); 283 au_wr(au, 0, 0x1021c, baseaddr+0x3000, 4); 284 285 au_wr(au, 0, 0x10408, 0x00fff000 | 0x56000000 | 0x00000fff, 4); 286 au_wr(au, 0, 0x1040c, 0x00fff000 | 0x74000000 | 0x00000fff, 4); 287 288 au_wr(au, 0, 0x10584, i, 4); 289 290 au_wr(au, 0, 0x0f800, stereo? 0x00030032 : 0x00030030, 4); 291 au_wr(au, 0, 0x0f804, stereo? 0x00030032 : 0x00030030, 4); 292 293 au_addroute(au, 0x11, 0, 0x58); 294 au_addroute(au, 0x11, stereo? 0 : 1, 0x59); 295} 296 297/* channel interface */ 298static void * 299auchan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir) 300{ 301 struct au_info *au = devinfo; 302 struct au_chinfo *ch = (dir == PCMDIR_PLAY)? &au->pch : NULL; 303 304 ch->parent = au; 305 ch->channel = c; 306 ch->buffer = b; 307 ch->buffer->bufsize = AU_BUFFSIZE; 308 if (chn_allocbuf(ch->buffer, au->parent_dmat) == -1) return NULL; 309 return ch; 310} 311 312static int 313auchan_setdir(void *data, int dir) 314{ 315 struct au_chinfo *ch = data; 316 if (dir == PCMDIR_PLAY) { 317 } else { 318 } 319 ch->dir = dir; 320 return 0; 321} 322 323static int 324auchan_setformat(void *data, u_int32_t format) 325{ 326 struct au_chinfo *ch = data; 327 328 if (ch->dir == PCMDIR_PLAY) au_prepareoutput(ch, format); 329 return 0; 330} 331 332static int 333auchan_setspeed(void *data, u_int32_t speed) 334{ 335 struct au_chinfo *ch = data; 336 if (ch->dir == PCMDIR_PLAY) { 337 } else { 338 } 339 return speed; 340} 341 342static int 343auchan_setblocksize(void *data, u_int32_t blocksize) 344{ 345 return blocksize; 346} 347 348static int 349auchan_trigger(void *data, int go) 350{ 351 struct au_chinfo *ch = data; 352 struct au_info *au = ch->parent; 353 if (go == PCMTRIG_EMLDMAWR) return 0; 354 if (ch->dir == PCMDIR_PLAY) { 355 au_setadb(au, 0x11, (go)? 1 : 0); 356 if (!go) { 357 au_wr(au, 0, 0xf800, 0, 4); 358 au_wr(au, 0, 0xf804, 0, 4); 359 au_delroute(au, 0x58); 360 au_delroute(au, 0x59); 361 } 362 } else { 363 } 364 return 0; 365} 366 367static int 368auchan_getptr(void *data) 369{ 370 struct au_chinfo *ch = data; 371 struct au_info *au = ch->parent; 372 if (ch->dir == PCMDIR_PLAY) { 373 return au_rd(au, 0, AU_REG_UNK2, 4) & (AU_BUFFSIZE-1); 374 } else { 375 return 0; 376 } 377} 378 379static pcmchan_caps * 380auchan_getcaps(void *data) 381{ 382 struct au_chinfo *ch = data; 383 return (ch->dir == PCMDIR_PLAY)? &au_playcaps : &au_reccaps; 384} 385 386/* The interrupt handler */ 387static void 388au_intr (void *p) 389{ 390 struct au_info *au = p; 391 u_int32_t intsrc, i; 392 393 au->interrupts++; 394 intsrc=au_rd(au, 0, AU_REG_IRQSRC, 4); 395 printf("pcm%d: interrupt with src %x\n", au->unit, intsrc); 396 if (intsrc & AU_IRQ_FATAL) printf("pcm%d: fatal error irq\n", au->unit); 397 if (intsrc & AU_IRQ_PARITY) printf("pcm%d: parity error irq\n", au->unit); 398 if (intsrc & AU_IRQ_UNKNOWN) { 399 (void)au_rd(au, 0, AU_REG_UNK1, 4); 400 au_wr(au, 0, AU_REG_UNK1, 0, 4); 401 au_wr(au, 0, AU_REG_UNK1, 0x10000, 4); 402 } 403 if (intsrc & AU_IRQ_PCMOUT) { 404 i=au_rd(au, 0, AU_REG_UNK2, 4) & (AU_BUFFSIZE-1); 405 chn_intr(au->pch.channel); 406 (void)au_rd(au, 0, AU_REG_UNK3, 4); 407 (void)au_rd(au, 0, AU_REG_UNK4, 4); 408 (void)au_rd(au, 0, AU_REG_UNK5, 4); 409 } 410/* don't support midi 411 if (intsrc & AU_IRQ_MIDI) { 412 i=au_rd(au, 0, 0x11004, 4); 413 j=10; 414 while (i & 0xff) { 415 if (j-- <= 0) break; 416 i=au_rd(au, 0, 0x11000, 4); 417 if ((au->midi_stat & 1) && (au->midi_out)) 418 au->midi_out(au->midi_devno, i); 419 i=au_rd(au, 0, 0x11004); 420 } 421 } 422*/ 423 au_wr(au, 0, AU_REG_IRQSRC, intsrc & 0x7ff, 4); 424 au_rd(au, 0, AU_REG_IRQSRC, 4); 425} 426 427 428/* -------------------------------------------------------------------- */ 429 430/* Probe and attach the card */ 431 432static int 433au_init(device_t dev, struct au_info *au) 434{ 435 u_int32_t i, j; 436 437 au_wr(au, 0, AU_REG_IRQGLOB, 0xffffffff, 4); 438 DELAY(100000); 439 440 /* init codec */ 441 /* cold reset */ 442 for (i=0; i<32; i++) { 443 au_wr(au, 0, AU_REG_CODECCHN+(i<<2), 0, 4); 444 DELAY(10000); 445 } 446 if (1) { 447 au_wr(au, 0, AU_REG_CODECST, 0x8068, 4); 448 DELAY(10000); 449 au_wr(au, 0, AU_REG_CODECST, 0x00e8, 4); 450 DELAY(10000); 451 } else { 452 au_wr(au, 0, AU_REG_CODECST, 0x00a8, 4); 453 DELAY(100000); 454 au_wr(au, 0, AU_REG_CODECST, 0x80a8, 4); 455 DELAY(100000); 456 au_wr(au, 0, AU_REG_CODECST, 0x80e8, 4); 457 DELAY(100000); 458 au_wr(au, 0, AU_REG_CODECST, 0x80a8, 4); 459 DELAY(100000); 460 au_wr(au, 0, AU_REG_CODECST, 0x00a8, 4); 461 DELAY(100000); 462 au_wr(au, 0, AU_REG_CODECST, 0x00e8, 4); 463 DELAY(100000); 464 } 465 466 /* init */ 467 for (i=0; i<32; i++) { 468 au_wr(au, 0, AU_REG_CODECCHN+(i<<2), 0, 4); 469 DELAY(10000); 470 } 471 au_wr(au, 0, AU_REG_CODECST, 0xe8, 4); 472 DELAY(10000); 473 au_wr(au, 0, AU_REG_CODECEN, 0, 4); 474 475 /* setup codec */ 476 i=j=0; 477 while (j<100 && (i & AU_CDC_READY)==0) { 478 i=au_rd(au, 0, AU_REG_CODECST, 4); 479 DELAY(1000); 480 j++; 481 } 482 if (j==100) device_printf(dev, "codec not ready, status 0x%x\n", i); 483 484 /* init adb */ 485 /*au->x5c=0;*/ 486 for (i=0; i<32; i++) au->x[i]=i+0x67; 487 for (i=0; i<128; i++) au->y[i]=0x7f; 488 for (i=0; i<128; i++) au->z[i]=0x1f; 489 au_wr(au, 0, AU_REG_ADB, 0, 4); 490 for (i=0; i<124; i++) au_wr(au, 0, AU_REG_RTBASE+(i<<2), 0xffffffff, 4); 491 492 /* test */ 493 i=au_rd(au, 0, 0x107c0, 4); 494 if (i!=0xdeadbeef) device_printf(dev, "dma check failed: 0x%x\n", i); 495 496 /* install mixer */ 497 au_wr(au, 0, AU_REG_IRQGLOB, 498 au_rd(au, 0, AU_REG_IRQGLOB, 4) | AU_IRQ_ENABLE, 4); 499 /* braindead but it's what the oss/linux driver does 500 * for (i=0; i<0x80000000; i++) au_wr(au, 0, i<<2, 0, 4); 501 */ 502 au->routes[0]=au->routes[1]=au->routes[2]=au->routes[3]=0; 503 /*au->x1e4=0;*/ 504 505 /* attach channel */ 506 au_addroute(au, 0x11, 0x48, 0x02); 507 au_addroute(au, 0x11, 0x49, 0x03); 508 au_encodec(au, 0); 509 au_encodec(au, 1); 510 511 for (i=0; i<48; i++) au_wr(au, 0, 0xf800+(i<<2), 0x20, 4); 512 for (i=2; i<6; i++) au_wr(au, 0, 0xf800+(i<<2), 0, 4); 513 au_wr(au, 0, 0xf8c0, 0x0843, 4); 514 for (i=0; i<4; i++) au_clrfifo(au, i); 515 516 return (0); 517} 518 519static int 520au_testirq(struct au_info *au) 521{ 522 au_wr(au, 0, AU_REG_UNK1, 0x80001000, 4); 523 au_wr(au, 0, AU_REG_IRQEN, 0x00001030, 4); 524 au_wr(au, 0, AU_REG_IRQSRC, 0x000007ff, 4); 525 DELAY(1000000); 526 if (au->interrupts==0) printf("pcm%d: irq test failed\n", au->unit); 527 /* this apparently generates an irq */ 528 return 0; 529} 530 531static int 532au_pci_probe(device_t dev) 533{ 534 if (pci_get_devid(dev) == AU8820_PCI_ID) { 535 device_set_desc(dev, "Aureal Vortex 8820"); 536 return 0; 537 } 538 539 return ENXIO; 540} 541 542static int 543au_pci_attach(device_t dev) 544{ 545 snddev_info *d; 546 u_int32_t data; 547 struct au_info *au; 548 int type[10]; 549 int regid[10]; 550 struct resource *reg[10]; 551 int i, j, mapped = 0; 552 int irqid; 553 struct resource *irq = 0; 554 void *ih = 0; 555 struct ac97_info *codec; 556 char status[SND_STATUSLEN]; 557 558 d = device_get_softc(dev); 559 if ((au = malloc(sizeof(*au), M_DEVBUF, M_NOWAIT)) == NULL) { 560 device_printf(dev, "cannot allocate softc\n"); 561 return ENXIO; 562 } 563 564 bzero(au, sizeof(*au)); 565 au->unit = device_get_unit(dev); 566 567 data = pci_read_config(dev, PCIR_COMMAND, 2); 568 data |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 569 pci_write_config(dev, PCIR_COMMAND, data, 2); 570 data = pci_read_config(dev, PCIR_COMMAND, 2); 571 572 j=0; 573 /* XXX dfr: is this strictly necessary? */ 574 for (i=0; i<PCI_MAXMAPS_0; i++) { 575#if 0 576 /* Slapped wrist: config_id and map are private structures */ 577 if (bootverbose) { 578 printf("pcm%d: map %d - allocating ", unit, i+1); 579 printf("0x%x bytes of ", 1<<config_id->map[i].ln2size); 580 printf("%s space ", (config_id->map[i].type & PCI_MAPPORT)? 581 "io" : "memory"); 582 printf("at 0x%x...", config_id->map[i].base); 583 } 584#endif 585 regid[j] = PCIR_MAPS + i*4; 586 type[j] = SYS_RES_MEMORY; 587 reg[j] = bus_alloc_resource(dev, type[j], ®id[j], 588 0, ~0, 1, RF_ACTIVE); 589 if (!reg[j]) { 590 type[j] = SYS_RES_IOPORT; 591 reg[j] = bus_alloc_resource(dev, type[j], ®id[j], 592 0, ~0, 1, RF_ACTIVE); 593 } 594 if (reg[j]) { 595 au->st[i] = rman_get_bustag(reg[j]); 596 au->sh[i] = rman_get_bushandle(reg[j]); 597 mapped++; 598 } 599#if 0 600 if (bootverbose) printf("%s\n", mapped? "ok" : "failed"); 601#endif 602 if (mapped) j++; 603 if (j == 10) { 604 /* XXX */ 605 device_printf(dev, "too many resources"); 606 goto bad; 607 } 608 } 609 610#if 0 611 if (j < config_id->nummaps) { 612 printf("pcm%d: unable to map a required resource\n", unit); 613 free(au, M_DEVBUF); 614 return; 615 } 616#endif 617 618 au_wr(au, 0, AU_REG_IRQEN, 0, 4); 619 620 irqid = 0; 621 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &irqid, 622 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 623 if (!irq 624 || bus_setup_intr(dev, irq, INTR_TYPE_TTY, au_intr, au, &ih)) { 625 device_printf(dev, "unable to map interrupt\n"); 626 goto bad; 627 } 628 629 if (au_testirq(au)) device_printf(dev, "irq test failed\n"); 630 631 if (au_init(dev, au) == -1) { 632 device_printf(dev, "unable to initialize the card\n"); 633 goto bad; 634 } 635 636 codec = ac97_create(dev, au, au_rdcd, au_wrcd); 637 if (codec == NULL) goto bad; 638 mixer_init(d, &ac97_mixer, codec); 639 640 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 641 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 642 /*highaddr*/BUS_SPACE_MAXADDR, 643 /*filter*/NULL, /*filterarg*/NULL, 644 /*maxsize*/AU_BUFFSIZE, /*nsegments*/1, /*maxsegz*/0x3ffff, 645 /*flags*/0, &au->parent_dmat) != 0) { 646 device_printf(dev, "unable to create dma tag\n"); 647 goto bad; 648 } 649 650 snprintf(status, SND_STATUSLEN, "at %s 0x%lx irq %ld", 651 (type[0] == SYS_RES_IOPORT)? "io" : "memory", 652 rman_get_start(reg[0]), rman_get_start(irq)); 653 654 if (pcm_register(dev, au, 1, 1)) goto bad; 655 /* pcm_addchan(dev, PCMDIR_REC, &au_chantemplate, au); */ 656 pcm_addchan(dev, PCMDIR_PLAY, &au_chantemplate, au); 657 pcm_setstatus(dev, status); 658 659 return 0; 660 661 bad: 662 if (au) free(au, M_DEVBUF); 663 for (i = 0; i < j; i++) 664 bus_release_resource(dev, type[i], regid[i], reg[i]); 665 if (ih) bus_teardown_intr(dev, irq, ih); 666 if (irq) bus_release_resource(dev, SYS_RES_IRQ, irqid, irq); 667 return ENXIO; 668} 669 670static device_method_t au_methods[] = { 671 /* Device interface */ 672 DEVMETHOD(device_probe, au_pci_probe), 673 DEVMETHOD(device_attach, au_pci_attach), 674 675 { 0, 0 } 676}; 677 678static driver_t au_driver = { 679 "pcm", 680 au_methods, 681 sizeof(snddev_info), 682}; 683 684static devclass_t pcm_devclass; 685 686DRIVER_MODULE(au, pci, au_driver, pcm_devclass, 0, 0); 687